treewide: cleanup continuations and remove logging message whitespace
[linux-2.6.git] / drivers / net / atlx / atl1.c
1 /*
2  * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
3  * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
4  * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
5  *
6  * Derived from Intel e1000 driver
7  * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
8  *
9  * This program is free software; you can redistribute it and/or modify it
10  * under the terms of the GNU General Public License as published by the Free
11  * Software Foundation; either version 2 of the License, or (at your option)
12  * any later version.
13  *
14  * This program is distributed in the hope that it will be useful, but WITHOUT
15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
17  * more details.
18  *
19  * You should have received a copy of the GNU General Public License along with
20  * this program; if not, write to the Free Software Foundation, Inc., 59
21  * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
22  *
23  * The full GNU General Public License is included in this distribution in the
24  * file called COPYING.
25  *
26  * Contact Information:
27  * Xiong Huang <xiong.huang@atheros.com>
28  * Jie Yang <jie.yang@atheros.com>
29  * Chris Snook <csnook@redhat.com>
30  * Jay Cliburn <jcliburn@gmail.com>
31  *
32  * This version is adapted from the Attansic reference driver.
33  *
34  * TODO:
35  * Add more ethtool functions.
36  * Fix abstruse irq enable/disable condition described here:
37  *      http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
38  *
39  * NEEDS TESTING:
40  * VLAN
41  * multicast
42  * promiscuous mode
43  * interrupt coalescing
44  * SMP torture testing
45  */
46
47 #include <asm/atomic.h>
48 #include <asm/byteorder.h>
49
50 #include <linux/compiler.h>
51 #include <linux/crc32.h>
52 #include <linux/delay.h>
53 #include <linux/dma-mapping.h>
54 #include <linux/etherdevice.h>
55 #include <linux/hardirq.h>
56 #include <linux/if_ether.h>
57 #include <linux/if_vlan.h>
58 #include <linux/in.h>
59 #include <linux/interrupt.h>
60 #include <linux/ip.h>
61 #include <linux/irqflags.h>
62 #include <linux/irqreturn.h>
63 #include <linux/jiffies.h>
64 #include <linux/mii.h>
65 #include <linux/module.h>
66 #include <linux/moduleparam.h>
67 #include <linux/net.h>
68 #include <linux/netdevice.h>
69 #include <linux/pci.h>
70 #include <linux/pci_ids.h>
71 #include <linux/pm.h>
72 #include <linux/skbuff.h>
73 #include <linux/slab.h>
74 #include <linux/spinlock.h>
75 #include <linux/string.h>
76 #include <linux/tcp.h>
77 #include <linux/timer.h>
78 #include <linux/types.h>
79 #include <linux/workqueue.h>
80
81 #include <net/checksum.h>
82
83 #include "atl1.h"
84
85 #define ATLX_DRIVER_VERSION "2.1.3"
86 MODULE_AUTHOR("Xiong Huang <xiong.huang@atheros.com>, "
87               "Chris Snook <csnook@redhat.com>, "
88               "Jay Cliburn <jcliburn@gmail.com>");
89 MODULE_LICENSE("GPL");
90 MODULE_VERSION(ATLX_DRIVER_VERSION);
91
92 /* Temporary hack for merging atl1 and atl2 */
93 #include "atlx.c"
94
95 static const struct ethtool_ops atl1_ethtool_ops;
96
97 /*
98  * This is the only thing that needs to be changed to adjust the
99  * maximum number of ports that the driver can manage.
100  */
101 #define ATL1_MAX_NIC 4
102
103 #define OPTION_UNSET    -1
104 #define OPTION_DISABLED 0
105 #define OPTION_ENABLED  1
106
107 #define ATL1_PARAM_INIT { [0 ... ATL1_MAX_NIC] = OPTION_UNSET }
108
109 /*
110  * Interrupt Moderate Timer in units of 2 us
111  *
112  * Valid Range: 10-65535
113  *
114  * Default Value: 100 (200us)
115  */
116 static int __devinitdata int_mod_timer[ATL1_MAX_NIC+1] = ATL1_PARAM_INIT;
117 static unsigned int num_int_mod_timer;
118 module_param_array_named(int_mod_timer, int_mod_timer, int,
119         &num_int_mod_timer, 0);
120 MODULE_PARM_DESC(int_mod_timer, "Interrupt moderator timer");
121
122 #define DEFAULT_INT_MOD_CNT     100     /* 200us */
123 #define MAX_INT_MOD_CNT         65000
124 #define MIN_INT_MOD_CNT         50
125
126 struct atl1_option {
127         enum { enable_option, range_option, list_option } type;
128         char *name;
129         char *err;
130         int def;
131         union {
132                 struct {        /* range_option info */
133                         int min;
134                         int max;
135                 } r;
136                 struct {        /* list_option info */
137                         int nr;
138                         struct atl1_opt_list {
139                                 int i;
140                                 char *str;
141                         } *p;
142                 } l;
143         } arg;
144 };
145
146 static int __devinit atl1_validate_option(int *value, struct atl1_option *opt,
147         struct pci_dev *pdev)
148 {
149         if (*value == OPTION_UNSET) {
150                 *value = opt->def;
151                 return 0;
152         }
153
154         switch (opt->type) {
155         case enable_option:
156                 switch (*value) {
157                 case OPTION_ENABLED:
158                         dev_info(&pdev->dev, "%s enabled\n", opt->name);
159                         return 0;
160                 case OPTION_DISABLED:
161                         dev_info(&pdev->dev, "%s disabled\n", opt->name);
162                         return 0;
163                 }
164                 break;
165         case range_option:
166                 if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
167                         dev_info(&pdev->dev, "%s set to %i\n", opt->name,
168                                 *value);
169                         return 0;
170                 }
171                 break;
172         case list_option:{
173                         int i;
174                         struct atl1_opt_list *ent;
175
176                         for (i = 0; i < opt->arg.l.nr; i++) {
177                                 ent = &opt->arg.l.p[i];
178                                 if (*value == ent->i) {
179                                         if (ent->str[0] != '\0')
180                                                 dev_info(&pdev->dev, "%s\n",
181                                                         ent->str);
182                                         return 0;
183                                 }
184                         }
185                 }
186                 break;
187
188         default:
189                 break;
190         }
191
192         dev_info(&pdev->dev, "invalid %s specified (%i) %s\n",
193                 opt->name, *value, opt->err);
194         *value = opt->def;
195         return -1;
196 }
197
198 /*
199  * atl1_check_options - Range Checking for Command Line Parameters
200  * @adapter: board private structure
201  *
202  * This routine checks all command line parameters for valid user
203  * input.  If an invalid value is given, or if no user specified
204  * value exists, a default value is used.  The final value is stored
205  * in a variable in the adapter structure.
206  */
207 static void __devinit atl1_check_options(struct atl1_adapter *adapter)
208 {
209         struct pci_dev *pdev = adapter->pdev;
210         int bd = adapter->bd_number;
211         if (bd >= ATL1_MAX_NIC) {
212                 dev_notice(&pdev->dev, "no configuration for board#%i\n", bd);
213                 dev_notice(&pdev->dev, "using defaults for all values\n");
214         }
215         {                       /* Interrupt Moderate Timer */
216                 struct atl1_option opt = {
217                         .type = range_option,
218                         .name = "Interrupt Moderator Timer",
219                         .err = "using default of "
220                                 __MODULE_STRING(DEFAULT_INT_MOD_CNT),
221                         .def = DEFAULT_INT_MOD_CNT,
222                         .arg = {.r = {.min = MIN_INT_MOD_CNT,
223                                         .max = MAX_INT_MOD_CNT} }
224                 };
225                 int val;
226                 if (num_int_mod_timer > bd) {
227                         val = int_mod_timer[bd];
228                         atl1_validate_option(&val, &opt, pdev);
229                         adapter->imt = (u16) val;
230                 } else
231                         adapter->imt = (u16) (opt.def);
232         }
233 }
234
235 /*
236  * atl1_pci_tbl - PCI Device ID Table
237  */
238 static DEFINE_PCI_DEVICE_TABLE(atl1_pci_tbl) = {
239         {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
240         /* required last entry */
241         {0,}
242 };
243 MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
244
245 static const u32 atl1_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
246         NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
247
248 static int debug = -1;
249 module_param(debug, int, 0);
250 MODULE_PARM_DESC(debug, "Message level (0=none,...,16=all)");
251
252 /*
253  * Reset the transmit and receive units; mask and clear all interrupts.
254  * hw - Struct containing variables accessed by shared code
255  * return : 0  or  idle status (if error)
256  */
257 static s32 atl1_reset_hw(struct atl1_hw *hw)
258 {
259         struct pci_dev *pdev = hw->back->pdev;
260         struct atl1_adapter *adapter = hw->back;
261         u32 icr;
262         int i;
263
264         /*
265          * Clear Interrupt mask to stop board from generating
266          * interrupts & Clear any pending interrupt events
267          */
268         /*
269          * iowrite32(0, hw->hw_addr + REG_IMR);
270          * iowrite32(0xffffffff, hw->hw_addr + REG_ISR);
271          */
272
273         /*
274          * Issue Soft Reset to the MAC.  This will reset the chip's
275          * transmit, receive, DMA.  It will not effect
276          * the current PCI configuration.  The global reset bit is self-
277          * clearing, and should clear within a microsecond.
278          */
279         iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL);
280         ioread32(hw->hw_addr + REG_MASTER_CTRL);
281
282         iowrite16(1, hw->hw_addr + REG_PHY_ENABLE);
283         ioread16(hw->hw_addr + REG_PHY_ENABLE);
284
285         /* delay about 1ms */
286         msleep(1);
287
288         /* Wait at least 10ms for All module to be Idle */
289         for (i = 0; i < 10; i++) {
290                 icr = ioread32(hw->hw_addr + REG_IDLE_STATUS);
291                 if (!icr)
292                         break;
293                 /* delay 1 ms */
294                 msleep(1);
295                 /* FIXME: still the right way to do this? */
296                 cpu_relax();
297         }
298
299         if (icr) {
300                 if (netif_msg_hw(adapter))
301                         dev_dbg(&pdev->dev, "ICR = 0x%x\n", icr);
302                 return icr;
303         }
304
305         return 0;
306 }
307
308 /* function about EEPROM
309  *
310  * check_eeprom_exist
311  * return 0 if eeprom exist
312  */
313 static int atl1_check_eeprom_exist(struct atl1_hw *hw)
314 {
315         u32 value;
316         value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
317         if (value & SPI_FLASH_CTRL_EN_VPD) {
318                 value &= ~SPI_FLASH_CTRL_EN_VPD;
319                 iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
320         }
321
322         value = ioread16(hw->hw_addr + REG_PCIE_CAP_LIST);
323         return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
324 }
325
326 static bool atl1_read_eeprom(struct atl1_hw *hw, u32 offset, u32 *p_value)
327 {
328         int i;
329         u32 control;
330
331         if (offset & 3)
332                 /* address do not align */
333                 return false;
334
335         iowrite32(0, hw->hw_addr + REG_VPD_DATA);
336         control = (offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
337         iowrite32(control, hw->hw_addr + REG_VPD_CAP);
338         ioread32(hw->hw_addr + REG_VPD_CAP);
339
340         for (i = 0; i < 10; i++) {
341                 msleep(2);
342                 control = ioread32(hw->hw_addr + REG_VPD_CAP);
343                 if (control & VPD_CAP_VPD_FLAG)
344                         break;
345         }
346         if (control & VPD_CAP_VPD_FLAG) {
347                 *p_value = ioread32(hw->hw_addr + REG_VPD_DATA);
348                 return true;
349         }
350         /* timeout */
351         return false;
352 }
353
354 /*
355  * Reads the value from a PHY register
356  * hw - Struct containing variables accessed by shared code
357  * reg_addr - address of the PHY register to read
358  */
359 static s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data)
360 {
361         u32 val;
362         int i;
363
364         val = ((u32) (reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
365                 MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW | MDIO_CLK_25_4 <<
366                 MDIO_CLK_SEL_SHIFT;
367         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
368         ioread32(hw->hw_addr + REG_MDIO_CTRL);
369
370         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
371                 udelay(2);
372                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
373                 if (!(val & (MDIO_START | MDIO_BUSY)))
374                         break;
375         }
376         if (!(val & (MDIO_START | MDIO_BUSY))) {
377                 *phy_data = (u16) val;
378                 return 0;
379         }
380         return ATLX_ERR_PHY;
381 }
382
383 #define CUSTOM_SPI_CS_SETUP     2
384 #define CUSTOM_SPI_CLK_HI       2
385 #define CUSTOM_SPI_CLK_LO       2
386 #define CUSTOM_SPI_CS_HOLD      2
387 #define CUSTOM_SPI_CS_HI        3
388
389 static bool atl1_spi_read(struct atl1_hw *hw, u32 addr, u32 *buf)
390 {
391         int i;
392         u32 value;
393
394         iowrite32(0, hw->hw_addr + REG_SPI_DATA);
395         iowrite32(addr, hw->hw_addr + REG_SPI_ADDR);
396
397         value = SPI_FLASH_CTRL_WAIT_READY |
398             (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
399             SPI_FLASH_CTRL_CS_SETUP_SHIFT | (CUSTOM_SPI_CLK_HI &
400                                              SPI_FLASH_CTRL_CLK_HI_MASK) <<
401             SPI_FLASH_CTRL_CLK_HI_SHIFT | (CUSTOM_SPI_CLK_LO &
402                                            SPI_FLASH_CTRL_CLK_LO_MASK) <<
403             SPI_FLASH_CTRL_CLK_LO_SHIFT | (CUSTOM_SPI_CS_HOLD &
404                                            SPI_FLASH_CTRL_CS_HOLD_MASK) <<
405             SPI_FLASH_CTRL_CS_HOLD_SHIFT | (CUSTOM_SPI_CS_HI &
406                                             SPI_FLASH_CTRL_CS_HI_MASK) <<
407             SPI_FLASH_CTRL_CS_HI_SHIFT | (1 & SPI_FLASH_CTRL_INS_MASK) <<
408             SPI_FLASH_CTRL_INS_SHIFT;
409
410         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
411
412         value |= SPI_FLASH_CTRL_START;
413         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
414         ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
415
416         for (i = 0; i < 10; i++) {
417                 msleep(1);
418                 value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
419                 if (!(value & SPI_FLASH_CTRL_START))
420                         break;
421         }
422
423         if (value & SPI_FLASH_CTRL_START)
424                 return false;
425
426         *buf = ioread32(hw->hw_addr + REG_SPI_DATA);
427
428         return true;
429 }
430
431 /*
432  * get_permanent_address
433  * return 0 if get valid mac address,
434  */
435 static int atl1_get_permanent_address(struct atl1_hw *hw)
436 {
437         u32 addr[2];
438         u32 i, control;
439         u16 reg;
440         u8 eth_addr[ETH_ALEN];
441         bool key_valid;
442
443         if (is_valid_ether_addr(hw->perm_mac_addr))
444                 return 0;
445
446         /* init */
447         addr[0] = addr[1] = 0;
448
449         if (!atl1_check_eeprom_exist(hw)) {
450                 reg = 0;
451                 key_valid = false;
452                 /* Read out all EEPROM content */
453                 i = 0;
454                 while (1) {
455                         if (atl1_read_eeprom(hw, i + 0x100, &control)) {
456                                 if (key_valid) {
457                                         if (reg == REG_MAC_STA_ADDR)
458                                                 addr[0] = control;
459                                         else if (reg == (REG_MAC_STA_ADDR + 4))
460                                                 addr[1] = control;
461                                         key_valid = false;
462                                 } else if ((control & 0xff) == 0x5A) {
463                                         key_valid = true;
464                                         reg = (u16) (control >> 16);
465                                 } else
466                                         break;
467                         } else
468                                 /* read error */
469                                 break;
470                         i += 4;
471                 }
472
473                 *(u32 *) &eth_addr[2] = swab32(addr[0]);
474                 *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
475                 if (is_valid_ether_addr(eth_addr)) {
476                         memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
477                         return 0;
478                 }
479         }
480
481         /* see if SPI FLAGS exist ? */
482         addr[0] = addr[1] = 0;
483         reg = 0;
484         key_valid = false;
485         i = 0;
486         while (1) {
487                 if (atl1_spi_read(hw, i + 0x1f000, &control)) {
488                         if (key_valid) {
489                                 if (reg == REG_MAC_STA_ADDR)
490                                         addr[0] = control;
491                                 else if (reg == (REG_MAC_STA_ADDR + 4))
492                                         addr[1] = control;
493                                 key_valid = false;
494                         } else if ((control & 0xff) == 0x5A) {
495                                 key_valid = true;
496                                 reg = (u16) (control >> 16);
497                         } else
498                                 /* data end */
499                                 break;
500                 } else
501                         /* read error */
502                         break;
503                 i += 4;
504         }
505
506         *(u32 *) &eth_addr[2] = swab32(addr[0]);
507         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
508         if (is_valid_ether_addr(eth_addr)) {
509                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
510                 return 0;
511         }
512
513         /*
514          * On some motherboards, the MAC address is written by the
515          * BIOS directly to the MAC register during POST, and is
516          * not stored in eeprom.  If all else thus far has failed
517          * to fetch the permanent MAC address, try reading it directly.
518          */
519         addr[0] = ioread32(hw->hw_addr + REG_MAC_STA_ADDR);
520         addr[1] = ioread16(hw->hw_addr + (REG_MAC_STA_ADDR + 4));
521         *(u32 *) &eth_addr[2] = swab32(addr[0]);
522         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
523         if (is_valid_ether_addr(eth_addr)) {
524                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
525                 return 0;
526         }
527
528         return 1;
529 }
530
531 /*
532  * Reads the adapter's MAC address from the EEPROM
533  * hw - Struct containing variables accessed by shared code
534  */
535 static s32 atl1_read_mac_addr(struct atl1_hw *hw)
536 {
537         u16 i;
538
539         if (atl1_get_permanent_address(hw))
540                 random_ether_addr(hw->perm_mac_addr);
541
542         for (i = 0; i < ETH_ALEN; i++)
543                 hw->mac_addr[i] = hw->perm_mac_addr[i];
544         return 0;
545 }
546
547 /*
548  * Hashes an address to determine its location in the multicast table
549  * hw - Struct containing variables accessed by shared code
550  * mc_addr - the multicast address to hash
551  *
552  * atl1_hash_mc_addr
553  *  purpose
554  *      set hash value for a multicast address
555  *      hash calcu processing :
556  *          1. calcu 32bit CRC for multicast address
557  *          2. reverse crc with MSB to LSB
558  */
559 static u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr)
560 {
561         u32 crc32, value = 0;
562         int i;
563
564         crc32 = ether_crc_le(6, mc_addr);
565         for (i = 0; i < 32; i++)
566                 value |= (((crc32 >> i) & 1) << (31 - i));
567
568         return value;
569 }
570
571 /*
572  * Sets the bit in the multicast table corresponding to the hash value.
573  * hw - Struct containing variables accessed by shared code
574  * hash_value - Multicast address hash value
575  */
576 static void atl1_hash_set(struct atl1_hw *hw, u32 hash_value)
577 {
578         u32 hash_bit, hash_reg;
579         u32 mta;
580
581         /*
582          * The HASH Table  is a register array of 2 32-bit registers.
583          * It is treated like an array of 64 bits.  We want to set
584          * bit BitArray[hash_value]. So we figure out what register
585          * the bit is in, read it, OR in the new bit, then write
586          * back the new value.  The register is determined by the
587          * upper 7 bits of the hash value and the bit within that
588          * register are determined by the lower 5 bits of the value.
589          */
590         hash_reg = (hash_value >> 31) & 0x1;
591         hash_bit = (hash_value >> 26) & 0x1F;
592         mta = ioread32((hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
593         mta |= (1 << hash_bit);
594         iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
595 }
596
597 /*
598  * Writes a value to a PHY register
599  * hw - Struct containing variables accessed by shared code
600  * reg_addr - address of the PHY register to write
601  * data - data to write to the PHY
602  */
603 static s32 atl1_write_phy_reg(struct atl1_hw *hw, u32 reg_addr, u16 phy_data)
604 {
605         int i;
606         u32 val;
607
608         val = ((u32) (phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
609             (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
610             MDIO_SUP_PREAMBLE |
611             MDIO_START | MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
612         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
613         ioread32(hw->hw_addr + REG_MDIO_CTRL);
614
615         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
616                 udelay(2);
617                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
618                 if (!(val & (MDIO_START | MDIO_BUSY)))
619                         break;
620         }
621
622         if (!(val & (MDIO_START | MDIO_BUSY)))
623                 return 0;
624
625         return ATLX_ERR_PHY;
626 }
627
628 /*
629  * Make L001's PHY out of Power Saving State (bug)
630  * hw - Struct containing variables accessed by shared code
631  * when power on, L001's PHY always on Power saving State
632  * (Gigabit Link forbidden)
633  */
634 static s32 atl1_phy_leave_power_saving(struct atl1_hw *hw)
635 {
636         s32 ret;
637         ret = atl1_write_phy_reg(hw, 29, 0x0029);
638         if (ret)
639                 return ret;
640         return atl1_write_phy_reg(hw, 30, 0);
641 }
642
643 /*
644  * Resets the PHY and make all config validate
645  * hw - Struct containing variables accessed by shared code
646  *
647  * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
648  */
649 static s32 atl1_phy_reset(struct atl1_hw *hw)
650 {
651         struct pci_dev *pdev = hw->back->pdev;
652         struct atl1_adapter *adapter = hw->back;
653         s32 ret_val;
654         u16 phy_data;
655
656         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
657             hw->media_type == MEDIA_TYPE_1000M_FULL)
658                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
659         else {
660                 switch (hw->media_type) {
661                 case MEDIA_TYPE_100M_FULL:
662                         phy_data =
663                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
664                             MII_CR_RESET;
665                         break;
666                 case MEDIA_TYPE_100M_HALF:
667                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
668                         break;
669                 case MEDIA_TYPE_10M_FULL:
670                         phy_data =
671                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
672                         break;
673                 default:
674                         /* MEDIA_TYPE_10M_HALF: */
675                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
676                         break;
677                 }
678         }
679
680         ret_val = atl1_write_phy_reg(hw, MII_BMCR, phy_data);
681         if (ret_val) {
682                 u32 val;
683                 int i;
684                 /* pcie serdes link may be down! */
685                 if (netif_msg_hw(adapter))
686                         dev_dbg(&pdev->dev, "pcie phy link down\n");
687
688                 for (i = 0; i < 25; i++) {
689                         msleep(1);
690                         val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
691                         if (!(val & (MDIO_START | MDIO_BUSY)))
692                                 break;
693                 }
694
695                 if ((val & (MDIO_START | MDIO_BUSY)) != 0) {
696                         if (netif_msg_hw(adapter))
697                                 dev_warn(&pdev->dev,
698                                         "pcie link down at least 25ms\n");
699                         return ret_val;
700                 }
701         }
702         return 0;
703 }
704
705 /*
706  * Configures PHY autoneg and flow control advertisement settings
707  * hw - Struct containing variables accessed by shared code
708  */
709 static s32 atl1_phy_setup_autoneg_adv(struct atl1_hw *hw)
710 {
711         s32 ret_val;
712         s16 mii_autoneg_adv_reg;
713         s16 mii_1000t_ctrl_reg;
714
715         /* Read the MII Auto-Neg Advertisement Register (Address 4). */
716         mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
717
718         /* Read the MII 1000Base-T Control Register (Address 9). */
719         mii_1000t_ctrl_reg = MII_ATLX_CR_1000T_DEFAULT_CAP_MASK;
720
721         /*
722          * First we clear all the 10/100 mb speed bits in the Auto-Neg
723          * Advertisement Register (Address 4) and the 1000 mb speed bits in
724          * the  1000Base-T Control Register (Address 9).
725          */
726         mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
727         mii_1000t_ctrl_reg &= ~MII_ATLX_CR_1000T_SPEED_MASK;
728
729         /*
730          * Need to parse media_type  and set up
731          * the appropriate PHY registers.
732          */
733         switch (hw->media_type) {
734         case MEDIA_TYPE_AUTO_SENSOR:
735                 mii_autoneg_adv_reg |= (MII_AR_10T_HD_CAPS |
736                                         MII_AR_10T_FD_CAPS |
737                                         MII_AR_100TX_HD_CAPS |
738                                         MII_AR_100TX_FD_CAPS);
739                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
740                 break;
741
742         case MEDIA_TYPE_1000M_FULL:
743                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
744                 break;
745
746         case MEDIA_TYPE_100M_FULL:
747                 mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
748                 break;
749
750         case MEDIA_TYPE_100M_HALF:
751                 mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
752                 break;
753
754         case MEDIA_TYPE_10M_FULL:
755                 mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
756                 break;
757
758         default:
759                 mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
760                 break;
761         }
762
763         /* flow control fixed to enable all */
764         mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
765
766         hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
767         hw->mii_1000t_ctrl_reg = mii_1000t_ctrl_reg;
768
769         ret_val = atl1_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
770         if (ret_val)
771                 return ret_val;
772
773         ret_val = atl1_write_phy_reg(hw, MII_ATLX_CR, mii_1000t_ctrl_reg);
774         if (ret_val)
775                 return ret_val;
776
777         return 0;
778 }
779
780 /*
781  * Configures link settings.
782  * hw - Struct containing variables accessed by shared code
783  * Assumes the hardware has previously been reset and the
784  * transmitter and receiver are not enabled.
785  */
786 static s32 atl1_setup_link(struct atl1_hw *hw)
787 {
788         struct pci_dev *pdev = hw->back->pdev;
789         struct atl1_adapter *adapter = hw->back;
790         s32 ret_val;
791
792         /*
793          * Options:
794          *  PHY will advertise value(s) parsed from
795          *  autoneg_advertised and fc
796          *  no matter what autoneg is , We will not wait link result.
797          */
798         ret_val = atl1_phy_setup_autoneg_adv(hw);
799         if (ret_val) {
800                 if (netif_msg_link(adapter))
801                         dev_dbg(&pdev->dev,
802                                 "error setting up autonegotiation\n");
803                 return ret_val;
804         }
805         /* SW.Reset , En-Auto-Neg if needed */
806         ret_val = atl1_phy_reset(hw);
807         if (ret_val) {
808                 if (netif_msg_link(adapter))
809                         dev_dbg(&pdev->dev, "error resetting phy\n");
810                 return ret_val;
811         }
812         hw->phy_configured = true;
813         return ret_val;
814 }
815
816 static void atl1_init_flash_opcode(struct atl1_hw *hw)
817 {
818         if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
819                 /* Atmel */
820                 hw->flash_vendor = 0;
821
822         /* Init OP table */
823         iowrite8(flash_table[hw->flash_vendor].cmd_program,
824                 hw->hw_addr + REG_SPI_FLASH_OP_PROGRAM);
825         iowrite8(flash_table[hw->flash_vendor].cmd_sector_erase,
826                 hw->hw_addr + REG_SPI_FLASH_OP_SC_ERASE);
827         iowrite8(flash_table[hw->flash_vendor].cmd_chip_erase,
828                 hw->hw_addr + REG_SPI_FLASH_OP_CHIP_ERASE);
829         iowrite8(flash_table[hw->flash_vendor].cmd_rdid,
830                 hw->hw_addr + REG_SPI_FLASH_OP_RDID);
831         iowrite8(flash_table[hw->flash_vendor].cmd_wren,
832                 hw->hw_addr + REG_SPI_FLASH_OP_WREN);
833         iowrite8(flash_table[hw->flash_vendor].cmd_rdsr,
834                 hw->hw_addr + REG_SPI_FLASH_OP_RDSR);
835         iowrite8(flash_table[hw->flash_vendor].cmd_wrsr,
836                 hw->hw_addr + REG_SPI_FLASH_OP_WRSR);
837         iowrite8(flash_table[hw->flash_vendor].cmd_read,
838                 hw->hw_addr + REG_SPI_FLASH_OP_READ);
839 }
840
841 /*
842  * Performs basic configuration of the adapter.
843  * hw - Struct containing variables accessed by shared code
844  * Assumes that the controller has previously been reset and is in a
845  * post-reset uninitialized state. Initializes multicast table,
846  * and  Calls routines to setup link
847  * Leaves the transmit and receive units disabled and uninitialized.
848  */
849 static s32 atl1_init_hw(struct atl1_hw *hw)
850 {
851         u32 ret_val = 0;
852
853         /* Zero out the Multicast HASH table */
854         iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
855         /* clear the old settings from the multicast hash table */
856         iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
857
858         atl1_init_flash_opcode(hw);
859
860         if (!hw->phy_configured) {
861                 /* enable GPHY LinkChange Interrrupt */
862                 ret_val = atl1_write_phy_reg(hw, 18, 0xC00);
863                 if (ret_val)
864                         return ret_val;
865                 /* make PHY out of power-saving state */
866                 ret_val = atl1_phy_leave_power_saving(hw);
867                 if (ret_val)
868                         return ret_val;
869                 /* Call a subroutine to configure the link */
870                 ret_val = atl1_setup_link(hw);
871         }
872         return ret_val;
873 }
874
875 /*
876  * Detects the current speed and duplex settings of the hardware.
877  * hw - Struct containing variables accessed by shared code
878  * speed - Speed of the connection
879  * duplex - Duplex setting of the connection
880  */
881 static s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex)
882 {
883         struct pci_dev *pdev = hw->back->pdev;
884         struct atl1_adapter *adapter = hw->back;
885         s32 ret_val;
886         u16 phy_data;
887
888         /* ; --- Read   PHY Specific Status Register (17) */
889         ret_val = atl1_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data);
890         if (ret_val)
891                 return ret_val;
892
893         if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED))
894                 return ATLX_ERR_PHY_RES;
895
896         switch (phy_data & MII_ATLX_PSSR_SPEED) {
897         case MII_ATLX_PSSR_1000MBS:
898                 *speed = SPEED_1000;
899                 break;
900         case MII_ATLX_PSSR_100MBS:
901                 *speed = SPEED_100;
902                 break;
903         case MII_ATLX_PSSR_10MBS:
904                 *speed = SPEED_10;
905                 break;
906         default:
907                 if (netif_msg_hw(adapter))
908                         dev_dbg(&pdev->dev, "error getting speed\n");
909                 return ATLX_ERR_PHY_SPEED;
910                 break;
911         }
912         if (phy_data & MII_ATLX_PSSR_DPLX)
913                 *duplex = FULL_DUPLEX;
914         else
915                 *duplex = HALF_DUPLEX;
916
917         return 0;
918 }
919
920 static void atl1_set_mac_addr(struct atl1_hw *hw)
921 {
922         u32 value;
923         /*
924          * 00-0B-6A-F6-00-DC
925          * 0:  6AF600DC   1: 000B
926          * low dword
927          */
928         value = (((u32) hw->mac_addr[2]) << 24) |
929             (((u32) hw->mac_addr[3]) << 16) |
930             (((u32) hw->mac_addr[4]) << 8) | (((u32) hw->mac_addr[5]));
931         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
932         /* high dword */
933         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
934         iowrite32(value, (hw->hw_addr + REG_MAC_STA_ADDR) + (1 << 2));
935 }
936
937 /*
938  * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
939  * @adapter: board private structure to initialize
940  *
941  * atl1_sw_init initializes the Adapter private data structure.
942  * Fields are initialized based on PCI device information and
943  * OS network device settings (MTU size).
944  */
945 static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
946 {
947         struct atl1_hw *hw = &adapter->hw;
948         struct net_device *netdev = adapter->netdev;
949
950         hw->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
951         hw->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
952
953         adapter->wol = 0;
954         device_set_wakeup_enable(&adapter->pdev->dev, false);
955         adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
956         adapter->ict = 50000;           /* 100ms */
957         adapter->link_speed = SPEED_0;  /* hardware init */
958         adapter->link_duplex = FULL_DUPLEX;
959
960         hw->phy_configured = false;
961         hw->preamble_len = 7;
962         hw->ipgt = 0x60;
963         hw->min_ifg = 0x50;
964         hw->ipgr1 = 0x40;
965         hw->ipgr2 = 0x60;
966         hw->max_retry = 0xf;
967         hw->lcol = 0x37;
968         hw->jam_ipg = 7;
969         hw->rfd_burst = 8;
970         hw->rrd_burst = 8;
971         hw->rfd_fetch_gap = 1;
972         hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
973         hw->rx_jumbo_lkah = 1;
974         hw->rrd_ret_timer = 16;
975         hw->tpd_burst = 4;
976         hw->tpd_fetch_th = 16;
977         hw->txf_burst = 0x100;
978         hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
979         hw->tpd_fetch_gap = 1;
980         hw->rcb_value = atl1_rcb_64;
981         hw->dma_ord = atl1_dma_ord_enh;
982         hw->dmar_block = atl1_dma_req_256;
983         hw->dmaw_block = atl1_dma_req_256;
984         hw->cmb_rrd = 4;
985         hw->cmb_tpd = 4;
986         hw->cmb_rx_timer = 1;   /* about 2us */
987         hw->cmb_tx_timer = 1;   /* about 2us */
988         hw->smb_timer = 100000; /* about 200ms */
989
990         spin_lock_init(&adapter->lock);
991         spin_lock_init(&adapter->mb_lock);
992
993         return 0;
994 }
995
996 static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
997 {
998         struct atl1_adapter *adapter = netdev_priv(netdev);
999         u16 result;
1000
1001         atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
1002
1003         return result;
1004 }
1005
1006 static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
1007         int val)
1008 {
1009         struct atl1_adapter *adapter = netdev_priv(netdev);
1010
1011         atl1_write_phy_reg(&adapter->hw, reg_num, val);
1012 }
1013
1014 /*
1015  * atl1_mii_ioctl -
1016  * @netdev:
1017  * @ifreq:
1018  * @cmd:
1019  */
1020 static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1021 {
1022         struct atl1_adapter *adapter = netdev_priv(netdev);
1023         unsigned long flags;
1024         int retval;
1025
1026         if (!netif_running(netdev))
1027                 return -EINVAL;
1028
1029         spin_lock_irqsave(&adapter->lock, flags);
1030         retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
1031         spin_unlock_irqrestore(&adapter->lock, flags);
1032
1033         return retval;
1034 }
1035
1036 /*
1037  * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
1038  * @adapter: board private structure
1039  *
1040  * Return 0 on success, negative on failure
1041  */
1042 static s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
1043 {
1044         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1045         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1046         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1047         struct atl1_ring_header *ring_header = &adapter->ring_header;
1048         struct pci_dev *pdev = adapter->pdev;
1049         int size;
1050         u8 offset = 0;
1051
1052         size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
1053         tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
1054         if (unlikely(!tpd_ring->buffer_info)) {
1055                 if (netif_msg_drv(adapter))
1056                         dev_err(&pdev->dev, "kzalloc failed , size = D%d\n",
1057                                 size);
1058                 goto err_nomem;
1059         }
1060         rfd_ring->buffer_info =
1061                 (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
1062
1063         /*
1064          * real ring DMA buffer
1065          * each ring/block may need up to 8 bytes for alignment, hence the
1066          * additional 40 bytes tacked onto the end.
1067          */
1068         ring_header->size = size =
1069                 sizeof(struct tx_packet_desc) * tpd_ring->count
1070                 + sizeof(struct rx_free_desc) * rfd_ring->count
1071                 + sizeof(struct rx_return_desc) * rrd_ring->count
1072                 + sizeof(struct coals_msg_block)
1073                 + sizeof(struct stats_msg_block)
1074                 + 40;
1075
1076         ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
1077                 &ring_header->dma);
1078         if (unlikely(!ring_header->desc)) {
1079                 if (netif_msg_drv(adapter))
1080                         dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
1081                 goto err_nomem;
1082         }
1083
1084         memset(ring_header->desc, 0, ring_header->size);
1085
1086         /* init TPD ring */
1087         tpd_ring->dma = ring_header->dma;
1088         offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
1089         tpd_ring->dma += offset;
1090         tpd_ring->desc = (u8 *) ring_header->desc + offset;
1091         tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
1092
1093         /* init RFD ring */
1094         rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
1095         offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
1096         rfd_ring->dma += offset;
1097         rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
1098         rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
1099
1100
1101         /* init RRD ring */
1102         rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
1103         offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
1104         rrd_ring->dma += offset;
1105         rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
1106         rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
1107
1108
1109         /* init CMB */
1110         adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
1111         offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
1112         adapter->cmb.dma += offset;
1113         adapter->cmb.cmb = (struct coals_msg_block *)
1114                 ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
1115
1116         /* init SMB */
1117         adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
1118         offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
1119         adapter->smb.dma += offset;
1120         adapter->smb.smb = (struct stats_msg_block *)
1121                 ((u8 *) adapter->cmb.cmb +
1122                 (sizeof(struct coals_msg_block) + offset));
1123
1124         return 0;
1125
1126 err_nomem:
1127         kfree(tpd_ring->buffer_info);
1128         return -ENOMEM;
1129 }
1130
1131 static void atl1_init_ring_ptrs(struct atl1_adapter *adapter)
1132 {
1133         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1134         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1135         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1136
1137         atomic_set(&tpd_ring->next_to_use, 0);
1138         atomic_set(&tpd_ring->next_to_clean, 0);
1139
1140         rfd_ring->next_to_clean = 0;
1141         atomic_set(&rfd_ring->next_to_use, 0);
1142
1143         rrd_ring->next_to_use = 0;
1144         atomic_set(&rrd_ring->next_to_clean, 0);
1145 }
1146
1147 /*
1148  * atl1_clean_rx_ring - Free RFD Buffers
1149  * @adapter: board private structure
1150  */
1151 static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
1152 {
1153         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1154         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1155         struct atl1_buffer *buffer_info;
1156         struct pci_dev *pdev = adapter->pdev;
1157         unsigned long size;
1158         unsigned int i;
1159
1160         /* Free all the Rx ring sk_buffs */
1161         for (i = 0; i < rfd_ring->count; i++) {
1162                 buffer_info = &rfd_ring->buffer_info[i];
1163                 if (buffer_info->dma) {
1164                         pci_unmap_page(pdev, buffer_info->dma,
1165                                 buffer_info->length, PCI_DMA_FROMDEVICE);
1166                         buffer_info->dma = 0;
1167                 }
1168                 if (buffer_info->skb) {
1169                         dev_kfree_skb(buffer_info->skb);
1170                         buffer_info->skb = NULL;
1171                 }
1172         }
1173
1174         size = sizeof(struct atl1_buffer) * rfd_ring->count;
1175         memset(rfd_ring->buffer_info, 0, size);
1176
1177         /* Zero out the descriptor ring */
1178         memset(rfd_ring->desc, 0, rfd_ring->size);
1179
1180         rfd_ring->next_to_clean = 0;
1181         atomic_set(&rfd_ring->next_to_use, 0);
1182
1183         rrd_ring->next_to_use = 0;
1184         atomic_set(&rrd_ring->next_to_clean, 0);
1185 }
1186
1187 /*
1188  * atl1_clean_tx_ring - Free Tx Buffers
1189  * @adapter: board private structure
1190  */
1191 static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
1192 {
1193         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1194         struct atl1_buffer *buffer_info;
1195         struct pci_dev *pdev = adapter->pdev;
1196         unsigned long size;
1197         unsigned int i;
1198
1199         /* Free all the Tx ring sk_buffs */
1200         for (i = 0; i < tpd_ring->count; i++) {
1201                 buffer_info = &tpd_ring->buffer_info[i];
1202                 if (buffer_info->dma) {
1203                         pci_unmap_page(pdev, buffer_info->dma,
1204                                 buffer_info->length, PCI_DMA_TODEVICE);
1205                         buffer_info->dma = 0;
1206                 }
1207         }
1208
1209         for (i = 0; i < tpd_ring->count; i++) {
1210                 buffer_info = &tpd_ring->buffer_info[i];
1211                 if (buffer_info->skb) {
1212                         dev_kfree_skb_any(buffer_info->skb);
1213                         buffer_info->skb = NULL;
1214                 }
1215         }
1216
1217         size = sizeof(struct atl1_buffer) * tpd_ring->count;
1218         memset(tpd_ring->buffer_info, 0, size);
1219
1220         /* Zero out the descriptor ring */
1221         memset(tpd_ring->desc, 0, tpd_ring->size);
1222
1223         atomic_set(&tpd_ring->next_to_use, 0);
1224         atomic_set(&tpd_ring->next_to_clean, 0);
1225 }
1226
1227 /*
1228  * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1229  * @adapter: board private structure
1230  *
1231  * Free all transmit software resources
1232  */
1233 static void atl1_free_ring_resources(struct atl1_adapter *adapter)
1234 {
1235         struct pci_dev *pdev = adapter->pdev;
1236         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1237         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1238         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1239         struct atl1_ring_header *ring_header = &adapter->ring_header;
1240
1241         atl1_clean_tx_ring(adapter);
1242         atl1_clean_rx_ring(adapter);
1243
1244         kfree(tpd_ring->buffer_info);
1245         pci_free_consistent(pdev, ring_header->size, ring_header->desc,
1246                 ring_header->dma);
1247
1248         tpd_ring->buffer_info = NULL;
1249         tpd_ring->desc = NULL;
1250         tpd_ring->dma = 0;
1251
1252         rfd_ring->buffer_info = NULL;
1253         rfd_ring->desc = NULL;
1254         rfd_ring->dma = 0;
1255
1256         rrd_ring->desc = NULL;
1257         rrd_ring->dma = 0;
1258
1259         adapter->cmb.dma = 0;
1260         adapter->cmb.cmb = NULL;
1261
1262         adapter->smb.dma = 0;
1263         adapter->smb.smb = NULL;
1264 }
1265
1266 static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
1267 {
1268         u32 value;
1269         struct atl1_hw *hw = &adapter->hw;
1270         struct net_device *netdev = adapter->netdev;
1271         /* Config MAC CTRL Register */
1272         value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1273         /* duplex */
1274         if (FULL_DUPLEX == adapter->link_duplex)
1275                 value |= MAC_CTRL_DUPLX;
1276         /* speed */
1277         value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
1278                          MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1279                   MAC_CTRL_SPEED_SHIFT);
1280         /* flow control */
1281         value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1282         /* PAD & CRC */
1283         value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1284         /* preamble length */
1285         value |= (((u32) adapter->hw.preamble_len
1286                    & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1287         /* vlan */
1288         if (adapter->vlgrp)
1289                 value |= MAC_CTRL_RMV_VLAN;
1290         /* rx checksum
1291            if (adapter->rx_csum)
1292            value |= MAC_CTRL_RX_CHKSUM_EN;
1293          */
1294         /* filter mode */
1295         value |= MAC_CTRL_BC_EN;
1296         if (netdev->flags & IFF_PROMISC)
1297                 value |= MAC_CTRL_PROMIS_EN;
1298         else if (netdev->flags & IFF_ALLMULTI)
1299                 value |= MAC_CTRL_MC_ALL_EN;
1300         /* value |= MAC_CTRL_LOOPBACK; */
1301         iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
1302 }
1303
1304 static u32 atl1_check_link(struct atl1_adapter *adapter)
1305 {
1306         struct atl1_hw *hw = &adapter->hw;
1307         struct net_device *netdev = adapter->netdev;
1308         u32 ret_val;
1309         u16 speed, duplex, phy_data;
1310         int reconfig = 0;
1311
1312         /* MII_BMSR must read twice */
1313         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1314         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1315         if (!(phy_data & BMSR_LSTATUS)) {
1316                 /* link down */
1317                 if (netif_carrier_ok(netdev)) {
1318                         /* old link state: Up */
1319                         if (netif_msg_link(adapter))
1320                                 dev_info(&adapter->pdev->dev, "link is down\n");
1321                         adapter->link_speed = SPEED_0;
1322                         netif_carrier_off(netdev);
1323                 }
1324                 return 0;
1325         }
1326
1327         /* Link Up */
1328         ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
1329         if (ret_val)
1330                 return ret_val;
1331
1332         switch (hw->media_type) {
1333         case MEDIA_TYPE_1000M_FULL:
1334                 if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
1335                         reconfig = 1;
1336                 break;
1337         case MEDIA_TYPE_100M_FULL:
1338                 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
1339                         reconfig = 1;
1340                 break;
1341         case MEDIA_TYPE_100M_HALF:
1342                 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
1343                         reconfig = 1;
1344                 break;
1345         case MEDIA_TYPE_10M_FULL:
1346                 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
1347                         reconfig = 1;
1348                 break;
1349         case MEDIA_TYPE_10M_HALF:
1350                 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
1351                         reconfig = 1;
1352                 break;
1353         }
1354
1355         /* link result is our setting */
1356         if (!reconfig) {
1357                 if (adapter->link_speed != speed ||
1358                     adapter->link_duplex != duplex) {
1359                         adapter->link_speed = speed;
1360                         adapter->link_duplex = duplex;
1361                         atl1_setup_mac_ctrl(adapter);
1362                         if (netif_msg_link(adapter))
1363                                 dev_info(&adapter->pdev->dev,
1364                                         "%s link is up %d Mbps %s\n",
1365                                         netdev->name, adapter->link_speed,
1366                                         adapter->link_duplex == FULL_DUPLEX ?
1367                                         "full duplex" : "half duplex");
1368                 }
1369                 if (!netif_carrier_ok(netdev)) {
1370                         /* Link down -> Up */
1371                         netif_carrier_on(netdev);
1372                 }
1373                 return 0;
1374         }
1375
1376         /* change original link status */
1377         if (netif_carrier_ok(netdev)) {
1378                 adapter->link_speed = SPEED_0;
1379                 netif_carrier_off(netdev);
1380                 netif_stop_queue(netdev);
1381         }
1382
1383         if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
1384             hw->media_type != MEDIA_TYPE_1000M_FULL) {
1385                 switch (hw->media_type) {
1386                 case MEDIA_TYPE_100M_FULL:
1387                         phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
1388                                    MII_CR_RESET;
1389                         break;
1390                 case MEDIA_TYPE_100M_HALF:
1391                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
1392                         break;
1393                 case MEDIA_TYPE_10M_FULL:
1394                         phy_data =
1395                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
1396                         break;
1397                 default:
1398                         /* MEDIA_TYPE_10M_HALF: */
1399                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
1400                         break;
1401                 }
1402                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
1403                 return 0;
1404         }
1405
1406         /* auto-neg, insert timer to re-config phy */
1407         if (!adapter->phy_timer_pending) {
1408                 adapter->phy_timer_pending = true;
1409                 mod_timer(&adapter->phy_config_timer,
1410                           round_jiffies(jiffies + 3 * HZ));
1411         }
1412
1413         return 0;
1414 }
1415
1416 static void set_flow_ctrl_old(struct atl1_adapter *adapter)
1417 {
1418         u32 hi, lo, value;
1419
1420         /* RFD Flow Control */
1421         value = adapter->rfd_ring.count;
1422         hi = value / 16;
1423         if (hi < 2)
1424                 hi = 2;
1425         lo = value * 7 / 8;
1426
1427         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1428                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1429         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1430
1431         /* RRD Flow Control */
1432         value = adapter->rrd_ring.count;
1433         lo = value / 16;
1434         hi = value * 7 / 8;
1435         if (lo < 2)
1436                 lo = 2;
1437         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1438                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1439         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1440 }
1441
1442 static void set_flow_ctrl_new(struct atl1_hw *hw)
1443 {
1444         u32 hi, lo, value;
1445
1446         /* RXF Flow Control */
1447         value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
1448         lo = value / 16;
1449         if (lo < 192)
1450                 lo = 192;
1451         hi = value * 7 / 8;
1452         if (hi < lo)
1453                 hi = lo + 16;
1454         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1455                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1456         iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1457
1458         /* RRD Flow Control */
1459         value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
1460         lo = value / 8;
1461         hi = value * 7 / 8;
1462         if (lo < 2)
1463                 lo = 2;
1464         if (hi < lo)
1465                 hi = lo + 3;
1466         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1467                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1468         iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1469 }
1470
1471 /*
1472  * atl1_configure - Configure Transmit&Receive Unit after Reset
1473  * @adapter: board private structure
1474  *
1475  * Configure the Tx /Rx unit of the MAC after a reset.
1476  */
1477 static u32 atl1_configure(struct atl1_adapter *adapter)
1478 {
1479         struct atl1_hw *hw = &adapter->hw;
1480         u32 value;
1481
1482         /* clear interrupt status */
1483         iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
1484
1485         /* set MAC Address */
1486         value = (((u32) hw->mac_addr[2]) << 24) |
1487                 (((u32) hw->mac_addr[3]) << 16) |
1488                 (((u32) hw->mac_addr[4]) << 8) |
1489                 (((u32) hw->mac_addr[5]));
1490         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
1491         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
1492         iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
1493
1494         /* tx / rx ring */
1495
1496         /* HI base address */
1497         iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
1498                 hw->hw_addr + REG_DESC_BASE_ADDR_HI);
1499         /* LO base address */
1500         iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
1501                 hw->hw_addr + REG_DESC_RFD_ADDR_LO);
1502         iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
1503                 hw->hw_addr + REG_DESC_RRD_ADDR_LO);
1504         iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
1505                 hw->hw_addr + REG_DESC_TPD_ADDR_LO);
1506         iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
1507                 hw->hw_addr + REG_DESC_CMB_ADDR_LO);
1508         iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
1509                 hw->hw_addr + REG_DESC_SMB_ADDR_LO);
1510
1511         /* element count */
1512         value = adapter->rrd_ring.count;
1513         value <<= 16;
1514         value += adapter->rfd_ring.count;
1515         iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
1516         iowrite32(adapter->tpd_ring.count, hw->hw_addr +
1517                 REG_DESC_TPD_RING_SIZE);
1518
1519         /* Load Ptr */
1520         iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
1521
1522         /* config Mailbox */
1523         value = ((atomic_read(&adapter->tpd_ring.next_to_use)
1524                   & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
1525                 ((atomic_read(&adapter->rrd_ring.next_to_clean)
1526                 & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
1527                 ((atomic_read(&adapter->rfd_ring.next_to_use)
1528                 & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
1529         iowrite32(value, hw->hw_addr + REG_MAILBOX);
1530
1531         /* config IPG/IFG */
1532         value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
1533                  << MAC_IPG_IFG_IPGT_SHIFT) |
1534                 (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
1535                 << MAC_IPG_IFG_MIFG_SHIFT) |
1536                 (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
1537                 << MAC_IPG_IFG_IPGR1_SHIFT) |
1538                 (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
1539                 << MAC_IPG_IFG_IPGR2_SHIFT);
1540         iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
1541
1542         /* config  Half-Duplex Control */
1543         value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
1544                 (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
1545                 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
1546                 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
1547                 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
1548                 (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
1549                 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
1550         iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
1551
1552         /* set Interrupt Moderator Timer */
1553         iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
1554         iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
1555
1556         /* set Interrupt Clear Timer */
1557         iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
1558
1559         /* set max frame size hw will accept */
1560         iowrite32(hw->max_frame_size, hw->hw_addr + REG_MTU);
1561
1562         /* jumbo size & rrd retirement timer */
1563         value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
1564                  << RXQ_JMBOSZ_TH_SHIFT) |
1565                 (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
1566                 << RXQ_JMBO_LKAH_SHIFT) |
1567                 (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
1568                 << RXQ_RRD_TIMER_SHIFT);
1569         iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
1570
1571         /* Flow Control */
1572         switch (hw->dev_rev) {
1573         case 0x8001:
1574         case 0x9001:
1575         case 0x9002:
1576         case 0x9003:
1577                 set_flow_ctrl_old(adapter);
1578                 break;
1579         default:
1580                 set_flow_ctrl_new(hw);
1581                 break;
1582         }
1583
1584         /* config TXQ */
1585         value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
1586                  << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
1587                 (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
1588                 << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
1589                 (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
1590                 << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
1591                 TXQ_CTRL_EN;
1592         iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
1593
1594         /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1595         value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
1596                 << TX_JUMBO_TASK_TH_SHIFT) |
1597                 (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
1598                 << TX_TPD_MIN_IPG_SHIFT);
1599         iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
1600
1601         /* config RXQ */
1602         value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
1603                 << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
1604                 (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
1605                 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
1606                 (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
1607                 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
1608                 RXQ_CTRL_EN;
1609         iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
1610
1611         /* config DMA Engine */
1612         value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1613                 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1614                 ((((u32) hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1615                 << DMA_CTRL_DMAW_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
1616                 DMA_CTRL_DMAW_EN;
1617         value |= (u32) hw->dma_ord;
1618         if (atl1_rcb_128 == hw->rcb_value)
1619                 value |= DMA_CTRL_RCB_VALUE;
1620         iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
1621
1622         /* config CMB / SMB */
1623         value = (hw->cmb_tpd > adapter->tpd_ring.count) ?
1624                 hw->cmb_tpd : adapter->tpd_ring.count;
1625         value <<= 16;
1626         value |= hw->cmb_rrd;
1627         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
1628         value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
1629         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
1630         iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
1631
1632         /* --- enable CMB / SMB */
1633         value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
1634         iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
1635
1636         value = ioread32(adapter->hw.hw_addr + REG_ISR);
1637         if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
1638                 value = 1;      /* config failed */
1639         else
1640                 value = 0;
1641
1642         /* clear all interrupt status */
1643         iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
1644         iowrite32(0, adapter->hw.hw_addr + REG_ISR);
1645         return value;
1646 }
1647
1648 /*
1649  * atl1_pcie_patch - Patch for PCIE module
1650  */
1651 static void atl1_pcie_patch(struct atl1_adapter *adapter)
1652 {
1653         u32 value;
1654
1655         /* much vendor magic here */
1656         value = 0x6500;
1657         iowrite32(value, adapter->hw.hw_addr + 0x12FC);
1658         /* pcie flow control mode change */
1659         value = ioread32(adapter->hw.hw_addr + 0x1008);
1660         value |= 0x8000;
1661         iowrite32(value, adapter->hw.hw_addr + 0x1008);
1662 }
1663
1664 /*
1665  * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
1666  * on PCI Command register is disable.
1667  * The function enable this bit.
1668  * Brackett, 2006/03/15
1669  */
1670 static void atl1_via_workaround(struct atl1_adapter *adapter)
1671 {
1672         unsigned long value;
1673
1674         value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
1675         if (value & PCI_COMMAND_INTX_DISABLE)
1676                 value &= ~PCI_COMMAND_INTX_DISABLE;
1677         iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
1678 }
1679
1680 static void atl1_inc_smb(struct atl1_adapter *adapter)
1681 {
1682         struct net_device *netdev = adapter->netdev;
1683         struct stats_msg_block *smb = adapter->smb.smb;
1684
1685         /* Fill out the OS statistics structure */
1686         adapter->soft_stats.rx_packets += smb->rx_ok;
1687         adapter->soft_stats.tx_packets += smb->tx_ok;
1688         adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
1689         adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
1690         adapter->soft_stats.multicast += smb->rx_mcast;
1691         adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 +
1692                 smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry);
1693
1694         /* Rx Errors */
1695         adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err +
1696                 smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov +
1697                 smb->rx_rrd_ov + smb->rx_align_err);
1698         adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
1699         adapter->soft_stats.rx_length_errors += smb->rx_len_err;
1700         adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
1701         adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
1702         adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
1703                 smb->rx_rxf_ov);
1704
1705         adapter->soft_stats.rx_pause += smb->rx_pause;
1706         adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
1707         adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
1708
1709         /* Tx Errors */
1710         adapter->soft_stats.tx_errors += (smb->tx_late_col +
1711                 smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc);
1712         adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
1713         adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
1714         adapter->soft_stats.tx_window_errors += smb->tx_late_col;
1715
1716         adapter->soft_stats.excecol += smb->tx_abort_col;
1717         adapter->soft_stats.deffer += smb->tx_defer;
1718         adapter->soft_stats.scc += smb->tx_1_col;
1719         adapter->soft_stats.mcc += smb->tx_2_col;
1720         adapter->soft_stats.latecol += smb->tx_late_col;
1721         adapter->soft_stats.tx_underun += smb->tx_underrun;
1722         adapter->soft_stats.tx_trunc += smb->tx_trunc;
1723         adapter->soft_stats.tx_pause += smb->tx_pause;
1724
1725         netdev->stats.rx_packets = adapter->soft_stats.rx_packets;
1726         netdev->stats.tx_packets = adapter->soft_stats.tx_packets;
1727         netdev->stats.rx_bytes = adapter->soft_stats.rx_bytes;
1728         netdev->stats.tx_bytes = adapter->soft_stats.tx_bytes;
1729         netdev->stats.multicast = adapter->soft_stats.multicast;
1730         netdev->stats.collisions = adapter->soft_stats.collisions;
1731         netdev->stats.rx_errors = adapter->soft_stats.rx_errors;
1732         netdev->stats.rx_over_errors =
1733                 adapter->soft_stats.rx_missed_errors;
1734         netdev->stats.rx_length_errors =
1735                 adapter->soft_stats.rx_length_errors;
1736         netdev->stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
1737         netdev->stats.rx_frame_errors =
1738                 adapter->soft_stats.rx_frame_errors;
1739         netdev->stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
1740         netdev->stats.rx_missed_errors =
1741                 adapter->soft_stats.rx_missed_errors;
1742         netdev->stats.tx_errors = adapter->soft_stats.tx_errors;
1743         netdev->stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
1744         netdev->stats.tx_aborted_errors =
1745                 adapter->soft_stats.tx_aborted_errors;
1746         netdev->stats.tx_window_errors =
1747                 adapter->soft_stats.tx_window_errors;
1748         netdev->stats.tx_carrier_errors =
1749                 adapter->soft_stats.tx_carrier_errors;
1750 }
1751
1752 static void atl1_update_mailbox(struct atl1_adapter *adapter)
1753 {
1754         unsigned long flags;
1755         u32 tpd_next_to_use;
1756         u32 rfd_next_to_use;
1757         u32 rrd_next_to_clean;
1758         u32 value;
1759
1760         spin_lock_irqsave(&adapter->mb_lock, flags);
1761
1762         tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1763         rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
1764         rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
1765
1766         value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1767                 MB_RFD_PROD_INDX_SHIFT) |
1768                 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1769                 MB_RRD_CONS_INDX_SHIFT) |
1770                 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1771                 MB_TPD_PROD_INDX_SHIFT);
1772         iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1773
1774         spin_unlock_irqrestore(&adapter->mb_lock, flags);
1775 }
1776
1777 static void atl1_clean_alloc_flag(struct atl1_adapter *adapter,
1778         struct rx_return_desc *rrd, u16 offset)
1779 {
1780         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1781
1782         while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) {
1783                 rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0;
1784                 if (++rfd_ring->next_to_clean == rfd_ring->count) {
1785                         rfd_ring->next_to_clean = 0;
1786                 }
1787         }
1788 }
1789
1790 static void atl1_update_rfd_index(struct atl1_adapter *adapter,
1791         struct rx_return_desc *rrd)
1792 {
1793         u16 num_buf;
1794
1795         num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) /
1796                 adapter->rx_buffer_len;
1797         if (rrd->num_buf == num_buf)
1798                 /* clean alloc flag for bad rrd */
1799                 atl1_clean_alloc_flag(adapter, rrd, num_buf);
1800 }
1801
1802 static void atl1_rx_checksum(struct atl1_adapter *adapter,
1803         struct rx_return_desc *rrd, struct sk_buff *skb)
1804 {
1805         struct pci_dev *pdev = adapter->pdev;
1806
1807         /*
1808          * The L1 hardware contains a bug that erroneously sets the
1809          * PACKET_FLAG_ERR and ERR_FLAG_L4_CHKSUM bits whenever a
1810          * fragmented IP packet is received, even though the packet
1811          * is perfectly valid and its checksum is correct. There's
1812          * no way to distinguish between one of these good packets
1813          * and a packet that actually contains a TCP/UDP checksum
1814          * error, so all we can do is allow it to be handed up to
1815          * the higher layers and let it be sorted out there.
1816          */
1817
1818         skb_checksum_none_assert(skb);
1819
1820         if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1821                 if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
1822                                         ERR_FLAG_CODE | ERR_FLAG_OV)) {
1823                         adapter->hw_csum_err++;
1824                         if (netif_msg_rx_err(adapter))
1825                                 dev_printk(KERN_DEBUG, &pdev->dev,
1826                                         "rx checksum error\n");
1827                         return;
1828                 }
1829         }
1830
1831         /* not IPv4 */
1832         if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
1833                 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
1834                 return;
1835
1836         /* IPv4 packet */
1837         if (likely(!(rrd->err_flg &
1838                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
1839                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1840                 adapter->hw_csum_good++;
1841                 return;
1842         }
1843 }
1844
1845 /*
1846  * atl1_alloc_rx_buffers - Replace used receive buffers
1847  * @adapter: address of board private structure
1848  */
1849 static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
1850 {
1851         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1852         struct pci_dev *pdev = adapter->pdev;
1853         struct page *page;
1854         unsigned long offset;
1855         struct atl1_buffer *buffer_info, *next_info;
1856         struct sk_buff *skb;
1857         u16 num_alloc = 0;
1858         u16 rfd_next_to_use, next_next;
1859         struct rx_free_desc *rfd_desc;
1860
1861         next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
1862         if (++next_next == rfd_ring->count)
1863                 next_next = 0;
1864         buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1865         next_info = &rfd_ring->buffer_info[next_next];
1866
1867         while (!buffer_info->alloced && !next_info->alloced) {
1868                 if (buffer_info->skb) {
1869                         buffer_info->alloced = 1;
1870                         goto next;
1871                 }
1872
1873                 rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
1874
1875                 skb = netdev_alloc_skb_ip_align(adapter->netdev,
1876                                                 adapter->rx_buffer_len);
1877                 if (unlikely(!skb)) {
1878                         /* Better luck next round */
1879                         adapter->netdev->stats.rx_dropped++;
1880                         break;
1881                 }
1882
1883                 buffer_info->alloced = 1;
1884                 buffer_info->skb = skb;
1885                 buffer_info->length = (u16) adapter->rx_buffer_len;
1886                 page = virt_to_page(skb->data);
1887                 offset = (unsigned long)skb->data & ~PAGE_MASK;
1888                 buffer_info->dma = pci_map_page(pdev, page, offset,
1889                                                 adapter->rx_buffer_len,
1890                                                 PCI_DMA_FROMDEVICE);
1891                 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1892                 rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
1893                 rfd_desc->coalese = 0;
1894
1895 next:
1896                 rfd_next_to_use = next_next;
1897                 if (unlikely(++next_next == rfd_ring->count))
1898                         next_next = 0;
1899
1900                 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1901                 next_info = &rfd_ring->buffer_info[next_next];
1902                 num_alloc++;
1903         }
1904
1905         if (num_alloc) {
1906                 /*
1907                  * Force memory writes to complete before letting h/w
1908                  * know there are new descriptors to fetch.  (Only
1909                  * applicable for weak-ordered memory model archs,
1910                  * such as IA-64).
1911                  */
1912                 wmb();
1913                 atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
1914         }
1915         return num_alloc;
1916 }
1917
1918 static void atl1_intr_rx(struct atl1_adapter *adapter)
1919 {
1920         int i, count;
1921         u16 length;
1922         u16 rrd_next_to_clean;
1923         u32 value;
1924         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1925         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1926         struct atl1_buffer *buffer_info;
1927         struct rx_return_desc *rrd;
1928         struct sk_buff *skb;
1929
1930         count = 0;
1931
1932         rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
1933
1934         while (1) {
1935                 rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
1936                 i = 1;
1937                 if (likely(rrd->xsz.valid)) {   /* packet valid */
1938 chk_rrd:
1939                         /* check rrd status */
1940                         if (likely(rrd->num_buf == 1))
1941                                 goto rrd_ok;
1942                         else if (netif_msg_rx_err(adapter)) {
1943                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1944                                         "unexpected RRD buffer count\n");
1945                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1946                                         "rx_buf_len = %d\n",
1947                                         adapter->rx_buffer_len);
1948                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1949                                         "RRD num_buf = %d\n",
1950                                         rrd->num_buf);
1951                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1952                                         "RRD pkt_len = %d\n",
1953                                         rrd->xsz.xsum_sz.pkt_size);
1954                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1955                                         "RRD pkt_flg = 0x%08X\n",
1956                                         rrd->pkt_flg);
1957                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1958                                         "RRD err_flg = 0x%08X\n",
1959                                         rrd->err_flg);
1960                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1961                                         "RRD vlan_tag = 0x%08X\n",
1962                                         rrd->vlan_tag);
1963                         }
1964
1965                         /* rrd seems to be bad */
1966                         if (unlikely(i-- > 0)) {
1967                                 /* rrd may not be DMAed completely */
1968                                 udelay(1);
1969                                 goto chk_rrd;
1970                         }
1971                         /* bad rrd */
1972                         if (netif_msg_rx_err(adapter))
1973                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1974                                         "bad RRD\n");
1975                         /* see if update RFD index */
1976                         if (rrd->num_buf > 1)
1977                                 atl1_update_rfd_index(adapter, rrd);
1978
1979                         /* update rrd */
1980                         rrd->xsz.valid = 0;
1981                         if (++rrd_next_to_clean == rrd_ring->count)
1982                                 rrd_next_to_clean = 0;
1983                         count++;
1984                         continue;
1985                 } else {        /* current rrd still not be updated */
1986
1987                         break;
1988                 }
1989 rrd_ok:
1990                 /* clean alloc flag for bad rrd */
1991                 atl1_clean_alloc_flag(adapter, rrd, 0);
1992
1993                 buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
1994                 if (++rfd_ring->next_to_clean == rfd_ring->count)
1995                         rfd_ring->next_to_clean = 0;
1996
1997                 /* update rrd next to clean */
1998                 if (++rrd_next_to_clean == rrd_ring->count)
1999                         rrd_next_to_clean = 0;
2000                 count++;
2001
2002                 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
2003                         if (!(rrd->err_flg &
2004                                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
2005                                 | ERR_FLAG_LEN))) {
2006                                 /* packet error, don't need upstream */
2007                                 buffer_info->alloced = 0;
2008                                 rrd->xsz.valid = 0;
2009                                 continue;
2010                         }
2011                 }
2012
2013                 /* Good Receive */
2014                 pci_unmap_page(adapter->pdev, buffer_info->dma,
2015                                buffer_info->length, PCI_DMA_FROMDEVICE);
2016                 buffer_info->dma = 0;
2017                 skb = buffer_info->skb;
2018                 length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
2019
2020                 skb_put(skb, length - ETH_FCS_LEN);
2021
2022                 /* Receive Checksum Offload */
2023                 atl1_rx_checksum(adapter, rrd, skb);
2024                 skb->protocol = eth_type_trans(skb, adapter->netdev);
2025
2026                 if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
2027                         u16 vlan_tag = (rrd->vlan_tag >> 4) |
2028                                         ((rrd->vlan_tag & 7) << 13) |
2029                                         ((rrd->vlan_tag & 8) << 9);
2030                         vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
2031                 } else
2032                         netif_rx(skb);
2033
2034                 /* let protocol layer free skb */
2035                 buffer_info->skb = NULL;
2036                 buffer_info->alloced = 0;
2037                 rrd->xsz.valid = 0;
2038         }
2039
2040         atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
2041
2042         atl1_alloc_rx_buffers(adapter);
2043
2044         /* update mailbox ? */
2045         if (count) {
2046                 u32 tpd_next_to_use;
2047                 u32 rfd_next_to_use;
2048
2049                 spin_lock(&adapter->mb_lock);
2050
2051                 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
2052                 rfd_next_to_use =
2053                     atomic_read(&adapter->rfd_ring.next_to_use);
2054                 rrd_next_to_clean =
2055                     atomic_read(&adapter->rrd_ring.next_to_clean);
2056                 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
2057                         MB_RFD_PROD_INDX_SHIFT) |
2058                         ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
2059                         MB_RRD_CONS_INDX_SHIFT) |
2060                         ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
2061                         MB_TPD_PROD_INDX_SHIFT);
2062                 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
2063                 spin_unlock(&adapter->mb_lock);
2064         }
2065 }
2066
2067 static void atl1_intr_tx(struct atl1_adapter *adapter)
2068 {
2069         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2070         struct atl1_buffer *buffer_info;
2071         u16 sw_tpd_next_to_clean;
2072         u16 cmb_tpd_next_to_clean;
2073
2074         sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2075         cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
2076
2077         while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
2078                 struct tx_packet_desc *tpd;
2079
2080                 tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
2081                 buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
2082                 if (buffer_info->dma) {
2083                         pci_unmap_page(adapter->pdev, buffer_info->dma,
2084                                        buffer_info->length, PCI_DMA_TODEVICE);
2085                         buffer_info->dma = 0;
2086                 }
2087
2088                 if (buffer_info->skb) {
2089                         dev_kfree_skb_irq(buffer_info->skb);
2090                         buffer_info->skb = NULL;
2091                 }
2092
2093                 if (++sw_tpd_next_to_clean == tpd_ring->count)
2094                         sw_tpd_next_to_clean = 0;
2095         }
2096         atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
2097
2098         if (netif_queue_stopped(adapter->netdev) &&
2099             netif_carrier_ok(adapter->netdev))
2100                 netif_wake_queue(adapter->netdev);
2101 }
2102
2103 static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)
2104 {
2105         u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2106         u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
2107         return (next_to_clean > next_to_use) ?
2108                 next_to_clean - next_to_use - 1 :
2109                 tpd_ring->count + next_to_clean - next_to_use - 1;
2110 }
2111
2112 static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
2113         struct tx_packet_desc *ptpd)
2114 {
2115         u8 hdr_len, ip_off;
2116         u32 real_len;
2117         int err;
2118
2119         if (skb_shinfo(skb)->gso_size) {
2120                 if (skb_header_cloned(skb)) {
2121                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2122                         if (unlikely(err))
2123                                 return -1;
2124                 }
2125
2126                 if (skb->protocol == htons(ETH_P_IP)) {
2127                         struct iphdr *iph = ip_hdr(skb);
2128
2129                         real_len = (((unsigned char *)iph - skb->data) +
2130                                 ntohs(iph->tot_len));
2131                         if (real_len < skb->len)
2132                                 pskb_trim(skb, real_len);
2133                         hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2134                         if (skb->len == hdr_len) {
2135                                 iph->check = 0;
2136                                 tcp_hdr(skb)->check =
2137                                         ~csum_tcpudp_magic(iph->saddr,
2138                                         iph->daddr, tcp_hdrlen(skb),
2139                                         IPPROTO_TCP, 0);
2140                                 ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2141                                         TPD_IPHL_SHIFT;
2142                                 ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2143                                         TPD_TCPHDRLEN_MASK) <<
2144                                         TPD_TCPHDRLEN_SHIFT;
2145                                 ptpd->word3 |= 1 << TPD_IP_CSUM_SHIFT;
2146                                 ptpd->word3 |= 1 << TPD_TCP_CSUM_SHIFT;
2147                                 return 1;
2148                         }
2149
2150                         iph->check = 0;
2151                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2152                                         iph->daddr, 0, IPPROTO_TCP, 0);
2153                         ip_off = (unsigned char *)iph -
2154                                 (unsigned char *) skb_network_header(skb);
2155                         if (ip_off == 8) /* 802.3-SNAP frame */
2156                                 ptpd->word3 |= 1 << TPD_ETHTYPE_SHIFT;
2157                         else if (ip_off != 0)
2158                                 return -2;
2159
2160                         ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2161                                 TPD_IPHL_SHIFT;
2162                         ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2163                                 TPD_TCPHDRLEN_MASK) << TPD_TCPHDRLEN_SHIFT;
2164                         ptpd->word3 |= (skb_shinfo(skb)->gso_size &
2165                                 TPD_MSS_MASK) << TPD_MSS_SHIFT;
2166                         ptpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
2167                         return 3;
2168                 }
2169         }
2170         return false;
2171 }
2172
2173 static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
2174         struct tx_packet_desc *ptpd)
2175 {
2176         u8 css, cso;
2177
2178         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2179                 css = skb_checksum_start_offset(skb);
2180                 cso = css + (u8) skb->csum_offset;
2181                 if (unlikely(css & 0x1)) {
2182                         /* L1 hardware requires an even number here */
2183                         if (netif_msg_tx_err(adapter))
2184                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2185                                         "payload offset not an even number\n");
2186                         return -1;
2187                 }
2188                 ptpd->word3 |= (css & TPD_PLOADOFFSET_MASK) <<
2189                         TPD_PLOADOFFSET_SHIFT;
2190                 ptpd->word3 |= (cso & TPD_CCSUMOFFSET_MASK) <<
2191                         TPD_CCSUMOFFSET_SHIFT;
2192                 ptpd->word3 |= 1 << TPD_CUST_CSUM_EN_SHIFT;
2193                 return true;
2194         }
2195         return 0;
2196 }
2197
2198 static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
2199         struct tx_packet_desc *ptpd)
2200 {
2201         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2202         struct atl1_buffer *buffer_info;
2203         u16 buf_len = skb->len;
2204         struct page *page;
2205         unsigned long offset;
2206         unsigned int nr_frags;
2207         unsigned int f;
2208         int retval;
2209         u16 next_to_use;
2210         u16 data_len;
2211         u8 hdr_len;
2212
2213         buf_len -= skb->data_len;
2214         nr_frags = skb_shinfo(skb)->nr_frags;
2215         next_to_use = atomic_read(&tpd_ring->next_to_use);
2216         buffer_info = &tpd_ring->buffer_info[next_to_use];
2217         BUG_ON(buffer_info->skb);
2218         /* put skb in last TPD */
2219         buffer_info->skb = NULL;
2220
2221         retval = (ptpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
2222         if (retval) {
2223                 /* TSO */
2224                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2225                 buffer_info->length = hdr_len;
2226                 page = virt_to_page(skb->data);
2227                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2228                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2229                                                 offset, hdr_len,
2230                                                 PCI_DMA_TODEVICE);
2231
2232                 if (++next_to_use == tpd_ring->count)
2233                         next_to_use = 0;
2234
2235                 if (buf_len > hdr_len) {
2236                         int i, nseg;
2237
2238                         data_len = buf_len - hdr_len;
2239                         nseg = (data_len + ATL1_MAX_TX_BUF_LEN - 1) /
2240                                 ATL1_MAX_TX_BUF_LEN;
2241                         for (i = 0; i < nseg; i++) {
2242                                 buffer_info =
2243                                     &tpd_ring->buffer_info[next_to_use];
2244                                 buffer_info->skb = NULL;
2245                                 buffer_info->length =
2246                                     (ATL1_MAX_TX_BUF_LEN >=
2247                                      data_len) ? ATL1_MAX_TX_BUF_LEN : data_len;
2248                                 data_len -= buffer_info->length;
2249                                 page = virt_to_page(skb->data +
2250                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN));
2251                                 offset = (unsigned long)(skb->data +
2252                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN)) &
2253                                         ~PAGE_MASK;
2254                                 buffer_info->dma = pci_map_page(adapter->pdev,
2255                                         page, offset, buffer_info->length,
2256                                         PCI_DMA_TODEVICE);
2257                                 if (++next_to_use == tpd_ring->count)
2258                                         next_to_use = 0;
2259                         }
2260                 }
2261         } else {
2262                 /* not TSO */
2263                 buffer_info->length = buf_len;
2264                 page = virt_to_page(skb->data);
2265                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2266                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2267                         offset, buf_len, PCI_DMA_TODEVICE);
2268                 if (++next_to_use == tpd_ring->count)
2269                         next_to_use = 0;
2270         }
2271
2272         for (f = 0; f < nr_frags; f++) {
2273                 struct skb_frag_struct *frag;
2274                 u16 i, nseg;
2275
2276                 frag = &skb_shinfo(skb)->frags[f];
2277                 buf_len = frag->size;
2278
2279                 nseg = (buf_len + ATL1_MAX_TX_BUF_LEN - 1) /
2280                         ATL1_MAX_TX_BUF_LEN;
2281                 for (i = 0; i < nseg; i++) {
2282                         buffer_info = &tpd_ring->buffer_info[next_to_use];
2283                         BUG_ON(buffer_info->skb);
2284
2285                         buffer_info->skb = NULL;
2286                         buffer_info->length = (buf_len > ATL1_MAX_TX_BUF_LEN) ?
2287                                 ATL1_MAX_TX_BUF_LEN : buf_len;
2288                         buf_len -= buffer_info->length;
2289                         buffer_info->dma = pci_map_page(adapter->pdev,
2290                                 frag->page,
2291                                 frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
2292                                 buffer_info->length, PCI_DMA_TODEVICE);
2293
2294                         if (++next_to_use == tpd_ring->count)
2295                                 next_to_use = 0;
2296                 }
2297         }
2298
2299         /* last tpd's buffer-info */
2300         buffer_info->skb = skb;
2301 }
2302
2303 static void atl1_tx_queue(struct atl1_adapter *adapter, u16 count,
2304        struct tx_packet_desc *ptpd)
2305 {
2306         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2307         struct atl1_buffer *buffer_info;
2308         struct tx_packet_desc *tpd;
2309         u16 j;
2310         u32 val;
2311         u16 next_to_use = (u16) atomic_read(&tpd_ring->next_to_use);
2312
2313         for (j = 0; j < count; j++) {
2314                 buffer_info = &tpd_ring->buffer_info[next_to_use];
2315                 tpd = ATL1_TPD_DESC(&adapter->tpd_ring, next_to_use);
2316                 if (tpd != ptpd)
2317                         memcpy(tpd, ptpd, sizeof(struct tx_packet_desc));
2318                 tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2319                 tpd->word2 &= ~(TPD_BUFLEN_MASK << TPD_BUFLEN_SHIFT);
2320                 tpd->word2 |= (cpu_to_le16(buffer_info->length) &
2321                         TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT;
2322
2323                 /*
2324                  * if this is the first packet in a TSO chain, set
2325                  * TPD_HDRFLAG, otherwise, clear it.
2326                  */
2327                 val = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) &
2328                         TPD_SEGMENT_EN_MASK;
2329                 if (val) {
2330                         if (!j)
2331                                 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
2332                         else
2333                                 tpd->word3 &= ~(1 << TPD_HDRFLAG_SHIFT);
2334                 }
2335
2336                 if (j == (count - 1))
2337                         tpd->word3 |= 1 << TPD_EOP_SHIFT;
2338
2339                 if (++next_to_use == tpd_ring->count)
2340                         next_to_use = 0;
2341         }
2342         /*
2343          * Force memory writes to complete before letting h/w
2344          * know there are new descriptors to fetch.  (Only
2345          * applicable for weak-ordered memory model archs,
2346          * such as IA-64).
2347          */
2348         wmb();
2349
2350         atomic_set(&tpd_ring->next_to_use, next_to_use);
2351 }
2352
2353 static netdev_tx_t atl1_xmit_frame(struct sk_buff *skb,
2354                                          struct net_device *netdev)
2355 {
2356         struct atl1_adapter *adapter = netdev_priv(netdev);
2357         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2358         int len;
2359         int tso;
2360         int count = 1;
2361         int ret_val;
2362         struct tx_packet_desc *ptpd;
2363         u16 frag_size;
2364         u16 vlan_tag;
2365         unsigned int nr_frags = 0;
2366         unsigned int mss = 0;
2367         unsigned int f;
2368         unsigned int proto_hdr_len;
2369
2370         len = skb_headlen(skb);
2371
2372         if (unlikely(skb->len <= 0)) {
2373                 dev_kfree_skb_any(skb);
2374                 return NETDEV_TX_OK;
2375         }
2376
2377         nr_frags = skb_shinfo(skb)->nr_frags;
2378         for (f = 0; f < nr_frags; f++) {
2379                 frag_size = skb_shinfo(skb)->frags[f].size;
2380                 if (frag_size)
2381                         count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) /
2382                                 ATL1_MAX_TX_BUF_LEN;
2383         }
2384
2385         mss = skb_shinfo(skb)->gso_size;
2386         if (mss) {
2387                 if (skb->protocol == htons(ETH_P_IP)) {
2388                         proto_hdr_len = (skb_transport_offset(skb) +
2389                                          tcp_hdrlen(skb));
2390                         if (unlikely(proto_hdr_len > len)) {
2391                                 dev_kfree_skb_any(skb);
2392                                 return NETDEV_TX_OK;
2393                         }
2394                         /* need additional TPD ? */
2395                         if (proto_hdr_len != len)
2396                                 count += (len - proto_hdr_len +
2397                                         ATL1_MAX_TX_BUF_LEN - 1) /
2398                                         ATL1_MAX_TX_BUF_LEN;
2399                 }
2400         }
2401
2402         if (atl1_tpd_avail(&adapter->tpd_ring) < count) {
2403                 /* not enough descriptors */
2404                 netif_stop_queue(netdev);
2405                 if (netif_msg_tx_queued(adapter))
2406                         dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2407                                 "tx busy\n");
2408                 return NETDEV_TX_BUSY;
2409         }
2410
2411         ptpd = ATL1_TPD_DESC(tpd_ring,
2412                 (u16) atomic_read(&tpd_ring->next_to_use));
2413         memset(ptpd, 0, sizeof(struct tx_packet_desc));
2414
2415         if (vlan_tx_tag_present(skb)) {
2416                 vlan_tag = vlan_tx_tag_get(skb);
2417                 vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
2418                         ((vlan_tag >> 9) & 0x8);
2419                 ptpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
2420                 ptpd->word2 |= (vlan_tag & TPD_VLANTAG_MASK) <<
2421                         TPD_VLANTAG_SHIFT;
2422         }
2423
2424         tso = atl1_tso(adapter, skb, ptpd);
2425         if (tso < 0) {
2426                 dev_kfree_skb_any(skb);
2427                 return NETDEV_TX_OK;
2428         }
2429
2430         if (!tso) {
2431                 ret_val = atl1_tx_csum(adapter, skb, ptpd);
2432                 if (ret_val < 0) {
2433                         dev_kfree_skb_any(skb);
2434                         return NETDEV_TX_OK;
2435                 }
2436         }
2437
2438         atl1_tx_map(adapter, skb, ptpd);
2439         atl1_tx_queue(adapter, count, ptpd);
2440         atl1_update_mailbox(adapter);
2441         mmiowb();
2442         return NETDEV_TX_OK;
2443 }
2444
2445 /*
2446  * atl1_intr - Interrupt Handler
2447  * @irq: interrupt number
2448  * @data: pointer to a network interface device structure
2449  * @pt_regs: CPU registers structure
2450  */
2451 static irqreturn_t atl1_intr(int irq, void *data)
2452 {
2453         struct atl1_adapter *adapter = netdev_priv(data);
2454         u32 status;
2455         int max_ints = 10;
2456
2457         status = adapter->cmb.cmb->int_stats;
2458         if (!status)
2459                 return IRQ_NONE;
2460
2461         do {
2462                 /* clear CMB interrupt status at once */
2463                 adapter->cmb.cmb->int_stats = 0;
2464
2465                 if (status & ISR_GPHY)  /* clear phy status */
2466                         atlx_clear_phy_int(adapter);
2467
2468                 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
2469                 iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
2470
2471                 /* check if SMB intr */
2472                 if (status & ISR_SMB)
2473                         atl1_inc_smb(adapter);
2474
2475                 /* check if PCIE PHY Link down */
2476                 if (status & ISR_PHY_LINKDOWN) {
2477                         if (netif_msg_intr(adapter))
2478                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2479                                         "pcie phy link down %x\n", status);
2480                         if (netif_running(adapter->netdev)) {   /* reset MAC */
2481                                 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2482                                 schedule_work(&adapter->pcie_dma_to_rst_task);
2483                                 return IRQ_HANDLED;
2484                         }
2485                 }
2486
2487                 /* check if DMA read/write error ? */
2488                 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
2489                         if (netif_msg_intr(adapter))
2490                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2491                                         "pcie DMA r/w error (status = 0x%x)\n",
2492                                         status);
2493                         iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2494                         schedule_work(&adapter->pcie_dma_to_rst_task);
2495                         return IRQ_HANDLED;
2496                 }
2497
2498                 /* link event */
2499                 if (status & ISR_GPHY) {
2500                         adapter->soft_stats.tx_carrier_errors++;
2501                         atl1_check_for_link(adapter);
2502                 }
2503
2504                 /* transmit event */
2505                 if (status & ISR_CMB_TX)
2506                         atl1_intr_tx(adapter);
2507
2508                 /* rx exception */
2509                 if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2510                         ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2511                         ISR_HOST_RRD_OV | ISR_CMB_RX))) {
2512                         if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2513                                 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2514                                 ISR_HOST_RRD_OV))
2515                                 if (netif_msg_intr(adapter))
2516                                         dev_printk(KERN_DEBUG,
2517                                                 &adapter->pdev->dev,
2518                                                 "rx exception, ISR = 0x%x\n",
2519                                                 status);
2520                         atl1_intr_rx(adapter);
2521                 }
2522
2523                 if (--max_ints < 0)
2524                         break;
2525
2526         } while ((status = adapter->cmb.cmb->int_stats));
2527
2528         /* re-enable Interrupt */
2529         iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
2530         return IRQ_HANDLED;
2531 }
2532
2533
2534 /*
2535  * atl1_phy_config - Timer Call-back
2536  * @data: pointer to netdev cast into an unsigned long
2537  */
2538 static void atl1_phy_config(unsigned long data)
2539 {
2540         struct atl1_adapter *adapter = (struct atl1_adapter *)data;
2541         struct atl1_hw *hw = &adapter->hw;
2542         unsigned long flags;
2543
2544         spin_lock_irqsave(&adapter->lock, flags);
2545         adapter->phy_timer_pending = false;
2546         atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
2547         atl1_write_phy_reg(hw, MII_ATLX_CR, hw->mii_1000t_ctrl_reg);
2548         atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
2549         spin_unlock_irqrestore(&adapter->lock, flags);
2550 }
2551
2552 /*
2553  * Orphaned vendor comment left intact here:
2554  * <vendor comment>
2555  * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2556  * will assert. We do soft reset <0x1400=1> according
2557  * with the SPEC. BUT, it seemes that PCIE or DMA
2558  * state-machine will not be reset. DMAR_TO_INT will
2559  * assert again and again.
2560  * </vendor comment>
2561  */
2562
2563 static int atl1_reset(struct atl1_adapter *adapter)
2564 {
2565         int ret;
2566         ret = atl1_reset_hw(&adapter->hw);
2567         if (ret)
2568                 return ret;
2569         return atl1_init_hw(&adapter->hw);
2570 }
2571
2572 static s32 atl1_up(struct atl1_adapter *adapter)
2573 {
2574         struct net_device *netdev = adapter->netdev;
2575         int err;
2576         int irq_flags = IRQF_SAMPLE_RANDOM;
2577
2578         /* hardware has been reset, we need to reload some things */
2579         atlx_set_multi(netdev);
2580         atl1_init_ring_ptrs(adapter);
2581         atlx_restore_vlan(adapter);
2582         err = atl1_alloc_rx_buffers(adapter);
2583         if (unlikely(!err))
2584                 /* no RX BUFFER allocated */
2585                 return -ENOMEM;
2586
2587         if (unlikely(atl1_configure(adapter))) {
2588                 err = -EIO;
2589                 goto err_up;
2590         }
2591
2592         err = pci_enable_msi(adapter->pdev);
2593         if (err) {
2594                 if (netif_msg_ifup(adapter))
2595                         dev_info(&adapter->pdev->dev,
2596                                 "Unable to enable MSI: %d\n", err);
2597                 irq_flags |= IRQF_SHARED;
2598         }
2599
2600         err = request_irq(adapter->pdev->irq, atl1_intr, irq_flags,
2601                         netdev->name, netdev);
2602         if (unlikely(err))
2603                 goto err_up;
2604
2605         atlx_irq_enable(adapter);
2606         atl1_check_link(adapter);
2607         netif_start_queue(netdev);
2608         return 0;
2609
2610 err_up:
2611         pci_disable_msi(adapter->pdev);
2612         /* free rx_buffers */
2613         atl1_clean_rx_ring(adapter);
2614         return err;
2615 }
2616
2617 static void atl1_down(struct atl1_adapter *adapter)
2618 {
2619         struct net_device *netdev = adapter->netdev;
2620
2621         netif_stop_queue(netdev);
2622         del_timer_sync(&adapter->phy_config_timer);
2623         adapter->phy_timer_pending = false;
2624
2625         atlx_irq_disable(adapter);
2626         free_irq(adapter->pdev->irq, netdev);
2627         pci_disable_msi(adapter->pdev);
2628         atl1_reset_hw(&adapter->hw);
2629         adapter->cmb.cmb->int_stats = 0;
2630
2631         adapter->link_speed = SPEED_0;
2632         adapter->link_duplex = -1;
2633         netif_carrier_off(netdev);
2634
2635         atl1_clean_tx_ring(adapter);
2636         atl1_clean_rx_ring(adapter);
2637 }
2638
2639 static void atl1_tx_timeout_task(struct work_struct *work)
2640 {
2641         struct atl1_adapter *adapter =
2642                 container_of(work, struct atl1_adapter, tx_timeout_task);
2643         struct net_device *netdev = adapter->netdev;
2644
2645         netif_device_detach(netdev);
2646         atl1_down(adapter);
2647         atl1_up(adapter);
2648         netif_device_attach(netdev);
2649 }
2650
2651 /*
2652  * atl1_change_mtu - Change the Maximum Transfer Unit
2653  * @netdev: network interface device structure
2654  * @new_mtu: new value for maximum frame size
2655  *
2656  * Returns 0 on success, negative on failure
2657  */
2658 static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
2659 {
2660         struct atl1_adapter *adapter = netdev_priv(netdev);
2661         int old_mtu = netdev->mtu;
2662         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2663
2664         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2665             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2666                 if (netif_msg_link(adapter))
2667                         dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
2668                 return -EINVAL;
2669         }
2670
2671         adapter->hw.max_frame_size = max_frame;
2672         adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
2673         adapter->rx_buffer_len = (max_frame + 7) & ~7;
2674         adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
2675
2676         netdev->mtu = new_mtu;
2677         if ((old_mtu != new_mtu) && netif_running(netdev)) {
2678                 atl1_down(adapter);
2679                 atl1_up(adapter);
2680         }
2681
2682         return 0;
2683 }
2684
2685 /*
2686  * atl1_open - Called when a network interface is made active
2687  * @netdev: network interface device structure
2688  *
2689  * Returns 0 on success, negative value on failure
2690  *
2691  * The open entry point is called when a network interface is made
2692  * active by the system (IFF_UP).  At this point all resources needed
2693  * for transmit and receive operations are allocated, the interrupt
2694  * handler is registered with the OS, the watchdog timer is started,
2695  * and the stack is notified that the interface is ready.
2696  */
2697 static int atl1_open(struct net_device *netdev)
2698 {
2699         struct atl1_adapter *adapter = netdev_priv(netdev);
2700         int err;
2701
2702         netif_carrier_off(netdev);
2703
2704         /* allocate transmit descriptors */
2705         err = atl1_setup_ring_resources(adapter);
2706         if (err)
2707                 return err;
2708
2709         err = atl1_up(adapter);
2710         if (err)
2711                 goto err_up;
2712
2713         return 0;
2714
2715 err_up:
2716         atl1_reset(adapter);
2717         return err;
2718 }
2719
2720 /*
2721  * atl1_close - Disables a network interface
2722  * @netdev: network interface device structure
2723  *
2724  * Returns 0, this is not allowed to fail
2725  *
2726  * The close entry point is called when an interface is de-activated
2727  * by the OS.  The hardware is still under the drivers control, but
2728  * needs to be disabled.  A global MAC reset is issued to stop the
2729  * hardware, and all transmit and receive resources are freed.
2730  */
2731 static int atl1_close(struct net_device *netdev)
2732 {
2733         struct atl1_adapter *adapter = netdev_priv(netdev);
2734         atl1_down(adapter);
2735         atl1_free_ring_resources(adapter);
2736         return 0;
2737 }
2738
2739 #ifdef CONFIG_PM
2740 static int atl1_suspend(struct device *dev)
2741 {
2742         struct pci_dev *pdev = to_pci_dev(dev);
2743         struct net_device *netdev = pci_get_drvdata(pdev);
2744         struct atl1_adapter *adapter = netdev_priv(netdev);
2745         struct atl1_hw *hw = &adapter->hw;
2746         u32 ctrl = 0;
2747         u32 wufc = adapter->wol;
2748         u32 val;
2749         u16 speed;
2750         u16 duplex;
2751
2752         netif_device_detach(netdev);
2753         if (netif_running(netdev))
2754                 atl1_down(adapter);
2755
2756         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2757         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2758         val = ctrl & BMSR_LSTATUS;
2759         if (val)
2760                 wufc &= ~ATLX_WUFC_LNKC;
2761         if (!wufc)
2762                 goto disable_wol;
2763
2764         if (val) {
2765                 val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
2766                 if (val) {
2767                         if (netif_msg_ifdown(adapter))
2768                                 dev_printk(KERN_DEBUG, &pdev->dev,
2769                                         "error getting speed/duplex\n");
2770                         goto disable_wol;
2771                 }
2772
2773                 ctrl = 0;
2774
2775                 /* enable magic packet WOL */
2776                 if (wufc & ATLX_WUFC_MAG)
2777                         ctrl |= (WOL_MAGIC_EN | WOL_MAGIC_PME_EN);
2778                 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2779                 ioread32(hw->hw_addr + REG_WOL_CTRL);
2780
2781                 /* configure the mac */
2782                 ctrl = MAC_CTRL_RX_EN;
2783                 ctrl |= ((u32)((speed == SPEED_1000) ? MAC_CTRL_SPEED_1000 :
2784                         MAC_CTRL_SPEED_10_100) << MAC_CTRL_SPEED_SHIFT);
2785                 if (duplex == FULL_DUPLEX)
2786                         ctrl |= MAC_CTRL_DUPLX;
2787                 ctrl |= (((u32)adapter->hw.preamble_len &
2788                         MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
2789                 if (adapter->vlgrp)
2790                         ctrl |= MAC_CTRL_RMV_VLAN;
2791                 if (wufc & ATLX_WUFC_MAG)
2792                         ctrl |= MAC_CTRL_BC_EN;
2793                 iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
2794                 ioread32(hw->hw_addr + REG_MAC_CTRL);
2795
2796                 /* poke the PHY */
2797                 ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2798                 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2799                 iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
2800                 ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2801         } else {
2802                 ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
2803                 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2804                 ioread32(hw->hw_addr + REG_WOL_CTRL);
2805                 iowrite32(0, hw->hw_addr + REG_MAC_CTRL);
2806                 ioread32(hw->hw_addr + REG_MAC_CTRL);
2807                 hw->phy_configured = false;
2808         }
2809
2810         return 0;
2811
2812  disable_wol:
2813         iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
2814         ioread32(hw->hw_addr + REG_WOL_CTRL);
2815         ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2816         ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2817         iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
2818         ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2819         hw->phy_configured = false;
2820
2821         return 0;
2822 }
2823
2824 static int atl1_resume(struct device *dev)
2825 {
2826         struct pci_dev *pdev = to_pci_dev(dev);
2827         struct net_device *netdev = pci_get_drvdata(pdev);
2828         struct atl1_adapter *adapter = netdev_priv(netdev);
2829
2830         iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
2831
2832         atl1_reset_hw(&adapter->hw);
2833
2834         if (netif_running(netdev)) {
2835                 adapter->cmb.cmb->int_stats = 0;
2836                 atl1_up(adapter);
2837         }
2838         netif_device_attach(netdev);
2839
2840         return 0;
2841 }
2842
2843 static SIMPLE_DEV_PM_OPS(atl1_pm_ops, atl1_suspend, atl1_resume);
2844 #define ATL1_PM_OPS     (&atl1_pm_ops)
2845
2846 #else
2847
2848 static int atl1_suspend(struct device *dev) { return 0; }
2849
2850 #define ATL1_PM_OPS     NULL
2851 #endif
2852
2853 static void atl1_shutdown(struct pci_dev *pdev)
2854 {
2855         struct net_device *netdev = pci_get_drvdata(pdev);
2856         struct atl1_adapter *adapter = netdev_priv(netdev);
2857
2858         atl1_suspend(&pdev->dev);
2859         pci_wake_from_d3(pdev, adapter->wol);
2860         pci_set_power_state(pdev, PCI_D3hot);
2861 }
2862
2863 #ifdef CONFIG_NET_POLL_CONTROLLER
2864 static void atl1_poll_controller(struct net_device *netdev)
2865 {
2866         disable_irq(netdev->irq);
2867         atl1_intr(netdev->irq, netdev);
2868         enable_irq(netdev->irq);
2869 }
2870 #endif
2871
2872 static const struct net_device_ops atl1_netdev_ops = {
2873         .ndo_open               = atl1_open,
2874         .ndo_stop               = atl1_close,
2875         .ndo_start_xmit         = atl1_xmit_frame,
2876         .ndo_set_multicast_list = atlx_set_multi,
2877         .ndo_validate_addr      = eth_validate_addr,
2878         .ndo_set_mac_address    = atl1_set_mac,
2879         .ndo_change_mtu         = atl1_change_mtu,
2880         .ndo_do_ioctl           = atlx_ioctl,
2881         .ndo_tx_timeout         = atlx_tx_timeout,
2882         .ndo_vlan_rx_register   = atlx_vlan_rx_register,
2883 #ifdef CONFIG_NET_POLL_CONTROLLER
2884         .ndo_poll_controller    = atl1_poll_controller,
2885 #endif
2886 };
2887
2888 /*
2889  * atl1_probe - Device Initialization Routine
2890  * @pdev: PCI device information struct
2891  * @ent: entry in atl1_pci_tbl
2892  *
2893  * Returns 0 on success, negative on failure
2894  *
2895  * atl1_probe initializes an adapter identified by a pci_dev structure.
2896  * The OS initialization, configuring of the adapter private structure,
2897  * and a hardware reset occur.
2898  */
2899 static int __devinit atl1_probe(struct pci_dev *pdev,
2900         const struct pci_device_id *ent)
2901 {
2902         struct net_device *netdev;
2903         struct atl1_adapter *adapter;
2904         static int cards_found = 0;
2905         int err;
2906
2907         err = pci_enable_device(pdev);
2908         if (err)
2909                 return err;
2910
2911         /*
2912          * The atl1 chip can DMA to 64-bit addresses, but it uses a single
2913          * shared register for the high 32 bits, so only a single, aligned,
2914          * 4 GB physical address range can be used at a time.
2915          *
2916          * Supporting 64-bit DMA on this hardware is more trouble than it's
2917          * worth.  It is far easier to limit to 32-bit DMA than update
2918          * various kernel subsystems to support the mechanics required by a
2919          * fixed-high-32-bit system.
2920          */
2921         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2922         if (err) {
2923                 dev_err(&pdev->dev, "no usable DMA configuration\n");
2924                 goto err_dma;
2925         }
2926         /*
2927          * Mark all PCI regions associated with PCI device
2928          * pdev as being reserved by owner atl1_driver_name
2929          */
2930         err = pci_request_regions(pdev, ATLX_DRIVER_NAME);
2931         if (err)
2932                 goto err_request_regions;
2933
2934         /*
2935          * Enables bus-mastering on the device and calls
2936          * pcibios_set_master to do the needed arch specific settings
2937          */
2938         pci_set_master(pdev);
2939
2940         netdev = alloc_etherdev(sizeof(struct atl1_adapter));
2941         if (!netdev) {
2942                 err = -ENOMEM;
2943                 goto err_alloc_etherdev;
2944         }
2945         SET_NETDEV_DEV(netdev, &pdev->dev);
2946
2947         pci_set_drvdata(pdev, netdev);
2948         adapter = netdev_priv(netdev);
2949         adapter->netdev = netdev;
2950         adapter->pdev = pdev;
2951         adapter->hw.back = adapter;
2952         adapter->msg_enable = netif_msg_init(debug, atl1_default_msg);
2953
2954         adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
2955         if (!adapter->hw.hw_addr) {
2956                 err = -EIO;
2957                 goto err_pci_iomap;
2958         }
2959         /* get device revision number */
2960         adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
2961                 (REG_MASTER_CTRL + 2));
2962         if (netif_msg_probe(adapter))
2963                 dev_info(&pdev->dev, "version %s\n", ATLX_DRIVER_VERSION);
2964
2965         /* set default ring resource counts */
2966         adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
2967         adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
2968
2969         adapter->mii.dev = netdev;
2970         adapter->mii.mdio_read = mdio_read;
2971         adapter->mii.mdio_write = mdio_write;
2972         adapter->mii.phy_id_mask = 0x1f;
2973         adapter->mii.reg_num_mask = 0x1f;
2974
2975         netdev->netdev_ops = &atl1_netdev_ops;
2976         netdev->watchdog_timeo = 5 * HZ;
2977
2978         netdev->ethtool_ops = &atl1_ethtool_ops;
2979         adapter->bd_number = cards_found;
2980
2981         /* setup the private structure */
2982         err = atl1_sw_init(adapter);
2983         if (err)
2984                 goto err_common;
2985
2986         netdev->features = NETIF_F_HW_CSUM;
2987         netdev->features |= NETIF_F_SG;
2988         netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
2989
2990         /*
2991          * patch for some L1 of old version,
2992          * the final version of L1 may not need these
2993          * patches
2994          */
2995         /* atl1_pcie_patch(adapter); */
2996
2997         /* really reset GPHY core */
2998         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
2999
3000         /*
3001          * reset the controller to
3002          * put the device in a known good starting state
3003          */
3004         if (atl1_reset_hw(&adapter->hw)) {
3005                 err = -EIO;
3006                 goto err_common;
3007         }
3008
3009         /* copy the MAC address out of the EEPROM */
3010         atl1_read_mac_addr(&adapter->hw);
3011         memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
3012
3013         if (!is_valid_ether_addr(netdev->dev_addr)) {
3014                 err = -EIO;
3015                 goto err_common;
3016         }
3017
3018         atl1_check_options(adapter);
3019
3020         /* pre-init the MAC, and setup link */
3021         err = atl1_init_hw(&adapter->hw);
3022         if (err) {
3023                 err = -EIO;
3024                 goto err_common;
3025         }
3026
3027         atl1_pcie_patch(adapter);
3028         /* assume we have no link for now */
3029         netif_carrier_off(netdev);
3030
3031         setup_timer(&adapter->phy_config_timer, atl1_phy_config,
3032                     (unsigned long)adapter);
3033         adapter->phy_timer_pending = false;
3034
3035         INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
3036
3037         INIT_WORK(&adapter->link_chg_task, atlx_link_chg_task);
3038
3039         INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
3040
3041         err = register_netdev(netdev);
3042         if (err)
3043                 goto err_common;
3044
3045         cards_found++;
3046         atl1_via_workaround(adapter);
3047         return 0;
3048
3049 err_common:
3050         pci_iounmap(pdev, adapter->hw.hw_addr);
3051 err_pci_iomap:
3052         free_netdev(netdev);
3053 err_alloc_etherdev:
3054         pci_release_regions(pdev);
3055 err_dma:
3056 err_request_regions:
3057         pci_disable_device(pdev);
3058         return err;
3059 }
3060
3061 /*
3062  * atl1_remove - Device Removal Routine
3063  * @pdev: PCI device information struct
3064  *
3065  * atl1_remove is called by the PCI subsystem to alert the driver
3066  * that it should release a PCI device.  The could be caused by a
3067  * Hot-Plug event, or because the driver is going to be removed from
3068  * memory.
3069  */
3070 static void __devexit atl1_remove(struct pci_dev *pdev)
3071 {
3072         struct net_device *netdev = pci_get_drvdata(pdev);
3073         struct atl1_adapter *adapter;
3074         /* Device not available. Return. */
3075         if (!netdev)
3076                 return;
3077
3078         adapter = netdev_priv(netdev);
3079
3080         /*
3081          * Some atl1 boards lack persistent storage for their MAC, and get it
3082          * from the BIOS during POST.  If we've been messing with the MAC
3083          * address, we need to save the permanent one.
3084          */
3085         if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
3086                 memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
3087                         ETH_ALEN);
3088                 atl1_set_mac_addr(&adapter->hw);
3089         }
3090
3091         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
3092         unregister_netdev(netdev);
3093         pci_iounmap(pdev, adapter->hw.hw_addr);
3094         pci_release_regions(pdev);
3095         free_netdev(netdev);
3096         pci_disable_device(pdev);
3097 }
3098
3099 static struct pci_driver atl1_driver = {
3100         .name = ATLX_DRIVER_NAME,
3101         .id_table = atl1_pci_tbl,
3102         .probe = atl1_probe,
3103         .remove = __devexit_p(atl1_remove),
3104         .shutdown = atl1_shutdown,
3105         .driver.pm = ATL1_PM_OPS,
3106 };
3107
3108 /*
3109  * atl1_exit_module - Driver Exit Cleanup Routine
3110  *
3111  * atl1_exit_module is called just before the driver is removed
3112  * from memory.
3113  */
3114 static void __exit atl1_exit_module(void)
3115 {
3116         pci_unregister_driver(&atl1_driver);
3117 }
3118
3119 /*
3120  * atl1_init_module - Driver Registration Routine
3121  *
3122  * atl1_init_module is the first routine called when the driver is
3123  * loaded. All it does is register with the PCI subsystem.
3124  */
3125 static int __init atl1_init_module(void)
3126 {
3127         return pci_register_driver(&atl1_driver);
3128 }
3129
3130 module_init(atl1_init_module);
3131 module_exit(atl1_exit_module);
3132
3133 struct atl1_stats {
3134         char stat_string[ETH_GSTRING_LEN];
3135         int sizeof_stat;
3136         int stat_offset;
3137 };
3138
3139 #define ATL1_STAT(m) \
3140         sizeof(((struct atl1_adapter *)0)->m), offsetof(struct atl1_adapter, m)
3141
3142 static struct atl1_stats atl1_gstrings_stats[] = {
3143         {"rx_packets", ATL1_STAT(soft_stats.rx_packets)},
3144         {"tx_packets", ATL1_STAT(soft_stats.tx_packets)},
3145         {"rx_bytes", ATL1_STAT(soft_stats.rx_bytes)},
3146         {"tx_bytes", ATL1_STAT(soft_stats.tx_bytes)},
3147         {"rx_errors", ATL1_STAT(soft_stats.rx_errors)},
3148         {"tx_errors", ATL1_STAT(soft_stats.tx_errors)},
3149         {"multicast", ATL1_STAT(soft_stats.multicast)},
3150         {"collisions", ATL1_STAT(soft_stats.collisions)},
3151         {"rx_length_errors", ATL1_STAT(soft_stats.rx_length_errors)},
3152         {"rx_over_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3153         {"rx_crc_errors", ATL1_STAT(soft_stats.rx_crc_errors)},
3154         {"rx_frame_errors", ATL1_STAT(soft_stats.rx_frame_errors)},
3155         {"rx_fifo_errors", ATL1_STAT(soft_stats.rx_fifo_errors)},
3156         {"rx_missed_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3157         {"tx_aborted_errors", ATL1_STAT(soft_stats.tx_aborted_errors)},
3158         {"tx_carrier_errors", ATL1_STAT(soft_stats.tx_carrier_errors)},
3159         {"tx_fifo_errors", ATL1_STAT(soft_stats.tx_fifo_errors)},
3160         {"tx_window_errors", ATL1_STAT(soft_stats.tx_window_errors)},
3161         {"tx_abort_exce_coll", ATL1_STAT(soft_stats.excecol)},
3162         {"tx_abort_late_coll", ATL1_STAT(soft_stats.latecol)},
3163         {"tx_deferred_ok", ATL1_STAT(soft_stats.deffer)},
3164         {"tx_single_coll_ok", ATL1_STAT(soft_stats.scc)},
3165         {"tx_multi_coll_ok", ATL1_STAT(soft_stats.mcc)},
3166         {"tx_underun", ATL1_STAT(soft_stats.tx_underun)},
3167         {"tx_trunc", ATL1_STAT(soft_stats.tx_trunc)},
3168         {"tx_pause", ATL1_STAT(soft_stats.tx_pause)},
3169         {"rx_pause", ATL1_STAT(soft_stats.rx_pause)},
3170         {"rx_rrd_ov", ATL1_STAT(soft_stats.rx_rrd_ov)},
3171         {"rx_trunc", ATL1_STAT(soft_stats.rx_trunc)}
3172 };
3173
3174 static void atl1_get_ethtool_stats(struct net_device *netdev,
3175         struct ethtool_stats *stats, u64 *data)
3176 {
3177         struct atl1_adapter *adapter = netdev_priv(netdev);
3178         int i;
3179         char *p;
3180
3181         for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3182                 p = (char *)adapter+atl1_gstrings_stats[i].stat_offset;
3183                 data[i] = (atl1_gstrings_stats[i].sizeof_stat ==
3184                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
3185         }
3186
3187 }
3188
3189 static int atl1_get_sset_count(struct net_device *netdev, int sset)
3190 {
3191         switch (sset) {
3192         case ETH_SS_STATS:
3193                 return ARRAY_SIZE(atl1_gstrings_stats);
3194         default:
3195                 return -EOPNOTSUPP;
3196         }
3197 }
3198
3199 static int atl1_get_settings(struct net_device *netdev,
3200         struct ethtool_cmd *ecmd)
3201 {
3202         struct atl1_adapter *adapter = netdev_priv(netdev);
3203         struct atl1_hw *hw = &adapter->hw;
3204
3205         ecmd->supported = (SUPPORTED_10baseT_Half |
3206                            SUPPORTED_10baseT_Full |
3207                            SUPPORTED_100baseT_Half |
3208                            SUPPORTED_100baseT_Full |
3209                            SUPPORTED_1000baseT_Full |
3210                            SUPPORTED_Autoneg | SUPPORTED_TP);
3211         ecmd->advertising = ADVERTISED_TP;
3212         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3213             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3214                 ecmd->advertising |= ADVERTISED_Autoneg;
3215                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR) {
3216                         ecmd->advertising |= ADVERTISED_Autoneg;
3217                         ecmd->advertising |=
3218                             (ADVERTISED_10baseT_Half |
3219                              ADVERTISED_10baseT_Full |
3220                              ADVERTISED_100baseT_Half |
3221                              ADVERTISED_100baseT_Full |
3222                              ADVERTISED_1000baseT_Full);
3223                 } else
3224                         ecmd->advertising |= (ADVERTISED_1000baseT_Full);
3225         }
3226         ecmd->port = PORT_TP;
3227         ecmd->phy_address = 0;
3228         ecmd->transceiver = XCVR_INTERNAL;
3229
3230         if (netif_carrier_ok(adapter->netdev)) {
3231                 u16 link_speed, link_duplex;
3232                 atl1_get_speed_and_duplex(hw, &link_speed, &link_duplex);
3233                 ecmd->speed = link_speed;
3234                 if (link_duplex == FULL_DUPLEX)
3235                         ecmd->duplex = DUPLEX_FULL;
3236                 else
3237                         ecmd->duplex = DUPLEX_HALF;
3238         } else {
3239                 ecmd->speed = -1;
3240                 ecmd->duplex = -1;
3241         }
3242         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3243             hw->media_type == MEDIA_TYPE_1000M_FULL)
3244                 ecmd->autoneg = AUTONEG_ENABLE;
3245         else
3246                 ecmd->autoneg = AUTONEG_DISABLE;
3247
3248         return 0;
3249 }
3250
3251 static int atl1_set_settings(struct net_device *netdev,
3252         struct ethtool_cmd *ecmd)
3253 {
3254         struct atl1_adapter *adapter = netdev_priv(netdev);
3255         struct atl1_hw *hw = &adapter->hw;
3256         u16 phy_data;
3257         int ret_val = 0;
3258         u16 old_media_type = hw->media_type;
3259
3260         if (netif_running(adapter->netdev)) {
3261                 if (netif_msg_link(adapter))
3262                         dev_dbg(&adapter->pdev->dev,
3263                                 "ethtool shutting down adapter\n");
3264                 atl1_down(adapter);
3265         }
3266
3267         if (ecmd->autoneg == AUTONEG_ENABLE)
3268                 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
3269         else {
3270                 if (ecmd->speed == SPEED_1000) {
3271                         if (ecmd->duplex != DUPLEX_FULL) {
3272                                 if (netif_msg_link(adapter))
3273                                         dev_warn(&adapter->pdev->dev,
3274                                                 "1000M half is invalid\n");
3275                                 ret_val = -EINVAL;
3276                                 goto exit_sset;
3277                         }
3278                         hw->media_type = MEDIA_TYPE_1000M_FULL;
3279                 } else if (ecmd->speed == SPEED_100) {
3280                         if (ecmd->duplex == DUPLEX_FULL)
3281                                 hw->media_type = MEDIA_TYPE_100M_FULL;
3282                         else
3283                                 hw->media_type = MEDIA_TYPE_100M_HALF;
3284                 } else {
3285                         if (ecmd->duplex == DUPLEX_FULL)
3286                                 hw->media_type = MEDIA_TYPE_10M_FULL;
3287                         else
3288                                 hw->media_type = MEDIA_TYPE_10M_HALF;
3289                 }
3290         }
3291         switch (hw->media_type) {
3292         case MEDIA_TYPE_AUTO_SENSOR:
3293                 ecmd->advertising =
3294                     ADVERTISED_10baseT_Half |
3295                     ADVERTISED_10baseT_Full |
3296                     ADVERTISED_100baseT_Half |
3297                     ADVERTISED_100baseT_Full |
3298                     ADVERTISED_1000baseT_Full |
3299                     ADVERTISED_Autoneg | ADVERTISED_TP;
3300                 break;
3301         case MEDIA_TYPE_1000M_FULL:
3302                 ecmd->advertising =
3303                     ADVERTISED_1000baseT_Full |
3304                     ADVERTISED_Autoneg | ADVERTISED_TP;
3305                 break;
3306         default:
3307                 ecmd->advertising = 0;
3308                 break;
3309         }
3310         if (atl1_phy_setup_autoneg_adv(hw)) {
3311                 ret_val = -EINVAL;
3312                 if (netif_msg_link(adapter))
3313                         dev_warn(&adapter->pdev->dev,
3314                                 "invalid ethtool speed/duplex setting\n");
3315                 goto exit_sset;
3316         }
3317         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3318             hw->media_type == MEDIA_TYPE_1000M_FULL)
3319                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3320         else {
3321                 switch (hw->media_type) {
3322                 case MEDIA_TYPE_100M_FULL:
3323                         phy_data =
3324                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
3325                             MII_CR_RESET;
3326                         break;
3327                 case MEDIA_TYPE_100M_HALF:
3328                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3329                         break;
3330                 case MEDIA_TYPE_10M_FULL:
3331                         phy_data =
3332                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
3333                         break;
3334                 default:
3335                         /* MEDIA_TYPE_10M_HALF: */
3336                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3337                         break;
3338                 }
3339         }
3340         atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3341 exit_sset:
3342         if (ret_val)
3343                 hw->media_type = old_media_type;
3344
3345         if (netif_running(adapter->netdev)) {
3346                 if (netif_msg_link(adapter))
3347                         dev_dbg(&adapter->pdev->dev,
3348                                 "ethtool starting adapter\n");
3349                 atl1_up(adapter);
3350         } else if (!ret_val) {
3351                 if (netif_msg_link(adapter))
3352                         dev_dbg(&adapter->pdev->dev,
3353                                 "ethtool resetting adapter\n");
3354                 atl1_reset(adapter);
3355         }
3356         return ret_val;
3357 }
3358
3359 static void atl1_get_drvinfo(struct net_device *netdev,
3360         struct ethtool_drvinfo *drvinfo)
3361 {
3362         struct atl1_adapter *adapter = netdev_priv(netdev);
3363
3364         strlcpy(drvinfo->driver, ATLX_DRIVER_NAME, sizeof(drvinfo->driver));
3365         strlcpy(drvinfo->version, ATLX_DRIVER_VERSION,
3366                 sizeof(drvinfo->version));
3367         strlcpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
3368         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
3369                 sizeof(drvinfo->bus_info));
3370         drvinfo->eedump_len = ATL1_EEDUMP_LEN;
3371 }
3372
3373 static void atl1_get_wol(struct net_device *netdev,
3374         struct ethtool_wolinfo *wol)
3375 {
3376         struct atl1_adapter *adapter = netdev_priv(netdev);
3377
3378         wol->supported = WAKE_MAGIC;
3379         wol->wolopts = 0;
3380         if (adapter->wol & ATLX_WUFC_MAG)
3381                 wol->wolopts |= WAKE_MAGIC;
3382 }
3383
3384 static int atl1_set_wol(struct net_device *netdev,
3385         struct ethtool_wolinfo *wol)
3386 {
3387         struct atl1_adapter *adapter = netdev_priv(netdev);
3388
3389         if (wol->wolopts & (WAKE_PHY | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST |
3390                 WAKE_ARP | WAKE_MAGICSECURE))
3391                 return -EOPNOTSUPP;
3392         adapter->wol = 0;
3393         if (wol->wolopts & WAKE_MAGIC)
3394                 adapter->wol |= ATLX_WUFC_MAG;
3395
3396         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
3397
3398         return 0;
3399 }
3400
3401 static u32 atl1_get_msglevel(struct net_device *netdev)
3402 {
3403         struct atl1_adapter *adapter = netdev_priv(netdev);
3404         return adapter->msg_enable;
3405 }
3406
3407 static void atl1_set_msglevel(struct net_device *netdev, u32 value)
3408 {
3409         struct atl1_adapter *adapter = netdev_priv(netdev);
3410         adapter->msg_enable = value;
3411 }
3412
3413 static int atl1_get_regs_len(struct net_device *netdev)
3414 {
3415         return ATL1_REG_COUNT * sizeof(u32);
3416 }
3417
3418 static void atl1_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
3419         void *p)
3420 {
3421         struct atl1_adapter *adapter = netdev_priv(netdev);
3422         struct atl1_hw *hw = &adapter->hw;
3423         unsigned int i;
3424         u32 *regbuf = p;
3425
3426         for (i = 0; i < ATL1_REG_COUNT; i++) {
3427                 /*
3428                  * This switch statement avoids reserved regions
3429                  * of register space.
3430                  */
3431                 switch (i) {
3432                 case 6 ... 9:
3433                 case 14:
3434                 case 29 ... 31:
3435                 case 34 ... 63:
3436                 case 75 ... 127:
3437                 case 136 ... 1023:
3438                 case 1027 ... 1087:
3439                 case 1091 ... 1151:
3440                 case 1194 ... 1195:
3441                 case 1200 ... 1201:
3442                 case 1206 ... 1213:
3443                 case 1216 ... 1279:
3444                 case 1290 ... 1311:
3445                 case 1323 ... 1343:
3446                 case 1358 ... 1359:
3447                 case 1368 ... 1375:
3448                 case 1378 ... 1383:
3449                 case 1388 ... 1391:
3450                 case 1393 ... 1395:
3451                 case 1402 ... 1403:
3452                 case 1410 ... 1471:
3453                 case 1522 ... 1535:
3454                         /* reserved region; don't read it */
3455                         regbuf[i] = 0;
3456                         break;
3457                 default:
3458                         /* unreserved region */
3459                         regbuf[i] = ioread32(hw->hw_addr + (i * sizeof(u32)));
3460                 }
3461         }
3462 }
3463
3464 static void atl1_get_ringparam(struct net_device *netdev,
3465         struct ethtool_ringparam *ring)
3466 {
3467         struct atl1_adapter *adapter = netdev_priv(netdev);
3468         struct atl1_tpd_ring *txdr = &adapter->tpd_ring;
3469         struct atl1_rfd_ring *rxdr = &adapter->rfd_ring;
3470
3471         ring->rx_max_pending = ATL1_MAX_RFD;
3472         ring->tx_max_pending = ATL1_MAX_TPD;
3473         ring->rx_mini_max_pending = 0;
3474         ring->rx_jumbo_max_pending = 0;
3475         ring->rx_pending = rxdr->count;
3476         ring->tx_pending = txdr->count;
3477         ring->rx_mini_pending = 0;
3478         ring->rx_jumbo_pending = 0;
3479 }
3480
3481 static int atl1_set_ringparam(struct net_device *netdev,
3482         struct ethtool_ringparam *ring)
3483 {
3484         struct atl1_adapter *adapter = netdev_priv(netdev);
3485         struct atl1_tpd_ring *tpdr = &adapter->tpd_ring;
3486         struct atl1_rrd_ring *rrdr = &adapter->rrd_ring;
3487         struct atl1_rfd_ring *rfdr = &adapter->rfd_ring;
3488
3489         struct atl1_tpd_ring tpd_old, tpd_new;
3490         struct atl1_rfd_ring rfd_old, rfd_new;
3491         struct atl1_rrd_ring rrd_old, rrd_new;
3492         struct atl1_ring_header rhdr_old, rhdr_new;
3493         struct atl1_smb smb;
3494         struct atl1_cmb cmb;
3495         int err;
3496
3497         tpd_old = adapter->tpd_ring;
3498         rfd_old = adapter->rfd_ring;
3499         rrd_old = adapter->rrd_ring;
3500         rhdr_old = adapter->ring_header;
3501
3502         if (netif_running(adapter->netdev))
3503                 atl1_down(adapter);
3504
3505         rfdr->count = (u16) max(ring->rx_pending, (u32) ATL1_MIN_RFD);
3506         rfdr->count = rfdr->count > ATL1_MAX_RFD ? ATL1_MAX_RFD :
3507                         rfdr->count;
3508         rfdr->count = (rfdr->count + 3) & ~3;
3509         rrdr->count = rfdr->count;
3510
3511         tpdr->count = (u16) max(ring->tx_pending, (u32) ATL1_MIN_TPD);
3512         tpdr->count = tpdr->count > ATL1_MAX_TPD ? ATL1_MAX_TPD :
3513                         tpdr->count;
3514         tpdr->count = (tpdr->count + 3) & ~3;
3515
3516         if (netif_running(adapter->netdev)) {
3517                 /* try to get new resources before deleting old */
3518                 err = atl1_setup_ring_resources(adapter);
3519                 if (err)
3520                         goto err_setup_ring;
3521
3522                 /*
3523                  * save the new, restore the old in order to free it,
3524                  * then restore the new back again
3525                  */
3526
3527                 rfd_new = adapter->rfd_ring;
3528                 rrd_new = adapter->rrd_ring;
3529                 tpd_new = adapter->tpd_ring;
3530                 rhdr_new = adapter->ring_header;
3531                 adapter->rfd_ring = rfd_old;
3532                 adapter->rrd_ring = rrd_old;
3533                 adapter->tpd_ring = tpd_old;
3534                 adapter->ring_header = rhdr_old;
3535                 /*
3536                  * Save SMB and CMB, since atl1_free_ring_resources
3537                  * will clear them.
3538                  */
3539                 smb = adapter->smb;
3540                 cmb = adapter->cmb;
3541                 atl1_free_ring_resources(adapter);
3542                 adapter->rfd_ring = rfd_new;
3543                 adapter->rrd_ring = rrd_new;
3544                 adapter->tpd_ring = tpd_new;
3545                 adapter->ring_header = rhdr_new;
3546                 adapter->smb = smb;
3547                 adapter->cmb = cmb;
3548
3549                 err = atl1_up(adapter);
3550                 if (err)
3551                         return err;
3552         }
3553         return 0;
3554
3555 err_setup_ring:
3556         adapter->rfd_ring = rfd_old;
3557         adapter->rrd_ring = rrd_old;
3558         adapter->tpd_ring = tpd_old;
3559         adapter->ring_header = rhdr_old;
3560         atl1_up(adapter);
3561         return err;
3562 }
3563
3564 static void atl1_get_pauseparam(struct net_device *netdev,
3565         struct ethtool_pauseparam *epause)
3566 {
3567         struct atl1_adapter *adapter = netdev_priv(netdev);
3568         struct atl1_hw *hw = &adapter->hw;
3569
3570         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3571             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3572                 epause->autoneg = AUTONEG_ENABLE;
3573         } else {
3574                 epause->autoneg = AUTONEG_DISABLE;
3575         }
3576         epause->rx_pause = 1;
3577         epause->tx_pause = 1;
3578 }
3579
3580 static int atl1_set_pauseparam(struct net_device *netdev,
3581         struct ethtool_pauseparam *epause)
3582 {
3583         struct atl1_adapter *adapter = netdev_priv(netdev);
3584         struct atl1_hw *hw = &adapter->hw;
3585
3586         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3587             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3588                 epause->autoneg = AUTONEG_ENABLE;
3589         } else {
3590                 epause->autoneg = AUTONEG_DISABLE;
3591         }
3592
3593         epause->rx_pause = 1;
3594         epause->tx_pause = 1;
3595
3596         return 0;
3597 }
3598
3599 /* FIXME: is this right? -- CHS */
3600 static u32 atl1_get_rx_csum(struct net_device *netdev)
3601 {
3602         return 1;
3603 }
3604
3605 static void atl1_get_strings(struct net_device *netdev, u32 stringset,
3606         u8 *data)
3607 {
3608         u8 *p = data;
3609         int i;
3610
3611         switch (stringset) {
3612         case ETH_SS_STATS:
3613                 for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3614                         memcpy(p, atl1_gstrings_stats[i].stat_string,
3615                                 ETH_GSTRING_LEN);
3616                         p += ETH_GSTRING_LEN;
3617                 }
3618                 break;
3619         }
3620 }
3621
3622 static int atl1_nway_reset(struct net_device *netdev)
3623 {
3624         struct atl1_adapter *adapter = netdev_priv(netdev);
3625         struct atl1_hw *hw = &adapter->hw;
3626
3627         if (netif_running(netdev)) {
3628                 u16 phy_data;
3629                 atl1_down(adapter);
3630
3631                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3632                         hw->media_type == MEDIA_TYPE_1000M_FULL) {
3633                         phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3634                 } else {
3635                         switch (hw->media_type) {
3636                         case MEDIA_TYPE_100M_FULL:
3637                                 phy_data = MII_CR_FULL_DUPLEX |
3638                                         MII_CR_SPEED_100 | MII_CR_RESET;
3639                                 break;
3640                         case MEDIA_TYPE_100M_HALF:
3641                                 phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3642                                 break;
3643                         case MEDIA_TYPE_10M_FULL:
3644                                 phy_data = MII_CR_FULL_DUPLEX |
3645                                         MII_CR_SPEED_10 | MII_CR_RESET;
3646                                 break;
3647                         default:
3648                                 /* MEDIA_TYPE_10M_HALF */
3649                                 phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3650                         }
3651                 }
3652                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3653                 atl1_up(adapter);
3654         }
3655         return 0;
3656 }
3657
3658 static const struct ethtool_ops atl1_ethtool_ops = {
3659         .get_settings           = atl1_get_settings,
3660         .set_settings           = atl1_set_settings,
3661         .get_drvinfo            = atl1_get_drvinfo,
3662         .get_wol                = atl1_get_wol,
3663         .set_wol                = atl1_set_wol,
3664         .get_msglevel           = atl1_get_msglevel,
3665         .set_msglevel           = atl1_set_msglevel,
3666         .get_regs_len           = atl1_get_regs_len,
3667         .get_regs               = atl1_get_regs,
3668         .get_ringparam          = atl1_get_ringparam,
3669         .set_ringparam          = atl1_set_ringparam,
3670         .get_pauseparam         = atl1_get_pauseparam,
3671         .set_pauseparam         = atl1_set_pauseparam,
3672         .get_rx_csum            = atl1_get_rx_csum,
3673         .set_tx_csum            = ethtool_op_set_tx_hw_csum,
3674         .get_link               = ethtool_op_get_link,
3675         .set_sg                 = ethtool_op_set_sg,
3676         .get_strings            = atl1_get_strings,
3677         .nway_reset             = atl1_nway_reset,
3678         .get_ethtool_stats      = atl1_get_ethtool_stats,
3679         .get_sset_count         = atl1_get_sset_count,
3680         .set_tso                = ethtool_op_set_tso,
3681 };