net: convert multicast list to list_head
[linux-2.6.git] / drivers / net / arm / ixp4xx_eth.c
1 /*
2  * Intel IXP4xx Ethernet driver for Linux
3  *
4  * Copyright (C) 2007 Krzysztof Halasa <khc@pm.waw.pl>
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of version 2 of the GNU General Public License
8  * as published by the Free Software Foundation.
9  *
10  * Ethernet port config (0x00 is not present on IXP42X):
11  *
12  * logical port         0x00            0x10            0x20
13  * NPE                  0 (NPE-A)       1 (NPE-B)       2 (NPE-C)
14  * physical PortId      2               0               1
15  * TX queue             23              24              25
16  * RX-free queue        26              27              28
17  * TX-done queue is always 31, per-port RX and TX-ready queues are configurable
18  *
19  *
20  * Queue entries:
21  * bits 0 -> 1  - NPE ID (RX and TX-done)
22  * bits 0 -> 2  - priority (TX, per 802.1D)
23  * bits 3 -> 4  - port ID (user-set?)
24  * bits 5 -> 31 - physical descriptor address
25  */
26
27 #include <linux/delay.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/dmapool.h>
30 #include <linux/etherdevice.h>
31 #include <linux/io.h>
32 #include <linux/kernel.h>
33 #include <linux/phy.h>
34 #include <linux/platform_device.h>
35 #include <mach/npe.h>
36 #include <mach/qmgr.h>
37
38 #define DEBUG_DESC              0
39 #define DEBUG_RX                0
40 #define DEBUG_TX                0
41 #define DEBUG_PKT_BYTES         0
42 #define DEBUG_MDIO              0
43 #define DEBUG_CLOSE             0
44
45 #define DRV_NAME                "ixp4xx_eth"
46
47 #define MAX_NPES                3
48
49 #define RX_DESCS                64 /* also length of all RX queues */
50 #define TX_DESCS                16 /* also length of all TX queues */
51 #define TXDONE_QUEUE_LEN        64 /* dwords */
52
53 #define POOL_ALLOC_SIZE         (sizeof(struct desc) * (RX_DESCS + TX_DESCS))
54 #define REGS_SIZE               0x1000
55 #define MAX_MRU                 1536 /* 0x600 */
56 #define RX_BUFF_SIZE            ALIGN((NET_IP_ALIGN) + MAX_MRU, 4)
57
58 #define NAPI_WEIGHT             16
59 #define MDIO_INTERVAL           (3 * HZ)
60 #define MAX_MDIO_RETRIES        100 /* microseconds, typically 30 cycles */
61 #define MAX_CLOSE_WAIT          1000 /* microseconds, typically 2-3 cycles */
62
63 #define NPE_ID(port_id)         ((port_id) >> 4)
64 #define PHYSICAL_ID(port_id)    ((NPE_ID(port_id) + 2) % 3)
65 #define TX_QUEUE(port_id)       (NPE_ID(port_id) + 23)
66 #define RXFREE_QUEUE(port_id)   (NPE_ID(port_id) + 26)
67 #define TXDONE_QUEUE            31
68
69 /* TX Control Registers */
70 #define TX_CNTRL0_TX_EN         0x01
71 #define TX_CNTRL0_HALFDUPLEX    0x02
72 #define TX_CNTRL0_RETRY         0x04
73 #define TX_CNTRL0_PAD_EN        0x08
74 #define TX_CNTRL0_APPEND_FCS    0x10
75 #define TX_CNTRL0_2DEFER        0x20
76 #define TX_CNTRL0_RMII          0x40 /* reduced MII */
77 #define TX_CNTRL1_RETRIES       0x0F /* 4 bits */
78
79 /* RX Control Registers */
80 #define RX_CNTRL0_RX_EN         0x01
81 #define RX_CNTRL0_PADSTRIP_EN   0x02
82 #define RX_CNTRL0_SEND_FCS      0x04
83 #define RX_CNTRL0_PAUSE_EN      0x08
84 #define RX_CNTRL0_LOOP_EN       0x10
85 #define RX_CNTRL0_ADDR_FLTR_EN  0x20
86 #define RX_CNTRL0_RX_RUNT_EN    0x40
87 #define RX_CNTRL0_BCAST_DIS     0x80
88 #define RX_CNTRL1_DEFER_EN      0x01
89
90 /* Core Control Register */
91 #define CORE_RESET              0x01
92 #define CORE_RX_FIFO_FLUSH      0x02
93 #define CORE_TX_FIFO_FLUSH      0x04
94 #define CORE_SEND_JAM           0x08
95 #define CORE_MDC_EN             0x10 /* MDIO using NPE-B ETH-0 only */
96
97 #define DEFAULT_TX_CNTRL0       (TX_CNTRL0_TX_EN | TX_CNTRL0_RETRY |    \
98                                  TX_CNTRL0_PAD_EN | TX_CNTRL0_APPEND_FCS | \
99                                  TX_CNTRL0_2DEFER)
100 #define DEFAULT_RX_CNTRL0       RX_CNTRL0_RX_EN
101 #define DEFAULT_CORE_CNTRL      CORE_MDC_EN
102
103
104 /* NPE message codes */
105 #define NPE_GETSTATUS                   0x00
106 #define NPE_EDB_SETPORTADDRESS          0x01
107 #define NPE_EDB_GETMACADDRESSDATABASE   0x02
108 #define NPE_EDB_SETMACADDRESSSDATABASE  0x03
109 #define NPE_GETSTATS                    0x04
110 #define NPE_RESETSTATS                  0x05
111 #define NPE_SETMAXFRAMELENGTHS          0x06
112 #define NPE_VLAN_SETRXTAGMODE           0x07
113 #define NPE_VLAN_SETDEFAULTRXVID        0x08
114 #define NPE_VLAN_SETPORTVLANTABLEENTRY  0x09
115 #define NPE_VLAN_SETPORTVLANTABLERANGE  0x0A
116 #define NPE_VLAN_SETRXQOSENTRY          0x0B
117 #define NPE_VLAN_SETPORTIDEXTRACTIONMODE 0x0C
118 #define NPE_STP_SETBLOCKINGSTATE        0x0D
119 #define NPE_FW_SETFIREWALLMODE          0x0E
120 #define NPE_PC_SETFRAMECONTROLDURATIONID 0x0F
121 #define NPE_PC_SETAPMACTABLE            0x11
122 #define NPE_SETLOOPBACK_MODE            0x12
123 #define NPE_PC_SETBSSIDTABLE            0x13
124 #define NPE_ADDRESS_FILTER_CONFIG       0x14
125 #define NPE_APPENDFCSCONFIG             0x15
126 #define NPE_NOTIFY_MAC_RECOVERY_DONE    0x16
127 #define NPE_MAC_RECOVERY_START          0x17
128
129
130 #ifdef __ARMEB__
131 typedef struct sk_buff buffer_t;
132 #define free_buffer dev_kfree_skb
133 #define free_buffer_irq dev_kfree_skb_irq
134 #else
135 typedef void buffer_t;
136 #define free_buffer kfree
137 #define free_buffer_irq kfree
138 #endif
139
140 struct eth_regs {
141         u32 tx_control[2], __res1[2];           /* 000 */
142         u32 rx_control[2], __res2[2];           /* 010 */
143         u32 random_seed, __res3[3];             /* 020 */
144         u32 partial_empty_threshold, __res4;    /* 030 */
145         u32 partial_full_threshold, __res5;     /* 038 */
146         u32 tx_start_bytes, __res6[3];          /* 040 */
147         u32 tx_deferral, rx_deferral, __res7[2];/* 050 */
148         u32 tx_2part_deferral[2], __res8[2];    /* 060 */
149         u32 slot_time, __res9[3];               /* 070 */
150         u32 mdio_command[4];                    /* 080 */
151         u32 mdio_status[4];                     /* 090 */
152         u32 mcast_mask[6], __res10[2];          /* 0A0 */
153         u32 mcast_addr[6], __res11[2];          /* 0C0 */
154         u32 int_clock_threshold, __res12[3];    /* 0E0 */
155         u32 hw_addr[6], __res13[61];            /* 0F0 */
156         u32 core_control;                       /* 1FC */
157 };
158
159 struct port {
160         struct resource *mem_res;
161         struct eth_regs __iomem *regs;
162         struct npe *npe;
163         struct net_device *netdev;
164         struct napi_struct napi;
165         struct phy_device *phydev;
166         struct eth_plat_info *plat;
167         buffer_t *rx_buff_tab[RX_DESCS], *tx_buff_tab[TX_DESCS];
168         struct desc *desc_tab;  /* coherent */
169         u32 desc_tab_phys;
170         int id;                 /* logical port ID */
171         int speed, duplex;
172         u8 firmware[4];
173 };
174
175 /* NPE message structure */
176 struct msg {
177 #ifdef __ARMEB__
178         u8 cmd, eth_id, byte2, byte3;
179         u8 byte4, byte5, byte6, byte7;
180 #else
181         u8 byte3, byte2, eth_id, cmd;
182         u8 byte7, byte6, byte5, byte4;
183 #endif
184 };
185
186 /* Ethernet packet descriptor */
187 struct desc {
188         u32 next;               /* pointer to next buffer, unused */
189
190 #ifdef __ARMEB__
191         u16 buf_len;            /* buffer length */
192         u16 pkt_len;            /* packet length */
193         u32 data;               /* pointer to data buffer in RAM */
194         u8 dest_id;
195         u8 src_id;
196         u16 flags;
197         u8 qos;
198         u8 padlen;
199         u16 vlan_tci;
200 #else
201         u16 pkt_len;            /* packet length */
202         u16 buf_len;            /* buffer length */
203         u32 data;               /* pointer to data buffer in RAM */
204         u16 flags;
205         u8 src_id;
206         u8 dest_id;
207         u16 vlan_tci;
208         u8 padlen;
209         u8 qos;
210 #endif
211
212 #ifdef __ARMEB__
213         u8 dst_mac_0, dst_mac_1, dst_mac_2, dst_mac_3;
214         u8 dst_mac_4, dst_mac_5, src_mac_0, src_mac_1;
215         u8 src_mac_2, src_mac_3, src_mac_4, src_mac_5;
216 #else
217         u8 dst_mac_3, dst_mac_2, dst_mac_1, dst_mac_0;
218         u8 src_mac_1, src_mac_0, dst_mac_5, dst_mac_4;
219         u8 src_mac_5, src_mac_4, src_mac_3, src_mac_2;
220 #endif
221 };
222
223
224 #define rx_desc_phys(port, n)   ((port)->desc_tab_phys +                \
225                                  (n) * sizeof(struct desc))
226 #define rx_desc_ptr(port, n)    (&(port)->desc_tab[n])
227
228 #define tx_desc_phys(port, n)   ((port)->desc_tab_phys +                \
229                                  ((n) + RX_DESCS) * sizeof(struct desc))
230 #define tx_desc_ptr(port, n)    (&(port)->desc_tab[(n) + RX_DESCS])
231
232 #ifndef __ARMEB__
233 static inline void memcpy_swab32(u32 *dest, u32 *src, int cnt)
234 {
235         int i;
236         for (i = 0; i < cnt; i++)
237                 dest[i] = swab32(src[i]);
238 }
239 #endif
240
241 static spinlock_t mdio_lock;
242 static struct eth_regs __iomem *mdio_regs; /* mdio command and status only */
243 struct mii_bus *mdio_bus;
244 static int ports_open;
245 static struct port *npe_port_tab[MAX_NPES];
246 static struct dma_pool *dma_pool;
247
248
249 static int ixp4xx_mdio_cmd(struct mii_bus *bus, int phy_id, int location,
250                            int write, u16 cmd)
251 {
252         int cycles = 0;
253
254         if (__raw_readl(&mdio_regs->mdio_command[3]) & 0x80) {
255                 printk(KERN_ERR "%s: MII not ready to transmit\n", bus->name);
256                 return -1;
257         }
258
259         if (write) {
260                 __raw_writel(cmd & 0xFF, &mdio_regs->mdio_command[0]);
261                 __raw_writel(cmd >> 8, &mdio_regs->mdio_command[1]);
262         }
263         __raw_writel(((phy_id << 5) | location) & 0xFF,
264                      &mdio_regs->mdio_command[2]);
265         __raw_writel((phy_id >> 3) | (write << 2) | 0x80 /* GO */,
266                      &mdio_regs->mdio_command[3]);
267
268         while ((cycles < MAX_MDIO_RETRIES) &&
269                (__raw_readl(&mdio_regs->mdio_command[3]) & 0x80)) {
270                 udelay(1);
271                 cycles++;
272         }
273
274         if (cycles == MAX_MDIO_RETRIES) {
275                 printk(KERN_ERR "%s #%i: MII write failed\n", bus->name,
276                        phy_id);
277                 return -1;
278         }
279
280 #if DEBUG_MDIO
281         printk(KERN_DEBUG "%s #%i: mdio_%s() took %i cycles\n", bus->name,
282                phy_id, write ? "write" : "read", cycles);
283 #endif
284
285         if (write)
286                 return 0;
287
288         if (__raw_readl(&mdio_regs->mdio_status[3]) & 0x80) {
289 #if DEBUG_MDIO
290                 printk(KERN_DEBUG "%s #%i: MII read failed\n", bus->name,
291                        phy_id);
292 #endif
293                 return 0xFFFF; /* don't return error */
294         }
295
296         return (__raw_readl(&mdio_regs->mdio_status[0]) & 0xFF) |
297                 ((__raw_readl(&mdio_regs->mdio_status[1]) & 0xFF) << 8);
298 }
299
300 static int ixp4xx_mdio_read(struct mii_bus *bus, int phy_id, int location)
301 {
302         unsigned long flags;
303         int ret;
304
305         spin_lock_irqsave(&mdio_lock, flags);
306         ret = ixp4xx_mdio_cmd(bus, phy_id, location, 0, 0);
307         spin_unlock_irqrestore(&mdio_lock, flags);
308 #if DEBUG_MDIO
309         printk(KERN_DEBUG "%s #%i: MII read [%i] -> 0x%X\n", bus->name,
310                phy_id, location, ret);
311 #endif
312         return ret;
313 }
314
315 static int ixp4xx_mdio_write(struct mii_bus *bus, int phy_id, int location,
316                              u16 val)
317 {
318         unsigned long flags;
319         int ret;
320
321         spin_lock_irqsave(&mdio_lock, flags);
322         ret = ixp4xx_mdio_cmd(bus, phy_id, location, 1, val);
323         spin_unlock_irqrestore(&mdio_lock, flags);
324 #if DEBUG_MDIO
325         printk(KERN_DEBUG "%s #%i: MII write [%i] <- 0x%X, err = %i\n",
326                bus->name, phy_id, location, val, ret);
327 #endif
328         return ret;
329 }
330
331 static int ixp4xx_mdio_register(void)
332 {
333         int err;
334
335         if (!(mdio_bus = mdiobus_alloc()))
336                 return -ENOMEM;
337
338         if (cpu_is_ixp43x()) {
339                 /* IXP43x lacks NPE-B and uses NPE-C for MII PHY access */
340                 if (!(ixp4xx_read_feature_bits() & IXP4XX_FEATURE_NPEC_ETH))
341                         return -ENODEV;
342                 mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthC_BASE_VIRT;
343         } else {
344                 /* All MII PHY accesses use NPE-B Ethernet registers */
345                 if (!(ixp4xx_read_feature_bits() & IXP4XX_FEATURE_NPEB_ETH0))
346                         return -ENODEV;
347                 mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT;
348         }
349
350         __raw_writel(DEFAULT_CORE_CNTRL, &mdio_regs->core_control);
351         spin_lock_init(&mdio_lock);
352         mdio_bus->name = "IXP4xx MII Bus";
353         mdio_bus->read = &ixp4xx_mdio_read;
354         mdio_bus->write = &ixp4xx_mdio_write;
355         strcpy(mdio_bus->id, "0");
356
357         if ((err = mdiobus_register(mdio_bus)))
358                 mdiobus_free(mdio_bus);
359         return err;
360 }
361
362 static void ixp4xx_mdio_remove(void)
363 {
364         mdiobus_unregister(mdio_bus);
365         mdiobus_free(mdio_bus);
366 }
367
368
369 static void ixp4xx_adjust_link(struct net_device *dev)
370 {
371         struct port *port = netdev_priv(dev);
372         struct phy_device *phydev = port->phydev;
373
374         if (!phydev->link) {
375                 if (port->speed) {
376                         port->speed = 0;
377                         printk(KERN_INFO "%s: link down\n", dev->name);
378                 }
379                 return;
380         }
381
382         if (port->speed == phydev->speed && port->duplex == phydev->duplex)
383                 return;
384
385         port->speed = phydev->speed;
386         port->duplex = phydev->duplex;
387
388         if (port->duplex)
389                 __raw_writel(DEFAULT_TX_CNTRL0 & ~TX_CNTRL0_HALFDUPLEX,
390                              &port->regs->tx_control[0]);
391         else
392                 __raw_writel(DEFAULT_TX_CNTRL0 | TX_CNTRL0_HALFDUPLEX,
393                              &port->regs->tx_control[0]);
394
395         printk(KERN_INFO "%s: link up, speed %u Mb/s, %s duplex\n",
396                dev->name, port->speed, port->duplex ? "full" : "half");
397 }
398
399
400 static inline void debug_pkt(struct net_device *dev, const char *func,
401                              u8 *data, int len)
402 {
403 #if DEBUG_PKT_BYTES
404         int i;
405
406         printk(KERN_DEBUG "%s: %s(%i) ", dev->name, func, len);
407         for (i = 0; i < len; i++) {
408                 if (i >= DEBUG_PKT_BYTES)
409                         break;
410                 printk("%s%02X",
411                        ((i == 6) || (i == 12) || (i >= 14)) ? " " : "",
412                        data[i]);
413         }
414         printk("\n");
415 #endif
416 }
417
418
419 static inline void debug_desc(u32 phys, struct desc *desc)
420 {
421 #if DEBUG_DESC
422         printk(KERN_DEBUG "%X: %X %3X %3X %08X %2X < %2X %4X %X"
423                " %X %X %02X%02X%02X%02X%02X%02X < %02X%02X%02X%02X%02X%02X\n",
424                phys, desc->next, desc->buf_len, desc->pkt_len,
425                desc->data, desc->dest_id, desc->src_id, desc->flags,
426                desc->qos, desc->padlen, desc->vlan_tci,
427                desc->dst_mac_0, desc->dst_mac_1, desc->dst_mac_2,
428                desc->dst_mac_3, desc->dst_mac_4, desc->dst_mac_5,
429                desc->src_mac_0, desc->src_mac_1, desc->src_mac_2,
430                desc->src_mac_3, desc->src_mac_4, desc->src_mac_5);
431 #endif
432 }
433
434 static inline int queue_get_desc(unsigned int queue, struct port *port,
435                                  int is_tx)
436 {
437         u32 phys, tab_phys, n_desc;
438         struct desc *tab;
439
440         if (!(phys = qmgr_get_entry(queue)))
441                 return -1;
442
443         phys &= ~0x1F; /* mask out non-address bits */
444         tab_phys = is_tx ? tx_desc_phys(port, 0) : rx_desc_phys(port, 0);
445         tab = is_tx ? tx_desc_ptr(port, 0) : rx_desc_ptr(port, 0);
446         n_desc = (phys - tab_phys) / sizeof(struct desc);
447         BUG_ON(n_desc >= (is_tx ? TX_DESCS : RX_DESCS));
448         debug_desc(phys, &tab[n_desc]);
449         BUG_ON(tab[n_desc].next);
450         return n_desc;
451 }
452
453 static inline void queue_put_desc(unsigned int queue, u32 phys,
454                                   struct desc *desc)
455 {
456         debug_desc(phys, desc);
457         BUG_ON(phys & 0x1F);
458         qmgr_put_entry(queue, phys);
459         /* Don't check for queue overflow here, we've allocated sufficient
460            length and queues >= 32 don't support this check anyway. */
461 }
462
463
464 static inline void dma_unmap_tx(struct port *port, struct desc *desc)
465 {
466 #ifdef __ARMEB__
467         dma_unmap_single(&port->netdev->dev, desc->data,
468                          desc->buf_len, DMA_TO_DEVICE);
469 #else
470         dma_unmap_single(&port->netdev->dev, desc->data & ~3,
471                          ALIGN((desc->data & 3) + desc->buf_len, 4),
472                          DMA_TO_DEVICE);
473 #endif
474 }
475
476
477 static void eth_rx_irq(void *pdev)
478 {
479         struct net_device *dev = pdev;
480         struct port *port = netdev_priv(dev);
481
482 #if DEBUG_RX
483         printk(KERN_DEBUG "%s: eth_rx_irq\n", dev->name);
484 #endif
485         qmgr_disable_irq(port->plat->rxq);
486         napi_schedule(&port->napi);
487 }
488
489 static int eth_poll(struct napi_struct *napi, int budget)
490 {
491         struct port *port = container_of(napi, struct port, napi);
492         struct net_device *dev = port->netdev;
493         unsigned int rxq = port->plat->rxq, rxfreeq = RXFREE_QUEUE(port->id);
494         int received = 0;
495
496 #if DEBUG_RX
497         printk(KERN_DEBUG "%s: eth_poll\n", dev->name);
498 #endif
499
500         while (received < budget) {
501                 struct sk_buff *skb;
502                 struct desc *desc;
503                 int n;
504 #ifdef __ARMEB__
505                 struct sk_buff *temp;
506                 u32 phys;
507 #endif
508
509                 if ((n = queue_get_desc(rxq, port, 0)) < 0) {
510 #if DEBUG_RX
511                         printk(KERN_DEBUG "%s: eth_poll napi_complete\n",
512                                dev->name);
513 #endif
514                         napi_complete(napi);
515                         qmgr_enable_irq(rxq);
516                         if (!qmgr_stat_below_low_watermark(rxq) &&
517                             napi_reschedule(napi)) { /* not empty again */
518 #if DEBUG_RX
519                                 printk(KERN_DEBUG "%s: eth_poll"
520                                        " napi_reschedule successed\n",
521                                        dev->name);
522 #endif
523                                 qmgr_disable_irq(rxq);
524                                 continue;
525                         }
526 #if DEBUG_RX
527                         printk(KERN_DEBUG "%s: eth_poll all done\n",
528                                dev->name);
529 #endif
530                         return received; /* all work done */
531                 }
532
533                 desc = rx_desc_ptr(port, n);
534
535 #ifdef __ARMEB__
536                 if ((skb = netdev_alloc_skb(dev, RX_BUFF_SIZE))) {
537                         phys = dma_map_single(&dev->dev, skb->data,
538                                               RX_BUFF_SIZE, DMA_FROM_DEVICE);
539                         if (dma_mapping_error(&dev->dev, phys)) {
540                                 dev_kfree_skb(skb);
541                                 skb = NULL;
542                         }
543                 }
544 #else
545                 skb = netdev_alloc_skb(dev,
546                                        ALIGN(NET_IP_ALIGN + desc->pkt_len, 4));
547 #endif
548
549                 if (!skb) {
550                         dev->stats.rx_dropped++;
551                         /* put the desc back on RX-ready queue */
552                         desc->buf_len = MAX_MRU;
553                         desc->pkt_len = 0;
554                         queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc);
555                         continue;
556                 }
557
558                 /* process received frame */
559 #ifdef __ARMEB__
560                 temp = skb;
561                 skb = port->rx_buff_tab[n];
562                 dma_unmap_single(&dev->dev, desc->data - NET_IP_ALIGN,
563                                  RX_BUFF_SIZE, DMA_FROM_DEVICE);
564 #else
565                 dma_sync_single_for_cpu(&dev->dev, desc->data - NET_IP_ALIGN,
566                                         RX_BUFF_SIZE, DMA_FROM_DEVICE);
567                 memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n],
568                               ALIGN(NET_IP_ALIGN + desc->pkt_len, 4) / 4);
569 #endif
570                 skb_reserve(skb, NET_IP_ALIGN);
571                 skb_put(skb, desc->pkt_len);
572
573                 debug_pkt(dev, "eth_poll", skb->data, skb->len);
574
575                 skb->protocol = eth_type_trans(skb, dev);
576                 dev->stats.rx_packets++;
577                 dev->stats.rx_bytes += skb->len;
578                 netif_receive_skb(skb);
579
580                 /* put the new buffer on RX-free queue */
581 #ifdef __ARMEB__
582                 port->rx_buff_tab[n] = temp;
583                 desc->data = phys + NET_IP_ALIGN;
584 #endif
585                 desc->buf_len = MAX_MRU;
586                 desc->pkt_len = 0;
587                 queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc);
588                 received++;
589         }
590
591 #if DEBUG_RX
592         printk(KERN_DEBUG "eth_poll(): end, not all work done\n");
593 #endif
594         return received;                /* not all work done */
595 }
596
597
598 static void eth_txdone_irq(void *unused)
599 {
600         u32 phys;
601
602 #if DEBUG_TX
603         printk(KERN_DEBUG DRV_NAME ": eth_txdone_irq\n");
604 #endif
605         while ((phys = qmgr_get_entry(TXDONE_QUEUE)) != 0) {
606                 u32 npe_id, n_desc;
607                 struct port *port;
608                 struct desc *desc;
609                 int start;
610
611                 npe_id = phys & 3;
612                 BUG_ON(npe_id >= MAX_NPES);
613                 port = npe_port_tab[npe_id];
614                 BUG_ON(!port);
615                 phys &= ~0x1F; /* mask out non-address bits */
616                 n_desc = (phys - tx_desc_phys(port, 0)) / sizeof(struct desc);
617                 BUG_ON(n_desc >= TX_DESCS);
618                 desc = tx_desc_ptr(port, n_desc);
619                 debug_desc(phys, desc);
620
621                 if (port->tx_buff_tab[n_desc]) { /* not the draining packet */
622                         port->netdev->stats.tx_packets++;
623                         port->netdev->stats.tx_bytes += desc->pkt_len;
624
625                         dma_unmap_tx(port, desc);
626 #if DEBUG_TX
627                         printk(KERN_DEBUG "%s: eth_txdone_irq free %p\n",
628                                port->netdev->name, port->tx_buff_tab[n_desc]);
629 #endif
630                         free_buffer_irq(port->tx_buff_tab[n_desc]);
631                         port->tx_buff_tab[n_desc] = NULL;
632                 }
633
634                 start = qmgr_stat_below_low_watermark(port->plat->txreadyq);
635                 queue_put_desc(port->plat->txreadyq, phys, desc);
636                 if (start) { /* TX-ready queue was empty */
637 #if DEBUG_TX
638                         printk(KERN_DEBUG "%s: eth_txdone_irq xmit ready\n",
639                                port->netdev->name);
640 #endif
641                         netif_wake_queue(port->netdev);
642                 }
643         }
644 }
645
646 static int eth_xmit(struct sk_buff *skb, struct net_device *dev)
647 {
648         struct port *port = netdev_priv(dev);
649         unsigned int txreadyq = port->plat->txreadyq;
650         int len, offset, bytes, n;
651         void *mem;
652         u32 phys;
653         struct desc *desc;
654
655 #if DEBUG_TX
656         printk(KERN_DEBUG "%s: eth_xmit\n", dev->name);
657 #endif
658
659         if (unlikely(skb->len > MAX_MRU)) {
660                 dev_kfree_skb(skb);
661                 dev->stats.tx_errors++;
662                 return NETDEV_TX_OK;
663         }
664
665         debug_pkt(dev, "eth_xmit", skb->data, skb->len);
666
667         len = skb->len;
668 #ifdef __ARMEB__
669         offset = 0; /* no need to keep alignment */
670         bytes = len;
671         mem = skb->data;
672 #else
673         offset = (int)skb->data & 3; /* keep 32-bit alignment */
674         bytes = ALIGN(offset + len, 4);
675         if (!(mem = kmalloc(bytes, GFP_ATOMIC))) {
676                 dev_kfree_skb(skb);
677                 dev->stats.tx_dropped++;
678                 return NETDEV_TX_OK;
679         }
680         memcpy_swab32(mem, (u32 *)((int)skb->data & ~3), bytes / 4);
681         dev_kfree_skb(skb);
682 #endif
683
684         phys = dma_map_single(&dev->dev, mem, bytes, DMA_TO_DEVICE);
685         if (dma_mapping_error(&dev->dev, phys)) {
686 #ifdef __ARMEB__
687                 dev_kfree_skb(skb);
688 #else
689                 kfree(mem);
690 #endif
691                 dev->stats.tx_dropped++;
692                 return NETDEV_TX_OK;
693         }
694
695         n = queue_get_desc(txreadyq, port, 1);
696         BUG_ON(n < 0);
697         desc = tx_desc_ptr(port, n);
698
699 #ifdef __ARMEB__
700         port->tx_buff_tab[n] = skb;
701 #else
702         port->tx_buff_tab[n] = mem;
703 #endif
704         desc->data = phys + offset;
705         desc->buf_len = desc->pkt_len = len;
706
707         /* NPE firmware pads short frames with zeros internally */
708         wmb();
709         queue_put_desc(TX_QUEUE(port->id), tx_desc_phys(port, n), desc);
710         dev->trans_start = jiffies;
711
712         if (qmgr_stat_below_low_watermark(txreadyq)) { /* empty */
713 #if DEBUG_TX
714                 printk(KERN_DEBUG "%s: eth_xmit queue full\n", dev->name);
715 #endif
716                 netif_stop_queue(dev);
717                 /* we could miss TX ready interrupt */
718                 /* really empty in fact */
719                 if (!qmgr_stat_below_low_watermark(txreadyq)) {
720 #if DEBUG_TX
721                         printk(KERN_DEBUG "%s: eth_xmit ready again\n",
722                                dev->name);
723 #endif
724                         netif_wake_queue(dev);
725                 }
726         }
727
728 #if DEBUG_TX
729         printk(KERN_DEBUG "%s: eth_xmit end\n", dev->name);
730 #endif
731         return NETDEV_TX_OK;
732 }
733
734
735 static void eth_set_mcast_list(struct net_device *dev)
736 {
737         struct port *port = netdev_priv(dev);
738         struct netdev_hw_addr *ha;
739         u8 diffs[ETH_ALEN], *addr;
740         int i;
741
742         if ((dev->flags & IFF_PROMISC) || netdev_mc_empty(dev)) {
743                 __raw_writel(DEFAULT_RX_CNTRL0 & ~RX_CNTRL0_ADDR_FLTR_EN,
744                              &port->regs->rx_control[0]);
745                 return;
746         }
747
748         memset(diffs, 0, ETH_ALEN);
749
750         addr = NULL;
751         netdev_for_each_mc_addr(ha, dev) {
752                 if (!addr)
753                         addr = ha->addr; /* first MAC address */
754                 for (i = 0; i < ETH_ALEN; i++)
755                         diffs[i] |= addr[i] ^ ha->addr[i];
756         }
757
758         for (i = 0; i < ETH_ALEN; i++) {
759                 __raw_writel(addr[i], &port->regs->mcast_addr[i]);
760                 __raw_writel(~diffs[i], &port->regs->mcast_mask[i]);
761         }
762
763         __raw_writel(DEFAULT_RX_CNTRL0 | RX_CNTRL0_ADDR_FLTR_EN,
764                      &port->regs->rx_control[0]);
765 }
766
767
768 static int eth_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
769 {
770         struct port *port = netdev_priv(dev);
771
772         if (!netif_running(dev))
773                 return -EINVAL;
774         return phy_mii_ioctl(port->phydev, if_mii(req), cmd);
775 }
776
777 /* ethtool support */
778
779 static void ixp4xx_get_drvinfo(struct net_device *dev,
780                                struct ethtool_drvinfo *info)
781 {
782         struct port *port = netdev_priv(dev);
783         strcpy(info->driver, DRV_NAME);
784         snprintf(info->fw_version, sizeof(info->fw_version), "%u:%u:%u:%u",
785                  port->firmware[0], port->firmware[1],
786                  port->firmware[2], port->firmware[3]);
787         strcpy(info->bus_info, "internal");
788 }
789
790 static int ixp4xx_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
791 {
792         struct port *port = netdev_priv(dev);
793         return phy_ethtool_gset(port->phydev, cmd);
794 }
795
796 static int ixp4xx_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
797 {
798         struct port *port = netdev_priv(dev);
799         return phy_ethtool_sset(port->phydev, cmd);
800 }
801
802 static int ixp4xx_nway_reset(struct net_device *dev)
803 {
804         struct port *port = netdev_priv(dev);
805         return phy_start_aneg(port->phydev);
806 }
807
808 static const struct ethtool_ops ixp4xx_ethtool_ops = {
809         .get_drvinfo = ixp4xx_get_drvinfo,
810         .get_settings = ixp4xx_get_settings,
811         .set_settings = ixp4xx_set_settings,
812         .nway_reset = ixp4xx_nway_reset,
813         .get_link = ethtool_op_get_link,
814 };
815
816
817 static int request_queues(struct port *port)
818 {
819         int err;
820
821         err = qmgr_request_queue(RXFREE_QUEUE(port->id), RX_DESCS, 0, 0,
822                                  "%s:RX-free", port->netdev->name);
823         if (err)
824                 return err;
825
826         err = qmgr_request_queue(port->plat->rxq, RX_DESCS, 0, 0,
827                                  "%s:RX", port->netdev->name);
828         if (err)
829                 goto rel_rxfree;
830
831         err = qmgr_request_queue(TX_QUEUE(port->id), TX_DESCS, 0, 0,
832                                  "%s:TX", port->netdev->name);
833         if (err)
834                 goto rel_rx;
835
836         err = qmgr_request_queue(port->plat->txreadyq, TX_DESCS, 0, 0,
837                                  "%s:TX-ready", port->netdev->name);
838         if (err)
839                 goto rel_tx;
840
841         /* TX-done queue handles skbs sent out by the NPEs */
842         if (!ports_open) {
843                 err = qmgr_request_queue(TXDONE_QUEUE, TXDONE_QUEUE_LEN, 0, 0,
844                                          "%s:TX-done", DRV_NAME);
845                 if (err)
846                         goto rel_txready;
847         }
848         return 0;
849
850 rel_txready:
851         qmgr_release_queue(port->plat->txreadyq);
852 rel_tx:
853         qmgr_release_queue(TX_QUEUE(port->id));
854 rel_rx:
855         qmgr_release_queue(port->plat->rxq);
856 rel_rxfree:
857         qmgr_release_queue(RXFREE_QUEUE(port->id));
858         printk(KERN_DEBUG "%s: unable to request hardware queues\n",
859                port->netdev->name);
860         return err;
861 }
862
863 static void release_queues(struct port *port)
864 {
865         qmgr_release_queue(RXFREE_QUEUE(port->id));
866         qmgr_release_queue(port->plat->rxq);
867         qmgr_release_queue(TX_QUEUE(port->id));
868         qmgr_release_queue(port->plat->txreadyq);
869
870         if (!ports_open)
871                 qmgr_release_queue(TXDONE_QUEUE);
872 }
873
874 static int init_queues(struct port *port)
875 {
876         int i;
877
878         if (!ports_open)
879                 if (!(dma_pool = dma_pool_create(DRV_NAME, NULL,
880                                                  POOL_ALLOC_SIZE, 32, 0)))
881                         return -ENOMEM;
882
883         if (!(port->desc_tab = dma_pool_alloc(dma_pool, GFP_KERNEL,
884                                               &port->desc_tab_phys)))
885                 return -ENOMEM;
886         memset(port->desc_tab, 0, POOL_ALLOC_SIZE);
887         memset(port->rx_buff_tab, 0, sizeof(port->rx_buff_tab)); /* tables */
888         memset(port->tx_buff_tab, 0, sizeof(port->tx_buff_tab));
889
890         /* Setup RX buffers */
891         for (i = 0; i < RX_DESCS; i++) {
892                 struct desc *desc = rx_desc_ptr(port, i);
893                 buffer_t *buff; /* skb or kmalloc()ated memory */
894                 void *data;
895 #ifdef __ARMEB__
896                 if (!(buff = netdev_alloc_skb(port->netdev, RX_BUFF_SIZE)))
897                         return -ENOMEM;
898                 data = buff->data;
899 #else
900                 if (!(buff = kmalloc(RX_BUFF_SIZE, GFP_KERNEL)))
901                         return -ENOMEM;
902                 data = buff;
903 #endif
904                 desc->buf_len = MAX_MRU;
905                 desc->data = dma_map_single(&port->netdev->dev, data,
906                                             RX_BUFF_SIZE, DMA_FROM_DEVICE);
907                 if (dma_mapping_error(&port->netdev->dev, desc->data)) {
908                         free_buffer(buff);
909                         return -EIO;
910                 }
911                 desc->data += NET_IP_ALIGN;
912                 port->rx_buff_tab[i] = buff;
913         }
914
915         return 0;
916 }
917
918 static void destroy_queues(struct port *port)
919 {
920         int i;
921
922         if (port->desc_tab) {
923                 for (i = 0; i < RX_DESCS; i++) {
924                         struct desc *desc = rx_desc_ptr(port, i);
925                         buffer_t *buff = port->rx_buff_tab[i];
926                         if (buff) {
927                                 dma_unmap_single(&port->netdev->dev,
928                                                  desc->data - NET_IP_ALIGN,
929                                                  RX_BUFF_SIZE, DMA_FROM_DEVICE);
930                                 free_buffer(buff);
931                         }
932                 }
933                 for (i = 0; i < TX_DESCS; i++) {
934                         struct desc *desc = tx_desc_ptr(port, i);
935                         buffer_t *buff = port->tx_buff_tab[i];
936                         if (buff) {
937                                 dma_unmap_tx(port, desc);
938                                 free_buffer(buff);
939                         }
940                 }
941                 dma_pool_free(dma_pool, port->desc_tab, port->desc_tab_phys);
942                 port->desc_tab = NULL;
943         }
944
945         if (!ports_open && dma_pool) {
946                 dma_pool_destroy(dma_pool);
947                 dma_pool = NULL;
948         }
949 }
950
951 static int eth_open(struct net_device *dev)
952 {
953         struct port *port = netdev_priv(dev);
954         struct npe *npe = port->npe;
955         struct msg msg;
956         int i, err;
957
958         if (!npe_running(npe)) {
959                 err = npe_load_firmware(npe, npe_name(npe), &dev->dev);
960                 if (err)
961                         return err;
962
963                 if (npe_recv_message(npe, &msg, "ETH_GET_STATUS")) {
964                         printk(KERN_ERR "%s: %s not responding\n", dev->name,
965                                npe_name(npe));
966                         return -EIO;
967                 }
968                 port->firmware[0] = msg.byte4;
969                 port->firmware[1] = msg.byte5;
970                 port->firmware[2] = msg.byte6;
971                 port->firmware[3] = msg.byte7;
972         }
973
974         memset(&msg, 0, sizeof(msg));
975         msg.cmd = NPE_VLAN_SETRXQOSENTRY;
976         msg.eth_id = port->id;
977         msg.byte5 = port->plat->rxq | 0x80;
978         msg.byte7 = port->plat->rxq << 4;
979         for (i = 0; i < 8; i++) {
980                 msg.byte3 = i;
981                 if (npe_send_recv_message(port->npe, &msg, "ETH_SET_RXQ"))
982                         return -EIO;
983         }
984
985         msg.cmd = NPE_EDB_SETPORTADDRESS;
986         msg.eth_id = PHYSICAL_ID(port->id);
987         msg.byte2 = dev->dev_addr[0];
988         msg.byte3 = dev->dev_addr[1];
989         msg.byte4 = dev->dev_addr[2];
990         msg.byte5 = dev->dev_addr[3];
991         msg.byte6 = dev->dev_addr[4];
992         msg.byte7 = dev->dev_addr[5];
993         if (npe_send_recv_message(port->npe, &msg, "ETH_SET_MAC"))
994                 return -EIO;
995
996         memset(&msg, 0, sizeof(msg));
997         msg.cmd = NPE_FW_SETFIREWALLMODE;
998         msg.eth_id = port->id;
999         if (npe_send_recv_message(port->npe, &msg, "ETH_SET_FIREWALL_MODE"))
1000                 return -EIO;
1001
1002         if ((err = request_queues(port)) != 0)
1003                 return err;
1004
1005         if ((err = init_queues(port)) != 0) {
1006                 destroy_queues(port);
1007                 release_queues(port);
1008                 return err;
1009         }
1010
1011         port->speed = 0;        /* force "link up" message */
1012         phy_start(port->phydev);
1013
1014         for (i = 0; i < ETH_ALEN; i++)
1015                 __raw_writel(dev->dev_addr[i], &port->regs->hw_addr[i]);
1016         __raw_writel(0x08, &port->regs->random_seed);
1017         __raw_writel(0x12, &port->regs->partial_empty_threshold);
1018         __raw_writel(0x30, &port->regs->partial_full_threshold);
1019         __raw_writel(0x08, &port->regs->tx_start_bytes);
1020         __raw_writel(0x15, &port->regs->tx_deferral);
1021         __raw_writel(0x08, &port->regs->tx_2part_deferral[0]);
1022         __raw_writel(0x07, &port->regs->tx_2part_deferral[1]);
1023         __raw_writel(0x80, &port->regs->slot_time);
1024         __raw_writel(0x01, &port->regs->int_clock_threshold);
1025
1026         /* Populate queues with buffers, no failure after this point */
1027         for (i = 0; i < TX_DESCS; i++)
1028                 queue_put_desc(port->plat->txreadyq,
1029                                tx_desc_phys(port, i), tx_desc_ptr(port, i));
1030
1031         for (i = 0; i < RX_DESCS; i++)
1032                 queue_put_desc(RXFREE_QUEUE(port->id),
1033                                rx_desc_phys(port, i), rx_desc_ptr(port, i));
1034
1035         __raw_writel(TX_CNTRL1_RETRIES, &port->regs->tx_control[1]);
1036         __raw_writel(DEFAULT_TX_CNTRL0, &port->regs->tx_control[0]);
1037         __raw_writel(0, &port->regs->rx_control[1]);
1038         __raw_writel(DEFAULT_RX_CNTRL0, &port->regs->rx_control[0]);
1039
1040         napi_enable(&port->napi);
1041         eth_set_mcast_list(dev);
1042         netif_start_queue(dev);
1043
1044         qmgr_set_irq(port->plat->rxq, QUEUE_IRQ_SRC_NOT_EMPTY,
1045                      eth_rx_irq, dev);
1046         if (!ports_open) {
1047                 qmgr_set_irq(TXDONE_QUEUE, QUEUE_IRQ_SRC_NOT_EMPTY,
1048                              eth_txdone_irq, NULL);
1049                 qmgr_enable_irq(TXDONE_QUEUE);
1050         }
1051         ports_open++;
1052         /* we may already have RX data, enables IRQ */
1053         napi_schedule(&port->napi);
1054         return 0;
1055 }
1056
1057 static int eth_close(struct net_device *dev)
1058 {
1059         struct port *port = netdev_priv(dev);
1060         struct msg msg;
1061         int buffs = RX_DESCS; /* allocated RX buffers */
1062         int i;
1063
1064         ports_open--;
1065         qmgr_disable_irq(port->plat->rxq);
1066         napi_disable(&port->napi);
1067         netif_stop_queue(dev);
1068
1069         while (queue_get_desc(RXFREE_QUEUE(port->id), port, 0) >= 0)
1070                 buffs--;
1071
1072         memset(&msg, 0, sizeof(msg));
1073         msg.cmd = NPE_SETLOOPBACK_MODE;
1074         msg.eth_id = port->id;
1075         msg.byte3 = 1;
1076         if (npe_send_recv_message(port->npe, &msg, "ETH_ENABLE_LOOPBACK"))
1077                 printk(KERN_CRIT "%s: unable to enable loopback\n", dev->name);
1078
1079         i = 0;
1080         do {                    /* drain RX buffers */
1081                 while (queue_get_desc(port->plat->rxq, port, 0) >= 0)
1082                         buffs--;
1083                 if (!buffs)
1084                         break;
1085                 if (qmgr_stat_empty(TX_QUEUE(port->id))) {
1086                         /* we have to inject some packet */
1087                         struct desc *desc;
1088                         u32 phys;
1089                         int n = queue_get_desc(port->plat->txreadyq, port, 1);
1090                         BUG_ON(n < 0);
1091                         desc = tx_desc_ptr(port, n);
1092                         phys = tx_desc_phys(port, n);
1093                         desc->buf_len = desc->pkt_len = 1;
1094                         wmb();
1095                         queue_put_desc(TX_QUEUE(port->id), phys, desc);
1096                 }
1097                 udelay(1);
1098         } while (++i < MAX_CLOSE_WAIT);
1099
1100         if (buffs)
1101                 printk(KERN_CRIT "%s: unable to drain RX queue, %i buffer(s)"
1102                        " left in NPE\n", dev->name, buffs);
1103 #if DEBUG_CLOSE
1104         if (!buffs)
1105                 printk(KERN_DEBUG "Draining RX queue took %i cycles\n", i);
1106 #endif
1107
1108         buffs = TX_DESCS;
1109         while (queue_get_desc(TX_QUEUE(port->id), port, 1) >= 0)
1110                 buffs--; /* cancel TX */
1111
1112         i = 0;
1113         do {
1114                 while (queue_get_desc(port->plat->txreadyq, port, 1) >= 0)
1115                         buffs--;
1116                 if (!buffs)
1117                         break;
1118         } while (++i < MAX_CLOSE_WAIT);
1119
1120         if (buffs)
1121                 printk(KERN_CRIT "%s: unable to drain TX queue, %i buffer(s) "
1122                        "left in NPE\n", dev->name, buffs);
1123 #if DEBUG_CLOSE
1124         if (!buffs)
1125                 printk(KERN_DEBUG "Draining TX queues took %i cycles\n", i);
1126 #endif
1127
1128         msg.byte3 = 0;
1129         if (npe_send_recv_message(port->npe, &msg, "ETH_DISABLE_LOOPBACK"))
1130                 printk(KERN_CRIT "%s: unable to disable loopback\n",
1131                        dev->name);
1132
1133         phy_stop(port->phydev);
1134
1135         if (!ports_open)
1136                 qmgr_disable_irq(TXDONE_QUEUE);
1137         destroy_queues(port);
1138         release_queues(port);
1139         return 0;
1140 }
1141
1142 static const struct net_device_ops ixp4xx_netdev_ops = {
1143         .ndo_open = eth_open,
1144         .ndo_stop = eth_close,
1145         .ndo_start_xmit = eth_xmit,
1146         .ndo_set_multicast_list = eth_set_mcast_list,
1147         .ndo_do_ioctl = eth_ioctl,
1148         .ndo_change_mtu = eth_change_mtu,
1149         .ndo_set_mac_address = eth_mac_addr,
1150         .ndo_validate_addr = eth_validate_addr,
1151 };
1152
1153 static int __devinit eth_init_one(struct platform_device *pdev)
1154 {
1155         struct port *port;
1156         struct net_device *dev;
1157         struct eth_plat_info *plat = pdev->dev.platform_data;
1158         u32 regs_phys;
1159         char phy_id[MII_BUS_ID_SIZE + 3];
1160         int err;
1161
1162         if (!(dev = alloc_etherdev(sizeof(struct port))))
1163                 return -ENOMEM;
1164
1165         SET_NETDEV_DEV(dev, &pdev->dev);
1166         port = netdev_priv(dev);
1167         port->netdev = dev;
1168         port->id = pdev->id;
1169
1170         switch (port->id) {
1171         case IXP4XX_ETH_NPEA:
1172                 port->regs = (struct eth_regs __iomem *)IXP4XX_EthA_BASE_VIRT;
1173                 regs_phys  = IXP4XX_EthA_BASE_PHYS;
1174                 break;
1175         case IXP4XX_ETH_NPEB:
1176                 port->regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT;
1177                 regs_phys  = IXP4XX_EthB_BASE_PHYS;
1178                 break;
1179         case IXP4XX_ETH_NPEC:
1180                 port->regs = (struct eth_regs __iomem *)IXP4XX_EthC_BASE_VIRT;
1181                 regs_phys  = IXP4XX_EthC_BASE_PHYS;
1182                 break;
1183         default:
1184                 err = -ENODEV;
1185                 goto err_free;
1186         }
1187
1188         dev->netdev_ops = &ixp4xx_netdev_ops;
1189         dev->ethtool_ops = &ixp4xx_ethtool_ops;
1190         dev->tx_queue_len = 100;
1191
1192         netif_napi_add(dev, &port->napi, eth_poll, NAPI_WEIGHT);
1193
1194         if (!(port->npe = npe_request(NPE_ID(port->id)))) {
1195                 err = -EIO;
1196                 goto err_free;
1197         }
1198
1199         port->mem_res = request_mem_region(regs_phys, REGS_SIZE, dev->name);
1200         if (!port->mem_res) {
1201                 err = -EBUSY;
1202                 goto err_npe_rel;
1203         }
1204
1205         port->plat = plat;
1206         npe_port_tab[NPE_ID(port->id)] = port;
1207         memcpy(dev->dev_addr, plat->hwaddr, ETH_ALEN);
1208
1209         platform_set_drvdata(pdev, dev);
1210
1211         __raw_writel(DEFAULT_CORE_CNTRL | CORE_RESET,
1212                      &port->regs->core_control);
1213         udelay(50);
1214         __raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control);
1215         udelay(50);
1216
1217         snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, "0", plat->phy);
1218         port->phydev = phy_connect(dev, phy_id, &ixp4xx_adjust_link, 0,
1219                                    PHY_INTERFACE_MODE_MII);
1220         if ((err = IS_ERR(port->phydev)))
1221                 goto err_free_mem;
1222
1223         port->phydev->irq = PHY_POLL;
1224
1225         if ((err = register_netdev(dev)))
1226                 goto err_phy_dis;
1227
1228         printk(KERN_INFO "%s: MII PHY %i on %s\n", dev->name, plat->phy,
1229                npe_name(port->npe));
1230
1231         return 0;
1232
1233 err_phy_dis:
1234         phy_disconnect(port->phydev);
1235 err_free_mem:
1236         npe_port_tab[NPE_ID(port->id)] = NULL;
1237         platform_set_drvdata(pdev, NULL);
1238         release_resource(port->mem_res);
1239 err_npe_rel:
1240         npe_release(port->npe);
1241 err_free:
1242         free_netdev(dev);
1243         return err;
1244 }
1245
1246 static int __devexit eth_remove_one(struct platform_device *pdev)
1247 {
1248         struct net_device *dev = platform_get_drvdata(pdev);
1249         struct port *port = netdev_priv(dev);
1250
1251         unregister_netdev(dev);
1252         phy_disconnect(port->phydev);
1253         npe_port_tab[NPE_ID(port->id)] = NULL;
1254         platform_set_drvdata(pdev, NULL);
1255         npe_release(port->npe);
1256         release_resource(port->mem_res);
1257         free_netdev(dev);
1258         return 0;
1259 }
1260
1261 static struct platform_driver ixp4xx_eth_driver = {
1262         .driver.name    = DRV_NAME,
1263         .probe          = eth_init_one,
1264         .remove         = eth_remove_one,
1265 };
1266
1267 static int __init eth_init_module(void)
1268 {
1269         int err;
1270         if ((err = ixp4xx_mdio_register()))
1271                 return err;
1272         return platform_driver_register(&ixp4xx_eth_driver);
1273 }
1274
1275 static void __exit eth_cleanup_module(void)
1276 {
1277         platform_driver_unregister(&ixp4xx_eth_driver);
1278         ixp4xx_mdio_remove();
1279 }
1280
1281 MODULE_AUTHOR("Krzysztof Halasa");
1282 MODULE_DESCRIPTION("Intel IXP4xx Ethernet driver");
1283 MODULE_LICENSE("GPL v2");
1284 MODULE_ALIAS("platform:ixp4xx_eth");
1285 module_init(eth_init_module);
1286 module_exit(eth_cleanup_module);