drivers/mtd/nand/nandsim.c

   1 /*
   2  * NAND flash simulator.
   3  *
   4  * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
   5  *
   6  * Copyright (C) 2004 Nokia Corporation
   7  *
   8  * Note: NS means "NAND Simulator".
   9  * Note: Input means input TO flash chip, output means output FROM chip.
  10  *
  11  * This program is free software; you can redistribute it and/or modify it
  12  * under the terms of the GNU General Public License as published by the
  13  * Free Software Foundation; either version 2, or (at your option) any later
  14  * version.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
  19  * Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  24  *
  25  * $Id: nandsim.c,v 1.8 2005/03/19 15:33:56 dedekind Exp $
  26  */
  27
  28 #include <linux/init.h>
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/moduleparam.h>
  32 #include <linux/vmalloc.h>
  33 #include <linux/slab.h>
  34 #include <linux/errno.h>
  35 #include <linux/string.h>
  36 #include <linux/mtd/mtd.h>
  37 #include <linux/mtd/nand.h>
  38 #include <linux/mtd/partitions.h>
  39 #include <linux/delay.h>
  40 #include <linux/list.h>
  41 #include <linux/random.h>
  42
  43 /* Default simulator parameters values */
  44 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE)  || \
  45     !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
  46     !defined(CONFIG_NANDSIM_THIRD_ID_BYTE)  || \
  47     !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
  48 #define CONFIG_NANDSIM_FIRST_ID_BYTE  0x98
  49 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
  50 #define CONFIG_NANDSIM_THIRD_ID_BYTE  0xFF /* No byte */
  51 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
  52 #endif
  53
  54 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
  55 #define CONFIG_NANDSIM_ACCESS_DELAY 25
  56 #endif
  57 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
  58 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
  59 #endif
  60 #ifndef CONFIG_NANDSIM_ERASE_DELAY
  61 #define CONFIG_NANDSIM_ERASE_DELAY 2
  62 #endif
  63 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
  64 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
  65 #endif
  66 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
  67 #define CONFIG_NANDSIM_INPUT_CYCLE  50
  68 #endif
  69 #ifndef CONFIG_NANDSIM_BUS_WIDTH
  70 #define CONFIG_NANDSIM_BUS_WIDTH  8
  71 #endif
  72 #ifndef CONFIG_NANDSIM_DO_DELAYS
  73 #define CONFIG_NANDSIM_DO_DELAYS  0
  74 #endif
  75 #ifndef CONFIG_NANDSIM_LOG
  76 #define CONFIG_NANDSIM_LOG        0
  77 #endif
  78 #ifndef CONFIG_NANDSIM_DBG
  79 #define CONFIG_NANDSIM_DBG        0
  80 #endif
  81
  82 static uint first_id_byte  = CONFIG_NANDSIM_FIRST_ID_BYTE;
  83 static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
  84 static uint third_id_byte  = CONFIG_NANDSIM_THIRD_ID_BYTE;
  85 static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
  86 static uint access_delay   = CONFIG_NANDSIM_ACCESS_DELAY;
  87 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
  88 static uint erase_delay    = CONFIG_NANDSIM_ERASE_DELAY;
  89 static uint output_cycle   = CONFIG_NANDSIM_OUTPUT_CYCLE;
  90 static uint input_cycle    = CONFIG_NANDSIM_INPUT_CYCLE;
  91 static uint bus_width      = CONFIG_NANDSIM_BUS_WIDTH;
  92 static uint do_delays      = CONFIG_NANDSIM_DO_DELAYS;
  93 static uint log            = CONFIG_NANDSIM_LOG;
  94 static uint dbg            = CONFIG_NANDSIM_DBG;
  95 static unsigned long parts[MAX_MTD_DEVICES];
  96 static unsigned int parts_num;
  97 static char *badblocks = NULL;
  98 static char *weakblocks = NULL;
  99 static char *weakpages = NULL;
 100 static unsigned int bitflips = 0;
 101 static char *gravepages = NULL;
 102 static unsigned int rptwear = 0;
 103 static unsigned int overridesize = 0;
 104
 105 module_param(first_id_byte,  uint, 0400);
 106 module_param(second_id_byte, uint, 0400);
 107 module_param(third_id_byte,  uint, 0400);
 108 module_param(fourth_id_byte, uint, 0400);
 109 module_param(access_delay,   uint, 0400);
 110 module_param(programm_delay, uint, 0400);
 111 module_param(erase_delay,    uint, 0400);
 112 module_param(output_cycle,   uint, 0400);
 113 module_param(input_cycle,    uint, 0400);
 114 module_param(bus_width,      uint, 0400);
 115 module_param(do_delays,      uint, 0400);
 116 module_param(log,            uint, 0400);
 117 module_param(dbg,            uint, 0400);
 118 module_param_array(parts, ulong, &parts_num, 0400);
 119 module_param(badblocks,      charp, 0400);
 120 module_param(weakblocks,     charp, 0400);
 121 module_param(weakpages,      charp, 0400);
 122 module_param(bitflips,       uint, 0400);
 123 module_param(gravepages,     charp, 0400);
 124 module_param(rptwear,        uint, 0400);
 125 module_param(overridesize,   uint, 0400);
 126
 127 MODULE_PARM_DESC(first_id_byte,  "The first byte returned by NAND Flash 'read ID' command (manufacturer ID)");
 128 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
 129 MODULE_PARM_DESC(third_id_byte,  "The third byte returned by NAND Flash 'read ID' command");
 130 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
 131 MODULE_PARM_DESC(access_delay,   "Initial page access delay (microiseconds)");
 132 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
 133 MODULE_PARM_DESC(erase_delay,    "Sector erase delay (milliseconds)");
 134 MODULE_PARM_DESC(output_cycle,   "Word output (from flash) time (nanodeconds)");
 135 MODULE_PARM_DESC(input_cycle,    "Word input (to flash) time (nanodeconds)");
 136 MODULE_PARM_DESC(bus_width,      "Chip's bus width (8- or 16-bit)");
 137 MODULE_PARM_DESC(do_delays,      "Simulate NAND delays using busy-waits if not zero");
 138 MODULE_PARM_DESC(log,            "Perform logging if not zero");
 139 MODULE_PARM_DESC(dbg,            "Output debug information if not zero");
 140 MODULE_PARM_DESC(parts,          "Partition sizes (in erase blocks) separated by commas");
 141 /* Page and erase block positions for the following parameters are independent of any partitions */
 142 MODULE_PARM_DESC(badblocks,      "Erase blocks that are initially marked bad, separated by commas");
 143 MODULE_PARM_DESC(weakblocks,     "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
 144                                  " separated by commas e.g. 113:2 means eb 113"
 145                                  " can be erased only twice before failing");
 146 MODULE_PARM_DESC(weakpages,      "Weak pages [: maximum writes (defaults to 3)]"
 147                                  " separated by commas e.g. 1401:2 means page 1401"
 148                                  " can be written only twice before failing");
 149 MODULE_PARM_DESC(bitflips,       "Maximum number of random bit flips per page (zero by default)");
 150 MODULE_PARM_DESC(gravepages,     "Pages that lose data [: maximum reads (defaults to 3)]"
 151                                  " separated by commas e.g. 1401:2 means page 1401"
 152                                  " can be read only twice before failing");
 153 MODULE_PARM_DESC(rptwear,        "Number of erases inbetween reporting wear, if not zero");
 154 MODULE_PARM_DESC(overridesize,   "Specifies the NAND Flash size overriding the ID bytes. "
 155                                  "The size is specified in erase blocks and as the exponent of a power of two"
 156                                  " e.g. 5 means a size of 32 erase blocks");
 157
 158 /* The largest possible page size */
 159 #define NS_LARGEST_PAGE_SIZE    2048
 160
 161 /* The prefix for simulator output */
 162 #define NS_OUTPUT_PREFIX "[nandsim]"
 163
 164 /* Simulator's output macros (logging, debugging, warning, error) */
 165 #define NS_LOG(args...) \
 166         do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
 167 #define NS_DBG(args...) \
 168         do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
 169 #define NS_WARN(args...) \
 170         do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
 171 #define NS_ERR(args...) \
 172         do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
 173 #define NS_INFO(args...) \
 174         do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
 175
 176 /* Busy-wait delay macros (microseconds, milliseconds) */
 177 #define NS_UDELAY(us) \
 178         do { if (do_delays) udelay(us); } while(0)
 179 #define NS_MDELAY(us) \
 180         do { if (do_delays) mdelay(us); } while(0)
 181
 182 /* Is the nandsim structure initialized ? */
 183 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
 184
 185 /* Good operation completion status */
 186 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
 187
 188 /* Operation failed completion status */
 189 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
 190
 191 /* Calculate the page offset in flash RAM image by (row, column) address */
 192 #define NS_RAW_OFFSET(ns) \
 193         (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column)
 194
 195 /* Calculate the OOB offset in flash RAM image by (row, column) address */
 196 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
 197
 198 /* After a command is input, the simulator goes to one of the following states */
 199 #define STATE_CMD_READ0        0x00000001 /* read data from the beginning of page */
 200 #define STATE_CMD_READ1        0x00000002 /* read data from the second half of page */
 201 #define STATE_CMD_READSTART    0x00000003 /* read data second command (large page devices) */
 202 #define STATE_CMD_PAGEPROG     0x00000004 /* start page programm */
 203 #define STATE_CMD_READOOB      0x00000005 /* read OOB area */
 204 #define STATE_CMD_ERASE1       0x00000006 /* sector erase first command */
 205 #define STATE_CMD_STATUS       0x00000007 /* read status */
 206 #define STATE_CMD_STATUS_M     0x00000008 /* read multi-plane status (isn't implemented) */
 207 #define STATE_CMD_SEQIN        0x00000009 /* sequential data imput */
 208 #define STATE_CMD_READID       0x0000000A /* read ID */
 209 #define STATE_CMD_ERASE2       0x0000000B /* sector erase second command */
 210 #define STATE_CMD_RESET        0x0000000C /* reset */
 211 #define STATE_CMD_MASK         0x0000000F /* command states mask */
 212
 213 /* After an address is input, the simulator goes to one of these states */
 214 #define STATE_ADDR_PAGE        0x00000010 /* full (row, column) address is accepted */
 215 #define STATE_ADDR_SEC         0x00000020 /* sector address was accepted */
 216 #define STATE_ADDR_ZERO        0x00000030 /* one byte zero address was accepted */
 217 #define STATE_ADDR_MASK        0x00000030 /* address states mask */
 218
 219 /* Durind data input/output the simulator is in these states */
 220 #define STATE_DATAIN           0x00000100 /* waiting for data input */
 221 #define STATE_DATAIN_MASK      0x00000100 /* data input states mask */
 222
 223 #define STATE_DATAOUT          0x00001000 /* waiting for page data output */
 224 #define STATE_DATAOUT_ID       0x00002000 /* waiting for ID bytes output */
 225 #define STATE_DATAOUT_STATUS   0x00003000 /* waiting for status output */
 226 #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
 227 #define STATE_DATAOUT_MASK     0x00007000 /* data output states mask */
 228
 229 /* Previous operation is done, ready to accept new requests */
 230 #define STATE_READY            0x00000000
 231
 232 /* This state is used to mark that the next state isn't known yet */
 233 #define STATE_UNKNOWN          0x10000000
 234
 235 /* Simulator's actions bit masks */
 236 #define ACTION_CPY       0x00100000 /* copy page/OOB to the internal buffer */
 237 #define ACTION_PRGPAGE   0x00200000 /* programm the internal buffer to flash */
 238 #define ACTION_SECERASE  0x00300000 /* erase sector */
 239 #define ACTION_ZEROOFF   0x00400000 /* don't add any offset to address */
 240 #define ACTION_HALFOFF   0x00500000 /* add to address half of page */
 241 #define ACTION_OOBOFF    0x00600000 /* add to address OOB offset */
 242 #define ACTION_MASK      0x00700000 /* action mask */
 243
 244 #define NS_OPER_NUM      12 /* Number of operations supported by the simulator */
 245 #define NS_OPER_STATES   6  /* Maximum number of states in operation */
 246
 247 #define OPT_ANY          0xFFFFFFFF /* any chip supports this operation */
 248 #define OPT_PAGE256      0x00000001 /* 256-byte  page chips */
 249 #define OPT_PAGE512      0x00000002 /* 512-byte  page chips */
 250 #define OPT_PAGE2048     0x00000008 /* 2048-byte page chips */
 251 #define OPT_SMARTMEDIA   0x00000010 /* SmartMedia technology chips */
 252 #define OPT_AUTOINCR     0x00000020 /* page number auto inctimentation is possible */
 253 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
 254 #define OPT_LARGEPAGE    (OPT_PAGE2048) /* 2048-byte page chips */
 255 #define OPT_SMALLPAGE    (OPT_PAGE256  | OPT_PAGE512)  /* 256 and 512-byte page chips */
 256
 257 /* Remove action bits ftom state */
 258 #define NS_STATE(x) ((x) & ~ACTION_MASK)
 259
 260 /*
 261  * Maximum previous states which need to be saved. Currently saving is
 262  * only needed for page programm operation with preceeded read command
 263  * (which is only valid for 512-byte pages).
 264  */
 265 #define NS_MAX_PREVSTATES 1
 266
 267 /*
 268  * A union to represent flash memory contents and flash buffer.
 269  */
 270 union ns_mem {
 271         u_char *byte;    /* for byte access */
 272         uint16_t *word;  /* for 16-bit word access */
 273 };
 274
 275 /*
 276  * The structure which describes all the internal simulator data.
 277  */
 278 struct nandsim {
 279         struct mtd_partition partitions[MAX_MTD_DEVICES];
 280         unsigned int nbparts;
 281
 282         uint busw;              /* flash chip bus width (8 or 16) */
 283         u_char ids[4];          /* chip's ID bytes */
 284         uint32_t options;       /* chip's characteristic bits */
 285         uint32_t state;         /* current chip state */
 286         uint32_t nxstate;       /* next expected state */
 287
 288         uint32_t *op;           /* current operation, NULL operations isn't known yet  */
 289         uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
 290         uint16_t npstates;      /* number of previous states saved */
 291         uint16_t stateidx;      /* current state index */
 292
 293         /* The simulated NAND flash pages array */
 294         union ns_mem *pages;
 295
 296         /* Internal buffer of page + OOB size bytes */
 297         union ns_mem buf;
 298
 299         /* NAND flash "geometry" */
 300         struct nandsin_geometry {
 301                 uint64_t totsz;     /* total flash size, bytes */
 302                 uint32_t secsz;     /* flash sector (erase block) size, bytes */
 303                 uint pgsz;          /* NAND flash page size, bytes */
 304                 uint oobsz;         /* page OOB area size, bytes */
 305                 uint64_t totszoob;  /* total flash size including OOB, bytes */
 306                 uint pgszoob;       /* page size including OOB , bytes*/
 307                 uint secszoob;      /* sector size including OOB, bytes */
 308                 uint pgnum;         /* total number of pages */
 309                 uint pgsec;         /* number of pages per sector */
 310                 uint secshift;      /* bits number in sector size */
 311                 uint pgshift;       /* bits number in page size */
 312                 uint oobshift;      /* bits number in OOB size */
 313                 uint pgaddrbytes;   /* bytes per page address */
 314                 uint secaddrbytes;  /* bytes per sector address */
 315                 uint idbytes;       /* the number ID bytes that this chip outputs */
 316         } geom;
 317
 318         /* NAND flash internal registers */
 319         struct nandsim_regs {
 320                 unsigned command; /* the command register */
 321                 u_char   status;  /* the status register */
 322                 uint     row;     /* the page number */
 323                 uint     column;  /* the offset within page */
 324                 uint     count;   /* internal counter */
 325                 uint     num;     /* number of bytes which must be processed */
 326                 uint     off;     /* fixed page offset */
 327         } regs;
 328
 329         /* NAND flash lines state */
 330         struct ns_lines_status {
 331                 int ce;  /* chip Enable */
 332                 int cle; /* command Latch Enable */
 333                 int ale; /* address Latch Enable */
 334                 int wp;  /* write Protect */
 335         } lines;
 336 };
 337
 338 /*
 339  * Operations array. To perform any operation the simulator must pass
 340  * through the correspondent states chain.
 341  */
 342 static struct nandsim_operations {
 343         uint32_t reqopts;  /* options which are required to perform the operation */
 344         uint32_t states[NS_OPER_STATES]; /* operation's states */
 345 } ops[NS_OPER_NUM] = {
 346         /* Read page + OOB from the beginning */
 347         {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
 348                         STATE_DATAOUT, STATE_READY}},
 349         /* Read page + OOB from the second half */
 350         {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
 351                         STATE_DATAOUT, STATE_READY}},
 352         /* Read OOB */
 353         {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
 354                         STATE_DATAOUT, STATE_READY}},
 355         /* Programm page starting from the beginning */
 356         {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
 357                         STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 358         /* Programm page starting from the beginning */
 359         {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
 360                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 361         /* Programm page starting from the second half */
 362         {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
 363                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 364         /* Programm OOB */
 365         {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
 366                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 367         /* Erase sector */
 368         {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
 369         /* Read status */
 370         {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
 371         /* Read multi-plane status */
 372         {OPT_SMARTMEDIA, {STATE_CMD_STATUS_M, STATE_DATAOUT_STATUS_M, STATE_READY}},
 373         /* Read ID */
 374         {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
 375         /* Large page devices read page */
 376         {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
 377                                STATE_DATAOUT, STATE_READY}}
 378 };
 379
 380 struct weak_block {
 381         struct list_head list;
 382         unsigned int erase_block_no;
 383         unsigned int max_erases;
 384         unsigned int erases_done;
 385 };
 386
 387 static LIST_HEAD(weak_blocks);
 388
 389 struct weak_page {
 390         struct list_head list;
 391         unsigned int page_no;
 392         unsigned int max_writes;
 393         unsigned int writes_done;
 394 };
 395
 396 static LIST_HEAD(weak_pages);
 397
 398 struct grave_page {
 399         struct list_head list;
 400         unsigned int page_no;
 401         unsigned int max_reads;
 402         unsigned int reads_done;
 403 };
 404
 405 static LIST_HEAD(grave_pages);
 406
 407 static unsigned long *erase_block_wear = NULL;
 408 static unsigned int wear_eb_count = 0;
 409 static unsigned long total_wear = 0;
 410 static unsigned int rptwear_cnt = 0;
 411
 412 /* MTD structure for NAND controller */
 413 static struct mtd_info *nsmtd;
 414
 415 static u_char ns_verify_buf[NS_LARGEST_PAGE_SIZE];
 416
 417 /*
 418  * Allocate array of page pointers and initialize the array to NULL
 419  * pointers.
 420  *
 421  * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
 422  */
 423 static int alloc_device(struct nandsim *ns)
 424 {
 425         int i;
 426
 427         ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
 428         if (!ns->pages) {
 429                 NS_ERR("alloc_map: unable to allocate page array\n");
 430                 return -ENOMEM;
 431         }
 432         for (i = 0; i < ns->geom.pgnum; i++) {
 433                 ns->pages[i].byte = NULL;
 434         }
 435
 436         return 0;
 437 }
 438
 439 /*
 440  * Free any allocated pages, and free the array of page pointers.
 441  */
 442 static void free_device(struct nandsim *ns)
 443 {
 444         int i;
 445
 446         if (ns->pages) {
 447                 for (i = 0; i < ns->geom.pgnum; i++) {
 448                         if (ns->pages[i].byte)
 449                                 kfree(ns->pages[i].byte);
 450                 }
 451                 vfree(ns->pages);
 452         }
 453 }
 454
 455 static char *get_partition_name(int i)
 456 {
 457         char buf[64];
 458         sprintf(buf, "NAND simulator partition %d", i);
 459         return kstrdup(buf, GFP_KERNEL);
 460 }
 461
 462 static u_int64_t divide(u_int64_t n, u_int32_t d)
 463 {
 464         do_div(n, d);
 465         return n;
 466 }
 467
 468 /*
 469  * Initialize the nandsim structure.
 470  *
 471  * RETURNS: 0 if success, -ERRNO if failure.
 472  */
 473 static int init_nandsim(struct mtd_info *mtd)
 474 {
 475         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
 476         struct nandsim   *ns   = (struct nandsim *)(chip->priv);
 477         int i, ret = 0;
 478         u_int64_t remains;
 479         u_int64_t next_offset;
 480
 481         if (NS_IS_INITIALIZED(ns)) {
 482                 NS_ERR("init_nandsim: nandsim is already initialized\n");
 483                 return -EIO;
 484         }
 485
 486         /* Force mtd to not do delays */
 487         chip->chip_delay = 0;
 488
 489         /* Initialize the NAND flash parameters */
 490         ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
 491         ns->geom.totsz    = mtd->size;
 492         ns->geom.pgsz     = mtd->writesize;
 493         ns->geom.oobsz    = mtd->oobsize;
 494         ns->geom.secsz    = mtd->erasesize;
 495         ns->geom.pgszoob  = ns->geom.pgsz + ns->geom.oobsz;
 496         ns->geom.pgnum    = divide(ns->geom.totsz, ns->geom.pgsz);
 497         ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
 498         ns->geom.secshift = ffs(ns->geom.secsz) - 1;
 499         ns->geom.pgshift  = chip->page_shift;
 500         ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
 501         ns->geom.pgsec    = ns->geom.secsz / ns->geom.pgsz;
 502         ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
 503         ns->options = 0;
 504
 505         if (ns->geom.pgsz == 256) {
 506                 ns->options |= OPT_PAGE256;
 507         }
 508         else if (ns->geom.pgsz == 512) {
 509                 ns->options |= (OPT_PAGE512 | OPT_AUTOINCR);
 510                 if (ns->busw == 8)
 511                         ns->options |= OPT_PAGE512_8BIT;
 512         } else if (ns->geom.pgsz == 2048) {
 513                 ns->options |= OPT_PAGE2048;
 514         } else {
 515                 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
 516                 return -EIO;
 517         }
 518
 519         if (ns->options & OPT_SMALLPAGE) {
 520                 if (ns->geom.totsz <= (32 << 20)) {
 521                         ns->geom.pgaddrbytes  = 3;
 522                         ns->geom.secaddrbytes = 2;
 523                 } else {
 524                         ns->geom.pgaddrbytes  = 4;
 525                         ns->geom.secaddrbytes = 3;
 526                 }
 527         } else {
 528                 if (ns->geom.totsz <= (128 << 20)) {
 529                         ns->geom.pgaddrbytes  = 4;
 530                         ns->geom.secaddrbytes = 2;
 531                 } else {
 532                         ns->geom.pgaddrbytes  = 5;
 533                         ns->geom.secaddrbytes = 3;
 534                 }
 535         }
 536
 537         /* Fill the partition_info structure */
 538         if (parts_num > ARRAY_SIZE(ns->partitions)) {
 539                 NS_ERR("too many partitions.\n");
 540                 ret = -EINVAL;
 541                 goto error;
 542         }
 543         remains = ns->geom.totsz;
 544         next_offset = 0;
 545         for (i = 0; i < parts_num; ++i) {
 546                 u_int64_t part_sz = (u_int64_t)parts[i] * ns->geom.secsz;
 547
 548                 if (!part_sz || part_sz > remains) {
 549                         NS_ERR("bad partition size.\n");
 550                         ret = -EINVAL;
 551                         goto error;
 552                 }
 553                 ns->partitions[i].name   = get_partition_name(i);
 554                 ns->partitions[i].offset = next_offset;
 555                 ns->partitions[i].size   = part_sz;
 556                 next_offset += ns->partitions[i].size;
 557                 remains -= ns->partitions[i].size;
 558         }
 559         ns->nbparts = parts_num;
 560         if (remains) {
 561                 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
 562                         NS_ERR("too many partitions.\n");
 563                         ret = -EINVAL;
 564                         goto error;
 565                 }
 566                 ns->partitions[i].name   = get_partition_name(i);
 567                 ns->partitions[i].offset = next_offset;
 568                 ns->partitions[i].size   = remains;
 569                 ns->nbparts += 1;
 570         }
 571
 572         /* Detect how many ID bytes the NAND chip outputs */
 573         for (i = 0; nand_flash_ids[i].name != NULL; i++) {
 574                 if (second_id_byte != nand_flash_ids[i].id)
 575                         continue;
 576                 if (!(nand_flash_ids[i].options & NAND_NO_AUTOINCR))
 577                         ns->options |= OPT_AUTOINCR;
 578         }
 579
 580         if (ns->busw == 16)
 581                 NS_WARN("16-bit flashes support wasn't tested\n");
 582
 583         printk("flash size: %llu MiB\n",        ns->geom.totsz >> 20);
 584         printk("page size: %u bytes\n",         ns->geom.pgsz);
 585         printk("OOB area size: %u bytes\n",     ns->geom.oobsz);
 586         printk("sector size: %u KiB\n",         ns->geom.secsz >> 10);
 587         printk("pages number: %u\n",            ns->geom.pgnum);
 588         printk("pages per sector: %u\n",        ns->geom.pgsec);
 589         printk("bus width: %u\n",               ns->busw);
 590         printk("bits in sector size: %u\n",     ns->geom.secshift);
 591         printk("bits in page size: %u\n",       ns->geom.pgshift);
 592         printk("bits in OOB size: %u\n",        ns->geom.oobshift);
 593         printk("flash size with OOB: %llu KiB\n", ns->geom.totszoob >> 10);
 594         printk("page address bytes: %u\n",      ns->geom.pgaddrbytes);
 595         printk("sector address bytes: %u\n",    ns->geom.secaddrbytes);
 596         printk("options: %#x\n",                ns->options);
 597
 598         if ((ret = alloc_device(ns)) != 0)
 599                 goto error;
 600
 601         /* Allocate / initialize the internal buffer */
 602         ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
 603         if (!ns->buf.byte) {
 604                 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
 605                         ns->geom.pgszoob);
 606                 ret = -ENOMEM;
 607                 goto error;
 608         }
 609         memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
 610
 611         return 0;
 612
 613 error:
 614         free_device(ns);
 615
 616         return ret;
 617 }
 618
 619 /*
 620  * Free the nandsim structure.
 621  */
 622 static void free_nandsim(struct nandsim *ns)
 623 {
 624         kfree(ns->buf.byte);
 625         free_device(ns);
 626
 627         return;
 628 }
 629
 630 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
 631 {
 632         char *w;
 633         int zero_ok;
 634         unsigned int erase_block_no;
 635         loff_t offset;
 636
 637         if (!badblocks)
 638                 return 0;
 639         w = badblocks;
 640         do {
 641                 zero_ok = (*w == '0' ? 1 : 0);
 642                 erase_block_no = simple_strtoul(w, &w, 0);
 643                 if (!zero_ok && !erase_block_no) {
 644                         NS_ERR("invalid badblocks.\n");
 645                         return -EINVAL;
 646                 }
 647                 offset = erase_block_no * ns->geom.secsz;
 648                 if (mtd->block_markbad(mtd, offset)) {
 649                         NS_ERR("invalid badblocks.\n");
 650                         return -EINVAL;
 651                 }
 652                 if (*w == ',')
 653                         w += 1;
 654         } while (*w);
 655         return 0;
 656 }
 657
 658 static int parse_weakblocks(void)
 659 {
 660         char *w;
 661         int zero_ok;
 662         unsigned int erase_block_no;
 663         unsigned int max_erases;
 664         struct weak_block *wb;
 665
 666         if (!weakblocks)
 667                 return 0;
 668         w = weakblocks;
 669         do {
 670                 zero_ok = (*w == '0' ? 1 : 0);
 671                 erase_block_no = simple_strtoul(w, &w, 0);
 672                 if (!zero_ok && !erase_block_no) {
 673                         NS_ERR("invalid weakblocks.\n");
 674                         return -EINVAL;
 675                 }
 676                 max_erases = 3;
 677                 if (*w == ':') {
 678                         w += 1;
 679                         max_erases = simple_strtoul(w, &w, 0);
 680                 }
 681                 if (*w == ',')
 682                         w += 1;
 683                 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
 684                 if (!wb) {
 685                         NS_ERR("unable to allocate memory.\n");
 686                         return -ENOMEM;
 687                 }
 688                 wb->erase_block_no = erase_block_no;
 689                 wb->max_erases = max_erases;
 690                 list_add(&wb->list, &weak_blocks);
 691         } while (*w);
 692         return 0;
 693 }
 694
 695 static int erase_error(unsigned int erase_block_no)
 696 {
 697         struct weak_block *wb;
 698
 699         list_for_each_entry(wb, &weak_blocks, list)
 700                 if (wb->erase_block_no == erase_block_no) {
 701                         if (wb->erases_done >= wb->max_erases)
 702                                 return 1;
 703                         wb->erases_done += 1;
 704                         return 0;
 705                 }
 706         return 0;
 707 }
 708
 709 static int parse_weakpages(void)
 710 {
 711         char *w;
 712         int zero_ok;
 713         unsigned int page_no;
 714         unsigned int max_writes;
 715         struct weak_page *wp;
 716
 717         if (!weakpages)
 718                 return 0;
 719         w = weakpages;
 720         do {
 721                 zero_ok = (*w == '0' ? 1 : 0);
 722                 page_no = simple_strtoul(w, &w, 0);
 723                 if (!zero_ok && !page_no) {
 724                         NS_ERR("invalid weakpagess.\n");
 725                         return -EINVAL;
 726                 }
 727                 max_writes = 3;
 728                 if (*w == ':') {
 729                         w += 1;
 730                         max_writes = simple_strtoul(w, &w, 0);
 731                 }
 732                 if (*w == ',')
 733                         w += 1;
 734                 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
 735                 if (!wp) {
 736                         NS_ERR("unable to allocate memory.\n");
 737                         return -ENOMEM;
 738                 }
 739                 wp->page_no = page_no;
 740                 wp->max_writes = max_writes;
 741                 list_add(&wp->list, &weak_pages);
 742         } while (*w);
 743         return 0;
 744 }
 745
 746 static int write_error(unsigned int page_no)
 747 {
 748         struct weak_page *wp;
 749
 750         list_for_each_entry(wp, &weak_pages, list)
 751                 if (wp->page_no == page_no) {
 752                         if (wp->writes_done >= wp->max_writes)
 753                                 return 1;
 754                         wp->writes_done += 1;
 755                         return 0;
 756                 }
 757         return 0;
 758 }
 759
 760 static int parse_gravepages(void)
 761 {
 762         char *g;
 763         int zero_ok;
 764         unsigned int page_no;
 765         unsigned int max_reads;
 766         struct grave_page *gp;
 767
 768         if (!gravepages)
 769                 return 0;
 770         g = gravepages;
 771         do {
 772                 zero_ok = (*g == '0' ? 1 : 0);
 773                 page_no = simple_strtoul(g, &g, 0);
 774                 if (!zero_ok && !page_no) {
 775                         NS_ERR("invalid gravepagess.\n");
 776                         return -EINVAL;
 777                 }
 778                 max_reads = 3;
 779                 if (*g == ':') {
 780                         g += 1;
 781                         max_reads = simple_strtoul(g, &g, 0);
 782                 }
 783                 if (*g == ',')
 784                         g += 1;
 785                 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
 786                 if (!gp) {
 787                         NS_ERR("unable to allocate memory.\n");
 788                         return -ENOMEM;
 789                 }
 790                 gp->page_no = page_no;
 791                 gp->max_reads = max_reads;
 792                 list_add(&gp->list, &grave_pages);
 793         } while (*g);
 794         return 0;
 795 }
 796
 797 static int read_error(unsigned int page_no)
 798 {
 799         struct grave_page *gp;
 800
 801         list_for_each_entry(gp, &grave_pages, list)
 802                 if (gp->page_no == page_no) {
 803                         if (gp->reads_done >= gp->max_reads)
 804                                 return 1;
 805                         gp->reads_done += 1;
 806                         return 0;
 807                 }
 808         return 0;
 809 }
 810
 811 static void free_lists(void)
 812 {
 813         struct list_head *pos, *n;
 814         list_for_each_safe(pos, n, &weak_blocks) {
 815                 list_del(pos);
 816                 kfree(list_entry(pos, struct weak_block, list));
 817         }
 818         list_for_each_safe(pos, n, &weak_pages) {
 819                 list_del(pos);
 820                 kfree(list_entry(pos, struct weak_page, list));
 821         }
 822         list_for_each_safe(pos, n, &grave_pages) {
 823                 list_del(pos);
 824                 kfree(list_entry(pos, struct grave_page, list));
 825         }
 826         kfree(erase_block_wear);
 827 }
 828
 829 static int setup_wear_reporting(struct mtd_info *mtd)
 830 {
 831         size_t mem;
 832
 833         if (!rptwear)
 834                 return 0;
 835         wear_eb_count = divide(mtd->size, mtd->erasesize);
 836         mem = wear_eb_count * sizeof(unsigned long);
 837         if (mem / sizeof(unsigned long) != wear_eb_count) {
 838                 NS_ERR("Too many erase blocks for wear reporting\n");
 839                 return -ENOMEM;
 840         }
 841         erase_block_wear = kzalloc(mem, GFP_KERNEL);
 842         if (!erase_block_wear) {
 843                 NS_ERR("Too many erase blocks for wear reporting\n");
 844                 return -ENOMEM;
 845         }
 846         return 0;
 847 }
 848
 849 static void update_wear(unsigned int erase_block_no)
 850 {
 851         unsigned long wmin = -1, wmax = 0, avg;
 852         unsigned long deciles[10], decile_max[10], tot = 0;
 853         unsigned int i;
 854
 855         if (!erase_block_wear)
 856                 return;
 857         total_wear += 1;
 858         if (total_wear == 0)
 859                 NS_ERR("Erase counter total overflow\n");
 860         erase_block_wear[erase_block_no] += 1;
 861         if (erase_block_wear[erase_block_no] == 0)
 862                 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
 863         rptwear_cnt += 1;
 864         if (rptwear_cnt < rptwear)
 865                 return;
 866         rptwear_cnt = 0;
 867         /* Calc wear stats */
 868         for (i = 0; i < wear_eb_count; ++i) {
 869                 unsigned long wear = erase_block_wear[i];
 870                 if (wear < wmin)
 871                         wmin = wear;
 872                 if (wear > wmax)
 873                         wmax = wear;
 874                 tot += wear;
 875         }
 876         for (i = 0; i < 9; ++i) {
 877                 deciles[i] = 0;
 878                 decile_max[i] = (wmax * (i + 1) + 5) / 10;
 879         }
 880         deciles[9] = 0;
 881         decile_max[9] = wmax;
 882         for (i = 0; i < wear_eb_count; ++i) {
 883                 int d;
 884                 unsigned long wear = erase_block_wear[i];
 885                 for (d = 0; d < 10; ++d)
 886                         if (wear <= decile_max[d]) {
 887                                 deciles[d] += 1;
 888                                 break;
 889                         }
 890         }
 891         avg = tot / wear_eb_count;
 892         /* Output wear report */
 893         NS_INFO("*** Wear Report ***\n");
 894         NS_INFO("Total numbers of erases:  %lu\n", tot);
 895         NS_INFO("Number of erase blocks:   %u\n", wear_eb_count);
 896         NS_INFO("Average number of erases: %lu\n", avg);
 897         NS_INFO("Maximum number of erases: %lu\n", wmax);
 898         NS_INFO("Minimum number of erases: %lu\n", wmin);
 899         for (i = 0; i < 10; ++i) {
 900                 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
 901                 if (from > decile_max[i])
 902                         continue;
 903                 NS_INFO("Number of ebs with erase counts from %lu to %lu : %lu\n",
 904                         from,
 905                         decile_max[i],
 906                         deciles[i]);
 907         }
 908         NS_INFO("*** End of Wear Report ***\n");
 909 }
 910
 911 /*
 912  * Returns the string representation of 'state' state.
 913  */
 914 static char *get_state_name(uint32_t state)
 915 {
 916         switch (NS_STATE(state)) {
 917                 case STATE_CMD_READ0:
 918                         return "STATE_CMD_READ0";
 919                 case STATE_CMD_READ1:
 920                         return "STATE_CMD_READ1";
 921                 case STATE_CMD_PAGEPROG:
 922                         return "STATE_CMD_PAGEPROG";
 923                 case STATE_CMD_READOOB:
 924                         return "STATE_CMD_READOOB";
 925                 case STATE_CMD_READSTART:
 926                         return "STATE_CMD_READSTART";
 927                 case STATE_CMD_ERASE1:
 928                         return "STATE_CMD_ERASE1";
 929                 case STATE_CMD_STATUS:
 930                         return "STATE_CMD_STATUS";
 931                 case STATE_CMD_STATUS_M:
 932                         return "STATE_CMD_STATUS_M";
 933                 case STATE_CMD_SEQIN:
 934                         return "STATE_CMD_SEQIN";
 935                 case STATE_CMD_READID:
 936                         return "STATE_CMD_READID";
 937                 case STATE_CMD_ERASE2:
 938                         return "STATE_CMD_ERASE2";
 939                 case STATE_CMD_RESET:
 940                         return "STATE_CMD_RESET";
 941                 case STATE_ADDR_PAGE:
 942                         return "STATE_ADDR_PAGE";
 943                 case STATE_ADDR_SEC:
 944                         return "STATE_ADDR_SEC";
 945                 case STATE_ADDR_ZERO:
 946                         return "STATE_ADDR_ZERO";
 947                 case STATE_DATAIN:
 948                         return "STATE_DATAIN";
 949                 case STATE_DATAOUT:
 950                         return "STATE_DATAOUT";
 951                 case STATE_DATAOUT_ID:
 952                         return "STATE_DATAOUT_ID";
 953                 case STATE_DATAOUT_STATUS:
 954                         return "STATE_DATAOUT_STATUS";
 955                 case STATE_DATAOUT_STATUS_M:
 956                         return "STATE_DATAOUT_STATUS_M";
 957                 case STATE_READY:
 958                         return "STATE_READY";
 959                 case STATE_UNKNOWN:
 960                         return "STATE_UNKNOWN";
 961         }
 962
 963         NS_ERR("get_state_name: unknown state, BUG\n");
 964         return NULL;
 965 }
 966
 967 /*
 968  * Check if command is valid.
 969  *
 970  * RETURNS: 1 if wrong command, 0 if right.
 971  */
 972 static int check_command(int cmd)
 973 {
 974         switch (cmd) {
 975
 976         case NAND_CMD_READ0:
 977         case NAND_CMD_READSTART:
 978         case NAND_CMD_PAGEPROG:
 979         case NAND_CMD_READOOB:
 980         case NAND_CMD_ERASE1:
 981         case NAND_CMD_STATUS:
 982         case NAND_CMD_SEQIN:
 983         case NAND_CMD_READID:
 984         case NAND_CMD_ERASE2:
 985         case NAND_CMD_RESET:
 986         case NAND_CMD_READ1:
 987                 return 0;
 988
 989         case NAND_CMD_STATUS_MULTI:
 990         default:
 991                 return 1;
 992         }
 993 }
 994
 995 /*
 996  * Returns state after command is accepted by command number.
 997  */
 998 static uint32_t get_state_by_command(unsigned command)
 999 {
1000         switch (command) {
1001                 case NAND_CMD_READ0:
1002                         return STATE_CMD_READ0;
1003                 case NAND_CMD_READ1:
1004                         return STATE_CMD_READ1;
1005                 case NAND_CMD_PAGEPROG:
1006                         return STATE_CMD_PAGEPROG;
1007                 case NAND_CMD_READSTART:
1008                         return STATE_CMD_READSTART;
1009                 case NAND_CMD_READOOB:
1010                         return STATE_CMD_READOOB;
1011                 case NAND_CMD_ERASE1:
1012                         return STATE_CMD_ERASE1;
1013                 case NAND_CMD_STATUS:
1014                         return STATE_CMD_STATUS;
1015                 case NAND_CMD_STATUS_MULTI:
1016                         return STATE_CMD_STATUS_M;
1017                 case NAND_CMD_SEQIN:
1018                         return STATE_CMD_SEQIN;
1019                 case NAND_CMD_READID:
1020                         return STATE_CMD_READID;
1021                 case NAND_CMD_ERASE2:
1022                         return STATE_CMD_ERASE2;
1023                 case NAND_CMD_RESET:
1024                         return STATE_CMD_RESET;
1025         }
1026
1027         NS_ERR("get_state_by_command: unknown command, BUG\n");
1028         return 0;
1029 }
1030
1031 /*
1032  * Move an address byte to the correspondent internal register.
1033  */
1034 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1035 {
1036         uint byte = (uint)bt;
1037
1038         if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1039                 ns->regs.column |= (byte << 8 * ns->regs.count);
1040         else {
1041                 ns->regs.row |= (byte << 8 * (ns->regs.count -
1042                                                 ns->geom.pgaddrbytes +
1043                                                 ns->geom.secaddrbytes));
1044         }
1045
1046         return;
1047 }
1048
1049 /*
1050  * Switch to STATE_READY state.
1051  */
1052 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1053 {
1054         NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1055
1056         ns->state       = STATE_READY;
1057         ns->nxstate     = STATE_UNKNOWN;
1058         ns->op          = NULL;
1059         ns->npstates    = 0;
1060         ns->stateidx    = 0;
1061         ns->regs.num    = 0;
1062         ns->regs.count  = 0;
1063         ns->regs.off    = 0;
1064         ns->regs.row    = 0;
1065         ns->regs.column = 0;
1066         ns->regs.status = status;
1067 }
1068
1069 /*
1070  * If the operation isn't known yet, try to find it in the global array
1071  * of supported operations.
1072  *
1073  * Operation can be unknown because of the following.
1074  *   1. New command was accepted and this is the firs call to find the
1075  *      correspondent states chain. In this case ns->npstates = 0;
1076  *   2. There is several operations which begin with the same command(s)
1077  *      (for example program from the second half and read from the
1078  *      second half operations both begin with the READ1 command). In this
1079  *      case the ns->pstates[] array contains previous states.
1080  *
1081  * Thus, the function tries to find operation containing the following
1082  * states (if the 'flag' parameter is 0):
1083  *    ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1084  *
1085  * If (one and only one) matching operation is found, it is accepted (
1086  * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1087  * zeroed).
1088  *
1089  * If there are several maches, the current state is pushed to the
1090  * ns->pstates.
1091  *
1092  * The operation can be unknown only while commands are input to the chip.
1093  * As soon as address command is accepted, the operation must be known.
1094  * In such situation the function is called with 'flag' != 0, and the
1095  * operation is searched using the following pattern:
1096  *     ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1097  *
1098  * It is supposed that this pattern must either match one operation on
1099  * none. There can't be ambiguity in that case.
1100  *
1101  * If no matches found, the functions does the following:
1102  *   1. if there are saved states present, try to ignore them and search
1103  *      again only using the last command. If nothing was found, switch
1104  *      to the STATE_READY state.
1105  *   2. if there are no saved states, switch to the STATE_READY state.
1106  *
1107  * RETURNS: -2 - no matched operations found.
1108  *          -1 - several matches.
1109  *           0 - operation is found.
1110  */
1111 static int find_operation(struct nandsim *ns, uint32_t flag)
1112 {
1113         int opsfound = 0;
1114         int i, j, idx = 0;
1115
1116         for (i = 0; i < NS_OPER_NUM; i++) {
1117
1118                 int found = 1;
1119
1120                 if (!(ns->options & ops[i].reqopts))
1121                         /* Ignore operations we can't perform */
1122                         continue;
1123
1124                 if (flag) {
1125                         if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1126                                 continue;
1127                 } else {
1128                         if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1129                                 continue;
1130                 }
1131
1132                 for (j = 0; j < ns->npstates; j++)
1133                         if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1134                                 && (ns->options & ops[idx].reqopts)) {
1135                                 found = 0;
1136                                 break;
1137                         }
1138
1139                 if (found) {
1140                         idx = i;
1141                         opsfound += 1;
1142                 }
1143         }
1144
1145         if (opsfound == 1) {
1146                 /* Exact match */
1147                 ns->op = &ops[idx].states[0];
1148                 if (flag) {
1149                         /*
1150                          * In this case the find_operation function was
1151                          * called when address has just began input. But it isn't
1152                          * yet fully input and the current state must
1153                          * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1154                          * state must be the next state (ns->nxstate).
1155                          */
1156                         ns->stateidx = ns->npstates - 1;
1157                 } else {
1158                         ns->stateidx = ns->npstates;
1159                 }
1160                 ns->npstates = 0;
1161                 ns->state = ns->op[ns->stateidx];
1162                 ns->nxstate = ns->op[ns->stateidx + 1];
1163                 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1164                                 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1165                 return 0;
1166         }
1167
1168         if (opsfound == 0) {
1169                 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1170                 if (ns->npstates != 0) {
1171                         NS_DBG("find_operation: no operation found, try again with state %s\n",
1172                                         get_state_name(ns->state));
1173                         ns->npstates = 0;
1174                         return find_operation(ns, 0);
1175
1176                 }
1177                 NS_DBG("find_operation: no operations found\n");
1178                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1179                 return -2;
1180         }
1181
1182         if (flag) {
1183                 /* This shouldn't happen */
1184                 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1185                 return -2;
1186         }
1187
1188         NS_DBG("find_operation: there is still ambiguity\n");
1189
1190         ns->pstates[ns->npstates++] = ns->state;
1191
1192         return -1;
1193 }
1194
1195 /*
1196  * Returns a pointer to the current page.
1197  */
1198 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1199 {
1200         return &(ns->pages[ns->regs.row]);
1201 }
1202
1203 /*
1204  * Retuns a pointer to the current byte, within the current page.
1205  */
1206 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1207 {
1208         return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1209 }
1210
1211 /*
1212  * Fill the NAND buffer with data read from the specified page.
1213  */
1214 static void read_page(struct nandsim *ns, int num)
1215 {
1216         union ns_mem *mypage;
1217
1218         mypage = NS_GET_PAGE(ns);
1219         if (mypage->byte == NULL) {
1220                 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1221                 memset(ns->buf.byte, 0xFF, num);
1222         } else {
1223                 unsigned int page_no = ns->regs.row;
1224                 NS_DBG("read_page: page %d allocated, reading from %d\n",
1225                         ns->regs.row, ns->regs.column + ns->regs.off);
1226                 if (read_error(page_no)) {
1227                         int i;
1228                         memset(ns->buf.byte, 0xFF, num);
1229                         for (i = 0; i < num; ++i)
1230                                 ns->buf.byte[i] = random32();
1231                         NS_WARN("simulating read error in page %u\n", page_no);
1232                         return;
1233                 }
1234                 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1235                 if (bitflips && random32() < (1 << 22)) {
1236                         int flips = 1;
1237                         if (bitflips > 1)
1238                                 flips = (random32() % (int) bitflips) + 1;
1239                         while (flips--) {
1240                                 int pos = random32() % (num * 8);
1241                                 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1242                                 NS_WARN("read_page: flipping bit %d in page %d "
1243                                         "reading from %d ecc: corrected=%u failed=%u\n",
1244                                         pos, ns->regs.row, ns->regs.column + ns->regs.off,
1245                                         nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1246                         }
1247                 }
1248         }
1249 }
1250
1251 /*
1252  * Erase all pages in the specified sector.
1253  */
1254 static void erase_sector(struct nandsim *ns)
1255 {
1256         union ns_mem *mypage;
1257         int i;
1258
1259         mypage = NS_GET_PAGE(ns);
1260         for (i = 0; i < ns->geom.pgsec; i++) {
1261                 if (mypage->byte != NULL) {
1262                         NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1263                         kfree(mypage->byte);
1264                         mypage->byte = NULL;
1265                 }
1266                 mypage++;
1267         }
1268 }
1269
1270 /*
1271  * Program the specified page with the contents from the NAND buffer.
1272  */
1273 static int prog_page(struct nandsim *ns, int num)
1274 {
1275         int i;
1276         union ns_mem *mypage;
1277         u_char *pg_off;
1278
1279         mypage = NS_GET_PAGE(ns);
1280         if (mypage->byte == NULL) {
1281                 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1282                 /*
1283                  * We allocate memory with GFP_NOFS because a flash FS may
1284                  * utilize this. If it is holding an FS lock, then gets here,
1285                  * then kmalloc runs writeback which goes to the FS again
1286                  * and deadlocks. This was seen in practice.
1287                  */
1288                 mypage->byte = kmalloc(ns->geom.pgszoob, GFP_NOFS);
1289                 if (mypage->byte == NULL) {
1290                         NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1291                         return -1;
1292                 }
1293                 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1294         }
1295
1296         pg_off = NS_PAGE_BYTE_OFF(ns);
1297         for (i = 0; i < num; i++)
1298                 pg_off[i] &= ns->buf.byte[i];
1299
1300         return 0;
1301 }
1302
1303 /*
1304  * If state has any action bit, perform this action.
1305  *
1306  * RETURNS: 0 if success, -1 if error.
1307  */
1308 static int do_state_action(struct nandsim *ns, uint32_t action)
1309 {
1310         int num;
1311         int busdiv = ns->busw == 8 ? 1 : 2;
1312         unsigned int erase_block_no, page_no;
1313
1314         action &= ACTION_MASK;
1315
1316         /* Check that page address input is correct */
1317         if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1318                 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1319                 return -1;
1320         }
1321
1322         switch (action) {
1323
1324         case ACTION_CPY:
1325                 /*
1326                  * Copy page data to the internal buffer.
1327                  */
1328
1329                 /* Column shouldn't be very large */
1330                 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1331                         NS_ERR("do_state_action: column number is too large\n");
1332                         break;
1333                 }
1334                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1335                 read_page(ns, num);
1336
1337                 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1338                         num, NS_RAW_OFFSET(ns) + ns->regs.off);
1339
1340                 if (ns->regs.off == 0)
1341                         NS_LOG("read page %d\n", ns->regs.row);
1342                 else if (ns->regs.off < ns->geom.pgsz)
1343                         NS_LOG("read page %d (second half)\n", ns->regs.row);
1344                 else
1345                         NS_LOG("read OOB of page %d\n", ns->regs.row);
1346
1347                 NS_UDELAY(access_delay);
1348                 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1349
1350                 break;
1351
1352         case ACTION_SECERASE:
1353                 /*
1354                  * Erase sector.
1355                  */
1356
1357                 if (ns->lines.wp) {
1358                         NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1359                         return -1;
1360                 }
1361
1362                 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1363                         || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1364                         NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1365                         return -1;
1366                 }
1367
1368                 ns->regs.row = (ns->regs.row <<
1369                                 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1370                 ns->regs.column = 0;
1371
1372                 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1373
1374                 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1375                                 ns->regs.row, NS_RAW_OFFSET(ns));
1376                 NS_LOG("erase sector %u\n", erase_block_no);
1377
1378                 erase_sector(ns);
1379
1380                 NS_MDELAY(erase_delay);
1381
1382                 if (erase_block_wear)
1383                         update_wear(erase_block_no);
1384
1385                 if (erase_error(erase_block_no)) {
1386                         NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1387                         return -1;
1388                 }
1389
1390                 break;
1391
1392         case ACTION_PRGPAGE:
1393                 /*
1394                  * Programm page - move internal buffer data to the page.
1395                  */
1396
1397                 if (ns->lines.wp) {
1398                         NS_WARN("do_state_action: device is write-protected, programm\n");
1399                         return -1;
1400                 }
1401
1402                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1403                 if (num != ns->regs.count) {
1404                         NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1405                                         ns->regs.count, num);
1406                         return -1;
1407                 }
1408
1409                 if (prog_page(ns, num) == -1)
1410                         return -1;
1411
1412                 page_no = ns->regs.row;
1413
1414                 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1415                         num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1416                 NS_LOG("programm page %d\n", ns->regs.row);
1417
1418                 NS_UDELAY(programm_delay);
1419                 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1420
1421                 if (write_error(page_no)) {
1422                         NS_WARN("simulating write failure in page %u\n", page_no);
1423                         return -1;
1424                 }
1425
1426                 break;
1427
1428         case ACTION_ZEROOFF:
1429                 NS_DBG("do_state_action: set internal offset to 0\n");
1430                 ns->regs.off = 0;
1431                 break;
1432
1433         case ACTION_HALFOFF:
1434                 if (!(ns->options & OPT_PAGE512_8BIT)) {
1435                         NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1436                                 "byte page size 8x chips\n");
1437                         return -1;
1438                 }
1439                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1440                 ns->regs.off = ns->geom.pgsz/2;
1441                 break;
1442
1443         case ACTION_OOBOFF:
1444                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1445                 ns->regs.off = ns->geom.pgsz;
1446                 break;
1447
1448         default:
1449                 NS_DBG("do_state_action: BUG! unknown action\n");
1450         }
1451
1452         return 0;
1453 }
1454
1455 /*
1456  * Switch simulator's state.
1457  */
1458 static void switch_state(struct nandsim *ns)
1459 {
1460         if (ns->op) {
1461                 /*
1462                  * The current operation have already been identified.
1463                  * Just follow the states chain.
1464                  */
1465
1466                 ns->stateidx += 1;
1467                 ns->state = ns->nxstate;
1468                 ns->nxstate = ns->op[ns->stateidx + 1];
1469
1470                 NS_DBG("switch_state: operation is known, switch to the next state, "
1471                         "state: %s, nxstate: %s\n",
1472                         get_state_name(ns->state), get_state_name(ns->nxstate));
1473
1474                 /* See, whether we need to do some action */
1475                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1476                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1477                         return;
1478                 }
1479
1480         } else {
1481                 /*
1482                  * We don't yet know which operation we perform.
1483                  * Try to identify it.
1484                  */
1485
1486                 /*
1487                  *  The only event causing the switch_state function to
1488                  *  be called with yet unknown operation is new command.
1489                  */
1490                 ns->state = get_state_by_command(ns->regs.command);
1491
1492                 NS_DBG("switch_state: operation is unknown, try to find it\n");
1493
1494                 if (find_operation(ns, 0) != 0)
1495                         return;
1496
1497                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1498                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1499                         return;
1500                 }
1501         }
1502
1503         /* For 16x devices column means the page offset in words */
1504         if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1505                 NS_DBG("switch_state: double the column number for 16x device\n");
1506                 ns->regs.column <<= 1;
1507         }
1508
1509         if (NS_STATE(ns->nxstate) == STATE_READY) {
1510                 /*
1511                  * The current state is the last. Return to STATE_READY
1512                  */
1513
1514                 u_char status = NS_STATUS_OK(ns);
1515
1516                 /* In case of data states, see if all bytes were input/output */
1517                 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1518                         && ns->regs.count != ns->regs.num) {
1519                         NS_WARN("switch_state: not all bytes were processed, %d left\n",
1520                                         ns->regs.num - ns->regs.count);
1521                         status = NS_STATUS_FAILED(ns);
1522                 }
1523
1524                 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1525
1526                 switch_to_ready_state(ns, status);
1527
1528                 return;
1529         } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1530                 /*
1531                  * If the next state is data input/output, switch to it now
1532                  */
1533
1534                 ns->state      = ns->nxstate;
1535                 ns->nxstate    = ns->op[++ns->stateidx + 1];
1536                 ns->regs.num   = ns->regs.count = 0;
1537
1538                 NS_DBG("switch_state: the next state is data I/O, switch, "
1539                         "state: %s, nxstate: %s\n",
1540                         get_state_name(ns->state), get_state_name(ns->nxstate));
1541
1542                 /*
1543                  * Set the internal register to the count of bytes which
1544                  * are expected to be input or output
1545                  */
1546                 switch (NS_STATE(ns->state)) {
1547                         case STATE_DATAIN:
1548                         case STATE_DATAOUT:
1549                                 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1550                                 break;
1551
1552                         case STATE_DATAOUT_ID:
1553                                 ns->regs.num = ns->geom.idbytes;
1554                                 break;
1555
1556                         case STATE_DATAOUT_STATUS:
1557                         case STATE_DATAOUT_STATUS_M:
1558                                 ns->regs.count = ns->regs.num = 0;
1559                                 break;
1560
1561                         default:
1562                                 NS_ERR("switch_state: BUG! unknown data state\n");
1563                 }
1564
1565         } else if (ns->nxstate & STATE_ADDR_MASK) {
1566                 /*
1567                  * If the next state is address input, set the internal
1568                  * register to the number of expected address bytes
1569                  */
1570
1571                 ns->regs.count = 0;
1572
1573                 switch (NS_STATE(ns->nxstate)) {
1574                         case STATE_ADDR_PAGE:
1575                                 ns->regs.num = ns->geom.pgaddrbytes;
1576
1577                                 break;
1578                         case STATE_ADDR_SEC:
1579                                 ns->regs.num = ns->geom.secaddrbytes;
1580                                 break;
1581
1582                         case STATE_ADDR_ZERO:
1583                                 ns->regs.num = 1;
1584                                 break;
1585
1586                         default:
1587                                 NS_ERR("switch_state: BUG! unknown address state\n");
1588                 }
1589         } else {
1590                 /*
1591                  * Just reset internal counters.
1592                  */
1593
1594                 ns->regs.num = 0;
1595                 ns->regs.count = 0;
1596         }
1597 }
1598
1599 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1600 {
1601         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1602         u_char outb = 0x00;
1603
1604         /* Sanity and correctness checks */
1605         if (!ns->lines.ce) {
1606                 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1607                 return outb;
1608         }
1609         if (ns->lines.ale || ns->lines.cle) {
1610                 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1611                 return outb;
1612         }
1613         if (!(ns->state & STATE_DATAOUT_MASK)) {
1614                 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1615                         "return %#x\n", get_state_name(ns->state), (uint)outb);
1616                 return outb;
1617         }
1618
1619         /* Status register may be read as many times as it is wanted */
1620         if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1621                 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1622                 return ns->regs.status;
1623         }
1624
1625         /* Check if there is any data in the internal buffer which may be read */
1626         if (ns->regs.count == ns->regs.num) {
1627                 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1628                 return outb;
1629         }
1630
1631         switch (NS_STATE(ns->state)) {
1632                 case STATE_DATAOUT:
1633                         if (ns->busw == 8) {
1634                                 outb = ns->buf.byte[ns->regs.count];
1635                                 ns->regs.count += 1;
1636                         } else {
1637                                 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1638                                 ns->regs.count += 2;
1639                         }
1640                         break;
1641                 case STATE_DATAOUT_ID:
1642                         NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1643                         outb = ns->ids[ns->regs.count];
1644                         ns->regs.count += 1;
1645                         break;
1646                 default:
1647                         BUG();
1648         }
1649
1650         if (ns->regs.count == ns->regs.num) {
1651                 NS_DBG("read_byte: all bytes were read\n");
1652
1653                 /*
1654                  * The OPT_AUTOINCR allows to read next conseqitive pages without
1655                  * new read operation cycle.
1656                  */
1657                 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1658                         ns->regs.count = 0;
1659                         if (ns->regs.row + 1 < ns->geom.pgnum)
1660                                 ns->regs.row += 1;
1661                         NS_DBG("read_byte: switch to the next page (%#x)\n", ns->regs.row);
1662                         do_state_action(ns, ACTION_CPY);
1663                 }
1664                 else if (NS_STATE(ns->nxstate) == STATE_READY)
1665                         switch_state(ns);
1666
1667         }
1668
1669         return outb;
1670 }
1671
1672 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1673 {
1674         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1675
1676         /* Sanity and correctness checks */
1677         if (!ns->lines.ce) {
1678                 NS_ERR("write_byte: chip is disabled, ignore write\n");
1679                 return;
1680         }
1681         if (ns->lines.ale && ns->lines.cle) {
1682                 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1683                 return;
1684         }
1685
1686         if (ns->lines.cle == 1) {
1687                 /*
1688                  * The byte written is a command.
1689                  */
1690
1691                 if (byte == NAND_CMD_RESET) {
1692                         NS_LOG("reset chip\n");
1693                         switch_to_ready_state(ns, NS_STATUS_OK(ns));
1694                         return;
1695                 }
1696
1697                 /*
1698                  * Chip might still be in STATE_DATAOUT
1699                  * (if OPT_AUTOINCR feature is supported), STATE_DATAOUT_STATUS or
1700                  * STATE_DATAOUT_STATUS_M state. If so, switch state.
1701                  */
1702                 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1703                         || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
1704                         || ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT))
1705                         switch_state(ns);
1706
1707                 /* Check if chip is expecting command */
1708                 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
1709                         /*
1710                          * We are in situation when something else (not command)
1711                          * was expected but command was input. In this case ignore
1712                          * previous command(s)/state(s) and accept the last one.
1713                          */
1714                         NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
1715                                 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
1716                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1717                 }
1718
1719                 /* Check that the command byte is correct */
1720                 if (check_command(byte)) {
1721                         NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1722                         return;
1723                 }
1724
1725                 NS_DBG("command byte corresponding to %s state accepted\n",
1726                         get_state_name(get_state_by_command(byte)));
1727                 ns->regs.command = byte;
1728                 switch_state(ns);
1729
1730         } else if (ns->lines.ale == 1) {
1731                 /*
1732                  * The byte written is an address.
1733                  */
1734
1735                 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
1736
1737                         NS_DBG("write_byte: operation isn't known yet, identify it\n");
1738
1739                         if (find_operation(ns, 1) < 0)
1740                                 return;
1741
1742                         if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1743                                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1744                                 return;
1745                         }
1746
1747                         ns->regs.count = 0;
1748                         switch (NS_STATE(ns->nxstate)) {
1749                                 case STATE_ADDR_PAGE:
1750                                         ns->regs.num = ns->geom.pgaddrbytes;
1751                                         break;
1752                                 case STATE_ADDR_SEC:
1753                                         ns->regs.num = ns->geom.secaddrbytes;
1754                                         break;
1755                                 case STATE_ADDR_ZERO:
1756                                         ns->regs.num = 1;
1757                                         break;
1758                                 default:
1759                                         BUG();
1760                         }
1761                 }
1762
1763                 /* Check that chip is expecting address */
1764                 if (!(ns->nxstate & STATE_ADDR_MASK)) {
1765                         NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
1766                                 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
1767                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1768                         return;
1769                 }
1770
1771                 /* Check if this is expected byte */
1772                 if (ns->regs.count == ns->regs.num) {
1773                         NS_ERR("write_byte: no more address bytes expected\n");
1774                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1775                         return;
1776                 }
1777
1778                 accept_addr_byte(ns, byte);
1779
1780                 ns->regs.count += 1;
1781
1782                 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
1783                                 (uint)byte, ns->regs.count, ns->regs.num);
1784
1785                 if (ns->regs.count == ns->regs.num) {
1786                         NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
1787                         switch_state(ns);
1788                 }
1789
1790         } else {
1791                 /*
1792                  * The byte written is an input data.
1793                  */
1794
1795                 /* Check that chip is expecting data input */
1796                 if (!(ns->state & STATE_DATAIN_MASK)) {
1797                         NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
1798                                 "switch to %s\n", (uint)byte,
1799                                 get_state_name(ns->state), get_state_name(STATE_READY));
1800                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1801                         return;
1802                 }
1803
1804                 /* Check if this is expected byte */
1805                 if (ns->regs.count == ns->regs.num) {
1806                         NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
1807                                         ns->regs.num);
1808                         return;
1809                 }
1810
1811                 if (ns->busw == 8) {
1812                         ns->buf.byte[ns->regs.count] = byte;
1813                         ns->regs.count += 1;
1814                 } else {
1815                         ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
1816                         ns->regs.count += 2;
1817                 }
1818         }
1819
1820         return;
1821 }
1822
1823 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
1824 {
1825         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1826
1827         ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
1828         ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
1829         ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
1830
1831         if (cmd != NAND_CMD_NONE)
1832                 ns_nand_write_byte(mtd, cmd);
1833 }
1834
1835 static int ns_device_ready(struct mtd_info *mtd)
1836 {
1837         NS_DBG("device_ready\n");
1838         return 1;
1839 }
1840
1841 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
1842 {
1843         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
1844
1845         NS_DBG("read_word\n");
1846
1847         return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
1848 }
1849
1850 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
1851 {
1852         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1853
1854         /* Check that chip is expecting data input */
1855         if (!(ns->state & STATE_DATAIN_MASK)) {
1856                 NS_ERR("write_buf: data input isn't expected, state is %s, "
1857                         "switch to STATE_READY\n", get_state_name(ns->state));
1858                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1859                 return;
1860         }
1861
1862         /* Check if these are expected bytes */
1863         if (ns->regs.count + len > ns->regs.num) {
1864                 NS_ERR("write_buf: too many input bytes\n");
1865                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1866                 return;
1867         }
1868
1869         memcpy(ns->buf.byte + ns->regs.count, buf, len);
1870         ns->regs.count += len;
1871
1872         if (ns->regs.count == ns->regs.num) {
1873                 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
1874         }
1875 }
1876
1877 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
1878 {
1879         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1880
1881         /* Sanity and correctness checks */
1882         if (!ns->lines.ce) {
1883                 NS_ERR("read_buf: chip is disabled\n");
1884                 return;
1885         }
1886         if (ns->lines.ale || ns->lines.cle) {
1887                 NS_ERR("read_buf: ALE or CLE pin is high\n");
1888                 return;
1889         }
1890         if (!(ns->state & STATE_DATAOUT_MASK)) {
1891                 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
1892                         get_state_name(ns->state));
1893                 return;
1894         }
1895
1896         if (NS_STATE(ns->state) != STATE_DATAOUT) {
1897                 int i;
1898
1899                 for (i = 0; i < len; i++)
1900                         buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
1901
1902                 return;
1903         }
1904
1905         /* Check if these are expected bytes */
1906         if (ns->regs.count + len > ns->regs.num) {
1907                 NS_ERR("read_buf: too many bytes to read\n");
1908                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1909                 return;
1910         }
1911
1912         memcpy(buf, ns->buf.byte + ns->regs.count, len);
1913         ns->regs.count += len;
1914
1915         if (ns->regs.count == ns->regs.num) {
1916                 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1917                         ns->regs.count = 0;
1918                         if (ns->regs.row + 1 < ns->geom.pgnum)
1919                                 ns->regs.row += 1;
1920                         NS_DBG("read_buf: switch to the next page (%#x)\n", ns->regs.row);
1921                         do_state_action(ns, ACTION_CPY);
1922                 }
1923                 else if (NS_STATE(ns->nxstate) == STATE_READY)
1924                         switch_state(ns);
1925         }
1926
1927         return;
1928 }
1929
1930 static int ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
1931 {
1932         ns_nand_read_buf(mtd, (u_char *)&ns_verify_buf[0], len);
1933
1934         if (!memcmp(buf, &ns_verify_buf[0], len)) {
1935                 NS_DBG("verify_buf: the buffer is OK\n");
1936                 return 0;
1937         } else {
1938                 NS_DBG("verify_buf: the buffer is wrong\n");
1939                 return -EFAULT;
1940         }
1941 }
1942
1943 /*
1944  * Module initialization function
1945  */
1946 static int __init ns_init_module(void)
1947 {
1948         struct nand_chip *chip;
1949         struct nandsim *nand;
1950         int retval = -ENOMEM, i;
1951
1952         if (bus_width != 8 && bus_width != 16) {
1953                 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
1954                 return -EINVAL;
1955         }
1956
1957         /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
1958         nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
1959                                 + sizeof(struct nandsim), GFP_KERNEL);
1960         if (!nsmtd) {
1961                 NS_ERR("unable to allocate core structures.\n");
1962                 return -ENOMEM;
1963         }
1964         chip        = (struct nand_chip *)(nsmtd + 1);
1965         nsmtd->priv = (void *)chip;
1966         nand        = (struct nandsim *)(chip + 1);
1967         chip->priv  = (void *)nand;
1968
1969         /*
1970          * Register simulator's callbacks.
1971          */
1972         chip->cmd_ctrl   = ns_hwcontrol;
1973         chip->read_byte  = ns_nand_read_byte;
1974         chip->dev_ready  = ns_device_ready;
1975         chip->write_buf  = ns_nand_write_buf;
1976         chip->read_buf   = ns_nand_read_buf;
1977         chip->verify_buf = ns_nand_verify_buf;
1978         chip->read_word  = ns_nand_read_word;
1979         chip->ecc.mode   = NAND_ECC_SOFT;
1980         /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
1981         /* and 'badblocks' parameters to work */
1982         chip->options   |= NAND_SKIP_BBTSCAN;
1983
1984         /*
1985          * Perform minimum nandsim structure initialization to handle
1986          * the initial ID read command correctly
1987          */
1988         if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
1989                 nand->geom.idbytes = 4;
1990         else
1991                 nand->geom.idbytes = 2;
1992         nand->regs.status = NS_STATUS_OK(nand);
1993         nand->nxstate = STATE_UNKNOWN;
1994         nand->options |= OPT_PAGE256; /* temporary value */
1995         nand->ids[0] = first_id_byte;
1996         nand->ids[1] = second_id_byte;
1997         nand->ids[2] = third_id_byte;
1998         nand->ids[3] = fourth_id_byte;
1999         if (bus_width == 16) {
2000                 nand->busw = 16;
2001                 chip->options |= NAND_BUSWIDTH_16;
2002         }
2003
2004         nsmtd->owner = THIS_MODULE;
2005
2006         if ((retval = parse_weakblocks()) != 0)
2007                 goto error;
2008
2009         if ((retval = parse_weakpages()) != 0)
2010                 goto error;
2011
2012         if ((retval = parse_gravepages()) != 0)
2013                 goto error;
2014
2015         if ((retval = nand_scan(nsmtd, 1)) != 0) {
2016                 NS_ERR("can't register NAND Simulator\n");
2017                 if (retval > 0)
2018                         retval = -ENXIO;
2019                 goto error;
2020         }
2021
2022         if (overridesize) {
2023                 u_int64_t new_size = (u_int64_t)nsmtd->erasesize << overridesize;
2024                 if (new_size >> overridesize != nsmtd->erasesize) {
2025                         NS_ERR("overridesize is too big\n");
2026                         goto err_exit;
2027                 }
2028                 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2029                 nsmtd->size = new_size;
2030                 chip->chipsize = new_size;
2031                 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2032                 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2033         }
2034
2035         if ((retval = setup_wear_reporting(nsmtd)) != 0)
2036                 goto err_exit;
2037
2038         if ((retval = init_nandsim(nsmtd)) != 0)
2039                 goto err_exit;
2040
2041         if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2042                 goto err_exit;
2043
2044         if ((retval = nand_default_bbt(nsmtd)) != 0)
2045                 goto err_exit;
2046
2047         /* Register NAND partitions */
2048         if ((retval = add_mtd_partitions(nsmtd, &nand->partitions[0], nand->nbparts)) != 0)
2049                 goto err_exit;
2050
2051         return 0;
2052
2053 err_exit:
2054         free_nandsim(nand);
2055         nand_release(nsmtd);
2056         for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2057                 kfree(nand->partitions[i].name);
2058 error:
2059         kfree(nsmtd);
2060         free_lists();
2061
2062         return retval;
2063 }
2064
2065 module_init(ns_init_module);
2066
2067 /*
2068  * Module clean-up function
2069  */
2070 static void __exit ns_cleanup_module(void)
2071 {
2072         struct nandsim *ns = (struct nandsim *)(((struct nand_chip *)nsmtd->priv)->priv);
2073         int i;
2074
2075         free_nandsim(ns);    /* Free nandsim private resources */
2076         nand_release(nsmtd); /* Unregister driver */
2077         for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2078                 kfree(ns->partitions[i].name);
2079         kfree(nsmtd);        /* Free other structures */
2080         free_lists();
2081 }
2082
2083 module_exit(ns_cleanup_module);
2084
2085 MODULE_LICENSE ("GPL");
2086 MODULE_AUTHOR ("Artem B. Bityuckiy");
2087 MODULE_DESCRIPTION ("The NAND flash simulator");