Fix common misspellings
[linux-2.6.git] / drivers / mmc / host / atmel-mci.c
1 /*
2  * Atmel MultiMedia Card Interface driver
3  *
4  * Copyright (C) 2004-2008 Atmel Corporation
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/blkdev.h>
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
13 #include <linux/device.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/scatterlist.h>
24 #include <linux/seq_file.h>
25 #include <linux/slab.h>
26 #include <linux/stat.h>
27
28 #include <linux/mmc/host.h>
29 #include <linux/mmc/sdio.h>
30
31 #include <mach/atmel-mci.h>
32 #include <linux/atmel-mci.h>
33
34 #include <asm/io.h>
35 #include <asm/unaligned.h>
36
37 #include <mach/cpu.h>
38 #include <mach/board.h>
39
40 #include "atmel-mci-regs.h"
41
42 #define ATMCI_DATA_ERROR_FLAGS  (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
43 #define ATMCI_DMA_THRESHOLD     16
44
45 enum {
46         EVENT_CMD_COMPLETE = 0,
47         EVENT_XFER_COMPLETE,
48         EVENT_DATA_COMPLETE,
49         EVENT_DATA_ERROR,
50 };
51
52 enum atmel_mci_state {
53         STATE_IDLE = 0,
54         STATE_SENDING_CMD,
55         STATE_SENDING_DATA,
56         STATE_DATA_BUSY,
57         STATE_SENDING_STOP,
58         STATE_DATA_ERROR,
59 };
60
61 struct atmel_mci_dma {
62 #ifdef CONFIG_MMC_ATMELMCI_DMA
63         struct dma_chan                 *chan;
64         struct dma_async_tx_descriptor  *data_desc;
65 #endif
66 };
67
68 /**
69  * struct atmel_mci - MMC controller state shared between all slots
70  * @lock: Spinlock protecting the queue and associated data.
71  * @regs: Pointer to MMIO registers.
72  * @sg: Scatterlist entry currently being processed by PIO code, if any.
73  * @pio_offset: Offset into the current scatterlist entry.
74  * @cur_slot: The slot which is currently using the controller.
75  * @mrq: The request currently being processed on @cur_slot,
76  *      or NULL if the controller is idle.
77  * @cmd: The command currently being sent to the card, or NULL.
78  * @data: The data currently being transferred, or NULL if no data
79  *      transfer is in progress.
80  * @dma: DMA client state.
81  * @data_chan: DMA channel being used for the current data transfer.
82  * @cmd_status: Snapshot of SR taken upon completion of the current
83  *      command. Only valid when EVENT_CMD_COMPLETE is pending.
84  * @data_status: Snapshot of SR taken upon completion of the current
85  *      data transfer. Only valid when EVENT_DATA_COMPLETE or
86  *      EVENT_DATA_ERROR is pending.
87  * @stop_cmdr: Value to be loaded into CMDR when the stop command is
88  *      to be sent.
89  * @tasklet: Tasklet running the request state machine.
90  * @pending_events: Bitmask of events flagged by the interrupt handler
91  *      to be processed by the tasklet.
92  * @completed_events: Bitmask of events which the state machine has
93  *      processed.
94  * @state: Tasklet state.
95  * @queue: List of slots waiting for access to the controller.
96  * @need_clock_update: Update the clock rate before the next request.
97  * @need_reset: Reset controller before next request.
98  * @mode_reg: Value of the MR register.
99  * @cfg_reg: Value of the CFG register.
100  * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
101  *      rate and timeout calculations.
102  * @mapbase: Physical address of the MMIO registers.
103  * @mck: The peripheral bus clock hooked up to the MMC controller.
104  * @pdev: Platform device associated with the MMC controller.
105  * @slot: Slots sharing this MMC controller.
106  *
107  * Locking
108  * =======
109  *
110  * @lock is a softirq-safe spinlock protecting @queue as well as
111  * @cur_slot, @mrq and @state. These must always be updated
112  * at the same time while holding @lock.
113  *
114  * @lock also protects mode_reg and need_clock_update since these are
115  * used to synchronize mode register updates with the queue
116  * processing.
117  *
118  * The @mrq field of struct atmel_mci_slot is also protected by @lock,
119  * and must always be written at the same time as the slot is added to
120  * @queue.
121  *
122  * @pending_events and @completed_events are accessed using atomic bit
123  * operations, so they don't need any locking.
124  *
125  * None of the fields touched by the interrupt handler need any
126  * locking. However, ordering is important: Before EVENT_DATA_ERROR or
127  * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
128  * interrupts must be disabled and @data_status updated with a
129  * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
130  * CMDRDY interrupt must be disabled and @cmd_status updated with a
131  * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
132  * bytes_xfered field of @data must be written. This is ensured by
133  * using barriers.
134  */
135 struct atmel_mci {
136         spinlock_t              lock;
137         void __iomem            *regs;
138
139         struct scatterlist      *sg;
140         unsigned int            pio_offset;
141
142         struct atmel_mci_slot   *cur_slot;
143         struct mmc_request      *mrq;
144         struct mmc_command      *cmd;
145         struct mmc_data         *data;
146
147         struct atmel_mci_dma    dma;
148         struct dma_chan         *data_chan;
149
150         u32                     cmd_status;
151         u32                     data_status;
152         u32                     stop_cmdr;
153
154         struct tasklet_struct   tasklet;
155         unsigned long           pending_events;
156         unsigned long           completed_events;
157         enum atmel_mci_state    state;
158         struct list_head        queue;
159
160         bool                    need_clock_update;
161         bool                    need_reset;
162         u32                     mode_reg;
163         u32                     cfg_reg;
164         unsigned long           bus_hz;
165         unsigned long           mapbase;
166         struct clk              *mck;
167         struct platform_device  *pdev;
168
169         struct atmel_mci_slot   *slot[ATMEL_MCI_MAX_NR_SLOTS];
170 };
171
172 /**
173  * struct atmel_mci_slot - MMC slot state
174  * @mmc: The mmc_host representing this slot.
175  * @host: The MMC controller this slot is using.
176  * @sdc_reg: Value of SDCR to be written before using this slot.
177  * @sdio_irq: SDIO irq mask for this slot.
178  * @mrq: mmc_request currently being processed or waiting to be
179  *      processed, or NULL when the slot is idle.
180  * @queue_node: List node for placing this node in the @queue list of
181  *      &struct atmel_mci.
182  * @clock: Clock rate configured by set_ios(). Protected by host->lock.
183  * @flags: Random state bits associated with the slot.
184  * @detect_pin: GPIO pin used for card detection, or negative if not
185  *      available.
186  * @wp_pin: GPIO pin used for card write protect sending, or negative
187  *      if not available.
188  * @detect_is_active_high: The state of the detect pin when it is active.
189  * @detect_timer: Timer used for debouncing @detect_pin interrupts.
190  */
191 struct atmel_mci_slot {
192         struct mmc_host         *mmc;
193         struct atmel_mci        *host;
194
195         u32                     sdc_reg;
196         u32                     sdio_irq;
197
198         struct mmc_request      *mrq;
199         struct list_head        queue_node;
200
201         unsigned int            clock;
202         unsigned long           flags;
203 #define ATMCI_CARD_PRESENT      0
204 #define ATMCI_CARD_NEED_INIT    1
205 #define ATMCI_SHUTDOWN          2
206
207         int                     detect_pin;
208         int                     wp_pin;
209         bool                    detect_is_active_high;
210
211         struct timer_list       detect_timer;
212 };
213
214 #define atmci_test_and_clear_pending(host, event)               \
215         test_and_clear_bit(event, &host->pending_events)
216 #define atmci_set_completed(host, event)                        \
217         set_bit(event, &host->completed_events)
218 #define atmci_set_pending(host, event)                          \
219         set_bit(event, &host->pending_events)
220
221 /*
222  * Enable or disable features/registers based on
223  * whether the processor supports them
224  */
225 static bool mci_has_rwproof(void)
226 {
227         if (cpu_is_at91sam9261() || cpu_is_at91rm9200())
228                 return false;
229         else
230                 return true;
231 }
232
233 /*
234  * The new MCI2 module isn't 100% compatible with the old MCI module,
235  * and it has a few nice features which we want to use...
236  */
237 static inline bool atmci_is_mci2(void)
238 {
239         if (cpu_is_at91sam9g45())
240                 return true;
241
242         return false;
243 }
244
245
246 /*
247  * The debugfs stuff below is mostly optimized away when
248  * CONFIG_DEBUG_FS is not set.
249  */
250 static int atmci_req_show(struct seq_file *s, void *v)
251 {
252         struct atmel_mci_slot   *slot = s->private;
253         struct mmc_request      *mrq;
254         struct mmc_command      *cmd;
255         struct mmc_command      *stop;
256         struct mmc_data         *data;
257
258         /* Make sure we get a consistent snapshot */
259         spin_lock_bh(&slot->host->lock);
260         mrq = slot->mrq;
261
262         if (mrq) {
263                 cmd = mrq->cmd;
264                 data = mrq->data;
265                 stop = mrq->stop;
266
267                 if (cmd)
268                         seq_printf(s,
269                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
270                                 cmd->opcode, cmd->arg, cmd->flags,
271                                 cmd->resp[0], cmd->resp[1], cmd->resp[2],
272                                 cmd->resp[3], cmd->error);
273                 if (data)
274                         seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
275                                 data->bytes_xfered, data->blocks,
276                                 data->blksz, data->flags, data->error);
277                 if (stop)
278                         seq_printf(s,
279                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
280                                 stop->opcode, stop->arg, stop->flags,
281                                 stop->resp[0], stop->resp[1], stop->resp[2],
282                                 stop->resp[3], stop->error);
283         }
284
285         spin_unlock_bh(&slot->host->lock);
286
287         return 0;
288 }
289
290 static int atmci_req_open(struct inode *inode, struct file *file)
291 {
292         return single_open(file, atmci_req_show, inode->i_private);
293 }
294
295 static const struct file_operations atmci_req_fops = {
296         .owner          = THIS_MODULE,
297         .open           = atmci_req_open,
298         .read           = seq_read,
299         .llseek         = seq_lseek,
300         .release        = single_release,
301 };
302
303 static void atmci_show_status_reg(struct seq_file *s,
304                 const char *regname, u32 value)
305 {
306         static const char       *sr_bit[] = {
307                 [0]     = "CMDRDY",
308                 [1]     = "RXRDY",
309                 [2]     = "TXRDY",
310                 [3]     = "BLKE",
311                 [4]     = "DTIP",
312                 [5]     = "NOTBUSY",
313                 [6]     = "ENDRX",
314                 [7]     = "ENDTX",
315                 [8]     = "SDIOIRQA",
316                 [9]     = "SDIOIRQB",
317                 [12]    = "SDIOWAIT",
318                 [14]    = "RXBUFF",
319                 [15]    = "TXBUFE",
320                 [16]    = "RINDE",
321                 [17]    = "RDIRE",
322                 [18]    = "RCRCE",
323                 [19]    = "RENDE",
324                 [20]    = "RTOE",
325                 [21]    = "DCRCE",
326                 [22]    = "DTOE",
327                 [23]    = "CSTOE",
328                 [24]    = "BLKOVRE",
329                 [25]    = "DMADONE",
330                 [26]    = "FIFOEMPTY",
331                 [27]    = "XFRDONE",
332                 [30]    = "OVRE",
333                 [31]    = "UNRE",
334         };
335         unsigned int            i;
336
337         seq_printf(s, "%s:\t0x%08x", regname, value);
338         for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
339                 if (value & (1 << i)) {
340                         if (sr_bit[i])
341                                 seq_printf(s, " %s", sr_bit[i]);
342                         else
343                                 seq_puts(s, " UNKNOWN");
344                 }
345         }
346         seq_putc(s, '\n');
347 }
348
349 static int atmci_regs_show(struct seq_file *s, void *v)
350 {
351         struct atmel_mci        *host = s->private;
352         u32                     *buf;
353
354         buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
355         if (!buf)
356                 return -ENOMEM;
357
358         /*
359          * Grab a more or less consistent snapshot. Note that we're
360          * not disabling interrupts, so IMR and SR may not be
361          * consistent.
362          */
363         spin_lock_bh(&host->lock);
364         clk_enable(host->mck);
365         memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
366         clk_disable(host->mck);
367         spin_unlock_bh(&host->lock);
368
369         seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
370                         buf[MCI_MR / 4],
371                         buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
372                         buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
373                         buf[MCI_MR / 4] & 0xff);
374         seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
375         seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
376         seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
377         seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
378                         buf[MCI_BLKR / 4],
379                         buf[MCI_BLKR / 4] & 0xffff,
380                         (buf[MCI_BLKR / 4] >> 16) & 0xffff);
381         if (atmci_is_mci2())
382                 seq_printf(s, "CSTOR:\t0x%08x\n", buf[MCI_CSTOR / 4]);
383
384         /* Don't read RSPR and RDR; it will consume the data there */
385
386         atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
387         atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
388
389         if (atmci_is_mci2()) {
390                 u32 val;
391
392                 val = buf[MCI_DMA / 4];
393                 seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n",
394                                 val, val & 3,
395                                 ((val >> 4) & 3) ?
396                                         1 << (((val >> 4) & 3) + 1) : 1,
397                                 val & MCI_DMAEN ? " DMAEN" : "");
398
399                 val = buf[MCI_CFG / 4];
400                 seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n",
401                                 val,
402                                 val & MCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "",
403                                 val & MCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "",
404                                 val & MCI_CFG_HSMODE ? " HSMODE" : "",
405                                 val & MCI_CFG_LSYNC ? " LSYNC" : "");
406         }
407
408         kfree(buf);
409
410         return 0;
411 }
412
413 static int atmci_regs_open(struct inode *inode, struct file *file)
414 {
415         return single_open(file, atmci_regs_show, inode->i_private);
416 }
417
418 static const struct file_operations atmci_regs_fops = {
419         .owner          = THIS_MODULE,
420         .open           = atmci_regs_open,
421         .read           = seq_read,
422         .llseek         = seq_lseek,
423         .release        = single_release,
424 };
425
426 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
427 {
428         struct mmc_host         *mmc = slot->mmc;
429         struct atmel_mci        *host = slot->host;
430         struct dentry           *root;
431         struct dentry           *node;
432
433         root = mmc->debugfs_root;
434         if (!root)
435                 return;
436
437         node = debugfs_create_file("regs", S_IRUSR, root, host,
438                         &atmci_regs_fops);
439         if (IS_ERR(node))
440                 return;
441         if (!node)
442                 goto err;
443
444         node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
445         if (!node)
446                 goto err;
447
448         node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
449         if (!node)
450                 goto err;
451
452         node = debugfs_create_x32("pending_events", S_IRUSR, root,
453                                      (u32 *)&host->pending_events);
454         if (!node)
455                 goto err;
456
457         node = debugfs_create_x32("completed_events", S_IRUSR, root,
458                                      (u32 *)&host->completed_events);
459         if (!node)
460                 goto err;
461
462         return;
463
464 err:
465         dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
466 }
467
468 static inline unsigned int ns_to_clocks(struct atmel_mci *host,
469                                         unsigned int ns)
470 {
471         return (ns * (host->bus_hz / 1000000) + 999) / 1000;
472 }
473
474 static void atmci_set_timeout(struct atmel_mci *host,
475                 struct atmel_mci_slot *slot, struct mmc_data *data)
476 {
477         static unsigned dtomul_to_shift[] = {
478                 0, 4, 7, 8, 10, 12, 16, 20
479         };
480         unsigned        timeout;
481         unsigned        dtocyc;
482         unsigned        dtomul;
483
484         timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
485
486         for (dtomul = 0; dtomul < 8; dtomul++) {
487                 unsigned shift = dtomul_to_shift[dtomul];
488                 dtocyc = (timeout + (1 << shift) - 1) >> shift;
489                 if (dtocyc < 15)
490                         break;
491         }
492
493         if (dtomul >= 8) {
494                 dtomul = 7;
495                 dtocyc = 15;
496         }
497
498         dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
499                         dtocyc << dtomul_to_shift[dtomul]);
500         mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
501 }
502
503 /*
504  * Return mask with command flags to be enabled for this command.
505  */
506 static u32 atmci_prepare_command(struct mmc_host *mmc,
507                                  struct mmc_command *cmd)
508 {
509         struct mmc_data *data;
510         u32             cmdr;
511
512         cmd->error = -EINPROGRESS;
513
514         cmdr = MCI_CMDR_CMDNB(cmd->opcode);
515
516         if (cmd->flags & MMC_RSP_PRESENT) {
517                 if (cmd->flags & MMC_RSP_136)
518                         cmdr |= MCI_CMDR_RSPTYP_136BIT;
519                 else
520                         cmdr |= MCI_CMDR_RSPTYP_48BIT;
521         }
522
523         /*
524          * This should really be MAXLAT_5 for CMD2 and ACMD41, but
525          * it's too difficult to determine whether this is an ACMD or
526          * not. Better make it 64.
527          */
528         cmdr |= MCI_CMDR_MAXLAT_64CYC;
529
530         if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
531                 cmdr |= MCI_CMDR_OPDCMD;
532
533         data = cmd->data;
534         if (data) {
535                 cmdr |= MCI_CMDR_START_XFER;
536
537                 if (cmd->opcode == SD_IO_RW_EXTENDED) {
538                         cmdr |= MCI_CMDR_SDIO_BLOCK;
539                 } else {
540                         if (data->flags & MMC_DATA_STREAM)
541                                 cmdr |= MCI_CMDR_STREAM;
542                         else if (data->blocks > 1)
543                                 cmdr |= MCI_CMDR_MULTI_BLOCK;
544                         else
545                                 cmdr |= MCI_CMDR_BLOCK;
546                 }
547
548                 if (data->flags & MMC_DATA_READ)
549                         cmdr |= MCI_CMDR_TRDIR_READ;
550         }
551
552         return cmdr;
553 }
554
555 static void atmci_start_command(struct atmel_mci *host,
556                 struct mmc_command *cmd, u32 cmd_flags)
557 {
558         WARN_ON(host->cmd);
559         host->cmd = cmd;
560
561         dev_vdbg(&host->pdev->dev,
562                         "start command: ARGR=0x%08x CMDR=0x%08x\n",
563                         cmd->arg, cmd_flags);
564
565         mci_writel(host, ARGR, cmd->arg);
566         mci_writel(host, CMDR, cmd_flags);
567 }
568
569 static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
570 {
571         atmci_start_command(host, data->stop, host->stop_cmdr);
572         mci_writel(host, IER, MCI_CMDRDY);
573 }
574
575 #ifdef CONFIG_MMC_ATMELMCI_DMA
576 static void atmci_dma_cleanup(struct atmel_mci *host)
577 {
578         struct mmc_data                 *data = host->data;
579
580         if (data)
581                 dma_unmap_sg(host->dma.chan->device->dev,
582                              data->sg, data->sg_len,
583                              ((data->flags & MMC_DATA_WRITE)
584                               ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
585 }
586
587 static void atmci_stop_dma(struct atmel_mci *host)
588 {
589         struct dma_chan *chan = host->data_chan;
590
591         if (chan) {
592                 dmaengine_terminate_all(chan);
593                 atmci_dma_cleanup(host);
594         } else {
595                 /* Data transfer was stopped by the interrupt handler */
596                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
597                 mci_writel(host, IER, MCI_NOTBUSY);
598         }
599 }
600
601 /* This function is called by the DMA driver from tasklet context. */
602 static void atmci_dma_complete(void *arg)
603 {
604         struct atmel_mci        *host = arg;
605         struct mmc_data         *data = host->data;
606
607         dev_vdbg(&host->pdev->dev, "DMA complete\n");
608
609         if (atmci_is_mci2())
610                 /* Disable DMA hardware handshaking on MCI */
611                 mci_writel(host, DMA, mci_readl(host, DMA) & ~MCI_DMAEN);
612
613         atmci_dma_cleanup(host);
614
615         /*
616          * If the card was removed, data will be NULL. No point trying
617          * to send the stop command or waiting for NBUSY in this case.
618          */
619         if (data) {
620                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
621                 tasklet_schedule(&host->tasklet);
622
623                 /*
624                  * Regardless of what the documentation says, we have
625                  * to wait for NOTBUSY even after block read
626                  * operations.
627                  *
628                  * When the DMA transfer is complete, the controller
629                  * may still be reading the CRC from the card, i.e.
630                  * the data transfer is still in progress and we
631                  * haven't seen all the potential error bits yet.
632                  *
633                  * The interrupt handler will schedule a different
634                  * tasklet to finish things up when the data transfer
635                  * is completely done.
636                  *
637                  * We may not complete the mmc request here anyway
638                  * because the mmc layer may call back and cause us to
639                  * violate the "don't submit new operations from the
640                  * completion callback" rule of the dma engine
641                  * framework.
642                  */
643                 mci_writel(host, IER, MCI_NOTBUSY);
644         }
645 }
646
647 static int
648 atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
649 {
650         struct dma_chan                 *chan;
651         struct dma_async_tx_descriptor  *desc;
652         struct scatterlist              *sg;
653         unsigned int                    i;
654         enum dma_data_direction         direction;
655         unsigned int                    sglen;
656
657         /*
658          * We don't do DMA on "complex" transfers, i.e. with
659          * non-word-aligned buffers or lengths. Also, we don't bother
660          * with all the DMA setup overhead for short transfers.
661          */
662         if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
663                 return -EINVAL;
664         if (data->blksz & 3)
665                 return -EINVAL;
666
667         for_each_sg(data->sg, sg, data->sg_len, i) {
668                 if (sg->offset & 3 || sg->length & 3)
669                         return -EINVAL;
670         }
671
672         /* If we don't have a channel, we can't do DMA */
673         chan = host->dma.chan;
674         if (chan)
675                 host->data_chan = chan;
676
677         if (!chan)
678                 return -ENODEV;
679
680         if (atmci_is_mci2())
681                 mci_writel(host, DMA, MCI_DMA_CHKSIZE(3) | MCI_DMAEN);
682
683         if (data->flags & MMC_DATA_READ)
684                 direction = DMA_FROM_DEVICE;
685         else
686                 direction = DMA_TO_DEVICE;
687
688         sglen = dma_map_sg(chan->device->dev, data->sg,
689                            data->sg_len, direction);
690
691         desc = chan->device->device_prep_slave_sg(chan,
692                         data->sg, sglen, direction,
693                         DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
694         if (!desc)
695                 goto unmap_exit;
696
697         host->dma.data_desc = desc;
698         desc->callback = atmci_dma_complete;
699         desc->callback_param = host;
700
701         return 0;
702 unmap_exit:
703         dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction);
704         return -ENOMEM;
705 }
706
707 static void atmci_submit_data(struct atmel_mci *host)
708 {
709         struct dma_chan                 *chan = host->data_chan;
710         struct dma_async_tx_descriptor  *desc = host->dma.data_desc;
711
712         if (chan) {
713                 dmaengine_submit(desc);
714                 dma_async_issue_pending(chan);
715         }
716 }
717
718 #else /* CONFIG_MMC_ATMELMCI_DMA */
719
720 static int atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
721 {
722         return -ENOSYS;
723 }
724
725 static void atmci_submit_data(struct atmel_mci *host) {}
726
727 static void atmci_stop_dma(struct atmel_mci *host)
728 {
729         /* Data transfer was stopped by the interrupt handler */
730         atmci_set_pending(host, EVENT_XFER_COMPLETE);
731         mci_writel(host, IER, MCI_NOTBUSY);
732 }
733
734 #endif /* CONFIG_MMC_ATMELMCI_DMA */
735
736 /*
737  * Returns a mask of interrupt flags to be enabled after the whole
738  * request has been prepared.
739  */
740 static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data)
741 {
742         u32 iflags;
743
744         data->error = -EINPROGRESS;
745
746         WARN_ON(host->data);
747         host->sg = NULL;
748         host->data = data;
749
750         iflags = ATMCI_DATA_ERROR_FLAGS;
751         if (atmci_prepare_data_dma(host, data)) {
752                 host->data_chan = NULL;
753
754                 /*
755                  * Errata: MMC data write operation with less than 12
756                  * bytes is impossible.
757                  *
758                  * Errata: MCI Transmit Data Register (TDR) FIFO
759                  * corruption when length is not multiple of 4.
760                  */
761                 if (data->blocks * data->blksz < 12
762                                 || (data->blocks * data->blksz) & 3)
763                         host->need_reset = true;
764
765                 host->sg = data->sg;
766                 host->pio_offset = 0;
767                 if (data->flags & MMC_DATA_READ)
768                         iflags |= MCI_RXRDY;
769                 else
770                         iflags |= MCI_TXRDY;
771         }
772
773         return iflags;
774 }
775
776 static void atmci_start_request(struct atmel_mci *host,
777                 struct atmel_mci_slot *slot)
778 {
779         struct mmc_request      *mrq;
780         struct mmc_command      *cmd;
781         struct mmc_data         *data;
782         u32                     iflags;
783         u32                     cmdflags;
784
785         mrq = slot->mrq;
786         host->cur_slot = slot;
787         host->mrq = mrq;
788
789         host->pending_events = 0;
790         host->completed_events = 0;
791         host->data_status = 0;
792
793         if (host->need_reset) {
794                 mci_writel(host, CR, MCI_CR_SWRST);
795                 mci_writel(host, CR, MCI_CR_MCIEN);
796                 mci_writel(host, MR, host->mode_reg);
797                 if (atmci_is_mci2())
798                         mci_writel(host, CFG, host->cfg_reg);
799                 host->need_reset = false;
800         }
801         mci_writel(host, SDCR, slot->sdc_reg);
802
803         iflags = mci_readl(host, IMR);
804         if (iflags & ~(MCI_SDIOIRQA | MCI_SDIOIRQB))
805                 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
806                                 iflags);
807
808         if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
809                 /* Send init sequence (74 clock cycles) */
810                 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
811                 while (!(mci_readl(host, SR) & MCI_CMDRDY))
812                         cpu_relax();
813         }
814         iflags = 0;
815         data = mrq->data;
816         if (data) {
817                 atmci_set_timeout(host, slot, data);
818
819                 /* Must set block count/size before sending command */
820                 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
821                                 | MCI_BLKLEN(data->blksz));
822                 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
823                         MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
824
825                 iflags |= atmci_prepare_data(host, data);
826         }
827
828         iflags |= MCI_CMDRDY;
829         cmd = mrq->cmd;
830         cmdflags = atmci_prepare_command(slot->mmc, cmd);
831         atmci_start_command(host, cmd, cmdflags);
832
833         if (data)
834                 atmci_submit_data(host);
835
836         if (mrq->stop) {
837                 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
838                 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
839                 if (!(data->flags & MMC_DATA_WRITE))
840                         host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
841                 if (data->flags & MMC_DATA_STREAM)
842                         host->stop_cmdr |= MCI_CMDR_STREAM;
843                 else
844                         host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
845         }
846
847         /*
848          * We could have enabled interrupts earlier, but I suspect
849          * that would open up a nice can of interesting race
850          * conditions (e.g. command and data complete, but stop not
851          * prepared yet.)
852          */
853         mci_writel(host, IER, iflags);
854 }
855
856 static void atmci_queue_request(struct atmel_mci *host,
857                 struct atmel_mci_slot *slot, struct mmc_request *mrq)
858 {
859         dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
860                         host->state);
861
862         spin_lock_bh(&host->lock);
863         slot->mrq = mrq;
864         if (host->state == STATE_IDLE) {
865                 host->state = STATE_SENDING_CMD;
866                 atmci_start_request(host, slot);
867         } else {
868                 list_add_tail(&slot->queue_node, &host->queue);
869         }
870         spin_unlock_bh(&host->lock);
871 }
872
873 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
874 {
875         struct atmel_mci_slot   *slot = mmc_priv(mmc);
876         struct atmel_mci        *host = slot->host;
877         struct mmc_data         *data;
878
879         WARN_ON(slot->mrq);
880
881         /*
882          * We may "know" the card is gone even though there's still an
883          * electrical connection. If so, we really need to communicate
884          * this to the MMC core since there won't be any more
885          * interrupts as the card is completely removed. Otherwise,
886          * the MMC core might believe the card is still there even
887          * though the card was just removed very slowly.
888          */
889         if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
890                 mrq->cmd->error = -ENOMEDIUM;
891                 mmc_request_done(mmc, mrq);
892                 return;
893         }
894
895         /* We don't support multiple blocks of weird lengths. */
896         data = mrq->data;
897         if (data && data->blocks > 1 && data->blksz & 3) {
898                 mrq->cmd->error = -EINVAL;
899                 mmc_request_done(mmc, mrq);
900         }
901
902         atmci_queue_request(host, slot, mrq);
903 }
904
905 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
906 {
907         struct atmel_mci_slot   *slot = mmc_priv(mmc);
908         struct atmel_mci        *host = slot->host;
909         unsigned int            i;
910
911         slot->sdc_reg &= ~MCI_SDCBUS_MASK;
912         switch (ios->bus_width) {
913         case MMC_BUS_WIDTH_1:
914                 slot->sdc_reg |= MCI_SDCBUS_1BIT;
915                 break;
916         case MMC_BUS_WIDTH_4:
917                 slot->sdc_reg |= MCI_SDCBUS_4BIT;
918                 break;
919         }
920
921         if (ios->clock) {
922                 unsigned int clock_min = ~0U;
923                 u32 clkdiv;
924
925                 spin_lock_bh(&host->lock);
926                 if (!host->mode_reg) {
927                         clk_enable(host->mck);
928                         mci_writel(host, CR, MCI_CR_SWRST);
929                         mci_writel(host, CR, MCI_CR_MCIEN);
930                         if (atmci_is_mci2())
931                                 mci_writel(host, CFG, host->cfg_reg);
932                 }
933
934                 /*
935                  * Use mirror of ios->clock to prevent race with mmc
936                  * core ios update when finding the minimum.
937                  */
938                 slot->clock = ios->clock;
939                 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
940                         if (host->slot[i] && host->slot[i]->clock
941                                         && host->slot[i]->clock < clock_min)
942                                 clock_min = host->slot[i]->clock;
943                 }
944
945                 /* Calculate clock divider */
946                 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
947                 if (clkdiv > 255) {
948                         dev_warn(&mmc->class_dev,
949                                 "clock %u too slow; using %lu\n",
950                                 clock_min, host->bus_hz / (2 * 256));
951                         clkdiv = 255;
952                 }
953
954                 host->mode_reg = MCI_MR_CLKDIV(clkdiv);
955
956                 /*
957                  * WRPROOF and RDPROOF prevent overruns/underruns by
958                  * stopping the clock when the FIFO is full/empty.
959                  * This state is not expected to last for long.
960                  */
961                 if (mci_has_rwproof())
962                         host->mode_reg |= (MCI_MR_WRPROOF | MCI_MR_RDPROOF);
963
964                 if (atmci_is_mci2()) {
965                         /* setup High Speed mode in relation with card capacity */
966                         if (ios->timing == MMC_TIMING_SD_HS)
967                                 host->cfg_reg |= MCI_CFG_HSMODE;
968                         else
969                                 host->cfg_reg &= ~MCI_CFG_HSMODE;
970                 }
971
972                 if (list_empty(&host->queue)) {
973                         mci_writel(host, MR, host->mode_reg);
974                         if (atmci_is_mci2())
975                                 mci_writel(host, CFG, host->cfg_reg);
976                 } else {
977                         host->need_clock_update = true;
978                 }
979
980                 spin_unlock_bh(&host->lock);
981         } else {
982                 bool any_slot_active = false;
983
984                 spin_lock_bh(&host->lock);
985                 slot->clock = 0;
986                 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
987                         if (host->slot[i] && host->slot[i]->clock) {
988                                 any_slot_active = true;
989                                 break;
990                         }
991                 }
992                 if (!any_slot_active) {
993                         mci_writel(host, CR, MCI_CR_MCIDIS);
994                         if (host->mode_reg) {
995                                 mci_readl(host, MR);
996                                 clk_disable(host->mck);
997                         }
998                         host->mode_reg = 0;
999                 }
1000                 spin_unlock_bh(&host->lock);
1001         }
1002
1003         switch (ios->power_mode) {
1004         case MMC_POWER_UP:
1005                 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
1006                 break;
1007         default:
1008                 /*
1009                  * TODO: None of the currently available AVR32-based
1010                  * boards allow MMC power to be turned off. Implement
1011                  * power control when this can be tested properly.
1012                  *
1013                  * We also need to hook this into the clock management
1014                  * somehow so that newly inserted cards aren't
1015                  * subjected to a fast clock before we have a chance
1016                  * to figure out what the maximum rate is. Currently,
1017                  * there's no way to avoid this, and there never will
1018                  * be for boards that don't support power control.
1019                  */
1020                 break;
1021         }
1022 }
1023
1024 static int atmci_get_ro(struct mmc_host *mmc)
1025 {
1026         int                     read_only = -ENOSYS;
1027         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1028
1029         if (gpio_is_valid(slot->wp_pin)) {
1030                 read_only = gpio_get_value(slot->wp_pin);
1031                 dev_dbg(&mmc->class_dev, "card is %s\n",
1032                                 read_only ? "read-only" : "read-write");
1033         }
1034
1035         return read_only;
1036 }
1037
1038 static int atmci_get_cd(struct mmc_host *mmc)
1039 {
1040         int                     present = -ENOSYS;
1041         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1042
1043         if (gpio_is_valid(slot->detect_pin)) {
1044                 present = !(gpio_get_value(slot->detect_pin) ^
1045                             slot->detect_is_active_high);
1046                 dev_dbg(&mmc->class_dev, "card is %spresent\n",
1047                                 present ? "" : "not ");
1048         }
1049
1050         return present;
1051 }
1052
1053 static void atmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
1054 {
1055         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1056         struct atmel_mci        *host = slot->host;
1057
1058         if (enable)
1059                 mci_writel(host, IER, slot->sdio_irq);
1060         else
1061                 mci_writel(host, IDR, slot->sdio_irq);
1062 }
1063
1064 static const struct mmc_host_ops atmci_ops = {
1065         .request        = atmci_request,
1066         .set_ios        = atmci_set_ios,
1067         .get_ro         = atmci_get_ro,
1068         .get_cd         = atmci_get_cd,
1069         .enable_sdio_irq = atmci_enable_sdio_irq,
1070 };
1071
1072 /* Called with host->lock held */
1073 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
1074         __releases(&host->lock)
1075         __acquires(&host->lock)
1076 {
1077         struct atmel_mci_slot   *slot = NULL;
1078         struct mmc_host         *prev_mmc = host->cur_slot->mmc;
1079
1080         WARN_ON(host->cmd || host->data);
1081
1082         /*
1083          * Update the MMC clock rate if necessary. This may be
1084          * necessary if set_ios() is called when a different slot is
1085          * busy transferring data.
1086          */
1087         if (host->need_clock_update) {
1088                 mci_writel(host, MR, host->mode_reg);
1089                 if (atmci_is_mci2())
1090                         mci_writel(host, CFG, host->cfg_reg);
1091         }
1092
1093         host->cur_slot->mrq = NULL;
1094         host->mrq = NULL;
1095         if (!list_empty(&host->queue)) {
1096                 slot = list_entry(host->queue.next,
1097                                 struct atmel_mci_slot, queue_node);
1098                 list_del(&slot->queue_node);
1099                 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
1100                                 mmc_hostname(slot->mmc));
1101                 host->state = STATE_SENDING_CMD;
1102                 atmci_start_request(host, slot);
1103         } else {
1104                 dev_vdbg(&host->pdev->dev, "list empty\n");
1105                 host->state = STATE_IDLE;
1106         }
1107
1108         spin_unlock(&host->lock);
1109         mmc_request_done(prev_mmc, mrq);
1110         spin_lock(&host->lock);
1111 }
1112
1113 static void atmci_command_complete(struct atmel_mci *host,
1114                         struct mmc_command *cmd)
1115 {
1116         u32             status = host->cmd_status;
1117
1118         /* Read the response from the card (up to 16 bytes) */
1119         cmd->resp[0] = mci_readl(host, RSPR);
1120         cmd->resp[1] = mci_readl(host, RSPR);
1121         cmd->resp[2] = mci_readl(host, RSPR);
1122         cmd->resp[3] = mci_readl(host, RSPR);
1123
1124         if (status & MCI_RTOE)
1125                 cmd->error = -ETIMEDOUT;
1126         else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
1127                 cmd->error = -EILSEQ;
1128         else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
1129                 cmd->error = -EIO;
1130         else
1131                 cmd->error = 0;
1132
1133         if (cmd->error) {
1134                 dev_dbg(&host->pdev->dev,
1135                         "command error: status=0x%08x\n", status);
1136
1137                 if (cmd->data) {
1138                         atmci_stop_dma(host);
1139                         host->data = NULL;
1140                         mci_writel(host, IDR, MCI_NOTBUSY
1141                                         | MCI_TXRDY | MCI_RXRDY
1142                                         | ATMCI_DATA_ERROR_FLAGS);
1143                 }
1144         }
1145 }
1146
1147 static void atmci_detect_change(unsigned long data)
1148 {
1149         struct atmel_mci_slot   *slot = (struct atmel_mci_slot *)data;
1150         bool                    present;
1151         bool                    present_old;
1152
1153         /*
1154          * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1155          * freeing the interrupt. We must not re-enable the interrupt
1156          * if it has been freed, and if we're shutting down, it
1157          * doesn't really matter whether the card is present or not.
1158          */
1159         smp_rmb();
1160         if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1161                 return;
1162
1163         enable_irq(gpio_to_irq(slot->detect_pin));
1164         present = !(gpio_get_value(slot->detect_pin) ^
1165                     slot->detect_is_active_high);
1166         present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1167
1168         dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1169                         present, present_old);
1170
1171         if (present != present_old) {
1172                 struct atmel_mci        *host = slot->host;
1173                 struct mmc_request      *mrq;
1174
1175                 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1176                         present ? "inserted" : "removed");
1177
1178                 spin_lock(&host->lock);
1179
1180                 if (!present)
1181                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1182                 else
1183                         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1184
1185                 /* Clean up queue if present */
1186                 mrq = slot->mrq;
1187                 if (mrq) {
1188                         if (mrq == host->mrq) {
1189                                 /*
1190                                  * Reset controller to terminate any ongoing
1191                                  * commands or data transfers.
1192                                  */
1193                                 mci_writel(host, CR, MCI_CR_SWRST);
1194                                 mci_writel(host, CR, MCI_CR_MCIEN);
1195                                 mci_writel(host, MR, host->mode_reg);
1196                                 if (atmci_is_mci2())
1197                                         mci_writel(host, CFG, host->cfg_reg);
1198
1199                                 host->data = NULL;
1200                                 host->cmd = NULL;
1201
1202                                 switch (host->state) {
1203                                 case STATE_IDLE:
1204                                         break;
1205                                 case STATE_SENDING_CMD:
1206                                         mrq->cmd->error = -ENOMEDIUM;
1207                                         if (!mrq->data)
1208                                                 break;
1209                                         /* fall through */
1210                                 case STATE_SENDING_DATA:
1211                                         mrq->data->error = -ENOMEDIUM;
1212                                         atmci_stop_dma(host);
1213                                         break;
1214                                 case STATE_DATA_BUSY:
1215                                 case STATE_DATA_ERROR:
1216                                         if (mrq->data->error == -EINPROGRESS)
1217                                                 mrq->data->error = -ENOMEDIUM;
1218                                         if (!mrq->stop)
1219                                                 break;
1220                                         /* fall through */
1221                                 case STATE_SENDING_STOP:
1222                                         mrq->stop->error = -ENOMEDIUM;
1223                                         break;
1224                                 }
1225
1226                                 atmci_request_end(host, mrq);
1227                         } else {
1228                                 list_del(&slot->queue_node);
1229                                 mrq->cmd->error = -ENOMEDIUM;
1230                                 if (mrq->data)
1231                                         mrq->data->error = -ENOMEDIUM;
1232                                 if (mrq->stop)
1233                                         mrq->stop->error = -ENOMEDIUM;
1234
1235                                 spin_unlock(&host->lock);
1236                                 mmc_request_done(slot->mmc, mrq);
1237                                 spin_lock(&host->lock);
1238                         }
1239                 }
1240                 spin_unlock(&host->lock);
1241
1242                 mmc_detect_change(slot->mmc, 0);
1243         }
1244 }
1245
1246 static void atmci_tasklet_func(unsigned long priv)
1247 {
1248         struct atmel_mci        *host = (struct atmel_mci *)priv;
1249         struct mmc_request      *mrq = host->mrq;
1250         struct mmc_data         *data = host->data;
1251         struct mmc_command      *cmd = host->cmd;
1252         enum atmel_mci_state    state = host->state;
1253         enum atmel_mci_state    prev_state;
1254         u32                     status;
1255
1256         spin_lock(&host->lock);
1257
1258         state = host->state;
1259
1260         dev_vdbg(&host->pdev->dev,
1261                 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1262                 state, host->pending_events, host->completed_events,
1263                 mci_readl(host, IMR));
1264
1265         do {
1266                 prev_state = state;
1267
1268                 switch (state) {
1269                 case STATE_IDLE:
1270                         break;
1271
1272                 case STATE_SENDING_CMD:
1273                         if (!atmci_test_and_clear_pending(host,
1274                                                 EVENT_CMD_COMPLETE))
1275                                 break;
1276
1277                         host->cmd = NULL;
1278                         atmci_set_completed(host, EVENT_CMD_COMPLETE);
1279                         atmci_command_complete(host, mrq->cmd);
1280                         if (!mrq->data || cmd->error) {
1281                                 atmci_request_end(host, host->mrq);
1282                                 goto unlock;
1283                         }
1284
1285                         prev_state = state = STATE_SENDING_DATA;
1286                         /* fall through */
1287
1288                 case STATE_SENDING_DATA:
1289                         if (atmci_test_and_clear_pending(host,
1290                                                 EVENT_DATA_ERROR)) {
1291                                 atmci_stop_dma(host);
1292                                 if (data->stop)
1293                                         send_stop_cmd(host, data);
1294                                 state = STATE_DATA_ERROR;
1295                                 break;
1296                         }
1297
1298                         if (!atmci_test_and_clear_pending(host,
1299                                                 EVENT_XFER_COMPLETE))
1300                                 break;
1301
1302                         atmci_set_completed(host, EVENT_XFER_COMPLETE);
1303                         prev_state = state = STATE_DATA_BUSY;
1304                         /* fall through */
1305
1306                 case STATE_DATA_BUSY:
1307                         if (!atmci_test_and_clear_pending(host,
1308                                                 EVENT_DATA_COMPLETE))
1309                                 break;
1310
1311                         host->data = NULL;
1312                         atmci_set_completed(host, EVENT_DATA_COMPLETE);
1313                         status = host->data_status;
1314                         if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1315                                 if (status & MCI_DTOE) {
1316                                         dev_dbg(&host->pdev->dev,
1317                                                         "data timeout error\n");
1318                                         data->error = -ETIMEDOUT;
1319                                 } else if (status & MCI_DCRCE) {
1320                                         dev_dbg(&host->pdev->dev,
1321                                                         "data CRC error\n");
1322                                         data->error = -EILSEQ;
1323                                 } else {
1324                                         dev_dbg(&host->pdev->dev,
1325                                                 "data FIFO error (status=%08x)\n",
1326                                                 status);
1327                                         data->error = -EIO;
1328                                 }
1329                         } else {
1330                                 data->bytes_xfered = data->blocks * data->blksz;
1331                                 data->error = 0;
1332                                 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS);
1333                         }
1334
1335                         if (!data->stop) {
1336                                 atmci_request_end(host, host->mrq);
1337                                 goto unlock;
1338                         }
1339
1340                         prev_state = state = STATE_SENDING_STOP;
1341                         if (!data->error)
1342                                 send_stop_cmd(host, data);
1343                         /* fall through */
1344
1345                 case STATE_SENDING_STOP:
1346                         if (!atmci_test_and_clear_pending(host,
1347                                                 EVENT_CMD_COMPLETE))
1348                                 break;
1349
1350                         host->cmd = NULL;
1351                         atmci_command_complete(host, mrq->stop);
1352                         atmci_request_end(host, host->mrq);
1353                         goto unlock;
1354
1355                 case STATE_DATA_ERROR:
1356                         if (!atmci_test_and_clear_pending(host,
1357                                                 EVENT_XFER_COMPLETE))
1358                                 break;
1359
1360                         state = STATE_DATA_BUSY;
1361                         break;
1362                 }
1363         } while (state != prev_state);
1364
1365         host->state = state;
1366
1367 unlock:
1368         spin_unlock(&host->lock);
1369 }
1370
1371 static void atmci_read_data_pio(struct atmel_mci *host)
1372 {
1373         struct scatterlist      *sg = host->sg;
1374         void                    *buf = sg_virt(sg);
1375         unsigned int            offset = host->pio_offset;
1376         struct mmc_data         *data = host->data;
1377         u32                     value;
1378         u32                     status;
1379         unsigned int            nbytes = 0;
1380
1381         do {
1382                 value = mci_readl(host, RDR);
1383                 if (likely(offset + 4 <= sg->length)) {
1384                         put_unaligned(value, (u32 *)(buf + offset));
1385
1386                         offset += 4;
1387                         nbytes += 4;
1388
1389                         if (offset == sg->length) {
1390                                 flush_dcache_page(sg_page(sg));
1391                                 host->sg = sg = sg_next(sg);
1392                                 if (!sg)
1393                                         goto done;
1394
1395                                 offset = 0;
1396                                 buf = sg_virt(sg);
1397                         }
1398                 } else {
1399                         unsigned int remaining = sg->length - offset;
1400                         memcpy(buf + offset, &value, remaining);
1401                         nbytes += remaining;
1402
1403                         flush_dcache_page(sg_page(sg));
1404                         host->sg = sg = sg_next(sg);
1405                         if (!sg)
1406                                 goto done;
1407
1408                         offset = 4 - remaining;
1409                         buf = sg_virt(sg);
1410                         memcpy(buf, (u8 *)&value + remaining, offset);
1411                         nbytes += offset;
1412                 }
1413
1414                 status = mci_readl(host, SR);
1415                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1416                         mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
1417                                                 | ATMCI_DATA_ERROR_FLAGS));
1418                         host->data_status = status;
1419                         data->bytes_xfered += nbytes;
1420                         smp_wmb();
1421                         atmci_set_pending(host, EVENT_DATA_ERROR);
1422                         tasklet_schedule(&host->tasklet);
1423                         return;
1424                 }
1425         } while (status & MCI_RXRDY);
1426
1427         host->pio_offset = offset;
1428         data->bytes_xfered += nbytes;
1429
1430         return;
1431
1432 done:
1433         mci_writel(host, IDR, MCI_RXRDY);
1434         mci_writel(host, IER, MCI_NOTBUSY);
1435         data->bytes_xfered += nbytes;
1436         smp_wmb();
1437         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1438 }
1439
1440 static void atmci_write_data_pio(struct atmel_mci *host)
1441 {
1442         struct scatterlist      *sg = host->sg;
1443         void                    *buf = sg_virt(sg);
1444         unsigned int            offset = host->pio_offset;
1445         struct mmc_data         *data = host->data;
1446         u32                     value;
1447         u32                     status;
1448         unsigned int            nbytes = 0;
1449
1450         do {
1451                 if (likely(offset + 4 <= sg->length)) {
1452                         value = get_unaligned((u32 *)(buf + offset));
1453                         mci_writel(host, TDR, value);
1454
1455                         offset += 4;
1456                         nbytes += 4;
1457                         if (offset == sg->length) {
1458                                 host->sg = sg = sg_next(sg);
1459                                 if (!sg)
1460                                         goto done;
1461
1462                                 offset = 0;
1463                                 buf = sg_virt(sg);
1464                         }
1465                 } else {
1466                         unsigned int remaining = sg->length - offset;
1467
1468                         value = 0;
1469                         memcpy(&value, buf + offset, remaining);
1470                         nbytes += remaining;
1471
1472                         host->sg = sg = sg_next(sg);
1473                         if (!sg) {
1474                                 mci_writel(host, TDR, value);
1475                                 goto done;
1476                         }
1477
1478                         offset = 4 - remaining;
1479                         buf = sg_virt(sg);
1480                         memcpy((u8 *)&value + remaining, buf, offset);
1481                         mci_writel(host, TDR, value);
1482                         nbytes += offset;
1483                 }
1484
1485                 status = mci_readl(host, SR);
1486                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1487                         mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
1488                                                 | ATMCI_DATA_ERROR_FLAGS));
1489                         host->data_status = status;
1490                         data->bytes_xfered += nbytes;
1491                         smp_wmb();
1492                         atmci_set_pending(host, EVENT_DATA_ERROR);
1493                         tasklet_schedule(&host->tasklet);
1494                         return;
1495                 }
1496         } while (status & MCI_TXRDY);
1497
1498         host->pio_offset = offset;
1499         data->bytes_xfered += nbytes;
1500
1501         return;
1502
1503 done:
1504         mci_writel(host, IDR, MCI_TXRDY);
1505         mci_writel(host, IER, MCI_NOTBUSY);
1506         data->bytes_xfered += nbytes;
1507         smp_wmb();
1508         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1509 }
1510
1511 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1512 {
1513         mci_writel(host, IDR, MCI_CMDRDY);
1514
1515         host->cmd_status = status;
1516         smp_wmb();
1517         atmci_set_pending(host, EVENT_CMD_COMPLETE);
1518         tasklet_schedule(&host->tasklet);
1519 }
1520
1521 static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status)
1522 {
1523         int     i;
1524
1525         for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1526                 struct atmel_mci_slot *slot = host->slot[i];
1527                 if (slot && (status & slot->sdio_irq)) {
1528                         mmc_signal_sdio_irq(slot->mmc);
1529                 }
1530         }
1531 }
1532
1533
1534 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1535 {
1536         struct atmel_mci        *host = dev_id;
1537         u32                     status, mask, pending;
1538         unsigned int            pass_count = 0;
1539
1540         do {
1541                 status = mci_readl(host, SR);
1542                 mask = mci_readl(host, IMR);
1543                 pending = status & mask;
1544                 if (!pending)
1545                         break;
1546
1547                 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1548                         mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
1549                                         | MCI_RXRDY | MCI_TXRDY);
1550                         pending &= mci_readl(host, IMR);
1551
1552                         host->data_status = status;
1553                         smp_wmb();
1554                         atmci_set_pending(host, EVENT_DATA_ERROR);
1555                         tasklet_schedule(&host->tasklet);
1556                 }
1557                 if (pending & MCI_NOTBUSY) {
1558                         mci_writel(host, IDR,
1559                                         ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
1560                         if (!host->data_status)
1561                                 host->data_status = status;
1562                         smp_wmb();
1563                         atmci_set_pending(host, EVENT_DATA_COMPLETE);
1564                         tasklet_schedule(&host->tasklet);
1565                 }
1566                 if (pending & MCI_RXRDY)
1567                         atmci_read_data_pio(host);
1568                 if (pending & MCI_TXRDY)
1569                         atmci_write_data_pio(host);
1570
1571                 if (pending & MCI_CMDRDY)
1572                         atmci_cmd_interrupt(host, status);
1573
1574                 if (pending & (MCI_SDIOIRQA | MCI_SDIOIRQB))
1575                         atmci_sdio_interrupt(host, status);
1576
1577         } while (pass_count++ < 5);
1578
1579         return pass_count ? IRQ_HANDLED : IRQ_NONE;
1580 }
1581
1582 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1583 {
1584         struct atmel_mci_slot   *slot = dev_id;
1585
1586         /*
1587          * Disable interrupts until the pin has stabilized and check
1588          * the state then. Use mod_timer() since we may be in the
1589          * middle of the timer routine when this interrupt triggers.
1590          */
1591         disable_irq_nosync(irq);
1592         mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1593
1594         return IRQ_HANDLED;
1595 }
1596
1597 static int __init atmci_init_slot(struct atmel_mci *host,
1598                 struct mci_slot_pdata *slot_data, unsigned int id,
1599                 u32 sdc_reg, u32 sdio_irq)
1600 {
1601         struct mmc_host                 *mmc;
1602         struct atmel_mci_slot           *slot;
1603
1604         mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1605         if (!mmc)
1606                 return -ENOMEM;
1607
1608         slot = mmc_priv(mmc);
1609         slot->mmc = mmc;
1610         slot->host = host;
1611         slot->detect_pin = slot_data->detect_pin;
1612         slot->wp_pin = slot_data->wp_pin;
1613         slot->detect_is_active_high = slot_data->detect_is_active_high;
1614         slot->sdc_reg = sdc_reg;
1615         slot->sdio_irq = sdio_irq;
1616
1617         mmc->ops = &atmci_ops;
1618         mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1619         mmc->f_max = host->bus_hz / 2;
1620         mmc->ocr_avail  = MMC_VDD_32_33 | MMC_VDD_33_34;
1621         if (sdio_irq)
1622                 mmc->caps |= MMC_CAP_SDIO_IRQ;
1623         if (atmci_is_mci2())
1624                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1625         if (slot_data->bus_width >= 4)
1626                 mmc->caps |= MMC_CAP_4_BIT_DATA;
1627
1628         mmc->max_segs = 64;
1629         mmc->max_req_size = 32768 * 512;
1630         mmc->max_blk_size = 32768;
1631         mmc->max_blk_count = 512;
1632
1633         /* Assume card is present initially */
1634         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1635         if (gpio_is_valid(slot->detect_pin)) {
1636                 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1637                         dev_dbg(&mmc->class_dev, "no detect pin available\n");
1638                         slot->detect_pin = -EBUSY;
1639                 } else if (gpio_get_value(slot->detect_pin) ^
1640                                 slot->detect_is_active_high) {
1641                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1642                 }
1643         }
1644
1645         if (!gpio_is_valid(slot->detect_pin))
1646                 mmc->caps |= MMC_CAP_NEEDS_POLL;
1647
1648         if (gpio_is_valid(slot->wp_pin)) {
1649                 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1650                         dev_dbg(&mmc->class_dev, "no WP pin available\n");
1651                         slot->wp_pin = -EBUSY;
1652                 }
1653         }
1654
1655         host->slot[id] = slot;
1656         mmc_add_host(mmc);
1657
1658         if (gpio_is_valid(slot->detect_pin)) {
1659                 int ret;
1660
1661                 setup_timer(&slot->detect_timer, atmci_detect_change,
1662                                 (unsigned long)slot);
1663
1664                 ret = request_irq(gpio_to_irq(slot->detect_pin),
1665                                 atmci_detect_interrupt,
1666                                 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1667                                 "mmc-detect", slot);
1668                 if (ret) {
1669                         dev_dbg(&mmc->class_dev,
1670                                 "could not request IRQ %d for detect pin\n",
1671                                 gpio_to_irq(slot->detect_pin));
1672                         gpio_free(slot->detect_pin);
1673                         slot->detect_pin = -EBUSY;
1674                 }
1675         }
1676
1677         atmci_init_debugfs(slot);
1678
1679         return 0;
1680 }
1681
1682 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1683                 unsigned int id)
1684 {
1685         /* Debugfs stuff is cleaned up by mmc core */
1686
1687         set_bit(ATMCI_SHUTDOWN, &slot->flags);
1688         smp_wmb();
1689
1690         mmc_remove_host(slot->mmc);
1691
1692         if (gpio_is_valid(slot->detect_pin)) {
1693                 int pin = slot->detect_pin;
1694
1695                 free_irq(gpio_to_irq(pin), slot);
1696                 del_timer_sync(&slot->detect_timer);
1697                 gpio_free(pin);
1698         }
1699         if (gpio_is_valid(slot->wp_pin))
1700                 gpio_free(slot->wp_pin);
1701
1702         slot->host->slot[id] = NULL;
1703         mmc_free_host(slot->mmc);
1704 }
1705
1706 #ifdef CONFIG_MMC_ATMELMCI_DMA
1707 static bool filter(struct dma_chan *chan, void *slave)
1708 {
1709         struct mci_dma_data     *sl = slave;
1710
1711         if (sl && find_slave_dev(sl) == chan->device->dev) {
1712                 chan->private = slave_data_ptr(sl);
1713                 return true;
1714         } else {
1715                 return false;
1716         }
1717 }
1718
1719 static void atmci_configure_dma(struct atmel_mci *host)
1720 {
1721         struct mci_platform_data        *pdata;
1722
1723         if (host == NULL)
1724                 return;
1725
1726         pdata = host->pdev->dev.platform_data;
1727
1728         if (pdata && find_slave_dev(pdata->dma_slave)) {
1729                 dma_cap_mask_t mask;
1730
1731                 setup_dma_addr(pdata->dma_slave,
1732                                host->mapbase + MCI_TDR,
1733                                host->mapbase + MCI_RDR);
1734
1735                 /* Try to grab a DMA channel */
1736                 dma_cap_zero(mask);
1737                 dma_cap_set(DMA_SLAVE, mask);
1738                 host->dma.chan =
1739                         dma_request_channel(mask, filter, pdata->dma_slave);
1740         }
1741         if (!host->dma.chan)
1742                 dev_notice(&host->pdev->dev, "DMA not available, using PIO\n");
1743         else
1744                 dev_info(&host->pdev->dev,
1745                                         "Using %s for DMA transfers\n",
1746                                         dma_chan_name(host->dma.chan));
1747 }
1748 #else
1749 static void atmci_configure_dma(struct atmel_mci *host) {}
1750 #endif
1751
1752 static int __init atmci_probe(struct platform_device *pdev)
1753 {
1754         struct mci_platform_data        *pdata;
1755         struct atmel_mci                *host;
1756         struct resource                 *regs;
1757         unsigned int                    nr_slots;
1758         int                             irq;
1759         int                             ret;
1760
1761         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1762         if (!regs)
1763                 return -ENXIO;
1764         pdata = pdev->dev.platform_data;
1765         if (!pdata)
1766                 return -ENXIO;
1767         irq = platform_get_irq(pdev, 0);
1768         if (irq < 0)
1769                 return irq;
1770
1771         host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
1772         if (!host)
1773                 return -ENOMEM;
1774
1775         host->pdev = pdev;
1776         spin_lock_init(&host->lock);
1777         INIT_LIST_HEAD(&host->queue);
1778
1779         host->mck = clk_get(&pdev->dev, "mci_clk");
1780         if (IS_ERR(host->mck)) {
1781                 ret = PTR_ERR(host->mck);
1782                 goto err_clk_get;
1783         }
1784
1785         ret = -ENOMEM;
1786         host->regs = ioremap(regs->start, resource_size(regs));
1787         if (!host->regs)
1788                 goto err_ioremap;
1789
1790         clk_enable(host->mck);
1791         mci_writel(host, CR, MCI_CR_SWRST);
1792         host->bus_hz = clk_get_rate(host->mck);
1793         clk_disable(host->mck);
1794
1795         host->mapbase = regs->start;
1796
1797         tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
1798
1799         ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host);
1800         if (ret)
1801                 goto err_request_irq;
1802
1803         atmci_configure_dma(host);
1804
1805         platform_set_drvdata(pdev, host);
1806
1807         /* We need at least one slot to succeed */
1808         nr_slots = 0;
1809         ret = -ENODEV;
1810         if (pdata->slot[0].bus_width) {
1811                 ret = atmci_init_slot(host, &pdata->slot[0],
1812                                 0, MCI_SDCSEL_SLOT_A, MCI_SDIOIRQA);
1813                 if (!ret)
1814                         nr_slots++;
1815         }
1816         if (pdata->slot[1].bus_width) {
1817                 ret = atmci_init_slot(host, &pdata->slot[1],
1818                                 1, MCI_SDCSEL_SLOT_B, MCI_SDIOIRQB);
1819                 if (!ret)
1820                         nr_slots++;
1821         }
1822
1823         if (!nr_slots) {
1824                 dev_err(&pdev->dev, "init failed: no slot defined\n");
1825                 goto err_init_slot;
1826         }
1827
1828         dev_info(&pdev->dev,
1829                         "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1830                         host->mapbase, irq, nr_slots);
1831
1832         return 0;
1833
1834 err_init_slot:
1835 #ifdef CONFIG_MMC_ATMELMCI_DMA
1836         if (host->dma.chan)
1837                 dma_release_channel(host->dma.chan);
1838 #endif
1839         free_irq(irq, host);
1840 err_request_irq:
1841         iounmap(host->regs);
1842 err_ioremap:
1843         clk_put(host->mck);
1844 err_clk_get:
1845         kfree(host);
1846         return ret;
1847 }
1848
1849 static int __exit atmci_remove(struct platform_device *pdev)
1850 {
1851         struct atmel_mci        *host = platform_get_drvdata(pdev);
1852         unsigned int            i;
1853
1854         platform_set_drvdata(pdev, NULL);
1855
1856         for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1857                 if (host->slot[i])
1858                         atmci_cleanup_slot(host->slot[i], i);
1859         }
1860
1861         clk_enable(host->mck);
1862         mci_writel(host, IDR, ~0UL);
1863         mci_writel(host, CR, MCI_CR_MCIDIS);
1864         mci_readl(host, SR);
1865         clk_disable(host->mck);
1866
1867 #ifdef CONFIG_MMC_ATMELMCI_DMA
1868         if (host->dma.chan)
1869                 dma_release_channel(host->dma.chan);
1870 #endif
1871
1872         free_irq(platform_get_irq(pdev, 0), host);
1873         iounmap(host->regs);
1874
1875         clk_put(host->mck);
1876         kfree(host);
1877
1878         return 0;
1879 }
1880
1881 static struct platform_driver atmci_driver = {
1882         .remove         = __exit_p(atmci_remove),
1883         .driver         = {
1884                 .name           = "atmel_mci",
1885         },
1886 };
1887
1888 static int __init atmci_init(void)
1889 {
1890         return platform_driver_probe(&atmci_driver, atmci_probe);
1891 }
1892
1893 static void __exit atmci_exit(void)
1894 {
1895         platform_driver_unregister(&atmci_driver);
1896 }
1897
1898 late_initcall(atmci_init); /* try to load after dma driver when built-in */
1899 module_exit(atmci_exit);
1900
1901 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1902 MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>");
1903 MODULE_LICENSE("GPL v2");