config: tegra3: enable /dev mount with ACL
[linux-2.6.git] / drivers / mfd / wm8350-core.c
1 /*
2  * wm8350-core.c  --  Device access for Wolfson WM8350
3  *
4  * Copyright 2007, 2008 Wolfson Microelectronics PLC.
5  *
6  * Author: Liam Girdwood, Mark Brown
7  *
8  *  This program is free software; you can redistribute  it and/or modify it
9  *  under  the terms of  the GNU General  Public License as published by the
10  *  Free Software Foundation;  either version 2 of the  License, or (at your
11  *  option) any later version.
12  *
13  */
14
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/slab.h>
19 #include <linux/bug.h>
20 #include <linux/device.h>
21 #include <linux/delay.h>
22 #include <linux/interrupt.h>
23 #include <linux/workqueue.h>
24
25 #include <linux/mfd/wm8350/core.h>
26 #include <linux/mfd/wm8350/audio.h>
27 #include <linux/mfd/wm8350/comparator.h>
28 #include <linux/mfd/wm8350/gpio.h>
29 #include <linux/mfd/wm8350/pmic.h>
30 #include <linux/mfd/wm8350/rtc.h>
31 #include <linux/mfd/wm8350/supply.h>
32 #include <linux/mfd/wm8350/wdt.h>
33
34 #define WM8350_UNLOCK_KEY               0x0013
35 #define WM8350_LOCK_KEY                 0x0000
36
37 #define WM8350_CLOCK_CONTROL_1          0x28
38 #define WM8350_AIF_TEST                 0x74
39
40 /* debug */
41 #define WM8350_BUS_DEBUG 0
42 #if WM8350_BUS_DEBUG
43 #define dump(regs, src) do { \
44         int i_; \
45         u16 *src_ = src; \
46         printk(KERN_DEBUG); \
47         for (i_ = 0; i_ < regs; i_++) \
48                 printk(" 0x%4.4x", *src_++); \
49         printk("\n"); \
50 } while (0);
51 #else
52 #define dump(bytes, src)
53 #endif
54
55 #define WM8350_LOCK_DEBUG 0
56 #if WM8350_LOCK_DEBUG
57 #define ldbg(format, arg...) printk(format, ## arg)
58 #else
59 #define ldbg(format, arg...)
60 #endif
61
62 /*
63  * WM8350 Device IO
64  */
65 static DEFINE_MUTEX(io_mutex);
66 static DEFINE_MUTEX(reg_lock_mutex);
67
68 /* Perform a physical read from the device.
69  */
70 static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs,
71                             u16 *dest)
72 {
73         int i, ret;
74         int bytes = num_regs * 2;
75
76         dev_dbg(wm8350->dev, "volatile read\n");
77         ret = wm8350->read_dev(wm8350, reg, bytes, (char *)dest);
78
79         for (i = reg; i < reg + num_regs; i++) {
80                 /* Cache is CPU endian */
81                 dest[i - reg] = be16_to_cpu(dest[i - reg]);
82
83                 /* Mask out non-readable bits */
84                 dest[i - reg] &= wm8350_reg_io_map[i].readable;
85         }
86
87         dump(num_regs, dest);
88
89         return ret;
90 }
91
92 static int wm8350_read(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *dest)
93 {
94         int i;
95         int end = reg + num_regs;
96         int ret = 0;
97         int bytes = num_regs * 2;
98
99         if (wm8350->read_dev == NULL)
100                 return -ENODEV;
101
102         if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
103                 dev_err(wm8350->dev, "invalid reg %x\n",
104                         reg + num_regs - 1);
105                 return -EINVAL;
106         }
107
108         dev_dbg(wm8350->dev,
109                 "%s R%d(0x%2.2x) %d regs\n", __func__, reg, reg, num_regs);
110
111 #if WM8350_BUS_DEBUG
112         /* we can _safely_ read any register, but warn if read not supported */
113         for (i = reg; i < end; i++) {
114                 if (!wm8350_reg_io_map[i].readable)
115                         dev_warn(wm8350->dev,
116                                 "reg R%d is not readable\n", i);
117         }
118 #endif
119
120         /* if any volatile registers are required, then read back all */
121         for (i = reg; i < end; i++)
122                 if (wm8350_reg_io_map[i].vol)
123                         return wm8350_phys_read(wm8350, reg, num_regs, dest);
124
125         /* no volatiles, then cache is good */
126         dev_dbg(wm8350->dev, "cache read\n");
127         memcpy(dest, &wm8350->reg_cache[reg], bytes);
128         dump(num_regs, dest);
129         return ret;
130 }
131
132 static inline int is_reg_locked(struct wm8350 *wm8350, u8 reg)
133 {
134         if (reg == WM8350_SECURITY ||
135             wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY)
136                 return 0;
137
138         if ((reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
139              reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
140             (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
141              reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
142                 return 1;
143         return 0;
144 }
145
146 static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)
147 {
148         int i;
149         int end = reg + num_regs;
150         int bytes = num_regs * 2;
151
152         if (wm8350->write_dev == NULL)
153                 return -ENODEV;
154
155         if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
156                 dev_err(wm8350->dev, "invalid reg %x\n",
157                         reg + num_regs - 1);
158                 return -EINVAL;
159         }
160
161         /* it's generally not a good idea to write to RO or locked registers */
162         for (i = reg; i < end; i++) {
163                 if (!wm8350_reg_io_map[i].writable) {
164                         dev_err(wm8350->dev,
165                                 "attempted write to read only reg R%d\n", i);
166                         return -EINVAL;
167                 }
168
169                 if (is_reg_locked(wm8350, i)) {
170                         dev_err(wm8350->dev,
171                                "attempted write to locked reg R%d\n", i);
172                         return -EINVAL;
173                 }
174
175                 src[i - reg] &= wm8350_reg_io_map[i].writable;
176
177                 wm8350->reg_cache[i] =
178                         (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
179                         | src[i - reg];
180
181                 src[i - reg] = cpu_to_be16(src[i - reg]);
182         }
183
184         /* Actually write it out */
185         return wm8350->write_dev(wm8350, reg, bytes, (char *)src);
186 }
187
188 /*
189  * Safe read, modify, write methods
190  */
191 int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
192 {
193         u16 data;
194         int err;
195
196         mutex_lock(&io_mutex);
197         err = wm8350_read(wm8350, reg, 1, &data);
198         if (err) {
199                 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
200                 goto out;
201         }
202
203         data &= ~mask;
204         err = wm8350_write(wm8350, reg, 1, &data);
205         if (err)
206                 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
207 out:
208         mutex_unlock(&io_mutex);
209         return err;
210 }
211 EXPORT_SYMBOL_GPL(wm8350_clear_bits);
212
213 int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
214 {
215         u16 data;
216         int err;
217
218         mutex_lock(&io_mutex);
219         err = wm8350_read(wm8350, reg, 1, &data);
220         if (err) {
221                 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
222                 goto out;
223         }
224
225         data |= mask;
226         err = wm8350_write(wm8350, reg, 1, &data);
227         if (err)
228                 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
229 out:
230         mutex_unlock(&io_mutex);
231         return err;
232 }
233 EXPORT_SYMBOL_GPL(wm8350_set_bits);
234
235 u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
236 {
237         u16 data;
238         int err;
239
240         mutex_lock(&io_mutex);
241         err = wm8350_read(wm8350, reg, 1, &data);
242         if (err)
243                 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
244
245         mutex_unlock(&io_mutex);
246         return data;
247 }
248 EXPORT_SYMBOL_GPL(wm8350_reg_read);
249
250 int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
251 {
252         int ret;
253         u16 data = val;
254
255         mutex_lock(&io_mutex);
256         ret = wm8350_write(wm8350, reg, 1, &data);
257         if (ret)
258                 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
259         mutex_unlock(&io_mutex);
260         return ret;
261 }
262 EXPORT_SYMBOL_GPL(wm8350_reg_write);
263
264 int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
265                       u16 *dest)
266 {
267         int err = 0;
268
269         mutex_lock(&io_mutex);
270         err = wm8350_read(wm8350, start_reg, regs, dest);
271         if (err)
272                 dev_err(wm8350->dev, "block read starting from R%d failed\n",
273                         start_reg);
274         mutex_unlock(&io_mutex);
275         return err;
276 }
277 EXPORT_SYMBOL_GPL(wm8350_block_read);
278
279 int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
280                        u16 *src)
281 {
282         int ret = 0;
283
284         mutex_lock(&io_mutex);
285         ret = wm8350_write(wm8350, start_reg, regs, src);
286         if (ret)
287                 dev_err(wm8350->dev, "block write starting at R%d failed\n",
288                         start_reg);
289         mutex_unlock(&io_mutex);
290         return ret;
291 }
292 EXPORT_SYMBOL_GPL(wm8350_block_write);
293
294 /**
295  * wm8350_reg_lock()
296  *
297  * The WM8350 has a hardware lock which can be used to prevent writes to
298  * some registers (generally those which can cause particularly serious
299  * problems if misused).  This function enables that lock.
300  */
301 int wm8350_reg_lock(struct wm8350 *wm8350)
302 {
303         u16 key = WM8350_LOCK_KEY;
304         int ret;
305
306         ldbg(__func__);
307         mutex_lock(&io_mutex);
308         ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
309         if (ret)
310                 dev_err(wm8350->dev, "lock failed\n");
311         mutex_unlock(&io_mutex);
312         return ret;
313 }
314 EXPORT_SYMBOL_GPL(wm8350_reg_lock);
315
316 /**
317  * wm8350_reg_unlock()
318  *
319  * The WM8350 has a hardware lock which can be used to prevent writes to
320  * some registers (generally those which can cause particularly serious
321  * problems if misused).  This function disables that lock so updates
322  * can be performed.  For maximum safety this should be done only when
323  * required.
324  */
325 int wm8350_reg_unlock(struct wm8350 *wm8350)
326 {
327         u16 key = WM8350_UNLOCK_KEY;
328         int ret;
329
330         ldbg(__func__);
331         mutex_lock(&io_mutex);
332         ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
333         if (ret)
334                 dev_err(wm8350->dev, "unlock failed\n");
335         mutex_unlock(&io_mutex);
336         return ret;
337 }
338 EXPORT_SYMBOL_GPL(wm8350_reg_unlock);
339
340 int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
341 {
342         u16 reg, result = 0;
343
344         if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP)
345                 return -EINVAL;
346         if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
347             && (scale != 0 || vref != 0))
348                 return -EINVAL;
349
350         mutex_lock(&wm8350->auxadc_mutex);
351
352         /* Turn on the ADC */
353         reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
354         wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA);
355
356         if (scale || vref) {
357                 reg = scale << 13;
358                 reg |= vref << 12;
359                 wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
360         }
361
362         reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
363         reg |= 1 << channel | WM8350_AUXADC_POLL;
364         wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);
365
366         /* If a late IRQ left the completion signalled then consume
367          * the completion. */
368         try_wait_for_completion(&wm8350->auxadc_done);
369
370         /* We ignore the result of the completion and just check for a
371          * conversion result, allowing us to soldier on if the IRQ
372          * infrastructure is not set up for the chip. */
373         wait_for_completion_timeout(&wm8350->auxadc_done, msecs_to_jiffies(5));
374
375         reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
376         if (reg & WM8350_AUXADC_POLL)
377                 dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
378         else
379                 result = wm8350_reg_read(wm8350,
380                                          WM8350_AUX1_READBACK + channel);
381
382         /* Turn off the ADC */
383         reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
384         wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
385                          reg & ~WM8350_AUXADC_ENA);
386
387         mutex_unlock(&wm8350->auxadc_mutex);
388
389         return result & WM8350_AUXADC_DATA1_MASK;
390 }
391 EXPORT_SYMBOL_GPL(wm8350_read_auxadc);
392
393 static irqreturn_t wm8350_auxadc_irq(int irq, void *irq_data)
394 {
395         struct wm8350 *wm8350 = irq_data;
396
397         complete(&wm8350->auxadc_done);
398
399         return IRQ_HANDLED;
400 }
401
402 /*
403  * Cache is always host endian.
404  */
405 static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode)
406 {
407         int i, ret = 0;
408         u16 value;
409         const u16 *reg_map;
410
411         switch (type) {
412         case 0:
413                 switch (mode) {
414 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0
415                 case 0:
416                         reg_map = wm8350_mode0_defaults;
417                         break;
418 #endif
419 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1
420                 case 1:
421                         reg_map = wm8350_mode1_defaults;
422                         break;
423 #endif
424 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2
425                 case 2:
426                         reg_map = wm8350_mode2_defaults;
427                         break;
428 #endif
429 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3
430                 case 3:
431                         reg_map = wm8350_mode3_defaults;
432                         break;
433 #endif
434                 default:
435                         dev_err(wm8350->dev,
436                                 "WM8350 configuration mode %d not supported\n",
437                                 mode);
438                         return -EINVAL;
439                 }
440                 break;
441
442         case 1:
443                 switch (mode) {
444 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_0
445                 case 0:
446                         reg_map = wm8351_mode0_defaults;
447                         break;
448 #endif
449 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_1
450                 case 1:
451                         reg_map = wm8351_mode1_defaults;
452                         break;
453 #endif
454 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_2
455                 case 2:
456                         reg_map = wm8351_mode2_defaults;
457                         break;
458 #endif
459 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_3
460                 case 3:
461                         reg_map = wm8351_mode3_defaults;
462                         break;
463 #endif
464                 default:
465                         dev_err(wm8350->dev,
466                                 "WM8351 configuration mode %d not supported\n",
467                                 mode);
468                         return -EINVAL;
469                 }
470                 break;
471
472         case 2:
473                 switch (mode) {
474 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_0
475                 case 0:
476                         reg_map = wm8352_mode0_defaults;
477                         break;
478 #endif
479 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_1
480                 case 1:
481                         reg_map = wm8352_mode1_defaults;
482                         break;
483 #endif
484 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_2
485                 case 2:
486                         reg_map = wm8352_mode2_defaults;
487                         break;
488 #endif
489 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_3
490                 case 3:
491                         reg_map = wm8352_mode3_defaults;
492                         break;
493 #endif
494                 default:
495                         dev_err(wm8350->dev,
496                                 "WM8352 configuration mode %d not supported\n",
497                                 mode);
498                         return -EINVAL;
499                 }
500                 break;
501
502         default:
503                 dev_err(wm8350->dev,
504                         "WM835x configuration mode %d not supported\n",
505                         mode);
506                 return -EINVAL;
507         }
508
509         wm8350->reg_cache =
510                 kmalloc(sizeof(u16) * (WM8350_MAX_REGISTER + 1), GFP_KERNEL);
511         if (wm8350->reg_cache == NULL)
512                 return -ENOMEM;
513
514         /* Read the initial cache state back from the device - this is
515          * a PMIC so the device many not be in a virgin state and we
516          * can't rely on the silicon values.
517          */
518         ret = wm8350->read_dev(wm8350, 0,
519                                sizeof(u16) * (WM8350_MAX_REGISTER + 1),
520                                wm8350->reg_cache);
521         if (ret < 0) {
522                 dev_err(wm8350->dev,
523                         "failed to read initial cache values\n");
524                 goto out;
525         }
526
527         /* Mask out uncacheable/unreadable bits and the audio. */
528         for (i = 0; i < WM8350_MAX_REGISTER; i++) {
529                 if (wm8350_reg_io_map[i].readable &&
530                     (i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) {
531                         value = be16_to_cpu(wm8350->reg_cache[i]);
532                         value &= wm8350_reg_io_map[i].readable;
533                         wm8350->reg_cache[i] = value;
534                 } else
535                         wm8350->reg_cache[i] = reg_map[i];
536         }
537
538 out:
539         kfree(wm8350->reg_cache);
540         return ret;
541 }
542
543 /*
544  * Register a client device.  This is non-fatal since there is no need to
545  * fail the entire device init due to a single platform device failing.
546  */
547 static void wm8350_client_dev_register(struct wm8350 *wm8350,
548                                        const char *name,
549                                        struct platform_device **pdev)
550 {
551         int ret;
552
553         *pdev = platform_device_alloc(name, -1);
554         if (*pdev == NULL) {
555                 dev_err(wm8350->dev, "Failed to allocate %s\n", name);
556                 return;
557         }
558
559         (*pdev)->dev.parent = wm8350->dev;
560         platform_set_drvdata(*pdev, wm8350);
561         ret = platform_device_add(*pdev);
562         if (ret != 0) {
563                 dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
564                 platform_device_put(*pdev);
565                 *pdev = NULL;
566         }
567 }
568
569 int wm8350_device_init(struct wm8350 *wm8350, int irq,
570                        struct wm8350_platform_data *pdata)
571 {
572         int ret;
573         u16 id1, id2, mask_rev;
574         u16 cust_id, mode, chip_rev;
575
576         /* get WM8350 revision and config mode */
577         ret = wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1);
578         if (ret != 0) {
579                 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
580                 goto err;
581         }
582
583         ret = wm8350->read_dev(wm8350, WM8350_ID, sizeof(id2), &id2);
584         if (ret != 0) {
585                 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
586                 goto err;
587         }
588
589         ret = wm8350->read_dev(wm8350, WM8350_REVISION, sizeof(mask_rev),
590                                &mask_rev);
591         if (ret != 0) {
592                 dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
593                 goto err;
594         }
595
596         id1 = be16_to_cpu(id1);
597         id2 = be16_to_cpu(id2);
598         mask_rev = be16_to_cpu(mask_rev);
599
600         if (id1 != 0x6143) {
601                 dev_err(wm8350->dev,
602                         "Device with ID %x is not a WM8350\n", id1);
603                 ret = -ENODEV;
604                 goto err;
605         }
606
607         mode = id2 & WM8350_CONF_STS_MASK >> 10;
608         cust_id = id2 & WM8350_CUST_ID_MASK;
609         chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
610         dev_info(wm8350->dev,
611                  "CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
612                  mode, cust_id, mask_rev, chip_rev);
613
614         if (cust_id != 0) {
615                 dev_err(wm8350->dev, "Unsupported CUST_ID\n");
616                 ret = -ENODEV;
617                 goto err;
618         }
619
620         switch (mask_rev) {
621         case 0:
622                 wm8350->pmic.max_dcdc = WM8350_DCDC_6;
623                 wm8350->pmic.max_isink = WM8350_ISINK_B;
624
625                 switch (chip_rev) {
626                 case WM8350_REV_E:
627                         dev_info(wm8350->dev, "WM8350 Rev E\n");
628                         break;
629                 case WM8350_REV_F:
630                         dev_info(wm8350->dev, "WM8350 Rev F\n");
631                         break;
632                 case WM8350_REV_G:
633                         dev_info(wm8350->dev, "WM8350 Rev G\n");
634                         wm8350->power.rev_g_coeff = 1;
635                         break;
636                 case WM8350_REV_H:
637                         dev_info(wm8350->dev, "WM8350 Rev H\n");
638                         wm8350->power.rev_g_coeff = 1;
639                         break;
640                 default:
641                         /* For safety we refuse to run on unknown hardware */
642                         dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
643                         ret = -ENODEV;
644                         goto err;
645                 }
646                 break;
647
648         case 1:
649                 wm8350->pmic.max_dcdc = WM8350_DCDC_4;
650                 wm8350->pmic.max_isink = WM8350_ISINK_A;
651
652                 switch (chip_rev) {
653                 case 0:
654                         dev_info(wm8350->dev, "WM8351 Rev A\n");
655                         wm8350->power.rev_g_coeff = 1;
656                         break;
657
658                 case 1:
659                         dev_info(wm8350->dev, "WM8351 Rev B\n");
660                         wm8350->power.rev_g_coeff = 1;
661                         break;
662
663                 default:
664                         dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
665                         ret = -ENODEV;
666                         goto err;
667                 }
668                 break;
669
670         case 2:
671                 wm8350->pmic.max_dcdc = WM8350_DCDC_6;
672                 wm8350->pmic.max_isink = WM8350_ISINK_B;
673
674                 switch (chip_rev) {
675                 case 0:
676                         dev_info(wm8350->dev, "WM8352 Rev A\n");
677                         wm8350->power.rev_g_coeff = 1;
678                         break;
679
680                 default:
681                         dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
682                         ret = -ENODEV;
683                         goto err;
684                 }
685                 break;
686
687         default:
688                 dev_err(wm8350->dev, "Unknown MASK_REV\n");
689                 ret = -ENODEV;
690                 goto err;
691         }
692
693         ret = wm8350_create_cache(wm8350, mask_rev, mode);
694         if (ret < 0) {
695                 dev_err(wm8350->dev, "Failed to create register cache\n");
696                 return ret;
697         }
698
699         mutex_init(&wm8350->auxadc_mutex);
700         init_completion(&wm8350->auxadc_done);
701
702         ret = wm8350_irq_init(wm8350, irq, pdata);
703         if (ret < 0)
704                 goto err_free;
705
706         if (wm8350->irq_base) {
707                 ret = request_threaded_irq(wm8350->irq_base +
708                                            WM8350_IRQ_AUXADC_DATARDY,
709                                            NULL, wm8350_auxadc_irq, 0,
710                                            "auxadc", wm8350);
711                 if (ret < 0)
712                         dev_warn(wm8350->dev,
713                                  "Failed to request AUXADC IRQ: %d\n", ret);
714         }
715
716         if (pdata && pdata->init) {
717                 ret = pdata->init(wm8350);
718                 if (ret != 0) {
719                         dev_err(wm8350->dev, "Platform init() failed: %d\n",
720                                 ret);
721                         goto err_irq;
722                 }
723         }
724
725         wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);
726
727         wm8350_client_dev_register(wm8350, "wm8350-codec",
728                                    &(wm8350->codec.pdev));
729         wm8350_client_dev_register(wm8350, "wm8350-gpio",
730                                    &(wm8350->gpio.pdev));
731         wm8350_client_dev_register(wm8350, "wm8350-hwmon",
732                                    &(wm8350->hwmon.pdev));
733         wm8350_client_dev_register(wm8350, "wm8350-power",
734                                    &(wm8350->power.pdev));
735         wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
736         wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));
737
738         return 0;
739
740 err_irq:
741         wm8350_irq_exit(wm8350);
742 err_free:
743         kfree(wm8350->reg_cache);
744 err:
745         return ret;
746 }
747 EXPORT_SYMBOL_GPL(wm8350_device_init);
748
749 void wm8350_device_exit(struct wm8350 *wm8350)
750 {
751         int i;
752
753         for (i = 0; i < ARRAY_SIZE(wm8350->pmic.led); i++)
754                 platform_device_unregister(wm8350->pmic.led[i].pdev);
755
756         for (i = 0; i < ARRAY_SIZE(wm8350->pmic.pdev); i++)
757                 platform_device_unregister(wm8350->pmic.pdev[i]);
758
759         platform_device_unregister(wm8350->wdt.pdev);
760         platform_device_unregister(wm8350->rtc.pdev);
761         platform_device_unregister(wm8350->power.pdev);
762         platform_device_unregister(wm8350->hwmon.pdev);
763         platform_device_unregister(wm8350->gpio.pdev);
764         platform_device_unregister(wm8350->codec.pdev);
765
766         if (wm8350->irq_base)
767                 free_irq(wm8350->irq_base + WM8350_IRQ_AUXADC_DATARDY, wm8350);
768
769         wm8350_irq_exit(wm8350);
770
771         kfree(wm8350->reg_cache);
772 }
773 EXPORT_SYMBOL_GPL(wm8350_device_exit);
774
775 MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver");
776 MODULE_LICENSE("GPL");