mfd: Use completion interrupt for WM835x AUXADC
[linux-2.6.git] / drivers / mfd / wm8350-core.c
1 /*
2  * wm8350-core.c  --  Device access for Wolfson WM8350
3  *
4  * Copyright 2007, 2008 Wolfson Microelectronics PLC.
5  *
6  * Author: Liam Girdwood, Mark Brown
7  *
8  *  This program is free software; you can redistribute  it and/or modify it
9  *  under  the terms of  the GNU General  Public License as published by the
10  *  Free Software Foundation;  either version 2 of the  License, or (at your
11  *  option) any later version.
12  *
13  */
14
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/bug.h>
19 #include <linux/device.h>
20 #include <linux/delay.h>
21 #include <linux/interrupt.h>
22 #include <linux/workqueue.h>
23
24 #include <linux/mfd/wm8350/core.h>
25 #include <linux/mfd/wm8350/audio.h>
26 #include <linux/mfd/wm8350/comparator.h>
27 #include <linux/mfd/wm8350/gpio.h>
28 #include <linux/mfd/wm8350/pmic.h>
29 #include <linux/mfd/wm8350/rtc.h>
30 #include <linux/mfd/wm8350/supply.h>
31 #include <linux/mfd/wm8350/wdt.h>
32
33 #define WM8350_UNLOCK_KEY               0x0013
34 #define WM8350_LOCK_KEY                 0x0000
35
36 #define WM8350_CLOCK_CONTROL_1          0x28
37 #define WM8350_AIF_TEST                 0x74
38
39 /* debug */
40 #define WM8350_BUS_DEBUG 0
41 #if WM8350_BUS_DEBUG
42 #define dump(regs, src) do { \
43         int i_; \
44         u16 *src_ = src; \
45         printk(KERN_DEBUG); \
46         for (i_ = 0; i_ < regs; i_++) \
47                 printk(" 0x%4.4x", *src_++); \
48         printk("\n"); \
49 } while (0);
50 #else
51 #define dump(bytes, src)
52 #endif
53
54 #define WM8350_LOCK_DEBUG 0
55 #if WM8350_LOCK_DEBUG
56 #define ldbg(format, arg...) printk(format, ## arg)
57 #else
58 #define ldbg(format, arg...)
59 #endif
60
61 /*
62  * WM8350 Device IO
63  */
64 static DEFINE_MUTEX(io_mutex);
65 static DEFINE_MUTEX(reg_lock_mutex);
66
67 /* Perform a physical read from the device.
68  */
69 static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs,
70                             u16 *dest)
71 {
72         int i, ret;
73         int bytes = num_regs * 2;
74
75         dev_dbg(wm8350->dev, "volatile read\n");
76         ret = wm8350->read_dev(wm8350, reg, bytes, (char *)dest);
77
78         for (i = reg; i < reg + num_regs; i++) {
79                 /* Cache is CPU endian */
80                 dest[i - reg] = be16_to_cpu(dest[i - reg]);
81
82                 /* Mask out non-readable bits */
83                 dest[i - reg] &= wm8350_reg_io_map[i].readable;
84         }
85
86         dump(num_regs, dest);
87
88         return ret;
89 }
90
91 static int wm8350_read(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *dest)
92 {
93         int i;
94         int end = reg + num_regs;
95         int ret = 0;
96         int bytes = num_regs * 2;
97
98         if (wm8350->read_dev == NULL)
99                 return -ENODEV;
100
101         if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
102                 dev_err(wm8350->dev, "invalid reg %x\n",
103                         reg + num_regs - 1);
104                 return -EINVAL;
105         }
106
107         dev_dbg(wm8350->dev,
108                 "%s R%d(0x%2.2x) %d regs\n", __func__, reg, reg, num_regs);
109
110 #if WM8350_BUS_DEBUG
111         /* we can _safely_ read any register, but warn if read not supported */
112         for (i = reg; i < end; i++) {
113                 if (!wm8350_reg_io_map[i].readable)
114                         dev_warn(wm8350->dev,
115                                 "reg R%d is not readable\n", i);
116         }
117 #endif
118
119         /* if any volatile registers are required, then read back all */
120         for (i = reg; i < end; i++)
121                 if (wm8350_reg_io_map[i].vol)
122                         return wm8350_phys_read(wm8350, reg, num_regs, dest);
123
124         /* no volatiles, then cache is good */
125         dev_dbg(wm8350->dev, "cache read\n");
126         memcpy(dest, &wm8350->reg_cache[reg], bytes);
127         dump(num_regs, dest);
128         return ret;
129 }
130
131 static inline int is_reg_locked(struct wm8350 *wm8350, u8 reg)
132 {
133         if (reg == WM8350_SECURITY ||
134             wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY)
135                 return 0;
136
137         if ((reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
138              reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
139             (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
140              reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
141                 return 1;
142         return 0;
143 }
144
145 static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)
146 {
147         int i;
148         int end = reg + num_regs;
149         int bytes = num_regs * 2;
150
151         if (wm8350->write_dev == NULL)
152                 return -ENODEV;
153
154         if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
155                 dev_err(wm8350->dev, "invalid reg %x\n",
156                         reg + num_regs - 1);
157                 return -EINVAL;
158         }
159
160         /* it's generally not a good idea to write to RO or locked registers */
161         for (i = reg; i < end; i++) {
162                 if (!wm8350_reg_io_map[i].writable) {
163                         dev_err(wm8350->dev,
164                                 "attempted write to read only reg R%d\n", i);
165                         return -EINVAL;
166                 }
167
168                 if (is_reg_locked(wm8350, i)) {
169                         dev_err(wm8350->dev,
170                                "attempted write to locked reg R%d\n", i);
171                         return -EINVAL;
172                 }
173
174                 src[i - reg] &= wm8350_reg_io_map[i].writable;
175
176                 wm8350->reg_cache[i] =
177                         (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
178                         | src[i - reg];
179
180                 src[i - reg] = cpu_to_be16(src[i - reg]);
181         }
182
183         /* Actually write it out */
184         return wm8350->write_dev(wm8350, reg, bytes, (char *)src);
185 }
186
187 /*
188  * Safe read, modify, write methods
189  */
190 int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
191 {
192         u16 data;
193         int err;
194
195         mutex_lock(&io_mutex);
196         err = wm8350_read(wm8350, reg, 1, &data);
197         if (err) {
198                 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
199                 goto out;
200         }
201
202         data &= ~mask;
203         err = wm8350_write(wm8350, reg, 1, &data);
204         if (err)
205                 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
206 out:
207         mutex_unlock(&io_mutex);
208         return err;
209 }
210 EXPORT_SYMBOL_GPL(wm8350_clear_bits);
211
212 int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
213 {
214         u16 data;
215         int err;
216
217         mutex_lock(&io_mutex);
218         err = wm8350_read(wm8350, reg, 1, &data);
219         if (err) {
220                 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
221                 goto out;
222         }
223
224         data |= mask;
225         err = wm8350_write(wm8350, reg, 1, &data);
226         if (err)
227                 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
228 out:
229         mutex_unlock(&io_mutex);
230         return err;
231 }
232 EXPORT_SYMBOL_GPL(wm8350_set_bits);
233
234 u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
235 {
236         u16 data;
237         int err;
238
239         mutex_lock(&io_mutex);
240         err = wm8350_read(wm8350, reg, 1, &data);
241         if (err)
242                 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
243
244         mutex_unlock(&io_mutex);
245         return data;
246 }
247 EXPORT_SYMBOL_GPL(wm8350_reg_read);
248
249 int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
250 {
251         int ret;
252         u16 data = val;
253
254         mutex_lock(&io_mutex);
255         ret = wm8350_write(wm8350, reg, 1, &data);
256         if (ret)
257                 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
258         mutex_unlock(&io_mutex);
259         return ret;
260 }
261 EXPORT_SYMBOL_GPL(wm8350_reg_write);
262
263 int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
264                       u16 *dest)
265 {
266         int err = 0;
267
268         mutex_lock(&io_mutex);
269         err = wm8350_read(wm8350, start_reg, regs, dest);
270         if (err)
271                 dev_err(wm8350->dev, "block read starting from R%d failed\n",
272                         start_reg);
273         mutex_unlock(&io_mutex);
274         return err;
275 }
276 EXPORT_SYMBOL_GPL(wm8350_block_read);
277
278 int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
279                        u16 *src)
280 {
281         int ret = 0;
282
283         mutex_lock(&io_mutex);
284         ret = wm8350_write(wm8350, start_reg, regs, src);
285         if (ret)
286                 dev_err(wm8350->dev, "block write starting at R%d failed\n",
287                         start_reg);
288         mutex_unlock(&io_mutex);
289         return ret;
290 }
291 EXPORT_SYMBOL_GPL(wm8350_block_write);
292
293 /**
294  * wm8350_reg_lock()
295  *
296  * The WM8350 has a hardware lock which can be used to prevent writes to
297  * some registers (generally those which can cause particularly serious
298  * problems if misused).  This function enables that lock.
299  */
300 int wm8350_reg_lock(struct wm8350 *wm8350)
301 {
302         u16 key = WM8350_LOCK_KEY;
303         int ret;
304
305         ldbg(__func__);
306         mutex_lock(&io_mutex);
307         ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
308         if (ret)
309                 dev_err(wm8350->dev, "lock failed\n");
310         mutex_unlock(&io_mutex);
311         return ret;
312 }
313 EXPORT_SYMBOL_GPL(wm8350_reg_lock);
314
315 /**
316  * wm8350_reg_unlock()
317  *
318  * The WM8350 has a hardware lock which can be used to prevent writes to
319  * some registers (generally those which can cause particularly serious
320  * problems if misused).  This function disables that lock so updates
321  * can be performed.  For maximum safety this should be done only when
322  * required.
323  */
324 int wm8350_reg_unlock(struct wm8350 *wm8350)
325 {
326         u16 key = WM8350_UNLOCK_KEY;
327         int ret;
328
329         ldbg(__func__);
330         mutex_lock(&io_mutex);
331         ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
332         if (ret)
333                 dev_err(wm8350->dev, "unlock failed\n");
334         mutex_unlock(&io_mutex);
335         return ret;
336 }
337 EXPORT_SYMBOL_GPL(wm8350_reg_unlock);
338
339 int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
340 {
341         u16 reg, result = 0;
342
343         if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP)
344                 return -EINVAL;
345         if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
346             && (scale != 0 || vref != 0))
347                 return -EINVAL;
348
349         mutex_lock(&wm8350->auxadc_mutex);
350
351         /* Turn on the ADC */
352         reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
353         wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA);
354
355         if (scale || vref) {
356                 reg = scale << 13;
357                 reg |= vref << 12;
358                 wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
359         }
360
361         reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
362         reg |= 1 << channel | WM8350_AUXADC_POLL;
363         wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);
364
365         /* We ignore the result of the completion and just check for a
366          * conversion result, allowing us to soldier on if the IRQ
367          * infrastructure is not set up for the chip. */
368         wait_for_completion_timeout(&wm8350->auxadc_done, msecs_to_jiffies(5));
369
370         reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
371         if (reg & WM8350_AUXADC_POLL)
372                 dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
373         else
374                 result = wm8350_reg_read(wm8350,
375                                          WM8350_AUX1_READBACK + channel);
376
377         /* Turn off the ADC */
378         reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
379         wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
380                          reg & ~WM8350_AUXADC_ENA);
381
382         mutex_unlock(&wm8350->auxadc_mutex);
383
384         return result & WM8350_AUXADC_DATA1_MASK;
385 }
386 EXPORT_SYMBOL_GPL(wm8350_read_auxadc);
387
388 static irqreturn_t wm8350_auxadc_irq(int irq, void *irq_data)
389 {
390         struct wm8350 *wm8350 = irq_data;
391
392         complete(&wm8350->auxadc_done);
393
394         return IRQ_HANDLED;
395 }
396
397 /*
398  * Cache is always host endian.
399  */
400 static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode)
401 {
402         int i, ret = 0;
403         u16 value;
404         const u16 *reg_map;
405
406         switch (type) {
407         case 0:
408                 switch (mode) {
409 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0
410                 case 0:
411                         reg_map = wm8350_mode0_defaults;
412                         break;
413 #endif
414 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1
415                 case 1:
416                         reg_map = wm8350_mode1_defaults;
417                         break;
418 #endif
419 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2
420                 case 2:
421                         reg_map = wm8350_mode2_defaults;
422                         break;
423 #endif
424 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3
425                 case 3:
426                         reg_map = wm8350_mode3_defaults;
427                         break;
428 #endif
429                 default:
430                         dev_err(wm8350->dev,
431                                 "WM8350 configuration mode %d not supported\n",
432                                 mode);
433                         return -EINVAL;
434                 }
435                 break;
436
437         case 1:
438                 switch (mode) {
439 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_0
440                 case 0:
441                         reg_map = wm8351_mode0_defaults;
442                         break;
443 #endif
444 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_1
445                 case 1:
446                         reg_map = wm8351_mode1_defaults;
447                         break;
448 #endif
449 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_2
450                 case 2:
451                         reg_map = wm8351_mode2_defaults;
452                         break;
453 #endif
454 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_3
455                 case 3:
456                         reg_map = wm8351_mode3_defaults;
457                         break;
458 #endif
459                 default:
460                         dev_err(wm8350->dev,
461                                 "WM8351 configuration mode %d not supported\n",
462                                 mode);
463                         return -EINVAL;
464                 }
465                 break;
466
467         case 2:
468                 switch (mode) {
469 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_0
470                 case 0:
471                         reg_map = wm8352_mode0_defaults;
472                         break;
473 #endif
474 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_1
475                 case 1:
476                         reg_map = wm8352_mode1_defaults;
477                         break;
478 #endif
479 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_2
480                 case 2:
481                         reg_map = wm8352_mode2_defaults;
482                         break;
483 #endif
484 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_3
485                 case 3:
486                         reg_map = wm8352_mode3_defaults;
487                         break;
488 #endif
489                 default:
490                         dev_err(wm8350->dev,
491                                 "WM8352 configuration mode %d not supported\n",
492                                 mode);
493                         return -EINVAL;
494                 }
495                 break;
496
497         default:
498                 dev_err(wm8350->dev,
499                         "WM835x configuration mode %d not supported\n",
500                         mode);
501                 return -EINVAL;
502         }
503
504         wm8350->reg_cache =
505                 kmalloc(sizeof(u16) * (WM8350_MAX_REGISTER + 1), GFP_KERNEL);
506         if (wm8350->reg_cache == NULL)
507                 return -ENOMEM;
508
509         /* Read the initial cache state back from the device - this is
510          * a PMIC so the device many not be in a virgin state and we
511          * can't rely on the silicon values.
512          */
513         ret = wm8350->read_dev(wm8350, 0,
514                                sizeof(u16) * (WM8350_MAX_REGISTER + 1),
515                                wm8350->reg_cache);
516         if (ret < 0) {
517                 dev_err(wm8350->dev,
518                         "failed to read initial cache values\n");
519                 goto out;
520         }
521
522         /* Mask out uncacheable/unreadable bits and the audio. */
523         for (i = 0; i < WM8350_MAX_REGISTER; i++) {
524                 if (wm8350_reg_io_map[i].readable &&
525                     (i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) {
526                         value = be16_to_cpu(wm8350->reg_cache[i]);
527                         value &= wm8350_reg_io_map[i].readable;
528                         wm8350->reg_cache[i] = value;
529                 } else
530                         wm8350->reg_cache[i] = reg_map[i];
531         }
532
533 out:
534         return ret;
535 }
536
537 /*
538  * Register a client device.  This is non-fatal since there is no need to
539  * fail the entire device init due to a single platform device failing.
540  */
541 static void wm8350_client_dev_register(struct wm8350 *wm8350,
542                                        const char *name,
543                                        struct platform_device **pdev)
544 {
545         int ret;
546
547         *pdev = platform_device_alloc(name, -1);
548         if (*pdev == NULL) {
549                 dev_err(wm8350->dev, "Failed to allocate %s\n", name);
550                 return;
551         }
552
553         (*pdev)->dev.parent = wm8350->dev;
554         platform_set_drvdata(*pdev, wm8350);
555         ret = platform_device_add(*pdev);
556         if (ret != 0) {
557                 dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
558                 platform_device_put(*pdev);
559                 *pdev = NULL;
560         }
561 }
562
563 int wm8350_device_init(struct wm8350 *wm8350, int irq,
564                        struct wm8350_platform_data *pdata)
565 {
566         int ret;
567         u16 id1, id2, mask_rev;
568         u16 cust_id, mode, chip_rev;
569
570         /* get WM8350 revision and config mode */
571         ret = wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1);
572         if (ret != 0) {
573                 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
574                 goto err;
575         }
576
577         ret = wm8350->read_dev(wm8350, WM8350_ID, sizeof(id2), &id2);
578         if (ret != 0) {
579                 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
580                 goto err;
581         }
582
583         ret = wm8350->read_dev(wm8350, WM8350_REVISION, sizeof(mask_rev),
584                                &mask_rev);
585         if (ret != 0) {
586                 dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
587                 goto err;
588         }
589
590         id1 = be16_to_cpu(id1);
591         id2 = be16_to_cpu(id2);
592         mask_rev = be16_to_cpu(mask_rev);
593
594         if (id1 != 0x6143) {
595                 dev_err(wm8350->dev,
596                         "Device with ID %x is not a WM8350\n", id1);
597                 ret = -ENODEV;
598                 goto err;
599         }
600
601         mode = id2 & WM8350_CONF_STS_MASK >> 10;
602         cust_id = id2 & WM8350_CUST_ID_MASK;
603         chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
604         dev_info(wm8350->dev,
605                  "CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
606                  mode, cust_id, mask_rev, chip_rev);
607
608         if (cust_id != 0) {
609                 dev_err(wm8350->dev, "Unsupported CUST_ID\n");
610                 ret = -ENODEV;
611                 goto err;
612         }
613
614         switch (mask_rev) {
615         case 0:
616                 wm8350->pmic.max_dcdc = WM8350_DCDC_6;
617                 wm8350->pmic.max_isink = WM8350_ISINK_B;
618
619                 switch (chip_rev) {
620                 case WM8350_REV_E:
621                         dev_info(wm8350->dev, "WM8350 Rev E\n");
622                         break;
623                 case WM8350_REV_F:
624                         dev_info(wm8350->dev, "WM8350 Rev F\n");
625                         break;
626                 case WM8350_REV_G:
627                         dev_info(wm8350->dev, "WM8350 Rev G\n");
628                         wm8350->power.rev_g_coeff = 1;
629                         break;
630                 case WM8350_REV_H:
631                         dev_info(wm8350->dev, "WM8350 Rev H\n");
632                         wm8350->power.rev_g_coeff = 1;
633                         break;
634                 default:
635                         /* For safety we refuse to run on unknown hardware */
636                         dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
637                         ret = -ENODEV;
638                         goto err;
639                 }
640                 break;
641
642         case 1:
643                 wm8350->pmic.max_dcdc = WM8350_DCDC_4;
644                 wm8350->pmic.max_isink = WM8350_ISINK_A;
645
646                 switch (chip_rev) {
647                 case 0:
648                         dev_info(wm8350->dev, "WM8351 Rev A\n");
649                         wm8350->power.rev_g_coeff = 1;
650                         break;
651
652                 case 1:
653                         dev_info(wm8350->dev, "WM8351 Rev B\n");
654                         wm8350->power.rev_g_coeff = 1;
655                         break;
656
657                 default:
658                         dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
659                         ret = -ENODEV;
660                         goto err;
661                 }
662                 break;
663
664         case 2:
665                 wm8350->pmic.max_dcdc = WM8350_DCDC_6;
666                 wm8350->pmic.max_isink = WM8350_ISINK_B;
667
668                 switch (chip_rev) {
669                 case 0:
670                         dev_info(wm8350->dev, "WM8352 Rev A\n");
671                         wm8350->power.rev_g_coeff = 1;
672                         break;
673
674                 default:
675                         dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
676                         ret = -ENODEV;
677                         goto err;
678                 }
679                 break;
680
681         default:
682                 dev_err(wm8350->dev, "Unknown MASK_REV\n");
683                 ret = -ENODEV;
684                 goto err;
685         }
686
687         ret = wm8350_create_cache(wm8350, mask_rev, mode);
688         if (ret < 0) {
689                 dev_err(wm8350->dev, "Failed to create register cache\n");
690                 return ret;
691         }
692
693         mutex_init(&wm8350->auxadc_mutex);
694         init_completion(&wm8350->auxadc_done);
695
696         ret = wm8350_irq_init(wm8350, irq, pdata);
697         if (ret < 0)
698                 goto err;
699
700         if (wm8350->irq_base) {
701                 ret = request_threaded_irq(wm8350->irq_base +
702                                            WM8350_IRQ_AUXADC_DATARDY,
703                                            NULL, wm8350_auxadc_irq, 0,
704                                            "auxadc", wm8350);
705                 if (ret < 0)
706                         dev_warn(wm8350->dev,
707                                  "Failed to request AUXADC IRQ: %d\n", ret);
708         }
709
710         if (pdata && pdata->init) {
711                 ret = pdata->init(wm8350);
712                 if (ret != 0) {
713                         dev_err(wm8350->dev, "Platform init() failed: %d\n",
714                                 ret);
715                         goto err_irq;
716                 }
717         }
718
719         wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);
720
721         wm8350_client_dev_register(wm8350, "wm8350-codec",
722                                    &(wm8350->codec.pdev));
723         wm8350_client_dev_register(wm8350, "wm8350-gpio",
724                                    &(wm8350->gpio.pdev));
725         wm8350_client_dev_register(wm8350, "wm8350-hwmon",
726                                    &(wm8350->hwmon.pdev));
727         wm8350_client_dev_register(wm8350, "wm8350-power",
728                                    &(wm8350->power.pdev));
729         wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
730         wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));
731
732         return 0;
733
734 err_irq:
735         wm8350_irq_exit(wm8350);
736 err:
737         kfree(wm8350->reg_cache);
738         return ret;
739 }
740 EXPORT_SYMBOL_GPL(wm8350_device_init);
741
742 void wm8350_device_exit(struct wm8350 *wm8350)
743 {
744         int i;
745
746         for (i = 0; i < ARRAY_SIZE(wm8350->pmic.led); i++)
747                 platform_device_unregister(wm8350->pmic.led[i].pdev);
748
749         for (i = 0; i < ARRAY_SIZE(wm8350->pmic.pdev); i++)
750                 platform_device_unregister(wm8350->pmic.pdev[i]);
751
752         platform_device_unregister(wm8350->wdt.pdev);
753         platform_device_unregister(wm8350->rtc.pdev);
754         platform_device_unregister(wm8350->power.pdev);
755         platform_device_unregister(wm8350->hwmon.pdev);
756         platform_device_unregister(wm8350->gpio.pdev);
757         platform_device_unregister(wm8350->codec.pdev);
758
759         if (wm8350->irq_base)
760                 free_irq(wm8350->irq_base + WM8350_IRQ_AUXADC_DATARDY, wm8350);
761
762         wm8350_irq_exit(wm8350);
763
764         kfree(wm8350->reg_cache);
765 }
766 EXPORT_SYMBOL_GPL(wm8350_device_exit);
767
768 MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver");
769 MODULE_LICENSE("GPL");