arm: enterprise: Clean some of tps80031 definition
[linux-2.6.git] / drivers / mfd / tps80031.c
1 /*
2  * driver/mfd/tps80031.c
3  *
4  * Core driver for TI TPS80031
5  *
6  * Copyright (C) 2011 NVIDIA Corporation
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful, but WITHOUT
14  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
16  * more details.
17  *
18  * You should have received a copy of the GNU General Public License along
19  * with this program; if not, write to the Free Software Foundation, Inc.,
20  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
21  *
22  */
23
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/mutex.h>
29 #include <linux/slab.h>
30 #include <linux/gpio.h>
31 #include <linux/i2c.h>
32
33 #include <linux/mfd/core.h>
34 #include <linux/mfd/tps80031.h>
35
36 /* interrupt related registers */
37 #define TPS80031_INT_STS_A              0xD0
38 #define TPS80031_INT_STS_B              0xD1
39 #define TPS80031_INT_STS_C              0xD2
40 #define TPS80031_INT_MSK_LINE_A         0xD3
41 #define TPS80031_INT_MSK_LINE_B         0xD4
42 #define TPS80031_INT_MSK_LINE_C         0xD5
43 #define TPS80031_INT_MSK_STS_A          0xD6
44 #define TPS80031_INT_MSK_STS_B          0xD7
45 #define TPS80031_INT_MSK_STS_C          0xD8
46
47 #define TPS80031_CONTROLLER_STAT1               0xE3
48 #define CONTROLLER_STAT1_BAT_TEMP               0
49 #define CONTROLLER_STAT1_BAT_REMOVED            1
50 #define CONTROLLER_STAT1_VBUS_DET               2
51 #define CONTROLLER_STAT1_VAC_DET                3
52 #define CONTROLLER_STAT1_FAULT_WDG              4
53 #define CONTROLLER_STAT1_LINCH_GATED            6
54
55 #define TPS80031_CONTROLLER_INT_MASK            0xE0
56 #define CONTROLLER_INT_MASK_MVAC_DET            0
57 #define CONTROLLER_INT_MASK_MVBUS_DET           1
58 #define CONTROLLER_INT_MASK_MBAT_TEMP           2
59 #define CONTROLLER_INT_MASK_MFAULT_WDG          3
60 #define CONTROLLER_INT_MASK_MBAT_REMOVED        4
61 #define CONTROLLER_INT_MASK_MLINCH_GATED        5
62
63 #define CHARGE_CONTROL_SUB_INT_MASK             0x3F
64
65 /* Version number related register */
66 #define TPS80031_JTAGVERNUM             0x87
67
68 /* External control register */
69 #define REGEN1_BASE_ADD         0xAE
70 #define REGEN2_BASE_ADD         0xB1
71 #define SYSEN_BASE_ADD          0xB4
72
73 /* device control registers */
74 #define TPS80031_PHOENIX_DEV_ON 0x25
75 #define DEVOFF  1
76
77 #define CLK32KAO_BASE_ADD       0xBA
78 #define CLK32KG_BASE_ADD        0xBD
79 #define CLK32KAUDIO_BASE_ADD    0xC0
80
81 #define EXT_CONTROL_CFG_TRANS 0
82 #define EXT_CONTROL_CFG_STATE 1
83
84 #define STATE_OFF       0x00
85 #define STATE_ON        0x01
86 #define STATE_MASK      0x03
87
88 #define TPS_NUM_SLAVES  4
89
90 static u8 pmc_ext_control_base[] = {
91         REGEN1_BASE_ADD,
92         REGEN2_BASE_ADD,
93         SYSEN_BASE_ADD,
94 };
95
96 struct tps80031_irq_data {
97         u8      mask_reg;
98         u8      mask_mask;
99         u8      is_sec_int;
100         u8      parent_int;
101         u8      mask_sec_int_reg;
102         u8      int_mask_bit;
103         u8      int_sec_sts_reg;
104         u8      int_sts_bit;
105 };
106
107 #define TPS80031_IRQ(_reg, _mask)       \
108         {                                                       \
109                 .mask_reg = (TPS80031_INT_MSK_LINE_##_reg) -    \
110                                 TPS80031_INT_MSK_LINE_A,        \
111                 .mask_mask = (_mask),                           \
112         }
113
114 #define TPS80031_IRQ_SEC(_reg, _mask, _pint, _sint_mask_bit, _sint_sts_bit) \
115         {                                                               \
116                 .mask_reg = (TPS80031_INT_MSK_LINE_##_reg) -            \
117                                 TPS80031_INT_MSK_LINE_A,                \
118                 .mask_mask = (_mask),                                   \
119                 .is_sec_int = true,                                     \
120                 .parent_int = TPS80031_INT_##_pint,                     \
121                 .mask_sec_int_reg = TPS80031_CONTROLLER_INT_MASK,       \
122                 .int_mask_bit = CONTROLLER_INT_MASK_##_sint_mask_bit,   \
123                 .int_sec_sts_reg = TPS80031_CONTROLLER_STAT1,           \
124                 .int_sts_bit = CONTROLLER_STAT1_##_sint_sts_bit         \
125         }
126
127 static const struct tps80031_irq_data tps80031_irqs[] = {
128
129         [TPS80031_INT_PWRON]            = TPS80031_IRQ(A, 0),
130         [TPS80031_INT_RPWRON]           = TPS80031_IRQ(A, 1),
131         [TPS80031_INT_SYS_VLOW]         = TPS80031_IRQ(A, 2),
132         [TPS80031_INT_RTC_ALARM]        = TPS80031_IRQ(A, 3),
133         [TPS80031_INT_RTC_PERIOD]       = TPS80031_IRQ(A, 4),
134         [TPS80031_INT_HOT_DIE]          = TPS80031_IRQ(A, 5),
135         [TPS80031_INT_VXX_SHORT]        = TPS80031_IRQ(A, 6),
136         [TPS80031_INT_SPDURATION]       = TPS80031_IRQ(A, 7),
137         [TPS80031_INT_WATCHDOG]         = TPS80031_IRQ(B, 0),
138         [TPS80031_INT_BAT]              = TPS80031_IRQ(B, 1),
139         [TPS80031_INT_SIM]              = TPS80031_IRQ(B, 2),
140         [TPS80031_INT_MMC]              = TPS80031_IRQ(B, 3),
141         [TPS80031_INT_RES]              = TPS80031_IRQ(B, 4),
142         [TPS80031_INT_GPADC_RT]         = TPS80031_IRQ(B, 5),
143         [TPS80031_INT_GPADC_SW2_EOC]    = TPS80031_IRQ(B, 6),
144         [TPS80031_INT_CC_AUTOCAL]       = TPS80031_IRQ(B, 7),
145         [TPS80031_INT_ID_WKUP]          = TPS80031_IRQ(C, 0),
146         [TPS80031_INT_VBUSS_WKUP]       = TPS80031_IRQ(C, 1),
147         [TPS80031_INT_ID]               = TPS80031_IRQ(C, 2),
148         [TPS80031_INT_VBUS]             = TPS80031_IRQ(C, 3),
149         [TPS80031_INT_CHRG_CTRL]        = TPS80031_IRQ(C, 4),
150         [TPS80031_INT_EXT_CHRG]         = TPS80031_IRQ(C, 5),
151         [TPS80031_INT_INT_CHRG]         = TPS80031_IRQ(C, 6),
152         [TPS80031_INT_RES2]             = TPS80031_IRQ(C, 7),
153         [TPS80031_INT_BAT_TEMP_OVRANGE] = TPS80031_IRQ_SEC(C, 4, CHRG_CTRL,
154                                                 MBAT_TEMP,      BAT_TEMP),
155         [TPS80031_INT_BAT_REMOVED]      = TPS80031_IRQ_SEC(C, 4, CHRG_CTRL,
156                                                 MBAT_REMOVED,   BAT_REMOVED),
157         [TPS80031_INT_VBUS_DET]         = TPS80031_IRQ_SEC(C, 4, CHRG_CTRL,
158                                                 MVBUS_DET,      VBUS_DET),
159         [TPS80031_INT_VAC_DET]          = TPS80031_IRQ_SEC(C, 4, CHRG_CTRL,
160                                                 MVAC_DET,       VAC_DET),
161         [TPS80031_INT_FAULT_WDG]        = TPS80031_IRQ_SEC(C, 4, CHRG_CTRL,
162                                                 MFAULT_WDG,     FAULT_WDG),
163         [TPS80031_INT_LINCH_GATED]      = TPS80031_IRQ_SEC(C, 4, CHRG_CTRL,
164                                                 MLINCH_GATED,   LINCH_GATED),
165 };
166
167 static const int controller_stat1_irq_nr[] = {
168         TPS80031_INT_BAT_TEMP_OVRANGE,
169         TPS80031_INT_BAT_REMOVED,
170         TPS80031_INT_VBUS_DET,
171         TPS80031_INT_VAC_DET,
172         TPS80031_INT_FAULT_WDG,
173         0,
174         TPS80031_INT_LINCH_GATED,
175         0
176 };
177
178 /* Structure for TPS80031 Slaves */
179 struct tps80031_client {
180         struct i2c_client *client;
181         struct mutex lock;
182         u8 addr;
183 };
184
185 struct tps80031 {
186         struct device           *dev;
187         unsigned long           chip_info;
188
189         struct gpio_chip        gpio;
190         struct irq_chip         irq_chip;
191         struct mutex            irq_lock;
192         int                     irq_base;
193         u32                     irq_en;
194         u8                      mask_cache[3];
195         u8                      mask_reg[3];
196         u8                      cont_int_mask_reg;
197         u8                      cont_int_mask_cache;
198         u8                      cont_int_en;
199         u8                      prev_cont_stat1;
200         struct tps80031_client  tps_clients[TPS_NUM_SLAVES];
201 };
202
203 static inline int __tps80031_read(struct i2c_client *client,
204                                   int reg, uint8_t *val)
205 {
206         int ret;
207
208         ret = i2c_smbus_read_byte_data(client, reg);
209         if (ret < 0) {
210                 dev_err(&client->dev,
211                         "failed reading from addr 0x%02x, reg 0x%02x\n",
212                         client->addr, reg);
213                 return ret;
214         }
215
216         *val = (uint8_t)ret;
217
218         return 0;
219 }
220
221 static inline int __tps80031_reads(struct i2c_client *client, int reg,
222                                 int len, uint8_t *val)
223 {
224         int ret;
225
226         ret = i2c_smbus_read_i2c_block_data(client, reg, len, val);
227         if (ret < 0) {
228                 dev_err(&client->dev,
229                         "failed reading from addr 0x%02x, reg   0x%02x\n",
230                          client->addr, reg);
231                 return ret;
232         }
233
234         return 0;
235 }
236
237 static inline int __tps80031_write(struct i2c_client *client,
238                                  int reg, uint8_t val)
239 {
240         int ret;
241         ret = i2c_smbus_write_byte_data(client, reg, val);
242         if (ret < 0) {
243                 dev_err(&client->dev,
244                         "failed writing 0x%02x to 0x%02x\n", val, reg);
245                 return ret;
246         }
247
248         return 0;
249 }
250
251 static inline int __tps80031_writes(struct i2c_client *client, int reg,
252                                   int len, uint8_t *val)
253 {
254         int ret;
255
256         ret = i2c_smbus_write_i2c_block_data(client, reg, len, val);
257         if (ret < 0) {
258                 dev_err(&client->dev, "failed writings to 0x%02x\n", reg);
259                 return ret;
260         }
261
262         return 0;
263 }
264
265 int tps80031_write(struct device *dev, int sid, int reg, uint8_t val)
266 {
267         struct tps80031 *tps80031 = dev_get_drvdata(dev);
268         struct tps80031_client *tps = &tps80031->tps_clients[sid];
269         int ret;
270
271         mutex_lock(&tps->lock);
272         ret = __tps80031_write(tps->client, reg, val);
273         mutex_unlock(&tps->lock);
274
275         return ret;
276 }
277 EXPORT_SYMBOL_GPL(tps80031_write);
278
279 int tps80031_writes(struct device *dev, int sid, int reg, int len, uint8_t *val)
280 {
281         struct tps80031 *tps80031 = dev_get_drvdata(dev);
282         struct tps80031_client *tps = &tps80031->tps_clients[sid];
283         int ret;
284
285         mutex_lock(&tps->lock);
286         ret = __tps80031_writes(tps->client, reg, len, val);
287         mutex_unlock(&tps->lock);
288
289         return ret;
290 }
291 EXPORT_SYMBOL_GPL(tps80031_writes);
292
293 int tps80031_read(struct device *dev, int sid, int reg, uint8_t *val)
294 {
295         struct tps80031 *tps80031 = dev_get_drvdata(dev);
296         struct tps80031_client *tps = &tps80031->tps_clients[sid];
297
298         return __tps80031_read(tps->client, reg, val);
299 }
300 EXPORT_SYMBOL_GPL(tps80031_read);
301
302 int tps80031_reads(struct device *dev, int sid, int reg, int len, uint8_t *val)
303 {
304         struct tps80031 *tps80031 = dev_get_drvdata(dev);
305         struct tps80031_client *tps = &tps80031->tps_clients[sid];
306
307         return __tps80031_reads(tps->client, reg, len, val);
308 }
309 EXPORT_SYMBOL_GPL(tps80031_reads);
310
311 int tps80031_set_bits(struct device *dev, int sid, int reg, uint8_t bit_mask)
312 {
313         struct tps80031 *tps80031 = dev_get_drvdata(dev);
314         struct tps80031_client *tps = &tps80031->tps_clients[sid];
315         uint8_t reg_val;
316         int ret = 0;
317
318         mutex_lock(&tps->lock);
319
320         ret = __tps80031_read(tps->client, reg, &reg_val);
321         if (ret)
322                 goto out;
323
324         if ((reg_val & bit_mask) != bit_mask) {
325                 reg_val |= bit_mask;
326                 ret = __tps80031_write(tps->client, reg, reg_val);
327         }
328 out:
329         mutex_unlock(&tps->lock);
330         return ret;
331 }
332 EXPORT_SYMBOL_GPL(tps80031_set_bits);
333
334 int tps80031_clr_bits(struct device *dev, int sid, int reg, uint8_t bit_mask)
335 {
336         struct tps80031 *tps80031 = dev_get_drvdata(dev);
337         struct tps80031_client *tps = &tps80031->tps_clients[sid];
338         uint8_t reg_val;
339         int ret = 0;
340
341         mutex_lock(&tps->lock);
342
343         ret = __tps80031_read(tps->client, reg, &reg_val);
344         if (ret)
345                 goto out;
346
347         if (reg_val & bit_mask) {
348                 reg_val &= ~bit_mask;
349                 ret = __tps80031_write(tps->client, reg, reg_val);
350         }
351 out:
352         mutex_unlock(&tps->lock);
353         return ret;
354 }
355 EXPORT_SYMBOL_GPL(tps80031_clr_bits);
356
357 int tps80031_update(struct device *dev, int sid, int reg, uint8_t val,
358                 uint8_t mask)
359 {
360         struct tps80031 *tps80031 = dev_get_drvdata(dev);
361         struct tps80031_client *tps = &tps80031->tps_clients[sid];
362         uint8_t reg_val;
363         int ret = 0;
364
365         mutex_lock(&tps->lock);
366
367         ret = __tps80031_read(tps->client, reg, &reg_val);
368         if (ret)
369                 goto out;
370
371         if ((reg_val & mask) != val) {
372                 reg_val = (reg_val & ~mask) | (val & mask);
373                 ret = __tps80031_write(tps->client, reg, reg_val);
374         }
375 out:
376         mutex_unlock(&tps->lock);
377         return ret;
378 }
379 EXPORT_SYMBOL_GPL(tps80031_update);
380
381 int tps80031_force_update(struct device *dev, int sid, int reg, uint8_t val,
382                           uint8_t mask)
383 {
384         struct tps80031 *tps80031 = dev_get_drvdata(dev);
385         struct tps80031_client *tps = &tps80031->tps_clients[sid];
386         uint8_t reg_val;
387         int ret = 0;
388
389         mutex_lock(&tps->lock);
390
391         ret = __tps80031_read(tps->client, reg, &reg_val);
392         if (ret)
393                 goto out;
394
395         reg_val = (reg_val & ~mask) | (val & mask);
396         ret = __tps80031_write(tps->client, reg, reg_val);
397
398 out:
399         mutex_unlock(&tps->lock);
400         return ret;
401 }
402 EXPORT_SYMBOL_GPL(tps80031_force_update);
403
404 unsigned long tps80031_get_chip_info(struct device *dev)
405 {
406         struct tps80031 *tps80031 = dev_get_drvdata(dev);
407         return tps80031->chip_info;
408 }
409 EXPORT_SYMBOL_GPL(tps80031_get_chip_info);
410
411 static struct tps80031 *tps80031_dev;
412 int tps80031_power_off(void)
413 {
414         struct tps80031_client *tps = &tps80031_dev->tps_clients[SLAVE_ID1];
415
416         if (!tps->client)
417                 return -EINVAL;
418         dev_info(&tps->client->dev, "switching off PMU\n");
419         return __tps80031_write(tps->client, TPS80031_PHOENIX_DEV_ON, DEVOFF);
420 }
421
422 static int tps80031_gpio_get(struct gpio_chip *gc, unsigned offset)
423 {
424         struct tps80031 *tps80031 = container_of(gc, struct tps80031, gpio);
425         struct tps80031_client *tps = &tps80031->tps_clients[SLAVE_ID1];
426         uint8_t state;
427         uint8_t trans;
428         int ret;
429
430         ret = __tps80031_read(tps->client,
431                         pmc_ext_control_base[offset] +
432                                 EXT_CONTROL_CFG_STATE, &state);
433         if (ret)
434                 return ret;
435
436         if (state != 0) {
437                 ret = __tps80031_read(tps->client,
438                                 pmc_ext_control_base[offset] +
439                                         EXT_CONTROL_CFG_TRANS, &trans);
440                 if (ret)
441                         return ret;
442                 return trans & 0x1;
443         }
444         return 0;
445 }
446
447 static void tps80031_gpio_set(struct gpio_chip *gc, unsigned offset,
448                         int value)
449 {
450         struct tps80031 *tps80031 = container_of(gc, struct tps80031, gpio);
451
452         tps80031_update(tps80031->dev, SLAVE_ID1,
453                 pmc_ext_control_base[offset] + EXT_CONTROL_CFG_TRANS,
454                         value, 0x1);
455 }
456
457 static int tps80031_gpio_input(struct gpio_chip *gc, unsigned offset)
458 {
459         return -EIO;
460 }
461
462 static int tps80031_gpio_output(struct gpio_chip *gc, unsigned offset,
463                                 int value)
464 {
465         tps80031_gpio_set(gc, offset, value);
466         return 0;
467 }
468
469 static int tps80031_gpio_enable(struct gpio_chip *gc, unsigned offset)
470 {
471         struct tps80031 *tps80031 = container_of(gc, struct tps80031, gpio);
472         int ret;
473
474         ret = tps80031_update(tps80031->dev, SLAVE_ID1,
475                 pmc_ext_control_base[offset] + EXT_CONTROL_CFG_STATE,
476                                                 STATE_ON, STATE_MASK);
477         if (ret)
478                 return ret;
479
480         return tps80031_write(tps80031->dev, SLAVE_ID1,
481                 pmc_ext_control_base[offset] + EXT_CONTROL_CFG_TRANS, 0x0);
482 }
483
484 static void tps80031_gpio_disable(struct gpio_chip *gc, unsigned offset)
485 {
486         struct tps80031 *tps80031 = container_of(gc, struct tps80031, gpio);
487         tps80031_update(tps80031->dev, SLAVE_ID1,
488                 pmc_ext_control_base[offset] + EXT_CONTROL_CFG_STATE,
489                                                 STATE_OFF, STATE_MASK);
490 }
491
492 static void tps80031_gpio_init(struct tps80031 *tps80031,
493                         struct tps80031_platform_data *pdata)
494 {
495         int ret;
496         int gpio_base = pdata->gpio_base;
497         struct tps80031_client *tps = &tps80031->tps_clients[SLAVE_ID1];
498
499         if (gpio_base <= 0)
500                 return;
501
502         tps80031->gpio.owner            = THIS_MODULE;
503         tps80031->gpio.label            = tps->client->name;
504         tps80031->gpio.dev              = tps80031->dev;
505         tps80031->gpio.base             = gpio_base;
506         tps80031->gpio.ngpio            = TPS80031_GPIO_NR;
507         tps80031->gpio.can_sleep        = 1;
508
509         tps80031->gpio.request          = tps80031_gpio_enable;
510         tps80031->gpio.free             = tps80031_gpio_disable;
511         tps80031->gpio.direction_input  = tps80031_gpio_input;
512         tps80031->gpio.direction_output = tps80031_gpio_output;
513         tps80031->gpio.set              = tps80031_gpio_set;
514         tps80031->gpio.get              = tps80031_gpio_get;
515
516         ret = gpiochip_add(&tps80031->gpio);
517         if (ret)
518                 dev_warn(tps80031->dev, "GPIO registration failed: %d\n", ret);
519 }
520
521 static int __remove_subdev(struct device *dev, void *unused)
522 {
523         platform_device_unregister(to_platform_device(dev));
524         return 0;
525 }
526
527 static int tps80031_remove_subdevs(struct tps80031 *tps80031)
528 {
529         return device_for_each_child(tps80031->dev, NULL, __remove_subdev);
530 }
531
532 static void tps80031_irq_lock(struct irq_data *data)
533 {
534         struct tps80031 *tps80031 = irq_data_get_irq_chip_data(data);
535
536         mutex_lock(&tps80031->irq_lock);
537 }
538
539 static void tps80031_irq_enable(struct irq_data *data)
540 {
541         struct tps80031 *tps80031 = irq_data_get_irq_chip_data(data);
542         unsigned int __irq = data->irq - tps80031->irq_base;
543         const struct tps80031_irq_data *irq_data = &tps80031_irqs[__irq];
544
545         if (irq_data->is_sec_int) {
546                 tps80031->cont_int_mask_reg &= ~(1 << irq_data->int_mask_bit);
547                 tps80031->cont_int_en |= (1 << irq_data->int_mask_bit);
548                 tps80031->mask_reg[irq_data->mask_reg] &= ~(1 << irq_data->mask_mask);
549                 tps80031->irq_en |= (1 << irq_data->parent_int);
550         } else
551                 tps80031->mask_reg[irq_data->mask_reg] &= ~(1 << irq_data->mask_mask);
552
553         tps80031->irq_en |= (1 << __irq);
554 }
555
556 static void tps80031_irq_disable(struct irq_data *data)
557 {
558         struct tps80031 *tps80031 = irq_data_get_irq_chip_data(data);
559
560         unsigned int __irq = data->irq - tps80031->irq_base;
561         const struct tps80031_irq_data *irq_data = &tps80031_irqs[__irq];
562
563         if (irq_data->is_sec_int) {
564                 tps80031->cont_int_mask_reg |= (1 << irq_data->int_mask_bit);
565                 tps80031->cont_int_en &= ~(1 << irq_data->int_mask_bit);
566                 if (!tps80031->cont_int_en) {
567                         tps80031->mask_reg[irq_data->mask_reg] |=
568                                                 (1 << irq_data->mask_mask);
569                         tps80031->irq_en &= ~(1 << irq_data->parent_int);
570                 }
571                 tps80031->irq_en &= ~(1 << __irq);
572         } else
573                 tps80031->mask_reg[irq_data->mask_reg] |= (1 << irq_data->mask_mask);
574
575         tps80031->irq_en &= ~(1 << __irq);
576 }
577
578 static void tps80031_irq_sync_unlock(struct irq_data *data)
579 {
580         struct tps80031 *tps80031 = irq_data_get_irq_chip_data(data);
581         int i;
582
583         for (i = 0; i < ARRAY_SIZE(tps80031->mask_reg); i++) {
584                 if (tps80031->mask_reg[i] != tps80031->mask_cache[i]) {
585                         if (!WARN_ON(tps80031_write(tps80031->dev, SLAVE_ID2,
586                                                 TPS80031_INT_MSK_LINE_A + i,
587                                                 tps80031->mask_reg[i])))
588                                 if (!WARN_ON(tps80031_write(tps80031->dev,
589                                                 SLAVE_ID2,
590                                                 TPS80031_INT_MSK_STS_A + i,
591                                                 tps80031->mask_reg[i])))
592                                         tps80031->mask_cache[i] =
593                                                         tps80031->mask_reg[i];
594                 }
595         }
596
597         if (tps80031->cont_int_mask_reg != tps80031->cont_int_mask_cache) {
598                 if (!WARN_ON(tps80031_write(tps80031->dev, SLAVE_ID2,
599                                 TPS80031_CONTROLLER_INT_MASK,
600                                 tps80031->cont_int_mask_reg)))
601                         tps80031->cont_int_mask_cache =
602                                                 tps80031->cont_int_mask_reg;
603         }
604
605         mutex_unlock(&tps80031->irq_lock);
606 }
607
608 static irqreturn_t tps80031_charge_control_irq(int irq, void *data)
609 {
610         struct tps80031 *tps80031 = data;
611         int ret = 0;
612         int i;
613         u8 cont_sts;
614         u8 org_sts;
615
616         if (irq != (tps80031->irq_base + TPS80031_INT_CHRG_CTRL)) {
617                 dev_err(tps80031->dev, "%s() Got the illegal interrupt %d\n",
618                                         __func__, irq);
619                 return IRQ_NONE;
620         }
621
622         ret = tps80031_read(tps80031->dev, SLAVE_ID2,
623                         TPS80031_CONTROLLER_STAT1, &org_sts);
624         if (ret < 0) {
625                 dev_err(tps80031->dev, "%s(): failed to read controller state1 "
626                                 "status %d\n", __func__, ret);
627                 return IRQ_NONE;
628         }
629
630         /* Get change from last interrupt and mask for interested interrupt
631          * for charge control interrupt */
632         cont_sts = org_sts ^ tps80031->prev_cont_stat1;
633         tps80031->prev_cont_stat1 = org_sts;
634         cont_sts &= 0x5F;
635
636         for (i = 0; i < 8; ++i) {
637                 if (!controller_stat1_irq_nr[i])
638                         continue;
639                 if ((cont_sts & BIT(i)) &&
640                         (tps80031->irq_en & BIT(controller_stat1_irq_nr[i])))
641                         handle_nested_irq(tps80031->irq_base +
642                                                 controller_stat1_irq_nr[i]);
643                 cont_sts &= ~BIT(i);
644         }
645         return IRQ_HANDLED;
646 }
647
648 static irqreturn_t tps80031_irq(int irq, void *data)
649 {
650         struct tps80031 *tps80031 = data;
651         int ret = 0;
652         u8 tmp[3];
653         u32 acks;
654         int i;
655
656         for (i = 0; i < 3; i++) {
657                 ret = tps80031_read(tps80031->dev, SLAVE_ID2,
658                         TPS80031_INT_STS_A + i, &tmp[i]);
659                 if (ret < 0) {
660                         dev_err(tps80031->dev, "failed to read interrupt "
661                                                         "status\n");
662                         return IRQ_NONE;
663                 }
664                 if (tmp[i]) {
665                         ret = tps80031_write(tps80031->dev, SLAVE_ID2,
666                                         TPS80031_INT_STS_A + i, tmp[i]);
667                         if (ret < 0) {
668                                 dev_err(tps80031->dev, "failed to write "
669                                                         "interrupt status\n");
670                                 return IRQ_NONE;
671                         }
672                 }
673         }
674         acks = (tmp[2] << 16) | (tmp[1] << 8) | tmp[0];
675         while (acks) {
676                 i = __ffs(acks);
677                 if (tps80031->irq_en & (1 << i))
678                         handle_nested_irq(tps80031->irq_base + i);
679                 acks &= ~(1 << i);
680         }
681         return IRQ_HANDLED;
682 }
683
684 static int __devinit tps80031_irq_init(struct tps80031 *tps80031, int irq,
685                                 int irq_base)
686 {
687         int i, ret;
688
689         if (!irq_base) {
690                 dev_warn(tps80031->dev, "No interrupt support on IRQ base\n");
691                 return -EINVAL;
692         }
693
694         mutex_init(&tps80031->irq_lock);
695
696         for (i = 0; i < 3; i++) {
697                 tps80031->mask_reg[i] = 0xFF;
698                 tps80031->mask_cache[i] = tps80031->mask_reg[i];
699                 tps80031_write(tps80031->dev, SLAVE_ID2,
700                                         TPS80031_INT_MSK_LINE_A + i,
701                                         tps80031->mask_cache[i]);
702                 tps80031_write(tps80031->dev, SLAVE_ID2,
703                                         TPS80031_INT_MSK_STS_A + i, 0xFF);
704                 tps80031_write(tps80031->dev, SLAVE_ID2,
705                                         TPS80031_INT_STS_A + i, 0xFF);
706         }
707
708         ret = tps80031_read(tps80031->dev, SLAVE_ID2,
709                                 TPS80031_CONTROLLER_INT_MASK,
710                                 &tps80031->cont_int_mask_reg);
711         if (ret < 0) {
712                 dev_err(tps80031->dev, "Error in reading the controller_mask "
713                                         "register %d\n", ret);
714                 return ret;
715         }
716
717         tps80031->cont_int_mask_reg |= CHARGE_CONTROL_SUB_INT_MASK;
718         tps80031->cont_int_mask_cache = tps80031->cont_int_mask_reg;
719         tps80031->cont_int_en = 0;
720         ret = tps80031_write(tps80031->dev, SLAVE_ID2,
721                                 TPS80031_CONTROLLER_INT_MASK,
722                                 tps80031->cont_int_mask_reg);
723         if (ret < 0) {
724                 dev_err(tps80031->dev, "Error in writing the controller_mask "
725                                         "register %d\n", ret);
726                 return ret;
727         }
728
729         ret = tps80031_read(tps80031->dev, SLAVE_ID2,
730                         TPS80031_CONTROLLER_STAT1, &tps80031->prev_cont_stat1);
731         if (ret < 0) {
732                 dev_err(tps80031->dev, "%s(): failed to read controller state1 "
733                                 "status %d\n", __func__, ret);
734                 return ret;
735         }
736
737         tps80031->irq_base = irq_base;
738
739         tps80031->irq_chip.name = "tps80031";
740         tps80031->irq_chip.irq_enable = tps80031_irq_enable;
741         tps80031->irq_chip.irq_disable = tps80031_irq_disable;
742         tps80031->irq_chip.irq_bus_lock = tps80031_irq_lock;
743         tps80031->irq_chip.irq_bus_sync_unlock = tps80031_irq_sync_unlock;
744
745         for (i = 0; i < TPS80031_INT_NR; i++) {
746                 int __irq = i + tps80031->irq_base;
747                 irq_set_chip_data(__irq, tps80031);
748                 irq_set_chip_and_handler(__irq, &tps80031->irq_chip,
749                                          handle_simple_irq);
750                 irq_set_nested_thread(__irq, 1);
751 #ifdef CONFIG_ARM
752                 irq_set_status_flags(__irq, IRQF_VALID);
753 #endif
754         }
755
756         ret = request_threaded_irq(irq, NULL, tps80031_irq, IRQF_ONESHOT,
757                                 "tps80031", tps80031);
758         /* register the isr for the secondary interrupt */
759         if (!ret)
760                 ret = request_threaded_irq(irq_base + TPS80031_INT_CHRG_CTRL,
761                                 NULL, tps80031_charge_control_irq,
762                                 IRQF_ONESHOT, "80031_chg_ctl", tps80031);
763         if (!ret) {
764
765                 device_init_wakeup(tps80031->dev, 1);
766                 enable_irq_wake(irq);
767         }
768
769         return ret;
770 }
771
772 static void tps80031_clk32k_enable(struct tps80031 *tps80031, int base_add)
773 {
774         int ret;
775         ret = tps80031_update(tps80031->dev, SLAVE_ID1,
776                         base_add + EXT_CONTROL_CFG_STATE, STATE_ON, STATE_MASK);
777         if (!ret)
778                 ret = tps80031_update(tps80031->dev, SLAVE_ID1,
779                                 base_add + EXT_CONTROL_CFG_TRANS,
780                                 STATE_ON, STATE_MASK);
781         if (ret < 0)
782                 dev_err(tps80031->dev, "Error in updating clock register\n");
783 }
784
785 static void tps80031_clk32k_init(struct tps80031 *tps80031,
786                         struct tps80031_platform_data *pdata)
787 {
788         struct tps80031_32kclock_plat_data *clk32k_pdata;
789
790         if (!(pdata && pdata->clk32k_pdata))
791                 return;
792
793         clk32k_pdata = pdata->clk32k_pdata;
794         if (clk32k_pdata->en_clk32kao)
795                 tps80031_clk32k_enable(tps80031, CLK32KAO_BASE_ADD);
796
797         if (clk32k_pdata->en_clk32kg)
798                 tps80031_clk32k_enable(tps80031, CLK32KG_BASE_ADD);
799
800         if (clk32k_pdata->en_clk32kaudio)
801                 tps80031_clk32k_enable(tps80031, CLK32KAUDIO_BASE_ADD);
802 }
803
804 static int __devinit tps80031_add_subdevs(struct tps80031 *tps80031,
805                                           struct tps80031_platform_data *pdata)
806 {
807         struct tps80031_subdev_info *subdev;
808         struct platform_device *pdev;
809         int i, ret = 0;
810
811         for (i = 0; i < pdata->num_subdevs; i++) {
812                 subdev = &pdata->subdevs[i];
813
814                 pdev = platform_device_alloc(subdev->name, subdev->id);
815
816                 pdev->dev.parent = tps80031->dev;
817                 pdev->dev.platform_data = subdev->platform_data;
818
819                 ret = platform_device_add(pdev);
820                 if (ret)
821                         goto failed;
822         }
823         return 0;
824
825 failed:
826         tps80031_remove_subdevs(tps80031);
827         return ret;
828 }
829
830 #ifdef CONFIG_DEBUG_FS
831 #include <linux/debugfs.h>
832 #include <linux/seq_file.h>
833 static void print_regs(const char *header, struct seq_file *s,
834                 int sid, int start_offset, int end_offset)
835 {
836         struct tps80031 *tps80031 = s->private;
837         struct tps80031_client *tps = &tps80031->tps_clients[sid];
838         uint8_t reg_val;
839         int i;
840         int ret;
841
842         seq_printf(s, "%s\n", header);
843         for (i = start_offset; i <= end_offset; ++i) {
844                 ret = __tps80031_read(tps->client, i, &reg_val);
845                 if (ret >= 0)
846                         seq_printf(s, "Addr = 0x%02x Reg 0x%02x Value 0x%02x\n",
847                                                 tps->client->addr, i, reg_val);
848         }
849         seq_printf(s, "------------------\n");
850 }
851
852 static int dbg_tps_show(struct seq_file *s, void *unused)
853 {
854         seq_printf(s, "TPS80031 Registers\n");
855         seq_printf(s, "------------------\n");
856         print_regs("VIO Regs",       s, SLAVE_ID1, 0x47, 0x49);
857         print_regs("VIO Regs",       s, SLAVE_ID0, 0x49, 0x4A);
858         print_regs("SMPS1 Regs",     s, SLAVE_ID1, 0x53, 0x54);
859         print_regs("SMPS1 Regs",     s, SLAVE_ID0, 0x55, 0x56);
860         print_regs("SMPS1 Regs",     s, SLAVE_ID1, 0x57, 0x57);
861         print_regs("SMPS2 Regs",     s, SLAVE_ID1, 0x59, 0x5B);
862         print_regs("SMPS2 Regs",     s, SLAVE_ID0, 0x5B, 0x5C);
863         print_regs("SMPS2 Regs",     s, SLAVE_ID1, 0x5C, 0x5D);
864         print_regs("SMPS3 Regs",     s, SLAVE_ID1, 0x65, 0x68);
865         print_regs("SMPS4 Regs",     s, SLAVE_ID1, 0x41, 0x44);
866         print_regs("VANA Regs",      s, SLAVE_ID1, 0x81, 0x83);
867         print_regs("VRTC Regs",      s, SLAVE_ID1, 0xC3, 0xC4);
868         print_regs("LDO1 Regs",      s, SLAVE_ID1, 0x9D, 0x9F);
869         print_regs("LDO2 Regs",      s, SLAVE_ID1, 0x85, 0x87);
870         print_regs("LDO3 Regs",      s, SLAVE_ID1, 0x8D, 0x8F);
871         print_regs("LDO4 Regs",      s, SLAVE_ID1, 0x89, 0x8B);
872         print_regs("LDO5 Regs",      s, SLAVE_ID1, 0x99, 0x9B);
873         print_regs("LDO6 Regs",      s, SLAVE_ID1, 0x91, 0x93);
874         print_regs("LDO7 Regs",      s, SLAVE_ID1, 0xA5, 0xA7);
875         print_regs("LDOUSB Regs",    s, SLAVE_ID1, 0xA1, 0xA3);
876         print_regs("LDOLN Regs",     s, SLAVE_ID1, 0x95, 0x97);
877         print_regs("REGEN1 Regs",    s, SLAVE_ID1, 0xAE, 0xAF);
878         print_regs("REGEN2 Regs",    s, SLAVE_ID1, 0xB1, 0xB2);
879         print_regs("SYSEN Regs",     s, SLAVE_ID1, 0xB4, 0xB5);
880         print_regs("CLK32KAO Regs",  s, SLAVE_ID1, 0xBA, 0xBB);
881         print_regs("CLK32KG Regs",   s, SLAVE_ID1, 0xBD, 0xBE);
882         print_regs("CLK32KAUD Regs", s, SLAVE_ID1, 0xC0, 0xC1);
883         print_regs("INT Regs",       s, SLAVE_ID2, 0xD0, 0xD8);
884         print_regs("PREQ Regs",      s, SLAVE_ID1, 0xD7, 0xDF);
885         print_regs("MASK_PH Regs",   s, SLAVE_ID1, 0x20, 0x21);
886         print_regs("CONT_STATE",     s, SLAVE_ID2, 0xE0, 0xE4);
887         print_regs("VERNUM Regs",    s, SLAVE_ID1, 0x87, 0x87);
888         return 0;
889 }
890
891 static int dbg_tps_open(struct inode *inode, struct file *file)
892 {
893         return single_open(file, dbg_tps_show, inode->i_private);
894 }
895
896 static const struct file_operations debug_fops = {
897         .open           = dbg_tps_open,
898         .read           = seq_read,
899         .llseek         = seq_lseek,
900         .release        = single_release,
901 };
902
903 static void __init tps80031_debuginit(struct tps80031 *tps)
904 {
905         (void)debugfs_create_file("tps80031", S_IRUGO, NULL,
906                         tps, &debug_fops);
907 }
908 #else
909 static void __init tps80031_debuginit(struct tps80031 *tpsi)
910 {
911         return;
912 }
913 #endif
914
915 static int __devexit tps80031_i2c_remove(struct i2c_client *client)
916 {
917         struct tps80031 *tps80031 = i2c_get_clientdata(client);
918         int i;
919
920         if (client->irq)
921                 free_irq(client->irq, tps80031);
922
923         if (tps80031->gpio.owner != NULL)
924                 if (gpiochip_remove(&tps80031->gpio) < 0)
925                         dev_err(&client->dev, "Error in removing the gpio driver\n");
926
927         for (i = 0; i < TPS_NUM_SLAVES; i++) {
928                 struct tps80031_client *tps = &tps80031->tps_clients[i];
929                 if (tps->client && tps->client != client)
930                         i2c_unregister_device(tps->client);
931                 tps80031->tps_clients[i].client = NULL;
932                 mutex_destroy(&tps->lock);
933         }
934
935         kfree(tps80031);
936         return 0;
937 }
938
939 static int __devinit tps80031_i2c_probe(struct i2c_client *client,
940                                         const struct i2c_device_id *id)
941 {
942         struct tps80031_platform_data *pdata = client->dev.platform_data;
943         struct tps80031 *tps80031;
944         struct tps80031_client *tps;
945         int ret;
946         int i;
947
948         if (!pdata) {
949                 dev_err(&client->dev, "tps80031 requires platform data\n");
950                 return -ENOTSUPP;
951         }
952
953         ret = i2c_smbus_read_byte_data(client, TPS80031_JTAGVERNUM);
954         if (ret < 0) {
955                 dev_err(&client->dev, "Silicon version number read"
956                                 " failed: %d\n", ret);
957                 return -EIO;
958         }
959
960         dev_info(&client->dev, "VERNUM is %02x\n", ret);
961
962         tps80031 = kzalloc(sizeof(struct tps80031), GFP_KERNEL);
963         if (tps80031 == NULL)
964                 return -ENOMEM;
965
966         tps80031->dev = &client->dev;
967         i2c_set_clientdata(client, tps80031);
968         tps80031->chip_info = id->driver_data;
969
970         /* Set up slaves */
971         tps80031->tps_clients[SLAVE_ID0].addr = I2C_ID0_ADDR;
972         tps80031->tps_clients[SLAVE_ID1].addr = I2C_ID1_ADDR;
973         tps80031->tps_clients[SLAVE_ID2].addr = I2C_ID2_ADDR;
974         tps80031->tps_clients[SLAVE_ID3].addr = I2C_ID3_ADDR;
975         for (i = 0; i < TPS_NUM_SLAVES; i++) {
976                 tps = &tps80031->tps_clients[i];
977                 if (tps->addr == client->addr)
978                         tps->client = client;
979                 else
980                         tps->client = i2c_new_dummy(client->adapter,
981                                                 tps->addr);
982                 if (!tps->client) {
983                         dev_err(&client->dev, "can't attach client %d\n", i);
984                         ret = -ENOMEM;
985                         goto fail;
986                 }
987                 i2c_set_clientdata(tps->client, tps80031);
988                 mutex_init(&tps->lock);
989         }
990
991         if (client->irq) {
992                 ret = tps80031_irq_init(tps80031, client->irq,
993                                         pdata->irq_base);
994                 if (ret) {
995                         dev_err(&client->dev, "IRQ init failed: %d\n", ret);
996                         goto fail;
997                 }
998         }
999
1000         ret = tps80031_add_subdevs(tps80031, pdata);
1001         if (ret) {
1002                 dev_err(&client->dev, "add devices failed: %d\n", ret);
1003                 goto fail;
1004         }
1005
1006         tps80031_gpio_init(tps80031, pdata);
1007
1008         tps80031_clk32k_init(tps80031, pdata);
1009
1010         tps80031_debuginit(tps80031);
1011
1012         tps80031_dev = tps80031;
1013
1014         return 0;
1015
1016 fail:
1017         tps80031_i2c_remove(client);
1018         return ret;
1019 }
1020
1021 #ifdef CONFIG_PM
1022 static int tps80031_i2c_suspend(struct i2c_client *client, pm_message_t state)
1023 {
1024         if (client->irq)
1025                 disable_irq(client->irq);
1026         return 0;
1027 }
1028
1029 static int tps80031_i2c_resume(struct i2c_client *client)
1030 {
1031         if (client->irq)
1032                 enable_irq(client->irq);
1033         return 0;
1034 }
1035 #endif
1036
1037
1038 static const struct i2c_device_id tps80031_id_table[] = {
1039         { "tps80031", TPS80031 },
1040         { "tps80032", TPS80032 },
1041 };
1042 MODULE_DEVICE_TABLE(i2c, tps80031_id_table);
1043
1044 static struct i2c_driver tps80031_driver = {
1045         .driver = {
1046                 .name   = "tps80031",
1047                 .owner  = THIS_MODULE,
1048         },
1049         .probe          = tps80031_i2c_probe,
1050         .remove         = __devexit_p(tps80031_i2c_remove),
1051 #ifdef CONFIG_PM
1052         .suspend        = tps80031_i2c_suspend,
1053         .resume         = tps80031_i2c_resume,
1054 #endif
1055         .id_table       = tps80031_id_table,
1056 };
1057
1058 static int __init tps80031_init(void)
1059 {
1060         return i2c_add_driver(&tps80031_driver);
1061 }
1062 subsys_initcall(tps80031_init);
1063
1064 static void __exit tps80031_exit(void)
1065 {
1066         i2c_del_driver(&tps80031_driver);
1067 }
1068 module_exit(tps80031_exit);
1069
1070 MODULE_DESCRIPTION("TPS80031 core driver");
1071 MODULE_LICENSE("GPL");