config: tegra3: enable /dev mount with ACL
[linux-2.6.git] / drivers / mfd / tlv320aic3262-core.c
1
2 #include <linux/kernel.h>
3 #include <linux/module.h>
4 #include <linux/slab.h>
5 #include <linux/i2c.h>
6 #include <linux/spi/spi.h>
7 #include <linux/delay.h>
8 #include <linux/mfd/core.h>
9 #include <linux/pm_runtime.h>
10 #include <linux/regulator/consumer.h>
11 #include <linux/regulator/machine.h>
12 #include <linux/gpio.h>
13
14 #include <linux/mfd/tlv320aic3262-core.h>
15 #include <linux/mfd/tlv320aic3262-registers.h>
16 #define DEBUG
17 struct aic3262_gpio {
18         unsigned int reg;
19         u8 mask;
20         u8 shift;
21 };
22 struct aic3262_gpio  aic3262_gpio_control[] = {
23         {
24                 .reg = AIC3262_GPIO1_IO_CNTL,
25                 .mask = AIC3262_GPIO_D6_D2,
26                 .shift = AIC3262_GPIO_D2_SHIFT,
27         },
28         {
29                 .reg = AIC3262_GPIO2_IO_CNTL,
30                 .mask = AIC3262_GPIO_D6_D2,
31                 .shift = AIC3262_GPIO_D2_SHIFT,
32         },
33         {
34                 .reg = AIC3262_GPI1_EN,
35                 .mask = AIC3262_GPI1_D2_D1,
36                 .shift = AIC3262_GPIO_D1_SHIFT,
37         },
38         {
39                 .reg = AIC3262_GPI2_EN,
40                 .mask = AIC3262_GPI2_D5_D4,
41                 .shift = AIC3262_GPIO_D4_SHIFT,
42         },
43         {
44                 .reg = AIC3262_GPO1_OUT_CNTL,
45                 .mask = AIC3262_GPO1_D4_D1,
46                 .shift = AIC3262_GPIO_D1_SHIFT,
47         },
48 };
49 static int aic3262_read(struct aic3262 *aic3262, unsigned int reg,
50                        int bytes, void *dest)
51 {
52         int ret;
53         int i;
54         u8 *buf = dest;
55
56         BUG_ON(bytes <= 0);
57
58         ret = aic3262->read_dev(aic3262, reg, bytes, dest);
59         if (ret < 0)
60                 return ret;
61
62         for (i = 0; i < bytes ; i++) {
63                 dev_vdbg(aic3262->dev, "Read %04x from R%d(0x%x)\n",
64                          buf[i], reg + i, reg + i);
65         }
66
67         return ret;
68 }
69
70 /**
71  * aic3262_reg_read: Read a single TLV320AIC3262 register.
72  *
73  * @aic3262: Device to read from.
74  * @reg: Register to read.
75  */
76 int aic3262_reg_read(struct aic3262 *aic3262, unsigned int reg)
77 {
78         unsigned char val;
79         int ret;
80
81         mutex_lock(&aic3262->io_lock);
82
83         ret = aic3262_read(aic3262, reg, 1, &val);
84
85         mutex_unlock(&aic3262->io_lock);
86
87         if (ret < 0)
88                 return ret;
89         else
90                 return val;
91 }
92 EXPORT_SYMBOL_GPL(aic3262_reg_read);
93
94 /**
95  * aic3262_bulk_read: Read multiple TLV320AIC3262 registers
96  *
97  * @aic3262: Device to read from
98  * @reg: First register
99  * @count: Number of registers
100  * @buf: Buffer to fill.  The data will be returned big endian.
101  */
102 int aic3262_bulk_read(struct aic3262 *aic3262, unsigned int reg,
103                      int count, u8 *buf)
104 {
105         int ret;
106
107         mutex_lock(&aic3262->io_lock);
108
109         ret = aic3262_read(aic3262, reg, count, buf);
110
111         mutex_unlock(&aic3262->io_lock);
112
113
114         return ret;
115 }
116 EXPORT_SYMBOL_GPL(aic3262_bulk_read);
117
118 static int aic3262_write(struct aic3262 *aic3262, unsigned int reg,
119                         int bytes, const void *src)
120 {
121         const u8 *buf = src;
122         int i;
123
124         BUG_ON(bytes <= 0);
125
126         for (i = 0; i < bytes ; i++) {
127                 dev_vdbg(aic3262->dev, "Write %04x to R%d(0x%x)\n",
128                         buf[i], reg + i, reg + i);
129         }
130
131         return aic3262->write_dev(aic3262, reg, bytes, src);
132 }
133
134 /**
135  * aic3262_reg_write: Write a single TLV320AIC3262 register.
136  *
137  * @aic3262: Device to write to.
138  * @reg: Register to write to.
139  * @val: Value to write.
140  */
141 int aic3262_reg_write(struct aic3262 *aic3262, unsigned int reg,
142                      unsigned char val)
143 {
144         int ret;
145
146
147         mutex_lock(&aic3262->io_lock);
148
149         dev_dbg(aic3262->dev, "w 30 %x %x", reg, val);
150         ret = aic3262_write(aic3262, reg, 1, &val);
151
152         mutex_unlock(&aic3262->io_lock);
153
154         return ret;
155 }
156 EXPORT_SYMBOL_GPL(aic3262_reg_write);
157
158 /**
159  * aic3262_bulk_write: Write multiple TLV320AIC3262 registers
160  *
161  * @aic3262: Device to write to
162  * @reg: First register
163  * @count: Number of registers
164  * @buf: Buffer to write from.  Data must be big-endian formatted.
165  */
166 int aic3262_bulk_write(struct aic3262 *aic3262, unsigned int reg,
167                       int count, const u8 *buf)
168 {
169         int ret;
170
171         mutex_lock(&aic3262->io_lock);
172
173         ret = aic3262_write(aic3262, reg, count, buf);
174
175         mutex_unlock(&aic3262->io_lock);
176
177         return ret;
178 }
179 EXPORT_SYMBOL_GPL(aic3262_bulk_write);
180
181 /**
182  * aic3262_set_bits: Set the value of a bitfield in a TLV320AIC3262 register
183  *
184  * @aic3262: Device to write to.
185  * @reg: Register to write to.
186  * @mask: Mask of bits to set.
187  * @val: Value to set (unshifted)
188  */
189 int aic3262_set_bits(struct aic3262 *aic3262, unsigned int reg,
190                     unsigned char mask, unsigned char val)
191 {
192         int ret;
193         u8 r;
194
195         mutex_lock(&aic3262->io_lock);
196
197         ret = aic3262_read(aic3262, reg, 1, &r);
198         if (ret < 0)
199                 goto out;
200
201
202         r &= ~mask;
203         r |= (val & mask);
204
205         dev_dbg(aic3262->dev, "w 30 %x %x", reg, r);
206         ret = aic3262_write(aic3262, reg, 1, &r);
207
208 out:
209         mutex_unlock(&aic3262->io_lock);
210
211         return ret;
212 }
213 EXPORT_SYMBOL_GPL(aic3262_set_bits);
214
215 /**
216  * aic3262_wait_bits: wait for a value of a bitfield in a TLV320AIC3262 register
217  *
218  * @aic3262: Device to write to.
219  * @reg: Register to write to.
220  * @mask: Mask of bits to set.
221  * @val: Value to set (unshifted)
222  * @sleep: mdelay value in each iteration in milliseconds
223  * @count: iteration count for timeout
224  */
225 int aic3262_wait_bits(struct aic3262 *aic3262, unsigned int reg,
226                 unsigned char mask, unsigned char val, int sleep, int counter)
227 {
228         int status;
229         int timeout =  sleep*counter;
230
231         status = aic3262_reg_read(aic3262, reg);
232         while (((status & mask) != val) && counter) {
233                 mdelay(sleep);
234                 status = aic3262_reg_read(aic3262, reg);
235                 counter--;
236         };
237         if (!counter)
238                 dev_err(aic3262->dev,
239                  "wait_bits timedout (%d millisecs). lastval 0x%x\n",
240                  timeout, status);
241         return counter;
242 }
243 EXPORT_SYMBOL_GPL(aic3262_wait_bits);
244
245 /* to be changed -- Mukund*/
246 static struct resource aic3262_codec_resources[] = {
247         {
248                 .start = AIC3262_IRQ_HEADSET_DETECT,
249                 .end   = AIC3262_IRQ_SPEAKER_OVER_TEMP,
250                 .flags = IORESOURCE_IRQ,
251         },
252 };
253
254 static struct resource aic3262_gpio_resources[] = {
255         {
256                 .start = AIC3262_GPIO1,
257                 .end   = AIC3262_GPO1,
258                 .flags = IORESOURCE_IRQ,
259         },
260 };
261
262 static struct mfd_cell aic3262_devs[] = {
263         {
264                 .name = "tlv320aic3262-codec",
265                 .num_resources = ARRAY_SIZE(aic3262_codec_resources),
266                 .resources = aic3262_codec_resources,
267         },
268
269         {
270                 .name = "tlv320aic3262-gpio",
271                 .num_resources = ARRAY_SIZE(aic3262_gpio_resources),
272                 .resources = aic3262_gpio_resources,
273                 .pm_runtime_no_callbacks = true,
274         },
275 };
276
277
278 #ifdef CONFIG_PM
279 static int aic3262_suspend(struct device *dev)
280 {
281         struct aic3262 *aic3262 = dev_get_drvdata(dev);
282
283         aic3262->suspended = true;
284
285         return 0;
286 }
287
288 static int aic3262_resume(struct device *dev)
289 {
290         struct aic3262 *aic3262 = dev_get_drvdata(dev);
291
292
293         aic3262->suspended = false;
294
295         return 0;
296 }
297
298 static UNIVERSAL_DEV_PM_OPS(aic3262_pm_ops, aic3262_suspend, aic3262_resume,
299                                 NULL);
300 #endif
301
302
303 /*
304  * Instantiate the generic non-control parts of the device.
305  */
306 static int aic3262_device_init(struct aic3262 *aic3262, int irq)
307 {
308         struct aic3262_pdata *pdata = aic3262->dev->platform_data;
309         const char *devname;
310         int ret, i;
311         u8 revID, pgID;
312         unsigned int naudint = 0;
313         u8 resetVal = 1;
314
315         mutex_init(&aic3262->io_lock);
316         dev_set_drvdata(aic3262->dev, aic3262);
317         if (pdata) {
318                 if (pdata->gpio_reset) {
319                         ret = gpio_request(pdata->gpio_reset,
320                                 "aic3262-reset-pin");
321                         if (ret != 0) {
322                                 dev_err(aic3262->dev,
323                                 "Failed to reset aic3262 using gpio %d\n",
324                                 pdata->gpio_reset);
325                                 goto err_return;
326                         }
327                         gpio_direction_output(pdata->gpio_reset, 1);
328                         mdelay(5);
329                         gpio_direction_output(pdata->gpio_reset, 0);
330                         mdelay(5);
331                         gpio_direction_output(pdata->gpio_reset, 1);
332                         mdelay(5);
333                 }
334         }
335
336
337         /* run the codec through software reset */
338         ret = aic3262_reg_write(aic3262, AIC3262_RESET_REG, resetVal);
339         if (ret < 0) {
340                 dev_err(aic3262->dev, "Could not write to AIC3262 register\n");
341                 goto err_return;
342         }
343
344         mdelay(10);
345
346         ret = aic3262_reg_read(aic3262, AIC3262_REV_PG_ID);
347         if (ret < 0) {
348                 dev_err(aic3262->dev, "Failed to read ID register\n");
349                 goto err_return;
350         }
351         revID = (ret & AIC3262_REV_MASK) >> AIC3262_REV_SHIFT;
352         pgID = (ret & AIC3262_PG_MASK) >> AIC3262_PG_SHIFT;
353         switch (revID) {
354         case 3:
355                 devname = "TLV320AIC3262";
356                 if (aic3262->type != TLV320AIC3262)
357                         dev_warn(aic3262->dev, "Device registered as type %d\n",
358                                  aic3262->type);
359                 aic3262->type = TLV320AIC3262;
360                 break;
361         case 1:
362                 devname = "TLV320AIC3262";
363                 if (aic3262->type != TLV320AIC3262)
364                         dev_warn(aic3262->dev, "Device registered as type %d\n",
365                                  aic3262->type);
366                 aic3262->type = TLV320AIC3262;
367                 break;
368
369         default:
370                 dev_err(aic3262->dev, "Device is not a TLV320AIC3262, ID is %x\n",
371                         ret);
372                 ret = -EINVAL;
373                 goto err_return;
374
375         }
376
377         dev_info(aic3262->dev, "%s revision %c\n", devname, 'D' + ret);
378
379
380         if (pdata) {
381                 if (pdata->gpio_irq == 1) {
382                         naudint = gpio_to_irq(pdata->naudint_irq);
383                         gpio_request(pdata->naudint_irq, "aic3262-gpio-irq");
384                         gpio_direction_input(pdata->naudint_irq);
385                 } else
386                         naudint = pdata->naudint_irq;
387
388                 aic3262->irq = naudint;
389                 aic3262->irq_base = pdata->irq_base;
390                 for (i = 0; i < AIC3262_NUM_GPIO; i++) {
391                         if (pdata->gpio[i].used) {
392                                 /* Direction is input */
393                                 if (pdata->gpio[i].in) {
394                                         /* set direction to input for GPIO,
395                                         and enable for GPI */
396                                         aic3262_set_bits(aic3262,
397                                                 aic3262_gpio_control[i].reg,
398                                                 aic3262_gpio_control[i].mask,
399                                                 0x1 <<
400                                                 aic3262_gpio_control[i].shift);
401
402                                         if (pdata->gpio[i].in_reg)
403                                                 /* Some input modes, does not
404                                                 need extra registers to be
405                                                 written */
406                                                 aic3262_set_bits(aic3262,
407                                                         pdata->gpio[i].in_reg,
408                                                         pdata->gpio[i].
409                                                         in_reg_bitmask,
410                                                         pdata->gpio[i].value <<
411                                                         pdata->gpio[i].
412                                                         in_reg_shift);
413                                 } else {
414                                         /* Direction si output */
415                                         aic3262_set_bits(aic3262,
416                                                 aic3262_gpio_control[i].reg,
417                                                 aic3262_gpio_control[i].mask,
418                                                 pdata->gpio[i].value <<
419                                                 aic3262_gpio_control[i].shift);
420                                 }
421                         } else
422                                 aic3262_set_bits(aic3262,
423                                         aic3262_gpio_control[i].reg,
424                                         aic3262_gpio_control[i].mask, 0x0);
425                 }
426         }
427
428         if (naudint) {
429                 /* codec interrupt */
430                 ret = aic3262_irq_init(aic3262);
431                 if (ret)
432                         goto err_irq;
433         }
434
435         ret = mfd_add_devices(aic3262->dev, -1,
436                               aic3262_devs, ARRAY_SIZE(aic3262_devs),
437                               NULL, 0);
438         if (ret != 0) {
439                 dev_err(aic3262->dev, "Failed to add children: %d\n", ret);
440                 goto err_irq;
441         }
442
443         pm_runtime_enable(aic3262->dev);
444         pm_runtime_resume(aic3262->dev);
445
446         return 0;
447
448 err_irq:
449         aic3262_irq_exit(aic3262);
450 err_return:
451         kfree(aic3262);
452         return ret;
453 }
454
455 static void aic3262_device_exit(struct aic3262 *aic3262)
456 {
457         pm_runtime_disable(aic3262->dev);
458         mfd_remove_devices(aic3262->dev);
459         aic3262_irq_exit(aic3262);
460         kfree(aic3262);
461 }
462
463 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
464
465
466 static int aic3262_i2c_read_device(struct aic3262 *aic3262, unsigned int reg,
467                                   int bytes, void *dest)
468 {
469         struct i2c_client *i2c = aic3262->control_data;
470         union aic326x_reg_union *aic_reg = (union aic326x_reg_union *) &reg;
471         char *value;
472         int ret;
473         u8 buf[2];
474         u8 page, book, offset;
475         page = aic_reg->aic326x_register.page;
476         book = aic_reg->aic326x_register.book;
477         offset = aic_reg->aic326x_register.offset;
478         if (aic3262->book_no != book) {
479                 /* We should change to page 0.
480                 Change the book by writing to offset 127 of page 0
481                 Change the page back to whatever was set before change page */
482                 buf[0] = 0x0;
483                 buf[1] = 0x0;
484                 ret = i2c_master_send(i2c, (unsigned char *)buf, 2);
485                 if (ret < 0)
486                         return ret;
487                 if (ret != 2)
488                         return -EIO;
489                 buf[0] = 127;
490                 buf[1] = book;
491                 ret = i2c_master_send(i2c, (unsigned char *)buf, 2);
492                 if (ret < 0)
493                         return ret;
494                 if (ret != 2)
495                         return -EIO;
496                 aic3262->book_no = book;
497                 aic3262->page_no = 0x0;
498         }
499
500         if (aic3262->page_no != page) {
501                 buf[0] = 0x0;
502                 buf[1] = page;
503                 ret = i2c_master_send(i2c, (unsigned char *) buf, 2);
504
505                 if (ret < 0)
506                         return ret;
507                 if (ret != 2)
508                         return -EIO;
509                 aic3262->page_no = page;
510         }
511
512         /* Send the required offset */
513         buf[0] = offset ;
514         ret = i2c_master_send(i2c, (unsigned char *)buf, 1);
515         if (ret < 0)
516                 return ret;
517         if (ret != 1)
518                 return -EIO;
519
520         ret = i2c_master_recv(i2c, dest, bytes);
521         value = dest;
522         if (ret < 0)
523                 return ret;
524         if (ret != bytes)
525                 return -EIO;
526         return ret;
527 }
528
529 static int aic3262_i2c_write_device(struct aic3262 *aic3262, unsigned int reg,
530                                    int bytes, const void *src)
531 {
532         struct i2c_client *i2c = aic3262->control_data;
533         int ret;
534
535         union aic326x_reg_union *aic_reg = (union aic326x_reg_union *) &reg;
536
537         u8 buf[2];
538         u8 write_buf[bytes + 1];
539         u8 page, book, offset;
540         page = aic_reg->aic326x_register.page;
541         book = aic_reg->aic326x_register.book;
542         offset = aic_reg->aic326x_register.offset;
543         if (aic3262->book_no != book) {
544                 /* We should change to page 0.
545                 Change the book by writing to offset 127 of page 0
546                 Change the page back to whatever was set before change page*/
547                 buf[0] = 0x0;
548                 buf[1] = 0x0;
549                 ret = i2c_master_send(i2c, (unsigned char *)buf, 2);
550
551                 if (ret < 0)
552                         return ret;
553                 if (ret != 2)
554                         return -EIO;
555                 buf[0] = 127;
556                 buf[1] = book;
557                 ret = i2c_master_send(i2c, (unsigned char *)buf, 2);
558                 if (ret < 0)
559                         return ret;
560                 if (ret != 2)
561                         return -EIO;
562                 aic3262->book_no = book;
563                 aic3262->page_no = 0x0;
564         }
565
566         if (aic3262->page_no != page) {
567                 buf[0] = 0x0;
568                 buf[1] = page;
569                 ret = i2c_master_send(i2c, (unsigned char *) buf, 2);
570                 if (ret < 0)
571                         return ret;
572                 if (ret != 2)
573                         return -EIO;
574                 aic3262->page_no = page;
575         }
576         write_buf[0] = offset;
577         memcpy(&write_buf[1], src, bytes);
578         ret = i2c_master_send(i2c, write_buf, bytes + 1);
579         if (ret < 0)
580                 return ret;
581         if (ret != (bytes + 1))
582                 return -EIO;
583
584         return 0;
585 }
586
587 static int aic3262_i2c_probe(struct i2c_client *i2c,
588                             const struct i2c_device_id *id)
589 {
590         struct aic3262 *aic3262;
591
592         aic3262 = kzalloc(sizeof(struct aic3262), GFP_KERNEL);
593         if (aic3262 == NULL)
594                 return -ENOMEM;
595
596         i2c_set_clientdata(i2c, aic3262);
597         aic3262->dev = &i2c->dev;
598         aic3262->control_data = i2c;
599         aic3262->read_dev = aic3262_i2c_read_device;
600         aic3262->write_dev = aic3262_i2c_write_device;
601         aic3262->type = id->driver_data;
602         aic3262->book_no = 255;
603         aic3262->page_no = 255;
604
605         return aic3262_device_init(aic3262, i2c->irq);
606 }
607
608 static int aic3262_i2c_remove(struct i2c_client *i2c)
609 {
610         struct aic3262 *aic3262 = i2c_get_clientdata(i2c);
611
612         aic3262_device_exit(aic3262);
613
614         return 0;
615 }
616
617 static const struct i2c_device_id aic3262_i2c_id[] = {
618         { "tlv320aic3262", TLV320AIC3262 },
619         { }
620 };
621 MODULE_DEVICE_TABLE(i2c, aic3262_i2c_id);
622
623
624 static struct i2c_driver aic3262_i2c_driver = {
625         .driver = {
626                 .name = "tlv320aic3262",
627                 .owner = THIS_MODULE,
628                 .pm = &aic3262_pm_ops,
629         },
630         .probe = aic3262_i2c_probe,
631         .remove = aic3262_i2c_remove,
632         .id_table = aic3262_i2c_id,
633 };
634
635 static int __init aic3262_i2c_init(void)
636 {
637         int ret;
638         ret = i2c_add_driver(&aic3262_i2c_driver);
639         if (ret != 0)
640                 pr_err("Failed to register aic3262 I2C driver: %d\n", ret);
641
642         return ret;
643 }
644 module_init(aic3262_i2c_init);
645
646 static void __exit aic3262_i2c_exit(void)
647 {
648         i2c_del_driver(&aic3262_i2c_driver);
649 }
650 module_exit(aic3262_i2c_exit);
651 #endif
652 #if defined(CONFIG_SPI_MASTER)
653 /* TODO: UGLY
654  * NVidia's CS differs from what TI requires on the SPI bus. So before
655  * we do any write/read we pull down the CS gpio :(
656  * The problem is in spi_read.
657  * Can we set the flag spi_transfer.cs_change during read so that CS is
658  * pulled low until the next transaction occurs
659  * (spi_read requires a spi_write followed by spi_read)
660  */
661 #include <linux/gpio.h>
662 #include "../../../arch/arm/mach-tegra/gpio-names.h"
663 #include <linux/delay.h>
664 #define SPI_CS  TEGRA_GPIO_PX3
665 #define CS(a)  gpio_set_value(SPI_CS, a)
666 void nvidia_spi_cs_en(bool stop)
667 {
668         if (stop) {
669                 CS(1);
670                 udelay(1);
671         } else {
672                 CS(0);
673                 udelay(1);
674         }
675         return;
676 }
677 static int aic3262_spi_read_device(struct aic3262 *aic3262, unsigned int reg,
678                                   int bytes, void *dest)
679 {
680         struct spi_device *spi = aic3262->control_data;
681         union aic326x_reg_union *aic_reg = (union aic326x_reg_union *) &reg;
682         u8 *write_read_buf;
683         unsigned int i;
684         unsigned int time;
685         unsigned int last_count;
686         unsigned int spi_read_bufsize = max(32, SMP_CACHE_BYTES)-1;
687         struct spi_message      message;
688         struct spi_transfer     x[2];
689         int ret;
690         u8 buf[2];
691         u8 page, book, offset;
692         page = aic_reg->aic326x_register.page;
693         book = aic_reg->aic326x_register.book;
694         offset = aic_reg->aic326x_register.offset;
695         if (aic3262->book_no != book) {
696                 /* We should change to page 0.
697                 Change the book by writing to offset 127 of page 0
698                 Change the page back to whatever was set before change page */
699
700                 buf[0] = 0x0;
701                 buf[1] = 0x0;
702
703                 nvidia_spi_cs_en(0);
704                 ret = spi_write(spi, (unsigned char *)buf, 2);
705                 nvidia_spi_cs_en(1);
706
707                 if (ret < 0)
708                         return ret;
709                 buf[0] = (127 << 1) ;
710                 buf[1] = book;
711
712                 nvidia_spi_cs_en(0);
713                 ret = spi_write(spi, (unsigned char *)buf, 2);
714                 nvidia_spi_cs_en(1);
715
716                 if (ret < 0)
717                         return ret;
718                 aic3262->book_no = book;
719                 aic3262->page_no = 0x0;
720         }
721
722         if (aic3262->page_no != page) {
723                 buf[0] = 0x0;
724                 buf[1] = page;
725
726                 nvidia_spi_cs_en(0);
727                 ret = spi_write(spi, (unsigned char *)buf, 2);
728                 nvidia_spi_cs_en(1);
729
730                 if (ret < 0)
731                         return ret;
732                 aic3262->page_no = page;
733         }
734
735         buf[0] = (offset << 1) | (0x01) ;
736         memset(x, 0, sizeof x);
737         spi_message_init(&message);
738         x[0].len = 1;
739         x[0].tx_buf = buf;
740         x[1].len = bytes;
741         x[1].rx_buf = dest ;
742
743         spi_message_add_tail(&x[0], &message);
744         spi_message_add_tail(&x[1], &message);
745
746         nvidia_spi_cs_en(0);
747         ret = spi_sync(spi, &message);
748         nvidia_spi_cs_en(1);
749         if (ret < 0)
750                 return ret;
751
752         return bytes;
753
754 }
755 /* NVidia's CS differs from what TI requires on the SPI bus. So before
756  * we do any write/read we pull down the CS gpio :(
757  */
758 static int aic3262_spi_write_device(struct aic3262 *aic3262, unsigned int reg,
759                                    int bytes, const void *src)
760 {
761         struct spi_device *spi = aic3262->control_data;
762         int ret;
763
764         union aic326x_reg_union *aic_reg = (union aic326x_reg_union *) &reg;
765
766         u8 buf[2];
767         u8 write_buf[bytes + 1];
768         u8 page, book, offset;
769         page = aic_reg->aic326x_register.page;
770         book = aic_reg->aic326x_register.book;
771         offset = aic_reg->aic326x_register.offset;
772         if (aic3262->book_no != book) {
773                 /* We should change to page 0.
774                 Change the book by writing to offset 127 of page 0
775                 Change the page back to whatever was set before change page */
776
777                 buf[0] = 0x0;
778                 buf[1] = 0x0;
779
780                 nvidia_spi_cs_en(0);
781                 ret = spi_write(spi, (unsigned char *)buf, 2);
782                 nvidia_spi_cs_en(1);
783
784                 if (ret < 0)
785                         return ret;
786                 buf[0] = (127 << 1) ;
787                 buf[1] = book;
788
789                 nvidia_spi_cs_en(0);
790                 ret = spi_write(spi, (unsigned char *)buf, 2);
791                 nvidia_spi_cs_en(1);
792
793                 if (ret < 0)
794                         return ret;
795                 aic3262->book_no = book;
796                 aic3262->page_no = 0x0;
797         }
798
799         if (aic3262->page_no != page) {
800                 buf[0] = 0x0;
801                 buf[1] = page;
802                 nvidia_spi_cs_en(0);
803                 ret = spi_write(spi, (unsigned char *) buf, 2);
804                 nvidia_spi_cs_en(1);
805                 if (ret < 0)
806                         return ret;
807                 aic3262->page_no = page;
808         }
809         write_buf[0] = offset << 1 ;
810         memcpy(&write_buf[1], src, bytes);
811         nvidia_spi_cs_en(0);
812         ret = spi_write(spi, write_buf, bytes + 1);
813         nvidia_spi_cs_en(1);
814         if (ret < 0)
815                 return ret;
816
817         return bytes;
818 }
819
820 static int aic3262_spi_probe(struct spi_device *spi)
821 {
822         struct aic3262 *aic3262;
823
824         aic3262 = kzalloc(sizeof(struct aic3262), GFP_KERNEL);
825         if (aic3262 == NULL)
826                 return -ENOMEM;
827
828         spi_set_drvdata(spi, aic3262);
829         aic3262->dev = &spi->dev;
830         aic3262->control_data = spi;
831         aic3262->read_dev = aic3262_spi_read_device;
832         aic3262->write_dev = aic3262_spi_write_device;
833         spi->bits_per_word = 8;
834         spi->mode = SPI_MODE_1;
835         spi->max_speed_hz = 4000*1000;
836         spi_setup(spi);
837
838         if (strcmp(spi->modalias, "tlv320aic3262") == 0)
839                 aic3262->type = TLV320AIC3262;
840         aic3262->book_no = 255;
841         aic3262->page_no = 255;
842
843         return aic3262_device_init(aic3262, spi->irq);
844 }
845
846 static int aic3262_spi_remove(struct spi_device *spi)
847 {
848         struct aic3262 *aic3262 = spi_get_drvdata(spi);
849
850         aic3262_device_exit(aic3262);
851
852         return 0;
853 }
854
855 static struct spi_driver aic3262_spi_driver = {
856         .driver = {
857                 .name = "tlv320aic3262",
858                 .owner = THIS_MODULE,
859                 .pm = &aic3262_pm_ops,
860         },
861         .probe = aic3262_spi_probe,
862         .remove = aic3262_spi_remove,
863 };
864
865 static int __init aic3262_spi_init(void)
866 {
867         int ret;
868         ret = spi_register_driver(&aic3262_spi_driver);
869         if (ret != 0)
870                 pr_err("Failed to register aic3262 SPI driver: %d\n", ret);
871
872         return ret;
873 }
874 module_init(aic3262_spi_init);
875
876 static void __exit aic3262_spi_exit(void)
877 {
878         spi_unregister_driver(&aic3262_spi_driver);
879 }
880 module_exit(aic3262_spi_exit);
881 #endif
882
883 MODULE_DESCRIPTION("Core support for the TLV320AIC3262 audio CODEC");
884 MODULE_LICENSE("GPL");
885 MODULE_AUTHOR("Mukund Navada <navada@ti.com>");