headers: remove sched.h from poll.h
[linux-2.6.git] / drivers / mfd / tc6393xb.c
1 /*
2  * Toshiba TC6393XB SoC support
3  *
4  * Copyright(c) 2005-2006 Chris Humbert
5  * Copyright(c) 2005 Dirk Opfer
6  * Copyright(c) 2005 Ian Molton <spyro@f2s.com>
7  * Copyright(c) 2007 Dmitry Baryshkov
8  *
9  * Based on code written by Sharp/Lineo for 2.4 kernels
10  * Based on locomo.c
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License version 2 as
14  * published by the Free Software Foundation.
15  */
16
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/io.h>
20 #include <linux/irq.h>
21 #include <linux/platform_device.h>
22 #include <linux/clk.h>
23 #include <linux/err.h>
24 #include <linux/mfd/core.h>
25 #include <linux/mfd/tmio.h>
26 #include <linux/mfd/tc6393xb.h>
27 #include <linux/gpio.h>
28
29 #define SCR_REVID       0x08            /* b Revision ID        */
30 #define SCR_ISR         0x50            /* b Interrupt Status   */
31 #define SCR_IMR         0x52            /* b Interrupt Mask     */
32 #define SCR_IRR         0x54            /* b Interrupt Routing  */
33 #define SCR_GPER        0x60            /* w GP Enable          */
34 #define SCR_GPI_SR(i)   (0x64 + (i))    /* b3 GPI Status        */
35 #define SCR_GPI_IMR(i)  (0x68 + (i))    /* b3 GPI INT Mask      */
36 #define SCR_GPI_EDER(i) (0x6c + (i))    /* b3 GPI Edge Detect Enable */
37 #define SCR_GPI_LIR(i)  (0x70 + (i))    /* b3 GPI Level Invert  */
38 #define SCR_GPO_DSR(i)  (0x78 + (i))    /* b3 GPO Data Set      */
39 #define SCR_GPO_DOECR(i) (0x7c + (i))   /* b3 GPO Data OE Control */
40 #define SCR_GP_IARCR(i) (0x80 + (i))    /* b3 GP Internal Active Register Control */
41 #define SCR_GP_IARLCR(i) (0x84 + (i))   /* b3 GP INTERNAL Active Register Level Control */
42 #define SCR_GPI_BCR(i)  (0x88 + (i))    /* b3 GPI Buffer Control */
43 #define SCR_GPA_IARCR   0x8c            /* w GPa Internal Active Register Control */
44 #define SCR_GPA_IARLCR  0x90            /* w GPa Internal Active Register Level Control */
45 #define SCR_GPA_BCR     0x94            /* w GPa Buffer Control */
46 #define SCR_CCR         0x98            /* w Clock Control      */
47 #define SCR_PLL2CR      0x9a            /* w PLL2 Control       */
48 #define SCR_PLL1CR      0x9c            /* l PLL1 Control       */
49 #define SCR_DIARCR      0xa0            /* b Device Internal Active Register Control */
50 #define SCR_DBOCR       0xa1            /* b Device Buffer Off Control */
51 #define SCR_FER         0xe0            /* b Function Enable    */
52 #define SCR_MCR         0xe4            /* w Mode Control       */
53 #define SCR_CONFIG      0xfc            /* b Configuration Control */
54 #define SCR_DEBUG       0xff            /* b Debug              */
55
56 #define SCR_CCR_CK32K   BIT(0)
57 #define SCR_CCR_USBCK   BIT(1)
58 #define SCR_CCR_UNK1    BIT(4)
59 #define SCR_CCR_MCLK_MASK       (7 << 8)
60 #define SCR_CCR_MCLK_OFF        (0 << 8)
61 #define SCR_CCR_MCLK_12 (1 << 8)
62 #define SCR_CCR_MCLK_24 (2 << 8)
63 #define SCR_CCR_MCLK_48 (3 << 8)
64 #define SCR_CCR_HCLK_MASK       (3 << 12)
65 #define SCR_CCR_HCLK_24 (0 << 12)
66 #define SCR_CCR_HCLK_48 (1 << 12)
67
68 #define SCR_FER_USBEN           BIT(0)  /* USB host enable */
69 #define SCR_FER_LCDCVEN         BIT(1)  /* polysilicon TFT enable */
70 #define SCR_FER_SLCDEN          BIT(2)  /* SLCD enable */
71
72 #define SCR_MCR_RDY_MASK                (3 << 0)
73 #define SCR_MCR_RDY_OPENDRAIN   (0 << 0)
74 #define SCR_MCR_RDY_TRISTATE    (1 << 0)
75 #define SCR_MCR_RDY_PUSHPULL    (2 << 0)
76 #define SCR_MCR_RDY_UNK         BIT(2)
77 #define SCR_MCR_RDY_EN          BIT(3)
78 #define SCR_MCR_INT_MASK                (3 << 4)
79 #define SCR_MCR_INT_OPENDRAIN   (0 << 4)
80 #define SCR_MCR_INT_TRISTATE    (1 << 4)
81 #define SCR_MCR_INT_PUSHPULL    (2 << 4)
82 #define SCR_MCR_INT_UNK         BIT(6)
83 #define SCR_MCR_INT_EN          BIT(7)
84 /* bits 8 - 16 are unknown */
85
86 #define TC_GPIO_BIT(i)          (1 << (i & 0x7))
87
88 /*--------------------------------------------------------------------------*/
89
90 struct tc6393xb {
91         void __iomem            *scr;
92
93         struct gpio_chip        gpio;
94
95         struct clk              *clk; /* 3,6 Mhz */
96
97         spinlock_t              lock; /* protects RMW cycles */
98
99         struct {
100                 u8              fer;
101                 u16             ccr;
102                 u8              gpi_bcr[3];
103                 u8              gpo_dsr[3];
104                 u8              gpo_doecr[3];
105         } suspend_state;
106
107         struct resource         rscr;
108         struct resource         *iomem;
109         int                     irq;
110         int                     irq_base;
111 };
112
113 enum {
114         TC6393XB_CELL_NAND,
115         TC6393XB_CELL_MMC,
116         TC6393XB_CELL_OHCI,
117         TC6393XB_CELL_FB,
118 };
119
120 /*--------------------------------------------------------------------------*/
121
122 static int tc6393xb_nand_enable(struct platform_device *nand)
123 {
124         struct platform_device *dev = to_platform_device(nand->dev.parent);
125         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
126         unsigned long flags;
127
128         spin_lock_irqsave(&tc6393xb->lock, flags);
129
130         /* SMD buffer on */
131         dev_dbg(&dev->dev, "SMD buffer on\n");
132         tmio_iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1));
133
134         spin_unlock_irqrestore(&tc6393xb->lock, flags);
135
136         return 0;
137 }
138
139 static struct tmio_mmc_data tc6393xb_mmc_data = {
140         .hclk = 24000000,
141 };
142
143 static struct resource __devinitdata tc6393xb_nand_resources[] = {
144         {
145                 .start  = 0x1000,
146                 .end    = 0x1007,
147                 .flags  = IORESOURCE_MEM,
148         },
149         {
150                 .start  = 0x0100,
151                 .end    = 0x01ff,
152                 .flags  = IORESOURCE_MEM,
153         },
154         {
155                 .start  = IRQ_TC6393_NAND,
156                 .end    = IRQ_TC6393_NAND,
157                 .flags  = IORESOURCE_IRQ,
158         },
159 };
160
161 static struct resource __devinitdata tc6393xb_mmc_resources[] = {
162         {
163                 .start  = 0x800,
164                 .end    = 0x9ff,
165                 .flags  = IORESOURCE_MEM,
166         },
167         {
168                 .start  = 0x200,
169                 .end    = 0x2ff,
170                 .flags  = IORESOURCE_MEM,
171         },
172         {
173                 .start  = IRQ_TC6393_MMC,
174                 .end    = IRQ_TC6393_MMC,
175                 .flags  = IORESOURCE_IRQ,
176         },
177 };
178
179 static const struct resource tc6393xb_ohci_resources[] = {
180         {
181                 .start  = 0x3000,
182                 .end    = 0x31ff,
183                 .flags  = IORESOURCE_MEM,
184         },
185         {
186                 .start  = 0x0300,
187                 .end    = 0x03ff,
188                 .flags  = IORESOURCE_MEM,
189         },
190         {
191                 .start  = 0x010000,
192                 .end    = 0x017fff,
193                 .flags  = IORESOURCE_MEM,
194         },
195         {
196                 .start  = 0x018000,
197                 .end    = 0x01ffff,
198                 .flags  = IORESOURCE_MEM,
199         },
200         {
201                 .start  = IRQ_TC6393_OHCI,
202                 .end    = IRQ_TC6393_OHCI,
203                 .flags  = IORESOURCE_IRQ,
204         },
205 };
206
207 static struct resource __devinitdata tc6393xb_fb_resources[] = {
208         {
209                 .start  = 0x5000,
210                 .end    = 0x51ff,
211                 .flags  = IORESOURCE_MEM,
212         },
213         {
214                 .start  = 0x0500,
215                 .end    = 0x05ff,
216                 .flags  = IORESOURCE_MEM,
217         },
218         {
219                 .start  = 0x100000,
220                 .end    = 0x1fffff,
221                 .flags  = IORESOURCE_MEM,
222         },
223         {
224                 .start  = IRQ_TC6393_FB,
225                 .end    = IRQ_TC6393_FB,
226                 .flags  = IORESOURCE_IRQ,
227         },
228 };
229
230 static int tc6393xb_ohci_enable(struct platform_device *dev)
231 {
232         struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
233         unsigned long flags;
234         u16 ccr;
235         u8 fer;
236
237         spin_lock_irqsave(&tc6393xb->lock, flags);
238
239         ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
240         ccr |= SCR_CCR_USBCK;
241         tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
242
243         fer = tmio_ioread8(tc6393xb->scr + SCR_FER);
244         fer |= SCR_FER_USBEN;
245         tmio_iowrite8(fer, tc6393xb->scr + SCR_FER);
246
247         spin_unlock_irqrestore(&tc6393xb->lock, flags);
248
249         return 0;
250 }
251
252 static int tc6393xb_ohci_disable(struct platform_device *dev)
253 {
254         struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
255         unsigned long flags;
256         u16 ccr;
257         u8 fer;
258
259         spin_lock_irqsave(&tc6393xb->lock, flags);
260
261         fer = tmio_ioread8(tc6393xb->scr + SCR_FER);
262         fer &= ~SCR_FER_USBEN;
263         tmio_iowrite8(fer, tc6393xb->scr + SCR_FER);
264
265         ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
266         ccr &= ~SCR_CCR_USBCK;
267         tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
268
269         spin_unlock_irqrestore(&tc6393xb->lock, flags);
270
271         return 0;
272 }
273
274 static int tc6393xb_fb_enable(struct platform_device *dev)
275 {
276         struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
277         unsigned long flags;
278         u16 ccr;
279
280         spin_lock_irqsave(&tc6393xb->lock, flags);
281
282         ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
283         ccr &= ~SCR_CCR_MCLK_MASK;
284         ccr |= SCR_CCR_MCLK_48;
285         tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
286
287         spin_unlock_irqrestore(&tc6393xb->lock, flags);
288
289         return 0;
290 }
291
292 static int tc6393xb_fb_disable(struct platform_device *dev)
293 {
294         struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
295         unsigned long flags;
296         u16 ccr;
297
298         spin_lock_irqsave(&tc6393xb->lock, flags);
299
300         ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
301         ccr &= ~SCR_CCR_MCLK_MASK;
302         ccr |= SCR_CCR_MCLK_OFF;
303         tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
304
305         spin_unlock_irqrestore(&tc6393xb->lock, flags);
306
307         return 0;
308 }
309
310 int tc6393xb_lcd_set_power(struct platform_device *fb, bool on)
311 {
312         struct platform_device *dev = to_platform_device(fb->dev.parent);
313         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
314         u8 fer;
315         unsigned long flags;
316
317         spin_lock_irqsave(&tc6393xb->lock, flags);
318
319         fer = ioread8(tc6393xb->scr + SCR_FER);
320         if (on)
321                 fer |= SCR_FER_SLCDEN;
322         else
323                 fer &= ~SCR_FER_SLCDEN;
324         iowrite8(fer, tc6393xb->scr + SCR_FER);
325
326         spin_unlock_irqrestore(&tc6393xb->lock, flags);
327
328         return 0;
329 }
330 EXPORT_SYMBOL(tc6393xb_lcd_set_power);
331
332 int tc6393xb_lcd_mode(struct platform_device *fb,
333                                         const struct fb_videomode *mode) {
334         struct platform_device *dev = to_platform_device(fb->dev.parent);
335         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
336         unsigned long flags;
337
338         spin_lock_irqsave(&tc6393xb->lock, flags);
339
340         iowrite16(mode->pixclock, tc6393xb->scr + SCR_PLL1CR + 0);
341         iowrite16(mode->pixclock >> 16, tc6393xb->scr + SCR_PLL1CR + 2);
342
343         spin_unlock_irqrestore(&tc6393xb->lock, flags);
344
345         return 0;
346 }
347 EXPORT_SYMBOL(tc6393xb_lcd_mode);
348
349 static struct mfd_cell __devinitdata tc6393xb_cells[] = {
350         [TC6393XB_CELL_NAND] = {
351                 .name = "tmio-nand",
352                 .enable = tc6393xb_nand_enable,
353                 .num_resources = ARRAY_SIZE(tc6393xb_nand_resources),
354                 .resources = tc6393xb_nand_resources,
355         },
356         [TC6393XB_CELL_MMC] = {
357                 .name = "tmio-mmc",
358                 .driver_data = &tc6393xb_mmc_data,
359                 .num_resources = ARRAY_SIZE(tc6393xb_mmc_resources),
360                 .resources = tc6393xb_mmc_resources,
361         },
362         [TC6393XB_CELL_OHCI] = {
363                 .name = "tmio-ohci",
364                 .num_resources = ARRAY_SIZE(tc6393xb_ohci_resources),
365                 .resources = tc6393xb_ohci_resources,
366                 .enable = tc6393xb_ohci_enable,
367                 .suspend = tc6393xb_ohci_disable,
368                 .resume = tc6393xb_ohci_enable,
369                 .disable = tc6393xb_ohci_disable,
370         },
371         [TC6393XB_CELL_FB] = {
372                 .name = "tmio-fb",
373                 .num_resources = ARRAY_SIZE(tc6393xb_fb_resources),
374                 .resources = tc6393xb_fb_resources,
375                 .enable = tc6393xb_fb_enable,
376                 .suspend = tc6393xb_fb_disable,
377                 .resume = tc6393xb_fb_enable,
378                 .disable = tc6393xb_fb_disable,
379         },
380 };
381
382 /*--------------------------------------------------------------------------*/
383
384 static int tc6393xb_gpio_get(struct gpio_chip *chip,
385                 unsigned offset)
386 {
387         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
388
389         /* XXX: does dsr also represent inputs? */
390         return tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8))
391                 & TC_GPIO_BIT(offset);
392 }
393
394 static void __tc6393xb_gpio_set(struct gpio_chip *chip,
395                 unsigned offset, int value)
396 {
397         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
398         u8  dsr;
399
400         dsr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8));
401         if (value)
402                 dsr |= TC_GPIO_BIT(offset);
403         else
404                 dsr &= ~TC_GPIO_BIT(offset);
405
406         tmio_iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8));
407 }
408
409 static void tc6393xb_gpio_set(struct gpio_chip *chip,
410                 unsigned offset, int value)
411 {
412         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
413         unsigned long flags;
414
415         spin_lock_irqsave(&tc6393xb->lock, flags);
416
417         __tc6393xb_gpio_set(chip, offset, value);
418
419         spin_unlock_irqrestore(&tc6393xb->lock, flags);
420 }
421
422 static int tc6393xb_gpio_direction_input(struct gpio_chip *chip,
423                         unsigned offset)
424 {
425         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
426         unsigned long flags;
427         u8 doecr;
428
429         spin_lock_irqsave(&tc6393xb->lock, flags);
430
431         doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
432         doecr &= ~TC_GPIO_BIT(offset);
433         tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
434
435         spin_unlock_irqrestore(&tc6393xb->lock, flags);
436
437         return 0;
438 }
439
440 static int tc6393xb_gpio_direction_output(struct gpio_chip *chip,
441                         unsigned offset, int value)
442 {
443         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
444         unsigned long flags;
445         u8 doecr;
446
447         spin_lock_irqsave(&tc6393xb->lock, flags);
448
449         __tc6393xb_gpio_set(chip, offset, value);
450
451         doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
452         doecr |= TC_GPIO_BIT(offset);
453         tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
454
455         spin_unlock_irqrestore(&tc6393xb->lock, flags);
456
457         return 0;
458 }
459
460 static int tc6393xb_register_gpio(struct tc6393xb *tc6393xb, int gpio_base)
461 {
462         tc6393xb->gpio.label = "tc6393xb";
463         tc6393xb->gpio.base = gpio_base;
464         tc6393xb->gpio.ngpio = 16;
465         tc6393xb->gpio.set = tc6393xb_gpio_set;
466         tc6393xb->gpio.get = tc6393xb_gpio_get;
467         tc6393xb->gpio.direction_input = tc6393xb_gpio_direction_input;
468         tc6393xb->gpio.direction_output = tc6393xb_gpio_direction_output;
469
470         return gpiochip_add(&tc6393xb->gpio);
471 }
472
473 /*--------------------------------------------------------------------------*/
474
475 static void
476 tc6393xb_irq(unsigned int irq, struct irq_desc *desc)
477 {
478         struct tc6393xb *tc6393xb = get_irq_data(irq);
479         unsigned int isr;
480         unsigned int i, irq_base;
481
482         irq_base = tc6393xb->irq_base;
483
484         while ((isr = tmio_ioread8(tc6393xb->scr + SCR_ISR) &
485                                 ~tmio_ioread8(tc6393xb->scr + SCR_IMR)))
486                 for (i = 0; i < TC6393XB_NR_IRQS; i++) {
487                         if (isr & (1 << i))
488                                 generic_handle_irq(irq_base + i);
489                 }
490 }
491
492 static void tc6393xb_irq_ack(unsigned int irq)
493 {
494 }
495
496 static void tc6393xb_irq_mask(unsigned int irq)
497 {
498         struct tc6393xb *tc6393xb = get_irq_chip_data(irq);
499         unsigned long flags;
500         u8 imr;
501
502         spin_lock_irqsave(&tc6393xb->lock, flags);
503         imr = tmio_ioread8(tc6393xb->scr + SCR_IMR);
504         imr |= 1 << (irq - tc6393xb->irq_base);
505         tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR);
506         spin_unlock_irqrestore(&tc6393xb->lock, flags);
507 }
508
509 static void tc6393xb_irq_unmask(unsigned int irq)
510 {
511         struct tc6393xb *tc6393xb = get_irq_chip_data(irq);
512         unsigned long flags;
513         u8 imr;
514
515         spin_lock_irqsave(&tc6393xb->lock, flags);
516         imr = tmio_ioread8(tc6393xb->scr + SCR_IMR);
517         imr &= ~(1 << (irq - tc6393xb->irq_base));
518         tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR);
519         spin_unlock_irqrestore(&tc6393xb->lock, flags);
520 }
521
522 static struct irq_chip tc6393xb_chip = {
523         .name   = "tc6393xb",
524         .ack    = tc6393xb_irq_ack,
525         .mask   = tc6393xb_irq_mask,
526         .unmask = tc6393xb_irq_unmask,
527 };
528
529 static void tc6393xb_attach_irq(struct platform_device *dev)
530 {
531         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
532         unsigned int irq, irq_base;
533
534         irq_base = tc6393xb->irq_base;
535
536         for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
537                 set_irq_chip(irq, &tc6393xb_chip);
538                 set_irq_chip_data(irq, tc6393xb);
539                 set_irq_handler(irq, handle_edge_irq);
540                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
541         }
542
543         set_irq_type(tc6393xb->irq, IRQ_TYPE_EDGE_FALLING);
544         set_irq_data(tc6393xb->irq, tc6393xb);
545         set_irq_chained_handler(tc6393xb->irq, tc6393xb_irq);
546 }
547
548 static void tc6393xb_detach_irq(struct platform_device *dev)
549 {
550         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
551         unsigned int irq, irq_base;
552
553         set_irq_chained_handler(tc6393xb->irq, NULL);
554         set_irq_data(tc6393xb->irq, NULL);
555
556         irq_base = tc6393xb->irq_base;
557
558         for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
559                 set_irq_flags(irq, 0);
560                 set_irq_chip(irq, NULL);
561                 set_irq_chip_data(irq, NULL);
562         }
563 }
564
565 /*--------------------------------------------------------------------------*/
566
567 static int __devinit tc6393xb_probe(struct platform_device *dev)
568 {
569         struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
570         struct tc6393xb *tc6393xb;
571         struct resource *iomem, *rscr;
572         int ret, temp;
573
574         iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
575         if (!iomem)
576                 return -EINVAL;
577
578         tc6393xb = kzalloc(sizeof *tc6393xb, GFP_KERNEL);
579         if (!tc6393xb) {
580                 ret = -ENOMEM;
581                 goto err_kzalloc;
582         }
583
584         spin_lock_init(&tc6393xb->lock);
585
586         platform_set_drvdata(dev, tc6393xb);
587
588         ret = platform_get_irq(dev, 0);
589         if (ret >= 0)
590                 tc6393xb->irq = ret;
591         else
592                 goto err_noirq;
593
594         tc6393xb->iomem = iomem;
595         tc6393xb->irq_base = tcpd->irq_base;
596
597         tc6393xb->clk = clk_get(&dev->dev, "CLK_CK3P6MI");
598         if (IS_ERR(tc6393xb->clk)) {
599                 ret = PTR_ERR(tc6393xb->clk);
600                 goto err_clk_get;
601         }
602
603         rscr = &tc6393xb->rscr;
604         rscr->name = "tc6393xb-core";
605         rscr->start = iomem->start;
606         rscr->end = iomem->start + 0xff;
607         rscr->flags = IORESOURCE_MEM;
608
609         ret = request_resource(iomem, rscr);
610         if (ret)
611                 goto err_request_scr;
612
613         tc6393xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1);
614         if (!tc6393xb->scr) {
615                 ret = -ENOMEM;
616                 goto err_ioremap;
617         }
618
619         ret = clk_enable(tc6393xb->clk);
620         if (ret)
621                 goto err_clk_enable;
622
623         ret = tcpd->enable(dev);
624         if (ret)
625                 goto err_enable;
626
627         iowrite8(0,                             tc6393xb->scr + SCR_FER);
628         iowrite16(tcpd->scr_pll2cr,             tc6393xb->scr + SCR_PLL2CR);
629         iowrite16(SCR_CCR_UNK1 | SCR_CCR_HCLK_48,
630                                                 tc6393xb->scr + SCR_CCR);
631         iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN |
632                   SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN |
633                   BIT(15),                      tc6393xb->scr + SCR_MCR);
634         iowrite16(tcpd->scr_gper,               tc6393xb->scr + SCR_GPER);
635         iowrite8(0,                             tc6393xb->scr + SCR_IRR);
636         iowrite8(0xbf,                          tc6393xb->scr + SCR_IMR);
637
638         printk(KERN_INFO "Toshiba tc6393xb revision %d at 0x%08lx, irq %d\n",
639                         tmio_ioread8(tc6393xb->scr + SCR_REVID),
640                         (unsigned long) iomem->start, tc6393xb->irq);
641
642         tc6393xb->gpio.base = -1;
643
644         if (tcpd->gpio_base >= 0) {
645                 ret = tc6393xb_register_gpio(tc6393xb, tcpd->gpio_base);
646                 if (ret)
647                         goto err_gpio_add;
648         }
649
650         tc6393xb_attach_irq(dev);
651
652         if (tcpd->setup) {
653                 ret = tcpd->setup(dev);
654                 if (ret)
655                         goto err_setup;
656         }
657
658         tc6393xb_cells[TC6393XB_CELL_NAND].driver_data = tcpd->nand_data;
659         tc6393xb_cells[TC6393XB_CELL_NAND].platform_data =
660                 &tc6393xb_cells[TC6393XB_CELL_NAND];
661         tc6393xb_cells[TC6393XB_CELL_NAND].data_size =
662                 sizeof(tc6393xb_cells[TC6393XB_CELL_NAND]);
663
664         tc6393xb_cells[TC6393XB_CELL_MMC].platform_data =
665                 &tc6393xb_cells[TC6393XB_CELL_MMC];
666         tc6393xb_cells[TC6393XB_CELL_MMC].data_size =
667                 sizeof(tc6393xb_cells[TC6393XB_CELL_MMC]);
668
669         tc6393xb_cells[TC6393XB_CELL_OHCI].platform_data =
670                 &tc6393xb_cells[TC6393XB_CELL_OHCI];
671         tc6393xb_cells[TC6393XB_CELL_OHCI].data_size =
672                 sizeof(tc6393xb_cells[TC6393XB_CELL_OHCI]);
673
674         tc6393xb_cells[TC6393XB_CELL_FB].driver_data = tcpd->fb_data;
675         tc6393xb_cells[TC6393XB_CELL_FB].platform_data =
676                 &tc6393xb_cells[TC6393XB_CELL_FB];
677         tc6393xb_cells[TC6393XB_CELL_FB].data_size =
678                 sizeof(tc6393xb_cells[TC6393XB_CELL_FB]);
679
680         ret = mfd_add_devices(&dev->dev, dev->id,
681                         tc6393xb_cells, ARRAY_SIZE(tc6393xb_cells),
682                         iomem, tcpd->irq_base);
683
684         if (!ret)
685                 return 0;
686
687         if (tcpd->teardown)
688                 tcpd->teardown(dev);
689
690 err_setup:
691         tc6393xb_detach_irq(dev);
692
693 err_gpio_add:
694         if (tc6393xb->gpio.base != -1)
695                 temp = gpiochip_remove(&tc6393xb->gpio);
696         tcpd->disable(dev);
697 err_clk_enable:
698         clk_disable(tc6393xb->clk);
699 err_enable:
700         iounmap(tc6393xb->scr);
701 err_ioremap:
702         release_resource(&tc6393xb->rscr);
703 err_request_scr:
704         clk_put(tc6393xb->clk);
705 err_noirq:
706 err_clk_get:
707         kfree(tc6393xb);
708 err_kzalloc:
709         return ret;
710 }
711
712 static int __devexit tc6393xb_remove(struct platform_device *dev)
713 {
714         struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
715         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
716         int ret;
717
718         mfd_remove_devices(&dev->dev);
719
720         if (tcpd->teardown)
721                 tcpd->teardown(dev);
722
723         tc6393xb_detach_irq(dev);
724
725         if (tc6393xb->gpio.base != -1) {
726                 ret = gpiochip_remove(&tc6393xb->gpio);
727                 if (ret) {
728                         dev_err(&dev->dev, "Can't remove gpio chip: %d\n", ret);
729                         return ret;
730                 }
731         }
732
733         ret = tcpd->disable(dev);
734         clk_disable(tc6393xb->clk);
735         iounmap(tc6393xb->scr);
736         release_resource(&tc6393xb->rscr);
737         platform_set_drvdata(dev, NULL);
738         clk_put(tc6393xb->clk);
739         kfree(tc6393xb);
740
741         return ret;
742 }
743
744 #ifdef CONFIG_PM
745 static int tc6393xb_suspend(struct platform_device *dev, pm_message_t state)
746 {
747         struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
748         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
749         int i, ret;
750
751         tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR);
752         tc6393xb->suspend_state.fer = ioread8(tc6393xb->scr + SCR_FER);
753
754         for (i = 0; i < 3; i++) {
755                 tc6393xb->suspend_state.gpo_dsr[i] =
756                         ioread8(tc6393xb->scr + SCR_GPO_DSR(i));
757                 tc6393xb->suspend_state.gpo_doecr[i] =
758                         ioread8(tc6393xb->scr + SCR_GPO_DOECR(i));
759                 tc6393xb->suspend_state.gpi_bcr[i] =
760                         ioread8(tc6393xb->scr + SCR_GPI_BCR(i));
761         }
762         ret = tcpd->suspend(dev);
763         clk_disable(tc6393xb->clk);
764
765         return ret;
766 }
767
768 static int tc6393xb_resume(struct platform_device *dev)
769 {
770         struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
771         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
772         int ret;
773         int i;
774
775         clk_enable(tc6393xb->clk);
776
777         ret = tcpd->resume(dev);
778         if (ret)
779                 return ret;
780
781         if (!tcpd->resume_restore)
782                 return 0;
783
784         iowrite8(tc6393xb->suspend_state.fer,   tc6393xb->scr + SCR_FER);
785         iowrite16(tcpd->scr_pll2cr,             tc6393xb->scr + SCR_PLL2CR);
786         iowrite16(tc6393xb->suspend_state.ccr,  tc6393xb->scr + SCR_CCR);
787         iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN |
788                   SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN |
789                   BIT(15),                      tc6393xb->scr + SCR_MCR);
790         iowrite16(tcpd->scr_gper,               tc6393xb->scr + SCR_GPER);
791         iowrite8(0,                             tc6393xb->scr + SCR_IRR);
792         iowrite8(0xbf,                          tc6393xb->scr + SCR_IMR);
793
794         for (i = 0; i < 3; i++) {
795                 iowrite8(tc6393xb->suspend_state.gpo_dsr[i],
796                                         tc6393xb->scr + SCR_GPO_DSR(i));
797                 iowrite8(tc6393xb->suspend_state.gpo_doecr[i],
798                                         tc6393xb->scr + SCR_GPO_DOECR(i));
799                 iowrite8(tc6393xb->suspend_state.gpi_bcr[i],
800                                         tc6393xb->scr + SCR_GPI_BCR(i));
801         }
802
803         return 0;
804 }
805 #else
806 #define tc6393xb_suspend NULL
807 #define tc6393xb_resume NULL
808 #endif
809
810 static struct platform_driver tc6393xb_driver = {
811         .probe = tc6393xb_probe,
812         .remove = __devexit_p(tc6393xb_remove),
813         .suspend = tc6393xb_suspend,
814         .resume = tc6393xb_resume,
815
816         .driver = {
817                 .name = "tc6393xb",
818                 .owner = THIS_MODULE,
819         },
820 };
821
822 static int __init tc6393xb_init(void)
823 {
824         return platform_driver_register(&tc6393xb_driver);
825 }
826
827 static void __exit tc6393xb_exit(void)
828 {
829         platform_driver_unregister(&tc6393xb_driver);
830 }
831
832 subsys_initcall(tc6393xb_init);
833 module_exit(tc6393xb_exit);
834
835 MODULE_LICENSE("GPL v2");
836 MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov and Dirk Opfer");
837 MODULE_DESCRIPTION("tc6393xb Toshiba Mobile IO Controller");
838 MODULE_ALIAS("platform:tc6393xb");