treewide: cleanup continuations and remove logging message whitespace
[linux-2.6.git] / drivers / message / fusion / mptbase.c
1 /*
2  *  linux/drivers/message/fusion/mptbase.c
3  *      This is the Fusion MPT base driver which supports multiple
4  *      (SCSI + LAN) specialized protocol drivers.
5  *      For use with LSI PCI chip/adapter(s)
6  *      running LSI Fusion MPT (Message Passing Technology) firmware.
7  *
8  *  Copyright (c) 1999-2008 LSI Corporation
9  *  (mailto:DL-MPTFusionLinux@lsi.com)
10  *
11  */
12 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
13 /*
14     This program is free software; you can redistribute it and/or modify
15     it under the terms of the GNU General Public License as published by
16     the Free Software Foundation; version 2 of the License.
17
18     This program is distributed in the hope that it will be useful,
19     but WITHOUT ANY WARRANTY; without even the implied warranty of
20     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21     GNU General Public License for more details.
22
23     NO WARRANTY
24     THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
25     CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
26     LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
27     MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
28     solely responsible for determining the appropriateness of using and
29     distributing the Program and assumes all risks associated with its
30     exercise of rights under this Agreement, including but not limited to
31     the risks and costs of program errors, damage to or loss of data,
32     programs or equipment, and unavailability or interruption of operations.
33
34     DISCLAIMER OF LIABILITY
35     NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
36     DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37     DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
38     ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
39     TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
40     USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
41     HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
42
43     You should have received a copy of the GNU General Public License
44     along with this program; if not, write to the Free Software
45     Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
46 */
47 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
48
49 #include <linux/kernel.h>
50 #include <linux/module.h>
51 #include <linux/errno.h>
52 #include <linux/init.h>
53 #include <linux/seq_file.h>
54 #include <linux/slab.h>
55 #include <linux/types.h>
56 #include <linux/pci.h>
57 #include <linux/kdev_t.h>
58 #include <linux/blkdev.h>
59 #include <linux/delay.h>
60 #include <linux/interrupt.h>            /* needed for in_interrupt() proto */
61 #include <linux/dma-mapping.h>
62 #include <asm/io.h>
63 #ifdef CONFIG_MTRR
64 #include <asm/mtrr.h>
65 #endif
66
67 #include "mptbase.h"
68 #include "lsi/mpi_log_fc.h"
69
70 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
71 #define my_NAME         "Fusion MPT base driver"
72 #define my_VERSION      MPT_LINUX_VERSION_COMMON
73 #define MYNAM           "mptbase"
74
75 MODULE_AUTHOR(MODULEAUTHOR);
76 MODULE_DESCRIPTION(my_NAME);
77 MODULE_LICENSE("GPL");
78 MODULE_VERSION(my_VERSION);
79
80 /*
81  *  cmd line parameters
82  */
83
84 static int mpt_msi_enable_spi;
85 module_param(mpt_msi_enable_spi, int, 0);
86 MODULE_PARM_DESC(mpt_msi_enable_spi,
87                  " Enable MSI Support for SPI controllers (default=0)");
88
89 static int mpt_msi_enable_fc;
90 module_param(mpt_msi_enable_fc, int, 0);
91 MODULE_PARM_DESC(mpt_msi_enable_fc,
92                  " Enable MSI Support for FC controllers (default=0)");
93
94 static int mpt_msi_enable_sas;
95 module_param(mpt_msi_enable_sas, int, 0);
96 MODULE_PARM_DESC(mpt_msi_enable_sas,
97                  " Enable MSI Support for SAS controllers (default=0)");
98
99 static int mpt_channel_mapping;
100 module_param(mpt_channel_mapping, int, 0);
101 MODULE_PARM_DESC(mpt_channel_mapping, " Mapping id's to channels (default=0)");
102
103 static int mpt_debug_level;
104 static int mpt_set_debug_level(const char *val, struct kernel_param *kp);
105 module_param_call(mpt_debug_level, mpt_set_debug_level, param_get_int,
106                   &mpt_debug_level, 0600);
107 MODULE_PARM_DESC(mpt_debug_level,
108                  " debug level - refer to mptdebug.h - (default=0)");
109
110 int mpt_fwfault_debug;
111 EXPORT_SYMBOL(mpt_fwfault_debug);
112 module_param(mpt_fwfault_debug, int, 0600);
113 MODULE_PARM_DESC(mpt_fwfault_debug,
114                  "Enable detection of Firmware fault and halt Firmware on fault - (default=0)");
115
116 static char     MptCallbacksName[MPT_MAX_PROTOCOL_DRIVERS][50];
117
118 #ifdef MFCNT
119 static int mfcounter = 0;
120 #define PRINT_MF_COUNT 20000
121 #endif
122
123 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
124 /*
125  *  Public data...
126  */
127
128 #define WHOINIT_UNKNOWN         0xAA
129
130 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
131 /*
132  *  Private data...
133  */
134                                         /* Adapter link list */
135 LIST_HEAD(ioc_list);
136                                         /* Callback lookup table */
137 static MPT_CALLBACK              MptCallbacks[MPT_MAX_PROTOCOL_DRIVERS];
138                                         /* Protocol driver class lookup table */
139 static int                       MptDriverClass[MPT_MAX_PROTOCOL_DRIVERS];
140                                         /* Event handler lookup table */
141 static MPT_EVHANDLER             MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
142                                         /* Reset handler lookup table */
143 static MPT_RESETHANDLER          MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
144 static struct mpt_pci_driver    *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
145
146 #ifdef CONFIG_PROC_FS
147 static struct proc_dir_entry    *mpt_proc_root_dir;
148 #endif
149
150 /*
151  *  Driver Callback Index's
152  */
153 static u8 mpt_base_index = MPT_MAX_PROTOCOL_DRIVERS;
154 static u8 last_drv_idx;
155
156 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
157 /*
158  *  Forward protos...
159  */
160 static irqreturn_t mpt_interrupt(int irq, void *bus_id);
161 static int      mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req,
162                 MPT_FRAME_HDR *reply);
163 static int      mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
164                         u32 *req, int replyBytes, u16 *u16reply, int maxwait,
165                         int sleepFlag);
166 static int      mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
167 static void     mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
168 static void     mpt_adapter_disable(MPT_ADAPTER *ioc);
169 static void     mpt_adapter_dispose(MPT_ADAPTER *ioc);
170
171 static void     MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
172 static int      MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
173 static int      GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
174 static int      GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
175 static int      SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
176 static int      SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
177 static int      mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
178 static int      mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
179 static int      mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
180 static int      KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
181 static int      SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
182 static int      PrimeIocFifos(MPT_ADAPTER *ioc);
183 static int      WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
184 static int      WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
185 static int      WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
186 static int      GetLanConfigPages(MPT_ADAPTER *ioc);
187 static int      GetIoUnitPage2(MPT_ADAPTER *ioc);
188 int             mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
189 static int      mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
190 static int      mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
191 static void     mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
192 static void     mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
193 static void     mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc);
194 static int      SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch,
195         int sleepFlag);
196 static int      SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
197 static int      mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
198 static int      mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
199
200 #ifdef CONFIG_PROC_FS
201 static const struct file_operations mpt_summary_proc_fops;
202 static const struct file_operations mpt_version_proc_fops;
203 static const struct file_operations mpt_iocinfo_proc_fops;
204 #endif
205 static void     mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
206
207 static int      ProcessEventNotification(MPT_ADAPTER *ioc,
208                 EventNotificationReply_t *evReply, int *evHandlers);
209 static void     mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
210 static void     mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
211 static void     mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
212 static void     mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info , u8 cb_idx);
213 static int      mpt_read_ioc_pg_3(MPT_ADAPTER *ioc);
214 static void     mpt_inactive_raid_list_free(MPT_ADAPTER *ioc);
215
216 /* module entry point */
217 static int  __init    fusion_init  (void);
218 static void __exit    fusion_exit  (void);
219
220 #define CHIPREG_READ32(addr)            readl_relaxed(addr)
221 #define CHIPREG_READ32_dmasync(addr)    readl(addr)
222 #define CHIPREG_WRITE32(addr,val)       writel(val, addr)
223 #define CHIPREG_PIO_WRITE32(addr,val)   outl(val, (unsigned long)addr)
224 #define CHIPREG_PIO_READ32(addr)        inl((unsigned long)addr)
225
226 static void
227 pci_disable_io_access(struct pci_dev *pdev)
228 {
229         u16 command_reg;
230
231         pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
232         command_reg &= ~1;
233         pci_write_config_word(pdev, PCI_COMMAND, command_reg);
234 }
235
236 static void
237 pci_enable_io_access(struct pci_dev *pdev)
238 {
239         u16 command_reg;
240
241         pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
242         command_reg |= 1;
243         pci_write_config_word(pdev, PCI_COMMAND, command_reg);
244 }
245
246 static int mpt_set_debug_level(const char *val, struct kernel_param *kp)
247 {
248         int ret = param_set_int(val, kp);
249         MPT_ADAPTER *ioc;
250
251         if (ret)
252                 return ret;
253
254         list_for_each_entry(ioc, &ioc_list, list)
255                 ioc->debug_level = mpt_debug_level;
256         return 0;
257 }
258
259 /**
260  *      mpt_get_cb_idx - obtain cb_idx for registered driver
261  *      @dclass: class driver enum
262  *
263  *      Returns cb_idx, or zero means it wasn't found
264  **/
265 static u8
266 mpt_get_cb_idx(MPT_DRIVER_CLASS dclass)
267 {
268         u8 cb_idx;
269
270         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--)
271                 if (MptDriverClass[cb_idx] == dclass)
272                         return cb_idx;
273         return 0;
274 }
275
276 /**
277  * mpt_is_discovery_complete - determine if discovery has completed
278  * @ioc: per adatper instance
279  *
280  * Returns 1 when discovery completed, else zero.
281  */
282 static int
283 mpt_is_discovery_complete(MPT_ADAPTER *ioc)
284 {
285         ConfigExtendedPageHeader_t hdr;
286         CONFIGPARMS cfg;
287         SasIOUnitPage0_t *buffer;
288         dma_addr_t dma_handle;
289         int rc = 0;
290
291         memset(&hdr, 0, sizeof(ConfigExtendedPageHeader_t));
292         memset(&cfg, 0, sizeof(CONFIGPARMS));
293         hdr.PageVersion = MPI_SASIOUNITPAGE0_PAGEVERSION;
294         hdr.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
295         hdr.ExtPageType = MPI_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
296         cfg.cfghdr.ehdr = &hdr;
297         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
298
299         if ((mpt_config(ioc, &cfg)))
300                 goto out;
301         if (!hdr.ExtPageLength)
302                 goto out;
303
304         buffer = pci_alloc_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
305             &dma_handle);
306         if (!buffer)
307                 goto out;
308
309         cfg.physAddr = dma_handle;
310         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
311
312         if ((mpt_config(ioc, &cfg)))
313                 goto out_free_consistent;
314
315         if (!(buffer->PhyData[0].PortFlags &
316             MPI_SAS_IOUNIT0_PORT_FLAGS_DISCOVERY_IN_PROGRESS))
317                 rc = 1;
318
319  out_free_consistent:
320         pci_free_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
321             buffer, dma_handle);
322  out:
323         return rc;
324 }
325
326 /**
327  *      mpt_fault_reset_work - work performed on workq after ioc fault
328  *      @work: input argument, used to derive ioc
329  *
330 **/
331 static void
332 mpt_fault_reset_work(struct work_struct *work)
333 {
334         MPT_ADAPTER     *ioc =
335             container_of(work, MPT_ADAPTER, fault_reset_work.work);
336         u32              ioc_raw_state;
337         int              rc;
338         unsigned long    flags;
339
340         if (ioc->ioc_reset_in_progress || !ioc->active)
341                 goto out;
342
343         ioc_raw_state = mpt_GetIocState(ioc, 0);
344         if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
345                 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state (%04xh)!!!\n",
346                        ioc->name, ioc_raw_state & MPI_DOORBELL_DATA_MASK);
347                 printk(MYIOC_s_WARN_FMT "Issuing HardReset from %s!!\n",
348                        ioc->name, __func__);
349                 rc = mpt_HardResetHandler(ioc, CAN_SLEEP);
350                 printk(MYIOC_s_WARN_FMT "%s: HardReset: %s\n", ioc->name,
351                        __func__, (rc == 0) ? "success" : "failed");
352                 ioc_raw_state = mpt_GetIocState(ioc, 0);
353                 if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT)
354                         printk(MYIOC_s_WARN_FMT "IOC is in FAULT state after "
355                             "reset (%04xh)\n", ioc->name, ioc_raw_state &
356                             MPI_DOORBELL_DATA_MASK);
357         } else if (ioc->bus_type == SAS && ioc->sas_discovery_quiesce_io) {
358                 if ((mpt_is_discovery_complete(ioc))) {
359                         devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT "clearing "
360                             "discovery_quiesce_io flag\n", ioc->name));
361                         ioc->sas_discovery_quiesce_io = 0;
362                 }
363         }
364
365  out:
366         /*
367          * Take turns polling alternate controller
368          */
369         if (ioc->alt_ioc)
370                 ioc = ioc->alt_ioc;
371
372         /* rearm the timer */
373         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
374         if (ioc->reset_work_q)
375                 queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
376                         msecs_to_jiffies(MPT_POLLING_INTERVAL));
377         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
378 }
379
380
381 /*
382  *  Process turbo (context) reply...
383  */
384 static void
385 mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
386 {
387         MPT_FRAME_HDR *mf = NULL;
388         MPT_FRAME_HDR *mr = NULL;
389         u16 req_idx = 0;
390         u8 cb_idx;
391
392         dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got TURBO reply req_idx=%08x\n",
393                                 ioc->name, pa));
394
395         switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) {
396         case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
397                 req_idx = pa & 0x0000FFFF;
398                 cb_idx = (pa & 0x00FF0000) >> 16;
399                 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
400                 break;
401         case MPI_CONTEXT_REPLY_TYPE_LAN:
402                 cb_idx = mpt_get_cb_idx(MPTLAN_DRIVER);
403                 /*
404                  *  Blind set of mf to NULL here was fatal
405                  *  after lan_reply says "freeme"
406                  *  Fix sort of combined with an optimization here;
407                  *  added explicit check for case where lan_reply
408                  *  was just returning 1 and doing nothing else.
409                  *  For this case skip the callback, but set up
410                  *  proper mf value first here:-)
411                  */
412                 if ((pa & 0x58000000) == 0x58000000) {
413                         req_idx = pa & 0x0000FFFF;
414                         mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
415                         mpt_free_msg_frame(ioc, mf);
416                         mb();
417                         return;
418                         break;
419                 }
420                 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
421                 break;
422         case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
423                 cb_idx = mpt_get_cb_idx(MPTSTM_DRIVER);
424                 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
425                 break;
426         default:
427                 cb_idx = 0;
428                 BUG();
429         }
430
431         /*  Check for (valid) IO callback!  */
432         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
433                 MptCallbacks[cb_idx] == NULL) {
434                 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
435                                 __func__, ioc->name, cb_idx);
436                 goto out;
437         }
438
439         if (MptCallbacks[cb_idx](ioc, mf, mr))
440                 mpt_free_msg_frame(ioc, mf);
441  out:
442         mb();
443 }
444
445 static void
446 mpt_reply(MPT_ADAPTER *ioc, u32 pa)
447 {
448         MPT_FRAME_HDR   *mf;
449         MPT_FRAME_HDR   *mr;
450         u16              req_idx;
451         u8               cb_idx;
452         int              freeme;
453
454         u32 reply_dma_low;
455         u16 ioc_stat;
456
457         /* non-TURBO reply!  Hmmm, something may be up...
458          *  Newest turbo reply mechanism; get address
459          *  via left shift 1 (get rid of MPI_ADDRESS_REPLY_A_BIT)!
460          */
461
462         /* Map DMA address of reply header to cpu address.
463          * pa is 32 bits - but the dma address may be 32 or 64 bits
464          * get offset based only only the low addresses
465          */
466
467         reply_dma_low = (pa <<= 1);
468         mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
469                          (reply_dma_low - ioc->reply_frames_low_dma));
470
471         req_idx = le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx);
472         cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
473         mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
474
475         dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
476                         ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
477         DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mr);
478
479          /*  Check/log IOC log info
480          */
481         ioc_stat = le16_to_cpu(mr->u.reply.IOCStatus);
482         if (ioc_stat & MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
483                 u32      log_info = le32_to_cpu(mr->u.reply.IOCLogInfo);
484                 if (ioc->bus_type == FC)
485                         mpt_fc_log_info(ioc, log_info);
486                 else if (ioc->bus_type == SPI)
487                         mpt_spi_log_info(ioc, log_info);
488                 else if (ioc->bus_type == SAS)
489                         mpt_sas_log_info(ioc, log_info, cb_idx);
490         }
491
492         if (ioc_stat & MPI_IOCSTATUS_MASK)
493                 mpt_iocstatus_info(ioc, (u32)ioc_stat, mf);
494
495         /*  Check for (valid) IO callback!  */
496         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
497                 MptCallbacks[cb_idx] == NULL) {
498                 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
499                                 __func__, ioc->name, cb_idx);
500                 freeme = 0;
501                 goto out;
502         }
503
504         freeme = MptCallbacks[cb_idx](ioc, mf, mr);
505
506  out:
507         /*  Flush (non-TURBO) reply with a WRITE!  */
508         CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
509
510         if (freeme)
511                 mpt_free_msg_frame(ioc, mf);
512         mb();
513 }
514
515 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
516 /**
517  *      mpt_interrupt - MPT adapter (IOC) specific interrupt handler.
518  *      @irq: irq number (not used)
519  *      @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
520  *
521  *      This routine is registered via the request_irq() kernel API call,
522  *      and handles all interrupts generated from a specific MPT adapter
523  *      (also referred to as a IO Controller or IOC).
524  *      This routine must clear the interrupt from the adapter and does
525  *      so by reading the reply FIFO.  Multiple replies may be processed
526  *      per single call to this routine.
527  *
528  *      This routine handles register-level access of the adapter but
529  *      dispatches (calls) a protocol-specific callback routine to handle
530  *      the protocol-specific details of the MPT request completion.
531  */
532 static irqreturn_t
533 mpt_interrupt(int irq, void *bus_id)
534 {
535         MPT_ADAPTER *ioc = bus_id;
536         u32 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
537
538         if (pa == 0xFFFFFFFF)
539                 return IRQ_NONE;
540
541         /*
542          *  Drain the reply FIFO!
543          */
544         do {
545                 if (pa & MPI_ADDRESS_REPLY_A_BIT)
546                         mpt_reply(ioc, pa);
547                 else
548                         mpt_turbo_reply(ioc, pa);
549                 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
550         } while (pa != 0xFFFFFFFF);
551
552         return IRQ_HANDLED;
553 }
554
555 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
556 /**
557  *      mptbase_reply - MPT base driver's callback routine
558  *      @ioc: Pointer to MPT_ADAPTER structure
559  *      @req: Pointer to original MPT request frame
560  *      @reply: Pointer to MPT reply frame (NULL if TurboReply)
561  *
562  *      MPT base driver's callback routine; all base driver
563  *      "internal" request/reply processing is routed here.
564  *      Currently used for EventNotification and EventAck handling.
565  *
566  *      Returns 1 indicating original alloc'd request frame ptr
567  *      should be freed, or 0 if it shouldn't.
568  */
569 static int
570 mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply)
571 {
572         EventNotificationReply_t *pEventReply;
573         u8 event;
574         int evHandlers;
575         int freereq = 1;
576
577         switch (reply->u.hdr.Function) {
578         case MPI_FUNCTION_EVENT_NOTIFICATION:
579                 pEventReply = (EventNotificationReply_t *)reply;
580                 evHandlers = 0;
581                 ProcessEventNotification(ioc, pEventReply, &evHandlers);
582                 event = le32_to_cpu(pEventReply->Event) & 0xFF;
583                 if (pEventReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)
584                         freereq = 0;
585                 if (event != MPI_EVENT_EVENT_CHANGE)
586                         break;
587         case MPI_FUNCTION_CONFIG:
588         case MPI_FUNCTION_SAS_IO_UNIT_CONTROL:
589                 ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_COMMAND_GOOD;
590                 if (reply) {
591                         ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_RF_VALID;
592                         memcpy(ioc->mptbase_cmds.reply, reply,
593                             min(MPT_DEFAULT_FRAME_SIZE,
594                                 4 * reply->u.reply.MsgLength));
595                 }
596                 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_PENDING) {
597                         ioc->mptbase_cmds.status &= ~MPT_MGMT_STATUS_PENDING;
598                         complete(&ioc->mptbase_cmds.done);
599                 } else
600                         freereq = 0;
601                 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_FREE_MF)
602                         freereq = 1;
603                 break;
604         case MPI_FUNCTION_EVENT_ACK:
605                 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
606                     "EventAck reply received\n", ioc->name));
607                 break;
608         default:
609                 printk(MYIOC_s_ERR_FMT
610                     "Unexpected msg function (=%02Xh) reply received!\n",
611                     ioc->name, reply->u.hdr.Function);
612                 break;
613         }
614
615         /*
616          *      Conditionally tell caller to free the original
617          *      EventNotification/EventAck/unexpected request frame!
618          */
619         return freereq;
620 }
621
622 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
623 /**
624  *      mpt_register - Register protocol-specific main callback handler.
625  *      @cbfunc: callback function pointer
626  *      @dclass: Protocol driver's class (%MPT_DRIVER_CLASS enum value)
627  *      @func_name: call function's name
628  *
629  *      This routine is called by a protocol-specific driver (SCSI host,
630  *      LAN, SCSI target) to register its reply callback routine.  Each
631  *      protocol-specific driver must do this before it will be able to
632  *      use any IOC resources, such as obtaining request frames.
633  *
634  *      NOTES: The SCSI protocol driver currently calls this routine thrice
635  *      in order to register separate callbacks; one for "normal" SCSI IO;
636  *      one for MptScsiTaskMgmt requests; one for Scan/DV requests.
637  *
638  *      Returns u8 valued "handle" in the range (and S.O.D. order)
639  *      {N,...,7,6,5,...,1} if successful.
640  *      A return value of MPT_MAX_PROTOCOL_DRIVERS (including zero!) should be
641  *      considered an error by the caller.
642  */
643 u8
644 mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass, char *func_name)
645 {
646         u8 cb_idx;
647         last_drv_idx = MPT_MAX_PROTOCOL_DRIVERS;
648
649         /*
650          *  Search for empty callback slot in this order: {N,...,7,6,5,...,1}
651          *  (slot/handle 0 is reserved!)
652          */
653         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
654                 if (MptCallbacks[cb_idx] == NULL) {
655                         MptCallbacks[cb_idx] = cbfunc;
656                         MptDriverClass[cb_idx] = dclass;
657                         MptEvHandlers[cb_idx] = NULL;
658                         last_drv_idx = cb_idx;
659                         memcpy(MptCallbacksName[cb_idx], func_name,
660                             strlen(func_name) > 50 ? 50 : strlen(func_name));
661                         break;
662                 }
663         }
664
665         return last_drv_idx;
666 }
667
668 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
669 /**
670  *      mpt_deregister - Deregister a protocol drivers resources.
671  *      @cb_idx: previously registered callback handle
672  *
673  *      Each protocol-specific driver should call this routine when its
674  *      module is unloaded.
675  */
676 void
677 mpt_deregister(u8 cb_idx)
678 {
679         if (cb_idx && (cb_idx < MPT_MAX_PROTOCOL_DRIVERS)) {
680                 MptCallbacks[cb_idx] = NULL;
681                 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
682                 MptEvHandlers[cb_idx] = NULL;
683
684                 last_drv_idx++;
685         }
686 }
687
688 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
689 /**
690  *      mpt_event_register - Register protocol-specific event callback handler.
691  *      @cb_idx: previously registered (via mpt_register) callback handle
692  *      @ev_cbfunc: callback function
693  *
694  *      This routine can be called by one or more protocol-specific drivers
695  *      if/when they choose to be notified of MPT events.
696  *
697  *      Returns 0 for success.
698  */
699 int
700 mpt_event_register(u8 cb_idx, MPT_EVHANDLER ev_cbfunc)
701 {
702         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
703                 return -1;
704
705         MptEvHandlers[cb_idx] = ev_cbfunc;
706         return 0;
707 }
708
709 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
710 /**
711  *      mpt_event_deregister - Deregister protocol-specific event callback handler
712  *      @cb_idx: previously registered callback handle
713  *
714  *      Each protocol-specific driver should call this routine
715  *      when it does not (or can no longer) handle events,
716  *      or when its module is unloaded.
717  */
718 void
719 mpt_event_deregister(u8 cb_idx)
720 {
721         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
722                 return;
723
724         MptEvHandlers[cb_idx] = NULL;
725 }
726
727 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
728 /**
729  *      mpt_reset_register - Register protocol-specific IOC reset handler.
730  *      @cb_idx: previously registered (via mpt_register) callback handle
731  *      @reset_func: reset function
732  *
733  *      This routine can be called by one or more protocol-specific drivers
734  *      if/when they choose to be notified of IOC resets.
735  *
736  *      Returns 0 for success.
737  */
738 int
739 mpt_reset_register(u8 cb_idx, MPT_RESETHANDLER reset_func)
740 {
741         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
742                 return -1;
743
744         MptResetHandlers[cb_idx] = reset_func;
745         return 0;
746 }
747
748 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
749 /**
750  *      mpt_reset_deregister - Deregister protocol-specific IOC reset handler.
751  *      @cb_idx: previously registered callback handle
752  *
753  *      Each protocol-specific driver should call this routine
754  *      when it does not (or can no longer) handle IOC reset handling,
755  *      or when its module is unloaded.
756  */
757 void
758 mpt_reset_deregister(u8 cb_idx)
759 {
760         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
761                 return;
762
763         MptResetHandlers[cb_idx] = NULL;
764 }
765
766 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
767 /**
768  *      mpt_device_driver_register - Register device driver hooks
769  *      @dd_cbfunc: driver callbacks struct
770  *      @cb_idx: MPT protocol driver index
771  */
772 int
773 mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, u8 cb_idx)
774 {
775         MPT_ADAPTER     *ioc;
776         const struct pci_device_id *id;
777
778         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
779                 return -EINVAL;
780
781         MptDeviceDriverHandlers[cb_idx] = dd_cbfunc;
782
783         /* call per pci device probe entry point */
784         list_for_each_entry(ioc, &ioc_list, list) {
785                 id = ioc->pcidev->driver ?
786                     ioc->pcidev->driver->id_table : NULL;
787                 if (dd_cbfunc->probe)
788                         dd_cbfunc->probe(ioc->pcidev, id);
789          }
790
791         return 0;
792 }
793
794 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
795 /**
796  *      mpt_device_driver_deregister - DeRegister device driver hooks
797  *      @cb_idx: MPT protocol driver index
798  */
799 void
800 mpt_device_driver_deregister(u8 cb_idx)
801 {
802         struct mpt_pci_driver *dd_cbfunc;
803         MPT_ADAPTER     *ioc;
804
805         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
806                 return;
807
808         dd_cbfunc = MptDeviceDriverHandlers[cb_idx];
809
810         list_for_each_entry(ioc, &ioc_list, list) {
811                 if (dd_cbfunc->remove)
812                         dd_cbfunc->remove(ioc->pcidev);
813         }
814
815         MptDeviceDriverHandlers[cb_idx] = NULL;
816 }
817
818
819 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
820 /**
821  *      mpt_get_msg_frame - Obtain an MPT request frame from the pool
822  *      @cb_idx: Handle of registered MPT protocol driver
823  *      @ioc: Pointer to MPT adapter structure
824  *
825  *      Obtain an MPT request frame from the pool (of 1024) that are
826  *      allocated per MPT adapter.
827  *
828  *      Returns pointer to a MPT request frame or %NULL if none are available
829  *      or IOC is not active.
830  */
831 MPT_FRAME_HDR*
832 mpt_get_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc)
833 {
834         MPT_FRAME_HDR *mf;
835         unsigned long flags;
836         u16      req_idx;       /* Request index */
837
838         /* validate handle and ioc identifier */
839
840 #ifdef MFCNT
841         if (!ioc->active)
842                 printk(MYIOC_s_WARN_FMT "IOC Not Active! mpt_get_msg_frame "
843                     "returning NULL!\n", ioc->name);
844 #endif
845
846         /* If interrupts are not attached, do not return a request frame */
847         if (!ioc->active)
848                 return NULL;
849
850         spin_lock_irqsave(&ioc->FreeQlock, flags);
851         if (!list_empty(&ioc->FreeQ)) {
852                 int req_offset;
853
854                 mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
855                                 u.frame.linkage.list);
856                 list_del(&mf->u.frame.linkage.list);
857                 mf->u.frame.linkage.arg1 = 0;
858                 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;  /* byte */
859                 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
860                                                                 /* u16! */
861                 req_idx = req_offset / ioc->req_sz;
862                 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
863                 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
864                 /* Default, will be changed if necessary in SG generation */
865                 ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame;
866 #ifdef MFCNT
867                 ioc->mfcnt++;
868 #endif
869         }
870         else
871                 mf = NULL;
872         spin_unlock_irqrestore(&ioc->FreeQlock, flags);
873
874 #ifdef MFCNT
875         if (mf == NULL)
876                 printk(MYIOC_s_WARN_FMT "IOC Active. No free Msg Frames! "
877                     "Count 0x%x Max 0x%x\n", ioc->name, ioc->mfcnt,
878                     ioc->req_depth);
879         mfcounter++;
880         if (mfcounter == PRINT_MF_COUNT)
881                 printk(MYIOC_s_INFO_FMT "MF Count 0x%x Max 0x%x \n", ioc->name,
882                     ioc->mfcnt, ioc->req_depth);
883 #endif
884
885         dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_get_msg_frame(%d,%d), got mf=%p\n",
886             ioc->name, cb_idx, ioc->id, mf));
887         return mf;
888 }
889
890 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
891 /**
892  *      mpt_put_msg_frame - Send a protocol-specific MPT request frame to an IOC
893  *      @cb_idx: Handle of registered MPT protocol driver
894  *      @ioc: Pointer to MPT adapter structure
895  *      @mf: Pointer to MPT request frame
896  *
897  *      This routine posts an MPT request frame to the request post FIFO of a
898  *      specific MPT adapter.
899  */
900 void
901 mpt_put_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
902 {
903         u32 mf_dma_addr;
904         int req_offset;
905         u16      req_idx;       /* Request index */
906
907         /* ensure values are reset properly! */
908         mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;          /* byte */
909         req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
910                                                                 /* u16! */
911         req_idx = req_offset / ioc->req_sz;
912         mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
913         mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
914
915         DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
916
917         mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
918         dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d "
919             "RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx,
920             ioc->RequestNB[req_idx]));
921         CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
922 }
923
924 /**
925  *      mpt_put_msg_frame_hi_pri - Send a hi-pri protocol-specific MPT request frame
926  *      @cb_idx: Handle of registered MPT protocol driver
927  *      @ioc: Pointer to MPT adapter structure
928  *      @mf: Pointer to MPT request frame
929  *
930  *      Send a protocol-specific MPT request frame to an IOC using
931  *      hi-priority request queue.
932  *
933  *      This routine posts an MPT request frame to the request post FIFO of a
934  *      specific MPT adapter.
935  **/
936 void
937 mpt_put_msg_frame_hi_pri(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
938 {
939         u32 mf_dma_addr;
940         int req_offset;
941         u16      req_idx;       /* Request index */
942
943         /* ensure values are reset properly! */
944         mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
945         req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
946         req_idx = req_offset / ioc->req_sz;
947         mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
948         mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
949
950         DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
951
952         mf_dma_addr = (ioc->req_frames_low_dma + req_offset);
953         dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d\n",
954                 ioc->name, mf_dma_addr, req_idx));
955         CHIPREG_WRITE32(&ioc->chip->RequestHiPriFifo, mf_dma_addr);
956 }
957
958 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
959 /**
960  *      mpt_free_msg_frame - Place MPT request frame back on FreeQ.
961  *      @ioc: Pointer to MPT adapter structure
962  *      @mf: Pointer to MPT request frame
963  *
964  *      This routine places a MPT request frame back on the MPT adapter's
965  *      FreeQ.
966  */
967 void
968 mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
969 {
970         unsigned long flags;
971
972         /*  Put Request back on FreeQ!  */
973         spin_lock_irqsave(&ioc->FreeQlock, flags);
974         if (cpu_to_le32(mf->u.frame.linkage.arg1) == 0xdeadbeaf)
975                 goto out;
976         /* signature to know if this mf is freed */
977         mf->u.frame.linkage.arg1 = cpu_to_le32(0xdeadbeaf);
978         list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
979 #ifdef MFCNT
980         ioc->mfcnt--;
981 #endif
982  out:
983         spin_unlock_irqrestore(&ioc->FreeQlock, flags);
984 }
985
986 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
987 /**
988  *      mpt_add_sge - Place a simple 32 bit SGE at address pAddr.
989  *      @pAddr: virtual address for SGE
990  *      @flagslength: SGE flags and data transfer length
991  *      @dma_addr: Physical address
992  *
993  *      This routine places a MPT request frame back on the MPT adapter's
994  *      FreeQ.
995  */
996 static void
997 mpt_add_sge(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
998 {
999         SGESimple32_t *pSge = (SGESimple32_t *) pAddr;
1000         pSge->FlagsLength = cpu_to_le32(flagslength);
1001         pSge->Address = cpu_to_le32(dma_addr);
1002 }
1003
1004 /**
1005  *      mpt_add_sge_64bit - Place a simple 64 bit SGE at address pAddr.
1006  *      @pAddr: virtual address for SGE
1007  *      @flagslength: SGE flags and data transfer length
1008  *      @dma_addr: Physical address
1009  *
1010  *      This routine places a MPT request frame back on the MPT adapter's
1011  *      FreeQ.
1012  **/
1013 static void
1014 mpt_add_sge_64bit(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1015 {
1016         SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
1017         pSge->Address.Low = cpu_to_le32
1018                         (lower_32_bits(dma_addr));
1019         pSge->Address.High = cpu_to_le32
1020                         (upper_32_bits(dma_addr));
1021         pSge->FlagsLength = cpu_to_le32
1022                         ((flagslength | MPT_SGE_FLAGS_64_BIT_ADDRESSING));
1023 }
1024
1025 /**
1026  *      mpt_add_sge_64bit_1078 - Place a simple 64 bit SGE at address pAddr (1078 workaround).
1027  *      @pAddr: virtual address for SGE
1028  *      @flagslength: SGE flags and data transfer length
1029  *      @dma_addr: Physical address
1030  *
1031  *      This routine places a MPT request frame back on the MPT adapter's
1032  *      FreeQ.
1033  **/
1034 static void
1035 mpt_add_sge_64bit_1078(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1036 {
1037         SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
1038         u32 tmp;
1039
1040         pSge->Address.Low = cpu_to_le32
1041                         (lower_32_bits(dma_addr));
1042         tmp = (u32)(upper_32_bits(dma_addr));
1043
1044         /*
1045          * 1078 errata workaround for the 36GB limitation
1046          */
1047         if ((((u64)dma_addr + MPI_SGE_LENGTH(flagslength)) >> 32)  == 9) {
1048                 flagslength |=
1049                     MPI_SGE_SET_FLAGS(MPI_SGE_FLAGS_LOCAL_ADDRESS);
1050                 tmp |= (1<<31);
1051                 if (mpt_debug_level & MPT_DEBUG_36GB_MEM)
1052                         printk(KERN_DEBUG "1078 P0M2 addressing for "
1053                             "addr = 0x%llx len = %d\n",
1054                             (unsigned long long)dma_addr,
1055                             MPI_SGE_LENGTH(flagslength));
1056         }
1057
1058         pSge->Address.High = cpu_to_le32(tmp);
1059         pSge->FlagsLength = cpu_to_le32(
1060                 (flagslength | MPT_SGE_FLAGS_64_BIT_ADDRESSING));
1061 }
1062
1063 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1064 /**
1065  *      mpt_add_chain - Place a 32 bit chain SGE at address pAddr.
1066  *      @pAddr: virtual address for SGE
1067  *      @next: nextChainOffset value (u32's)
1068  *      @length: length of next SGL segment
1069  *      @dma_addr: Physical address
1070  *
1071  */
1072 static void
1073 mpt_add_chain(void *pAddr, u8 next, u16 length, dma_addr_t dma_addr)
1074 {
1075                 SGEChain32_t *pChain = (SGEChain32_t *) pAddr;
1076                 pChain->Length = cpu_to_le16(length);
1077                 pChain->Flags = MPI_SGE_FLAGS_CHAIN_ELEMENT;
1078                 pChain->NextChainOffset = next;
1079                 pChain->Address = cpu_to_le32(dma_addr);
1080 }
1081
1082 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1083 /**
1084  *      mpt_add_chain_64bit - Place a 64 bit chain SGE at address pAddr.
1085  *      @pAddr: virtual address for SGE
1086  *      @next: nextChainOffset value (u32's)
1087  *      @length: length of next SGL segment
1088  *      @dma_addr: Physical address
1089  *
1090  */
1091 static void
1092 mpt_add_chain_64bit(void *pAddr, u8 next, u16 length, dma_addr_t dma_addr)
1093 {
1094                 SGEChain64_t *pChain = (SGEChain64_t *) pAddr;
1095                 u32 tmp = dma_addr & 0xFFFFFFFF;
1096
1097                 pChain->Length = cpu_to_le16(length);
1098                 pChain->Flags = (MPI_SGE_FLAGS_CHAIN_ELEMENT |
1099                                  MPI_SGE_FLAGS_64_BIT_ADDRESSING);
1100
1101                 pChain->NextChainOffset = next;
1102
1103                 pChain->Address.Low = cpu_to_le32(tmp);
1104                 tmp = (u32)(upper_32_bits(dma_addr));
1105                 pChain->Address.High = cpu_to_le32(tmp);
1106 }
1107
1108 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1109 /**
1110  *      mpt_send_handshake_request - Send MPT request via doorbell handshake method.
1111  *      @cb_idx: Handle of registered MPT protocol driver
1112  *      @ioc: Pointer to MPT adapter structure
1113  *      @reqBytes: Size of the request in bytes
1114  *      @req: Pointer to MPT request frame
1115  *      @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
1116  *
1117  *      This routine is used exclusively to send MptScsiTaskMgmt
1118  *      requests since they are required to be sent via doorbell handshake.
1119  *
1120  *      NOTE: It is the callers responsibility to byte-swap fields in the
1121  *      request which are greater than 1 byte in size.
1122  *
1123  *      Returns 0 for success, non-zero for failure.
1124  */
1125 int
1126 mpt_send_handshake_request(u8 cb_idx, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
1127 {
1128         int     r = 0;
1129         u8      *req_as_bytes;
1130         int      ii;
1131
1132         /* State is known to be good upon entering
1133          * this function so issue the bus reset
1134          * request.
1135          */
1136
1137         /*
1138          * Emulate what mpt_put_msg_frame() does /wrt to sanity
1139          * setting cb_idx/req_idx.  But ONLY if this request
1140          * is in proper (pre-alloc'd) request buffer range...
1141          */
1142         ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
1143         if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
1144                 MPT_FRAME_HDR *mf = (MPT_FRAME_HDR*)req;
1145                 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(ii);
1146                 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
1147         }
1148
1149         /* Make sure there are no doorbells */
1150         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1151
1152         CHIPREG_WRITE32(&ioc->chip->Doorbell,
1153                         ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
1154                          ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
1155
1156         /* Wait for IOC doorbell int */
1157         if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
1158                 return ii;
1159         }
1160
1161         /* Read doorbell and check for active bit */
1162         if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
1163                 return -5;
1164
1165         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_send_handshake_request start, WaitCnt=%d\n",
1166                 ioc->name, ii));
1167
1168         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1169
1170         if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1171                 return -2;
1172         }
1173
1174         /* Send request via doorbell handshake */
1175         req_as_bytes = (u8 *) req;
1176         for (ii = 0; ii < reqBytes/4; ii++) {
1177                 u32 word;
1178
1179                 word = ((req_as_bytes[(ii*4) + 0] <<  0) |
1180                         (req_as_bytes[(ii*4) + 1] <<  8) |
1181                         (req_as_bytes[(ii*4) + 2] << 16) |
1182                         (req_as_bytes[(ii*4) + 3] << 24));
1183                 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
1184                 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1185                         r = -3;
1186                         break;
1187                 }
1188         }
1189
1190         if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
1191                 r = 0;
1192         else
1193                 r = -4;
1194
1195         /* Make sure there are no doorbells */
1196         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1197
1198         return r;
1199 }
1200
1201 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1202 /**
1203  * mpt_host_page_access_control - control the IOC's Host Page Buffer access
1204  * @ioc: Pointer to MPT adapter structure
1205  * @access_control_value: define bits below
1206  * @sleepFlag: Specifies whether the process can sleep
1207  *
1208  * Provides mechanism for the host driver to control the IOC's
1209  * Host Page Buffer access.
1210  *
1211  * Access Control Value - bits[15:12]
1212  * 0h Reserved
1213  * 1h Enable Access { MPI_DB_HPBAC_ENABLE_ACCESS }
1214  * 2h Disable Access { MPI_DB_HPBAC_DISABLE_ACCESS }
1215  * 3h Free Buffer { MPI_DB_HPBAC_FREE_BUFFER }
1216  *
1217  * Returns 0 for success, non-zero for failure.
1218  */
1219
1220 static int
1221 mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
1222 {
1223         int      r = 0;
1224
1225         /* return if in use */
1226         if (CHIPREG_READ32(&ioc->chip->Doorbell)
1227             & MPI_DOORBELL_ACTIVE)
1228             return -1;
1229
1230         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1231
1232         CHIPREG_WRITE32(&ioc->chip->Doorbell,
1233                 ((MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL
1234                  <<MPI_DOORBELL_FUNCTION_SHIFT) |
1235                  (access_control_value<<12)));
1236
1237         /* Wait for IOC to clear Doorbell Status bit */
1238         if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1239                 return -2;
1240         }else
1241                 return 0;
1242 }
1243
1244 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1245 /**
1246  *      mpt_host_page_alloc - allocate system memory for the fw
1247  *      @ioc: Pointer to pointer to IOC adapter
1248  *      @ioc_init: Pointer to ioc init config page
1249  *
1250  *      If we already allocated memory in past, then resend the same pointer.
1251  *      Returns 0 for success, non-zero for failure.
1252  */
1253 static int
1254 mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
1255 {
1256         char    *psge;
1257         int     flags_length;
1258         u32     host_page_buffer_sz=0;
1259
1260         if(!ioc->HostPageBuffer) {
1261
1262                 host_page_buffer_sz =
1263                     le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
1264
1265                 if(!host_page_buffer_sz)
1266                         return 0; /* fw doesn't need any host buffers */
1267
1268                 /* spin till we get enough memory */
1269                 while(host_page_buffer_sz > 0) {
1270
1271                         if((ioc->HostPageBuffer = pci_alloc_consistent(
1272                             ioc->pcidev,
1273                             host_page_buffer_sz,
1274                             &ioc->HostPageBuffer_dma)) != NULL) {
1275
1276                                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1277                                     "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n",
1278                                     ioc->name, ioc->HostPageBuffer,
1279                                     (u32)ioc->HostPageBuffer_dma,
1280                                     host_page_buffer_sz));
1281                                 ioc->alloc_total += host_page_buffer_sz;
1282                                 ioc->HostPageBuffer_sz = host_page_buffer_sz;
1283                                 break;
1284                         }
1285
1286                         host_page_buffer_sz -= (4*1024);
1287                 }
1288         }
1289
1290         if(!ioc->HostPageBuffer) {
1291                 printk(MYIOC_s_ERR_FMT
1292                     "Failed to alloc memory for host_page_buffer!\n",
1293                     ioc->name);
1294                 return -999;
1295         }
1296
1297         psge = (char *)&ioc_init->HostPageBufferSGE;
1298         flags_length = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
1299             MPI_SGE_FLAGS_SYSTEM_ADDRESS |
1300             MPI_SGE_FLAGS_HOST_TO_IOC |
1301             MPI_SGE_FLAGS_END_OF_BUFFER;
1302         flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
1303         flags_length |= ioc->HostPageBuffer_sz;
1304         ioc->add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
1305         ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
1306
1307 return 0;
1308 }
1309
1310 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1311 /**
1312  *      mpt_verify_adapter - Given IOC identifier, set pointer to its adapter structure.
1313  *      @iocid: IOC unique identifier (integer)
1314  *      @iocpp: Pointer to pointer to IOC adapter
1315  *
1316  *      Given a unique IOC identifier, set pointer to the associated MPT
1317  *      adapter structure.
1318  *
1319  *      Returns iocid and sets iocpp if iocid is found.
1320  *      Returns -1 if iocid is not found.
1321  */
1322 int
1323 mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
1324 {
1325         MPT_ADAPTER *ioc;
1326
1327         list_for_each_entry(ioc,&ioc_list,list) {
1328                 if (ioc->id == iocid) {
1329                         *iocpp =ioc;
1330                         return iocid;
1331                 }
1332         }
1333
1334         *iocpp = NULL;
1335         return -1;
1336 }
1337
1338 /**
1339  *      mpt_get_product_name - returns product string
1340  *      @vendor: pci vendor id
1341  *      @device: pci device id
1342  *      @revision: pci revision id
1343  *      @prod_name: string returned
1344  *
1345  *      Returns product string displayed when driver loads,
1346  *      in /proc/mpt/summary and /sysfs/class/scsi_host/host<X>/version_product
1347  *
1348  **/
1349 static void
1350 mpt_get_product_name(u16 vendor, u16 device, u8 revision, char *prod_name)
1351 {
1352         char *product_str = NULL;
1353
1354         if (vendor == PCI_VENDOR_ID_BROCADE) {
1355                 switch (device)
1356                 {
1357                 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1358                         switch (revision)
1359                         {
1360                         case 0x00:
1361                                 product_str = "BRE040 A0";
1362                                 break;
1363                         case 0x01:
1364                                 product_str = "BRE040 A1";
1365                                 break;
1366                         default:
1367                                 product_str = "BRE040";
1368                                 break;
1369                         }
1370                         break;
1371                 }
1372                 goto out;
1373         }
1374
1375         switch (device)
1376         {
1377         case MPI_MANUFACTPAGE_DEVICEID_FC909:
1378                 product_str = "LSIFC909 B1";
1379                 break;
1380         case MPI_MANUFACTPAGE_DEVICEID_FC919:
1381                 product_str = "LSIFC919 B0";
1382                 break;
1383         case MPI_MANUFACTPAGE_DEVICEID_FC929:
1384                 product_str = "LSIFC929 B0";
1385                 break;
1386         case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1387                 if (revision < 0x80)
1388                         product_str = "LSIFC919X A0";
1389                 else
1390                         product_str = "LSIFC919XL A1";
1391                 break;
1392         case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1393                 if (revision < 0x80)
1394                         product_str = "LSIFC929X A0";
1395                 else
1396                         product_str = "LSIFC929XL A1";
1397                 break;
1398         case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1399                 product_str = "LSIFC939X A1";
1400                 break;
1401         case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1402                 product_str = "LSIFC949X A1";
1403                 break;
1404         case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1405                 switch (revision)
1406                 {
1407                 case 0x00:
1408                         product_str = "LSIFC949E A0";
1409                         break;
1410                 case 0x01:
1411                         product_str = "LSIFC949E A1";
1412                         break;
1413                 default:
1414                         product_str = "LSIFC949E";
1415                         break;
1416                 }
1417                 break;
1418         case MPI_MANUFACTPAGE_DEVID_53C1030:
1419                 switch (revision)
1420                 {
1421                 case 0x00:
1422                         product_str = "LSI53C1030 A0";
1423                         break;
1424                 case 0x01:
1425                         product_str = "LSI53C1030 B0";
1426                         break;
1427                 case 0x03:
1428                         product_str = "LSI53C1030 B1";
1429                         break;
1430                 case 0x07:
1431                         product_str = "LSI53C1030 B2";
1432                         break;
1433                 case 0x08:
1434                         product_str = "LSI53C1030 C0";
1435                         break;
1436                 case 0x80:
1437                         product_str = "LSI53C1030T A0";
1438                         break;
1439                 case 0x83:
1440                         product_str = "LSI53C1030T A2";
1441                         break;
1442                 case 0x87:
1443                         product_str = "LSI53C1030T A3";
1444                         break;
1445                 case 0xc1:
1446                         product_str = "LSI53C1020A A1";
1447                         break;
1448                 default:
1449                         product_str = "LSI53C1030";
1450                         break;
1451                 }
1452                 break;
1453         case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1454                 switch (revision)
1455                 {
1456                 case 0x03:
1457                         product_str = "LSI53C1035 A2";
1458                         break;
1459                 case 0x04:
1460                         product_str = "LSI53C1035 B0";
1461                         break;
1462                 default:
1463                         product_str = "LSI53C1035";
1464                         break;
1465                 }
1466                 break;
1467         case MPI_MANUFACTPAGE_DEVID_SAS1064:
1468                 switch (revision)
1469                 {
1470                 case 0x00:
1471                         product_str = "LSISAS1064 A1";
1472                         break;
1473                 case 0x01:
1474                         product_str = "LSISAS1064 A2";
1475                         break;
1476                 case 0x02:
1477                         product_str = "LSISAS1064 A3";
1478                         break;
1479                 case 0x03:
1480                         product_str = "LSISAS1064 A4";
1481                         break;
1482                 default:
1483                         product_str = "LSISAS1064";
1484                         break;
1485                 }
1486                 break;
1487         case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1488                 switch (revision)
1489                 {
1490                 case 0x00:
1491                         product_str = "LSISAS1064E A0";
1492                         break;
1493                 case 0x01:
1494                         product_str = "LSISAS1064E B0";
1495                         break;
1496                 case 0x02:
1497                         product_str = "LSISAS1064E B1";
1498                         break;
1499                 case 0x04:
1500                         product_str = "LSISAS1064E B2";
1501                         break;
1502                 case 0x08:
1503                         product_str = "LSISAS1064E B3";
1504                         break;
1505                 default:
1506                         product_str = "LSISAS1064E";
1507                         break;
1508                 }
1509                 break;
1510         case MPI_MANUFACTPAGE_DEVID_SAS1068:
1511                 switch (revision)
1512                 {
1513                 case 0x00:
1514                         product_str = "LSISAS1068 A0";
1515                         break;
1516                 case 0x01:
1517                         product_str = "LSISAS1068 B0";
1518                         break;
1519                 case 0x02:
1520                         product_str = "LSISAS1068 B1";
1521                         break;
1522                 default:
1523                         product_str = "LSISAS1068";
1524                         break;
1525                 }
1526                 break;
1527         case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1528                 switch (revision)
1529                 {
1530                 case 0x00:
1531                         product_str = "LSISAS1068E A0";
1532                         break;
1533                 case 0x01:
1534                         product_str = "LSISAS1068E B0";
1535                         break;
1536                 case 0x02:
1537                         product_str = "LSISAS1068E B1";
1538                         break;
1539                 case 0x04:
1540                         product_str = "LSISAS1068E B2";
1541                         break;
1542                 case 0x08:
1543                         product_str = "LSISAS1068E B3";
1544                         break;
1545                 default:
1546                         product_str = "LSISAS1068E";
1547                         break;
1548                 }
1549                 break;
1550         case MPI_MANUFACTPAGE_DEVID_SAS1078:
1551                 switch (revision)
1552                 {
1553                 case 0x00:
1554                         product_str = "LSISAS1078 A0";
1555                         break;
1556                 case 0x01:
1557                         product_str = "LSISAS1078 B0";
1558                         break;
1559                 case 0x02:
1560                         product_str = "LSISAS1078 C0";
1561                         break;
1562                 case 0x03:
1563                         product_str = "LSISAS1078 C1";
1564                         break;
1565                 case 0x04:
1566                         product_str = "LSISAS1078 C2";
1567                         break;
1568                 default:
1569                         product_str = "LSISAS1078";
1570                         break;
1571                 }
1572                 break;
1573         }
1574
1575  out:
1576         if (product_str)
1577                 sprintf(prod_name, "%s", product_str);
1578 }
1579
1580 /**
1581  *      mpt_mapresources - map in memory mapped io
1582  *      @ioc: Pointer to pointer to IOC adapter
1583  *
1584  **/
1585 static int
1586 mpt_mapresources(MPT_ADAPTER *ioc)
1587 {
1588         u8              __iomem *mem;
1589         int              ii;
1590         resource_size_t  mem_phys;
1591         unsigned long    port;
1592         u32              msize;
1593         u32              psize;
1594         u8               revision;
1595         int              r = -ENODEV;
1596         struct pci_dev *pdev;
1597
1598         pdev = ioc->pcidev;
1599         ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1600         if (pci_enable_device_mem(pdev)) {
1601                 printk(MYIOC_s_ERR_FMT "pci_enable_device_mem() "
1602                     "failed\n", ioc->name);
1603                 return r;
1604         }
1605         if (pci_request_selected_regions(pdev, ioc->bars, "mpt")) {
1606                 printk(MYIOC_s_ERR_FMT "pci_request_selected_regions() with "
1607                     "MEM failed\n", ioc->name);
1608                 return r;
1609         }
1610
1611         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
1612
1613         if (sizeof(dma_addr_t) > 4) {
1614                 const uint64_t required_mask = dma_get_required_mask
1615                     (&pdev->dev);
1616                 if (required_mask > DMA_BIT_MASK(32)
1617                         && !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
1618                         && !pci_set_consistent_dma_mask(pdev,
1619                                                  DMA_BIT_MASK(64))) {
1620                         ioc->dma_mask = DMA_BIT_MASK(64);
1621                         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1622                                 ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1623                                 ioc->name));
1624                 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1625                         && !pci_set_consistent_dma_mask(pdev,
1626                                                 DMA_BIT_MASK(32))) {
1627                         ioc->dma_mask = DMA_BIT_MASK(32);
1628                         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1629                                 ": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1630                                 ioc->name));
1631                 } else {
1632                         printk(MYIOC_s_WARN_FMT "no suitable DMA mask for %s\n",
1633                             ioc->name, pci_name(pdev));
1634                         pci_release_selected_regions(pdev, ioc->bars);
1635                         return r;
1636                 }
1637         } else {
1638                 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1639                         && !pci_set_consistent_dma_mask(pdev,
1640                                                 DMA_BIT_MASK(32))) {
1641                         ioc->dma_mask = DMA_BIT_MASK(32);
1642                         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1643                                 ": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1644                                 ioc->name));
1645                 } else {
1646                         printk(MYIOC_s_WARN_FMT "no suitable DMA mask for %s\n",
1647                             ioc->name, pci_name(pdev));
1648                         pci_release_selected_regions(pdev, ioc->bars);
1649                         return r;
1650                 }
1651         }
1652
1653         mem_phys = msize = 0;
1654         port = psize = 0;
1655         for (ii = 0; ii < DEVICE_COUNT_RESOURCE; ii++) {
1656                 if (pci_resource_flags(pdev, ii) & PCI_BASE_ADDRESS_SPACE_IO) {
1657                         if (psize)
1658                                 continue;
1659                         /* Get I/O space! */
1660                         port = pci_resource_start(pdev, ii);
1661                         psize = pci_resource_len(pdev, ii);
1662                 } else {
1663                         if (msize)
1664                                 continue;
1665                         /* Get memmap */
1666                         mem_phys = pci_resource_start(pdev, ii);
1667                         msize = pci_resource_len(pdev, ii);
1668                 }
1669         }
1670         ioc->mem_size = msize;
1671
1672         mem = NULL;
1673         /* Get logical ptr for PciMem0 space */
1674         /*mem = ioremap(mem_phys, msize);*/
1675         mem = ioremap(mem_phys, msize);
1676         if (mem == NULL) {
1677                 printk(MYIOC_s_ERR_FMT ": ERROR - Unable to map adapter"
1678                         " memory!\n", ioc->name);
1679                 pci_release_selected_regions(pdev, ioc->bars);
1680                 return -EINVAL;
1681         }
1682         ioc->memmap = mem;
1683         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %llx\n",
1684             ioc->name, mem, (unsigned long long)mem_phys));
1685
1686         ioc->mem_phys = mem_phys;
1687         ioc->chip = (SYSIF_REGS __iomem *)mem;
1688
1689         /* Save Port IO values in case we need to do downloadboot */
1690         ioc->pio_mem_phys = port;
1691         ioc->pio_chip = (SYSIF_REGS __iomem *)port;
1692
1693         return 0;
1694 }
1695
1696 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1697 /**
1698  *      mpt_attach - Install a PCI intelligent MPT adapter.
1699  *      @pdev: Pointer to pci_dev structure
1700  *      @id: PCI device ID information
1701  *
1702  *      This routine performs all the steps necessary to bring the IOC of
1703  *      a MPT adapter to a OPERATIONAL state.  This includes registering
1704  *      memory regions, registering the interrupt, and allocating request
1705  *      and reply memory pools.
1706  *
1707  *      This routine also pre-fetches the LAN MAC address of a Fibre Channel
1708  *      MPT adapter.
1709  *
1710  *      Returns 0 for success, non-zero for failure.
1711  *
1712  *      TODO: Add support for polled controllers
1713  */
1714 int
1715 mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
1716 {
1717         MPT_ADAPTER     *ioc;
1718         u8               cb_idx;
1719         int              r = -ENODEV;
1720         u8               revision;
1721         u8               pcixcmd;
1722         static int       mpt_ids = 0;
1723 #ifdef CONFIG_PROC_FS
1724         struct proc_dir_entry *dent;
1725 #endif
1726
1727         ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC);
1728         if (ioc == NULL) {
1729                 printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n");
1730                 return -ENOMEM;
1731         }
1732
1733         ioc->id = mpt_ids++;
1734         sprintf(ioc->name, "ioc%d", ioc->id);
1735         dinitprintk(ioc, printk(KERN_WARNING MYNAM ": mpt_adapter_install\n"));
1736
1737         /*
1738          * set initial debug level
1739          * (refer to mptdebug.h)
1740          *
1741          */
1742         ioc->debug_level = mpt_debug_level;
1743         if (mpt_debug_level)
1744                 printk(KERN_INFO "mpt_debug_level=%xh\n", mpt_debug_level);
1745
1746         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": mpt_adapter_install\n", ioc->name));
1747
1748         ioc->pcidev = pdev;
1749         if (mpt_mapresources(ioc)) {
1750                 kfree(ioc);
1751                 return r;
1752         }
1753
1754         /*
1755          * Setting up proper handlers for scatter gather handling
1756          */
1757         if (ioc->dma_mask == DMA_BIT_MASK(64)) {
1758                 if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078)
1759                         ioc->add_sge = &mpt_add_sge_64bit_1078;
1760                 else
1761                         ioc->add_sge = &mpt_add_sge_64bit;
1762                 ioc->add_chain = &mpt_add_chain_64bit;
1763                 ioc->sg_addr_size = 8;
1764         } else {
1765                 ioc->add_sge = &mpt_add_sge;
1766                 ioc->add_chain = &mpt_add_chain;
1767                 ioc->sg_addr_size = 4;
1768         }
1769         ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
1770
1771         ioc->alloc_total = sizeof(MPT_ADAPTER);
1772         ioc->req_sz = MPT_DEFAULT_FRAME_SIZE;           /* avoid div by zero! */
1773         ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
1774
1775
1776         spin_lock_init(&ioc->taskmgmt_lock);
1777         mutex_init(&ioc->internal_cmds.mutex);
1778         init_completion(&ioc->internal_cmds.done);
1779         mutex_init(&ioc->mptbase_cmds.mutex);
1780         init_completion(&ioc->mptbase_cmds.done);
1781         mutex_init(&ioc->taskmgmt_cmds.mutex);
1782         init_completion(&ioc->taskmgmt_cmds.done);
1783
1784         /* Initialize the event logging.
1785          */
1786         ioc->eventTypes = 0;    /* None */
1787         ioc->eventContext = 0;
1788         ioc->eventLogSize = 0;
1789         ioc->events = NULL;
1790
1791 #ifdef MFCNT
1792         ioc->mfcnt = 0;
1793 #endif
1794
1795         ioc->sh = NULL;
1796         ioc->cached_fw = NULL;
1797
1798         /* Initialize SCSI Config Data structure
1799          */
1800         memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
1801
1802         /* Initialize the fc rport list head.
1803          */
1804         INIT_LIST_HEAD(&ioc->fc_rports);
1805
1806         /* Find lookup slot. */
1807         INIT_LIST_HEAD(&ioc->list);
1808
1809
1810         /* Initialize workqueue */
1811         INIT_DELAYED_WORK(&ioc->fault_reset_work, mpt_fault_reset_work);
1812
1813         snprintf(ioc->reset_work_q_name, MPT_KOBJ_NAME_LEN,
1814                  "mpt_poll_%d", ioc->id);
1815         ioc->reset_work_q =
1816                 create_singlethread_workqueue(ioc->reset_work_q_name);
1817         if (!ioc->reset_work_q) {
1818                 printk(MYIOC_s_ERR_FMT "Insufficient memory to add adapter!\n",
1819                     ioc->name);
1820                 pci_release_selected_regions(pdev, ioc->bars);
1821                 kfree(ioc);
1822                 return -ENOMEM;
1823         }
1824
1825         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "facts @ %p, pfacts[0] @ %p\n",
1826             ioc->name, &ioc->facts, &ioc->pfacts[0]));
1827
1828         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
1829         mpt_get_product_name(pdev->vendor, pdev->device, revision, ioc->prod_name);
1830
1831         switch (pdev->device)
1832         {
1833         case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1834         case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1835                 ioc->errata_flag_1064 = 1;
1836         case MPI_MANUFACTPAGE_DEVICEID_FC909:
1837         case MPI_MANUFACTPAGE_DEVICEID_FC929:
1838         case MPI_MANUFACTPAGE_DEVICEID_FC919:
1839         case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1840                 ioc->bus_type = FC;
1841                 break;
1842
1843         case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1844                 if (revision < XL_929) {
1845                         /* 929X Chip Fix. Set Split transactions level
1846                         * for PCIX. Set MOST bits to zero.
1847                         */
1848                         pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1849                         pcixcmd &= 0x8F;
1850                         pci_write_config_byte(pdev, 0x6a, pcixcmd);
1851                 } else {
1852                         /* 929XL Chip Fix. Set MMRBC to 0x08.
1853                         */
1854                         pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1855                         pcixcmd |= 0x08;
1856                         pci_write_config_byte(pdev, 0x6a, pcixcmd);
1857                 }
1858                 ioc->bus_type = FC;
1859                 break;
1860
1861         case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1862                 /* 919X Chip Fix. Set Split transactions level
1863                  * for PCIX. Set MOST bits to zero.
1864                  */
1865                 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1866                 pcixcmd &= 0x8F;
1867                 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1868                 ioc->bus_type = FC;
1869                 break;
1870
1871         case MPI_MANUFACTPAGE_DEVID_53C1030:
1872                 /* 1030 Chip Fix. Disable Split transactions
1873                  * for PCIX. Set MOST bits to zero if Rev < C0( = 8).
1874                  */
1875                 if (revision < C0_1030) {
1876                         pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1877                         pcixcmd &= 0x8F;
1878                         pci_write_config_byte(pdev, 0x6a, pcixcmd);
1879                 }
1880
1881         case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1882                 ioc->bus_type = SPI;
1883                 break;
1884
1885         case MPI_MANUFACTPAGE_DEVID_SAS1064:
1886         case MPI_MANUFACTPAGE_DEVID_SAS1068:
1887                 ioc->errata_flag_1064 = 1;
1888                 ioc->bus_type = SAS;
1889                 break;
1890
1891         case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1892         case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1893         case MPI_MANUFACTPAGE_DEVID_SAS1078:
1894                 ioc->bus_type = SAS;
1895                 break;
1896         }
1897
1898
1899         switch (ioc->bus_type) {
1900
1901         case SAS:
1902                 ioc->msi_enable = mpt_msi_enable_sas;
1903                 break;
1904
1905         case SPI:
1906                 ioc->msi_enable = mpt_msi_enable_spi;
1907                 break;
1908
1909         case FC:
1910                 ioc->msi_enable = mpt_msi_enable_fc;
1911                 break;
1912
1913         default:
1914                 ioc->msi_enable = 0;
1915                 break;
1916         }
1917
1918         ioc->fw_events_off = 1;
1919
1920         if (ioc->errata_flag_1064)
1921                 pci_disable_io_access(pdev);
1922
1923         spin_lock_init(&ioc->FreeQlock);
1924
1925         /* Disable all! */
1926         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1927         ioc->active = 0;
1928         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1929
1930         /* Set IOC ptr in the pcidev's driver data. */
1931         pci_set_drvdata(ioc->pcidev, ioc);
1932
1933         /* Set lookup ptr. */
1934         list_add_tail(&ioc->list, &ioc_list);
1935
1936         /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets.
1937          */
1938         mpt_detect_bound_ports(ioc, pdev);
1939
1940         INIT_LIST_HEAD(&ioc->fw_event_list);
1941         spin_lock_init(&ioc->fw_event_lock);
1942         snprintf(ioc->fw_event_q_name, MPT_KOBJ_NAME_LEN, "mpt/%d", ioc->id);
1943         ioc->fw_event_q = create_singlethread_workqueue(ioc->fw_event_q_name);
1944
1945         if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
1946             CAN_SLEEP)) != 0){
1947                 printk(MYIOC_s_ERR_FMT "didn't initialize properly! (%d)\n",
1948                     ioc->name, r);
1949
1950                 list_del(&ioc->list);
1951                 if (ioc->alt_ioc)
1952                         ioc->alt_ioc->alt_ioc = NULL;
1953                 iounmap(ioc->memmap);
1954                 if (r != -5)
1955                         pci_release_selected_regions(pdev, ioc->bars);
1956
1957                 destroy_workqueue(ioc->reset_work_q);
1958                 ioc->reset_work_q = NULL;
1959
1960                 kfree(ioc);
1961                 pci_set_drvdata(pdev, NULL);
1962                 return r;
1963         }
1964
1965         /* call per device driver probe entry point */
1966         for(cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
1967                 if(MptDeviceDriverHandlers[cb_idx] &&
1968                   MptDeviceDriverHandlers[cb_idx]->probe) {
1969                         MptDeviceDriverHandlers[cb_idx]->probe(pdev,id);
1970                 }
1971         }
1972
1973 #ifdef CONFIG_PROC_FS
1974         /*
1975          *  Create "/proc/mpt/iocN" subdirectory entry for each MPT adapter.
1976          */
1977         dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
1978         if (dent) {
1979                 proc_create_data("info", S_IRUGO, dent, &mpt_iocinfo_proc_fops, ioc);
1980                 proc_create_data("summary", S_IRUGO, dent, &mpt_summary_proc_fops, ioc);
1981         }
1982 #endif
1983
1984         if (!ioc->alt_ioc)
1985                 queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
1986                         msecs_to_jiffies(MPT_POLLING_INTERVAL));
1987
1988         return 0;
1989 }
1990
1991 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1992 /**
1993  *      mpt_detach - Remove a PCI intelligent MPT adapter.
1994  *      @pdev: Pointer to pci_dev structure
1995  */
1996
1997 void
1998 mpt_detach(struct pci_dev *pdev)
1999 {
2000         MPT_ADAPTER     *ioc = pci_get_drvdata(pdev);
2001         char pname[32];
2002         u8 cb_idx;
2003         unsigned long flags;
2004         struct workqueue_struct *wq;
2005
2006         /*
2007          * Stop polling ioc for fault condition
2008          */
2009         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
2010         wq = ioc->reset_work_q;
2011         ioc->reset_work_q = NULL;
2012         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
2013         cancel_delayed_work(&ioc->fault_reset_work);
2014         destroy_workqueue(wq);
2015
2016         spin_lock_irqsave(&ioc->fw_event_lock, flags);
2017         wq = ioc->fw_event_q;
2018         ioc->fw_event_q = NULL;
2019         spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
2020         destroy_workqueue(wq);
2021
2022         sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
2023         remove_proc_entry(pname, NULL);
2024         sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
2025         remove_proc_entry(pname, NULL);
2026         sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
2027         remove_proc_entry(pname, NULL);
2028
2029         /* call per device driver remove entry point */
2030         for(cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
2031                 if(MptDeviceDriverHandlers[cb_idx] &&
2032                   MptDeviceDriverHandlers[cb_idx]->remove) {
2033                         MptDeviceDriverHandlers[cb_idx]->remove(pdev);
2034                 }
2035         }
2036
2037         /* Disable interrupts! */
2038         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2039
2040         ioc->active = 0;
2041         synchronize_irq(pdev->irq);
2042
2043         /* Clear any lingering interrupt */
2044         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2045
2046         CHIPREG_READ32(&ioc->chip->IntStatus);
2047
2048         mpt_adapter_dispose(ioc);
2049
2050 }
2051
2052 /**************************************************************************
2053  * Power Management
2054  */
2055 #ifdef CONFIG_PM
2056 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2057 /**
2058  *      mpt_suspend - Fusion MPT base driver suspend routine.
2059  *      @pdev: Pointer to pci_dev structure
2060  *      @state: new state to enter
2061  */
2062 int
2063 mpt_suspend(struct pci_dev *pdev, pm_message_t state)
2064 {
2065         u32 device_state;
2066         MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2067
2068         device_state = pci_choose_state(pdev, state);
2069         printk(MYIOC_s_INFO_FMT "pci-suspend: pdev=0x%p, slot=%s, Entering "
2070             "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2071             device_state);
2072
2073         /* put ioc into READY_STATE */
2074         if(SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
2075                 printk(MYIOC_s_ERR_FMT
2076                 "pci-suspend:  IOC msg unit reset failed!\n", ioc->name);
2077         }
2078
2079         /* disable interrupts */
2080         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2081         ioc->active = 0;
2082
2083         /* Clear any lingering interrupt */
2084         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2085
2086         free_irq(ioc->pci_irq, ioc);
2087         if (ioc->msi_enable)
2088                 pci_disable_msi(ioc->pcidev);
2089         ioc->pci_irq = -1;
2090         pci_save_state(pdev);
2091         pci_disable_device(pdev);
2092         pci_release_selected_regions(pdev, ioc->bars);
2093         pci_set_power_state(pdev, device_state);
2094         return 0;
2095 }
2096
2097 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2098 /**
2099  *      mpt_resume - Fusion MPT base driver resume routine.
2100  *      @pdev: Pointer to pci_dev structure
2101  */
2102 int
2103 mpt_resume(struct pci_dev *pdev)
2104 {
2105         MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2106         u32 device_state = pdev->current_state;
2107         int recovery_state;
2108         int err;
2109
2110         printk(MYIOC_s_INFO_FMT "pci-resume: pdev=0x%p, slot=%s, Previous "
2111             "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2112             device_state);
2113
2114         pci_set_power_state(pdev, PCI_D0);
2115         pci_enable_wake(pdev, PCI_D0, 0);
2116         pci_restore_state(pdev);
2117         ioc->pcidev = pdev;
2118         err = mpt_mapresources(ioc);
2119         if (err)
2120                 return err;
2121
2122         if (ioc->dma_mask == DMA_BIT_MASK(64)) {
2123                 if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078)
2124                         ioc->add_sge = &mpt_add_sge_64bit_1078;
2125                 else
2126                         ioc->add_sge = &mpt_add_sge_64bit;
2127                 ioc->add_chain = &mpt_add_chain_64bit;
2128                 ioc->sg_addr_size = 8;
2129         } else {
2130
2131                 ioc->add_sge = &mpt_add_sge;
2132                 ioc->add_chain = &mpt_add_chain;
2133                 ioc->sg_addr_size = 4;
2134         }
2135         ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
2136
2137         printk(MYIOC_s_INFO_FMT "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
2138             ioc->name, (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
2139             CHIPREG_READ32(&ioc->chip->Doorbell));
2140
2141         /*
2142          * Errata workaround for SAS pci express:
2143          * Upon returning to the D0 state, the contents of the doorbell will be
2144          * stale data, and this will incorrectly signal to the host driver that
2145          * the firmware is ready to process mpt commands.   The workaround is
2146          * to issue a diagnostic reset.
2147          */
2148         if (ioc->bus_type == SAS && (pdev->device ==
2149             MPI_MANUFACTPAGE_DEVID_SAS1068E || pdev->device ==
2150             MPI_MANUFACTPAGE_DEVID_SAS1064E)) {
2151                 if (KickStart(ioc, 1, CAN_SLEEP) < 0) {
2152                         printk(MYIOC_s_WARN_FMT "pci-resume: Cannot recover\n",
2153                             ioc->name);
2154                         goto out;
2155                 }
2156         }
2157
2158         /* bring ioc to operational state */
2159         printk(MYIOC_s_INFO_FMT "Sending mpt_do_ioc_recovery\n", ioc->name);
2160         recovery_state = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
2161                                                  CAN_SLEEP);
2162         if (recovery_state != 0)
2163                 printk(MYIOC_s_WARN_FMT "pci-resume: Cannot recover, "
2164                     "error:[%x]\n", ioc->name, recovery_state);
2165         else
2166                 printk(MYIOC_s_INFO_FMT
2167                     "pci-resume: success\n", ioc->name);
2168  out:
2169         return 0;
2170
2171 }
2172 #endif
2173
2174 static int
2175 mpt_signal_reset(u8 index, MPT_ADAPTER *ioc, int reset_phase)
2176 {
2177         if ((MptDriverClass[index] == MPTSPI_DRIVER &&
2178              ioc->bus_type != SPI) ||
2179             (MptDriverClass[index] == MPTFC_DRIVER &&
2180              ioc->bus_type != FC) ||
2181             (MptDriverClass[index] == MPTSAS_DRIVER &&
2182              ioc->bus_type != SAS))
2183                 /* make sure we only call the relevant reset handler
2184                  * for the bus */
2185                 return 0;
2186         return (MptResetHandlers[index])(ioc, reset_phase);
2187 }
2188
2189 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2190 /**
2191  *      mpt_do_ioc_recovery - Initialize or recover MPT adapter.
2192  *      @ioc: Pointer to MPT adapter structure
2193  *      @reason: Event word / reason
2194  *      @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
2195  *
2196  *      This routine performs all the steps necessary to bring the IOC
2197  *      to a OPERATIONAL state.
2198  *
2199  *      This routine also pre-fetches the LAN MAC address of a Fibre Channel
2200  *      MPT adapter.
2201  *
2202  *      Returns:
2203  *               0 for success
2204  *              -1 if failed to get board READY
2205  *              -2 if READY but IOCFacts Failed
2206  *              -3 if READY but PrimeIOCFifos Failed
2207  *              -4 if READY but IOCInit Failed
2208  *              -5 if failed to enable_device and/or request_selected_regions
2209  *              -6 if failed to upload firmware
2210  */
2211 static int
2212 mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
2213 {
2214         int      hard_reset_done = 0;
2215         int      alt_ioc_ready = 0;
2216         int      hard;
2217         int      rc=0;
2218         int      ii;
2219         int      ret = 0;
2220         int      reset_alt_ioc_active = 0;
2221         int      irq_allocated = 0;
2222         u8      *a;
2223
2224         printk(MYIOC_s_INFO_FMT "Initiating %s\n", ioc->name,
2225             reason == MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery");
2226
2227         /* Disable reply interrupts (also blocks FreeQ) */
2228         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2229         ioc->active = 0;
2230
2231         if (ioc->alt_ioc) {
2232                 if (ioc->alt_ioc->active ||
2233                     reason == MPT_HOSTEVENT_IOC_RECOVER) {
2234                         reset_alt_ioc_active = 1;
2235                         /* Disable alt-IOC's reply interrupts
2236                          *  (and FreeQ) for a bit
2237                          **/
2238                         CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2239                                 0xFFFFFFFF);
2240                         ioc->alt_ioc->active = 0;
2241                 }
2242         }
2243
2244         hard = 1;
2245         if (reason == MPT_HOSTEVENT_IOC_BRINGUP)
2246                 hard = 0;
2247
2248         if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
2249                 if (hard_reset_done == -4) {
2250                         printk(MYIOC_s_WARN_FMT "Owned by PEER..skipping!\n",
2251                             ioc->name);
2252
2253                         if (reset_alt_ioc_active && ioc->alt_ioc) {
2254                                 /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */
2255                                 dprintk(ioc, printk(MYIOC_s_INFO_FMT
2256                                     "alt_ioc reply irq re-enabled\n", ioc->alt_ioc->name));
2257                                 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
2258                                 ioc->alt_ioc->active = 1;
2259                         }
2260
2261                 } else {
2262                         printk(MYIOC_s_WARN_FMT
2263                             "NOT READY WARNING!\n", ioc->name);
2264                 }
2265                 ret = -1;
2266                 goto out;
2267         }
2268
2269         /* hard_reset_done = 0 if a soft reset was performed
2270          * and 1 if a hard reset was performed.
2271          */
2272         if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
2273                 if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
2274                         alt_ioc_ready = 1;
2275                 else
2276                         printk(MYIOC_s_WARN_FMT
2277                             ": alt-ioc Not ready WARNING!\n",
2278                             ioc->alt_ioc->name);
2279         }
2280
2281         for (ii=0; ii<5; ii++) {
2282                 /* Get IOC facts! Allow 5 retries */
2283                 if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
2284                         break;
2285         }
2286
2287
2288         if (ii == 5) {
2289                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2290                     "Retry IocFacts failed rc=%x\n", ioc->name, rc));
2291                 ret = -2;
2292         } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2293                 MptDisplayIocCapabilities(ioc);
2294         }
2295
2296         if (alt_ioc_ready) {
2297                 if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
2298                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2299                             "Initial Alt IocFacts failed rc=%x\n",
2300                             ioc->name, rc));
2301                         /* Retry - alt IOC was initialized once
2302                          */
2303                         rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
2304                 }
2305                 if (rc) {
2306                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2307                             "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
2308                         alt_ioc_ready = 0;
2309                         reset_alt_ioc_active = 0;
2310                 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2311                         MptDisplayIocCapabilities(ioc->alt_ioc);
2312                 }
2313         }
2314
2315         if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP) &&
2316             (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)) {
2317                 pci_release_selected_regions(ioc->pcidev, ioc->bars);
2318                 ioc->bars = pci_select_bars(ioc->pcidev, IORESOURCE_MEM |
2319                     IORESOURCE_IO);
2320                 if (pci_enable_device(ioc->pcidev))
2321                         return -5;
2322                 if (pci_request_selected_regions(ioc->pcidev, ioc->bars,
2323                         "mpt"))
2324                         return -5;
2325         }
2326
2327         /*
2328          * Device is reset now. It must have de-asserted the interrupt line
2329          * (if it was asserted) and it should be safe to register for the
2330          * interrupt now.
2331          */
2332         if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
2333                 ioc->pci_irq = -1;
2334                 if (ioc->pcidev->irq) {
2335                         if (ioc->msi_enable && !pci_enable_msi(ioc->pcidev))
2336                                 printk(MYIOC_s_INFO_FMT "PCI-MSI enabled\n",
2337                                     ioc->name);
2338                         else
2339                                 ioc->msi_enable = 0;
2340                         rc = request_irq(ioc->pcidev->irq, mpt_interrupt,
2341                             IRQF_SHARED, ioc->name, ioc);
2342                         if (rc < 0) {
2343                                 printk(MYIOC_s_ERR_FMT "Unable to allocate "
2344                                     "interrupt %d!\n",
2345                                     ioc->name, ioc->pcidev->irq);
2346                                 if (ioc->msi_enable)
2347                                         pci_disable_msi(ioc->pcidev);
2348                                 ret = -EBUSY;
2349                                 goto out;
2350                         }
2351                         irq_allocated = 1;
2352                         ioc->pci_irq = ioc->pcidev->irq;
2353                         pci_set_master(ioc->pcidev);            /* ?? */
2354                         pci_set_drvdata(ioc->pcidev, ioc);
2355                         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2356                             "installed at interrupt %d\n", ioc->name,
2357                             ioc->pcidev->irq));
2358                 }
2359         }
2360
2361         /* Prime reply & request queues!
2362          * (mucho alloc's) Must be done prior to
2363          * init as upper addresses are needed for init.
2364          * If fails, continue with alt-ioc processing
2365          */
2366         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "PrimeIocFifos\n",
2367             ioc->name));
2368         if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
2369                 ret = -3;
2370
2371         /* May need to check/upload firmware & data here!
2372          * If fails, continue with alt-ioc processing
2373          */
2374         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "SendIocInit\n",
2375             ioc->name));
2376         if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
2377                 ret = -4;
2378 // NEW!
2379         if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
2380                 printk(MYIOC_s_WARN_FMT
2381                     ": alt-ioc (%d) FIFO mgmt alloc WARNING!\n",
2382                     ioc->alt_ioc->name, rc);
2383                 alt_ioc_ready = 0;
2384                 reset_alt_ioc_active = 0;
2385         }
2386
2387         if (alt_ioc_ready) {
2388                 if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
2389                         alt_ioc_ready = 0;
2390                         reset_alt_ioc_active = 0;
2391                         printk(MYIOC_s_WARN_FMT
2392                                 ": alt-ioc: (%d) init failure WARNING!\n",
2393                                         ioc->alt_ioc->name, rc);
2394                 }
2395         }
2396
2397         if (reason == MPT_HOSTEVENT_IOC_BRINGUP){
2398                 if (ioc->upload_fw) {
2399                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2400                             "firmware upload required!\n", ioc->name));
2401
2402                         /* Controller is not operational, cannot do upload
2403                          */
2404                         if (ret == 0) {
2405                                 rc = mpt_do_upload(ioc, sleepFlag);
2406                                 if (rc == 0) {
2407                                         if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
2408                                                 /*
2409                                                  * Maintain only one pointer to FW memory
2410                                                  * so there will not be two attempt to
2411                                                  * downloadboot onboard dual function
2412                                                  * chips (mpt_adapter_disable,
2413                                                  * mpt_diag_reset)
2414                                                  */
2415                                                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2416                                                     "mpt_upload:  alt_%s has cached_fw=%p \n",
2417                                                     ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
2418                                                 ioc->cached_fw = NULL;
2419                                         }
2420                                 } else {
2421                                         printk(MYIOC_s_WARN_FMT
2422                                             "firmware upload failure!\n", ioc->name);
2423                                         ret = -6;
2424                                 }
2425                         }
2426                 }
2427         }
2428
2429         /*  Enable MPT base driver management of EventNotification
2430          *  and EventAck handling.
2431          */
2432         if ((ret == 0) && (!ioc->facts.EventState)) {
2433                 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2434                         "SendEventNotification\n",
2435                     ioc->name));
2436                 ret = SendEventNotification(ioc, 1, sleepFlag); /* 1=Enable */
2437         }
2438
2439         if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
2440                 rc = SendEventNotification(ioc->alt_ioc, 1, sleepFlag);
2441
2442         if (ret == 0) {
2443                 /* Enable! (reply interrupt) */
2444                 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
2445                 ioc->active = 1;
2446         }
2447         if (rc == 0) {  /* alt ioc */
2448                 if (reset_alt_ioc_active && ioc->alt_ioc) {
2449                         /* (re)Enable alt-IOC! (reply interrupt) */
2450                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "alt-ioc"
2451                                 "reply irq re-enabled\n",
2452                                 ioc->alt_ioc->name));
2453                         CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2454                                 MPI_HIM_DIM);
2455                         ioc->alt_ioc->active = 1;
2456                 }
2457         }
2458
2459
2460         /*      Add additional "reason" check before call to GetLanConfigPages
2461          *      (combined with GetIoUnitPage2 call).  This prevents a somewhat
2462          *      recursive scenario; GetLanConfigPages times out, timer expired
2463          *      routine calls HardResetHandler, which calls into here again,
2464          *      and we try GetLanConfigPages again...
2465          */
2466         if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
2467
2468                 /*
2469                  * Initialize link list for inactive raid volumes.
2470                  */
2471                 mutex_init(&ioc->raid_data.inactive_list_mutex);
2472                 INIT_LIST_HEAD(&ioc->raid_data.inactive_list);
2473
2474                 switch (ioc->bus_type) {
2475
2476                 case SAS:
2477                         /* clear persistency table */
2478                         if(ioc->facts.IOCExceptions &
2479                             MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL) {
2480                                 ret = mptbase_sas_persist_operation(ioc,
2481                                     MPI_SAS_OP_CLEAR_NOT_PRESENT);
2482                                 if(ret != 0)
2483                                         goto out;
2484                         }
2485
2486                         /* Find IM volumes
2487                          */
2488                         mpt_findImVolumes(ioc);
2489
2490                         /* Check, and possibly reset, the coalescing value
2491                          */
2492                         mpt_read_ioc_pg_1(ioc);
2493
2494                         break;
2495
2496                 case FC:
2497                         if ((ioc->pfacts[0].ProtocolFlags &
2498                                 MPI_PORTFACTS_PROTOCOL_LAN) &&
2499                             (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
2500                                 /*
2501                                  *  Pre-fetch the ports LAN MAC address!
2502                                  *  (LANPage1_t stuff)
2503                                  */
2504                                 (void) GetLanConfigPages(ioc);
2505                                 a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
2506                                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2507                                         "LanAddr = %02X:%02X:%02X"
2508                                         ":%02X:%02X:%02X\n",
2509                                         ioc->name, a[5], a[4],
2510                                         a[3], a[2], a[1], a[0]));
2511                         }
2512                         break;
2513
2514                 case SPI:
2515                         /* Get NVRAM and adapter maximums from SPP 0 and 2
2516                          */
2517                         mpt_GetScsiPortSettings(ioc, 0);
2518
2519                         /* Get version and length of SDP 1
2520                          */
2521                         mpt_readScsiDevicePageHeaders(ioc, 0);
2522
2523                         /* Find IM volumes
2524                          */
2525                         if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
2526                                 mpt_findImVolumes(ioc);
2527
2528                         /* Check, and possibly reset, the coalescing value
2529                          */
2530                         mpt_read_ioc_pg_1(ioc);
2531
2532                         mpt_read_ioc_pg_4(ioc);
2533
2534                         break;
2535                 }
2536
2537                 GetIoUnitPage2(ioc);
2538                 mpt_get_manufacturing_pg_0(ioc);
2539         }
2540
2541  out:
2542         if ((ret != 0) && irq_allocated) {
2543                 free_irq(ioc->pci_irq, ioc);
2544                 if (ioc->msi_enable)
2545                         pci_disable_msi(ioc->pcidev);
2546         }
2547         return ret;
2548 }
2549
2550 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2551 /**
2552  *      mpt_detect_bound_ports - Search for matching PCI bus/dev_function
2553  *      @ioc: Pointer to MPT adapter structure
2554  *      @pdev: Pointer to (struct pci_dev) structure
2555  *
2556  *      Search for PCI bus/dev_function which matches
2557  *      PCI bus/dev_function (+/-1) for newly discovered 929,
2558  *      929X, 1030 or 1035.
2559  *
2560  *      If match on PCI dev_function +/-1 is found, bind the two MPT adapters
2561  *      using alt_ioc pointer fields in their %MPT_ADAPTER structures.
2562  */
2563 static void
2564 mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
2565 {
2566         struct pci_dev *peer=NULL;
2567         unsigned int slot = PCI_SLOT(pdev->devfn);
2568         unsigned int func = PCI_FUNC(pdev->devfn);
2569         MPT_ADAPTER *ioc_srch;
2570
2571         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "PCI device %s devfn=%x/%x,"
2572             " searching for devfn match on %x or %x\n",
2573             ioc->name, pci_name(pdev), pdev->bus->number,
2574             pdev->devfn, func-1, func+1));
2575
2576         peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func-1));
2577         if (!peer) {
2578                 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func+1));
2579                 if (!peer)
2580                         return;
2581         }
2582
2583         list_for_each_entry(ioc_srch, &ioc_list, list) {
2584                 struct pci_dev *_pcidev = ioc_srch->pcidev;
2585                 if (_pcidev == peer) {
2586                         /* Paranoia checks */
2587                         if (ioc->alt_ioc != NULL) {
2588                                 printk(MYIOC_s_WARN_FMT
2589                                     "Oops, already bound (%s <==> %s)!\n",
2590                                     ioc->name, ioc->name, ioc->alt_ioc->name);
2591                                 break;
2592                         } else if (ioc_srch->alt_ioc != NULL) {
2593                                 printk(MYIOC_s_WARN_FMT
2594                                     "Oops, already bound (%s <==> %s)!\n",
2595                                     ioc_srch->name, ioc_srch->name,
2596                                     ioc_srch->alt_ioc->name);
2597                                 break;
2598                         }
2599                         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2600                                 "FOUND! binding %s <==> %s\n",
2601                                 ioc->name, ioc->name, ioc_srch->name));
2602                         ioc_srch->alt_ioc = ioc;
2603                         ioc->alt_ioc = ioc_srch;
2604                 }
2605         }
2606         pci_dev_put(peer);
2607 }
2608
2609 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2610 /**
2611  *      mpt_adapter_disable - Disable misbehaving MPT adapter.
2612  *      @ioc: Pointer to MPT adapter structure
2613  */
2614 static void
2615 mpt_adapter_disable(MPT_ADAPTER *ioc)
2616 {
2617         int sz;
2618         int ret;
2619
2620         if (ioc->cached_fw != NULL) {
2621                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2622                         "%s: Pushing FW onto adapter\n", __func__, ioc->name));
2623                 if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)
2624                     ioc->cached_fw, CAN_SLEEP)) < 0) {
2625                         printk(MYIOC_s_WARN_FMT
2626                             ": firmware downloadboot failure (%d)!\n",
2627                             ioc->name, ret);
2628                 }
2629         }
2630
2631         /*
2632          * Put the controller into ready state (if its not already)
2633          */
2634         if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY) {
2635                 if (!SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET,
2636                     CAN_SLEEP)) {
2637                         if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY)
2638                                 printk(MYIOC_s_ERR_FMT "%s:  IOC msg unit "
2639                                     "reset failed to put ioc in ready state!\n",
2640                                     ioc->name, __func__);
2641                 } else
2642                         printk(MYIOC_s_ERR_FMT "%s:  IOC msg unit reset "
2643                             "failed!\n", ioc->name, __func__);
2644         }
2645
2646
2647         /* Disable adapter interrupts! */
2648         synchronize_irq(ioc->pcidev->irq);
2649         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2650         ioc->active = 0;
2651
2652         /* Clear any lingering interrupt */
2653         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2654         CHIPREG_READ32(&ioc->chip->IntStatus);
2655
2656         if (ioc->alloc != NULL) {
2657                 sz = ioc->alloc_sz;
2658                 dexitprintk(ioc, printk(MYIOC_s_INFO_FMT "free  @ %p, sz=%d bytes\n",
2659                     ioc->name, ioc->alloc, ioc->alloc_sz));
2660                 pci_free_consistent(ioc->pcidev, sz,
2661                                 ioc->alloc, ioc->alloc_dma);
2662                 ioc->reply_frames = NULL;
2663                 ioc->req_frames = NULL;
2664                 ioc->alloc = NULL;
2665                 ioc->alloc_total -= sz;
2666         }
2667
2668         if (ioc->sense_buf_pool != NULL) {
2669                 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
2670                 pci_free_consistent(ioc->pcidev, sz,
2671                                 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
2672                 ioc->sense_buf_pool = NULL;
2673                 ioc->alloc_total -= sz;
2674         }
2675
2676         if (ioc->events != NULL){
2677                 sz = MPTCTL_EVENT_LOG_SIZE * sizeof(MPT_IOCTL_EVENTS);
2678                 kfree(ioc->events);
2679                 ioc->events = NULL;
2680                 ioc->alloc_total -= sz;
2681         }
2682
2683         mpt_free_fw_memory(ioc);
2684
2685         kfree(ioc->spi_data.nvram);
2686         mpt_inactive_raid_list_free(ioc);
2687         kfree(ioc->raid_data.pIocPg2);
2688         kfree(ioc->raid_data.pIocPg3);
2689         ioc->spi_data.nvram = NULL;
2690         ioc->raid_data.pIocPg3 = NULL;
2691
2692         if (ioc->spi_data.pIocPg4 != NULL) {
2693                 sz = ioc->spi_data.IocPg4Sz;
2694                 pci_free_consistent(ioc->pcidev, sz,
2695                         ioc->spi_data.pIocPg4,
2696                         ioc->spi_data.IocPg4_dma);
2697                 ioc->spi_data.pIocPg4 = NULL;
2698                 ioc->alloc_total -= sz;
2699         }
2700
2701         if (ioc->ReqToChain != NULL) {
2702                 kfree(ioc->ReqToChain);
2703                 kfree(ioc->RequestNB);
2704                 ioc->ReqToChain = NULL;
2705         }
2706
2707         kfree(ioc->ChainToChain);
2708         ioc->ChainToChain = NULL;
2709
2710         if (ioc->HostPageBuffer != NULL) {
2711                 if((ret = mpt_host_page_access_control(ioc,
2712                     MPI_DB_HPBAC_FREE_BUFFER, NO_SLEEP)) != 0) {
2713                         printk(MYIOC_s_ERR_FMT
2714                            ": %s: host page buffers free failed (%d)!\n",
2715                             ioc->name, __func__, ret);
2716                 }
2717                 dexitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2718                         "HostPageBuffer free  @ %p, sz=%d bytes\n",
2719                         ioc->name, ioc->HostPageBuffer,
2720                         ioc->HostPageBuffer_sz));
2721                 pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz,
2722                     ioc->HostPageBuffer, ioc->HostPageBuffer_dma);
2723                 ioc->HostPageBuffer = NULL;
2724                 ioc->HostPageBuffer_sz = 0;
2725                 ioc->alloc_total -= ioc->HostPageBuffer_sz;
2726         }
2727
2728         pci_set_drvdata(ioc->pcidev, NULL);
2729 }
2730 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2731 /**
2732  *      mpt_adapter_dispose - Free all resources associated with an MPT adapter
2733  *      @ioc: Pointer to MPT adapter structure
2734  *
2735  *      This routine unregisters h/w resources and frees all alloc'd memory
2736  *      associated with a MPT adapter structure.
2737  */
2738 static void
2739 mpt_adapter_dispose(MPT_ADAPTER *ioc)
2740 {
2741         int sz_first, sz_last;
2742
2743         if (ioc == NULL)
2744                 return;
2745
2746         sz_first = ioc->alloc_total;
2747
2748         mpt_adapter_disable(ioc);
2749
2750         if (ioc->pci_irq != -1) {
2751                 free_irq(ioc->pci_irq, ioc);
2752                 if (ioc->msi_enable)
2753                         pci_disable_msi(ioc->pcidev);
2754                 ioc->pci_irq = -1;
2755         }
2756
2757         if (ioc->memmap != NULL) {
2758                 iounmap(ioc->memmap);
2759                 ioc->memmap = NULL;
2760         }
2761
2762         pci_disable_device(ioc->pcidev);
2763         pci_release_selected_regions(ioc->pcidev, ioc->bars);
2764
2765 #if defined(CONFIG_MTRR) && 0
2766         if (ioc->mtrr_reg > 0) {
2767                 mtrr_del(ioc->mtrr_reg, 0, 0);
2768                 dprintk(ioc, printk(MYIOC_s_INFO_FMT "MTRR region de-registered\n", ioc->name));
2769         }
2770 #endif
2771
2772         /*  Zap the adapter lookup ptr!  */
2773         list_del(&ioc->list);
2774
2775         sz_last = ioc->alloc_total;
2776         dprintk(ioc, printk(MYIOC_s_INFO_FMT "free'd %d of %d bytes\n",
2777             ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
2778
2779         if (ioc->alt_ioc)
2780                 ioc->alt_ioc->alt_ioc = NULL;
2781
2782         kfree(ioc);
2783 }
2784
2785 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2786 /**
2787  *      MptDisplayIocCapabilities - Disply IOC's capabilities.
2788  *      @ioc: Pointer to MPT adapter structure
2789  */
2790 static void
2791 MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
2792 {
2793         int i = 0;
2794
2795         printk(KERN_INFO "%s: ", ioc->name);
2796         if (ioc->prod_name)
2797                 printk("%s: ", ioc->prod_name);
2798         printk("Capabilities={");
2799
2800         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
2801                 printk("Initiator");
2802                 i++;
2803         }
2804
2805         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2806                 printk("%sTarget", i ? "," : "");
2807                 i++;
2808         }
2809
2810         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
2811                 printk("%sLAN", i ? "," : "");
2812                 i++;
2813         }
2814
2815 #if 0
2816         /*
2817          *  This would probably evoke more questions than it's worth
2818          */
2819         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2820                 printk("%sLogBusAddr", i ? "," : "");
2821                 i++;
2822         }
2823 #endif
2824
2825         printk("}\n");
2826 }
2827
2828 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2829 /**
2830  *      MakeIocReady - Get IOC to a READY state, using KickStart if needed.
2831  *      @ioc: Pointer to MPT_ADAPTER structure
2832  *      @force: Force hard KickStart of IOC
2833  *      @sleepFlag: Specifies whether the process can sleep
2834  *
2835  *      Returns:
2836  *               1 - DIAG reset and READY
2837  *               0 - READY initially OR soft reset and READY
2838  *              -1 - Any failure on KickStart
2839  *              -2 - Msg Unit Reset Failed
2840  *              -3 - IO Unit Reset Failed
2841  *              -4 - IOC owned by a PEER
2842  */
2843 static int
2844 MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
2845 {
2846         u32      ioc_state;
2847         int      statefault = 0;
2848         int      cntdn;
2849         int      hard_reset_done = 0;
2850         int      r;
2851         int      ii;
2852         int      whoinit;
2853
2854         /* Get current [raw] IOC state  */
2855         ioc_state = mpt_GetIocState(ioc, 0);
2856         dhsprintk(ioc, printk(MYIOC_s_INFO_FMT "MakeIocReady [raw] state=%08x\n", ioc->name, ioc_state));
2857
2858         /*
2859          *      Check to see if IOC got left/stuck in doorbell handshake
2860          *      grip of death.  If so, hard reset the IOC.
2861          */
2862         if (ioc_state & MPI_DOORBELL_ACTIVE) {
2863                 statefault = 1;
2864                 printk(MYIOC_s_WARN_FMT "Unexpected doorbell active!\n",
2865                                 ioc->name);
2866         }
2867
2868         /* Is it already READY? */
2869         if (!statefault &&
2870             ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_READY)) {
2871                 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2872                     "IOC is in READY state\n", ioc->name));
2873                 return 0;
2874         }
2875
2876         /*
2877          *      Check to see if IOC is in FAULT state.
2878          */
2879         if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
2880                 statefault = 2;
2881                 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state!!!\n",
2882                     ioc->name);
2883                 printk(MYIOC_s_WARN_FMT "           FAULT code = %04xh\n",
2884                     ioc->name, ioc_state & MPI_DOORBELL_DATA_MASK);
2885         }
2886
2887         /*
2888          *      Hmmm...  Did it get left operational?
2889          */
2890         if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) {
2891                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOC operational unexpected\n",
2892                                 ioc->name));
2893
2894                 /* Check WhoInit.
2895                  * If PCI Peer, exit.
2896                  * Else, if no fault conditions are present, issue a MessageUnitReset
2897                  * Else, fall through to KickStart case
2898                  */
2899                 whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT;
2900                 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2901                         "whoinit 0x%x statefault %d force %d\n",
2902                         ioc->name, whoinit, statefault, force));
2903                 if (whoinit == MPI_WHOINIT_PCI_PEER)
2904                         return -4;
2905                 else {
2906                         if ((statefault == 0 ) && (force == 0)) {
2907                                 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
2908                                         return 0;
2909                         }
2910                         statefault = 3;
2911                 }
2912         }
2913
2914         hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
2915         if (hard_reset_done < 0)
2916                 return -1;
2917
2918         /*
2919          *  Loop here waiting for IOC to come READY.
2920          */
2921         ii = 0;
2922         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 5;     /* 5 seconds */
2923
2924         while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
2925                 if (ioc_state == MPI_IOC_STATE_OPERATIONAL) {
2926                         /*
2927                          *  BIOS or previous driver load left IOC in OP state.
2928                          *  Reset messaging FIFOs.
2929                          */
2930                         if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
2931                                 printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
2932                                 return -2;
2933                         }
2934                 } else if (ioc_state == MPI_IOC_STATE_RESET) {
2935                         /*
2936                          *  Something is wrong.  Try to get IOC back
2937                          *  to a known state.
2938                          */
2939                         if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
2940                                 printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
2941                                 return -3;
2942                         }
2943                 }
2944
2945                 ii++; cntdn--;
2946                 if (!cntdn) {
2947                         printk(MYIOC_s_ERR_FMT
2948                                 "Wait IOC_READY state (0x%x) timeout(%d)!\n",
2949                                 ioc->name, ioc_state, (int)((ii+5)/HZ));
2950                         return -ETIME;
2951                 }
2952
2953                 if (sleepFlag == CAN_SLEEP) {
2954                         msleep(1);
2955                 } else {
2956                         mdelay (1);     /* 1 msec delay */
2957                 }
2958
2959         }
2960
2961         if (statefault < 3) {
2962                 printk(MYIOC_s_INFO_FMT "Recovered from %s\n", ioc->name,
2963                         statefault == 1 ? "stuck handshake" : "IOC FAULT");
2964         }
2965
2966         return hard_reset_done;
2967 }
2968
2969 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2970 /**
2971  *      mpt_GetIocState - Get the current state of a MPT adapter.
2972  *      @ioc: Pointer to MPT_ADAPTER structure
2973  *      @cooked: Request raw or cooked IOC state
2974  *
2975  *      Returns all IOC Doorbell register bits if cooked==0, else just the
2976  *      Doorbell bits in MPI_IOC_STATE_MASK.
2977  */
2978 u32
2979 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
2980 {
2981         u32 s, sc;
2982
2983         /*  Get!  */
2984         s = CHIPREG_READ32(&ioc->chip->Doorbell);
2985         sc = s & MPI_IOC_STATE_MASK;
2986
2987         /*  Save!  */
2988         ioc->last_state = sc;
2989
2990         return cooked ? sc : s;
2991 }
2992
2993 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2994 /**
2995  *      GetIocFacts - Send IOCFacts request to MPT adapter.
2996  *      @ioc: Pointer to MPT_ADAPTER structure
2997  *      @sleepFlag: Specifies whether the process can sleep
2998  *      @reason: If recovery, only update facts.
2999  *
3000  *      Returns 0 for success, non-zero for failure.
3001  */
3002 static int
3003 GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
3004 {
3005         IOCFacts_t               get_facts;
3006         IOCFactsReply_t         *facts;
3007         int                      r;
3008         int                      req_sz;
3009         int                      reply_sz;
3010         int                      sz;
3011         u32                      status, vv;
3012         u8                       shiftFactor=1;
3013
3014         /* IOC *must* NOT be in RESET state! */
3015         if (ioc->last_state == MPI_IOC_STATE_RESET) {
3016                 printk(KERN_ERR MYNAM
3017                     ": ERROR - Can't get IOCFacts, %s NOT READY! (%08x)\n",
3018                     ioc->name, ioc->last_state);
3019                 return -44;
3020         }
3021
3022         facts = &ioc->facts;
3023
3024         /* Destination (reply area)... */
3025         reply_sz = sizeof(*facts);
3026         memset(facts, 0, reply_sz);
3027
3028         /* Request area (get_facts on the stack right now!) */
3029         req_sz = sizeof(get_facts);
3030         memset(&get_facts, 0, req_sz);
3031
3032         get_facts.Function = MPI_FUNCTION_IOC_FACTS;
3033         /* Assert: All other get_facts fields are zero! */
3034
3035         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3036             "Sending get IocFacts request req_sz=%d reply_sz=%d\n",
3037             ioc->name, req_sz, reply_sz));
3038
3039         /* No non-zero fields in the get_facts request are greater than
3040          * 1 byte in size, so we can just fire it off as is.
3041          */
3042         r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
3043                         reply_sz, (u16*)facts, 5 /*seconds*/, sleepFlag);
3044         if (r != 0)
3045                 return r;
3046
3047         /*
3048          * Now byte swap (GRRR) the necessary fields before any further
3049          * inspection of reply contents.
3050          *
3051          * But need to do some sanity checks on MsgLength (byte) field
3052          * to make sure we don't zero IOC's req_sz!
3053          */
3054         /* Did we get a valid reply? */
3055         if (facts->MsgLength > offsetof(IOCFactsReply_t, RequestFrameSize)/sizeof(u32)) {
3056                 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
3057                         /*
3058                          * If not been here, done that, save off first WhoInit value
3059                          */
3060                         if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
3061                                 ioc->FirstWhoInit = facts->WhoInit;
3062                 }
3063
3064                 facts->MsgVersion = le16_to_cpu(facts->MsgVersion);
3065                 facts->MsgContext = le32_to_cpu(facts->MsgContext);
3066                 facts->IOCExceptions = le16_to_cpu(facts->IOCExceptions);
3067                 facts->IOCStatus = le16_to_cpu(facts->IOCStatus);
3068                 facts->IOCLogInfo = le32_to_cpu(facts->IOCLogInfo);
3069                 status = le16_to_cpu(facts->IOCStatus) & MPI_IOCSTATUS_MASK;
3070                 /* CHECKME! IOCStatus, IOCLogInfo */
3071
3072                 facts->ReplyQueueDepth = le16_to_cpu(facts->ReplyQueueDepth);
3073                 facts->RequestFrameSize = le16_to_cpu(facts->RequestFrameSize);
3074
3075                 /*
3076                  * FC f/w version changed between 1.1 and 1.2
3077                  *      Old: u16{Major(4),Minor(4),SubMinor(8)}
3078                  *      New: u32{Major(8),Minor(8),Unit(8),Dev(8)}
3079                  */
3080                 if (facts->MsgVersion < MPI_VERSION_01_02) {
3081                         /*
3082                          *      Handle old FC f/w style, convert to new...
3083                          */
3084                         u16      oldv = le16_to_cpu(facts->Reserved_0101_FWVersion);
3085                         facts->FWVersion.Word =
3086                                         ((oldv<<12) & 0xFF000000) |
3087                                         ((oldv<<8)  & 0x000FFF00);
3088                 } else
3089                         facts->FWVersion.Word = le32_to_cpu(facts->FWVersion.Word);
3090
3091                 facts->ProductID = le16_to_cpu(facts->ProductID);
3092
3093                 if ((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
3094                     > MPI_FW_HEADER_PID_PROD_TARGET_SCSI)
3095                         ioc->ir_firmware = 1;
3096
3097                 facts->CurrentHostMfaHighAddr =
3098                                 le32_to_cpu(facts->CurrentHostMfaHighAddr);
3099                 facts->GlobalCredits = le16_to_cpu(facts->GlobalCredits);
3100                 facts->CurrentSenseBufferHighAddr =
3101                                 le32_to_cpu(facts->CurrentSenseBufferHighAddr);
3102                 facts->CurReplyFrameSize =
3103                                 le16_to_cpu(facts->CurReplyFrameSize);
3104                 facts->IOCCapabilities = le32_to_cpu(facts->IOCCapabilities);
3105
3106                 /*
3107                  * Handle NEW (!) IOCFactsReply fields in MPI-1.01.xx
3108                  * Older MPI-1.00.xx struct had 13 dwords, and enlarged
3109                  * to 14 in MPI-1.01.0x.
3110                  */
3111                 if (facts->MsgLength >= (offsetof(IOCFactsReply_t,FWImageSize) + 7)/4 &&
3112                     facts->MsgVersion > MPI_VERSION_01_00) {
3113                         facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
3114                 }
3115
3116                 sz = facts->FWImageSize;
3117                 if ( sz & 0x01 )
3118                         sz += 1;
3119                 if ( sz & 0x02 )
3120                         sz += 2;
3121                 facts->FWImageSize = sz;
3122
3123                 if (!facts->RequestFrameSize) {
3124                         /*  Something is wrong!  */
3125                         printk(MYIOC_s_ERR_FMT "IOC reported invalid 0 request size!\n",
3126                                         ioc->name);
3127                         return -55;
3128                 }
3129
3130                 r = sz = facts->BlockSize;
3131                 vv = ((63 / (sz * 4)) + 1) & 0x03;
3132                 ioc->NB_for_64_byte_frame = vv;
3133                 while ( sz )
3134                 {
3135                         shiftFactor++;
3136                         sz = sz >> 1;
3137                 }
3138                 ioc->NBShiftFactor  = shiftFactor;
3139                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3140                     "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n",
3141                     ioc->name, vv, shiftFactor, r));
3142
3143                 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
3144                         /*
3145                          * Set values for this IOC's request & reply frame sizes,
3146                          * and request & reply queue depths...
3147                          */
3148                         ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
3149                         ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
3150                         ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
3151                         ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
3152
3153                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "reply_sz=%3d, reply_depth=%4d\n",
3154                                 ioc->name, ioc->reply_sz, ioc->reply_depth));
3155                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "req_sz  =%3d, req_depth  =%4d\n",
3156                                 ioc->name, ioc->req_sz, ioc->req_depth));
3157
3158                         /* Get port facts! */
3159                         if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
3160                                 return r;
3161                 }
3162         } else {
3163                 printk(MYIOC_s_ERR_FMT
3164                      "Invalid IOC facts reply, msgLength=%d offsetof=%zd!\n",
3165                      ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
3166                      RequestFrameSize)/sizeof(u32)));
3167                 return -66;
3168         }
3169
3170         return 0;
3171 }
3172
3173 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3174 /**
3175  *      GetPortFacts - Send PortFacts request to MPT adapter.
3176  *      @ioc: Pointer to MPT_ADAPTER structure
3177  *      @portnum: Port number
3178  *      @sleepFlag: Specifies whether the process can sleep
3179  *
3180  *      Returns 0 for success, non-zero for failure.
3181  */
3182 static int
3183 GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3184 {
3185         PortFacts_t              get_pfacts;
3186         PortFactsReply_t        *pfacts;
3187         int                      ii;
3188         int                      req_sz;
3189         int                      reply_sz;
3190         int                      max_id;
3191
3192         /* IOC *must* NOT be in RESET state! */
3193         if (ioc->last_state == MPI_IOC_STATE_RESET) {
3194                 printk(MYIOC_s_ERR_FMT "Can't get PortFacts NOT READY! (%08x)\n",
3195                     ioc->name, ioc->last_state );
3196                 return -4;
3197         }
3198
3199         pfacts = &ioc->pfacts[portnum];
3200
3201         /* Destination (reply area)...  */
3202         reply_sz = sizeof(*pfacts);
3203         memset(pfacts, 0, reply_sz);
3204
3205         /* Request area (get_pfacts on the stack right now!) */
3206         req_sz = sizeof(get_pfacts);
3207         memset(&get_pfacts, 0, req_sz);
3208
3209         get_pfacts.Function = MPI_FUNCTION_PORT_FACTS;
3210         get_pfacts.PortNumber = portnum;
3211         /* Assert: All other get_pfacts fields are zero! */
3212
3213         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending get PortFacts(%d) request\n",
3214                         ioc->name, portnum));
3215
3216         /* No non-zero fields in the get_pfacts request are greater than
3217          * 1 byte in size, so we can just fire it off as is.
3218          */
3219         ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
3220                                 reply_sz, (u16*)pfacts, 5 /*seconds*/, sleepFlag);
3221         if (ii != 0)
3222                 return ii;
3223
3224         /* Did we get a valid reply? */
3225
3226         /* Now byte swap the necessary fields in the response. */
3227         pfacts->MsgContext = le32_to_cpu(pfacts->MsgContext);
3228         pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
3229         pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
3230         pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
3231         pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
3232         pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
3233         pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
3234         pfacts->MaxPersistentIDs = le16_to_cpu(pfacts->MaxPersistentIDs);
3235         pfacts->MaxLanBuckets = le16_to_cpu(pfacts->MaxLanBuckets);
3236
3237         max_id = (ioc->bus_type == SAS) ? pfacts->PortSCSIID :
3238             pfacts->MaxDevices;
3239         ioc->devices_per_bus = (max_id > 255) ? 256 : max_id;
3240         ioc->number_of_buses = (ioc->devices_per_bus < 256) ? 1 : max_id/256;
3241
3242         /*
3243          * Place all the devices on channels
3244          *
3245          * (for debuging)
3246          */
3247         if (mpt_channel_mapping) {
3248                 ioc->devices_per_bus = 1;
3249                 ioc->number_of_buses = (max_id > 255) ? 255 : max_id;
3250         }
3251
3252         return 0;
3253 }
3254
3255 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3256 /**
3257  *      SendIocInit - Send IOCInit request to MPT adapter.
3258  *      @ioc: Pointer to MPT_ADAPTER structure
3259  *      @sleepFlag: Specifies whether the process can sleep
3260  *
3261  *      Send IOCInit followed by PortEnable to bring IOC to OPERATIONAL state.
3262  *
3263  *      Returns 0 for success, non-zero for failure.
3264  */
3265 static int
3266 SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
3267 {
3268         IOCInit_t                ioc_init;
3269         MPIDefaultReply_t        init_reply;
3270         u32                      state;
3271         int                      r;
3272         int                      count;
3273         int                      cntdn;
3274
3275         memset(&ioc_init, 0, sizeof(ioc_init));
3276         memset(&init_reply, 0, sizeof(init_reply));
3277
3278         ioc_init.WhoInit = MPI_WHOINIT_HOST_DRIVER;
3279         ioc_init.Function = MPI_FUNCTION_IOC_INIT;
3280
3281         /* If we are in a recovery mode and we uploaded the FW image,
3282          * then this pointer is not NULL. Skip the upload a second time.
3283          * Set this flag if cached_fw set for either IOC.
3284          */
3285         if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
3286                 ioc->upload_fw = 1;
3287         else
3288                 ioc->upload_fw = 0;
3289         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "upload_fw %d facts.Flags=%x\n",
3290                    ioc->name, ioc->upload_fw, ioc->facts.Flags));
3291
3292         ioc_init.MaxDevices = (U8)ioc->devices_per_bus;
3293         ioc_init.MaxBuses = (U8)ioc->number_of_buses;
3294
3295         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "facts.MsgVersion=%x\n",
3296                    ioc->name, ioc->facts.MsgVersion));
3297         if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
3298                 // set MsgVersion and HeaderVersion host driver was built with
3299                 ioc_init.MsgVersion = cpu_to_le16(MPI_VERSION);
3300                 ioc_init.HeaderVersion = cpu_to_le16(MPI_HEADER_VERSION);
3301
3302                 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
3303                         ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
3304                 } else if(mpt_host_page_alloc(ioc, &ioc_init))
3305                         return -99;
3306         }
3307         ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz);   /* in BYTES */
3308
3309         if (ioc->sg_addr_size == sizeof(u64)) {
3310                 /* Save the upper 32-bits of the request
3311                  * (reply) and sense buffers.
3312                  */
3313                 ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
3314                 ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
3315         } else {
3316                 /* Force 32-bit addressing */
3317                 ioc_init.HostMfaHighAddr = cpu_to_le32(0);
3318                 ioc_init.SenseBufferHighAddr = cpu_to_le32(0);
3319         }
3320
3321         ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
3322         ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
3323         ioc->facts.MaxDevices = ioc_init.MaxDevices;
3324         ioc->facts.MaxBuses = ioc_init.MaxBuses;
3325
3326         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOCInit (req @ %p)\n",
3327                         ioc->name, &ioc_init));
3328
3329         r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
3330                                 sizeof(MPIDefaultReply_t), (u16*)&init_reply, 10 /*seconds*/, sleepFlag);
3331         if (r != 0) {
3332                 printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
3333                 return r;
3334         }
3335
3336         /* No need to byte swap the multibyte fields in the reply
3337          * since we don't even look at its contents.
3338          */
3339
3340         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending PortEnable (req @ %p)\n",
3341                         ioc->name, &ioc_init));
3342
3343         if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
3344                 printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
3345                 return r;
3346         }
3347
3348         /* YIKES!  SUPER IMPORTANT!!!
3349          *  Poll IocState until _OPERATIONAL while IOC is doing
3350          *  LoopInit and TargetDiscovery!
3351          */
3352         count = 0;
3353         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 60;    /* 60 seconds */
3354         state = mpt_GetIocState(ioc, 1);
3355         while (state != MPI_IOC_STATE_OPERATIONAL && --cntdn) {
3356                 if (sleepFlag == CAN_SLEEP) {
3357                         msleep(1);
3358                 } else {
3359                         mdelay(1);
3360                 }
3361
3362                 if (!cntdn) {
3363                         printk(MYIOC_s_ERR_FMT "Wait IOC_OP state timeout(%d)!\n",
3364                                         ioc->name, (int)((count+5)/HZ));
3365                         return -9;
3366                 }
3367
3368                 state = mpt_GetIocState(ioc, 1);
3369                 count++;
3370         }
3371         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wait IOC_OPERATIONAL state (cnt=%d)\n",
3372                         ioc->name, count));
3373
3374         ioc->aen_event_read_flag=0;
3375         return r;
3376 }
3377
3378 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3379 /**
3380  *      SendPortEnable - Send PortEnable request to MPT adapter port.
3381  *      @ioc: Pointer to MPT_ADAPTER structure
3382  *      @portnum: Port number to enable
3383  *      @sleepFlag: Specifies whether the process can sleep
3384  *
3385  *      Send PortEnable to bring IOC to OPERATIONAL state.
3386  *
3387  *      Returns 0 for success, non-zero for failure.
3388  */
3389 static int
3390 SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3391 {
3392         PortEnable_t             port_enable;
3393         MPIDefaultReply_t        reply_buf;
3394         int      rc;
3395         int      req_sz;
3396         int      reply_sz;
3397
3398         /*  Destination...  */
3399         reply_sz = sizeof(MPIDefaultReply_t);
3400         memset(&reply_buf, 0, reply_sz);
3401
3402         req_sz = sizeof(PortEnable_t);
3403         memset(&port_enable, 0, req_sz);
3404
3405         port_enable.Function = MPI_FUNCTION_PORT_ENABLE;
3406         port_enable.PortNumber = portnum;
3407 /*      port_enable.ChainOffset = 0;            */
3408 /*      port_enable.MsgFlags = 0;               */
3409 /*      port_enable.MsgContext = 0;             */
3410
3411         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Port(%d)Enable (req @ %p)\n",
3412                         ioc->name, portnum, &port_enable));
3413
3414         /* RAID FW may take a long time to enable
3415          */
3416         if (ioc->ir_firmware || ioc->bus_type == SAS) {
3417                 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3418                 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3419                 300 /*seconds*/, sleepFlag);
3420         } else {
3421                 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3422                 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3423                 30 /*seconds*/, sleepFlag);
3424         }
3425         return rc;
3426 }
3427
3428 /**
3429  *      mpt_alloc_fw_memory - allocate firmware memory
3430  *      @ioc: Pointer to MPT_ADAPTER structure
3431  *      @size: total FW bytes
3432  *
3433  *      If memory has already been allocated, the same (cached) value
3434  *      is returned.
3435  *
3436  *      Return 0 if successful, or non-zero for failure
3437  **/
3438 int
3439 mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
3440 {
3441         int rc;
3442
3443         if (ioc->cached_fw) {
3444                 rc = 0;  /* use already allocated memory */
3445                 goto out;
3446         }
3447         else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
3448                 ioc->cached_fw = ioc->alt_ioc->cached_fw;  /* use alt_ioc's memory */
3449                 ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
3450                 rc = 0;
3451                 goto out;
3452         }
3453         ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma);
3454         if (!ioc->cached_fw) {
3455                 printk(MYIOC_s_ERR_FMT "Unable to allocate memory for the cached firmware image!\n",
3456                     ioc->name);
3457                 rc = -1;
3458         } else {
3459                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3460                     ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, size, size));
3461                 ioc->alloc_total += size;
3462                 rc = 0;
3463         }
3464  out:
3465         return rc;
3466 }
3467
3468 /**
3469  *      mpt_free_fw_memory - free firmware memory
3470  *      @ioc: Pointer to MPT_ADAPTER structure
3471  *
3472  *      If alt_img is NULL, delete from ioc structure.
3473  *      Else, delete a secondary image in same format.
3474  **/
3475 void
3476 mpt_free_fw_memory(MPT_ADAPTER *ioc)
3477 {
3478         int sz;
3479
3480         if (!ioc->cached_fw)
3481                 return;
3482
3483         sz = ioc->facts.FWImageSize;
3484         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "free_fw_memory: FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3485                  ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3486         pci_free_consistent(ioc->pcidev, sz, ioc->cached_fw, ioc->cached_fw_dma);
3487         ioc->alloc_total -= sz;
3488         ioc->cached_fw = NULL;
3489 }
3490
3491 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3492 /**
3493  *      mpt_do_upload - Construct and Send FWUpload request to MPT adapter port.
3494  *      @ioc: Pointer to MPT_ADAPTER structure
3495  *      @sleepFlag: Specifies whether the process can sleep
3496  *
3497  *      Returns 0 for success, >0 for handshake failure
3498  *              <0 for fw upload failure.
3499  *
3500  *      Remark: If bound IOC and a successful FWUpload was performed
3501  *      on the bound IOC, the second image is discarded
3502  *      and memory is free'd. Both channels must upload to prevent
3503  *      IOC from running in degraded mode.
3504  */
3505 static int
3506 mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
3507 {
3508         u8                       reply[sizeof(FWUploadReply_t)];
3509         FWUpload_t              *prequest;
3510         FWUploadReply_t         *preply;
3511         FWUploadTCSGE_t         *ptcsge;
3512         u32                      flagsLength;
3513         int                      ii, sz, reply_sz;
3514         int                      cmdStatus;
3515         int                     request_size;
3516         /* If the image size is 0, we are done.
3517          */
3518         if ((sz = ioc->facts.FWImageSize) == 0)
3519                 return 0;
3520
3521         if (mpt_alloc_fw_memory(ioc, ioc->facts.FWImageSize) != 0)
3522                 return -ENOMEM;
3523
3524         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3525             ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3526
3527         prequest = (sleepFlag == NO_SLEEP) ? kzalloc(ioc->req_sz, GFP_ATOMIC) :
3528             kzalloc(ioc->req_sz, GFP_KERNEL);
3529         if (!prequest) {
3530                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed "
3531                     "while allocating memory \n", ioc->name));
3532                 mpt_free_fw_memory(ioc);
3533                 return -ENOMEM;
3534         }
3535
3536         preply = (FWUploadReply_t *)&reply;
3537
3538         reply_sz = sizeof(reply);
3539         memset(preply, 0, reply_sz);
3540
3541         prequest->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
3542         prequest->Function = MPI_FUNCTION_FW_UPLOAD;
3543
3544         ptcsge = (FWUploadTCSGE_t *) &prequest->SGL;
3545         ptcsge->DetailsLength = 12;
3546         ptcsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
3547         ptcsge->ImageSize = cpu_to_le32(sz);
3548         ptcsge++;
3549
3550         flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | sz;
3551         ioc->add_sge((char *)ptcsge, flagsLength, ioc->cached_fw_dma);
3552         request_size = offsetof(FWUpload_t, SGL) + sizeof(FWUploadTCSGE_t) +
3553             ioc->SGE_size;
3554         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending FW Upload "
3555             " (req @ %p) fw_size=%d mf_request_size=%d\n", ioc->name, prequest,
3556             ioc->facts.FWImageSize, request_size));
3557         DBG_DUMP_FW_REQUEST_FRAME(ioc, (u32 *)prequest);
3558
3559         ii = mpt_handshake_req_reply_wait(ioc, request_size, (u32 *)prequest,
3560             reply_sz, (u16 *)preply, 65 /*seconds*/, sleepFlag);
3561
3562         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Upload completed "
3563             "rc=%x \n", ioc->name, ii));
3564
3565         cmdStatus = -EFAULT;
3566         if (ii == 0) {
3567                 /* Handshake transfer was complete and successful.
3568                  * Check the Reply Frame.
3569                  */
3570                 int status;
3571                 status = le16_to_cpu(preply->IOCStatus) &
3572                                 MPI_IOCSTATUS_MASK;
3573                 if (status == MPI_IOCSTATUS_SUCCESS &&
3574                     ioc->facts.FWImageSize ==
3575                     le32_to_cpu(preply->ActualImageSize))
3576                                 cmdStatus = 0;
3577         }
3578         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": do_upload cmdStatus=%d \n",
3579                         ioc->name, cmdStatus));
3580
3581
3582         if (cmdStatus) {
3583                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed, "
3584                     "freeing image \n", ioc->name));
3585                 mpt_free_fw_memory(ioc);
3586         }
3587         kfree(prequest);
3588
3589         return cmdStatus;
3590 }
3591
3592 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3593 /**
3594  *      mpt_downloadboot - DownloadBoot code
3595  *      @ioc: Pointer to MPT_ADAPTER structure
3596  *      @pFwHeader: Pointer to firmware header info
3597  *      @sleepFlag: Specifies whether the process can sleep
3598  *
3599  *      FwDownloadBoot requires Programmed IO access.
3600  *
3601  *      Returns 0 for success
3602  *              -1 FW Image size is 0
3603  *              -2 No valid cached_fw Pointer
3604  *              <0 for fw upload failure.
3605  */
3606 static int
3607 mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
3608 {
3609         MpiExtImageHeader_t     *pExtImage;
3610         u32                      fwSize;
3611         u32                      diag0val;
3612         int                      count;
3613         u32                     *ptrFw;
3614         u32                      diagRwData;
3615         u32                      nextImage;
3616         u32                      load_addr;
3617         u32                      ioc_state=0;
3618
3619         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
3620                                 ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
3621
3622         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3623         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3624         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3625         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3626         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3627         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3628
3629         CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
3630
3631         /* wait 1 msec */
3632         if (sleepFlag == CAN_SLEEP) {
3633                 msleep(1);
3634         } else {
3635                 mdelay (1);
3636         }
3637
3638         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3639         CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
3640
3641         for (count = 0; count < 30; count ++) {
3642                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3643                 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
3644                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RESET_ADAPTER cleared, count=%d\n",
3645                                 ioc->name, count));
3646                         break;
3647                 }
3648                 /* wait .1 sec */
3649                 if (sleepFlag == CAN_SLEEP) {
3650                         msleep (100);
3651                 } else {
3652                         mdelay (100);
3653                 }
3654         }
3655
3656         if ( count == 30 ) {
3657                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot failed! "
3658                 "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n",
3659                 ioc->name, diag0val));
3660                 return -3;
3661         }
3662
3663         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3664         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3665         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3666         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3667         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3668         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3669
3670         /* Set the DiagRwEn and Disable ARM bits */
3671         CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
3672
3673         fwSize = (pFwHeader->ImageSize + 3)/4;
3674         ptrFw = (u32 *) pFwHeader;
3675
3676         /* Write the LoadStartAddress to the DiagRw Address Register
3677          * using Programmed IO
3678          */
3679         if (ioc->errata_flag_1064)
3680                 pci_enable_io_access(ioc->pcidev);
3681
3682         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
3683         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "LoadStart addr written 0x%x \n",
3684                 ioc->name, pFwHeader->LoadStartAddress));
3685
3686         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write FW Image: 0x%x bytes @ %p\n",
3687                                 ioc->name, fwSize*4, ptrFw));
3688         while (fwSize--) {
3689                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3690         }
3691
3692         nextImage = pFwHeader->NextImageHeaderOffset;
3693         while (nextImage) {
3694                 pExtImage = (MpiExtImageHeader_t *) ((char *)pFwHeader + nextImage);
3695
3696                 load_addr = pExtImage->LoadStartAddress;
3697
3698                 fwSize = (pExtImage->ImageSize + 3) >> 2;
3699                 ptrFw = (u32 *)pExtImage;
3700
3701                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
3702                                                 ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
3703                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
3704
3705                 while (fwSize--) {
3706                         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3707                 }
3708                 nextImage = pExtImage->NextImageHeaderOffset;
3709         }
3710
3711         /* Write the IopResetVectorRegAddr */
3712         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Addr=%x! \n", ioc->name,  pFwHeader->IopResetRegAddr));
3713         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
3714
3715         /* Write the IopResetVectorValue */
3716         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
3717         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
3718
3719         /* Clear the internal flash bad bit - autoincrementing register,
3720          * so must do two writes.
3721          */
3722         if (ioc->bus_type == SPI) {
3723                 /*
3724                  * 1030 and 1035 H/W errata, workaround to access
3725                  * the ClearFlashBadSignatureBit
3726                  */
3727                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3728                 diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
3729                 diagRwData |= 0x40000000;
3730                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3731                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
3732
3733         } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
3734                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3735                 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
3736                     MPI_DIAG_CLEAR_FLASH_BAD_SIG);
3737
3738                 /* wait 1 msec */
3739                 if (sleepFlag == CAN_SLEEP) {
3740                         msleep (1);
3741                 } else {
3742                         mdelay (1);
3743                 }
3744         }
3745
3746         if (ioc->errata_flag_1064)
3747                 pci_disable_io_access(ioc->pcidev);
3748
3749         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3750         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot diag0val=%x, "
3751                 "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n",
3752                 ioc->name, diag0val));
3753         diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE);
3754         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot now diag0val=%x\n",
3755                 ioc->name, diag0val));
3756         CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3757
3758         /* Write 0xFF to reset the sequencer */
3759         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3760
3761         if (ioc->bus_type == SAS) {
3762                 ioc_state = mpt_GetIocState(ioc, 0);
3763                 if ( (GetIocFacts(ioc, sleepFlag,
3764                                 MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) {
3765                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "GetIocFacts failed: IocState=%x\n",
3766                                         ioc->name, ioc_state));
3767                         return -EFAULT;
3768                 }
3769         }
3770
3771         for (count=0; count<HZ*20; count++) {
3772                 if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
3773                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3774                                 "downloadboot successful! (count=%d) IocState=%x\n",
3775                                 ioc->name, count, ioc_state));
3776                         if (ioc->bus_type == SAS) {
3777                                 return 0;
3778                         }
3779                         if ((SendIocInit(ioc, sleepFlag)) != 0) {
3780                                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3781                                         "downloadboot: SendIocInit failed\n",
3782                                         ioc->name));
3783                                 return -EFAULT;
3784                         }
3785                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3786                                         "downloadboot: SendIocInit successful\n",
3787                                         ioc->name));
3788                         return 0;
3789                 }
3790                 if (sleepFlag == CAN_SLEEP) {
3791                         msleep (10);
3792                 } else {
3793                         mdelay (10);
3794                 }
3795         }
3796         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3797                 "downloadboot failed! IocState=%x\n",ioc->name, ioc_state));
3798         return -EFAULT;
3799 }
3800
3801 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3802 /**
3803  *      KickStart - Perform hard reset of MPT adapter.
3804  *      @ioc: Pointer to MPT_ADAPTER structure
3805  *      @force: Force hard reset
3806  *      @sleepFlag: Specifies whether the process can sleep
3807  *
3808  *      This routine places MPT adapter in diagnostic mode via the
3809  *      WriteSequence register, and then performs a hard reset of adapter
3810  *      via the Diagnostic register.
3811  *
3812  *      Inputs:   sleepflag - CAN_SLEEP (non-interrupt thread)
3813  *                      or NO_SLEEP (interrupt thread, use mdelay)
3814  *                force - 1 if doorbell active, board fault state
3815  *                              board operational, IOC_RECOVERY or
3816  *                              IOC_BRINGUP and there is an alt_ioc.
3817  *                        0 else
3818  *
3819  *      Returns:
3820  *               1 - hard reset, READY
3821  *               0 - no reset due to History bit, READY
3822  *              -1 - no reset due to History bit but not READY
3823  *                   OR reset but failed to come READY
3824  *              -2 - no reset, could not enter DIAG mode
3825  *              -3 - reset but bad FW bit
3826  */
3827 static int
3828 KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
3829 {
3830         int hard_reset_done = 0;
3831         u32 ioc_state=0;
3832         int cnt,cntdn;
3833
3834         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStarting!\n", ioc->name));
3835         if (ioc->bus_type == SPI) {
3836                 /* Always issue a Msg Unit Reset first. This will clear some
3837                  * SCSI bus hang conditions.
3838                  */
3839                 SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
3840
3841                 if (sleepFlag == CAN_SLEEP) {
3842                         msleep (1000);
3843                 } else {
3844                         mdelay (1000);
3845                 }
3846         }
3847
3848         hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
3849         if (hard_reset_done < 0)
3850                 return hard_reset_done;
3851
3852         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset successful!\n",
3853                 ioc->name));
3854
3855         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2;     /* 2 seconds */
3856         for (cnt=0; cnt<cntdn; cnt++) {
3857                 ioc_state = mpt_GetIocState(ioc, 1);
3858                 if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) {
3859                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStart successful! (cnt=%d)\n",
3860                                         ioc->name, cnt));
3861                         return hard_reset_done;
3862                 }
3863                 if (sleepFlag == CAN_SLEEP) {
3864                         msleep (10);
3865                 } else {
3866                         mdelay (10);
3867                 }
3868         }
3869
3870         dinitprintk(ioc, printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
3871                 ioc->name, mpt_GetIocState(ioc, 0)));
3872         return -1;
3873 }
3874
3875 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3876 /**
3877  *      mpt_diag_reset - Perform hard reset of the adapter.
3878  *      @ioc: Pointer to MPT_ADAPTER structure
3879  *      @ignore: Set if to honor and clear to ignore
3880  *              the reset history bit
3881  *      @sleepFlag: CAN_SLEEP if called in a non-interrupt thread,
3882  *              else set to NO_SLEEP (use mdelay instead)
3883  *
3884  *      This routine places the adapter in diagnostic mode via the
3885  *      WriteSequence register and then performs a hard reset of adapter
3886  *      via the Diagnostic register. Adapter should be in ready state
3887  *      upon successful completion.
3888  *
3889  *      Returns:  1  hard reset successful
3890  *                0  no reset performed because reset history bit set
3891  *               -2  enabling diagnostic mode failed
3892  *               -3  diagnostic reset failed
3893  */
3894 static int
3895 mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
3896 {
3897         u32 diag0val;
3898         u32 doorbell;
3899         int hard_reset_done = 0;
3900         int count = 0;
3901         u32 diag1val = 0;
3902         MpiFwHeader_t *cached_fw;       /* Pointer to FW */
3903         u8       cb_idx;
3904
3905         /* Clear any existing interrupts */
3906         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3907
3908         if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) {
3909
3910                 if (!ignore)
3911                         return 0;
3912
3913                 drsprintk(ioc, printk(MYIOC_s_WARN_FMT "%s: Doorbell=%p; 1078 reset "
3914                         "address=%p\n",  ioc->name, __func__,
3915                         &ioc->chip->Doorbell, &ioc->chip->Reset_1078));
3916                 CHIPREG_WRITE32(&ioc->chip->Reset_1078, 0x07);
3917                 if (sleepFlag == CAN_SLEEP)
3918                         msleep(1);
3919                 else
3920                         mdelay(1);
3921
3922                 /*
3923                  * Call each currently registered protocol IOC reset handler
3924                  * with pre-reset indication.
3925                  * NOTE: If we're doing _IOC_BRINGUP, there can be no
3926                  * MptResetHandlers[] registered yet.
3927                  */
3928                 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
3929                         if (MptResetHandlers[cb_idx])
3930                                 (*(MptResetHandlers[cb_idx]))(ioc,
3931                                                 MPT_IOC_PRE_RESET);
3932                 }
3933
3934                 for (count = 0; count < 60; count ++) {
3935                         doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
3936                         doorbell &= MPI_IOC_STATE_MASK;
3937
3938                         drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3939                                 "looking for READY STATE: doorbell=%x"
3940                                 " count=%d\n",
3941                                 ioc->name, doorbell, count));
3942
3943                         if (doorbell == MPI_IOC_STATE_READY) {
3944                                 return 1;
3945                         }
3946
3947                         /* wait 1 sec */
3948                         if (sleepFlag == CAN_SLEEP)
3949                                 msleep(1000);
3950                         else
3951                                 mdelay(1000);
3952                 }
3953                 return -1;
3954         }
3955
3956         /* Use "Diagnostic reset" method! (only thing available!) */
3957         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3958
3959         if (ioc->debug_level & MPT_DEBUG) {
3960                 if (ioc->alt_ioc)
3961                         diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3962                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG1: diag0=%08x, diag1=%08x\n",
3963                         ioc->name, diag0val, diag1val));
3964         }
3965
3966         /* Do the reset if we are told to ignore the reset history
3967          * or if the reset history is 0
3968          */
3969         if (ignore || !(diag0val & MPI_DIAG_RESET_HISTORY)) {
3970                 while ((diag0val & MPI_DIAG_DRWE) == 0) {
3971                         /* Write magic sequence to WriteSequence register
3972                          * Loop until in diagnostic mode
3973                          */
3974                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3975                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3976                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3977                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3978                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3979                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3980
3981                         /* wait 100 msec */
3982                         if (sleepFlag == CAN_SLEEP) {
3983                                 msleep (100);
3984                         } else {
3985                                 mdelay (100);
3986                         }
3987
3988                         count++;
3989                         if (count > 20) {
3990                                 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
3991                                                 ioc->name, diag0val);
3992                                 return -2;
3993
3994                         }
3995
3996                         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3997
3998                         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wrote magic DiagWriteEn sequence (%x)\n",
3999                                         ioc->name, diag0val));
4000                 }
4001
4002                 if (ioc->debug_level & MPT_DEBUG) {
4003                         if (ioc->alt_ioc)
4004                                 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4005                         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG2: diag0=%08x, diag1=%08x\n",
4006                                 ioc->name, diag0val, diag1val));
4007                 }
4008                 /*
4009                  * Disable the ARM (Bug fix)
4010                  *
4011                  */
4012                 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);
4013                 mdelay(1);
4014
4015                 /*
4016                  * Now hit the reset bit in the Diagnostic register
4017                  * (THE BIG HAMMER!) (Clears DRWE bit).
4018                  */
4019                 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
4020                 hard_reset_done = 1;
4021                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset performed\n",
4022                                 ioc->name));
4023
4024                 /*
4025                  * Call each currently registered protocol IOC reset handler
4026                  * with pre-reset indication.
4027                  * NOTE: If we're doing _IOC_BRINGUP, there can be no
4028                  * MptResetHandlers[] registered yet.
4029                  */
4030                 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
4031                         if (MptResetHandlers[cb_idx]) {
4032                                 mpt_signal_reset(cb_idx,
4033                                         ioc, MPT_IOC_PRE_RESET);
4034                                 if (ioc->alt_ioc) {
4035                                         mpt_signal_reset(cb_idx,
4036                                         ioc->alt_ioc, MPT_IOC_PRE_RESET);
4037                                 }
4038                         }
4039                 }
4040
4041                 if (ioc->cached_fw)
4042                         cached_fw = (MpiFwHeader_t *)ioc->cached_fw;
4043                 else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw)
4044                         cached_fw = (MpiFwHeader_t *)ioc->alt_ioc->cached_fw;
4045                 else
4046                         cached_fw = NULL;
4047                 if (cached_fw) {
4048                         /* If the DownloadBoot operation fails, the
4049                          * IOC will be left unusable. This is a fatal error
4050                          * case.  _diag_reset will return < 0
4051                          */
4052                         for (count = 0; count < 30; count ++) {
4053                                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4054                                 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
4055                                         break;
4056                                 }
4057
4058                                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "cached_fw: diag0val=%x count=%d\n",
4059                                         ioc->name, diag0val, count));
4060                                 /* wait 1 sec */
4061                                 if (sleepFlag == CAN_SLEEP) {
4062                                         msleep (1000);
4063                                 } else {
4064                                         mdelay (1000);
4065                                 }
4066                         }
4067                         if ((count = mpt_downloadboot(ioc, cached_fw, sleepFlag)) < 0) {
4068                                 printk(MYIOC_s_WARN_FMT
4069                                         "firmware downloadboot failure (%d)!\n", ioc->name, count);
4070                         }
4071
4072                 } else {
4073                         /* Wait for FW to reload and for board
4074                          * to go to the READY state.
4075                          * Maximum wait is 60 seconds.
4076                          * If fail, no error will check again
4077                          * with calling program.
4078                          */
4079                         for (count = 0; count < 60; count ++) {
4080                                 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
4081                                 doorbell &= MPI_IOC_STATE_MASK;
4082
4083                                 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4084                                     "looking for READY STATE: doorbell=%x"
4085                                     " count=%d\n", ioc->name, doorbell, count));
4086
4087                                 if (doorbell == MPI_IOC_STATE_READY) {
4088                                         break;
4089                                 }
4090
4091                                 /* wait 1 sec */
4092                                 if (sleepFlag == CAN_SLEEP) {
4093                                         msleep (1000);
4094                                 } else {
4095                                         mdelay (1000);
4096                                 }
4097                         }
4098
4099                         if (doorbell != MPI_IOC_STATE_READY)
4100                                 printk(MYIOC_s_ERR_FMT "Failed to come READY "
4101                                     "after reset! IocState=%x", ioc->name,
4102                                     doorbell);
4103                 }
4104         }
4105
4106         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4107         if (ioc->debug_level & MPT_DEBUG) {
4108                 if (ioc->alt_ioc)
4109                         diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4110                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG3: diag0=%08x, diag1=%08x\n",
4111                         ioc->name, diag0val, diag1val));
4112         }
4113
4114         /* Clear RESET_HISTORY bit!  Place board in the
4115          * diagnostic mode to update the diag register.
4116          */
4117         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4118         count = 0;
4119         while ((diag0val & MPI_DIAG_DRWE) == 0) {
4120                 /* Write magic sequence to WriteSequence register
4121                  * Loop until in diagnostic mode
4122                  */
4123                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
4124                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
4125                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
4126                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
4127                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
4128                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
4129
4130                 /* wait 100 msec */
4131                 if (sleepFlag == CAN_SLEEP) {
4132                         msleep (100);
4133                 } else {
4134                         mdelay (100);
4135                 }
4136
4137                 count++;
4138                 if (count > 20) {
4139                         printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
4140                                         ioc->name, diag0val);
4141                         break;
4142                 }
4143                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4144         }
4145         diag0val &= ~MPI_DIAG_RESET_HISTORY;
4146         CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
4147         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4148         if (diag0val & MPI_DIAG_RESET_HISTORY) {
4149                 printk(MYIOC_s_WARN_FMT "ResetHistory bit failed to clear!\n",
4150                                 ioc->name);
4151         }
4152
4153         /* Disable Diagnostic Mode
4154          */
4155         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);
4156
4157         /* Check FW reload status flags.
4158          */
4159         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4160         if (diag0val & (MPI_DIAG_FLASH_BAD_SIG | MPI_DIAG_RESET_ADAPTER | MPI_DIAG_DISABLE_ARM)) {
4161                 printk(MYIOC_s_ERR_FMT "Diagnostic reset FAILED! (%02xh)\n",
4162                                 ioc->name, diag0val);
4163                 return -3;
4164         }
4165
4166         if (ioc->debug_level & MPT_DEBUG) {
4167                 if (ioc->alt_ioc)
4168                         diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4169                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG4: diag0=%08x, diag1=%08x\n",
4170                         ioc->name, diag0val, diag1val));
4171         }
4172
4173         /*
4174          * Reset flag that says we've enabled event notification
4175          */
4176         ioc->facts.EventState = 0;
4177
4178         if (ioc->alt_ioc)
4179                 ioc->alt_ioc->facts.EventState = 0;
4180
4181         return hard_reset_done;
4182 }
4183
4184 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4185 /**
4186  *      SendIocReset - Send IOCReset request to MPT adapter.
4187  *      @ioc: Pointer to MPT_ADAPTER structure
4188  *      @reset_type: reset type, expected values are
4189  *      %MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET or %MPI_FUNCTION_IO_UNIT_RESET
4190  *      @sleepFlag: Specifies whether the process can sleep
4191  *
4192  *      Send IOCReset request to the MPT adapter.
4193  *
4194  *      Returns 0 for success, non-zero for failure.
4195  */
4196 static int
4197 SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag)
4198 {
4199         int r;
4200         u32 state;
4201         int cntdn, count;
4202
4203         drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOC reset(0x%02x)!\n",
4204                         ioc->name, reset_type));
4205         CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT);
4206         if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4207                 return r;
4208
4209         /* FW ACK'd request, wait for READY state
4210          */
4211         count = 0;
4212         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 15;    /* 15 seconds */
4213
4214         while ((state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
4215                 cntdn--;
4216                 count++;
4217                 if (!cntdn) {
4218                         if (sleepFlag != CAN_SLEEP)
4219                                 count *= 10;
4220
4221                         printk(MYIOC_s_ERR_FMT
4222                             "Wait IOC_READY state (0x%x) timeout(%d)!\n",
4223                             ioc->name, state, (int)((count+5)/HZ));
4224                         return -ETIME;
4225                 }
4226
4227                 if (sleepFlag == CAN_SLEEP) {
4228                         msleep(1);
4229                 } else {
4230                         mdelay (1);     /* 1 msec delay */
4231                 }
4232         }
4233
4234         /* TODO!
4235          *  Cleanup all event stuff for this IOC; re-issue EventNotification
4236          *  request if needed.
4237          */
4238         if (ioc->facts.Function)
4239                 ioc->facts.EventState = 0;
4240
4241         return 0;
4242 }
4243
4244 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4245 /**
4246  *      initChainBuffers - Allocate memory for and initialize chain buffers
4247  *      @ioc: Pointer to MPT_ADAPTER structure
4248  *
4249  *      Allocates memory for and initializes chain buffers,
4250  *      chain buffer control arrays and spinlock.
4251  */
4252 static int
4253 initChainBuffers(MPT_ADAPTER *ioc)
4254 {
4255         u8              *mem;
4256         int             sz, ii, num_chain;
4257         int             scale, num_sge, numSGE;
4258
4259         /* ReqToChain size must equal the req_depth
4260          * index = req_idx
4261          */
4262         if (ioc->ReqToChain == NULL) {
4263                 sz = ioc->req_depth * sizeof(int);
4264                 mem = kmalloc(sz, GFP_ATOMIC);
4265                 if (mem == NULL)
4266                         return -1;
4267
4268                 ioc->ReqToChain = (int *) mem;
4269                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReqToChain alloc  @ %p, sz=%d bytes\n",
4270                                 ioc->name, mem, sz));
4271                 mem = kmalloc(sz, GFP_ATOMIC);
4272                 if (mem == NULL)
4273                         return -1;
4274
4275                 ioc->RequestNB = (int *) mem;
4276                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestNB alloc  @ %p, sz=%d bytes\n",
4277                                 ioc->name, mem, sz));
4278         }
4279         for (ii = 0; ii < ioc->req_depth; ii++) {
4280                 ioc->ReqToChain[ii] = MPT_HOST_NO_CHAIN;
4281         }
4282
4283         /* ChainToChain size must equal the total number
4284          * of chain buffers to be allocated.
4285          * index = chain_idx
4286          *
4287          * Calculate the number of chain buffers needed(plus 1) per I/O
4288          * then multiply the maximum number of simultaneous cmds
4289          *
4290          * num_sge = num sge in request frame + last chain buffer
4291          * scale = num sge per chain buffer if no chain element
4292          */
4293         scale = ioc->req_sz / ioc->SGE_size;
4294         if (ioc->sg_addr_size == sizeof(u64))
4295                 num_sge =  scale + (ioc->req_sz - 60) / ioc->SGE_size;
4296         else
4297                 num_sge =  1 + scale + (ioc->req_sz - 64) / ioc->SGE_size;
4298
4299         if (ioc->sg_addr_size == sizeof(u64)) {
4300                 numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
4301                         (ioc->req_sz - 60) / ioc->SGE_size;
4302         } else {
4303                 numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) +
4304                     scale + (ioc->req_sz - 64) / ioc->SGE_size;
4305         }
4306         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "num_sge=%d numSGE=%d\n",
4307                 ioc->name, num_sge, numSGE));
4308
4309         if (ioc->bus_type == FC) {
4310                 if (numSGE > MPT_SCSI_FC_SG_DEPTH)
4311                         numSGE = MPT_SCSI_FC_SG_DEPTH;
4312         } else {
4313                 if (numSGE > MPT_SCSI_SG_DEPTH)
4314                         numSGE = MPT_SCSI_SG_DEPTH;
4315         }
4316
4317         num_chain = 1;
4318         while (numSGE - num_sge > 0) {
4319                 num_chain++;
4320                 num_sge += (scale - 1);
4321         }
4322         num_chain++;
4323
4324         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Now numSGE=%d num_sge=%d num_chain=%d\n",
4325                 ioc->name, numSGE, num_sge, num_chain));
4326
4327         if (ioc->bus_type == SPI)
4328                 num_chain *= MPT_SCSI_CAN_QUEUE;
4329         else if (ioc->bus_type == SAS)
4330                 num_chain *= MPT_SAS_CAN_QUEUE;
4331         else
4332                 num_chain *= MPT_FC_CAN_QUEUE;
4333
4334         ioc->num_chain = num_chain;
4335
4336         sz = num_chain * sizeof(int);
4337         if (ioc->ChainToChain == NULL) {
4338                 mem = kmalloc(sz, GFP_ATOMIC);
4339                 if (mem == NULL)
4340                         return -1;
4341
4342                 ioc->ChainToChain = (int *) mem;
4343                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainToChain alloc @ %p, sz=%d bytes\n",
4344                                 ioc->name, mem, sz));
4345         } else {
4346                 mem = (u8 *) ioc->ChainToChain;
4347         }
4348         memset(mem, 0xFF, sz);
4349         return num_chain;
4350 }
4351
4352 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4353 /**
4354  *      PrimeIocFifos - Initialize IOC request and reply FIFOs.
4355  *      @ioc: Pointer to MPT_ADAPTER structure
4356  *
4357  *      This routine allocates memory for the MPT reply and request frame
4358  *      pools (if necessary), and primes the IOC reply FIFO with
4359  *      reply frames.
4360  *
4361  *      Returns 0 for success, non-zero for failure.
4362  */
4363 static int
4364 PrimeIocFifos(MPT_ADAPTER *ioc)
4365 {
4366         MPT_FRAME_HDR *mf;
4367         unsigned long flags;
4368         dma_addr_t alloc_dma;
4369         u8 *mem;
4370         int i, reply_sz, sz, total_size, num_chain;
4371         u64     dma_mask;
4372
4373         dma_mask = 0;
4374
4375         /*  Prime reply FIFO...  */
4376
4377         if (ioc->reply_frames == NULL) {
4378                 if ( (num_chain = initChainBuffers(ioc)) < 0)
4379                         return -1;
4380                 /*
4381                  * 1078 errata workaround for the 36GB limitation
4382                  */
4383                 if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078 &&
4384                     ioc->dma_mask > DMA_BIT_MASK(35)) {
4385                         if (!pci_set_dma_mask(ioc->pcidev, DMA_BIT_MASK(32))
4386                             && !pci_set_consistent_dma_mask(ioc->pcidev,
4387                             DMA_BIT_MASK(32))) {
4388                                 dma_mask = DMA_BIT_MASK(35);
4389                                 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4390                                     "setting 35 bit addressing for "
4391                                     "Request/Reply/Chain and Sense Buffers\n",
4392                                     ioc->name));
4393                         } else {
4394                                 /*Reseting DMA mask to 64 bit*/
4395                                 pci_set_dma_mask(ioc->pcidev,
4396                                         DMA_BIT_MASK(64));
4397                                 pci_set_consistent_dma_mask(ioc->pcidev,
4398                                         DMA_BIT_MASK(64));
4399
4400                                 printk(MYIOC_s_ERR_FMT
4401                                     "failed setting 35 bit addressing for "
4402                                     "Request/Reply/Chain and Sense Buffers\n",
4403                                     ioc->name);
4404                                 return -1;
4405                         }
4406                 }
4407
4408                 total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
4409                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
4410                                 ioc->name, ioc->reply_sz, ioc->reply_depth));
4411                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d[%x] bytes\n",
4412                                 ioc->name, reply_sz, reply_sz));
4413
4414                 sz = (ioc->req_sz * ioc->req_depth);
4415                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d bytes, RequestDepth=%d\n",
4416                                 ioc->name, ioc->req_sz, ioc->req_depth));
4417                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d[%x] bytes\n",
4418                                 ioc->name, sz, sz));
4419                 total_size += sz;
4420
4421                 sz = num_chain * ioc->req_sz; /* chain buffer pool size */
4422                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d bytes, ChainDepth=%d\n",
4423                                 ioc->name, ioc->req_sz, num_chain));
4424                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d[%x] bytes num_chain=%d\n",
4425                                 ioc->name, sz, sz, num_chain));
4426
4427                 total_size += sz;
4428                 mem = pci_alloc_consistent(ioc->pcidev, total_size, &alloc_dma);
4429                 if (mem == NULL) {
4430                         printk(MYIOC_s_ERR_FMT "Unable to allocate Reply, Request, Chain Buffers!\n",
4431                                 ioc->name);
4432                         goto out_fail;
4433                 }
4434
4435                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Total alloc @ %p[%p], sz=%d[%x] bytes\n",
4436                                 ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size));
4437
4438                 memset(mem, 0, total_size);
4439                 ioc->alloc_total += total_size;
4440                 ioc->alloc = mem;
4441                 ioc->alloc_dma = alloc_dma;
4442                 ioc->alloc_sz = total_size;
4443                 ioc->reply_frames = (MPT_FRAME_HDR *) mem;
4444                 ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4445
4446                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4447                         ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4448
4449                 alloc_dma += reply_sz;
4450                 mem += reply_sz;
4451
4452                 /*  Request FIFO - WE manage this!  */
4453
4454                 ioc->req_frames = (MPT_FRAME_HDR *) mem;
4455                 ioc->req_frames_dma = alloc_dma;
4456
4457                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffers @ %p[%p]\n",
4458                                 ioc->name, mem, (void *)(ulong)alloc_dma));
4459
4460                 ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4461
4462 #if defined(CONFIG_MTRR) && 0
4463                 /*
4464                  *  Enable Write Combining MTRR for IOC's memory region.
4465                  *  (at least as much as we can; "size and base must be
4466                  *  multiples of 4 kiB"
4467                  */
4468                 ioc->mtrr_reg = mtrr_add(ioc->req_frames_dma,
4469                                          sz,
4470                                          MTRR_TYPE_WRCOMB, 1);
4471                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "MTRR region registered (base:size=%08x:%x)\n",
4472                                 ioc->name, ioc->req_frames_dma, sz));
4473 #endif
4474
4475                 for (i = 0; i < ioc->req_depth; i++) {
4476                         alloc_dma += ioc->req_sz;
4477                         mem += ioc->req_sz;
4478                 }
4479
4480                 ioc->ChainBuffer = mem;
4481                 ioc->ChainBufferDMA = alloc_dma;
4482
4483                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffers @ %p(%p)\n",
4484                         ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA));
4485
4486                 /* Initialize the free chain Q.
4487                 */
4488
4489                 INIT_LIST_HEAD(&ioc->FreeChainQ);
4490
4491                 /* Post the chain buffers to the FreeChainQ.
4492                 */
4493                 mem = (u8 *)ioc->ChainBuffer;
4494                 for (i=0; i < num_chain; i++) {
4495                         mf = (MPT_FRAME_HDR *) mem;
4496                         list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeChainQ);
4497                         mem += ioc->req_sz;
4498                 }
4499
4500                 /* Initialize Request frames linked list
4501                  */
4502                 alloc_dma = ioc->req_frames_dma;
4503                 mem = (u8 *) ioc->req_frames;
4504
4505                 spin_lock_irqsave(&ioc->FreeQlock, flags);
4506                 INIT_LIST_HEAD(&ioc->FreeQ);
4507                 for (i = 0; i < ioc->req_depth; i++) {
4508                         mf = (MPT_FRAME_HDR *) mem;
4509
4510                         /*  Queue REQUESTs *internally*!  */
4511                         list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
4512
4513                         mem += ioc->req_sz;
4514                 }
4515                 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
4516
4517                 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4518                 ioc->sense_buf_pool =
4519                         pci_alloc_consistent(ioc->pcidev, sz, &ioc->sense_buf_pool_dma);
4520                 if (ioc->sense_buf_pool == NULL) {
4521                         printk(MYIOC_s_ERR_FMT "Unable to allocate Sense Buffers!\n",
4522                                 ioc->name);
4523                         goto out_fail;
4524                 }
4525
4526                 ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF);
4527                 ioc->alloc_total += sz;
4528                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SenseBuffers @ %p[%p]\n",
4529                         ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma));
4530
4531         }
4532
4533         /* Post Reply frames to FIFO
4534          */
4535         alloc_dma = ioc->alloc_dma;
4536         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4537                 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4538
4539         for (i = 0; i < ioc->reply_depth; i++) {
4540                 /*  Write each address to the IOC!  */
4541                 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
4542                 alloc_dma += ioc->reply_sz;
4543         }
4544
4545         if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
4546             ioc->dma_mask) && !pci_set_consistent_dma_mask(ioc->pcidev,
4547             ioc->dma_mask))
4548                 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4549                     "restoring 64 bit addressing\n", ioc->name));
4550
4551         return 0;
4552
4553 out_fail:
4554
4555         if (ioc->alloc != NULL) {
4556                 sz = ioc->alloc_sz;
4557                 pci_free_consistent(ioc->pcidev,
4558                                 sz,
4559                                 ioc->alloc, ioc->alloc_dma);
4560                 ioc->reply_frames = NULL;
4561                 ioc->req_frames = NULL;
4562                 ioc->alloc_total -= sz;
4563         }
4564         if (ioc->sense_buf_pool != NULL) {
4565                 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4566                 pci_free_consistent(ioc->pcidev,
4567                                 sz,
4568                                 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
4569                 ioc->sense_buf_pool = NULL;
4570         }
4571
4572         if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
4573             DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(ioc->pcidev,
4574             DMA_BIT_MASK(64)))
4575                 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4576                     "restoring 64 bit addressing\n", ioc->name));
4577
4578         return -1;
4579 }
4580
4581 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4582 /**
4583  *      mpt_handshake_req_reply_wait - Send MPT request to and receive reply
4584  *      from IOC via doorbell handshake method.
4585  *      @ioc: Pointer to MPT_ADAPTER structure
4586  *      @reqBytes: Size of the request in bytes
4587  *      @req: Pointer to MPT request frame
4588  *      @replyBytes: Expected size of the reply in bytes
4589  *      @u16reply: Pointer to area where reply should be written
4590  *      @maxwait: Max wait time for a reply (in seconds)
4591  *      @sleepFlag: Specifies whether the process can sleep
4592  *
4593  *      NOTES: It is the callers responsibility to byte-swap fields in the
4594  *      request which are greater than 1 byte in size.  It is also the
4595  *      callers responsibility to byte-swap response fields which are
4596  *      greater than 1 byte in size.
4597  *
4598  *      Returns 0 for success, non-zero for failure.
4599  */
4600 static int
4601 mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req,
4602                 int replyBytes, u16 *u16reply, int maxwait, int sleepFlag)
4603 {
4604         MPIDefaultReply_t *mptReply;
4605         int failcnt = 0;
4606         int t;
4607
4608         /*
4609          * Get ready to cache a handshake reply
4610          */
4611         ioc->hs_reply_idx = 0;
4612         mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4613         mptReply->MsgLength = 0;
4614
4615         /*
4616          * Make sure there are no doorbells (WRITE 0 to IntStatus reg),
4617          * then tell IOC that we want to handshake a request of N words.
4618          * (WRITE u32val to Doorbell reg).
4619          */
4620         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4621         CHIPREG_WRITE32(&ioc->chip->Doorbell,
4622                         ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
4623                          ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
4624
4625         /*
4626          * Wait for IOC's doorbell handshake int
4627          */
4628         if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4629                 failcnt++;
4630
4631         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n",
4632                         ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4633
4634         /* Read doorbell and check for active bit */
4635         if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
4636                         return -1;
4637
4638         /*
4639          * Clear doorbell int (WRITE 0 to IntStatus reg),
4640          * then wait for IOC to ACKnowledge that it's ready for
4641          * our handshake request.
4642          */
4643         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4644         if (!failcnt && (t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4645                 failcnt++;
4646
4647         if (!failcnt) {
4648                 int      ii;
4649                 u8      *req_as_bytes = (u8 *) req;
4650
4651                 /*
4652                  * Stuff request words via doorbell handshake,
4653                  * with ACK from IOC for each.
4654                  */
4655                 for (ii = 0; !failcnt && ii < reqBytes/4; ii++) {
4656                         u32 word = ((req_as_bytes[(ii*4) + 0] <<  0) |
4657                                     (req_as_bytes[(ii*4) + 1] <<  8) |
4658                                     (req_as_bytes[(ii*4) + 2] << 16) |
4659                                     (req_as_bytes[(ii*4) + 3] << 24));
4660
4661                         CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
4662                         if ((t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4663                                 failcnt++;
4664                 }
4665
4666                 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Handshake request frame (@%p) header\n", ioc->name, req));
4667                 DBG_DUMP_REQUEST_FRAME_HDR(ioc, (u32 *)req);
4668
4669                 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request post done, WaitCnt=%d%s\n",
4670                                 ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : ""));
4671
4672                 /*
4673                  * Wait for completion of doorbell handshake reply from the IOC
4674                  */
4675                 if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0)
4676                         failcnt++;
4677
4678                 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake reply count=%d%s\n",
4679                                 ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : ""));
4680
4681                 /*
4682                  * Copy out the cached reply...
4683                  */
4684                 for (ii=0; ii < min(replyBytes/2,mptReply->MsgLength*2); ii++)
4685                         u16reply[ii] = ioc->hs_reply[ii];
4686         } else {
4687                 return -99;
4688         }
4689
4690         return -failcnt;
4691 }
4692
4693 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4694 /**
4695  *      WaitForDoorbellAck - Wait for IOC doorbell handshake acknowledge
4696  *      @ioc: Pointer to MPT_ADAPTER structure
4697  *      @howlong: How long to wait (in seconds)
4698  *      @sleepFlag: Specifies whether the process can sleep
4699  *
4700  *      This routine waits (up to ~2 seconds max) for IOC doorbell
4701  *      handshake ACKnowledge, indicated by the IOP_DOORBELL_STATUS
4702  *      bit in its IntStatus register being clear.
4703  *
4704  *      Returns a negative value on failure, else wait loop count.
4705  */
4706 static int
4707 WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4708 {
4709         int cntdn;
4710         int count = 0;
4711         u32 intstat=0;
4712
4713         cntdn = 1000 * howlong;
4714
4715         if (sleepFlag == CAN_SLEEP) {
4716                 while (--cntdn) {
4717                         msleep (1);
4718                         intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4719                         if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
4720                                 break;
4721                         count++;
4722                 }
4723         } else {
4724                 while (--cntdn) {
4725                         udelay (1000);
4726                         intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4727                         if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
4728                                 break;
4729                         count++;
4730                 }
4731         }
4732
4733         if (cntdn) {
4734                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell ACK (count=%d)\n",
4735                                 ioc->name, count));
4736                 return count;
4737         }
4738
4739         printk(MYIOC_s_ERR_FMT "Doorbell ACK timeout (count=%d), IntStatus=%x!\n",
4740                         ioc->name, count, intstat);
4741         return -1;
4742 }
4743
4744 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4745 /**
4746  *      WaitForDoorbellInt - Wait for IOC to set its doorbell interrupt bit
4747  *      @ioc: Pointer to MPT_ADAPTER structure
4748  *      @howlong: How long to wait (in seconds)
4749  *      @sleepFlag: Specifies whether the process can sleep
4750  *
4751  *      This routine waits (up to ~2 seconds max) for IOC doorbell interrupt
4752  *      (MPI_HIS_DOORBELL_INTERRUPT) to be set in the IntStatus register.
4753  *
4754  *      Returns a negative value on failure, else wait loop count.
4755  */
4756 static int
4757 WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4758 {
4759         int cntdn;
4760         int count = 0;
4761         u32 intstat=0;
4762
4763         cntdn = 1000 * howlong;
4764         if (sleepFlag == CAN_SLEEP) {
4765                 while (--cntdn) {
4766                         intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4767                         if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
4768                                 break;
4769                         msleep(1);
4770                         count++;
4771                 }
4772         } else {
4773                 while (--cntdn) {
4774                         intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4775                         if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
4776                                 break;
4777                         udelay (1000);
4778                         count++;
4779                 }
4780         }
4781
4782         if (cntdn) {
4783                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n",
4784                                 ioc->name, count, howlong));
4785                 return count;
4786         }
4787
4788         printk(MYIOC_s_ERR_FMT "Doorbell INT timeout (count=%d), IntStatus=%x!\n",
4789                         ioc->name, count, intstat);
4790         return -1;
4791 }
4792
4793 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4794 /**
4795  *      WaitForDoorbellReply - Wait for and capture an IOC handshake reply.
4796  *      @ioc: Pointer to MPT_ADAPTER structure
4797  *      @howlong: How long to wait (in seconds)
4798  *      @sleepFlag: Specifies whether the process can sleep
4799  *
4800  *      This routine polls the IOC for a handshake reply, 16 bits at a time.
4801  *      Reply is cached to IOC private area large enough to hold a maximum
4802  *      of 128 bytes of reply data.
4803  *
4804  *      Returns a negative value on failure, else size of reply in WORDS.
4805  */
4806 static int
4807 WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4808 {
4809         int u16cnt = 0;
4810         int failcnt = 0;
4811         int t;
4812         u16 *hs_reply = ioc->hs_reply;
4813         volatile MPIDefaultReply_t *mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4814         u16 hword;
4815
4816         hs_reply[0] = hs_reply[1] = hs_reply[7] = 0;
4817
4818         /*
4819          * Get first two u16's so we can look at IOC's intended reply MsgLength
4820          */
4821         u16cnt=0;
4822         if ((t = WaitForDoorbellInt(ioc, howlong, sleepFlag)) < 0) {
4823                 failcnt++;
4824         } else {
4825                 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4826                 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4827                 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4828                         failcnt++;
4829                 else {
4830                         hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4831                         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4832                 }
4833         }
4834
4835         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitCnt=%d First handshake reply word=%08x%s\n",
4836                         ioc->name, t, le32_to_cpu(*(u32 *)hs_reply),
4837                         failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4838
4839         /*
4840          * If no error (and IOC said MsgLength is > 0), piece together
4841          * reply 16 bits at a time.
4842          */
4843         for (u16cnt=2; !failcnt && u16cnt < (2 * mptReply->MsgLength); u16cnt++) {
4844                 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4845                         failcnt++;
4846                 hword = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4847                 /* don't overflow our IOC hs_reply[] buffer! */
4848                 if (u16cnt < ARRAY_SIZE(ioc->hs_reply))
4849                         hs_reply[u16cnt] = hword;
4850                 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4851         }
4852
4853         if (!failcnt && (t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4854                 failcnt++;
4855         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4856
4857         if (failcnt) {
4858                 printk(MYIOC_s_ERR_FMT "Handshake reply failure!\n",
4859                                 ioc->name);
4860                 return -failcnt;
4861         }
4862 #if 0
4863         else if (u16cnt != (2 * mptReply->MsgLength)) {
4864                 return -101;
4865         }
4866         else if ((mptReply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
4867                 return -102;
4868         }
4869 #endif
4870
4871         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got Handshake reply:\n", ioc->name));
4872         DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mptReply);
4873
4874         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n",
4875                         ioc->name, t, u16cnt/2));
4876         return u16cnt/2;
4877 }
4878
4879 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4880 /**
4881  *      GetLanConfigPages - Fetch LANConfig pages.
4882  *      @ioc: Pointer to MPT_ADAPTER structure
4883  *
4884  *      Return: 0 for success
4885  *      -ENOMEM if no memory available
4886  *              -EPERM if not allowed due to ISR context
4887  *              -EAGAIN if no msg frames currently available
4888  *              -EFAULT for non-successful reply or no reply (timeout)
4889  */
4890 static int
4891 GetLanConfigPages(MPT_ADAPTER *ioc)
4892 {
4893         ConfigPageHeader_t       hdr;
4894         CONFIGPARMS              cfg;
4895         LANPage0_t              *ppage0_alloc;
4896         dma_addr_t               page0_dma;
4897         LANPage1_t              *ppage1_alloc;
4898         dma_addr_t               page1_dma;
4899         int                      rc = 0;
4900         int                      data_sz;
4901         int                      copy_sz;
4902
4903         /* Get LAN Page 0 header */
4904         hdr.PageVersion = 0;
4905         hdr.PageLength = 0;
4906         hdr.PageNumber = 0;
4907         hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
4908         cfg.cfghdr.hdr = &hdr;
4909         cfg.physAddr = -1;
4910         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4911         cfg.dir = 0;
4912         cfg.pageAddr = 0;
4913         cfg.timeout = 0;
4914
4915         if ((rc = mpt_config(ioc, &cfg)) != 0)
4916                 return rc;
4917
4918         if (hdr.PageLength > 0) {
4919                 data_sz = hdr.PageLength * 4;
4920                 ppage0_alloc = (LANPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
4921                 rc = -ENOMEM;
4922                 if (ppage0_alloc) {
4923                         memset((u8 *)ppage0_alloc, 0, data_sz);
4924                         cfg.physAddr = page0_dma;
4925                         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4926
4927                         if ((rc = mpt_config(ioc, &cfg)) == 0) {
4928                                 /* save the data */
4929                                 copy_sz = min_t(int, sizeof(LANPage0_t), data_sz);
4930                                 memcpy(&ioc->lan_cnfg_page0, ppage0_alloc, copy_sz);
4931
4932                         }
4933
4934                         pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
4935
4936                         /* FIXME!
4937                          *      Normalize endianness of structure data,
4938                          *      by byte-swapping all > 1 byte fields!
4939                          */
4940
4941                 }
4942
4943                 if (rc)
4944                         return rc;
4945         }
4946
4947         /* Get LAN Page 1 header */
4948         hdr.PageVersion = 0;
4949         hdr.PageLength = 0;
4950         hdr.PageNumber = 1;
4951         hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
4952         cfg.cfghdr.hdr = &hdr;
4953         cfg.physAddr = -1;
4954         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4955         cfg.dir = 0;
4956         cfg.pageAddr = 0;
4957
4958         if ((rc = mpt_config(ioc, &cfg)) != 0)
4959                 return rc;
4960
4961         if (hdr.PageLength == 0)
4962                 return 0;
4963
4964         data_sz = hdr.PageLength * 4;
4965         rc = -ENOMEM;
4966         ppage1_alloc = (LANPage1_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page1_dma);
4967         if (ppage1_alloc) {
4968                 memset((u8 *)ppage1_alloc, 0, data_sz);
4969                 cfg.physAddr = page1_dma;
4970                 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4971
4972                 if ((rc = mpt_config(ioc, &cfg)) == 0) {
4973                         /* save the data */
4974                         copy_sz = min_t(int, sizeof(LANPage1_t), data_sz);
4975                         memcpy(&ioc->lan_cnfg_page1, ppage1_alloc, copy_sz);
4976                 }
4977
4978                 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage1_alloc, page1_dma);
4979
4980                 /* FIXME!
4981                  *      Normalize endianness of structure data,
4982                  *      by byte-swapping all > 1 byte fields!
4983                  */
4984
4985         }
4986
4987         return rc;
4988 }
4989
4990 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4991 /**
4992  *      mptbase_sas_persist_operation - Perform operation on SAS Persistent Table
4993  *      @ioc: Pointer to MPT_ADAPTER structure
4994  *      @persist_opcode: see below
4995  *
4996  *      MPI_SAS_OP_CLEAR_NOT_PRESENT - Free all persist TargetID mappings for
4997  *              devices not currently present.
4998  *      MPI_SAS_OP_CLEAR_ALL_PERSISTENT - Clear al persist TargetID mappings
4999  *
5000  *      NOTE: Don't use not this function during interrupt time.
5001  *
5002  *      Returns 0 for success, non-zero error
5003  */
5004
5005 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5006 int
5007 mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode)
5008 {
5009         SasIoUnitControlRequest_t       *sasIoUnitCntrReq;
5010         SasIoUnitControlReply_t         *sasIoUnitCntrReply;
5011         MPT_FRAME_HDR                   *mf = NULL;
5012         MPIHeader_t                     *mpi_hdr;
5013         int                             ret = 0;
5014         unsigned long                   timeleft;
5015
5016         mutex_lock(&ioc->mptbase_cmds.mutex);
5017
5018         /* init the internal cmd struct */
5019         memset(ioc->mptbase_cmds.reply, 0 , MPT_DEFAULT_FRAME_SIZE);
5020         INITIALIZE_MGMT_STATUS(ioc->mptbase_cmds.status)
5021
5022         /* insure garbage is not sent to fw */
5023         switch(persist_opcode) {
5024
5025         case MPI_SAS_OP_CLEAR_NOT_PRESENT:
5026         case MPI_SAS_OP_CLEAR_ALL_PERSISTENT:
5027                 break;
5028
5029         default:
5030                 ret = -1;
5031                 goto out;
5032         }
5033
5034         printk(KERN_DEBUG  "%s: persist_opcode=%x\n",
5035                 __func__, persist_opcode);
5036
5037         /* Get a MF for this command.
5038          */
5039         if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
5040                 printk(KERN_DEBUG "%s: no msg frames!\n", __func__);
5041                 ret = -1;
5042                 goto out;
5043         }
5044
5045         mpi_hdr = (MPIHeader_t *) mf;
5046         sasIoUnitCntrReq = (SasIoUnitControlRequest_t *)mf;
5047         memset(sasIoUnitCntrReq,0,sizeof(SasIoUnitControlRequest_t));
5048         sasIoUnitCntrReq->Function = MPI_FUNCTION_SAS_IO_UNIT_CONTROL;
5049         sasIoUnitCntrReq->MsgContext = mpi_hdr->MsgContext;
5050         sasIoUnitCntrReq->Operation = persist_opcode;
5051
5052         mpt_put_msg_frame(mpt_base_index, ioc, mf);
5053         timeleft = wait_for_completion_timeout(&ioc->mptbase_cmds.done, 10*HZ);
5054         if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
5055                 ret = -ETIME;
5056                 printk(KERN_DEBUG "%s: failed\n", __func__);
5057                 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_DID_IOCRESET)
5058                         goto out;
5059                 if (!timeleft) {
5060                         printk(MYIOC_s_WARN_FMT
5061                                "Issuing Reset from %s!!, doorbell=0x%08x\n",
5062                                ioc->name, __func__, mpt_GetIocState(ioc, 0));
5063                         mpt_Soft_Hard_ResetHandler(ioc, CAN_SLEEP);
5064                         mpt_free_msg_frame(ioc, mf);
5065                 }
5066                 goto out;
5067         }
5068
5069         if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_RF_VALID)) {
5070                 ret = -1;
5071                 goto out;
5072         }
5073
5074         sasIoUnitCntrReply =
5075             (SasIoUnitControlReply_t *)ioc->mptbase_cmds.reply;
5076         if (le16_to_cpu(sasIoUnitCntrReply->IOCStatus) != MPI_IOCSTATUS_SUCCESS) {
5077                 printk(KERN_DEBUG "%s: IOCStatus=0x%X IOCLogInfo=0x%X\n",
5078                     __func__, sasIoUnitCntrReply->IOCStatus,
5079                     sasIoUnitCntrReply->IOCLogInfo);
5080                 printk(KERN_DEBUG "%s: failed\n", __func__);
5081                 ret = -1;
5082         } else
5083                 printk(KERN_DEBUG "%s: success\n", __func__);
5084  out:
5085
5086         CLEAR_MGMT_STATUS(ioc->mptbase_cmds.status)
5087         mutex_unlock(&ioc->mptbase_cmds.mutex);
5088         return ret;
5089 }
5090
5091 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5092
5093 static void
5094 mptbase_raid_process_event_data(MPT_ADAPTER *ioc,
5095     MpiEventDataRaid_t * pRaidEventData)
5096 {
5097         int     volume;
5098         int     reason;
5099         int     disk;
5100         int     status;
5101         int     flags;
5102         int     state;
5103
5104         volume  = pRaidEventData->VolumeID;
5105         reason  = pRaidEventData->ReasonCode;
5106         disk    = pRaidEventData->PhysDiskNum;
5107         status  = le32_to_cpu(pRaidEventData->SettingsStatus);
5108         flags   = (status >> 0) & 0xff;
5109         state   = (status >> 8) & 0xff;
5110
5111         if (reason == MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED) {
5112                 return;
5113         }
5114
5115         if ((reason >= MPI_EVENT_RAID_RC_PHYSDISK_CREATED &&
5116              reason <= MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED) ||
5117             (reason == MPI_EVENT_RAID_RC_SMART_DATA)) {
5118                 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for PhysDisk %d id=%d\n",
5119                         ioc->name, disk, volume);
5120         } else {
5121                 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for VolumeID %d\n",
5122                         ioc->name, volume);
5123         }
5124
5125         switch(reason) {
5126         case MPI_EVENT_RAID_RC_VOLUME_CREATED:
5127                 printk(MYIOC_s_INFO_FMT "  volume has been created\n",
5128                         ioc->name);
5129                 break;
5130
5131         case MPI_EVENT_RAID_RC_VOLUME_DELETED:
5132
5133                 printk(MYIOC_s_INFO_FMT "  volume has been deleted\n",
5134                         ioc->name);
5135                 break;
5136
5137         case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED:
5138                 printk(MYIOC_s_INFO_FMT "  volume settings have been changed\n",
5139                         ioc->name);
5140                 break;
5141
5142         case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED:
5143                 printk(MYIOC_s_INFO_FMT "  volume is now %s%s%s%s\n",
5144                         ioc->name,
5145                         state == MPI_RAIDVOL0_STATUS_STATE_OPTIMAL
5146                          ? "optimal"
5147                          : state == MPI_RAIDVOL0_STATUS_STATE_DEGRADED
5148                           ? "degraded"
5149                           : state == MPI_RAIDVOL0_STATUS_STATE_FAILED
5150                            ? "failed"
5151                            : "state unknown",
5152                         flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED
5153                          ? ", enabled" : "",
5154                         flags & MPI_RAIDVOL0_STATUS_FLAG_QUIESCED
5155                          ? ", quiesced" : "",
5156                         flags & MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
5157                          ? ", resync in progress" : "" );
5158                 break;
5159
5160         case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED:
5161                 printk(MYIOC_s_INFO_FMT "  volume membership of PhysDisk %d has changed\n",
5162                         ioc->name, disk);
5163                 break;
5164
5165         case MPI_EVENT_RAID_RC_PHYSDISK_CREATED:
5166                 printk(MYIOC_s_INFO_FMT "  PhysDisk has been created\n",
5167                         ioc->name);
5168                 break;
5169
5170         case MPI_EVENT_RAID_RC_PHYSDISK_DELETED:
5171                 printk(MYIOC_s_INFO_FMT "  PhysDisk has been deleted\n",
5172                         ioc->name);
5173                 break;
5174
5175         case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED:
5176                 printk(MYIOC_s_INFO_FMT "  PhysDisk settings have been changed\n",
5177                         ioc->name);
5178                 break;
5179
5180         case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED:
5181                 printk(MYIOC_s_INFO_FMT "  PhysDisk is now %s%s%s\n",
5182                         ioc->name,
5183                         state == MPI_PHYSDISK0_STATUS_ONLINE
5184                          ? "online"
5185                          : state == MPI_PHYSDISK0_STATUS_MISSING
5186                           ? "missing"
5187                           : state == MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE
5188                            ? "not compatible"
5189                            : state == MPI_PHYSDISK0_STATUS_FAILED
5190                             ? "failed"
5191                             : state == MPI_PHYSDISK0_STATUS_INITIALIZING
5192                              ? "initializing"
5193                              : state == MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED
5194                               ? "offline requested"
5195                               : state == MPI_PHYSDISK0_STATUS_FAILED_REQUESTED
5196                                ? "failed requested"
5197                                : state == MPI_PHYSDISK0_STATUS_OTHER_OFFLINE
5198                                 ? "offline"
5199                                 : "state unknown",
5200                         flags & MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
5201                          ? ", out of sync" : "",
5202                         flags & MPI_PHYSDISK0_STATUS_FLAG_QUIESCED
5203                          ? ", quiesced" : "" );
5204                 break;
5205
5206         case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED:
5207                 printk(MYIOC_s_INFO_FMT "  Domain Validation needed for PhysDisk %d\n",
5208                         ioc->name, disk);
5209                 break;
5210
5211         case MPI_EVENT_RAID_RC_SMART_DATA:
5212                 printk(MYIOC_s_INFO_FMT "  SMART data received, ASC/ASCQ = %02xh/%02xh\n",
5213                         ioc->name, pRaidEventData->ASC, pRaidEventData->ASCQ);
5214                 break;
5215
5216         case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED:
5217                 printk(MYIOC_s_INFO_FMT "  replacement of PhysDisk %d has started\n",
5218                         ioc->name, disk);
5219                 break;
5220         }
5221 }
5222
5223 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5224 /**
5225  *      GetIoUnitPage2 - Retrieve BIOS version and boot order information.
5226  *      @ioc: Pointer to MPT_ADAPTER structure
5227  *
5228  *      Returns: 0 for success
5229  *      -ENOMEM if no memory available
5230  *              -EPERM if not allowed due to ISR context
5231  *              -EAGAIN if no msg frames currently available
5232  *              -EFAULT for non-successful reply or no reply (timeout)
5233  */
5234 static int
5235 GetIoUnitPage2(MPT_ADAPTER *ioc)
5236 {
5237         ConfigPageHeader_t       hdr;
5238         CONFIGPARMS              cfg;
5239         IOUnitPage2_t           *ppage_alloc;
5240         dma_addr_t               page_dma;
5241         int                      data_sz;
5242         int                      rc;
5243
5244         /* Get the page header */
5245         hdr.PageVersion = 0;
5246         hdr.PageLength = 0;
5247         hdr.PageNumber = 2;
5248         hdr.PageType = MPI_CONFIG_PAGETYPE_IO_UNIT;
5249         cfg.cfghdr.hdr = &hdr;
5250         cfg.physAddr = -1;
5251         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5252         cfg.dir = 0;
5253         cfg.pageAddr = 0;
5254         cfg.timeout = 0;
5255
5256         if ((rc = mpt_config(ioc, &cfg)) != 0)
5257                 return rc;
5258
5259         if (hdr.PageLength == 0)
5260                 return 0;
5261
5262         /* Read the config page */
5263         data_sz = hdr.PageLength * 4;
5264         rc = -ENOMEM;
5265         ppage_alloc = (IOUnitPage2_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page_dma);
5266         if (ppage_alloc) {
5267                 memset((u8 *)ppage_alloc, 0, data_sz);
5268                 cfg.physAddr = page_dma;
5269                 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5270
5271                 /* If Good, save data */
5272                 if ((rc = mpt_config(ioc, &cfg)) == 0)
5273                         ioc->biosVersion = le32_to_cpu(ppage_alloc->BiosVersion);
5274
5275                 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage_alloc, page_dma);
5276         }
5277
5278         return rc;
5279 }
5280
5281 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5282 /**
5283  *      mpt_GetScsiPortSettings - read SCSI Port Page 0 and 2
5284  *      @ioc: Pointer to a Adapter Strucutre
5285  *      @portnum: IOC port number
5286  *
5287  *      Return: -EFAULT if read of config page header fails
5288  *                      or if no nvram
5289  *      If read of SCSI Port Page 0 fails,
5290  *              NVRAM = MPT_HOST_NVRAM_INVALID  (0xFFFFFFFF)
5291  *              Adapter settings: async, narrow
5292  *              Return 1
5293  *      If read of SCSI Port Page 2 fails,
5294  *              Adapter settings valid
5295  *              NVRAM = MPT_HOST_NVRAM_INVALID  (0xFFFFFFFF)
5296  *              Return 1
5297  *      Else
5298  *              Both valid
5299  *              Return 0
5300  *      CHECK - what type of locking mechanisms should be used????
5301  */
5302 static int
5303 mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
5304 {
5305         u8                      *pbuf;
5306         dma_addr_t               buf_dma;
5307         CONFIGPARMS              cfg;
5308         ConfigPageHeader_t       header;
5309         int                      ii;
5310         int                      data, rc = 0;
5311
5312         /* Allocate memory
5313          */
5314         if (!ioc->spi_data.nvram) {
5315                 int      sz;
5316                 u8      *mem;
5317                 sz = MPT_MAX_SCSI_DEVICES * sizeof(int);
5318                 mem = kmalloc(sz, GFP_ATOMIC);
5319                 if (mem == NULL)
5320                         return -EFAULT;
5321
5322                 ioc->spi_data.nvram = (int *) mem;
5323
5324                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",
5325                         ioc->name, ioc->spi_data.nvram, sz));
5326         }
5327
5328         /* Invalidate NVRAM information
5329          */
5330         for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5331                 ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;
5332         }
5333
5334         /* Read SPP0 header, allocate memory, then read page.
5335          */
5336         header.PageVersion = 0;
5337         header.PageLength = 0;
5338         header.PageNumber = 0;
5339         header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
5340         cfg.cfghdr.hdr = &header;
5341         cfg.physAddr = -1;
5342         cfg.pageAddr = portnum;
5343         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5344         cfg.dir = 0;
5345         cfg.timeout = 0;        /* use default */
5346         if (mpt_config(ioc, &cfg) != 0)
5347                  return -EFAULT;
5348
5349         if (header.PageLength > 0) {
5350                 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
5351                 if (pbuf) {
5352                         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5353                         cfg.physAddr = buf_dma;
5354                         if (mpt_config(ioc, &cfg) != 0) {
5355                                 ioc->spi_data.maxBusWidth = MPT_NARROW;
5356                                 ioc->spi_data.maxSyncOffset = 0;
5357                                 ioc->spi_data.minSyncFactor = MPT_ASYNC;
5358                                 ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;
5359                                 rc = 1;
5360                                 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5361                                         "Unable to read PortPage0 minSyncFactor=%x\n",
5362                                         ioc->name, ioc->spi_data.minSyncFactor));
5363                         } else {
5364                                 /* Save the Port Page 0 data
5365                                  */
5366                                 SCSIPortPage0_t  *pPP0 = (SCSIPortPage0_t  *) pbuf;
5367                                 pPP0->Capabilities = le32_to_cpu(pPP0->Capabilities);
5368                                 pPP0->PhysicalInterface = le32_to_cpu(pPP0->PhysicalInterface);
5369
5370                                 if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) {
5371                                         ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;
5372                                         ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5373                                                 "noQas due to Capabilities=%x\n",
5374                                                 ioc->name, pPP0->Capabilities));
5375                                 }
5376                                 ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;
5377                                 data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK;
5378                                 if (data) {
5379                                         ioc->spi_data.maxSyncOffset = (u8) (data >> 16);
5380                                         data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK;
5381                                         ioc->spi_data.minSyncFactor = (u8) (data >> 8);
5382                                         ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5383                                                 "PortPage0 minSyncFactor=%x\n",
5384                                                 ioc->name, ioc->spi_data.minSyncFactor));
5385                                 } else {
5386                                         ioc->spi_data.maxSyncOffset = 0;
5387                                         ioc->spi_data.minSyncFactor = MPT_ASYNC;
5388                                 }
5389
5390                                 ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;
5391
5392                                 /* Update the minSyncFactor based on bus type.
5393                                  */
5394                                 if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||
5395                                         (ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE))  {
5396
5397                                         if (ioc->spi_data.minSyncFactor < MPT_ULTRA) {
5398                                                 ioc->spi_data.minSyncFactor = MPT_ULTRA;
5399                                                 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5400                                                         "HVD or SE detected, minSyncFactor=%x\n",
5401                                                         ioc->name, ioc->spi_data.minSyncFactor));
5402                                         }
5403                                 }
5404                         }
5405                         if (pbuf) {
5406                                 pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
5407                         }
5408                 }
5409         }
5410
5411         /* SCSI Port Page 2 - Read the header then the page.
5412          */
5413         header.PageVersion = 0;
5414         header.PageLength = 0;
5415         header.PageNumber = 2;
5416         header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
5417         cfg.cfghdr.hdr = &header;
5418         cfg.physAddr = -1;
5419         cfg.pageAddr = portnum;
5420         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5421         cfg.dir = 0;
5422         if (mpt_config(ioc, &cfg) != 0)
5423                 return -EFAULT;
5424
5425         if (header.PageLength > 0) {
5426                 /* Allocate memory and read SCSI Port Page 2
5427                  */
5428                 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
5429                 if (pbuf) {
5430                         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_NVRAM;
5431                         cfg.physAddr = buf_dma;
5432                         if (mpt_config(ioc, &cfg) != 0) {
5433                                 /* Nvram data is left with INVALID mark
5434                                  */
5435                                 rc = 1;
5436                         } else if (ioc->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
5437
5438                                 /* This is an ATTO adapter, read Page2 accordingly
5439                                 */
5440                                 ATTO_SCSIPortPage2_t *pPP2 = (ATTO_SCSIPortPage2_t  *) pbuf;
5441                                 ATTODeviceInfo_t *pdevice = NULL;
5442                                 u16 ATTOFlags;
5443
5444                                 /* Save the Port Page 2 data
5445                                  * (reformat into a 32bit quantity)
5446                                  */
5447                                 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5448                                   pdevice = &pPP2->DeviceSettings[ii];
5449                                   ATTOFlags = le16_to_cpu(pdevice->ATTOFlags);
5450                                   data = 0;
5451
5452                                   /* Translate ATTO device flags to LSI format
5453                                    */
5454                                   if (ATTOFlags & ATTOFLAG_DISC)
5455                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE);
5456                                   if (ATTOFlags & ATTOFLAG_ID_ENB)
5457                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE);
5458                                   if (ATTOFlags & ATTOFLAG_LUN_ENB)
5459                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE);
5460                                   if (ATTOFlags & ATTOFLAG_TAGGED)
5461                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE);
5462                                   if (!(ATTOFlags & ATTOFLAG_WIDE_ENB))
5463                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE);
5464
5465                                   data = (data << 16) | (pdevice->Period << 8) | 10;
5466                                   ioc->spi_data.nvram[ii] = data;
5467                                 }
5468                         } else {
5469                                 SCSIPortPage2_t *pPP2 = (SCSIPortPage2_t  *) pbuf;
5470                                 MpiDeviceInfo_t *pdevice = NULL;
5471
5472                                 /*
5473                                  * Save "Set to Avoid SCSI Bus Resets" flag
5474                                  */
5475                                 ioc->spi_data.bus_reset =
5476                                     (le32_to_cpu(pPP2->PortFlags) &
5477                                 MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET) ?
5478                                     0 : 1 ;
5479
5480                                 /* Save the Port Page 2 data
5481                                  * (reformat into a 32bit quantity)
5482                                  */
5483                                 data = le32_to_cpu(pPP2->PortFlags) & MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK;
5484                                 ioc->spi_data.PortFlags = data;
5485                                 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5486                                         pdevice = &pPP2->DeviceSettings[ii];
5487                                         data = (le16_to_cpu(pdevice->DeviceFlags) << 16) |
5488                                                 (pdevice->SyncFactor << 8) | pdevice->Timeout;
5489                                         ioc->spi_data.nvram[ii] = data;
5490                                 }
5491                         }
5492
5493                         pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
5494                 }
5495         }
5496
5497         /* Update Adapter limits with those from NVRAM
5498          * Comment: Don't need to do this. Target performance
5499          * parameters will never exceed the adapters limits.
5500          */
5501
5502         return rc;
5503 }
5504
5505 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5506 /**
5507  *      mpt_readScsiDevicePageHeaders - save version and length of SDP1
5508  *      @ioc: Pointer to a Adapter Strucutre
5509  *      @portnum: IOC port number
5510  *
5511  *      Return: -EFAULT if read of config page header fails
5512  *              or 0 if success.
5513  */
5514 static int
5515 mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum)
5516 {
5517         CONFIGPARMS              cfg;
5518         ConfigPageHeader_t       header;
5519
5520         /* Read the SCSI Device Page 1 header
5521          */
5522         header.PageVersion = 0;
5523         header.PageLength = 0;
5524         header.PageNumber = 1;
5525         header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
5526         cfg.cfghdr.hdr = &header;
5527         cfg.physAddr = -1;
5528         cfg.pageAddr = portnum;
5529         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5530         cfg.dir = 0;
5531         cfg.timeout = 0;
5532         if (mpt_config(ioc, &cfg) != 0)
5533                  return -EFAULT;
5534
5535         ioc->spi_data.sdp1version = cfg.cfghdr.hdr->PageVersion;
5536         ioc->spi_data.sdp1length = cfg.cfghdr.hdr->PageLength;
5537
5538         header.PageVersion = 0;
5539         header.PageLength = 0;
5540         header.PageNumber = 0;
5541         header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
5542         if (mpt_config(ioc, &cfg) != 0)
5543                  return -EFAULT;
5544
5545         ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion;
5546         ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength;
5547
5548         dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 0: version %d length %d\n",
5549                         ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length));
5550
5551         dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 1: version %d length %d\n",
5552                         ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length));
5553         return 0;
5554 }
5555
5556 /**
5557  * mpt_inactive_raid_list_free - This clears this link list.
5558  * @ioc : pointer to per adapter structure
5559  **/
5560 static void
5561 mpt_inactive_raid_list_free(MPT_ADAPTER *ioc)
5562 {
5563         struct inactive_raid_component_info *component_info, *pNext;
5564
5565         if (list_empty(&ioc->raid_data.inactive_list))
5566                 return;
5567
5568         mutex_lock(&ioc->raid_data.inactive_list_mutex);
5569         list_for_each_entry_safe(component_info, pNext,
5570             &ioc->raid_data.inactive_list, list) {
5571                 list_del(&component_info->list);
5572                 kfree(component_info);
5573         }
5574         mutex_unlock(&ioc->raid_data.inactive_list_mutex);
5575 }
5576
5577 /**
5578  * mpt_inactive_raid_volumes - sets up link list of phy_disk_nums for devices belonging in an inactive volume
5579  *
5580  * @ioc : pointer to per adapter structure
5581  * @channel : volume channel
5582  * @id : volume target id
5583  **/
5584 static void
5585 mpt_inactive_raid_volumes(MPT_ADAPTER *ioc, u8 channel, u8 id)
5586 {
5587         CONFIGPARMS                     cfg;
5588         ConfigPageHeader_t              hdr;
5589         dma_addr_t                      dma_handle;
5590         pRaidVolumePage0_t              buffer = NULL;
5591         int                             i;
5592         RaidPhysDiskPage0_t             phys_disk;
5593         struct inactive_raid_component_info *component_info;
5594         int                             handle_inactive_volumes;
5595
5596         memset(&cfg, 0 , sizeof(CONFIGPARMS));
5597         memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5598         hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_VOLUME;
5599         cfg.pageAddr = (channel << 8) + id;
5600         cfg.cfghdr.hdr = &hdr;
5601         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5602
5603         if (mpt_config(ioc, &cfg) != 0)
5604                 goto out;
5605
5606         if (!hdr.PageLength)
5607                 goto out;
5608
5609         buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5610             &dma_handle);
5611
5612         if (!buffer)
5613                 goto out;
5614
5615         cfg.physAddr = dma_handle;
5616         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5617
5618         if (mpt_config(ioc, &cfg) != 0)
5619                 goto out;
5620
5621         if (!buffer->NumPhysDisks)
5622                 goto out;
5623
5624         handle_inactive_volumes =
5625            (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE ||
5626            (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED) == 0 ||
5627             buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_FAILED ||
5628             buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_MISSING) ? 1 : 0;
5629
5630         if (!handle_inactive_volumes)
5631                 goto out;
5632
5633         mutex_lock(&ioc->raid_data.inactive_list_mutex);
5634         for (i = 0; i < buffer->NumPhysDisks; i++) {
5635                 if(mpt_raid_phys_disk_pg0(ioc,
5636                     buffer->PhysDisk[i].PhysDiskNum, &phys_disk) != 0)
5637                         continue;
5638
5639                 if ((component_info = kmalloc(sizeof (*component_info),
5640                  GFP_KERNEL)) == NULL)
5641                         continue;
5642
5643                 component_info->volumeID = id;
5644                 component_info->volumeBus = channel;
5645                 component_info->d.PhysDiskNum = phys_disk.PhysDiskNum;
5646                 component_info->d.PhysDiskBus = phys_disk.PhysDiskBus;
5647                 component_info->d.PhysDiskID = phys_disk.PhysDiskID;
5648                 component_info->d.PhysDiskIOC = phys_disk.PhysDiskIOC;
5649
5650                 list_add_tail(&component_info->list,