video: tegra: nvavp: Add a clock request ioctl
[linux-2.6.git] / drivers / media / video / tegra / nvavp / nvavp_dev.c
1 /*
2  * drivers/media/video/tegra/nvavp/nvavp_dev.c
3  *
4  * Copyright (C) 2011-2012 NVIDIA Corp.
5  *
6  * This file is licensed under the terms of the GNU General Public License
7  * version 2. This program is licensed "as is" without any warranty of any
8  * kind, whether express or implied.
9  */
10
11 #include <linux/uaccess.h>
12 #include <linux/clk.h>
13 #include <linux/completion.h>
14 #include <linux/delay.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/err.h>
17 #include <linux/firmware.h>
18 #include <linux/fs.h>
19 #include <linux/interrupt.h>
20 #include <linux/io.h>
21 #include <linux/ioctl.h>
22 #include <linux/irq.h>
23 #include <linux/kref.h>
24 #include <linux/list.h>
25 #include <linux/miscdevice.h>
26 #include <linux/mutex.h>
27 #include <linux/nvhost.h>
28 #include <linux/platform_device.h>
29 #include <linux/rbtree.h>
30 #include <linux/seq_file.h>
31 #include <linux/slab.h>
32 #include <linux/string.h>
33 #include <linux/tegra_nvavp.h>
34 #include <linux/types.h>
35 #include <linux/vmalloc.h>
36 #include <linux/workqueue.h>
37
38 #include <mach/clk.h>
39 #include <mach/hardware.h>
40 #include <mach/io.h>
41 #include <mach/iomap.h>
42 #include <mach/legacy_irq.h>
43 #include <mach/nvmap.h>
44
45 #include "../../../../video/tegra/nvmap/nvmap.h"
46 #include "../../../../video/tegra/host/host1x/host1x_syncpt.h"
47 #include "../../../../video/tegra/host/dev.h"
48 #include "../../../../video/tegra/host/nvhost_acm.h"
49
50 #if defined(CONFIG_TEGRA_AVP_KERNEL_ON_MMU)
51 #include "../avp/headavp.h"
52 #endif
53 #include "nvavp_os.h"
54
55 #define TEGRA_NVAVP_NAME                        "nvavp"
56
57 #define NVAVP_PUSHBUFFER_SIZE                   4096
58
59 #define NVAVP_PUSHBUFFER_MIN_UPDATE_SPACE       (sizeof(u32) * 3)
60
61 #define TEGRA_NVAVP_RESET_VECTOR_ADDR   \
62                 (IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x200)
63
64 #define FLOW_CTRL_HALT_COP_EVENTS       IO_ADDRESS(TEGRA_FLOW_CTRL_BASE + 0x4)
65 #define FLOW_MODE_STOP                  (0x2 << 29)
66 #define FLOW_MODE_NONE                  0x0
67
68 #define NVAVP_OS_INBOX                  IO_ADDRESS(TEGRA_RES_SEMA_BASE + 0x10)
69 #define NVAVP_OS_OUTBOX                 IO_ADDRESS(TEGRA_RES_SEMA_BASE + 0x20)
70
71 #define NVAVP_INBOX_VALID               (1 << 29)
72
73 /* AVP behavior params */
74 #define NVAVP_OS_IDLE_TIMEOUT           100 /* milli-seconds */
75
76 struct nvavp_info {
77         u32                             clk_enabled;
78         struct clk                      *bsev_clk;
79         struct clk                      *vde_clk;
80         struct clk                      *cop_clk;
81
82         /* used for dvfs */
83         struct clk                      *sclk;
84         struct clk                      *emc_clk;
85         unsigned long                   sclk_rate;
86         unsigned long                   emc_clk_rate;
87
88         int                             mbox_from_avp_pend_irq;
89
90         struct mutex                    open_lock;
91         int                             refcount;
92         int                             initialized;
93
94         struct work_struct              clock_disable_work;
95
96         /* os information */
97         struct nvavp_os_info            os_info;
98
99         /* ucode information */
100         struct nvavp_ucode_info         ucode_info;
101
102         /* client for driver allocations, persistent */
103         struct nvmap_client             *nvmap;
104
105         struct mutex                    pushbuffer_lock;
106         struct nvmap_handle_ref         *pushbuf_handle;
107         unsigned long                   pushbuf_phys;
108         u8                              *pushbuf_data;
109         u32                             pushbuf_index;
110         u32                             pushbuf_fence;
111         bool                            pending;
112
113         struct nv_e276_control          *os_control;
114
115         struct nvhost_syncpt            *nvhost_syncpt;
116         u32                             syncpt_id;
117         u32                             syncpt_value;
118
119         struct nvhost_device            *nvhost_dev;
120         struct miscdevice               misc_dev;
121 };
122
123 struct nvavp_clientctx {
124         struct nvmap_client *nvmap;
125         struct nvavp_pushbuffer_submit_hdr submit_hdr;
126         struct nvavp_reloc relocs[NVAVP_MAX_RELOCATION_COUNT];
127         struct nvmap_handle_ref *gather_mem;
128         int num_relocs;
129         struct nvavp_info *nvavp;
130         u32 clk_reqs;
131 };
132
133 static struct clk *nvavp_clk_get(struct nvavp_info *nvavp, int id)
134 {
135         if (!nvavp)
136                 return NULL;
137
138         if (id == NVAVP_MODULE_ID_AVP)
139                 return nvavp->sclk;
140         if (id == NVAVP_MODULE_ID_VDE)
141                 return nvavp->vde_clk;
142         if (id == NVAVP_MODULE_ID_EMC)
143                 return nvavp->emc_clk;
144
145         return NULL;
146 }
147
148 static void nvavp_clks_enable(struct nvavp_info *nvavp)
149 {
150         if (nvavp->clk_enabled++ == 0) {
151                 nvhost_module_busy(nvhost_get_host(nvavp->nvhost_dev)->dev);
152                 clk_enable(nvavp->bsev_clk);
153                 clk_enable(nvavp->vde_clk);
154                 clk_set_rate(nvavp->emc_clk, nvavp->emc_clk_rate);
155                 clk_set_rate(nvavp->sclk, nvavp->sclk_rate);
156                 dev_dbg(&nvavp->nvhost_dev->dev, "%s: setting sclk to %lu\n",
157                                 __func__, nvavp->sclk_rate);
158                 dev_dbg(&nvavp->nvhost_dev->dev, "%s: setting emc_clk to %lu\n",
159                                 __func__, nvavp->emc_clk_rate);
160         }
161 }
162
163 static void nvavp_clks_disable(struct nvavp_info *nvavp)
164 {
165         if (--nvavp->clk_enabled == 0) {
166                 clk_disable(nvavp->bsev_clk);
167                 clk_disable(nvavp->vde_clk);
168                 clk_set_rate(nvavp->emc_clk, 0);
169                 clk_set_rate(nvavp->sclk, 0);
170                 nvhost_module_idle(nvhost_get_host(nvavp->nvhost_dev)->dev);
171                 dev_dbg(&nvavp->nvhost_dev->dev, "%s: resetting emc_clk "
172                                 "and sclk\n", __func__);
173         }
174 }
175
176 static u32 nvavp_check_idle(struct nvavp_info *nvavp)
177 {
178         struct nv_e276_control *control = nvavp->os_control;
179         return (control->put == control->get) ? 1 : 0;
180 }
181
182 static void clock_disable_handler(struct work_struct *work)
183 {
184         struct nvavp_info *nvavp;
185
186         nvavp = container_of(work, struct nvavp_info,
187                             clock_disable_work);
188
189         mutex_lock(&nvavp->pushbuffer_lock);
190         mutex_lock(&nvavp->open_lock);
191         if (nvavp_check_idle(nvavp) && nvavp->pending) {
192                 nvavp->pending = false;
193                 nvavp_clks_disable(nvavp);
194         }
195         mutex_unlock(&nvavp->open_lock);
196         mutex_unlock(&nvavp->pushbuffer_lock);
197 }
198
199 static int nvavp_service(struct nvavp_info *nvavp)
200 {
201         struct nvavp_os_info *os = &nvavp->os_info;
202         u8 *debug_print;
203         u32 inbox;
204
205         inbox = readl(NVAVP_OS_INBOX);
206         if (!(inbox & NVAVP_INBOX_VALID))
207                 inbox = 0x00000000;
208
209         writel(0x00000000, NVAVP_OS_INBOX);
210
211         if (inbox & NVE276_OS_INTERRUPT_VIDEO_IDLE)
212                 schedule_work(&nvavp->clock_disable_work);
213
214         if (inbox & NVE276_OS_INTERRUPT_DEBUG_STRING) {
215                 /* Should only occur with debug AVP OS builds */
216                 debug_print = os->data;
217                 debug_print += os->debug_offset;
218                 dev_info(&nvavp->nvhost_dev->dev, "%s\n", debug_print);
219         }
220         if (inbox & (NVE276_OS_INTERRUPT_SEMAPHORE_AWAKEN |
221                      NVE276_OS_INTERRUPT_EXECUTE_AWAKEN)) {
222                 dev_info(&nvavp->nvhost_dev->dev,
223                         "AVP awaken event (0x%x)\n", inbox);
224         }
225         if (inbox & NVE276_OS_INTERRUPT_AVP_FATAL_ERROR) {
226                 dev_err(&nvavp->nvhost_dev->dev,
227                         "fatal AVP error (0x%08X)\n", inbox);
228         }
229         if (inbox & NVE276_OS_INTERRUPT_AVP_BREAKPOINT)
230                 dev_err(&nvavp->nvhost_dev->dev, "AVP breakpoint hit\n");
231         if (inbox & NVE276_OS_INTERRUPT_TIMEOUT)
232                 dev_err(&nvavp->nvhost_dev->dev, "AVP timeout\n");
233
234         return 0;
235 }
236
237 static irqreturn_t nvavp_mbox_pending_isr(int irq, void *data)
238 {
239         struct nvavp_info *nvavp = data;
240
241         nvavp_service(nvavp);
242
243         return IRQ_HANDLED;
244 }
245
246 static void nvavp_halt_avp(struct nvavp_info *nvavp)
247 {
248         /* ensure the AVP is halted */
249         writel(FLOW_MODE_STOP, FLOW_CTRL_HALT_COP_EVENTS);
250         tegra_periph_reset_assert(nvavp->cop_clk);
251
252         writel(0, NVAVP_OS_OUTBOX);
253         writel(0, NVAVP_OS_INBOX);
254 }
255
256 static int nvavp_reset_avp(struct nvavp_info *nvavp, unsigned long reset_addr)
257 {
258 #if defined(CONFIG_TEGRA_AVP_KERNEL_ON_MMU)
259         unsigned long stub_code_phys = virt_to_phys(_tegra_avp_boot_stub);
260         dma_addr_t stub_data_phys;
261
262         _tegra_avp_boot_stub_data.map_phys_addr = avp->kernel_phys;
263         _tegra_avp_boot_stub_data.jump_addr = reset_addr;
264         wmb();
265         stub_data_phys = dma_map_single(NULL, &_tegra_avp_boot_stub_data,
266                                         sizeof(_tegra_avp_boot_stub_data),
267                                         DMA_TO_DEVICE);
268         rmb();
269         reset_addr = (unsigned long)stub_data_phys;
270 #endif
271         writel(FLOW_MODE_STOP, FLOW_CTRL_HALT_COP_EVENTS);
272
273         writel(reset_addr, TEGRA_NVAVP_RESET_VECTOR_ADDR);
274
275         clk_enable(nvavp->sclk);
276         clk_enable(nvavp->emc_clk);
277
278         /* If sclk_rate and emc_clk is not set by user space,
279          * max clock in dvfs table will be used to get best performance.
280          */
281         nvavp->sclk_rate = ULONG_MAX;
282         nvavp->emc_clk_rate = ULONG_MAX;
283
284         tegra_periph_reset_assert(nvavp->cop_clk);
285         udelay(2);
286         tegra_periph_reset_deassert(nvavp->cop_clk);
287
288         writel(FLOW_MODE_NONE, FLOW_CTRL_HALT_COP_EVENTS);
289
290 #if defined(CONFIG_TEGRA_AVP_KERNEL_ON_MMU)
291         dma_unmap_single(NULL, stub_data_phys,
292                          sizeof(_tegra_avp_boot_stub_data),
293                          DMA_TO_DEVICE);
294 #endif
295         return 0;
296 }
297
298 static void nvavp_halt_vde(struct nvavp_info *nvavp)
299 {
300         if (nvavp->clk_enabled && !nvavp->pending)
301                 BUG();
302
303         if (nvavp->pending) {
304                 nvavp_clks_disable(nvavp);
305                 nvavp->pending = false;
306         }
307
308         tegra_periph_reset_assert(nvavp->bsev_clk);
309         tegra_periph_reset_assert(nvavp->vde_clk);
310 }
311
312 static int nvavp_reset_vde(struct nvavp_info *nvavp)
313 {
314         if (nvavp->clk_enabled)
315                 BUG();
316
317         nvavp_clks_enable(nvavp);
318
319         tegra_periph_reset_assert(nvavp->bsev_clk);
320         udelay(2);
321         tegra_periph_reset_deassert(nvavp->bsev_clk);
322
323         tegra_periph_reset_assert(nvavp->vde_clk);
324         udelay(2);
325         tegra_periph_reset_deassert(nvavp->vde_clk);
326
327         /*
328          * VDE clock is set to max freq by default.
329          * VDE clock can be set to different freq if needed
330          * through ioctl.
331          */
332         clk_set_rate(nvavp->vde_clk, ULONG_MAX);
333
334         nvavp_clks_disable(nvavp);
335
336         return 0;
337 }
338
339 static int nvavp_pushbuffer_alloc(struct nvavp_info *nvavp)
340 {
341         int ret = 0;
342
343         nvavp->pushbuf_handle = nvmap_alloc(nvavp->nvmap, NVAVP_PUSHBUFFER_SIZE,
344                                 SZ_1M, NVMAP_HANDLE_UNCACHEABLE, 0);
345         if (IS_ERR(nvavp->pushbuf_handle)) {
346                 dev_err(&nvavp->nvhost_dev->dev,
347                         "cannot create pushbuffer handle\n");
348                 ret = PTR_ERR(nvavp->pushbuf_handle);
349                 goto err_pushbuf_alloc;
350         }
351         nvavp->pushbuf_data = (u8 *)nvmap_mmap(nvavp->pushbuf_handle);
352         if (!nvavp->pushbuf_data) {
353                 dev_err(&nvavp->nvhost_dev->dev,
354                         "cannot map pushbuffer handle\n");
355                 ret = -ENOMEM;
356                 goto err_pushbuf_mmap;
357         }
358         nvavp->pushbuf_phys = nvmap_pin(nvavp->nvmap, nvavp->pushbuf_handle);
359         if (IS_ERR((void *)nvavp->pushbuf_phys)) {
360                 dev_err(&nvavp->nvhost_dev->dev,
361                         "cannot pin pushbuffer handle\n");
362                 ret = PTR_ERR((void *)nvavp->pushbuf_phys);
363                 goto err_pushbuf_pin;
364         }
365
366         memset(nvavp->pushbuf_data, 0, NVAVP_PUSHBUFFER_SIZE);
367
368         return 0;
369
370 err_pushbuf_pin:
371         nvmap_munmap(nvavp->pushbuf_handle, nvavp->pushbuf_data);
372 err_pushbuf_mmap:
373         nvmap_free(nvavp->nvmap, nvavp->pushbuf_handle);
374 err_pushbuf_alloc:
375         return ret;
376 }
377
378 static void nvavp_pushbuffer_free(struct nvavp_info *nvavp)
379 {
380         nvmap_unpin(nvavp->nvmap, nvavp->pushbuf_handle);
381         nvmap_munmap(nvavp->pushbuf_handle, nvavp->pushbuf_data);
382         nvmap_free(nvavp->nvmap, nvavp->pushbuf_handle);
383 }
384
385 static int nvavp_pushbuffer_init(struct nvavp_info *nvavp)
386 {
387         void *ptr;
388         struct nvavp_os_info *os = &nvavp->os_info;
389         struct nv_e276_control *control;
390         u32 temp;
391         int ret;
392
393         ret = nvavp_pushbuffer_alloc(nvavp);
394         if (ret) {
395                 dev_err(&nvavp->nvhost_dev->dev,
396                         "unable to alloc pushbuffer\n");
397                 return ret;
398         }
399
400         ptr = os->data;
401         ptr += os->control_offset;
402         nvavp->os_control = (struct nv_e276_control *)ptr;
403
404         control = nvavp->os_control;
405         memset(control, 0, sizeof(struct nvavp_os_info));
406
407         /* init get and put pointers */
408         writel(0x0, &control->put);
409         writel(0x0, &control->get);
410
411         /* enable avp VDE clock control and disable iram clock gating */
412         writel(0x0, &control->idle_clk_enable);
413         writel(0x0, &control->iram_clk_gating);
414
415         /* enable avp idle timeout interrupt */
416         writel(0x1, &control->idle_notify_enable);
417         writel(NVAVP_OS_IDLE_TIMEOUT, &control->idle_notify_delay);
418
419         /* init dma start and end pointers */
420         writel(nvavp->pushbuf_phys, &control->dma_start);
421         writel((nvavp->pushbuf_phys + NVAVP_PUSHBUFFER_SIZE),
422                                         &control->dma_end);
423
424         writel(0x00, &nvavp->pushbuf_index);
425         temp = NVAVP_PUSHBUFFER_SIZE - NVAVP_PUSHBUFFER_MIN_UPDATE_SPACE;
426         writel(temp, &nvavp->pushbuf_fence);
427
428         nvavp->syncpt_id = NVSYNCPT_AVP_0;
429         nvavp->syncpt_value = nvhost_syncpt_read(nvavp->nvhost_syncpt,
430                                                  nvavp->syncpt_id);
431
432         return 0;
433 }
434
435 static void nvavp_pushbuffer_deinit(struct nvavp_info *nvavp)
436 {
437         nvavp_pushbuffer_free(nvavp);
438 }
439
440 static int nvavp_pushbuffer_update(struct nvavp_info *nvavp, u32 phys_addr,
441                         u32 gather_count, struct nvavp_syncpt *syncpt,
442                         u32 ext_ucode_flag)
443 {
444         struct nv_e276_control *control = nvavp->os_control;
445         u32 gather_cmd, setucode_cmd, sync = 0;
446         u32 wordcount = 0;
447         u32 index, value = -1;
448
449         mutex_lock(&nvavp->pushbuffer_lock);
450
451         /* check for pushbuffer wrapping */
452         if (nvavp->pushbuf_index >= nvavp->pushbuf_fence)
453                 nvavp->pushbuf_index = 0;
454
455         if (!ext_ucode_flag) {
456                 setucode_cmd =
457                         NVE26E_CH_OPCODE_INCR(NVE276_SET_MICROCODE_A, 3);
458
459                 index = wordcount + nvavp->pushbuf_index;
460                 writel(setucode_cmd, (nvavp->pushbuf_data + index));
461                 wordcount += sizeof(u32);
462
463                 index = wordcount + nvavp->pushbuf_index;
464                 writel(0, (nvavp->pushbuf_data + index));
465                 wordcount += sizeof(u32);
466
467                 index = wordcount + nvavp->pushbuf_index;
468                 writel(nvavp->ucode_info.phys, (nvavp->pushbuf_data + index));
469                 wordcount += sizeof(u32);
470
471                 index = wordcount + nvavp->pushbuf_index;
472                 writel(nvavp->ucode_info.size, (nvavp->pushbuf_data + index));
473                 wordcount += sizeof(u32);
474         }
475
476         gather_cmd = NVE26E_CH_OPCODE_GATHER(0, 0, 0, gather_count);
477
478         if (syncpt) {
479                 value = ++nvavp->syncpt_value;
480                 /* XXX: NvSchedValueWrappingComparison */
481                 sync = NVE26E_CH_OPCODE_IMM(NVE26E_HOST1X_INCR_SYNCPT,
482                         (NVE26E_HOST1X_INCR_SYNCPT_COND_OP_DONE << 8) |
483                         (nvavp->syncpt_id & 0xFF));
484         }
485
486         /* write commands out */
487         index = wordcount + nvavp->pushbuf_index;
488         writel(gather_cmd, (nvavp->pushbuf_data + index));
489         wordcount += sizeof(u32);
490
491         index = wordcount + nvavp->pushbuf_index;
492         writel(phys_addr, (nvavp->pushbuf_data + index));
493         wordcount += sizeof(u32);
494
495         if (syncpt) {
496                 index = wordcount + nvavp->pushbuf_index;
497                 writel(sync, (nvavp->pushbuf_data + index));
498                 wordcount += sizeof(u32);
499         }
500
501         /* enable clocks to VDE/BSEV */
502         mutex_lock(&nvavp->open_lock);
503         if (!nvavp->pending) {
504                 nvavp_clks_enable(nvavp);
505                 nvavp->pending = true;
506         }
507         mutex_unlock(&nvavp->open_lock);
508
509         /* update put pointer */
510         nvavp->pushbuf_index = (nvavp->pushbuf_index + wordcount) &
511                                         (NVAVP_PUSHBUFFER_SIZE - 1);
512         writel(nvavp->pushbuf_index, &control->put);
513         wmb();
514
515         /* wake up avp */
516         writel(0xA0000001, NVAVP_OS_OUTBOX);
517
518         /* Fill out fence struct */
519         if (syncpt) {
520                 syncpt->id = nvavp->syncpt_id;
521                 syncpt->value = value;
522         }
523
524         mutex_unlock(&nvavp->pushbuffer_lock);
525
526         return 0;
527 }
528
529 static void nvavp_unload_ucode(struct nvavp_info *nvavp)
530 {
531         nvmap_unpin(nvavp->nvmap, nvavp->ucode_info.handle);
532         nvmap_munmap(nvavp->ucode_info.handle, nvavp->ucode_info.data);
533         nvmap_free(nvavp->nvmap, nvavp->ucode_info.handle);
534         kfree(nvavp->ucode_info.ucode_bin);
535 }
536
537 static int nvavp_load_ucode(struct nvavp_info *nvavp)
538 {
539         struct nvavp_ucode_info *ucode_info = &nvavp->ucode_info;
540         const struct firmware *nvavp_ucode_fw;
541         char fw_ucode_file[32];
542         void *ptr;
543         int ret = 0;
544
545         if (!ucode_info->ucode_bin) {
546                 sprintf(fw_ucode_file, "nvavp_vid_ucode.bin");
547
548                 ret = request_firmware(&nvavp_ucode_fw, fw_ucode_file,
549                                         nvavp->misc_dev.this_device);
550                 if (ret) {
551                         /* Try alternative version */
552                         sprintf(fw_ucode_file, "nvavp_vid_ucode_alt.bin");
553
554                         ret = request_firmware(&nvavp_ucode_fw,
555                                                 fw_ucode_file,
556                                                 nvavp->misc_dev.this_device);
557
558                         if (ret) {
559                                 dev_err(&nvavp->nvhost_dev->dev,
560                                         "cannot read ucode firmware '%s'\n",
561                                         fw_ucode_file);
562                                 goto err_req_ucode;
563                         }
564                 }
565
566                 dev_info(&nvavp->nvhost_dev->dev,
567                         "read ucode firmware from '%s' (%d bytes)\n",
568                         fw_ucode_file, nvavp_ucode_fw->size);
569
570                 ptr = (void *)nvavp_ucode_fw->data;
571
572                 if (strncmp((const char *)ptr, "NVAVPAPP", 8)) {
573                         dev_info(&nvavp->nvhost_dev->dev,
574                                 "ucode hdr string mismatch\n");
575                         ret = -EINVAL;
576                         goto err_req_ucode;
577                 }
578                 ptr += 8;
579                 ucode_info->size = nvavp_ucode_fw->size - 8;
580
581                 ucode_info->ucode_bin = kzalloc(ucode_info->size,
582                                                 GFP_KERNEL);
583                 if (!ucode_info->ucode_bin) {
584                         dev_err(&nvavp->nvhost_dev->dev,
585                                 "cannot allocate ucode bin\n");
586                         ret = -ENOMEM;
587                         goto err_ubin_alloc;
588                 }
589
590                 ucode_info->handle = nvmap_alloc(nvavp->nvmap,
591                                                 nvavp->ucode_info.size,
592                                         SZ_1M, NVMAP_HANDLE_UNCACHEABLE, 0);
593                 if (IS_ERR(ucode_info->handle)) {
594                         dev_err(&nvavp->nvhost_dev->dev,
595                                 "cannot create ucode handle\n");
596                         ret = PTR_ERR(ucode_info->handle);
597                         goto err_ucode_alloc;
598                 }
599                 ucode_info->data = (u8 *)nvmap_mmap(ucode_info->handle);
600                 if (!ucode_info->data) {
601                         dev_err(&nvavp->nvhost_dev->dev,
602                                 "cannot map ucode handle\n");
603                         ret = -ENOMEM;
604                         goto err_ucode_mmap;
605                 }
606                 ucode_info->phys = nvmap_pin(nvavp->nvmap, ucode_info->handle);
607                 if (IS_ERR((void *)ucode_info->phys)) {
608                         dev_err(&nvavp->nvhost_dev->dev,
609                                 "cannot pin ucode handle\n");
610                         ret = PTR_ERR((void *)ucode_info->phys);
611                         goto err_ucode_pin;
612                 }
613                 memcpy(ucode_info->ucode_bin, ptr, ucode_info->size);
614                 release_firmware(nvavp_ucode_fw);
615         }
616
617         memcpy(ucode_info->data, ucode_info->ucode_bin, ucode_info->size);
618         return 0;
619
620 err_ucode_pin:
621         nvmap_munmap(ucode_info->handle, ucode_info->data);
622 err_ucode_mmap:
623         nvmap_free(nvavp->nvmap, ucode_info->handle);
624 err_ucode_alloc:
625         kfree(nvavp->ucode_info.ucode_bin);
626 err_ubin_alloc:
627         release_firmware(nvavp_ucode_fw);
628 err_req_ucode:
629         return ret;
630 }
631
632 static void nvavp_unload_os(struct nvavp_info *nvavp)
633 {
634         nvmap_unpin(nvavp->nvmap, nvavp->os_info.handle);
635         nvmap_munmap(nvavp->os_info.handle, nvavp->os_info.data);
636 #if defined(CONFIG_TEGRA_AVP_KERNEL_ON_MMU)
637         nvmap_free(nvavp->nvmap, nvavp->os_info.handle);
638 #elif defined(CONFIG_TEGRA_AVP_KERNEL_ON_SMMU)
639         nvmap_free_iovm(nvavp->nvmap, nvavp->os_info.handle);
640 #endif
641         kfree(nvavp->os_info.os_bin);
642 }
643
644 static int nvavp_load_os(struct nvavp_info *nvavp, char *fw_os_file)
645 {
646         struct nvavp_os_info *os_info = &nvavp->os_info;
647         const struct firmware *nvavp_os_fw;
648         void *ptr;
649         u32 size;
650         int ret = 0;
651
652         if (!os_info->os_bin) {
653                 ret = request_firmware(&nvavp_os_fw, fw_os_file,
654                                         nvavp->misc_dev.this_device);
655                 if (ret) {
656                         dev_err(&nvavp->nvhost_dev->dev,
657                                 "cannot read os firmware '%s'\n", fw_os_file);
658                         goto err_req_fw;
659                 }
660
661                 dev_info(&nvavp->nvhost_dev->dev,
662                         "read firmware from '%s' (%d bytes)\n",
663                         fw_os_file, nvavp_os_fw->size);
664
665                 ptr = (void *)nvavp_os_fw->data;
666
667                 if (strncmp((const char *)ptr, "NVAVP-OS", 8)) {
668                         dev_info(&nvavp->nvhost_dev->dev,
669                                 "os hdr string mismatch\n");
670                         ret = -EINVAL;
671                         goto err_os_bin;
672                 }
673
674                 ptr += 8;
675                 os_info->entry_offset = *((u32 *)ptr);
676                 ptr += sizeof(u32);
677                 os_info->control_offset = *((u32 *)ptr);
678                 ptr += sizeof(u32);
679                 os_info->debug_offset = *((u32 *)ptr);
680                 ptr += sizeof(u32);
681
682                 size = *((u32 *)ptr);    ptr += sizeof(u32);
683
684                 os_info->size = size;
685                 os_info->os_bin = kzalloc(os_info->size,
686                                                 GFP_KERNEL);
687                 if (!os_info->os_bin) {
688                         dev_err(&nvavp->nvhost_dev->dev,
689                                 "cannot allocate os bin\n");
690                         ret = -ENOMEM;
691                         goto err_os_bin;
692                 }
693
694                 memcpy(os_info->os_bin, ptr, os_info->size);
695                 memset(os_info->data + os_info->size, 0, SZ_1M - os_info->size);
696
697                 dev_info(&nvavp->nvhost_dev->dev,
698                         "entry=%08x control=%08x debug=%08x size=%d\n",
699                         os_info->entry_offset, os_info->control_offset,
700                         os_info->debug_offset, os_info->size);
701                 release_firmware(nvavp_os_fw);
702         }
703
704         memcpy(os_info->data, os_info->os_bin, os_info->size);
705         os_info->reset_addr = os_info->phys + os_info->entry_offset;
706
707         dev_info(&nvavp->nvhost_dev->dev,
708                 "AVP os at vaddr=%p paddr=%lx reset_addr=%p\n",
709                 os_info->data, (unsigned long)(os_info->phys),
710                                 (void *)os_info->reset_addr);
711         return 0;
712
713 err_os_bin:
714         release_firmware(nvavp_os_fw);
715 err_req_fw:
716         return ret;
717 }
718
719 static int nvavp_init(struct nvavp_info *nvavp)
720 {
721         char fw_os_file[32];
722         int ret = 0;
723
724         if (nvavp->initialized)
725                 return ret;
726
727 #if defined(CONFIG_TEGRA_AVP_KERNEL_ON_MMU) /* Tegra2 with AVP MMU */
728         /* paddr is any address returned from nvmap_pin */
729         /* vaddr is AVP_KERNEL_VIRT_BASE */
730         dev_info(&nvavp->nvhost_dev->dev,
731                 "using AVP MMU to relocate AVP os\n");
732         sprintf(fw_os_file, "nvavp_os.bin");
733         nvavp->os_info.reset_addr = AVP_KERNEL_VIRT_BASE;
734 #elif defined(CONFIG_TEGRA_AVP_KERNEL_ON_SMMU) /* Tegra3 with SMMU */
735         /* paddr is any address behind SMMU */
736         /* vaddr is TEGRA_SMMU_BASE */
737         dev_info(&nvavp->nvhost_dev->dev,
738                 "using SMMU at %lx to load AVP kernel\n",
739                 (unsigned long)nvavp->os_info.phys);
740         BUG_ON(nvavp->os_info.phys != 0xeff00000
741                 && nvavp->os_info.phys != 0x0ff00000);
742         sprintf(fw_os_file, "nvavp_os_%08lx.bin",
743                 (unsigned long)nvavp->os_info.phys);
744         nvavp->os_info.reset_addr = nvavp->os_info.phys;
745 #else /* nvmem= carveout */
746         /* paddr is found in nvmem= carveout */
747         /* vaddr is same as paddr */
748         /* Find nvmem carveout */
749         if (!pfn_valid(__phys_to_pfn(0x8e000000))) {
750                 nvavp->os_info.phys = 0x8e000000;
751         } else if (!pfn_valid(__phys_to_pfn(0x9e000000))) {
752                 nvavp->os_info.phys = 0x9e000000;
753         } else if (!pfn_valid(__phys_to_pfn(0xbe000000))) {
754                 nvavp->os_info.phys = 0xbe000000;
755         } else {
756                 dev_err(&nvavp->nvhost_dev->dev,
757                         "cannot find nvmem= carveout to load AVP os\n");
758                 dev_err(&nvavp->nvhost_dev->dev,
759                         "check kernel command line "
760                         "to see if nvmem= is defined\n");
761                 BUG();
762         }
763         dev_info(&nvavp->nvhost_dev->dev,
764                 "using nvmem= carveout at %lx to load AVP os\n",
765                 nvavp->os_info.phys);
766         sprintf(fw_os_file, "nvavp_os_%08lx.bin", nvavp->os_info.phys);
767         nvavp->os_info.reset_addr = nvavp->os_info.phys;
768         nvavp->os_info.data = ioremap(nvavp->os_info.phys, SZ_1M);
769 #endif
770
771         ret = nvavp_load_os(nvavp, fw_os_file);
772         if (ret) {
773                 dev_err(&nvavp->nvhost_dev->dev,
774                         "unable to load os firmware '%s'\n", fw_os_file);
775                 goto err_exit;
776         }
777
778         ret = nvavp_pushbuffer_init(nvavp);
779         if (ret) {
780                 dev_err(&nvavp->nvhost_dev->dev,
781                         "unable to init pushbuffer\n");
782                 goto err_exit;
783         }
784
785         ret = nvavp_load_ucode(nvavp);
786         if (ret) {
787                 dev_err(&nvavp->nvhost_dev->dev,
788                         "unable to load ucode\n");
789                 goto err_exit;
790         }
791
792         tegra_init_legacy_irq_cop();
793
794         nvavp_reset_vde(nvavp);
795         nvavp_reset_avp(nvavp, nvavp->os_info.reset_addr);
796         enable_irq(nvavp->mbox_from_avp_pend_irq);
797
798         nvavp->initialized = 1;
799
800 err_exit:
801         return ret;
802 }
803
804 static void nvavp_uninit(struct nvavp_info *nvavp)
805 {
806         if (!nvavp->initialized)
807                 return;
808
809         disable_irq(nvavp->mbox_from_avp_pend_irq);
810
811         cancel_work_sync(&nvavp->clock_disable_work);
812
813         nvavp_pushbuffer_deinit(nvavp);
814
815         nvavp_halt_vde(nvavp);
816         nvavp_halt_avp(nvavp);
817
818         clk_disable(nvavp->sclk);
819         clk_disable(nvavp->emc_clk);
820
821         nvavp->initialized = 0;
822 }
823
824 static int nvavp_set_clock_ioctl(struct file *filp, unsigned int cmd,
825                                                         unsigned long arg)
826 {
827         struct nvavp_clientctx *clientctx = filp->private_data;
828         struct nvavp_info *nvavp = clientctx->nvavp;
829         struct clk *c;
830         struct nvavp_clock_args config;
831
832         if (copy_from_user(&config, (void __user *)arg, sizeof(struct nvavp_clock_args)))
833                 return -EFAULT;
834
835         dev_dbg(&nvavp->nvhost_dev->dev, "%s: clk_id=%d, clk_rate=%u\n",
836                         __func__, config.id, config.rate);
837
838         if (config.id == NVAVP_MODULE_ID_AVP)
839                 nvavp->sclk_rate = config.rate;
840         else if (config.id == NVAVP_MODULE_ID_EMC)
841                 nvavp->emc_clk_rate = config.rate;
842
843         c = nvavp_clk_get(nvavp, config.id);
844         if (IS_ERR_OR_NULL(c))
845                 return -EINVAL;
846
847         clk_enable(c);
848         clk_set_rate(c, config.rate);
849
850         config.rate = clk_get_rate(c);
851         clk_disable(c);
852         if (copy_to_user((void __user *)arg, &config, sizeof(struct nvavp_clock_args)))
853                 return -EFAULT;
854
855         return 0;
856 }
857
858 static int nvavp_get_clock_ioctl(struct file *filp, unsigned int cmd,
859                                                         unsigned long arg)
860 {
861         struct nvavp_clientctx *clientctx = filp->private_data;
862         struct nvavp_info *nvavp = clientctx->nvavp;
863         struct clk *c;
864         struct nvavp_clock_args config;
865
866         if (copy_from_user(&config, (void __user *)arg, sizeof(struct nvavp_clock_args)))
867                 return -EFAULT;
868
869         c = nvavp_clk_get(nvavp, config.id);
870         if (IS_ERR_OR_NULL(c))
871                 return -EINVAL;
872
873         clk_enable(c);
874         config.rate = clk_get_rate(c);
875         clk_disable(c);
876
877         if (copy_to_user((void __user *)arg, &config, sizeof(struct nvavp_clock_args)))
878                 return -EFAULT;
879
880         return 0;
881 }
882
883 static int nvavp_get_syncpointid_ioctl(struct file *filp, unsigned int cmd,
884                                                         unsigned long arg)
885 {
886         struct nvavp_clientctx *clientctx = filp->private_data;
887         struct nvavp_info *nvavp = clientctx->nvavp;
888         u32 id = nvavp->syncpt_id;
889
890         if (_IOC_DIR(cmd) & _IOC_READ) {
891                 if (copy_to_user((void __user *)arg, &id, sizeof(u32)))
892                         return -EFAULT;
893                 else
894                         return 0;
895         }
896         return -EFAULT;
897 }
898
899 static int nvavp_set_nvmapfd_ioctl(struct file *filp, unsigned int cmd,
900                                                         unsigned long arg)
901 {
902         struct nvavp_clientctx *clientctx = filp->private_data;
903         struct nvavp_set_nvmap_fd_args buf;
904         struct nvmap_client *new_client;
905         int fd;
906
907         if (_IOC_DIR(cmd) & _IOC_WRITE) {
908                 if (copy_from_user(&buf, (void __user *)arg, _IOC_SIZE(cmd)))
909                         return -EFAULT;
910         }
911
912         fd = buf.fd;
913         new_client = nvmap_client_get_file(fd);
914         if (IS_ERR(new_client))
915                 return PTR_ERR(new_client);
916
917         clientctx->nvmap = new_client;
918         return 0;
919 }
920
921 static int nvavp_pushbuffer_submit_ioctl(struct file *filp, unsigned int cmd,
922                                                         unsigned long arg)
923 {
924         struct nvavp_clientctx *clientctx = filp->private_data;
925         struct nvavp_info *nvavp = clientctx->nvavp;
926         struct nvavp_pushbuffer_submit_hdr hdr;
927         u32 *cmdbuf_data;
928         struct nvmap_handle *cmdbuf_handle = NULL;
929         struct nvmap_handle_ref *cmdbuf_dupe;
930         int ret = 0, i;
931         unsigned long phys_addr;
932         unsigned long virt_addr;
933         struct nvavp_pushbuffer_submit_hdr *user_hdr =
934                         (struct nvavp_pushbuffer_submit_hdr *) arg;
935         struct nvavp_syncpt syncpt;
936
937         syncpt.id = NVSYNCPT_INVALID;
938         syncpt.value = 0;
939
940         if (_IOC_DIR(cmd) & _IOC_WRITE) {
941                 if (copy_from_user(&hdr, (void __user *)arg,
942                         sizeof(struct nvavp_pushbuffer_submit_hdr)))
943                         return -EFAULT;
944         }
945
946         if (!hdr.cmdbuf.mem)
947                 return 0;
948
949         if (copy_from_user(clientctx->relocs, (void __user *)hdr.relocs,
950                         sizeof(struct nvavp_reloc) * hdr.num_relocs)) {
951                 return -EFAULT;
952         }
953
954         cmdbuf_handle = nvmap_get_handle_id(clientctx->nvmap, hdr.cmdbuf.mem);
955         if (cmdbuf_handle == NULL) {
956                 dev_err(&nvavp->nvhost_dev->dev,
957                         "invalid cmd buffer handle %08x\n", hdr.cmdbuf.mem);
958                 return -EPERM;
959         }
960
961         /* duplicate the new pushbuffer's handle into the nvavp driver's
962          * nvmap context, to ensure that the handle won't be freed as
963          * long as it is in-use by the fb driver */
964         cmdbuf_dupe = nvmap_duplicate_handle_id(nvavp->nvmap, hdr.cmdbuf.mem);
965         nvmap_handle_put(cmdbuf_handle);
966
967         if (IS_ERR(cmdbuf_dupe)) {
968                 dev_err(&nvavp->nvhost_dev->dev,
969                         "could not duplicate handle\n");
970                 return PTR_ERR(cmdbuf_dupe);
971         }
972
973         phys_addr = nvmap_pin(nvavp->nvmap, cmdbuf_dupe);
974         if (IS_ERR((void *)phys_addr)) {
975                 dev_err(&nvavp->nvhost_dev->dev, "could not pin handle\n");
976                 nvmap_free(nvavp->nvmap, cmdbuf_dupe);
977                 return PTR_ERR((void *)phys_addr);
978         }
979
980         virt_addr = (unsigned long)nvmap_mmap(cmdbuf_dupe);
981         if (!virt_addr) {
982                 dev_err(&nvavp->nvhost_dev->dev, "cannot map cmdbuf handle\n");
983                 ret = -ENOMEM;
984                 goto err_cmdbuf_mmap;
985         }
986
987         cmdbuf_data = (u32 *)(virt_addr + hdr.cmdbuf.offset);
988
989         for (i = 0; i < hdr.num_relocs; i++) {
990                 u32 *reloc_addr, target_phys_addr;
991
992                 if (clientctx->relocs[i].cmdbuf_mem != hdr.cmdbuf.mem) {
993                         dev_err(&nvavp->nvhost_dev->dev,
994                                 "reloc info does not match target bufferID\n");
995                         ret = -EPERM;
996                         goto err_reloc_info;
997                 }
998
999                 reloc_addr = cmdbuf_data +
1000                              (clientctx->relocs[i].cmdbuf_offset >> 2);
1001
1002                 target_phys_addr = nvmap_handle_address(clientctx->nvmap,
1003                                             clientctx->relocs[i].target);
1004                 target_phys_addr += clientctx->relocs[i].target_offset;
1005                 writel(target_phys_addr, reloc_addr);
1006         }
1007
1008         if (hdr.syncpt) {
1009                 ret = nvavp_pushbuffer_update(nvavp,
1010                                              (phys_addr + hdr.cmdbuf.offset),
1011                                               hdr.cmdbuf.words, &syncpt,
1012                                               (hdr.flags & NVAVP_UCODE_EXT));
1013
1014                 if (copy_to_user((void __user *)user_hdr->syncpt, &syncpt,
1015                                 sizeof(struct nvavp_syncpt))) {
1016                         ret = -EFAULT;
1017                         goto err_reloc_info;
1018                 }
1019         } else {
1020                 ret = nvavp_pushbuffer_update(nvavp,
1021                                              (phys_addr + hdr.cmdbuf.offset),
1022                                               hdr.cmdbuf.words, NULL,
1023                                               (hdr.flags & NVAVP_UCODE_EXT));
1024         }
1025
1026 err_reloc_info:
1027         nvmap_munmap(cmdbuf_dupe, (void *)virt_addr);
1028 err_cmdbuf_mmap:
1029         nvmap_unpin(nvavp->nvmap, cmdbuf_dupe);
1030         nvmap_free(nvavp->nvmap, cmdbuf_dupe);
1031         return ret;
1032 }
1033
1034 static int nvavp_wake_avp_ioctl(struct file *filp, unsigned int cmd,
1035                                                         unsigned long arg)
1036 {
1037         wmb();
1038         /* wake up avp */
1039         writel(0xA0000001, NVAVP_OS_OUTBOX);
1040         return 0;
1041 }
1042
1043 static int nvavp_force_clock_stay_on_ioctl(struct file *filp, unsigned int cmd,
1044                                                         unsigned long arg)
1045 {
1046         struct nvavp_clientctx *clientctx = filp->private_data;
1047         struct nvavp_info *nvavp = clientctx->nvavp;
1048         struct nvavp_clock_stay_on_state_args clock;
1049
1050         if (copy_from_user(&clock, (void __user *)arg,
1051                            sizeof(struct nvavp_clock_stay_on_state_args)))
1052                 return -EFAULT;
1053
1054         dev_dbg(&nvavp->nvhost_dev->dev, "%s: state=%d\n",
1055                 __func__, clock.state);
1056
1057         if (clock.state != NVAVP_CLOCK_STAY_ON_DISABLED &&
1058             clock.state !=  NVAVP_CLOCK_STAY_ON_ENABLED) {
1059                 dev_err(&nvavp->nvhost_dev->dev, "%s: invalid argument=%d\n",
1060                         __func__, clock.state);
1061                 return -EINVAL;
1062         }
1063
1064         mutex_lock(&nvavp->open_lock);
1065         if (clock.state) {
1066                 if (clientctx->clk_reqs++ == 0)
1067                         nvavp_clks_enable(nvavp);
1068         } else {
1069                 if (--clientctx->clk_reqs == 0)
1070                         nvavp_clks_disable(nvavp);
1071         }
1072         mutex_unlock(&nvavp->open_lock);
1073         return 0;
1074 }
1075
1076 static int tegra_nvavp_open(struct inode *inode, struct file *filp)
1077 {
1078         struct miscdevice *miscdev = filp->private_data;
1079         struct nvavp_info *nvavp = dev_get_drvdata(miscdev->parent);
1080         int ret = 0;
1081         struct nvavp_clientctx *clientctx;
1082
1083         dev_dbg(&nvavp->nvhost_dev->dev, "%s: ++\n", __func__);
1084
1085         nonseekable_open(inode, filp);
1086
1087         clientctx = kzalloc(sizeof(*clientctx), GFP_KERNEL);
1088         if (!clientctx)
1089                 return -ENOMEM;
1090
1091         mutex_lock(&nvavp->open_lock);
1092
1093         if (!nvavp->refcount)
1094                 ret = nvavp_init(nvavp);
1095
1096         if (!ret)
1097                 nvavp->refcount++;
1098
1099         clientctx->nvmap = nvavp->nvmap;
1100         clientctx->nvavp = nvavp;
1101
1102         filp->private_data = clientctx;
1103
1104         mutex_unlock(&nvavp->open_lock);
1105
1106         return ret;
1107 }
1108
1109 static int tegra_nvavp_release(struct inode *inode, struct file *filp)
1110 {
1111         struct nvavp_clientctx *clientctx = filp->private_data;
1112         struct nvavp_info *nvavp = clientctx->nvavp;
1113         int ret = 0;
1114
1115         dev_dbg(&nvavp->nvhost_dev->dev, "%s: ++\n", __func__);
1116
1117         filp->private_data = NULL;
1118
1119         mutex_lock(&nvavp->open_lock);
1120
1121         if (!nvavp->refcount) {
1122                 dev_err(&nvavp->nvhost_dev->dev,
1123                         "releasing while in invalid state\n");
1124                 ret = -EINVAL;
1125                 goto out;
1126         }
1127
1128         /* if this client had any requests, drop our clk ref */
1129         if (clientctx->clk_reqs)
1130                 nvavp_clks_disable(nvavp);
1131
1132         if (nvavp->refcount > 0)
1133                 nvavp->refcount--;
1134         if (!nvavp->refcount)
1135                 nvavp_uninit(nvavp);
1136
1137 out:
1138         nvmap_client_put(clientctx->nvmap);
1139         mutex_unlock(&nvavp->open_lock);
1140         kfree(clientctx);
1141         return ret;
1142 }
1143
1144 static long tegra_nvavp_ioctl(struct file *filp, unsigned int cmd,
1145                             unsigned long arg)
1146 {
1147         int ret = 0;
1148
1149         if (_IOC_TYPE(cmd) != NVAVP_IOCTL_MAGIC ||
1150             _IOC_NR(cmd) < NVAVP_IOCTL_MIN_NR ||
1151             _IOC_NR(cmd) > NVAVP_IOCTL_MAX_NR)
1152                 return -EFAULT;
1153
1154         switch (cmd) {
1155         case NVAVP_IOCTL_SET_NVMAP_FD:
1156                 ret = nvavp_set_nvmapfd_ioctl(filp, cmd, arg);
1157                 break;
1158         case NVAVP_IOCTL_GET_SYNCPOINT_ID:
1159                 ret = nvavp_get_syncpointid_ioctl(filp, cmd, arg);
1160                 break;
1161         case NVAVP_IOCTL_PUSH_BUFFER_SUBMIT:
1162                 ret = nvavp_pushbuffer_submit_ioctl(filp, cmd, arg);
1163                 break;
1164         case NVAVP_IOCTL_SET_CLOCK:
1165                 ret = nvavp_set_clock_ioctl(filp, cmd, arg);
1166                 break;
1167         case NVAVP_IOCTL_GET_CLOCK:
1168                 ret = nvavp_get_clock_ioctl(filp, cmd, arg);
1169                 break;
1170         case NVAVP_IOCTL_WAKE_AVP:
1171                 ret = nvavp_wake_avp_ioctl(filp, cmd, arg);
1172                 break;
1173         case NVAVP_IOCTL_FORCE_CLOCK_STAY_ON:
1174                 ret = nvavp_force_clock_stay_on_ioctl(filp, cmd, arg);
1175                 break;
1176         default:
1177                 ret = -EINVAL;
1178                 break;
1179         }
1180         return ret;
1181 }
1182
1183 static const struct file_operations tegra_nvavp_fops = {
1184         .owner          = THIS_MODULE,
1185         .open           = tegra_nvavp_open,
1186         .release        = tegra_nvavp_release,
1187         .unlocked_ioctl = tegra_nvavp_ioctl,
1188 };
1189
1190 static int tegra_nvavp_probe(struct nvhost_device *ndev)
1191 {
1192         struct nvavp_info *nvavp;
1193         int irq;
1194         unsigned int heap_mask;
1195         u32 iovmm_addr;
1196         int ret = 0;
1197
1198         irq = nvhost_get_irq_byname(ndev, "mbox_from_nvavp_pending");
1199         if (irq < 0) {
1200                 dev_err(&ndev->dev, "invalid nvhost data\n");
1201                 return -EINVAL;
1202         }
1203
1204
1205         nvavp = kzalloc(sizeof(struct nvavp_info), GFP_KERNEL);
1206         if (!nvavp) {
1207                 dev_err(&ndev->dev, "cannot allocate avp_info\n");
1208                 return -ENOMEM;
1209         }
1210
1211         memset(nvavp, 0, sizeof(*nvavp));
1212
1213         nvavp->nvhost_syncpt = &nvhost_get_host(ndev)->syncpt;
1214         if (!nvavp->nvhost_syncpt) {
1215                 dev_err(&ndev->dev, "cannot get syncpt handle\n");
1216                 ret = -ENOENT;
1217                 goto err_get_syncpt;
1218         }
1219
1220         nvavp->nvmap = nvmap_create_client(nvmap_dev, "nvavp_drv");
1221         if (IS_ERR_OR_NULL(nvavp->nvmap)) {
1222                 dev_err(&ndev->dev, "cannot create nvmap client\n");
1223                 ret = PTR_ERR(nvavp->nvmap);
1224                 goto err_nvmap_create_drv_client;
1225         }
1226
1227 #if defined(CONFIG_TEGRA_AVP_KERNEL_ON_MMU) /* Tegra2 with AVP MMU */
1228         heap_mask = NVMAP_HEAP_CARVEOUT_GENERIC;
1229 #elif defined(CONFIG_TEGRA_AVP_KERNEL_ON_SMMU) /* Tegra3 with SMMU */
1230         heap_mask = NVMAP_HEAP_IOVMM;
1231 #else /* nvmem= carveout */
1232         heap_mask = 0;
1233 #endif
1234         switch (heap_mask) {
1235         case NVMAP_HEAP_IOVMM:
1236
1237 #ifdef CONFIG_TEGRA_SMMU_BASE_AT_E0000000
1238                 iovmm_addr = 0xeff00000;
1239 #else
1240                 iovmm_addr = 0x0ff00000;
1241 #endif
1242
1243                 /* Tegra3 A01 has different SMMU address */
1244                 if (tegra_get_chipid() == TEGRA_CHIPID_TEGRA3
1245                         && tegra_get_revision() == TEGRA_REVISION_A01) {
1246                         iovmm_addr = 0xeff00000;
1247                 }
1248
1249                 nvavp->os_info.handle = nvmap_alloc_iovm(nvavp->nvmap, SZ_1M,
1250                                                 L1_CACHE_BYTES,
1251                                                 NVMAP_HANDLE_UNCACHEABLE,
1252                                                 iovmm_addr);
1253                 if (IS_ERR_OR_NULL(nvavp->os_info.handle)) {
1254                         dev_err(&ndev->dev,
1255                                 "cannot create os handle\n");
1256                         ret = PTR_ERR(nvavp->os_info.handle);
1257                         goto err_nvmap_alloc;
1258                 }
1259
1260                 nvavp->os_info.data = nvmap_mmap(nvavp->os_info.handle);
1261                 if (!nvavp->os_info.data) {
1262                         dev_err(&ndev->dev,
1263                                 "cannot map os handle\n");
1264                         ret = -ENOMEM;
1265                         goto err_nvmap_mmap;
1266                 }
1267
1268                 nvavp->os_info.phys =
1269                         nvmap_pin(nvavp->nvmap, nvavp->os_info.handle);
1270                 if (IS_ERR_OR_NULL((void *)nvavp->os_info.phys)) {
1271                         dev_err(&ndev->dev,
1272                                 "cannot pin os handle\n");
1273                         ret = PTR_ERR((void *)nvavp->os_info.phys);
1274                         goto err_nvmap_pin;
1275                 }
1276
1277                 dev_info(&ndev->dev,
1278                         "allocated IOVM at %lx for AVP os\n",
1279                         (unsigned long)nvavp->os_info.phys);
1280                 break;
1281         case NVMAP_HEAP_CARVEOUT_GENERIC:
1282                 nvavp->os_info.handle = nvmap_alloc(nvavp->nvmap, SZ_1M, SZ_1M,
1283                                                 NVMAP_HANDLE_UNCACHEABLE, 0);
1284                 if (IS_ERR_OR_NULL(nvavp->os_info.handle)) {
1285                         dev_err(&ndev->dev, "cannot create AVP os handle\n");
1286                         ret = PTR_ERR(nvavp->os_info.handle);
1287                         goto err_nvmap_alloc;
1288                 }
1289
1290                 nvavp->os_info.data = nvmap_mmap(nvavp->os_info.handle);
1291                 if (!nvavp->os_info.data) {
1292                         dev_err(&ndev->dev, "cannot map AVP os handle\n");
1293                         ret = -ENOMEM;
1294                         goto err_nvmap_mmap;
1295                 }
1296
1297                 nvavp->os_info.phys = nvmap_pin(nvavp->nvmap,
1298                                         nvavp->os_info.handle);
1299                 if (IS_ERR_OR_NULL((void *)nvavp->os_info.phys)) {
1300                         dev_err(&ndev->dev, "cannot pin AVP os handle\n");
1301                         ret = PTR_ERR((void *)nvavp->os_info.phys);
1302                         goto err_nvmap_pin;
1303                 }
1304
1305                 dev_info(&ndev->dev,
1306                         "allocated carveout memory at %lx for AVP os\n",
1307                         (unsigned long)nvavp->os_info.phys);
1308                 break;
1309         default:
1310                 dev_err(&ndev->dev, "invalid/non-supported heap for AVP os\n");
1311                 ret = -EINVAL;
1312                 goto err_get_syncpt;
1313         }
1314
1315         nvavp->mbox_from_avp_pend_irq = irq;
1316         mutex_init(&nvavp->open_lock);
1317         mutex_init(&nvavp->pushbuffer_lock);
1318
1319         /* TODO DO NOT USE NVAVP DEVICE */
1320         nvavp->cop_clk = clk_get(&ndev->dev, "cop");
1321         if (IS_ERR(nvavp->cop_clk)) {
1322                 dev_err(&ndev->dev, "cannot get cop clock\n");
1323                 ret = -ENOENT;
1324                 goto err_get_cop_clk;
1325         }
1326
1327         nvavp->vde_clk = clk_get(&ndev->dev, "vde");
1328         if (IS_ERR(nvavp->vde_clk)) {
1329                 dev_err(&ndev->dev, "cannot get vde clock\n");
1330                 ret = -ENOENT;
1331                 goto err_get_vde_clk;
1332         }
1333
1334         nvavp->bsev_clk = clk_get(&ndev->dev, "bsev");
1335         if (IS_ERR(nvavp->bsev_clk)) {
1336                 dev_err(&ndev->dev, "cannot get bsev clock\n");
1337                 ret = -ENOENT;
1338                 goto err_get_bsev_clk;
1339         }
1340
1341         nvavp->sclk = clk_get(&ndev->dev, "sclk");
1342         if (IS_ERR(nvavp->sclk)) {
1343                 dev_err(&ndev->dev, "cannot get avp.sclk clock\n");
1344                 ret = -ENOENT;
1345                 goto err_get_sclk;
1346         }
1347
1348         nvavp->emc_clk = clk_get(&ndev->dev, "emc");
1349         if (IS_ERR(nvavp->emc_clk)) {
1350                 dev_err(&ndev->dev, "cannot get emc clock\n");
1351                 ret = -ENOENT;
1352                 goto err_get_emc_clk;
1353         }
1354
1355         nvavp->clk_enabled = 0;
1356         nvavp_halt_avp(nvavp);
1357
1358         INIT_WORK(&nvavp->clock_disable_work, clock_disable_handler);
1359
1360         nvavp->misc_dev.minor = MISC_DYNAMIC_MINOR;
1361         nvavp->misc_dev.name = "tegra_avpchannel";
1362         nvavp->misc_dev.fops = &tegra_nvavp_fops;
1363         nvavp->misc_dev.mode = S_IRWXUGO;
1364         nvavp->misc_dev.parent = &ndev->dev;
1365
1366         ret = misc_register(&nvavp->misc_dev);
1367         if (ret) {
1368                 dev_err(&ndev->dev, "unable to register misc device!\n");
1369                 goto err_misc_reg;
1370         }
1371
1372         ret = request_irq(irq, nvavp_mbox_pending_isr, 0,
1373                           TEGRA_NVAVP_NAME, nvavp);
1374         if (ret) {
1375                 dev_err(&ndev->dev, "cannot register irq handler\n");
1376                 goto err_req_irq_pend;
1377         }
1378         disable_irq(nvavp->mbox_from_avp_pend_irq);
1379
1380         nvhost_set_drvdata(ndev, nvavp);
1381         nvavp->nvhost_dev = ndev;
1382
1383         return 0;
1384
1385 err_req_irq_pend:
1386         misc_deregister(&nvavp->misc_dev);
1387 err_misc_reg:
1388         clk_put(nvavp->emc_clk);
1389 err_get_emc_clk:
1390         clk_put(nvavp->sclk);
1391 err_get_sclk:
1392         clk_put(nvavp->bsev_clk);
1393 err_get_bsev_clk:
1394         clk_put(nvavp->vde_clk);
1395 err_get_vde_clk:
1396         clk_put(nvavp->cop_clk);
1397 err_get_cop_clk:
1398         nvmap_unpin(nvavp->nvmap, nvavp->os_info.handle);
1399 err_nvmap_pin:
1400         nvmap_munmap(nvavp->os_info.handle, nvavp->os_info.data);
1401 err_nvmap_mmap:
1402 #if defined(CONFIG_TEGRA_AVP_KERNEL_ON_MMU)
1403         nvmap_free(nvavp->nvmap, nvavp->os_info.handle);
1404 #elif defined(CONFIG_TEGRA_AVP_KERNEL_ON_SMMU)
1405         nvmap_free_iovm(nvavp->nvmap, nvavp->os_info.handle);
1406 #endif
1407 err_nvmap_alloc:
1408         nvmap_client_put(nvavp->nvmap);
1409 err_nvmap_create_drv_client:
1410 err_get_syncpt:
1411         kfree(nvavp);
1412         return ret;
1413 }
1414
1415 static int tegra_nvavp_remove(struct nvhost_device *ndev)
1416 {
1417         struct nvavp_info *nvavp = nvhost_get_drvdata(ndev);
1418
1419         if (!nvavp)
1420                 return 0;
1421
1422         mutex_lock(&nvavp->open_lock);
1423         if (nvavp->refcount) {
1424                 mutex_unlock(&nvavp->open_lock);
1425                 return -EBUSY;
1426         }
1427         mutex_unlock(&nvavp->open_lock);
1428
1429         nvavp_unload_ucode(nvavp);
1430         nvavp_unload_os(nvavp);
1431
1432         misc_deregister(&nvavp->misc_dev);
1433
1434         clk_put(nvavp->bsev_clk);
1435         clk_put(nvavp->vde_clk);
1436         clk_put(nvavp->cop_clk);
1437
1438         clk_put(nvavp->emc_clk);
1439         clk_put(nvavp->sclk);
1440
1441         nvmap_client_put(nvavp->nvmap);
1442
1443         kfree(nvavp);
1444         return 0;
1445 }
1446
1447 #ifdef CONFIG_PM
1448 static int tegra_nvavp_suspend(struct nvhost_device *ndev, pm_message_t state)
1449 {
1450         struct nvavp_info *nvavp = nvhost_get_drvdata(ndev);
1451         int ret = 0;
1452
1453         mutex_lock(&nvavp->open_lock);
1454
1455         if (nvavp->refcount) {
1456                 if (!nvavp->clk_enabled)
1457                         nvavp_uninit(nvavp);
1458                 else
1459                         ret = -EBUSY;
1460         }
1461
1462         mutex_unlock(&nvavp->open_lock);
1463
1464         return ret;
1465 }
1466
1467 static int tegra_nvavp_resume(struct nvhost_device *ndev)
1468 {
1469         struct nvavp_info *nvavp = nvhost_get_drvdata(ndev);
1470
1471         mutex_lock(&nvavp->open_lock);
1472
1473         if (nvavp->refcount)
1474                 nvavp_init(nvavp);
1475
1476         mutex_unlock(&nvavp->open_lock);
1477
1478         return 0;
1479 }
1480 #endif
1481
1482 static struct nvhost_driver tegra_nvavp_driver = {
1483         .driver = {
1484                 .name   = TEGRA_NVAVP_NAME,
1485                 .owner  = THIS_MODULE,
1486         },
1487         .probe          = tegra_nvavp_probe,
1488         .remove         = tegra_nvavp_remove,
1489 #ifdef CONFIG_PM
1490         .suspend        = tegra_nvavp_suspend,
1491         .resume         = tegra_nvavp_resume,
1492 #endif
1493 };
1494
1495 static int __init tegra_nvavp_init(void)
1496 {
1497         return nvhost_driver_register(&tegra_nvavp_driver);
1498 }
1499
1500 static void __exit tegra_nvavp_exit(void)
1501 {
1502         nvhost_driver_unregister(&tegra_nvavp_driver);
1503 }
1504
1505 module_init(tegra_nvavp_init);
1506 module_exit(tegra_nvavp_exit);
1507
1508 MODULE_AUTHOR("NVIDIA");
1509 MODULE_DESCRIPTION("Channel based AVP driver for Tegra");
1510 MODULE_VERSION("1.0");
1511 MODULE_LICENSE("Dual BSD/GPL");