V4L/DVB (4504): Enable audio DMA restart on channel change even when cx88-alsa is...
[linux-2.6.git] / drivers / media / video / cx88 / cx88-tvaudio.c
1 /*
2
3     cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
4
5      (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
6      (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
7      (c) 2003 Gerd Knorr <kraxel@bytesex.org>
8
9     -----------------------------------------------------------------------
10
11     Lot of voodoo here.  Even the data sheet doesn't help to
12     understand what is going on here, the documentation for the audio
13     part of the cx2388x chip is *very* bad.
14
15     Some of this comes from party done linux driver sources I got from
16     [undocumented].
17
18     Some comes from the dscaler sources, one of the dscaler driver guy works
19     for Conexant ...
20
21     -----------------------------------------------------------------------
22
23     This program is free software; you can redistribute it and/or modify
24     it under the terms of the GNU General Public License as published by
25     the Free Software Foundation; either version 2 of the License, or
26     (at your option) any later version.
27
28     This program is distributed in the hope that it will be useful,
29     but WITHOUT ANY WARRANTY; without even the implied warranty of
30     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
31     GNU General Public License for more details.
32
33     You should have received a copy of the GNU General Public License
34     along with this program; if not, write to the Free Software
35     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
36 */
37
38 #include <linux/module.h>
39 #include <linux/moduleparam.h>
40 #include <linux/errno.h>
41 #include <linux/kernel.h>
42 #include <linux/slab.h>
43 #include <linux/mm.h>
44 #include <linux/poll.h>
45 #include <linux/pci.h>
46 #include <linux/signal.h>
47 #include <linux/ioport.h>
48 #include <linux/sched.h>
49 #include <linux/types.h>
50 #include <linux/interrupt.h>
51 #include <linux/vmalloc.h>
52 #include <linux/init.h>
53 #include <linux/smp_lock.h>
54 #include <linux/delay.h>
55 #include <linux/kthread.h>
56
57 #include "cx88.h"
58
59 static unsigned int audio_debug = 0;
60 module_param(audio_debug, int, 0644);
61 MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
62
63 static unsigned int always_analog = 0;
64 module_param(always_analog,int,0644);
65 MODULE_PARM_DESC(always_analog,"force analog audio out");
66
67
68 #define dprintk(fmt, arg...)    if (audio_debug) \
69         printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
70
71 /* ----------------------------------------------------------- */
72
73 static char *aud_ctl_names[64] = {
74         [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
75         [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
76         [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
77         [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
78         [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
79         [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
80         [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
81         [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
82         [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
83         [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
84         [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
85         [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
86         [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
87         [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
88         [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
89         [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
90         [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
91         [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
92         [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
93         [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
94         [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
95         [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
96         [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
97 };
98
99 struct rlist {
100         u32 reg;
101         u32 val;
102 };
103
104 static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
105 {
106         int i;
107
108         for (i = 0; l[i].reg; i++) {
109                 switch (l[i].reg) {
110                 case AUD_PDF_DDS_CNST_BYTE2:
111                 case AUD_PDF_DDS_CNST_BYTE1:
112                 case AUD_PDF_DDS_CNST_BYTE0:
113                 case AUD_QAM_MODE:
114                 case AUD_PHACC_FREQ_8MSB:
115                 case AUD_PHACC_FREQ_8LSB:
116                         cx_writeb(l[i].reg, l[i].val);
117                         break;
118                 default:
119                         cx_write(l[i].reg, l[i].val);
120                         break;
121                 }
122         }
123 }
124
125 static void set_audio_start(struct cx88_core *core, u32 mode)
126 {
127         /* mute */
128         cx_write(AUD_VOL_CTL, (1 << 6));
129
130         /* start programming */
131         cx_write(AUD_INIT, mode);
132         cx_write(AUD_INIT_LD, 0x0001);
133         cx_write(AUD_SOFT_RESET, 0x0001);
134 }
135
136 static void set_audio_finish(struct cx88_core *core, u32 ctl)
137 {
138         u32 volume;
139
140         /* restart dma; This avoids buzz in NICAM and is good in others  */
141         cx88_stop_audio_dma(core);
142         cx_write(AUD_RATE_THRES_DMD, 0x000000C0);
143         cx88_start_audio_dma(core);
144
145         if (cx88_boards[core->board].blackbird) {
146                 /* sets sound input from external adc */
147                 switch (core->board) {
148                 case CX88_BOARD_HAUPPAUGE_ROSLYN:
149                 case CX88_BOARD_KWORLD_MCE200_DELUXE:
150                 case CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT:
151                 case CX88_BOARD_PIXELVIEW_PLAYTV_P7000:
152                 case CX88_BOARD_ASUS_PVR_416:
153                         cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
154                         break;
155                 default:
156                         cx_set(AUD_CTL, EN_I2SIN_ENABLE);
157                 }
158
159                 cx_write(AUD_I2SINPUTCNTL, 4);
160                 cx_write(AUD_BAUDRATE, 1);
161                 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
162                 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
163                 cx_write(AUD_I2SOUTPUTCNTL, 1);
164                 cx_write(AUD_I2SCNTL, 0);
165                 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
166         }
167         if ((always_analog) || (!cx88_boards[core->board].blackbird)) {
168                 ctl |= EN_DAC_ENABLE;
169                 cx_write(AUD_CTL, ctl);
170         }
171
172         /* finish programming */
173         cx_write(AUD_SOFT_RESET, 0x0000);
174
175         /* unmute */
176         volume = cx_sread(SHADOW_AUD_VOL_CTL);
177         cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
178 }
179
180 /* ----------------------------------------------------------- */
181
182 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
183                                     u32 mode)
184 {
185         static const struct rlist btsc[] = {
186                 {AUD_AFE_12DB_EN, 0x00000001},
187                 {AUD_OUT1_SEL, 0x00000013},
188                 {AUD_OUT1_SHIFT, 0x00000000},
189                 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
190                 {AUD_DMD_RA_DDS, 0x00c3e7aa},
191                 {AUD_DBX_IN_GAIN, 0x00004734},
192                 {AUD_DBX_WBE_GAIN, 0x00004640},
193                 {AUD_DBX_SE_GAIN, 0x00008d31},
194                 {AUD_DCOC_0_SRC, 0x0000001a},
195                 {AUD_IIR1_4_SEL, 0x00000021},
196                 {AUD_DCOC_PASS_IN, 0x00000003},
197                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
198                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
199                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
200                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
201                 {AUD_DN0_FREQ, 0x0000283b},
202                 {AUD_DN2_SRC_SEL, 0x00000008},
203                 {AUD_DN2_FREQ, 0x00003000},
204                 {AUD_DN2_AFC, 0x00000002},
205                 {AUD_DN2_SHFT, 0x00000000},
206                 {AUD_IIR2_2_SEL, 0x00000020},
207                 {AUD_IIR2_2_SHIFT, 0x00000000},
208                 {AUD_IIR2_3_SEL, 0x0000001f},
209                 {AUD_IIR2_3_SHIFT, 0x00000000},
210                 {AUD_CRDC1_SRC_SEL, 0x000003ce},
211                 {AUD_CRDC1_SHIFT, 0x00000000},
212                 {AUD_CORDIC_SHIFT_1, 0x00000007},
213                 {AUD_DCOC_1_SRC, 0x0000001b},
214                 {AUD_DCOC1_SHIFT, 0x00000000},
215                 {AUD_RDSI_SEL, 0x00000008},
216                 {AUD_RDSQ_SEL, 0x00000008},
217                 {AUD_RDSI_SHIFT, 0x00000000},
218                 {AUD_RDSQ_SHIFT, 0x00000000},
219                 {AUD_POLYPH80SCALEFAC, 0x00000003},
220                 { /* end of list */ },
221         };
222         static const struct rlist btsc_sap[] = {
223                 {AUD_AFE_12DB_EN, 0x00000001},
224                 {AUD_DBX_IN_GAIN, 0x00007200},
225                 {AUD_DBX_WBE_GAIN, 0x00006200},
226                 {AUD_DBX_SE_GAIN, 0x00006200},
227                 {AUD_IIR1_1_SEL, 0x00000000},
228                 {AUD_IIR1_3_SEL, 0x00000001},
229                 {AUD_DN1_SRC_SEL, 0x00000007},
230                 {AUD_IIR1_4_SHIFT, 0x00000006},
231                 {AUD_IIR2_1_SHIFT, 0x00000000},
232                 {AUD_IIR2_2_SHIFT, 0x00000000},
233                 {AUD_IIR3_0_SHIFT, 0x00000000},
234                 {AUD_IIR3_1_SHIFT, 0x00000000},
235                 {AUD_IIR3_0_SEL, 0x0000000d},
236                 {AUD_IIR3_1_SEL, 0x0000000e},
237                 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
238                 {AUD_DEEMPH1_SHIFT, 0x00000000},
239                 {AUD_DEEMPH1_G0, 0x00004000},
240                 {AUD_DEEMPH1_A0, 0x00000000},
241                 {AUD_DEEMPH1_B0, 0x00000000},
242                 {AUD_DEEMPH1_A1, 0x00000000},
243                 {AUD_DEEMPH1_B1, 0x00000000},
244                 {AUD_OUT0_SEL, 0x0000003f},
245                 {AUD_OUT1_SEL, 0x0000003f},
246                 {AUD_DN1_AFC, 0x00000002},
247                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
248                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
249                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
250                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
251                 {AUD_IIR1_0_SEL, 0x0000001d},
252                 {AUD_IIR1_2_SEL, 0x0000001e},
253                 {AUD_IIR2_1_SEL, 0x00000002},
254                 {AUD_IIR2_2_SEL, 0x00000004},
255                 {AUD_IIR3_2_SEL, 0x0000000f},
256                 {AUD_DCOC2_SHIFT, 0x00000001},
257                 {AUD_IIR3_2_SHIFT, 0x00000001},
258                 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
259                 {AUD_CORDIC_SHIFT_1, 0x00000006},
260                 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
261                 {AUD_DMD_RA_DDS, 0x00f696e6},
262                 {AUD_IIR2_3_SEL, 0x00000025},
263                 {AUD_IIR1_4_SEL, 0x00000021},
264                 {AUD_DN1_FREQ, 0x0000c965},
265                 {AUD_DCOC_PASS_IN, 0x00000003},
266                 {AUD_DCOC_0_SRC, 0x0000001a},
267                 {AUD_DCOC_1_SRC, 0x0000001b},
268                 {AUD_DCOC1_SHIFT, 0x00000000},
269                 {AUD_RDSI_SEL, 0x00000009},
270                 {AUD_RDSQ_SEL, 0x00000009},
271                 {AUD_RDSI_SHIFT, 0x00000000},
272                 {AUD_RDSQ_SHIFT, 0x00000000},
273                 {AUD_POLYPH80SCALEFAC, 0x00000003},
274                 { /* end of list */ },
275         };
276
277         mode |= EN_FMRADIO_EN_RDS;
278
279         if (sap) {
280                 dprintk("%s SAP (status: unknown)\n", __FUNCTION__);
281                 set_audio_start(core, SEL_SAP);
282                 set_audio_registers(core, btsc_sap);
283                 set_audio_finish(core, mode);
284         } else {
285                 dprintk("%s (status: known-good)\n", __FUNCTION__);
286                 set_audio_start(core, SEL_BTSC);
287                 set_audio_registers(core, btsc);
288                 set_audio_finish(core, mode);
289         }
290 }
291
292 static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
293 {
294         static const struct rlist nicam_l[] = {
295                 {AUD_AFE_12DB_EN, 0x00000001},
296                 {AUD_RATE_ADJ1, 0x00000060},
297                 {AUD_RATE_ADJ2, 0x000000F9},
298                 {AUD_RATE_ADJ3, 0x000001CC},
299                 {AUD_RATE_ADJ4, 0x000002B3},
300                 {AUD_RATE_ADJ5, 0x00000726},
301                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
302                 {AUD_DEEMPHDENOM2_R, 0x00000000},
303                 {AUD_ERRLOGPERIOD_R, 0x00000064},
304                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
305                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
306                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
307                 {AUD_POLYPH80SCALEFAC, 0x00000003},
308                 {AUD_DMD_RA_DDS, 0x00C00000},
309                 {AUD_PLL_INT, 0x0000001E},
310                 {AUD_PLL_DDS, 0x00000000},
311                 {AUD_PLL_FRAC, 0x0000E542},
312                 {AUD_START_TIMER, 0x00000000},
313                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
314                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
315                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
316                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
317                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
318                 {AUD_QAM_MODE, 0x05},
319                 {AUD_PHACC_FREQ_8MSB, 0x34},
320                 {AUD_PHACC_FREQ_8LSB, 0x4C},
321                 {AUD_DEEMPHGAIN_R, 0x00006680},
322                 {AUD_RATE_THRES_DMD, 0x000000C0},
323                 { /* end of list */ },
324         };
325
326         static const struct rlist nicam_bgdki_common[] = {
327                 {AUD_AFE_12DB_EN, 0x00000001},
328                 {AUD_RATE_ADJ1, 0x00000010},
329                 {AUD_RATE_ADJ2, 0x00000040},
330                 {AUD_RATE_ADJ3, 0x00000100},
331                 {AUD_RATE_ADJ4, 0x00000400},
332                 {AUD_RATE_ADJ5, 0x00001000},
333                 {AUD_ERRLOGPERIOD_R, 0x00000fff},
334                 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
335                 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
336                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
337                 {AUD_POLYPH80SCALEFAC, 0x00000003},
338                 {AUD_DEEMPHGAIN_R, 0x000023c2},
339                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
340                 {AUD_DEEMPHNUMER2_R, 0x0003023e},
341                 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
342                 {AUD_DEEMPHDENOM2_R, 0x00000000},
343                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
344                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
345                 {AUD_QAM_MODE, 0x05},
346                 { /* end of list */ },
347         };
348
349         static const struct rlist nicam_i[] = {
350                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
351                 {AUD_PHACC_FREQ_8MSB, 0x3a},
352                 {AUD_PHACC_FREQ_8LSB, 0x93},
353                 { /* end of list */ },
354         };
355
356         static const struct rlist nicam_default[] = {
357                 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
358                 {AUD_PHACC_FREQ_8MSB, 0x34},
359                 {AUD_PHACC_FREQ_8LSB, 0x4c},
360                 { /* end of list */ },
361         };
362
363         set_audio_start(core,SEL_NICAM);
364         switch (core->tvaudio) {
365         case WW_L:
366                 dprintk("%s SECAM-L NICAM (status: devel)\n", __FUNCTION__);
367                 set_audio_registers(core, nicam_l);
368                 break;
369         case WW_I:
370                 dprintk("%s PAL-I NICAM (status: known-good)\n", __FUNCTION__);
371                 set_audio_registers(core, nicam_bgdki_common);
372                 set_audio_registers(core, nicam_i);
373                 break;
374         default:
375                 dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __FUNCTION__);
376                 set_audio_registers(core, nicam_bgdki_common);
377                 set_audio_registers(core, nicam_default);
378                 break;
379         };
380
381         mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
382         set_audio_finish(core, mode);
383 }
384
385 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
386 {
387         static const struct rlist a2_bgdk_common[] = {
388                 {AUD_ERRLOGPERIOD_R, 0x00000064},
389                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
390                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
391                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
392                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
393                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
394                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
395                 {AUD_QAM_MODE, 0x05},
396                 {AUD_PHACC_FREQ_8MSB, 0x34},
397                 {AUD_PHACC_FREQ_8LSB, 0x4c},
398                 {AUD_RATE_ADJ1, 0x00000100},
399                 {AUD_RATE_ADJ2, 0x00000200},
400                 {AUD_RATE_ADJ3, 0x00000300},
401                 {AUD_RATE_ADJ4, 0x00000400},
402                 {AUD_RATE_ADJ5, 0x00000500},
403                 {AUD_THR_FR, 0x00000000},
404                 {AAGC_HYST, 0x0000001a},
405                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
406                 {AUD_PILOT_BQD_1_K1, 0x00551340},
407                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
408                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
409                 {AUD_PILOT_BQD_1_K4, 0x00400000},
410                 {AUD_PILOT_BQD_2_K0, 0x00040000},
411                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
412                 {AUD_PILOT_BQD_2_K2, 0x00400000},
413                 {AUD_PILOT_BQD_2_K3, 0x00000000},
414                 {AUD_PILOT_BQD_2_K4, 0x00000000},
415                 {AUD_MODE_CHG_TIMER, 0x00000040},
416                 {AUD_AFE_12DB_EN, 0x00000001},
417                 {AUD_CORDIC_SHIFT_0, 0x00000007},
418                 {AUD_CORDIC_SHIFT_1, 0x00000007},
419                 {AUD_DEEMPH0_G0, 0x00000380},
420                 {AUD_DEEMPH1_G0, 0x00000380},
421                 {AUD_DCOC_0_SRC, 0x0000001a},
422                 {AUD_DCOC0_SHIFT, 0x00000000},
423                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
424                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
425                 {AUD_DCOC_PASS_IN, 0x00000003},
426                 {AUD_IIR3_0_SEL, 0x00000021},
427                 {AUD_DN2_AFC, 0x00000002},
428                 {AUD_DCOC_1_SRC, 0x0000001b},
429                 {AUD_DCOC1_SHIFT, 0x00000000},
430                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
431                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
432                 {AUD_IIR3_1_SEL, 0x00000023},
433                 {AUD_RDSI_SEL, 0x00000017},
434                 {AUD_RDSI_SHIFT, 0x00000000},
435                 {AUD_RDSQ_SEL, 0x00000017},
436                 {AUD_RDSQ_SHIFT, 0x00000000},
437                 {AUD_PLL_INT, 0x0000001e},
438                 {AUD_PLL_DDS, 0x00000000},
439                 {AUD_PLL_FRAC, 0x0000e542},
440                 {AUD_POLYPH80SCALEFAC, 0x00000001},
441                 {AUD_START_TIMER, 0x00000000},
442                 { /* end of list */ },
443         };
444
445         static const struct rlist a2_bg[] = {
446                 {AUD_DMD_RA_DDS, 0x002a4f2f},
447                 {AUD_C1_UP_THR, 0x00007000},
448                 {AUD_C1_LO_THR, 0x00005400},
449                 {AUD_C2_UP_THR, 0x00005400},
450                 {AUD_C2_LO_THR, 0x00003000},
451                 { /* end of list */ },
452         };
453
454         static const struct rlist a2_dk[] = {
455                 {AUD_DMD_RA_DDS, 0x002a4f2f},
456                 {AUD_C1_UP_THR, 0x00007000},
457                 {AUD_C1_LO_THR, 0x00005400},
458                 {AUD_C2_UP_THR, 0x00005400},
459                 {AUD_C2_LO_THR, 0x00003000},
460                 {AUD_DN0_FREQ, 0x00003a1c},
461                 {AUD_DN2_FREQ, 0x0000d2e0},
462                 { /* end of list */ },
463         };
464
465         static const struct rlist a1_i[] = {
466                 {AUD_ERRLOGPERIOD_R, 0x00000064},
467                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
468                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
469                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
470                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
471                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
472                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
473                 {AUD_QAM_MODE, 0x05},
474                 {AUD_PHACC_FREQ_8MSB, 0x3a},
475                 {AUD_PHACC_FREQ_8LSB, 0x93},
476                 {AUD_DMD_RA_DDS, 0x002a4f2f},
477                 {AUD_PLL_INT, 0x0000001e},
478                 {AUD_PLL_DDS, 0x00000004},
479                 {AUD_PLL_FRAC, 0x0000e542},
480                 {AUD_RATE_ADJ1, 0x00000100},
481                 {AUD_RATE_ADJ2, 0x00000200},
482                 {AUD_RATE_ADJ3, 0x00000300},
483                 {AUD_RATE_ADJ4, 0x00000400},
484                 {AUD_RATE_ADJ5, 0x00000500},
485                 {AUD_THR_FR, 0x00000000},
486                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
487                 {AUD_PILOT_BQD_1_K1, 0x00551340},
488                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
489                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
490                 {AUD_PILOT_BQD_1_K4, 0x00400000},
491                 {AUD_PILOT_BQD_2_K0, 0x00040000},
492                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
493                 {AUD_PILOT_BQD_2_K2, 0x00400000},
494                 {AUD_PILOT_BQD_2_K3, 0x00000000},
495                 {AUD_PILOT_BQD_2_K4, 0x00000000},
496                 {AUD_MODE_CHG_TIMER, 0x00000060},
497                 {AUD_AFE_12DB_EN, 0x00000001},
498                 {AAGC_HYST, 0x0000000a},
499                 {AUD_CORDIC_SHIFT_0, 0x00000007},
500                 {AUD_CORDIC_SHIFT_1, 0x00000007},
501                 {AUD_C1_UP_THR, 0x00007000},
502                 {AUD_C1_LO_THR, 0x00005400},
503                 {AUD_C2_UP_THR, 0x00005400},
504                 {AUD_C2_LO_THR, 0x00003000},
505                 {AUD_DCOC_0_SRC, 0x0000001a},
506                 {AUD_DCOC0_SHIFT, 0x00000000},
507                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
508                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
509                 {AUD_DCOC_PASS_IN, 0x00000003},
510                 {AUD_IIR3_0_SEL, 0x00000021},
511                 {AUD_DN2_AFC, 0x00000002},
512                 {AUD_DCOC_1_SRC, 0x0000001b},
513                 {AUD_DCOC1_SHIFT, 0x00000000},
514                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
515                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
516                 {AUD_IIR3_1_SEL, 0x00000023},
517                 {AUD_DN0_FREQ, 0x000035a3},
518                 {AUD_DN2_FREQ, 0x000029c7},
519                 {AUD_CRDC0_SRC_SEL, 0x00000511},
520                 {AUD_IIR1_0_SEL, 0x00000001},
521                 {AUD_IIR1_1_SEL, 0x00000000},
522                 {AUD_IIR3_2_SEL, 0x00000003},
523                 {AUD_IIR3_2_SHIFT, 0x00000000},
524                 {AUD_IIR3_0_SEL, 0x00000002},
525                 {AUD_IIR2_0_SEL, 0x00000021},
526                 {AUD_IIR2_0_SHIFT, 0x00000002},
527                 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
528                 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
529                 {AUD_POLYPH80SCALEFAC, 0x00000001},
530                 {AUD_START_TIMER, 0x00000000},
531                 { /* end of list */ },
532         };
533
534         static const struct rlist am_l[] = {
535                 {AUD_ERRLOGPERIOD_R, 0x00000064},
536                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
537                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
538                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
539                 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
540                 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
541                 {AUD_QAM_MODE, 0x00},
542                 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
543                 {AUD_PHACC_FREQ_8MSB, 0x3a},
544                 {AUD_PHACC_FREQ_8LSB, 0x4a},
545                 {AUD_DEEMPHGAIN_R, 0x00006680},
546                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
547                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
548                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
549                 {AUD_DEEMPHDENOM2_R, 0x00000000},
550                 {AUD_FM_MODE_ENABLE, 0x00000007},
551                 {AUD_POLYPH80SCALEFAC, 0x00000003},
552                 {AUD_AFE_12DB_EN, 0x00000001},
553                 {AAGC_GAIN, 0x00000000},
554                 {AAGC_HYST, 0x00000018},
555                 {AAGC_DEF, 0x00000020},
556                 {AUD_DN0_FREQ, 0x00000000},
557                 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
558                 {AUD_DCOC_0_SRC, 0x00000021},
559                 {AUD_IIR1_0_SEL, 0x00000000},
560                 {AUD_IIR1_0_SHIFT, 0x00000007},
561                 {AUD_IIR1_1_SEL, 0x00000002},
562                 {AUD_IIR1_1_SHIFT, 0x00000000},
563                 {AUD_DCOC_1_SRC, 0x00000003},
564                 {AUD_DCOC1_SHIFT, 0x00000000},
565                 {AUD_DCOC_PASS_IN, 0x00000000},
566                 {AUD_IIR1_2_SEL, 0x00000023},
567                 {AUD_IIR1_2_SHIFT, 0x00000000},
568                 {AUD_IIR1_3_SEL, 0x00000004},
569                 {AUD_IIR1_3_SHIFT, 0x00000007},
570                 {AUD_IIR1_4_SEL, 0x00000005},
571                 {AUD_IIR1_4_SHIFT, 0x00000007},
572                 {AUD_IIR3_0_SEL, 0x00000007},
573                 {AUD_IIR3_0_SHIFT, 0x00000000},
574                 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
575                 {AUD_DEEMPH0_SHIFT, 0x00000000},
576                 {AUD_DEEMPH0_G0, 0x00007000},
577                 {AUD_DEEMPH0_A0, 0x00000000},
578                 {AUD_DEEMPH0_B0, 0x00000000},
579                 {AUD_DEEMPH0_A1, 0x00000000},
580                 {AUD_DEEMPH0_B1, 0x00000000},
581                 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
582                 {AUD_DEEMPH1_SHIFT, 0x00000000},
583                 {AUD_DEEMPH1_G0, 0x00007000},
584                 {AUD_DEEMPH1_A0, 0x00000000},
585                 {AUD_DEEMPH1_B0, 0x00000000},
586                 {AUD_DEEMPH1_A1, 0x00000000},
587                 {AUD_DEEMPH1_B1, 0x00000000},
588                 {AUD_OUT0_SEL, 0x0000003F},
589                 {AUD_OUT1_SEL, 0x0000003F},
590                 {AUD_DMD_RA_DDS, 0x00F5C285},
591                 {AUD_PLL_INT, 0x0000001E},
592                 {AUD_PLL_DDS, 0x00000000},
593                 {AUD_PLL_FRAC, 0x0000E542},
594                 {AUD_RATE_ADJ1, 0x00000100},
595                 {AUD_RATE_ADJ2, 0x00000200},
596                 {AUD_RATE_ADJ3, 0x00000300},
597                 {AUD_RATE_ADJ4, 0x00000400},
598                 {AUD_RATE_ADJ5, 0x00000500},
599                 {AUD_RATE_THRES_DMD, 0x000000C0},
600                 { /* end of list */ },
601         };
602
603         static const struct rlist a2_deemph50[] = {
604                 {AUD_DEEMPH0_G0, 0x00000380},
605                 {AUD_DEEMPH1_G0, 0x00000380},
606                 {AUD_DEEMPHGAIN_R, 0x000011e1},
607                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
608                 {AUD_DEEMPHNUMER2_R, 0x0003023c},
609                 { /* end of list */ },
610         };
611
612         set_audio_start(core, SEL_A2);
613         switch (core->tvaudio) {
614         case WW_BG:
615                 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __FUNCTION__);
616                 set_audio_registers(core, a2_bgdk_common);
617                 set_audio_registers(core, a2_bg);
618                 set_audio_registers(core, a2_deemph50);
619                 break;
620         case WW_DK:
621                 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __FUNCTION__);
622                 set_audio_registers(core, a2_bgdk_common);
623                 set_audio_registers(core, a2_dk);
624                 set_audio_registers(core, a2_deemph50);
625                 break;
626         case WW_I:
627                 dprintk("%s PAL-I A1 (status: known-good)\n", __FUNCTION__);
628                 set_audio_registers(core, a1_i);
629                 set_audio_registers(core, a2_deemph50);
630                 break;
631         case WW_L:
632                 dprintk("%s AM-L (status: devel)\n", __FUNCTION__);
633                 set_audio_registers(core, am_l);
634                 break;
635         default:
636                 dprintk("%s Warning: wrong value\n", __FUNCTION__);
637                 return;
638                 break;
639         };
640
641         mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
642         set_audio_finish(core, mode);
643 }
644
645 static void set_audio_standard_EIAJ(struct cx88_core *core)
646 {
647         static const struct rlist eiaj[] = {
648                 /* TODO: eiaj register settings are not there yet ... */
649
650                 { /* end of list */ },
651         };
652         dprintk("%s (status: unknown)\n", __FUNCTION__);
653
654         set_audio_start(core, SEL_EIAJ);
655         set_audio_registers(core, eiaj);
656         set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
657 }
658
659 static void set_audio_standard_FM(struct cx88_core *core,
660                                   enum cx88_deemph_type deemph)
661 {
662         static const struct rlist fm_deemph_50[] = {
663                 {AUD_DEEMPH0_G0, 0x0C45},
664                 {AUD_DEEMPH0_A0, 0x6262},
665                 {AUD_DEEMPH0_B0, 0x1C29},
666                 {AUD_DEEMPH0_A1, 0x3FC66},
667                 {AUD_DEEMPH0_B1, 0x399A},
668
669                 {AUD_DEEMPH1_G0, 0x0D80},
670                 {AUD_DEEMPH1_A0, 0x6262},
671                 {AUD_DEEMPH1_B0, 0x1C29},
672                 {AUD_DEEMPH1_A1, 0x3FC66},
673                 {AUD_DEEMPH1_B1, 0x399A},
674
675                 {AUD_POLYPH80SCALEFAC, 0x0003},
676                 { /* end of list */ },
677         };
678         static const struct rlist fm_deemph_75[] = {
679                 {AUD_DEEMPH0_G0, 0x091B},
680                 {AUD_DEEMPH0_A0, 0x6B68},
681                 {AUD_DEEMPH0_B0, 0x11EC},
682                 {AUD_DEEMPH0_A1, 0x3FC66},
683                 {AUD_DEEMPH0_B1, 0x399A},
684
685                 {AUD_DEEMPH1_G0, 0x0AA0},
686                 {AUD_DEEMPH1_A0, 0x6B68},
687                 {AUD_DEEMPH1_B0, 0x11EC},
688                 {AUD_DEEMPH1_A1, 0x3FC66},
689                 {AUD_DEEMPH1_B1, 0x399A},
690
691                 {AUD_POLYPH80SCALEFAC, 0x0003},
692                 { /* end of list */ },
693         };
694
695         /* It is enough to leave default values? */
696         static const struct rlist fm_no_deemph[] = {
697
698                 {AUD_POLYPH80SCALEFAC, 0x0003},
699                 { /* end of list */ },
700         };
701
702         dprintk("%s (status: unknown)\n", __FUNCTION__);
703         set_audio_start(core, SEL_FMRADIO);
704
705         switch (deemph) {
706         case FM_NO_DEEMPH:
707                 set_audio_registers(core, fm_no_deemph);
708                 break;
709
710         case FM_DEEMPH_50:
711                 set_audio_registers(core, fm_deemph_50);
712                 break;
713
714         case FM_DEEMPH_75:
715                 set_audio_registers(core, fm_deemph_75);
716                 break;
717         }
718
719         set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
720 }
721
722 /* ----------------------------------------------------------- */
723
724 static int cx88_detect_nicam(struct cx88_core *core)
725 {
726         int i, j = 0;
727
728         dprintk("start nicam autodetect.\n");
729
730         for (i = 0; i < 6; i++) {
731                 /* if bit1=1 then nicam is detected */
732                 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
733
734                 if (j == 1) {
735                         dprintk("nicam is detected.\n");
736                         return 1;
737                 }
738
739                 /* wait a little bit for next reading status */
740                 msleep(10);
741         }
742
743         dprintk("nicam is not detected.\n");
744         return 0;
745 }
746
747 void cx88_set_tvaudio(struct cx88_core *core)
748 {
749         switch (core->tvaudio) {
750         case WW_BTSC:
751                 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
752                 break;
753         case WW_BG:
754         case WW_DK:
755         case WW_I:
756         case WW_L:
757                 /* prepare all dsp registers */
758                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
759
760                 /* set nicam mode - otherwise
761                    AUD_NICAM_STATUS2 contains wrong values */
762                 set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
763                 if (0 == cx88_detect_nicam(core)) {
764                         /* fall back to fm / am mono */
765                         set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
766                         core->use_nicam = 0;
767                 } else {
768                         core->use_nicam = 1;
769                 }
770                 break;
771         case WW_EIAJ:
772                 set_audio_standard_EIAJ(core);
773                 break;
774         case WW_FM:
775                 set_audio_standard_FM(core, FM_NO_DEEMPH);
776                 break;
777         case WW_NONE:
778         default:
779                 printk("%s/0: unknown tv audio mode [%d]\n",
780                        core->name, core->tvaudio);
781                 break;
782         }
783         return;
784 }
785
786 void cx88_newstation(struct cx88_core *core)
787 {
788         core->audiomode_manual = UNSET;
789 }
790
791 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
792 {
793         static char *m[] = { "stereo", "dual mono", "mono", "sap" };
794         static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
795         u32 reg, mode, pilot;
796
797         reg = cx_read(AUD_STATUS);
798         mode = reg & 0x03;
799         pilot = (reg >> 2) & 0x03;
800
801         if (core->astat != reg)
802                 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
803                         reg, m[mode], p[pilot],
804                         aud_ctl_names[cx_read(AUD_CTL) & 63]);
805         core->astat = reg;
806
807 /* TODO
808        Reading from AUD_STATUS is not enough
809        for auto-detecting sap/dual-fm/nicam.
810        Add some code here later.
811 */
812
813 # if 0
814         t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |
815             V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
816         t->rxsubchans = V4L2_TUNER_SUB_MONO;
817         t->audmode = V4L2_TUNER_MODE_MONO;
818
819         switch (core->tvaudio) {
820         case WW_BTSC:
821                 t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP;
822                 t->rxsubchans = V4L2_TUNER_SUB_STEREO;
823                 if (1 == pilot) {
824                         /* SAP */
825                         t->rxsubchans |= V4L2_TUNER_SUB_SAP;
826                 }
827                 break;
828         case WW_A2_BG:
829         case WW_A2_DK:
830         case WW_A2_M:
831                 if (1 == pilot) {
832                         /* stereo */
833                         t->rxsubchans =
834                             V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
835                         if (0 == mode)
836                                 t->audmode = V4L2_TUNER_MODE_STEREO;
837                 }
838                 if (2 == pilot) {
839                         /* dual language -- FIXME */
840                         t->rxsubchans =
841                             V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
842                         t->audmode = V4L2_TUNER_MODE_LANG1;
843                 }
844                 break;
845         case WW_NICAM_BGDKL:
846                 if (0 == mode) {
847                         t->audmode = V4L2_TUNER_MODE_STEREO;
848                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
849                 }
850                 break;
851         case WW_SYSTEM_L_AM:
852                 if (0x0 == mode && !(cx_read(AUD_INIT) & 0x04)) {
853                         t->audmode = V4L2_TUNER_MODE_STEREO;
854                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
855                 }
856                 break;
857         default:
858                 /* nothing */
859                 break;
860         }
861 # endif
862         return;
863 }
864
865 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
866 {
867         u32 ctl = UNSET;
868         u32 mask = UNSET;
869
870         if (manual) {
871                 core->audiomode_manual = mode;
872         } else {
873                 if (UNSET != core->audiomode_manual)
874                         return;
875         }
876         core->audiomode_current = mode;
877
878         switch (core->tvaudio) {
879         case WW_BTSC:
880                 switch (mode) {
881                 case V4L2_TUNER_MODE_MONO:
882                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
883                         break;
884                 case V4L2_TUNER_MODE_LANG1:
885                         set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
886                         break;
887                 case V4L2_TUNER_MODE_LANG2:
888                         set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
889                         break;
890                 case V4L2_TUNER_MODE_STEREO:
891                 case V4L2_TUNER_MODE_LANG1_LANG2:
892                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
893                         break;
894                 }
895                 break;
896         case WW_BG:
897         case WW_DK:
898         case WW_I:
899         case WW_L:
900                 if (1 == core->use_nicam) {
901                         switch (mode) {
902                         case V4L2_TUNER_MODE_MONO:
903                         case V4L2_TUNER_MODE_LANG1:
904                                 set_audio_standard_NICAM(core,
905                                                          EN_NICAM_FORCE_MONO1);
906                                 break;
907                         case V4L2_TUNER_MODE_LANG2:
908                                 set_audio_standard_NICAM(core,
909                                                          EN_NICAM_FORCE_MONO2);
910                                 break;
911                         case V4L2_TUNER_MODE_STEREO:
912                         case V4L2_TUNER_MODE_LANG1_LANG2:
913                                 set_audio_standard_NICAM(core,
914                                                          EN_NICAM_FORCE_STEREO);
915                                 break;
916                         }
917                 } else {
918                         if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
919                                 /* fall back to fm / am mono */
920                                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
921                         } else {
922                                 /* TODO: Add A2 autodection */
923                                 switch (mode) {
924                                 case V4L2_TUNER_MODE_MONO:
925                                 case V4L2_TUNER_MODE_LANG1:
926                                         set_audio_standard_A2(core,
927                                                               EN_A2_FORCE_MONO1);
928                                         break;
929                                 case V4L2_TUNER_MODE_LANG2:
930                                         set_audio_standard_A2(core,
931                                                               EN_A2_FORCE_MONO2);
932                                         break;
933                                 case V4L2_TUNER_MODE_STEREO:
934                                 case V4L2_TUNER_MODE_LANG1_LANG2:
935                                         set_audio_standard_A2(core,
936                                                               EN_A2_FORCE_STEREO);
937                                         break;
938                                 }
939                         }
940                 }
941                 break;
942         case WW_FM:
943                 switch (mode) {
944                 case V4L2_TUNER_MODE_MONO:
945                         ctl = EN_FMRADIO_FORCE_MONO;
946                         mask = 0x3f;
947                         break;
948                 case V4L2_TUNER_MODE_STEREO:
949                         ctl = EN_FMRADIO_AUTO_STEREO;
950                         mask = 0x3f;
951                         break;
952                 }
953                 break;
954         }
955
956         if (UNSET != ctl) {
957                 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
958                         "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
959                         mask, ctl, cx_read(AUD_STATUS),
960                         cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
961                 cx_andor(AUD_CTL, mask, ctl);
962         }
963         return;
964 }
965
966 int cx88_audio_thread(void *data)
967 {
968         struct cx88_core *core = data;
969         struct v4l2_tuner t;
970         u32 mode = 0;
971
972         dprintk("cx88: tvaudio thread started\n");
973         for (;;) {
974                 msleep_interruptible(1000);
975                 if (kthread_should_stop())
976                         break;
977
978                 /* just monitor the audio status for now ... */
979                 memset(&t, 0, sizeof(t));
980                 cx88_get_stereo(core, &t);
981
982                 if (UNSET != core->audiomode_manual)
983                         /* manually set, don't do anything. */
984                         continue;
985
986                 /* monitor signal */
987                 if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
988                         mode = V4L2_TUNER_MODE_STEREO;
989                 else
990                         mode = V4L2_TUNER_MODE_MONO;
991                 if (mode == core->audiomode_current)
992                         continue;
993
994                 /* automatically switch to best available mode */
995                 cx88_set_stereo(core, mode, 0);
996         }
997
998         dprintk("cx88: tvaudio thread exiting\n");
999         return 0;
1000 }
1001
1002 /* ----------------------------------------------------------- */
1003
1004 EXPORT_SYMBOL(cx88_set_tvaudio);
1005 EXPORT_SYMBOL(cx88_newstation);
1006 EXPORT_SYMBOL(cx88_set_stereo);
1007 EXPORT_SYMBOL(cx88_get_stereo);
1008 EXPORT_SYMBOL(cx88_audio_thread);
1009
1010 /*
1011  * Local variables:
1012  * c-basic-offset: 8
1013  * End:
1014  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1015  */