V4L/DVB (3378): Fix for lack of analog output on some cx88 boards
[linux-2.6.git] / drivers / media / video / cx88 / cx88-tvaudio.c
1 /*
2
3     cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
4
5      (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
6      (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
7      (c) 2003 Gerd Knorr <kraxel@bytesex.org>
8
9     -----------------------------------------------------------------------
10
11     Lot of voodoo here.  Even the data sheet doesn't help to
12     understand what is going on here, the documentation for the audio
13     part of the cx2388x chip is *very* bad.
14
15     Some of this comes from party done linux driver sources I got from
16     [undocumented].
17
18     Some comes from the dscaler sources, one of the dscaler driver guy works
19     for Conexant ...
20
21     -----------------------------------------------------------------------
22
23     This program is free software; you can redistribute it and/or modify
24     it under the terms of the GNU General Public License as published by
25     the Free Software Foundation; either version 2 of the License, or
26     (at your option) any later version.
27
28     This program is distributed in the hope that it will be useful,
29     but WITHOUT ANY WARRANTY; without even the implied warranty of
30     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
31     GNU General Public License for more details.
32
33     You should have received a copy of the GNU General Public License
34     along with this program; if not, write to the Free Software
35     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
36 */
37
38 #include <linux/module.h>
39 #include <linux/moduleparam.h>
40 #include <linux/errno.h>
41 #include <linux/kernel.h>
42 #include <linux/slab.h>
43 #include <linux/mm.h>
44 #include <linux/poll.h>
45 #include <linux/pci.h>
46 #include <linux/signal.h>
47 #include <linux/ioport.h>
48 #include <linux/sched.h>
49 #include <linux/types.h>
50 #include <linux/interrupt.h>
51 #include <linux/vmalloc.h>
52 #include <linux/init.h>
53 #include <linux/smp_lock.h>
54 #include <linux/delay.h>
55 #include <linux/kthread.h>
56
57 #include "cx88.h"
58
59 static unsigned int audio_debug = 0;
60 module_param(audio_debug, int, 0644);
61 MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
62
63 static unsigned int always_analog = 0;
64 module_param(always_analog,int,0644);
65 MODULE_PARM_DESC(always_analog,"force analog audio out");
66
67
68 #define dprintk(fmt, arg...)    if (audio_debug) \
69         printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
70
71 /* ----------------------------------------------------------- */
72
73 static char *aud_ctl_names[64] = {
74         [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
75         [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
76         [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
77         [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
78         [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
79         [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
80         [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
81         [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
82         [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
83         [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
84         [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
85         [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
86         [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
87         [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
88         [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
89         [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
90         [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
91         [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
92         [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
93         [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
94         [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
95         [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
96         [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
97 };
98
99 struct rlist {
100         u32 reg;
101         u32 val;
102 };
103
104 static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
105 {
106         int i;
107
108         for (i = 0; l[i].reg; i++) {
109                 switch (l[i].reg) {
110                 case AUD_PDF_DDS_CNST_BYTE2:
111                 case AUD_PDF_DDS_CNST_BYTE1:
112                 case AUD_PDF_DDS_CNST_BYTE0:
113                 case AUD_QAM_MODE:
114                 case AUD_PHACC_FREQ_8MSB:
115                 case AUD_PHACC_FREQ_8LSB:
116                         cx_writeb(l[i].reg, l[i].val);
117                         break;
118                 default:
119                         cx_write(l[i].reg, l[i].val);
120                         break;
121                 }
122         }
123 }
124
125 static void set_audio_start(struct cx88_core *core, u32 mode)
126 {
127         /* mute */
128         cx_write(AUD_VOL_CTL, (1 << 6));
129
130         /* start programming */
131         cx_write(AUD_INIT, mode);
132         cx_write(AUD_INIT_LD, 0x0001);
133         cx_write(AUD_SOFT_RESET, 0x0001);
134 }
135
136 static void set_audio_finish(struct cx88_core *core, u32 ctl)
137 {
138         u32 volume;
139
140 #ifndef USING_CX88_ALSA
141         /* restart dma; This avoids buzz in NICAM and is good in others  */
142         cx88_stop_audio_dma(core);
143 #endif
144         cx_write(AUD_RATE_THRES_DMD, 0x000000C0);
145 #ifndef USING_CX88_ALSA
146         cx88_start_audio_dma(core);
147 #endif
148
149         if (cx88_boards[core->board].blackbird) {
150                 /* sets sound input from external adc */
151                 if (core->board == CX88_BOARD_HAUPPAUGE_ROSLYN)
152                         cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
153                 else
154                         cx_set(AUD_CTL, EN_I2SIN_ENABLE);
155
156                 cx_write(AUD_I2SINPUTCNTL, 4);
157                 cx_write(AUD_BAUDRATE, 1);
158                 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
159                 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
160                 cx_write(AUD_I2SOUTPUTCNTL, 1);
161                 cx_write(AUD_I2SCNTL, 0);
162                 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
163         }
164         if ((always_analog) || (!cx88_boards[core->board].blackbird)) {
165                 ctl |= EN_DAC_ENABLE;
166                 cx_write(AUD_CTL, ctl);
167         }
168
169         /* finish programming */
170         cx_write(AUD_SOFT_RESET, 0x0000);
171
172         /* unmute */
173         volume = cx_sread(SHADOW_AUD_VOL_CTL);
174         cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
175 }
176
177 /* ----------------------------------------------------------- */
178
179 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
180                                     u32 mode)
181 {
182         static const struct rlist btsc[] = {
183                 {AUD_AFE_12DB_EN, 0x00000001},
184                 {AUD_OUT1_SEL, 0x00000013},
185                 {AUD_OUT1_SHIFT, 0x00000000},
186                 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
187                 {AUD_DMD_RA_DDS, 0x00c3e7aa},
188                 {AUD_DBX_IN_GAIN, 0x00004734},
189                 {AUD_DBX_WBE_GAIN, 0x00004640},
190                 {AUD_DBX_SE_GAIN, 0x00008d31},
191                 {AUD_DCOC_0_SRC, 0x0000001a},
192                 {AUD_IIR1_4_SEL, 0x00000021},
193                 {AUD_DCOC_PASS_IN, 0x00000003},
194                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
195                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
196                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
197                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
198                 {AUD_DN0_FREQ, 0x0000283b},
199                 {AUD_DN2_SRC_SEL, 0x00000008},
200                 {AUD_DN2_FREQ, 0x00003000},
201                 {AUD_DN2_AFC, 0x00000002},
202                 {AUD_DN2_SHFT, 0x00000000},
203                 {AUD_IIR2_2_SEL, 0x00000020},
204                 {AUD_IIR2_2_SHIFT, 0x00000000},
205                 {AUD_IIR2_3_SEL, 0x0000001f},
206                 {AUD_IIR2_3_SHIFT, 0x00000000},
207                 {AUD_CRDC1_SRC_SEL, 0x000003ce},
208                 {AUD_CRDC1_SHIFT, 0x00000000},
209                 {AUD_CORDIC_SHIFT_1, 0x00000007},
210                 {AUD_DCOC_1_SRC, 0x0000001b},
211                 {AUD_DCOC1_SHIFT, 0x00000000},
212                 {AUD_RDSI_SEL, 0x00000008},
213                 {AUD_RDSQ_SEL, 0x00000008},
214                 {AUD_RDSI_SHIFT, 0x00000000},
215                 {AUD_RDSQ_SHIFT, 0x00000000},
216                 {AUD_POLYPH80SCALEFAC, 0x00000003},
217                 { /* end of list */ },
218         };
219         static const struct rlist btsc_sap[] = {
220                 {AUD_AFE_12DB_EN, 0x00000001},
221                 {AUD_DBX_IN_GAIN, 0x00007200},
222                 {AUD_DBX_WBE_GAIN, 0x00006200},
223                 {AUD_DBX_SE_GAIN, 0x00006200},
224                 {AUD_IIR1_1_SEL, 0x00000000},
225                 {AUD_IIR1_3_SEL, 0x00000001},
226                 {AUD_DN1_SRC_SEL, 0x00000007},
227                 {AUD_IIR1_4_SHIFT, 0x00000006},
228                 {AUD_IIR2_1_SHIFT, 0x00000000},
229                 {AUD_IIR2_2_SHIFT, 0x00000000},
230                 {AUD_IIR3_0_SHIFT, 0x00000000},
231                 {AUD_IIR3_1_SHIFT, 0x00000000},
232                 {AUD_IIR3_0_SEL, 0x0000000d},
233                 {AUD_IIR3_1_SEL, 0x0000000e},
234                 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
235                 {AUD_DEEMPH1_SHIFT, 0x00000000},
236                 {AUD_DEEMPH1_G0, 0x00004000},
237                 {AUD_DEEMPH1_A0, 0x00000000},
238                 {AUD_DEEMPH1_B0, 0x00000000},
239                 {AUD_DEEMPH1_A1, 0x00000000},
240                 {AUD_DEEMPH1_B1, 0x00000000},
241                 {AUD_OUT0_SEL, 0x0000003f},
242                 {AUD_OUT1_SEL, 0x0000003f},
243                 {AUD_DN1_AFC, 0x00000002},
244                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
245                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
246                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
247                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
248                 {AUD_IIR1_0_SEL, 0x0000001d},
249                 {AUD_IIR1_2_SEL, 0x0000001e},
250                 {AUD_IIR2_1_SEL, 0x00000002},
251                 {AUD_IIR2_2_SEL, 0x00000004},
252                 {AUD_IIR3_2_SEL, 0x0000000f},
253                 {AUD_DCOC2_SHIFT, 0x00000001},
254                 {AUD_IIR3_2_SHIFT, 0x00000001},
255                 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
256                 {AUD_CORDIC_SHIFT_1, 0x00000006},
257                 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
258                 {AUD_DMD_RA_DDS, 0x00f696e6},
259                 {AUD_IIR2_3_SEL, 0x00000025},
260                 {AUD_IIR1_4_SEL, 0x00000021},
261                 {AUD_DN1_FREQ, 0x0000c965},
262                 {AUD_DCOC_PASS_IN, 0x00000003},
263                 {AUD_DCOC_0_SRC, 0x0000001a},
264                 {AUD_DCOC_1_SRC, 0x0000001b},
265                 {AUD_DCOC1_SHIFT, 0x00000000},
266                 {AUD_RDSI_SEL, 0x00000009},
267                 {AUD_RDSQ_SEL, 0x00000009},
268                 {AUD_RDSI_SHIFT, 0x00000000},
269                 {AUD_RDSQ_SHIFT, 0x00000000},
270                 {AUD_POLYPH80SCALEFAC, 0x00000003},
271                 { /* end of list */ },
272         };
273
274         mode |= EN_FMRADIO_EN_RDS;
275
276         if (sap) {
277                 dprintk("%s SAP (status: unknown)\n", __FUNCTION__);
278                 set_audio_start(core, SEL_SAP);
279                 set_audio_registers(core, btsc_sap);
280                 set_audio_finish(core, mode);
281         } else {
282                 dprintk("%s (status: known-good)\n", __FUNCTION__);
283                 set_audio_start(core, SEL_BTSC);
284                 set_audio_registers(core, btsc);
285                 set_audio_finish(core, mode);
286         }
287 }
288
289 static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
290 {
291         static const struct rlist nicam_l[] = {
292                 {AUD_AFE_12DB_EN, 0x00000001},
293                 {AUD_RATE_ADJ1, 0x00000060},
294                 {AUD_RATE_ADJ2, 0x000000F9},
295                 {AUD_RATE_ADJ3, 0x000001CC},
296                 {AUD_RATE_ADJ4, 0x000002B3},
297                 {AUD_RATE_ADJ5, 0x00000726},
298                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
299                 {AUD_DEEMPHDENOM2_R, 0x00000000},
300                 {AUD_ERRLOGPERIOD_R, 0x00000064},
301                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
302                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
303                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
304                 {AUD_POLYPH80SCALEFAC, 0x00000003},
305                 {AUD_DMD_RA_DDS, 0x00C00000},
306                 {AUD_PLL_INT, 0x0000001E},
307                 {AUD_PLL_DDS, 0x00000000},
308                 {AUD_PLL_FRAC, 0x0000E542},
309                 {AUD_START_TIMER, 0x00000000},
310                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
311                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
312                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
313                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
314                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
315                 {AUD_QAM_MODE, 0x05},
316                 {AUD_PHACC_FREQ_8MSB, 0x34},
317                 {AUD_PHACC_FREQ_8LSB, 0x4C},
318                 {AUD_DEEMPHGAIN_R, 0x00006680},
319                 {AUD_RATE_THRES_DMD, 0x000000C0},
320                 { /* end of list */ },
321         };
322
323         static const struct rlist nicam_bgdki_common[] = {
324                 {AUD_AFE_12DB_EN, 0x00000001},
325                 {AUD_RATE_ADJ1, 0x00000010},
326                 {AUD_RATE_ADJ2, 0x00000040},
327                 {AUD_RATE_ADJ3, 0x00000100},
328                 {AUD_RATE_ADJ4, 0x00000400},
329                 {AUD_RATE_ADJ5, 0x00001000},
330                 {AUD_ERRLOGPERIOD_R, 0x00000fff},
331                 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
332                 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
333                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
334                 {AUD_POLYPH80SCALEFAC, 0x00000003},
335                 {AUD_DEEMPHGAIN_R, 0x000023c2},
336                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
337                 {AUD_DEEMPHNUMER2_R, 0x0003023e},
338                 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
339                 {AUD_DEEMPHDENOM2_R, 0x00000000},
340                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
341                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
342                 {AUD_QAM_MODE, 0x05},
343                 { /* end of list */ },
344         };
345
346         static const struct rlist nicam_i[] = {
347                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
348                 {AUD_PHACC_FREQ_8MSB, 0x3a},
349                 {AUD_PHACC_FREQ_8LSB, 0x93},
350                 { /* end of list */ },
351         };
352
353         static const struct rlist nicam_default[] = {
354                 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
355                 {AUD_PHACC_FREQ_8MSB, 0x34},
356                 {AUD_PHACC_FREQ_8LSB, 0x4c},
357                 { /* end of list */ },
358         };
359
360         set_audio_start(core,SEL_NICAM);
361         switch (core->tvaudio) {
362         case WW_L:
363                 dprintk("%s SECAM-L NICAM (status: devel)\n", __FUNCTION__);
364                 set_audio_registers(core, nicam_l);
365                 break;
366         case WW_I:
367                 dprintk("%s PAL-I NICAM (status: known-good)\n", __FUNCTION__);
368                 set_audio_registers(core, nicam_bgdki_common);
369                 set_audio_registers(core, nicam_i);
370                 break;
371         default:
372                 dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __FUNCTION__);
373                 set_audio_registers(core, nicam_bgdki_common);
374                 set_audio_registers(core, nicam_default);
375                 break;
376         };
377
378         mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
379         set_audio_finish(core, mode);
380 }
381
382 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
383 {
384         static const struct rlist a2_bgdk_common[] = {
385                 {AUD_ERRLOGPERIOD_R, 0x00000064},
386                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
387                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
388                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
389                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
390                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
391                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
392                 {AUD_QAM_MODE, 0x05},
393                 {AUD_PHACC_FREQ_8MSB, 0x34},
394                 {AUD_PHACC_FREQ_8LSB, 0x4c},
395                 {AUD_RATE_ADJ1, 0x00000100},
396                 {AUD_RATE_ADJ2, 0x00000200},
397                 {AUD_RATE_ADJ3, 0x00000300},
398                 {AUD_RATE_ADJ4, 0x00000400},
399                 {AUD_RATE_ADJ5, 0x00000500},
400                 {AUD_THR_FR, 0x00000000},
401                 {AAGC_HYST, 0x0000001a},
402                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
403                 {AUD_PILOT_BQD_1_K1, 0x00551340},
404                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
405                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
406                 {AUD_PILOT_BQD_1_K4, 0x00400000},
407                 {AUD_PILOT_BQD_2_K0, 0x00040000},
408                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
409                 {AUD_PILOT_BQD_2_K2, 0x00400000},
410                 {AUD_PILOT_BQD_2_K3, 0x00000000},
411                 {AUD_PILOT_BQD_2_K4, 0x00000000},
412                 {AUD_MODE_CHG_TIMER, 0x00000040},
413                 {AUD_AFE_12DB_EN, 0x00000001},
414                 {AUD_CORDIC_SHIFT_0, 0x00000007},
415                 {AUD_CORDIC_SHIFT_1, 0x00000007},
416                 {AUD_DEEMPH0_G0, 0x00000380},
417                 {AUD_DEEMPH1_G0, 0x00000380},
418                 {AUD_DCOC_0_SRC, 0x0000001a},
419                 {AUD_DCOC0_SHIFT, 0x00000000},
420                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
421                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
422                 {AUD_DCOC_PASS_IN, 0x00000003},
423                 {AUD_IIR3_0_SEL, 0x00000021},
424                 {AUD_DN2_AFC, 0x00000002},
425                 {AUD_DCOC_1_SRC, 0x0000001b},
426                 {AUD_DCOC1_SHIFT, 0x00000000},
427                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
428                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
429                 {AUD_IIR3_1_SEL, 0x00000023},
430                 {AUD_RDSI_SEL, 0x00000017},
431                 {AUD_RDSI_SHIFT, 0x00000000},
432                 {AUD_RDSQ_SEL, 0x00000017},
433                 {AUD_RDSQ_SHIFT, 0x00000000},
434                 {AUD_PLL_INT, 0x0000001e},
435                 {AUD_PLL_DDS, 0x00000000},
436                 {AUD_PLL_FRAC, 0x0000e542},
437                 {AUD_POLYPH80SCALEFAC, 0x00000001},
438                 {AUD_START_TIMER, 0x00000000},
439                 { /* end of list */ },
440         };
441
442         static const struct rlist a2_bg[] = {
443                 {AUD_DMD_RA_DDS, 0x002a4f2f},
444                 {AUD_C1_UP_THR, 0x00007000},
445                 {AUD_C1_LO_THR, 0x00005400},
446                 {AUD_C2_UP_THR, 0x00005400},
447                 {AUD_C2_LO_THR, 0x00003000},
448                 { /* end of list */ },
449         };
450
451         static const struct rlist a2_dk[] = {
452                 {AUD_DMD_RA_DDS, 0x002a4f2f},
453                 {AUD_C1_UP_THR, 0x00007000},
454                 {AUD_C1_LO_THR, 0x00005400},
455                 {AUD_C2_UP_THR, 0x00005400},
456                 {AUD_C2_LO_THR, 0x00003000},
457                 {AUD_DN0_FREQ, 0x00003a1c},
458                 {AUD_DN2_FREQ, 0x0000d2e0},
459                 { /* end of list */ },
460         };
461
462         static const struct rlist a1_i[] = {
463                 {AUD_ERRLOGPERIOD_R, 0x00000064},
464                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
465                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
466                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
467                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
468                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
469                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
470                 {AUD_QAM_MODE, 0x05},
471                 {AUD_PHACC_FREQ_8MSB, 0x3a},
472                 {AUD_PHACC_FREQ_8LSB, 0x93},
473                 {AUD_DMD_RA_DDS, 0x002a4f2f},
474                 {AUD_PLL_INT, 0x0000001e},
475                 {AUD_PLL_DDS, 0x00000004},
476                 {AUD_PLL_FRAC, 0x0000e542},
477                 {AUD_RATE_ADJ1, 0x00000100},
478                 {AUD_RATE_ADJ2, 0x00000200},
479                 {AUD_RATE_ADJ3, 0x00000300},
480                 {AUD_RATE_ADJ4, 0x00000400},
481                 {AUD_RATE_ADJ5, 0x00000500},
482                 {AUD_THR_FR, 0x00000000},
483                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
484                 {AUD_PILOT_BQD_1_K1, 0x00551340},
485                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
486                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
487                 {AUD_PILOT_BQD_1_K4, 0x00400000},
488                 {AUD_PILOT_BQD_2_K0, 0x00040000},
489                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
490                 {AUD_PILOT_BQD_2_K2, 0x00400000},
491                 {AUD_PILOT_BQD_2_K3, 0x00000000},
492                 {AUD_PILOT_BQD_2_K4, 0x00000000},
493                 {AUD_MODE_CHG_TIMER, 0x00000060},
494                 {AUD_AFE_12DB_EN, 0x00000001},
495                 {AAGC_HYST, 0x0000000a},
496                 {AUD_CORDIC_SHIFT_0, 0x00000007},
497                 {AUD_CORDIC_SHIFT_1, 0x00000007},
498                 {AUD_C1_UP_THR, 0x00007000},
499                 {AUD_C1_LO_THR, 0x00005400},
500                 {AUD_C2_UP_THR, 0x00005400},
501                 {AUD_C2_LO_THR, 0x00003000},
502                 {AUD_DCOC_0_SRC, 0x0000001a},
503                 {AUD_DCOC0_SHIFT, 0x00000000},
504                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
505                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
506                 {AUD_DCOC_PASS_IN, 0x00000003},
507                 {AUD_IIR3_0_SEL, 0x00000021},
508                 {AUD_DN2_AFC, 0x00000002},
509                 {AUD_DCOC_1_SRC, 0x0000001b},
510                 {AUD_DCOC1_SHIFT, 0x00000000},
511                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
512                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
513                 {AUD_IIR3_1_SEL, 0x00000023},
514                 {AUD_DN0_FREQ, 0x000035a3},
515                 {AUD_DN2_FREQ, 0x000029c7},
516                 {AUD_CRDC0_SRC_SEL, 0x00000511},
517                 {AUD_IIR1_0_SEL, 0x00000001},
518                 {AUD_IIR1_1_SEL, 0x00000000},
519                 {AUD_IIR3_2_SEL, 0x00000003},
520                 {AUD_IIR3_2_SHIFT, 0x00000000},
521                 {AUD_IIR3_0_SEL, 0x00000002},
522                 {AUD_IIR2_0_SEL, 0x00000021},
523                 {AUD_IIR2_0_SHIFT, 0x00000002},
524                 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
525                 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
526                 {AUD_POLYPH80SCALEFAC, 0x00000001},
527                 {AUD_START_TIMER, 0x00000000},
528                 { /* end of list */ },
529         };
530
531         static const struct rlist am_l[] = {
532                 {AUD_ERRLOGPERIOD_R, 0x00000064},
533                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
534                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
535                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
536                 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
537                 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
538                 {AUD_QAM_MODE, 0x00},
539                 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
540                 {AUD_PHACC_FREQ_8MSB, 0x3a},
541                 {AUD_PHACC_FREQ_8LSB, 0x4a},
542                 {AUD_DEEMPHGAIN_R, 0x00006680},
543                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
544                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
545                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
546                 {AUD_DEEMPHDENOM2_R, 0x00000000},
547                 {AUD_FM_MODE_ENABLE, 0x00000007},
548                 {AUD_POLYPH80SCALEFAC, 0x00000003},
549                 {AUD_AFE_12DB_EN, 0x00000001},
550                 {AAGC_GAIN, 0x00000000},
551                 {AAGC_HYST, 0x00000018},
552                 {AAGC_DEF, 0x00000020},
553                 {AUD_DN0_FREQ, 0x00000000},
554                 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
555                 {AUD_DCOC_0_SRC, 0x00000021},
556                 {AUD_IIR1_0_SEL, 0x00000000},
557                 {AUD_IIR1_0_SHIFT, 0x00000007},
558                 {AUD_IIR1_1_SEL, 0x00000002},
559                 {AUD_IIR1_1_SHIFT, 0x00000000},
560                 {AUD_DCOC_1_SRC, 0x00000003},
561                 {AUD_DCOC1_SHIFT, 0x00000000},
562                 {AUD_DCOC_PASS_IN, 0x00000000},
563                 {AUD_IIR1_2_SEL, 0x00000023},
564                 {AUD_IIR1_2_SHIFT, 0x00000000},
565                 {AUD_IIR1_3_SEL, 0x00000004},
566                 {AUD_IIR1_3_SHIFT, 0x00000007},
567                 {AUD_IIR1_4_SEL, 0x00000005},
568                 {AUD_IIR1_4_SHIFT, 0x00000007},
569                 {AUD_IIR3_0_SEL, 0x00000007},
570                 {AUD_IIR3_0_SHIFT, 0x00000000},
571                 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
572                 {AUD_DEEMPH0_SHIFT, 0x00000000},
573                 {AUD_DEEMPH0_G0, 0x00007000},
574                 {AUD_DEEMPH0_A0, 0x00000000},
575                 {AUD_DEEMPH0_B0, 0x00000000},
576                 {AUD_DEEMPH0_A1, 0x00000000},
577                 {AUD_DEEMPH0_B1, 0x00000000},
578                 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
579                 {AUD_DEEMPH1_SHIFT, 0x00000000},
580                 {AUD_DEEMPH1_G0, 0x00007000},
581                 {AUD_DEEMPH1_A0, 0x00000000},
582                 {AUD_DEEMPH1_B0, 0x00000000},
583                 {AUD_DEEMPH1_A1, 0x00000000},
584                 {AUD_DEEMPH1_B1, 0x00000000},
585                 {AUD_OUT0_SEL, 0x0000003F},
586                 {AUD_OUT1_SEL, 0x0000003F},
587                 {AUD_DMD_RA_DDS, 0x00F5C285},
588                 {AUD_PLL_INT, 0x0000001E},
589                 {AUD_PLL_DDS, 0x00000000},
590                 {AUD_PLL_FRAC, 0x0000E542},
591                 {AUD_RATE_ADJ1, 0x00000100},
592                 {AUD_RATE_ADJ2, 0x00000200},
593                 {AUD_RATE_ADJ3, 0x00000300},
594                 {AUD_RATE_ADJ4, 0x00000400},
595                 {AUD_RATE_ADJ5, 0x00000500},
596                 {AUD_RATE_THRES_DMD, 0x000000C0},
597                 { /* end of list */ },
598         };
599
600         static const struct rlist a2_deemph50[] = {
601                 {AUD_DEEMPH0_G0, 0x00000380},
602                 {AUD_DEEMPH1_G0, 0x00000380},
603                 {AUD_DEEMPHGAIN_R, 0x000011e1},
604                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
605                 {AUD_DEEMPHNUMER2_R, 0x0003023c},
606                 { /* end of list */ },
607         };
608
609         set_audio_start(core, SEL_A2);
610         switch (core->tvaudio) {
611         case WW_BG:
612                 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __FUNCTION__);
613                 set_audio_registers(core, a2_bgdk_common);
614                 set_audio_registers(core, a2_bg);
615                 set_audio_registers(core, a2_deemph50);
616                 break;
617         case WW_DK:
618                 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __FUNCTION__);
619                 set_audio_registers(core, a2_bgdk_common);
620                 set_audio_registers(core, a2_dk);
621                 set_audio_registers(core, a2_deemph50);
622                 break;
623         case WW_I:
624                 dprintk("%s PAL-I A1 (status: known-good)\n", __FUNCTION__);
625                 set_audio_registers(core, a1_i);
626                 set_audio_registers(core, a2_deemph50);
627                 break;
628         case WW_L:
629                 dprintk("%s AM-L (status: devel)\n", __FUNCTION__);
630                 set_audio_registers(core, am_l);
631                 break;
632         default:
633                 dprintk("%s Warning: wrong value\n", __FUNCTION__);
634                 return;
635                 break;
636         };
637
638         mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
639         set_audio_finish(core, mode);
640 }
641
642 static void set_audio_standard_EIAJ(struct cx88_core *core)
643 {
644         static const struct rlist eiaj[] = {
645                 /* TODO: eiaj register settings are not there yet ... */
646
647                 { /* end of list */ },
648         };
649         dprintk("%s (status: unknown)\n", __FUNCTION__);
650
651         set_audio_start(core, SEL_EIAJ);
652         set_audio_registers(core, eiaj);
653         set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
654 }
655
656 static void set_audio_standard_FM(struct cx88_core *core,
657                                   enum cx88_deemph_type deemph)
658 {
659         static const struct rlist fm_deemph_50[] = {
660                 {AUD_DEEMPH0_G0, 0x0C45},
661                 {AUD_DEEMPH0_A0, 0x6262},
662                 {AUD_DEEMPH0_B0, 0x1C29},
663                 {AUD_DEEMPH0_A1, 0x3FC66},
664                 {AUD_DEEMPH0_B1, 0x399A},
665
666                 {AUD_DEEMPH1_G0, 0x0D80},
667                 {AUD_DEEMPH1_A0, 0x6262},
668                 {AUD_DEEMPH1_B0, 0x1C29},
669                 {AUD_DEEMPH1_A1, 0x3FC66},
670                 {AUD_DEEMPH1_B1, 0x399A},
671
672                 {AUD_POLYPH80SCALEFAC, 0x0003},
673                 { /* end of list */ },
674         };
675         static const struct rlist fm_deemph_75[] = {
676                 {AUD_DEEMPH0_G0, 0x091B},
677                 {AUD_DEEMPH0_A0, 0x6B68},
678                 {AUD_DEEMPH0_B0, 0x11EC},
679                 {AUD_DEEMPH0_A1, 0x3FC66},
680                 {AUD_DEEMPH0_B1, 0x399A},
681
682                 {AUD_DEEMPH1_G0, 0x0AA0},
683                 {AUD_DEEMPH1_A0, 0x6B68},
684                 {AUD_DEEMPH1_B0, 0x11EC},
685                 {AUD_DEEMPH1_A1, 0x3FC66},
686                 {AUD_DEEMPH1_B1, 0x399A},
687
688                 {AUD_POLYPH80SCALEFAC, 0x0003},
689                 { /* end of list */ },
690         };
691
692         /* It is enough to leave default values? */
693         static const struct rlist fm_no_deemph[] = {
694
695                 {AUD_POLYPH80SCALEFAC, 0x0003},
696                 { /* end of list */ },
697         };
698
699         dprintk("%s (status: unknown)\n", __FUNCTION__);
700         set_audio_start(core, SEL_FMRADIO);
701
702         switch (deemph) {
703         case FM_NO_DEEMPH:
704                 set_audio_registers(core, fm_no_deemph);
705                 break;
706
707         case FM_DEEMPH_50:
708                 set_audio_registers(core, fm_deemph_50);
709                 break;
710
711         case FM_DEEMPH_75:
712                 set_audio_registers(core, fm_deemph_75);
713                 break;
714         }
715
716         set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
717 }
718
719 /* ----------------------------------------------------------- */
720
721 int cx88_detect_nicam(struct cx88_core *core)
722 {
723         int i, j = 0;
724
725         dprintk("start nicam autodetect.\n");
726
727         for (i = 0; i < 6; i++) {
728                 /* if bit1=1 then nicam is detected */
729                 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
730
731                 if (j == 1) {
732                         dprintk("nicam is detected.\n");
733                         return 1;
734                 }
735
736                 /* wait a little bit for next reading status */
737                 msleep(10);
738         }
739
740         dprintk("nicam is not detected.\n");
741         return 0;
742 }
743
744 void cx88_set_tvaudio(struct cx88_core *core)
745 {
746         switch (core->tvaudio) {
747         case WW_BTSC:
748                 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
749                 break;
750         case WW_BG:
751         case WW_DK:
752         case WW_I:
753         case WW_L:
754                 /* prepare all dsp registers */
755                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
756
757                 /* set nicam mode - otherwise
758                    AUD_NICAM_STATUS2 contains wrong values */
759                 set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
760                 if (0 == cx88_detect_nicam(core)) {
761                         /* fall back to fm / am mono */
762                         set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
763                         core->use_nicam = 0;
764                 } else {
765                         core->use_nicam = 1;
766                 }
767                 break;
768         case WW_EIAJ:
769                 set_audio_standard_EIAJ(core);
770                 break;
771         case WW_FM:
772                 set_audio_standard_FM(core, FM_NO_DEEMPH);
773                 break;
774         case WW_NONE:
775         default:
776                 printk("%s/0: unknown tv audio mode [%d]\n",
777                        core->name, core->tvaudio);
778                 break;
779         }
780         return;
781 }
782
783 void cx88_newstation(struct cx88_core *core)
784 {
785         core->audiomode_manual = UNSET;
786 }
787
788 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
789 {
790         static char *m[] = { "stereo", "dual mono", "mono", "sap" };
791         static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
792         u32 reg, mode, pilot;
793
794         reg = cx_read(AUD_STATUS);
795         mode = reg & 0x03;
796         pilot = (reg >> 2) & 0x03;
797
798         if (core->astat != reg)
799                 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
800                         reg, m[mode], p[pilot],
801                         aud_ctl_names[cx_read(AUD_CTL) & 63]);
802         core->astat = reg;
803
804 /* TODO
805        Reading from AUD_STATUS is not enough
806        for auto-detecting sap/dual-fm/nicam.
807        Add some code here later.
808 */
809
810 # if 0
811         t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |
812             V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
813         t->rxsubchans = V4L2_TUNER_SUB_MONO;
814         t->audmode = V4L2_TUNER_MODE_MONO;
815
816         switch (core->tvaudio) {
817         case WW_BTSC:
818                 t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP;
819                 t->rxsubchans = V4L2_TUNER_SUB_STEREO;
820                 if (1 == pilot) {
821                         /* SAP */
822                         t->rxsubchans |= V4L2_TUNER_SUB_SAP;
823                 }
824                 break;
825         case WW_A2_BG:
826         case WW_A2_DK:
827         case WW_A2_M:
828                 if (1 == pilot) {
829                         /* stereo */
830                         t->rxsubchans =
831                             V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
832                         if (0 == mode)
833                                 t->audmode = V4L2_TUNER_MODE_STEREO;
834                 }
835                 if (2 == pilot) {
836                         /* dual language -- FIXME */
837                         t->rxsubchans =
838                             V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
839                         t->audmode = V4L2_TUNER_MODE_LANG1;
840                 }
841                 break;
842         case WW_NICAM_BGDKL:
843                 if (0 == mode) {
844                         t->audmode = V4L2_TUNER_MODE_STEREO;
845                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
846                 }
847                 break;
848         case WW_SYSTEM_L_AM:
849                 if (0x0 == mode && !(cx_read(AUD_INIT) & 0x04)) {
850                         t->audmode = V4L2_TUNER_MODE_STEREO;
851                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
852                 }
853                 break;
854         default:
855                 /* nothing */
856                 break;
857         }
858 # endif
859         return;
860 }
861
862 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
863 {
864         u32 ctl = UNSET;
865         u32 mask = UNSET;
866
867         if (manual) {
868                 core->audiomode_manual = mode;
869         } else {
870                 if (UNSET != core->audiomode_manual)
871                         return;
872         }
873         core->audiomode_current = mode;
874
875         switch (core->tvaudio) {
876         case WW_BTSC:
877                 switch (mode) {
878                 case V4L2_TUNER_MODE_MONO:
879                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
880                         break;
881                 case V4L2_TUNER_MODE_LANG1:
882                         set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
883                         break;
884                 case V4L2_TUNER_MODE_LANG2:
885                         set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
886                         break;
887                 case V4L2_TUNER_MODE_STEREO:
888                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
889                         break;
890                 }
891                 break;
892         case WW_BG:
893         case WW_DK:
894         case WW_I:
895         case WW_L:
896                 if (1 == core->use_nicam) {
897                         switch (mode) {
898                         case V4L2_TUNER_MODE_MONO:
899                         case V4L2_TUNER_MODE_LANG1:
900                                 set_audio_standard_NICAM(core,
901                                                          EN_NICAM_FORCE_MONO1);
902                                 break;
903                         case V4L2_TUNER_MODE_LANG2:
904                                 set_audio_standard_NICAM(core,
905                                                          EN_NICAM_FORCE_MONO2);
906                                 break;
907                         case V4L2_TUNER_MODE_STEREO:
908                                 set_audio_standard_NICAM(core,
909                                                          EN_NICAM_FORCE_STEREO);
910                                 break;
911                         }
912                 } else {
913                         if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
914                                 /* fall back to fm / am mono */
915                                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
916                         } else {
917                                 /* TODO: Add A2 autodection */
918                                 switch (mode) {
919                                 case V4L2_TUNER_MODE_MONO:
920                                 case V4L2_TUNER_MODE_LANG1:
921                                         set_audio_standard_A2(core,
922                                                               EN_A2_FORCE_MONO1);
923                                         break;
924                                 case V4L2_TUNER_MODE_LANG2:
925                                         set_audio_standard_A2(core,
926                                                               EN_A2_FORCE_MONO2);
927                                         break;
928                                 case V4L2_TUNER_MODE_STEREO:
929                                         set_audio_standard_A2(core,
930                                                               EN_A2_FORCE_STEREO);
931                                         break;
932                                 }
933                         }
934                 }
935                 break;
936         case WW_FM:
937                 switch (mode) {
938                 case V4L2_TUNER_MODE_MONO:
939                         ctl = EN_FMRADIO_FORCE_MONO;
940                         mask = 0x3f;
941                         break;
942                 case V4L2_TUNER_MODE_STEREO:
943                         ctl = EN_FMRADIO_AUTO_STEREO;
944                         mask = 0x3f;
945                         break;
946                 }
947                 break;
948         }
949
950         if (UNSET != ctl) {
951                 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
952                         "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
953                         mask, ctl, cx_read(AUD_STATUS),
954                         cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
955                 cx_andor(AUD_CTL, mask, ctl);
956         }
957         return;
958 }
959
960 int cx88_audio_thread(void *data)
961 {
962         struct cx88_core *core = data;
963         struct v4l2_tuner t;
964         u32 mode = 0;
965
966         dprintk("cx88: tvaudio thread started\n");
967         for (;;) {
968                 msleep_interruptible(1000);
969                 if (kthread_should_stop())
970                         break;
971
972                 /* just monitor the audio status for now ... */
973                 memset(&t, 0, sizeof(t));
974                 cx88_get_stereo(core, &t);
975
976                 if (UNSET != core->audiomode_manual)
977                         /* manually set, don't do anything. */
978                         continue;
979
980                 /* monitor signal */
981                 if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
982                         mode = V4L2_TUNER_MODE_STEREO;
983                 else
984                         mode = V4L2_TUNER_MODE_MONO;
985                 if (mode == core->audiomode_current)
986                         continue;
987
988                 /* automatically switch to best available mode */
989                 cx88_set_stereo(core, mode, 0);
990         }
991
992         dprintk("cx88: tvaudio thread exiting\n");
993         return 0;
994 }
995
996 /* ----------------------------------------------------------- */
997
998 EXPORT_SYMBOL(cx88_set_tvaudio);
999 EXPORT_SYMBOL(cx88_newstation);
1000 EXPORT_SYMBOL(cx88_set_stereo);
1001 EXPORT_SYMBOL(cx88_get_stereo);
1002 EXPORT_SYMBOL(cx88_audio_thread);
1003
1004 /*
1005  * Local variables:
1006  * c-basic-offset: 8
1007  * End:
1008  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1009  */