V4L/DVB (7258): Support DVB-T tuning on the DViCO FusionHDTV DVB-T Pro
[linux-2.6.git] / drivers / media / video / cx88 / cx88-dvb.c
1 /*
2  *
3  * device driver for Conexant 2388x based TV cards
4  * MPEG Transport Stream (DVB) routines
5  *
6  * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7  * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; either version 2 of the License, or
12  *  (at your option) any later version.
13  *
14  *  This program is distributed in the hope that it will be useful,
15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *  GNU General Public License for more details.
18  *
19  *  You should have received a copy of the GNU General Public License
20  *  along with this program; if not, write to the Free Software
21  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #include "mt352.h"
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
39 #include "zl10353.h"
40 #include "cx22702.h"
41 #include "or51132.h"
42 #include "lgdt330x.h"
43 #include "s5h1409.h"
44 #include "xc5000.h"
45 #include "nxt200x.h"
46 #include "cx24123.h"
47 #include "isl6421.h"
48 #include "tuner-xc2028.h"
49 #include "tuner-xc2028-types.h"
50
51 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
52 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
53 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
54 MODULE_LICENSE("GPL");
55
56 static unsigned int debug;
57 module_param(debug, int, 0644);
58 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
59
60 #define dprintk(level,fmt, arg...)      if (debug >= level) \
61         printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
62
63 /* ------------------------------------------------------------------ */
64
65 static int dvb_buf_setup(struct videobuf_queue *q,
66                          unsigned int *count, unsigned int *size)
67 {
68         struct cx8802_dev *dev = q->priv_data;
69
70         dev->ts_packet_size  = 188 * 4;
71         dev->ts_packet_count = 32;
72
73         *size  = dev->ts_packet_size * dev->ts_packet_count;
74         *count = 32;
75         return 0;
76 }
77
78 static int dvb_buf_prepare(struct videobuf_queue *q,
79                            struct videobuf_buffer *vb, enum v4l2_field field)
80 {
81         struct cx8802_dev *dev = q->priv_data;
82         return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
83 }
84
85 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
86 {
87         struct cx8802_dev *dev = q->priv_data;
88         cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
89 }
90
91 static void dvb_buf_release(struct videobuf_queue *q,
92                             struct videobuf_buffer *vb)
93 {
94         cx88_free_buffer(q, (struct cx88_buffer*)vb);
95 }
96
97 static struct videobuf_queue_ops dvb_qops = {
98         .buf_setup    = dvb_buf_setup,
99         .buf_prepare  = dvb_buf_prepare,
100         .buf_queue    = dvb_buf_queue,
101         .buf_release  = dvb_buf_release,
102 };
103
104 /* ------------------------------------------------------------------ */
105
106 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
107 {
108         struct cx8802_dev *dev= fe->dvb->priv;
109         struct cx8802_driver *drv = NULL;
110         int ret = 0;
111
112         drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
113         if (drv) {
114                 if (acquire)
115                         ret = drv->request_acquire(drv);
116                 else
117                         ret = drv->request_release(drv);
118         }
119
120         return ret;
121 }
122
123 /* ------------------------------------------------------------------ */
124
125 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
126 {
127         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x39 };
128         static u8 reset []         = { RESET,      0x80 };
129         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
130         static u8 agc_cfg []       = { AGC_TARGET, 0x24, 0x20 };
131         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
132         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
133
134         mt352_write(fe, clock_config,   sizeof(clock_config));
135         udelay(200);
136         mt352_write(fe, reset,          sizeof(reset));
137         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
138
139         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
140         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
141         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
142         return 0;
143 }
144
145 static int dvico_dual_demod_init(struct dvb_frontend *fe)
146 {
147         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x38 };
148         static u8 reset []         = { RESET,      0x80 };
149         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
150         static u8 agc_cfg []       = { AGC_TARGET, 0x28, 0x20 };
151         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
152         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
153
154         mt352_write(fe, clock_config,   sizeof(clock_config));
155         udelay(200);
156         mt352_write(fe, reset,          sizeof(reset));
157         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
158
159         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
160         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
161         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
162
163         return 0;
164 }
165
166 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
167 {
168         static u8 clock_config []  = { 0x89, 0x38, 0x39 };
169         static u8 reset []         = { 0x50, 0x80 };
170         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
171         static u8 agc_cfg []       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
172                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
173         static u8 dntv_extra[]     = { 0xB5, 0x7A };
174         static u8 capt_range_cfg[] = { 0x75, 0x32 };
175
176         mt352_write(fe, clock_config,   sizeof(clock_config));
177         udelay(2000);
178         mt352_write(fe, reset,          sizeof(reset));
179         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
180
181         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
182         udelay(2000);
183         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
184         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
185
186         return 0;
187 }
188
189 static struct mt352_config dvico_fusionhdtv = {
190         .demod_address = 0x0f,
191         .demod_init    = dvico_fusionhdtv_demod_init,
192 };
193
194 static struct mt352_config dntv_live_dvbt_config = {
195         .demod_address = 0x0f,
196         .demod_init    = dntv_live_dvbt_demod_init,
197 };
198
199 static struct mt352_config dvico_fusionhdtv_dual = {
200         .demod_address = 0x0f,
201         .demod_init    = dvico_dual_demod_init,
202 };
203
204 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
205 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
206 {
207         static u8 clock_config []  = { 0x89, 0x38, 0x38 };
208         static u8 reset []         = { 0x50, 0x80 };
209         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
210         static u8 agc_cfg []       = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
211                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
212         static u8 dntv_extra[]     = { 0xB5, 0x7A };
213         static u8 capt_range_cfg[] = { 0x75, 0x32 };
214
215         mt352_write(fe, clock_config,   sizeof(clock_config));
216         udelay(2000);
217         mt352_write(fe, reset,          sizeof(reset));
218         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
219
220         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
221         udelay(2000);
222         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
223         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
224
225         return 0;
226 }
227
228 static struct mt352_config dntv_live_dvbt_pro_config = {
229         .demod_address = 0x0f,
230         .no_tuner      = 1,
231         .demod_init    = dntv_live_dvbt_pro_demod_init,
232 };
233 #endif
234
235 static struct zl10353_config dvico_fusionhdtv_hybrid = {
236         .demod_address = 0x0f,
237         .no_tuner      = 1,
238 };
239
240 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
241         .demod_address = 0x0f,
242         .if2           = 45600,
243         .no_tuner      = 1,
244 };
245
246 static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
247         .demod_address = 0x0f,
248         .if2 = 4560,
249         .no_tuner = 1,
250         .demod_init = dvico_fusionhdtv_demod_init,
251 };
252
253 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
254         .demod_address = 0x0f,
255 };
256
257 static struct cx22702_config connexant_refboard_config = {
258         .demod_address = 0x43,
259         .output_mode   = CX22702_SERIAL_OUTPUT,
260 };
261
262 static struct cx22702_config hauppauge_hvr_config = {
263         .demod_address = 0x63,
264         .output_mode   = CX22702_SERIAL_OUTPUT,
265 };
266
267 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
268 {
269         struct cx8802_dev *dev= fe->dvb->priv;
270         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
271         return 0;
272 }
273
274 static struct or51132_config pchdtv_hd3000 = {
275         .demod_address = 0x15,
276         .set_ts_params = or51132_set_ts_param,
277 };
278
279 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
280 {
281         struct cx8802_dev *dev= fe->dvb->priv;
282         struct cx88_core *core = dev->core;
283
284         dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
285         if (index == 0)
286                 cx_clear(MO_GP0_IO, 8);
287         else
288                 cx_set(MO_GP0_IO, 8);
289         return 0;
290 }
291
292 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
293 {
294         struct cx8802_dev *dev= fe->dvb->priv;
295         if (is_punctured)
296                 dev->ts_gen_cntrl |= 0x04;
297         else
298                 dev->ts_gen_cntrl &= ~0x04;
299         return 0;
300 }
301
302 static struct lgdt330x_config fusionhdtv_3_gold = {
303         .demod_address = 0x0e,
304         .demod_chip    = LGDT3302,
305         .serial_mpeg   = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
306         .set_ts_params = lgdt330x_set_ts_param,
307 };
308
309 static struct lgdt330x_config fusionhdtv_5_gold = {
310         .demod_address = 0x0e,
311         .demod_chip    = LGDT3303,
312         .serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
313         .set_ts_params = lgdt330x_set_ts_param,
314 };
315
316 static struct lgdt330x_config pchdtv_hd5500 = {
317         .demod_address = 0x59,
318         .demod_chip    = LGDT3303,
319         .serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
320         .set_ts_params = lgdt330x_set_ts_param,
321 };
322
323 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
324 {
325         struct cx8802_dev *dev= fe->dvb->priv;
326         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
327         return 0;
328 }
329
330 static struct nxt200x_config ati_hdtvwonder = {
331         .demod_address = 0x0a,
332         .set_ts_params = nxt200x_set_ts_param,
333 };
334
335 static int cx24123_set_ts_param(struct dvb_frontend* fe,
336         int is_punctured)
337 {
338         struct cx8802_dev *dev= fe->dvb->priv;
339         dev->ts_gen_cntrl = 0x02;
340         return 0;
341 }
342
343 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
344                                        fe_sec_voltage_t voltage)
345 {
346         struct cx8802_dev *dev= fe->dvb->priv;
347         struct cx88_core *core = dev->core;
348
349         if (voltage == SEC_VOLTAGE_OFF)
350                 cx_write(MO_GP0_IO, 0x000006fb);
351         else
352                 cx_write(MO_GP0_IO, 0x000006f9);
353
354         if (core->prev_set_voltage)
355                 return core->prev_set_voltage(fe, voltage);
356         return 0;
357 }
358
359 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
360                                       fe_sec_voltage_t voltage)
361 {
362         struct cx8802_dev *dev= fe->dvb->priv;
363         struct cx88_core *core = dev->core;
364
365         if (voltage == SEC_VOLTAGE_OFF) {
366                 dprintk(1,"LNB Voltage OFF\n");
367                 cx_write(MO_GP0_IO, 0x0000efff);
368         }
369
370         if (core->prev_set_voltage)
371                 return core->prev_set_voltage(fe, voltage);
372         return 0;
373 }
374
375 static int cx88_xc3028_callback(void *ptr, int command, int arg)
376 {
377         struct cx88_core *core = ptr;
378
379         switch (command) {
380         case XC2028_TUNER_RESET:
381                 /* Send the tuner in then out of reset */
382                 dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __FUNCTION__, arg);
383
384                 switch (core->boardnr) {
385                 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
386                         /* GPIO-4 xc3028 tuner */
387
388                         cx_set(MO_GP0_IO, 0x00001000);
389                         cx_clear(MO_GP0_IO, 0x00000010);
390                         msleep(100);
391                         cx_set(MO_GP0_IO, 0x00000010);
392                         msleep(100);
393                         break;
394                 }
395
396                 break;
397         case XC2028_RESET_CLK:
398                 dprintk(1, "%s: XC2028_RESET_CLK %d\n", __FUNCTION__, arg);
399                 break;
400         default:
401                 dprintk(1, "%s: unknown command %d, arg %d\n", __FUNCTION__,
402                         command, arg);
403                 return -EINVAL;
404         }
405
406         return 0;
407 }
408
409 static struct cx24123_config geniatech_dvbs_config = {
410         .demod_address = 0x55,
411         .set_ts_params = cx24123_set_ts_param,
412 };
413
414 static struct cx24123_config hauppauge_novas_config = {
415         .demod_address = 0x55,
416         .set_ts_params = cx24123_set_ts_param,
417 };
418
419 static struct cx24123_config kworld_dvbs_100_config = {
420         .demod_address = 0x15,
421         .set_ts_params = cx24123_set_ts_param,
422         .lnb_polarity  = 1,
423 };
424
425 static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
426         .demod_address = 0x32 >> 1,
427         .output_mode   = S5H1409_PARALLEL_OUTPUT,
428         .gpio          = S5H1409_GPIO_ON,
429         .qam_if        = 44000,
430         .inversion     = S5H1409_INVERSION_OFF,
431         .status_mode   = S5H1409_DEMODLOCKING,
432         .mpeg_timing   = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
433 };
434
435 static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
436         .demod_address = 0x32 >> 1,
437         .output_mode   = S5H1409_SERIAL_OUTPUT,
438         .gpio          = S5H1409_GPIO_OFF,
439         .inversion     = S5H1409_INVERSION_OFF,
440         .status_mode   = S5H1409_DEMODLOCKING,
441         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
442 };
443
444 static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
445         .i2c_address    = 0x64,
446         .if_khz         = 5380,
447         .tuner_callback = cx88_tuner_callback,
448 };
449
450 static struct zl10353_config cx88_geniatech_x8000_mt = {
451        .demod_address = (0x1e >> 1),
452        .no_tuner = 1,
453 };
454
455
456 static int dvb_register(struct cx8802_dev *dev)
457 {
458         int attach_xc3028 = 0;
459
460         /* init struct videobuf_dvb */
461         dev->dvb.name = dev->core->name;
462         dev->ts_gen_cntrl = 0x0c;
463
464         /* init frontend */
465         switch (dev->core->boardnr) {
466         case CX88_BOARD_HAUPPAUGE_DVB_T1:
467                 dev->dvb.frontend = dvb_attach(cx22702_attach,
468                                                &connexant_refboard_config,
469                                                &dev->core->i2c_adap);
470                 if (dev->dvb.frontend != NULL) {
471                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
472                                    &dev->core->i2c_adap,
473                                    DVB_PLL_THOMSON_DTT759X);
474                 }
475                 break;
476         case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
477         case CX88_BOARD_CONEXANT_DVB_T1:
478         case CX88_BOARD_KWORLD_DVB_T_CX22702:
479         case CX88_BOARD_WINFAST_DTV1000:
480                 dev->dvb.frontend = dvb_attach(cx22702_attach,
481                                                &connexant_refboard_config,
482                                                &dev->core->i2c_adap);
483                 if (dev->dvb.frontend != NULL) {
484                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
485                                    &dev->core->i2c_adap,
486                                    DVB_PLL_THOMSON_DTT7579);
487                 }
488                 break;
489         case CX88_BOARD_WINFAST_DTV2000H:
490         case CX88_BOARD_HAUPPAUGE_HVR1100:
491         case CX88_BOARD_HAUPPAUGE_HVR1100LP:
492         case CX88_BOARD_HAUPPAUGE_HVR1300:
493         case CX88_BOARD_HAUPPAUGE_HVR3000:
494                 dev->dvb.frontend = dvb_attach(cx22702_attach,
495                                                &hauppauge_hvr_config,
496                                                &dev->core->i2c_adap);
497                 if (dev->dvb.frontend != NULL) {
498                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
499                                    &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
500                 }
501                 break;
502         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
503                 dev->dvb.frontend = dvb_attach(mt352_attach,
504                                                &dvico_fusionhdtv,
505                                                &dev->core->i2c_adap);
506                 if (dev->dvb.frontend != NULL) {
507                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
508                                    NULL, DVB_PLL_THOMSON_DTT7579);
509                         break;
510                 }
511                 /* ZL10353 replaces MT352 on later cards */
512                 dev->dvb.frontend = dvb_attach(zl10353_attach,
513                                                &dvico_fusionhdtv_plus_v1_1,
514                                                &dev->core->i2c_adap);
515                 if (dev->dvb.frontend != NULL) {
516                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
517                                    NULL, DVB_PLL_THOMSON_DTT7579);
518                 }
519                 break;
520         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
521                 /* The tin box says DEE1601, but it seems to be DTT7579
522                  * compatible, with a slightly different MT352 AGC gain. */
523                 dev->dvb.frontend = dvb_attach(mt352_attach,
524                                                &dvico_fusionhdtv_dual,
525                                                &dev->core->i2c_adap);
526                 if (dev->dvb.frontend != NULL) {
527                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
528                                    NULL, DVB_PLL_THOMSON_DTT7579);
529                         break;
530                 }
531                 /* ZL10353 replaces MT352 on later cards */
532                 dev->dvb.frontend = dvb_attach(zl10353_attach,
533                                                &dvico_fusionhdtv_plus_v1_1,
534                                                &dev->core->i2c_adap);
535                 if (dev->dvb.frontend != NULL) {
536                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
537                                    NULL, DVB_PLL_THOMSON_DTT7579);
538                 }
539                 break;
540         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
541                 dev->dvb.frontend = dvb_attach(mt352_attach,
542                                                &dvico_fusionhdtv,
543                                                &dev->core->i2c_adap);
544                 if (dev->dvb.frontend != NULL) {
545                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
546                                    NULL, DVB_PLL_LG_Z201);
547                 }
548                 break;
549         case CX88_BOARD_KWORLD_DVB_T:
550         case CX88_BOARD_DNTV_LIVE_DVB_T:
551         case CX88_BOARD_ADSTECH_DVB_T_PCI:
552                 dev->dvb.frontend = dvb_attach(mt352_attach,
553                                                &dntv_live_dvbt_config,
554                                                &dev->core->i2c_adap);
555                 if (dev->dvb.frontend != NULL) {
556                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
557                                    NULL, DVB_PLL_UNKNOWN_1);
558                 }
559                 break;
560         case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
561 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
562                 /* MT352 is on a secondary I2C bus made from some GPIO lines */
563                 dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
564                                                &dev->vp3054->adap);
565                 if (dev->dvb.frontend != NULL) {
566                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
567                                    &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
568                 }
569 #else
570                 printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
571 #endif
572                 break;
573         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
574                 dev->dvb.frontend = dvb_attach(zl10353_attach,
575                                                &dvico_fusionhdtv_hybrid,
576                                                &dev->core->i2c_adap);
577                 if (dev->dvb.frontend != NULL) {
578                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
579                                    &dev->core->i2c_adap,
580                                    DVB_PLL_THOMSON_FE6600);
581                 }
582                 break;
583         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
584                 dev->dvb.frontend = dvb_attach(zl10353_attach,
585                                                &dvico_fusionhdtv_xc3028,
586                                                &dev->core->i2c_adap);
587                 if (dev->dvb.frontend == NULL)
588                         dev->dvb.frontend = dvb_attach(mt352_attach,
589                                                 &dvico_fusionhdtv_mt352_xc3028,
590                                                 &dev->core->i2c_adap);
591                 attach_xc3028 = 1;
592                 break;
593         case CX88_BOARD_PCHDTV_HD3000:
594                 dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
595                                                &dev->core->i2c_adap);
596                 if (dev->dvb.frontend != NULL) {
597                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
598                                    &dev->core->i2c_adap,
599                                    DVB_PLL_THOMSON_DTT761X);
600                 }
601                 break;
602         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
603                 dev->ts_gen_cntrl = 0x08;
604                 {
605                 /* Do a hardware reset of chip before using it. */
606                 struct cx88_core *core = dev->core;
607
608                 cx_clear(MO_GP0_IO, 1);
609                 mdelay(100);
610                 cx_set(MO_GP0_IO, 1);
611                 mdelay(200);
612
613                 /* Select RF connector callback */
614                 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
615                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
616                                                &fusionhdtv_3_gold,
617                                                &dev->core->i2c_adap);
618                 if (dev->dvb.frontend != NULL) {
619                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
620                                    &dev->core->i2c_adap,
621                                    DVB_PLL_MICROTUNE_4042);
622                 }
623                 }
624                 break;
625         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
626                 dev->ts_gen_cntrl = 0x08;
627                 {
628                 /* Do a hardware reset of chip before using it. */
629                 struct cx88_core *core = dev->core;
630
631                 cx_clear(MO_GP0_IO, 1);
632                 mdelay(100);
633                 cx_set(MO_GP0_IO, 9);
634                 mdelay(200);
635                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
636                                                &fusionhdtv_3_gold,
637                                                &dev->core->i2c_adap);
638                 if (dev->dvb.frontend != NULL) {
639                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
640                                    &dev->core->i2c_adap,
641                                    DVB_PLL_THOMSON_DTT761X);
642                 }
643                 }
644                 break;
645         case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
646                 dev->ts_gen_cntrl = 0x08;
647                 {
648                 /* Do a hardware reset of chip before using it. */
649                 struct cx88_core *core = dev->core;
650
651                 cx_clear(MO_GP0_IO, 1);
652                 mdelay(100);
653                 cx_set(MO_GP0_IO, 1);
654                 mdelay(200);
655                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
656                                                &fusionhdtv_5_gold,
657                                                &dev->core->i2c_adap);
658                 if (dev->dvb.frontend != NULL) {
659                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
660                                    &dev->core->i2c_adap,
661                                    DVB_PLL_LG_TDVS_H06XF);
662                 }
663                 }
664                 break;
665         case CX88_BOARD_PCHDTV_HD5500:
666                 dev->ts_gen_cntrl = 0x08;
667                 {
668                 /* Do a hardware reset of chip before using it. */
669                 struct cx88_core *core = dev->core;
670
671                 cx_clear(MO_GP0_IO, 1);
672                 mdelay(100);
673                 cx_set(MO_GP0_IO, 1);
674                 mdelay(200);
675                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
676                                                &pchdtv_hd5500,
677                                                &dev->core->i2c_adap);
678                 if (dev->dvb.frontend != NULL) {
679                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
680                                    &dev->core->i2c_adap,
681                                    DVB_PLL_LG_TDVS_H06XF);
682                 }
683                 }
684                 break;
685         case CX88_BOARD_ATI_HDTVWONDER:
686                 dev->dvb.frontend = dvb_attach(nxt200x_attach,
687                                                &ati_hdtvwonder,
688                                                &dev->core->i2c_adap);
689                 if (dev->dvb.frontend != NULL) {
690                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
691                                    NULL, DVB_PLL_TUV1236D);
692                 }
693                 break;
694         case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
695         case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
696                 dev->dvb.frontend = dvb_attach(cx24123_attach,
697                                                &hauppauge_novas_config,
698                                                &dev->core->i2c_adap);
699                 if (dev->dvb.frontend) {
700                         dvb_attach(isl6421_attach, dev->dvb.frontend,
701                                    &dev->core->i2c_adap, 0x08, 0x00, 0x00);
702                 }
703                 break;
704         case CX88_BOARD_KWORLD_DVBS_100:
705                 dev->dvb.frontend = dvb_attach(cx24123_attach,
706                                                &kworld_dvbs_100_config,
707                                                &dev->core->i2c_adap);
708                 if (dev->dvb.frontend) {
709                         dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
710                         dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
711                 }
712                 break;
713         case CX88_BOARD_GENIATECH_DVBS:
714                 dev->dvb.frontend = dvb_attach(cx24123_attach,
715                                                &geniatech_dvbs_config,
716                                                &dev->core->i2c_adap);
717                 if (dev->dvb.frontend) {
718                         dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
719                         dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
720                 }
721                 break;
722         case CX88_BOARD_PINNACLE_PCTV_HD_800i:
723                 dev->dvb.frontend = dvb_attach(s5h1409_attach,
724                                                &pinnacle_pctv_hd_800i_config,
725                                                &dev->core->i2c_adap);
726                 if (dev->dvb.frontend != NULL) {
727                         /* tuner_config.video_dev must point to
728                          * i2c_adap.algo_data
729                          */
730                         pinnacle_pctv_hd_800i_tuner_config.priv =
731                                                 dev->core->i2c_adap.algo_data;
732                         dvb_attach(xc5000_attach, dev->dvb.frontend,
733                                    &dev->core->i2c_adap,
734                                    &pinnacle_pctv_hd_800i_tuner_config);
735                 }
736                 break;
737         case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
738                 dev->dvb.frontend = dvb_attach(s5h1409_attach,
739                                                 &dvico_hdtv5_pci_nano_config,
740                                                 &dev->core->i2c_adap);
741                 if (dev->dvb.frontend != NULL) {
742                         struct dvb_frontend *fe;
743                         struct xc2028_config cfg = {
744                                 .i2c_adap  = &dev->core->i2c_adap,
745                                 .i2c_addr  = 0x61,
746                                 .video_dev = dev->core,
747                                 .callback  = cx88_xc3028_callback,
748                         };
749                         static struct xc2028_ctrl ctl = {
750                                 .fname       = "xc3028-v27.fw",
751                                 .max_len     = 64,
752                                 .scode_table = OREN538,
753                         };
754
755                         fe = dvb_attach(xc2028_attach,
756                                         dev->dvb.frontend, &cfg);
757                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
758                                 fe->ops.tuner_ops.set_config(fe, &ctl);
759                 }
760                 break;
761          case CX88_BOARD_PINNACLE_HYBRID_PCTV:
762                 dev->dvb.frontend = dvb_attach(zl10353_attach,
763                                                &cx88_geniatech_x8000_mt,
764                                                &dev->core->i2c_adap);
765                 attach_xc3028 = 1;
766                 break;
767          case CX88_BOARD_GENIATECH_X8000_MT:
768                dev->ts_gen_cntrl = 0x00;
769
770                 dev->dvb.frontend = dvb_attach(zl10353_attach,
771                                                &cx88_geniatech_x8000_mt,
772                                                &dev->core->i2c_adap);
773                 attach_xc3028 = 1;
774                 break;
775         default:
776                 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
777                        dev->core->name);
778                 break;
779         }
780         if (NULL == dev->dvb.frontend) {
781                 printk(KERN_ERR
782                        "%s/2: frontend initialization failed\n",
783                        dev->core->name);
784                 return -1;
785         }
786
787         if (attach_xc3028) {
788                 struct dvb_frontend *fe;
789                 struct xc2028_config cfg = {
790                         .i2c_adap  = &dev->core->i2c_adap,
791                         .i2c_addr  = 0x61,
792                         .video_dev = dev->core,
793                 };
794                 fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
795                 if (!fe) {
796                         printk(KERN_ERR "%s/2: xc3028 attach failed\n",
797                                dev->core->name);
798                         dvb_frontend_detach(dev->dvb.frontend);
799                         dvb_unregister_frontend(dev->dvb.frontend);
800                         dev->dvb.frontend = NULL;
801                         return -1;
802                 }
803         }
804
805         /* Ensure all frontends negotiate bus access */
806         dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
807
808         /* Put the analog decoder in standby to keep it quiet */
809         cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
810
811         /* register everything */
812         return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
813 }
814
815 /* ----------------------------------------------------------- */
816
817 /* CX8802 MPEG -> mini driver - We have been given the hardware */
818 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
819 {
820         struct cx88_core *core = drv->core;
821         int err = 0;
822         dprintk( 1, "%s\n", __FUNCTION__);
823
824         switch (core->boardnr) {
825         case CX88_BOARD_HAUPPAUGE_HVR1300:
826                 /* We arrive here with either the cx23416 or the cx22702
827                  * on the bus. Take the bus from the cx23416 and enable the
828                  * cx22702 demod
829                  */
830                 cx_set(MO_GP0_IO,   0x00000080); /* cx22702 out of reset and enable */
831                 cx_clear(MO_GP0_IO, 0x00000004);
832                 udelay(1000);
833                 break;
834         default:
835                 err = -ENODEV;
836         }
837         return err;
838 }
839
840 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
841 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
842 {
843         struct cx88_core *core = drv->core;
844         int err = 0;
845         dprintk( 1, "%s\n", __FUNCTION__);
846
847         switch (core->boardnr) {
848         case CX88_BOARD_HAUPPAUGE_HVR1300:
849                 /* Do Nothing, leave the cx22702 on the bus. */
850                 break;
851         default:
852                 err = -ENODEV;
853         }
854         return err;
855 }
856
857 static int cx8802_dvb_probe(struct cx8802_driver *drv)
858 {
859         struct cx88_core *core = drv->core;
860         struct cx8802_dev *dev = drv->core->dvbdev;
861         int err;
862
863         dprintk( 1, "%s\n", __FUNCTION__);
864         dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
865                 core->boardnr,
866                 core->name,
867                 core->pci_bus,
868                 core->pci_slot);
869
870         err = -ENODEV;
871         if (!(core->board.mpeg & CX88_MPEG_DVB))
872                 goto fail_core;
873
874         /* If vp3054 isn't enabled, a stub will just return 0 */
875         err = vp3054_i2c_probe(dev);
876         if (0 != err)
877                 goto fail_core;
878
879         /* dvb stuff */
880         printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
881         videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
882                             &dev->pci->dev, &dev->slock,
883                             V4L2_BUF_TYPE_VIDEO_CAPTURE,
884                             V4L2_FIELD_TOP,
885                             sizeof(struct cx88_buffer),
886                             dev);
887         err = dvb_register(dev);
888         if (err != 0)
889                 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
890                        core->name, err);
891
892  fail_core:
893         return err;
894 }
895
896 static int cx8802_dvb_remove(struct cx8802_driver *drv)
897 {
898         struct cx8802_dev *dev = drv->core->dvbdev;
899
900         /* dvb */
901         videobuf_dvb_unregister(&dev->dvb);
902
903         vp3054_i2c_remove(dev);
904
905         return 0;
906 }
907
908 static struct cx8802_driver cx8802_dvb_driver = {
909         .type_id        = CX88_MPEG_DVB,
910         .hw_access      = CX8802_DRVCTL_SHARED,
911         .probe          = cx8802_dvb_probe,
912         .remove         = cx8802_dvb_remove,
913         .advise_acquire = cx8802_dvb_advise_acquire,
914         .advise_release = cx8802_dvb_advise_release,
915 };
916
917 static int dvb_init(void)
918 {
919         printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
920                (CX88_VERSION_CODE >> 16) & 0xff,
921                (CX88_VERSION_CODE >>  8) & 0xff,
922                CX88_VERSION_CODE & 0xff);
923 #ifdef SNAPSHOT
924         printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
925                SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
926 #endif
927         return cx8802_register_driver(&cx8802_dvb_driver);
928 }
929
930 static void dvb_fini(void)
931 {
932         cx8802_unregister_driver(&cx8802_dvb_driver);
933 }
934
935 module_init(dvb_init);
936 module_exit(dvb_fini);
937
938 /*
939  * Local variables:
940  * c-basic-offset: 8
941  * compile-command: "make DVB=1"
942  * End:
943  */