V4L/DVB (7415): use tuner-simple for Philips TUV1236D digital tuning support
[linux-2.6.git] / drivers / media / video / cx88 / cx88-dvb.c
1 /*
2  *
3  * device driver for Conexant 2388x based TV cards
4  * MPEG Transport Stream (DVB) routines
5  *
6  * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7  * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; either version 2 of the License, or
12  *  (at your option) any later version.
13  *
14  *  This program is distributed in the hope that it will be useful,
15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *  GNU General Public License for more details.
18  *
19  *  You should have received a copy of the GNU General Public License
20  *  along with this program; if not, write to the Free Software
21  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #include "mt352.h"
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
39 #include "zl10353.h"
40 #include "cx22702.h"
41 #include "or51132.h"
42 #include "lgdt330x.h"
43 #include "s5h1409.h"
44 #include "xc5000.h"
45 #include "nxt200x.h"
46 #include "cx24123.h"
47 #include "isl6421.h"
48 #include "tuner-xc2028.h"
49 #include "tuner-xc2028-types.h"
50 #include "tuner-simple.h"
51 #include "tda9887.h"
52
53 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
54 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
55 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
56 MODULE_LICENSE("GPL");
57
58 static unsigned int debug;
59 module_param(debug, int, 0644);
60 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
61
62 #define dprintk(level,fmt, arg...)      if (debug >= level) \
63         printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
64
65 /* ------------------------------------------------------------------ */
66
67 static int dvb_buf_setup(struct videobuf_queue *q,
68                          unsigned int *count, unsigned int *size)
69 {
70         struct cx8802_dev *dev = q->priv_data;
71
72         dev->ts_packet_size  = 188 * 4;
73         dev->ts_packet_count = 32;
74
75         *size  = dev->ts_packet_size * dev->ts_packet_count;
76         *count = 32;
77         return 0;
78 }
79
80 static int dvb_buf_prepare(struct videobuf_queue *q,
81                            struct videobuf_buffer *vb, enum v4l2_field field)
82 {
83         struct cx8802_dev *dev = q->priv_data;
84         return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
85 }
86
87 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
88 {
89         struct cx8802_dev *dev = q->priv_data;
90         cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
91 }
92
93 static void dvb_buf_release(struct videobuf_queue *q,
94                             struct videobuf_buffer *vb)
95 {
96         cx88_free_buffer(q, (struct cx88_buffer*)vb);
97 }
98
99 static struct videobuf_queue_ops dvb_qops = {
100         .buf_setup    = dvb_buf_setup,
101         .buf_prepare  = dvb_buf_prepare,
102         .buf_queue    = dvb_buf_queue,
103         .buf_release  = dvb_buf_release,
104 };
105
106 /* ------------------------------------------------------------------ */
107
108 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
109 {
110         struct cx8802_dev *dev= fe->dvb->priv;
111         struct cx8802_driver *drv = NULL;
112         int ret = 0;
113
114         drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
115         if (drv) {
116                 if (acquire)
117                         ret = drv->request_acquire(drv);
118                 else
119                         ret = drv->request_release(drv);
120         }
121
122         return ret;
123 }
124
125 /* ------------------------------------------------------------------ */
126
127 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
128 {
129         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x39 };
130         static u8 reset []         = { RESET,      0x80 };
131         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
132         static u8 agc_cfg []       = { AGC_TARGET, 0x24, 0x20 };
133         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
134         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
135
136         mt352_write(fe, clock_config,   sizeof(clock_config));
137         udelay(200);
138         mt352_write(fe, reset,          sizeof(reset));
139         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
140
141         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
142         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
143         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
144         return 0;
145 }
146
147 static int dvico_dual_demod_init(struct dvb_frontend *fe)
148 {
149         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x38 };
150         static u8 reset []         = { RESET,      0x80 };
151         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
152         static u8 agc_cfg []       = { AGC_TARGET, 0x28, 0x20 };
153         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
154         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
155
156         mt352_write(fe, clock_config,   sizeof(clock_config));
157         udelay(200);
158         mt352_write(fe, reset,          sizeof(reset));
159         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
160
161         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
162         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
163         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
164
165         return 0;
166 }
167
168 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
169 {
170         static u8 clock_config []  = { 0x89, 0x38, 0x39 };
171         static u8 reset []         = { 0x50, 0x80 };
172         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
173         static u8 agc_cfg []       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
174                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
175         static u8 dntv_extra[]     = { 0xB5, 0x7A };
176         static u8 capt_range_cfg[] = { 0x75, 0x32 };
177
178         mt352_write(fe, clock_config,   sizeof(clock_config));
179         udelay(2000);
180         mt352_write(fe, reset,          sizeof(reset));
181         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
182
183         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
184         udelay(2000);
185         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
186         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
187
188         return 0;
189 }
190
191 static struct mt352_config dvico_fusionhdtv = {
192         .demod_address = 0x0f,
193         .demod_init    = dvico_fusionhdtv_demod_init,
194 };
195
196 static struct mt352_config dntv_live_dvbt_config = {
197         .demod_address = 0x0f,
198         .demod_init    = dntv_live_dvbt_demod_init,
199 };
200
201 static struct mt352_config dvico_fusionhdtv_dual = {
202         .demod_address = 0x0f,
203         .demod_init    = dvico_dual_demod_init,
204 };
205
206 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
207 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
208 {
209         static u8 clock_config []  = { 0x89, 0x38, 0x38 };
210         static u8 reset []         = { 0x50, 0x80 };
211         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
212         static u8 agc_cfg []       = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
213                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
214         static u8 dntv_extra[]     = { 0xB5, 0x7A };
215         static u8 capt_range_cfg[] = { 0x75, 0x32 };
216
217         mt352_write(fe, clock_config,   sizeof(clock_config));
218         udelay(2000);
219         mt352_write(fe, reset,          sizeof(reset));
220         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
221
222         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
223         udelay(2000);
224         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
225         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
226
227         return 0;
228 }
229
230 static struct mt352_config dntv_live_dvbt_pro_config = {
231         .demod_address = 0x0f,
232         .no_tuner      = 1,
233         .demod_init    = dntv_live_dvbt_pro_demod_init,
234 };
235 #endif
236
237 static struct zl10353_config dvico_fusionhdtv_hybrid = {
238         .demod_address = 0x0f,
239         .no_tuner      = 1,
240 };
241
242 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
243         .demod_address = 0x0f,
244         .if2           = 45600,
245         .no_tuner      = 1,
246 };
247
248 static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
249         .demod_address = 0x0f,
250         .if2 = 4560,
251         .no_tuner = 1,
252         .demod_init = dvico_fusionhdtv_demod_init,
253 };
254
255 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
256         .demod_address = 0x0f,
257 };
258
259 static struct cx22702_config connexant_refboard_config = {
260         .demod_address = 0x43,
261         .output_mode   = CX22702_SERIAL_OUTPUT,
262 };
263
264 static struct cx22702_config hauppauge_hvr_config = {
265         .demod_address = 0x63,
266         .output_mode   = CX22702_SERIAL_OUTPUT,
267 };
268
269 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
270 {
271         struct cx8802_dev *dev= fe->dvb->priv;
272         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
273         return 0;
274 }
275
276 static struct or51132_config pchdtv_hd3000 = {
277         .demod_address = 0x15,
278         .set_ts_params = or51132_set_ts_param,
279 };
280
281 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
282 {
283         struct cx8802_dev *dev= fe->dvb->priv;
284         struct cx88_core *core = dev->core;
285
286         dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
287         if (index == 0)
288                 cx_clear(MO_GP0_IO, 8);
289         else
290                 cx_set(MO_GP0_IO, 8);
291         return 0;
292 }
293
294 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
295 {
296         struct cx8802_dev *dev= fe->dvb->priv;
297         if (is_punctured)
298                 dev->ts_gen_cntrl |= 0x04;
299         else
300                 dev->ts_gen_cntrl &= ~0x04;
301         return 0;
302 }
303
304 static struct lgdt330x_config fusionhdtv_3_gold = {
305         .demod_address = 0x0e,
306         .demod_chip    = LGDT3302,
307         .serial_mpeg   = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
308         .set_ts_params = lgdt330x_set_ts_param,
309 };
310
311 static struct lgdt330x_config fusionhdtv_5_gold = {
312         .demod_address = 0x0e,
313         .demod_chip    = LGDT3303,
314         .serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
315         .set_ts_params = lgdt330x_set_ts_param,
316 };
317
318 static struct lgdt330x_config pchdtv_hd5500 = {
319         .demod_address = 0x59,
320         .demod_chip    = LGDT3303,
321         .serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
322         .set_ts_params = lgdt330x_set_ts_param,
323 };
324
325 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
326 {
327         struct cx8802_dev *dev= fe->dvb->priv;
328         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
329         return 0;
330 }
331
332 static struct nxt200x_config ati_hdtvwonder = {
333         .demod_address = 0x0a,
334         .set_ts_params = nxt200x_set_ts_param,
335 };
336
337 static int cx24123_set_ts_param(struct dvb_frontend* fe,
338         int is_punctured)
339 {
340         struct cx8802_dev *dev= fe->dvb->priv;
341         dev->ts_gen_cntrl = 0x02;
342         return 0;
343 }
344
345 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
346                                        fe_sec_voltage_t voltage)
347 {
348         struct cx8802_dev *dev= fe->dvb->priv;
349         struct cx88_core *core = dev->core;
350
351         if (voltage == SEC_VOLTAGE_OFF)
352                 cx_write(MO_GP0_IO, 0x000006fb);
353         else
354                 cx_write(MO_GP0_IO, 0x000006f9);
355
356         if (core->prev_set_voltage)
357                 return core->prev_set_voltage(fe, voltage);
358         return 0;
359 }
360
361 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
362                                       fe_sec_voltage_t voltage)
363 {
364         struct cx8802_dev *dev= fe->dvb->priv;
365         struct cx88_core *core = dev->core;
366
367         if (voltage == SEC_VOLTAGE_OFF) {
368                 dprintk(1,"LNB Voltage OFF\n");
369                 cx_write(MO_GP0_IO, 0x0000efff);
370         }
371
372         if (core->prev_set_voltage)
373                 return core->prev_set_voltage(fe, voltage);
374         return 0;
375 }
376
377 static int cx88_pci_nano_callback(void *ptr, int command, int arg)
378 {
379         struct cx88_core *core = ptr;
380
381         switch (command) {
382         case XC2028_TUNER_RESET:
383                 /* Send the tuner in then out of reset */
384                 dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __FUNCTION__, arg);
385
386                 switch (core->boardnr) {
387                 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
388                         /* GPIO-4 xc3028 tuner */
389
390                         cx_set(MO_GP0_IO, 0x00001000);
391                         cx_clear(MO_GP0_IO, 0x00000010);
392                         msleep(100);
393                         cx_set(MO_GP0_IO, 0x00000010);
394                         msleep(100);
395                         break;
396                 }
397
398                 break;
399         case XC2028_RESET_CLK:
400                 dprintk(1, "%s: XC2028_RESET_CLK %d\n", __FUNCTION__, arg);
401                 break;
402         default:
403                 dprintk(1, "%s: unknown command %d, arg %d\n", __FUNCTION__,
404                         command, arg);
405                 return -EINVAL;
406         }
407
408         return 0;
409 }
410
411 static struct cx24123_config geniatech_dvbs_config = {
412         .demod_address = 0x55,
413         .set_ts_params = cx24123_set_ts_param,
414 };
415
416 static struct cx24123_config hauppauge_novas_config = {
417         .demod_address = 0x55,
418         .set_ts_params = cx24123_set_ts_param,
419 };
420
421 static struct cx24123_config kworld_dvbs_100_config = {
422         .demod_address = 0x15,
423         .set_ts_params = cx24123_set_ts_param,
424         .lnb_polarity  = 1,
425 };
426
427 static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
428         .demod_address = 0x32 >> 1,
429         .output_mode   = S5H1409_PARALLEL_OUTPUT,
430         .gpio          = S5H1409_GPIO_ON,
431         .qam_if        = 44000,
432         .inversion     = S5H1409_INVERSION_OFF,
433         .status_mode   = S5H1409_DEMODLOCKING,
434         .mpeg_timing   = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
435 };
436
437 static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
438         .demod_address = 0x32 >> 1,
439         .output_mode   = S5H1409_SERIAL_OUTPUT,
440         .gpio          = S5H1409_GPIO_OFF,
441         .inversion     = S5H1409_INVERSION_OFF,
442         .status_mode   = S5H1409_DEMODLOCKING,
443         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
444 };
445
446 static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
447         .i2c_address    = 0x64,
448         .if_khz         = 5380,
449         .tuner_callback = cx88_tuner_callback,
450 };
451
452 static struct zl10353_config cx88_geniatech_x8000_mt = {
453        .demod_address = (0x1e >> 1),
454        .no_tuner = 1,
455 };
456
457 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
458 {
459         struct dvb_frontend *fe;
460         struct xc2028_config cfg = {
461                 .i2c_adap  = &dev->core->i2c_adap,
462                 .i2c_addr  = addr,
463         };
464
465         if (!dev->dvb.frontend) {
466                 printk(KERN_ERR "%s/2: dvb frontend not attached. "
467                                 "Can't attach xc3028\n",
468                        dev->core->name);
469                 return -EINVAL;
470         }
471
472         fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
473         if (!fe) {
474                 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
475                        dev->core->name);
476                 dvb_frontend_detach(dev->dvb.frontend);
477                 dvb_unregister_frontend(dev->dvb.frontend);
478                 dev->dvb.frontend = NULL;
479                 return -EINVAL;
480         }
481
482         printk(KERN_INFO "%s/2: xc3028 attached\n",
483                dev->core->name);
484
485         return 0;
486 }
487
488 static int dvb_register(struct cx8802_dev *dev)
489 {
490         /* init struct videobuf_dvb */
491         dev->dvb.name = dev->core->name;
492         dev->ts_gen_cntrl = 0x0c;
493
494         /* init frontend */
495         switch (dev->core->boardnr) {
496         case CX88_BOARD_HAUPPAUGE_DVB_T1:
497                 dev->dvb.frontend = dvb_attach(cx22702_attach,
498                                                &connexant_refboard_config,
499                                                &dev->core->i2c_adap);
500                 if (dev->dvb.frontend != NULL) {
501                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
502                                    &dev->core->i2c_adap,
503                                    DVB_PLL_THOMSON_DTT759X);
504                 }
505                 break;
506         case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
507         case CX88_BOARD_CONEXANT_DVB_T1:
508         case CX88_BOARD_KWORLD_DVB_T_CX22702:
509         case CX88_BOARD_WINFAST_DTV1000:
510                 dev->dvb.frontend = dvb_attach(cx22702_attach,
511                                                &connexant_refboard_config,
512                                                &dev->core->i2c_adap);
513                 if (dev->dvb.frontend != NULL) {
514                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
515                                    &dev->core->i2c_adap,
516                                    DVB_PLL_THOMSON_DTT7579);
517                 }
518                 break;
519         case CX88_BOARD_WINFAST_DTV2000H:
520         case CX88_BOARD_HAUPPAUGE_HVR1100:
521         case CX88_BOARD_HAUPPAUGE_HVR1100LP:
522         case CX88_BOARD_HAUPPAUGE_HVR1300:
523         case CX88_BOARD_HAUPPAUGE_HVR3000:
524                 dev->dvb.frontend = dvb_attach(cx22702_attach,
525                                                &hauppauge_hvr_config,
526                                                &dev->core->i2c_adap);
527                 if (dev->dvb.frontend != NULL) {
528                         dvb_attach(simple_tuner_attach, dev->dvb.frontend,
529                                    &dev->core->i2c_adap, 0x61,
530                                    TUNER_PHILIPS_FMD1216ME_MK3);
531                 }
532                 break;
533         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
534                 dev->dvb.frontend = dvb_attach(mt352_attach,
535                                                &dvico_fusionhdtv,
536                                                &dev->core->i2c_adap);
537                 if (dev->dvb.frontend != NULL) {
538                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
539                                    NULL, DVB_PLL_THOMSON_DTT7579);
540                         break;
541                 }
542                 /* ZL10353 replaces MT352 on later cards */
543                 dev->dvb.frontend = dvb_attach(zl10353_attach,
544                                                &dvico_fusionhdtv_plus_v1_1,
545                                                &dev->core->i2c_adap);
546                 if (dev->dvb.frontend != NULL) {
547                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
548                                    NULL, DVB_PLL_THOMSON_DTT7579);
549                 }
550                 break;
551         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
552                 /* The tin box says DEE1601, but it seems to be DTT7579
553                  * compatible, with a slightly different MT352 AGC gain. */
554                 dev->dvb.frontend = dvb_attach(mt352_attach,
555                                                &dvico_fusionhdtv_dual,
556                                                &dev->core->i2c_adap);
557                 if (dev->dvb.frontend != NULL) {
558                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
559                                    NULL, DVB_PLL_THOMSON_DTT7579);
560                         break;
561                 }
562                 /* ZL10353 replaces MT352 on later cards */
563                 dev->dvb.frontend = dvb_attach(zl10353_attach,
564                                                &dvico_fusionhdtv_plus_v1_1,
565                                                &dev->core->i2c_adap);
566                 if (dev->dvb.frontend != NULL) {
567                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
568                                    NULL, DVB_PLL_THOMSON_DTT7579);
569                 }
570                 break;
571         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
572                 dev->dvb.frontend = dvb_attach(mt352_attach,
573                                                &dvico_fusionhdtv,
574                                                &dev->core->i2c_adap);
575                 if (dev->dvb.frontend != NULL) {
576                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
577                                    NULL, DVB_PLL_LG_Z201);
578                 }
579                 break;
580         case CX88_BOARD_KWORLD_DVB_T:
581         case CX88_BOARD_DNTV_LIVE_DVB_T:
582         case CX88_BOARD_ADSTECH_DVB_T_PCI:
583                 dev->dvb.frontend = dvb_attach(mt352_attach,
584                                                &dntv_live_dvbt_config,
585                                                &dev->core->i2c_adap);
586                 if (dev->dvb.frontend != NULL) {
587                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
588                                    NULL, DVB_PLL_UNKNOWN_1);
589                 }
590                 break;
591         case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
592 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
593                 /* MT352 is on a secondary I2C bus made from some GPIO lines */
594                 dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
595                                                &dev->vp3054->adap);
596                 if (dev->dvb.frontend != NULL) {
597                         dvb_attach(simple_tuner_attach, dev->dvb.frontend,
598                                    &dev->core->i2c_adap, 0x61,
599                                    TUNER_PHILIPS_FMD1216ME_MK3);
600                 }
601 #else
602                 printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
603 #endif
604                 break;
605         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
606                 dev->dvb.frontend = dvb_attach(zl10353_attach,
607                                                &dvico_fusionhdtv_hybrid,
608                                                &dev->core->i2c_adap);
609                 if (dev->dvb.frontend != NULL) {
610                         dvb_attach(simple_tuner_attach, dev->dvb.frontend,
611                                    &dev->core->i2c_adap, 0x61,
612                                    TUNER_THOMSON_FE6600);
613                 }
614                 break;
615         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
616                 dev->dvb.frontend = dvb_attach(zl10353_attach,
617                                                &dvico_fusionhdtv_xc3028,
618                                                &dev->core->i2c_adap);
619                 if (dev->dvb.frontend == NULL)
620                         dev->dvb.frontend = dvb_attach(mt352_attach,
621                                                 &dvico_fusionhdtv_mt352_xc3028,
622                                                 &dev->core->i2c_adap);
623                 /*
624                  * On this board, the demod provides the I2C bus pullup.
625                  * We must not permit gate_ctrl to be performed, or
626                  * the xc3028 cannot communicate on the bus.
627                  */
628                 if (dev->dvb.frontend)
629                         dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
630                 if (attach_xc3028(0x61, dev) < 0)
631                         return -EINVAL;
632                 break;
633         case CX88_BOARD_PCHDTV_HD3000:
634                 dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
635                                                &dev->core->i2c_adap);
636                 if (dev->dvb.frontend != NULL) {
637                         dvb_attach(simple_tuner_attach, dev->dvb.frontend,
638                                    &dev->core->i2c_adap, 0x61,
639                                    TUNER_THOMSON_DTT761X);
640                 }
641                 break;
642         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
643                 dev->ts_gen_cntrl = 0x08;
644                 {
645                 /* Do a hardware reset of chip before using it. */
646                 struct cx88_core *core = dev->core;
647
648                 cx_clear(MO_GP0_IO, 1);
649                 mdelay(100);
650                 cx_set(MO_GP0_IO, 1);
651                 mdelay(200);
652
653                 /* Select RF connector callback */
654                 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
655                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
656                                                &fusionhdtv_3_gold,
657                                                &dev->core->i2c_adap);
658                 if (dev->dvb.frontend != NULL) {
659                         dvb_attach(simple_tuner_attach, dev->dvb.frontend,
660                                    &dev->core->i2c_adap, 0x61,
661                                    TUNER_MICROTUNE_4042FI5);
662                 }
663                 }
664                 break;
665         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
666                 dev->ts_gen_cntrl = 0x08;
667                 {
668                 /* Do a hardware reset of chip before using it. */
669                 struct cx88_core *core = dev->core;
670
671                 cx_clear(MO_GP0_IO, 1);
672                 mdelay(100);
673                 cx_set(MO_GP0_IO, 9);
674                 mdelay(200);
675                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
676                                                &fusionhdtv_3_gold,
677                                                &dev->core->i2c_adap);
678                 if (dev->dvb.frontend != NULL) {
679                         dvb_attach(simple_tuner_attach, dev->dvb.frontend,
680                                    &dev->core->i2c_adap, 0x61,
681                                    TUNER_THOMSON_DTT761X);
682                 }
683                 }
684                 break;
685         case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
686                 dev->ts_gen_cntrl = 0x08;
687                 {
688                 /* Do a hardware reset of chip before using it. */
689                 struct cx88_core *core = dev->core;
690
691                 cx_clear(MO_GP0_IO, 1);
692                 mdelay(100);
693                 cx_set(MO_GP0_IO, 1);
694                 mdelay(200);
695                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
696                                                &fusionhdtv_5_gold,
697                                                &dev->core->i2c_adap);
698                 if (dev->dvb.frontend != NULL) {
699                         dvb_attach(simple_tuner_attach, dev->dvb.frontend,
700                                    &dev->core->i2c_adap, 0x61,
701                                    TUNER_LG_TDVS_H06XF);
702                         dvb_attach(tda9887_attach, dev->dvb.frontend,
703                                    &dev->core->i2c_adap, 0x43);
704                 }
705                 }
706                 break;
707         case CX88_BOARD_PCHDTV_HD5500:
708                 dev->ts_gen_cntrl = 0x08;
709                 {
710                 /* Do a hardware reset of chip before using it. */
711                 struct cx88_core *core = dev->core;
712
713                 cx_clear(MO_GP0_IO, 1);
714                 mdelay(100);
715                 cx_set(MO_GP0_IO, 1);
716                 mdelay(200);
717                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
718                                                &pchdtv_hd5500,
719                                                &dev->core->i2c_adap);
720                 if (dev->dvb.frontend != NULL) {
721                         dvb_attach(simple_tuner_attach, dev->dvb.frontend,
722                                    &dev->core->i2c_adap, 0x61,
723                                    TUNER_LG_TDVS_H06XF);
724                         dvb_attach(tda9887_attach, dev->dvb.frontend,
725                                    &dev->core->i2c_adap, 0x43);
726                 }
727                 }
728                 break;
729         case CX88_BOARD_ATI_HDTVWONDER:
730                 dev->dvb.frontend = dvb_attach(nxt200x_attach,
731                                                &ati_hdtvwonder,
732                                                &dev->core->i2c_adap);
733                 if (dev->dvb.frontend != NULL) {
734                         dvb_attach(simple_tuner_attach, dev->dvb.frontend,
735                                    &dev->core->i2c_adap, 0x61,
736                                    TUNER_PHILIPS_TUV1236D);
737                 }
738                 break;
739         case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
740         case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
741                 dev->dvb.frontend = dvb_attach(cx24123_attach,
742                                                &hauppauge_novas_config,
743                                                &dev->core->i2c_adap);
744                 if (dev->dvb.frontend) {
745                         dvb_attach(isl6421_attach, dev->dvb.frontend,
746                                    &dev->core->i2c_adap, 0x08, 0x00, 0x00);
747                 }
748                 break;
749         case CX88_BOARD_KWORLD_DVBS_100:
750                 dev->dvb.frontend = dvb_attach(cx24123_attach,
751                                                &kworld_dvbs_100_config,
752                                                &dev->core->i2c_adap);
753                 if (dev->dvb.frontend) {
754                         dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
755                         dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
756                 }
757                 break;
758         case CX88_BOARD_GENIATECH_DVBS:
759                 dev->dvb.frontend = dvb_attach(cx24123_attach,
760                                                &geniatech_dvbs_config,
761                                                &dev->core->i2c_adap);
762                 if (dev->dvb.frontend) {
763                         dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
764                         dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
765                 }
766                 break;
767         case CX88_BOARD_PINNACLE_PCTV_HD_800i:
768                 dev->dvb.frontend = dvb_attach(s5h1409_attach,
769                                                &pinnacle_pctv_hd_800i_config,
770                                                &dev->core->i2c_adap);
771                 if (dev->dvb.frontend != NULL) {
772                         /* tuner_config.video_dev must point to
773                          * i2c_adap.algo_data
774                          */
775                         pinnacle_pctv_hd_800i_tuner_config.priv =
776                                                 dev->core->i2c_adap.algo_data;
777                         dvb_attach(xc5000_attach, dev->dvb.frontend,
778                                    &dev->core->i2c_adap,
779                                    &pinnacle_pctv_hd_800i_tuner_config);
780                 }
781                 break;
782         case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
783                 dev->dvb.frontend = dvb_attach(s5h1409_attach,
784                                                 &dvico_hdtv5_pci_nano_config,
785                                                 &dev->core->i2c_adap);
786                 if (dev->dvb.frontend != NULL) {
787                         struct dvb_frontend *fe;
788                         struct xc2028_config cfg = {
789                                 .i2c_adap  = &dev->core->i2c_adap,
790                                 .i2c_addr  = 0x61,
791                                 .callback  = cx88_pci_nano_callback,
792                         };
793                         static struct xc2028_ctrl ctl = {
794                                 .fname       = "xc3028-v27.fw",
795                                 .max_len     = 64,
796                                 .scode_table = OREN538,
797                         };
798
799                         fe = dvb_attach(xc2028_attach,
800                                         dev->dvb.frontend, &cfg);
801                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
802                                 fe->ops.tuner_ops.set_config(fe, &ctl);
803                 }
804                 break;
805          case CX88_BOARD_PINNACLE_HYBRID_PCTV:
806                 dev->dvb.frontend = dvb_attach(zl10353_attach,
807                                                &cx88_geniatech_x8000_mt,
808                                                &dev->core->i2c_adap);
809                 if (attach_xc3028(0x61, dev) < 0)
810                         return -EINVAL;
811                 break;
812          case CX88_BOARD_GENIATECH_X8000_MT:
813                dev->ts_gen_cntrl = 0x00;
814
815                 dev->dvb.frontend = dvb_attach(zl10353_attach,
816                                                &cx88_geniatech_x8000_mt,
817                                                &dev->core->i2c_adap);
818                 if (attach_xc3028(0x61, dev) < 0)
819                         return -EINVAL;
820                 break;
821         default:
822                 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
823                        dev->core->name);
824                 break;
825         }
826         if (NULL == dev->dvb.frontend) {
827                 printk(KERN_ERR
828                        "%s/2: frontend initialization failed\n",
829                        dev->core->name);
830                 return -EINVAL;
831         }
832
833         /* Ensure all frontends negotiate bus access */
834         dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
835
836         /* Put the analog decoder in standby to keep it quiet */
837         cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
838
839         /* register everything */
840         return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
841 }
842
843 /* ----------------------------------------------------------- */
844
845 /* CX8802 MPEG -> mini driver - We have been given the hardware */
846 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
847 {
848         struct cx88_core *core = drv->core;
849         int err = 0;
850         dprintk( 1, "%s\n", __FUNCTION__);
851
852         switch (core->boardnr) {
853         case CX88_BOARD_HAUPPAUGE_HVR1300:
854                 /* We arrive here with either the cx23416 or the cx22702
855                  * on the bus. Take the bus from the cx23416 and enable the
856                  * cx22702 demod
857                  */
858                 cx_set(MO_GP0_IO,   0x00000080); /* cx22702 out of reset and enable */
859                 cx_clear(MO_GP0_IO, 0x00000004);
860                 udelay(1000);
861                 break;
862         default:
863                 err = -ENODEV;
864         }
865         return err;
866 }
867
868 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
869 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
870 {
871         struct cx88_core *core = drv->core;
872         int err = 0;
873         dprintk( 1, "%s\n", __FUNCTION__);
874
875         switch (core->boardnr) {
876         case CX88_BOARD_HAUPPAUGE_HVR1300:
877                 /* Do Nothing, leave the cx22702 on the bus. */
878                 break;
879         default:
880                 err = -ENODEV;
881         }
882         return err;
883 }
884
885 static int cx8802_dvb_probe(struct cx8802_driver *drv)
886 {
887         struct cx88_core *core = drv->core;
888         struct cx8802_dev *dev = drv->core->dvbdev;
889         int err;
890
891         dprintk( 1, "%s\n", __FUNCTION__);
892         dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
893                 core->boardnr,
894                 core->name,
895                 core->pci_bus,
896                 core->pci_slot);
897
898         err = -ENODEV;
899         if (!(core->board.mpeg & CX88_MPEG_DVB))
900                 goto fail_core;
901
902         /* If vp3054 isn't enabled, a stub will just return 0 */
903         err = vp3054_i2c_probe(dev);
904         if (0 != err)
905                 goto fail_core;
906
907         /* dvb stuff */
908         printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
909         videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
910                             &dev->pci->dev, &dev->slock,
911                             V4L2_BUF_TYPE_VIDEO_CAPTURE,
912                             V4L2_FIELD_TOP,
913                             sizeof(struct cx88_buffer),
914                             dev);
915         err = dvb_register(dev);
916         if (err != 0)
917                 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
918                        core->name, err);
919
920  fail_core:
921         return err;
922 }
923
924 static int cx8802_dvb_remove(struct cx8802_driver *drv)
925 {
926         struct cx8802_dev *dev = drv->core->dvbdev;
927
928         /* dvb */
929         videobuf_dvb_unregister(&dev->dvb);
930
931         vp3054_i2c_remove(dev);
932
933         return 0;
934 }
935
936 static struct cx8802_driver cx8802_dvb_driver = {
937         .type_id        = CX88_MPEG_DVB,
938         .hw_access      = CX8802_DRVCTL_SHARED,
939         .probe          = cx8802_dvb_probe,
940         .remove         = cx8802_dvb_remove,
941         .advise_acquire = cx8802_dvb_advise_acquire,
942         .advise_release = cx8802_dvb_advise_release,
943 };
944
945 static int dvb_init(void)
946 {
947         printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
948                (CX88_VERSION_CODE >> 16) & 0xff,
949                (CX88_VERSION_CODE >>  8) & 0xff,
950                CX88_VERSION_CODE & 0xff);
951 #ifdef SNAPSHOT
952         printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
953                SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
954 #endif
955         return cx8802_register_driver(&cx8802_dvb_driver);
956 }
957
958 static void dvb_fini(void)
959 {
960         cx8802_unregister_driver(&cx8802_dvb_driver);
961 }
962
963 module_init(dvb_init);
964 module_exit(dvb_fini);
965
966 /*
967  * Local variables:
968  * c-basic-offset: 8
969  * compile-command: "make DVB=1"
970  * End:
971  */