V4L/DVB (7410): use tuner-simple for Thomson FE6600 digital tuning support
[linux-2.6.git] / drivers / media / video / cx88 / cx88-dvb.c
1 /*
2  *
3  * device driver for Conexant 2388x based TV cards
4  * MPEG Transport Stream (DVB) routines
5  *
6  * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7  * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; either version 2 of the License, or
12  *  (at your option) any later version.
13  *
14  *  This program is distributed in the hope that it will be useful,
15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *  GNU General Public License for more details.
18  *
19  *  You should have received a copy of the GNU General Public License
20  *  along with this program; if not, write to the Free Software
21  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #include "mt352.h"
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
39 #include "zl10353.h"
40 #include "cx22702.h"
41 #include "or51132.h"
42 #include "lgdt330x.h"
43 #include "s5h1409.h"
44 #include "xc5000.h"
45 #include "nxt200x.h"
46 #include "cx24123.h"
47 #include "isl6421.h"
48 #include "tuner-xc2028.h"
49 #include "tuner-xc2028-types.h"
50 #include "tuner-simple.h"
51
52 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
53 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
54 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
55 MODULE_LICENSE("GPL");
56
57 static unsigned int debug;
58 module_param(debug, int, 0644);
59 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
60
61 #define dprintk(level,fmt, arg...)      if (debug >= level) \
62         printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
63
64 /* ------------------------------------------------------------------ */
65
66 static int dvb_buf_setup(struct videobuf_queue *q,
67                          unsigned int *count, unsigned int *size)
68 {
69         struct cx8802_dev *dev = q->priv_data;
70
71         dev->ts_packet_size  = 188 * 4;
72         dev->ts_packet_count = 32;
73
74         *size  = dev->ts_packet_size * dev->ts_packet_count;
75         *count = 32;
76         return 0;
77 }
78
79 static int dvb_buf_prepare(struct videobuf_queue *q,
80                            struct videobuf_buffer *vb, enum v4l2_field field)
81 {
82         struct cx8802_dev *dev = q->priv_data;
83         return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
84 }
85
86 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
87 {
88         struct cx8802_dev *dev = q->priv_data;
89         cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
90 }
91
92 static void dvb_buf_release(struct videobuf_queue *q,
93                             struct videobuf_buffer *vb)
94 {
95         cx88_free_buffer(q, (struct cx88_buffer*)vb);
96 }
97
98 static struct videobuf_queue_ops dvb_qops = {
99         .buf_setup    = dvb_buf_setup,
100         .buf_prepare  = dvb_buf_prepare,
101         .buf_queue    = dvb_buf_queue,
102         .buf_release  = dvb_buf_release,
103 };
104
105 /* ------------------------------------------------------------------ */
106
107 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
108 {
109         struct cx8802_dev *dev= fe->dvb->priv;
110         struct cx8802_driver *drv = NULL;
111         int ret = 0;
112
113         drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
114         if (drv) {
115                 if (acquire)
116                         ret = drv->request_acquire(drv);
117                 else
118                         ret = drv->request_release(drv);
119         }
120
121         return ret;
122 }
123
124 /* ------------------------------------------------------------------ */
125
126 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
127 {
128         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x39 };
129         static u8 reset []         = { RESET,      0x80 };
130         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
131         static u8 agc_cfg []       = { AGC_TARGET, 0x24, 0x20 };
132         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
133         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
134
135         mt352_write(fe, clock_config,   sizeof(clock_config));
136         udelay(200);
137         mt352_write(fe, reset,          sizeof(reset));
138         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
139
140         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
141         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
142         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
143         return 0;
144 }
145
146 static int dvico_dual_demod_init(struct dvb_frontend *fe)
147 {
148         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x38 };
149         static u8 reset []         = { RESET,      0x80 };
150         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
151         static u8 agc_cfg []       = { AGC_TARGET, 0x28, 0x20 };
152         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
153         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
154
155         mt352_write(fe, clock_config,   sizeof(clock_config));
156         udelay(200);
157         mt352_write(fe, reset,          sizeof(reset));
158         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
159
160         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
161         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
162         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
163
164         return 0;
165 }
166
167 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
168 {
169         static u8 clock_config []  = { 0x89, 0x38, 0x39 };
170         static u8 reset []         = { 0x50, 0x80 };
171         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
172         static u8 agc_cfg []       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
173                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
174         static u8 dntv_extra[]     = { 0xB5, 0x7A };
175         static u8 capt_range_cfg[] = { 0x75, 0x32 };
176
177         mt352_write(fe, clock_config,   sizeof(clock_config));
178         udelay(2000);
179         mt352_write(fe, reset,          sizeof(reset));
180         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
181
182         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
183         udelay(2000);
184         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
185         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
186
187         return 0;
188 }
189
190 static struct mt352_config dvico_fusionhdtv = {
191         .demod_address = 0x0f,
192         .demod_init    = dvico_fusionhdtv_demod_init,
193 };
194
195 static struct mt352_config dntv_live_dvbt_config = {
196         .demod_address = 0x0f,
197         .demod_init    = dntv_live_dvbt_demod_init,
198 };
199
200 static struct mt352_config dvico_fusionhdtv_dual = {
201         .demod_address = 0x0f,
202         .demod_init    = dvico_dual_demod_init,
203 };
204
205 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
206 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
207 {
208         static u8 clock_config []  = { 0x89, 0x38, 0x38 };
209         static u8 reset []         = { 0x50, 0x80 };
210         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
211         static u8 agc_cfg []       = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
212                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
213         static u8 dntv_extra[]     = { 0xB5, 0x7A };
214         static u8 capt_range_cfg[] = { 0x75, 0x32 };
215
216         mt352_write(fe, clock_config,   sizeof(clock_config));
217         udelay(2000);
218         mt352_write(fe, reset,          sizeof(reset));
219         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
220
221         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
222         udelay(2000);
223         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
224         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
225
226         return 0;
227 }
228
229 static struct mt352_config dntv_live_dvbt_pro_config = {
230         .demod_address = 0x0f,
231         .no_tuner      = 1,
232         .demod_init    = dntv_live_dvbt_pro_demod_init,
233 };
234 #endif
235
236 static struct zl10353_config dvico_fusionhdtv_hybrid = {
237         .demod_address = 0x0f,
238         .no_tuner      = 1,
239 };
240
241 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
242         .demod_address = 0x0f,
243         .if2           = 45600,
244         .no_tuner      = 1,
245 };
246
247 static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
248         .demod_address = 0x0f,
249         .if2 = 4560,
250         .no_tuner = 1,
251         .demod_init = dvico_fusionhdtv_demod_init,
252 };
253
254 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
255         .demod_address = 0x0f,
256 };
257
258 static struct cx22702_config connexant_refboard_config = {
259         .demod_address = 0x43,
260         .output_mode   = CX22702_SERIAL_OUTPUT,
261 };
262
263 static struct cx22702_config hauppauge_hvr_config = {
264         .demod_address = 0x63,
265         .output_mode   = CX22702_SERIAL_OUTPUT,
266 };
267
268 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
269 {
270         struct cx8802_dev *dev= fe->dvb->priv;
271         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
272         return 0;
273 }
274
275 static struct or51132_config pchdtv_hd3000 = {
276         .demod_address = 0x15,
277         .set_ts_params = or51132_set_ts_param,
278 };
279
280 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
281 {
282         struct cx8802_dev *dev= fe->dvb->priv;
283         struct cx88_core *core = dev->core;
284
285         dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
286         if (index == 0)
287                 cx_clear(MO_GP0_IO, 8);
288         else
289                 cx_set(MO_GP0_IO, 8);
290         return 0;
291 }
292
293 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
294 {
295         struct cx8802_dev *dev= fe->dvb->priv;
296         if (is_punctured)
297                 dev->ts_gen_cntrl |= 0x04;
298         else
299                 dev->ts_gen_cntrl &= ~0x04;
300         return 0;
301 }
302
303 static struct lgdt330x_config fusionhdtv_3_gold = {
304         .demod_address = 0x0e,
305         .demod_chip    = LGDT3302,
306         .serial_mpeg   = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
307         .set_ts_params = lgdt330x_set_ts_param,
308 };
309
310 static struct lgdt330x_config fusionhdtv_5_gold = {
311         .demod_address = 0x0e,
312         .demod_chip    = LGDT3303,
313         .serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
314         .set_ts_params = lgdt330x_set_ts_param,
315 };
316
317 static struct lgdt330x_config pchdtv_hd5500 = {
318         .demod_address = 0x59,
319         .demod_chip    = LGDT3303,
320         .serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
321         .set_ts_params = lgdt330x_set_ts_param,
322 };
323
324 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
325 {
326         struct cx8802_dev *dev= fe->dvb->priv;
327         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
328         return 0;
329 }
330
331 static struct nxt200x_config ati_hdtvwonder = {
332         .demod_address = 0x0a,
333         .set_ts_params = nxt200x_set_ts_param,
334 };
335
336 static int cx24123_set_ts_param(struct dvb_frontend* fe,
337         int is_punctured)
338 {
339         struct cx8802_dev *dev= fe->dvb->priv;
340         dev->ts_gen_cntrl = 0x02;
341         return 0;
342 }
343
344 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
345                                        fe_sec_voltage_t voltage)
346 {
347         struct cx8802_dev *dev= fe->dvb->priv;
348         struct cx88_core *core = dev->core;
349
350         if (voltage == SEC_VOLTAGE_OFF)
351                 cx_write(MO_GP0_IO, 0x000006fb);
352         else
353                 cx_write(MO_GP0_IO, 0x000006f9);
354
355         if (core->prev_set_voltage)
356                 return core->prev_set_voltage(fe, voltage);
357         return 0;
358 }
359
360 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
361                                       fe_sec_voltage_t voltage)
362 {
363         struct cx8802_dev *dev= fe->dvb->priv;
364         struct cx88_core *core = dev->core;
365
366         if (voltage == SEC_VOLTAGE_OFF) {
367                 dprintk(1,"LNB Voltage OFF\n");
368                 cx_write(MO_GP0_IO, 0x0000efff);
369         }
370
371         if (core->prev_set_voltage)
372                 return core->prev_set_voltage(fe, voltage);
373         return 0;
374 }
375
376 static int cx88_pci_nano_callback(void *ptr, int command, int arg)
377 {
378         struct cx88_core *core = ptr;
379
380         switch (command) {
381         case XC2028_TUNER_RESET:
382                 /* Send the tuner in then out of reset */
383                 dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __FUNCTION__, arg);
384
385                 switch (core->boardnr) {
386                 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
387                         /* GPIO-4 xc3028 tuner */
388
389                         cx_set(MO_GP0_IO, 0x00001000);
390                         cx_clear(MO_GP0_IO, 0x00000010);
391                         msleep(100);
392                         cx_set(MO_GP0_IO, 0x00000010);
393                         msleep(100);
394                         break;
395                 }
396
397                 break;
398         case XC2028_RESET_CLK:
399                 dprintk(1, "%s: XC2028_RESET_CLK %d\n", __FUNCTION__, arg);
400                 break;
401         default:
402                 dprintk(1, "%s: unknown command %d, arg %d\n", __FUNCTION__,
403                         command, arg);
404                 return -EINVAL;
405         }
406
407         return 0;
408 }
409
410 static struct cx24123_config geniatech_dvbs_config = {
411         .demod_address = 0x55,
412         .set_ts_params = cx24123_set_ts_param,
413 };
414
415 static struct cx24123_config hauppauge_novas_config = {
416         .demod_address = 0x55,
417         .set_ts_params = cx24123_set_ts_param,
418 };
419
420 static struct cx24123_config kworld_dvbs_100_config = {
421         .demod_address = 0x15,
422         .set_ts_params = cx24123_set_ts_param,
423         .lnb_polarity  = 1,
424 };
425
426 static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
427         .demod_address = 0x32 >> 1,
428         .output_mode   = S5H1409_PARALLEL_OUTPUT,
429         .gpio          = S5H1409_GPIO_ON,
430         .qam_if        = 44000,
431         .inversion     = S5H1409_INVERSION_OFF,
432         .status_mode   = S5H1409_DEMODLOCKING,
433         .mpeg_timing   = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
434 };
435
436 static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
437         .demod_address = 0x32 >> 1,
438         .output_mode   = S5H1409_SERIAL_OUTPUT,
439         .gpio          = S5H1409_GPIO_OFF,
440         .inversion     = S5H1409_INVERSION_OFF,
441         .status_mode   = S5H1409_DEMODLOCKING,
442         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
443 };
444
445 static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
446         .i2c_address    = 0x64,
447         .if_khz         = 5380,
448         .tuner_callback = cx88_tuner_callback,
449 };
450
451 static struct zl10353_config cx88_geniatech_x8000_mt = {
452        .demod_address = (0x1e >> 1),
453        .no_tuner = 1,
454 };
455
456 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
457 {
458         struct dvb_frontend *fe;
459         struct xc2028_config cfg = {
460                 .i2c_adap  = &dev->core->i2c_adap,
461                 .i2c_addr  = addr,
462         };
463
464         if (!dev->dvb.frontend) {
465                 printk(KERN_ERR "%s/2: dvb frontend not attached. "
466                                 "Can't attach xc3028\n",
467                        dev->core->name);
468                 return -EINVAL;
469         }
470
471         fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
472         if (!fe) {
473                 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
474                        dev->core->name);
475                 dvb_frontend_detach(dev->dvb.frontend);
476                 dvb_unregister_frontend(dev->dvb.frontend);
477                 dev->dvb.frontend = NULL;
478                 return -EINVAL;
479         }
480
481         printk(KERN_INFO "%s/2: xc3028 attached\n",
482                dev->core->name);
483
484         return 0;
485 }
486
487 static int dvb_register(struct cx8802_dev *dev)
488 {
489         /* init struct videobuf_dvb */
490         dev->dvb.name = dev->core->name;
491         dev->ts_gen_cntrl = 0x0c;
492
493         /* init frontend */
494         switch (dev->core->boardnr) {
495         case CX88_BOARD_HAUPPAUGE_DVB_T1:
496                 dev->dvb.frontend = dvb_attach(cx22702_attach,
497                                                &connexant_refboard_config,
498                                                &dev->core->i2c_adap);
499                 if (dev->dvb.frontend != NULL) {
500                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
501                                    &dev->core->i2c_adap,
502                                    DVB_PLL_THOMSON_DTT759X);
503                 }
504                 break;
505         case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
506         case CX88_BOARD_CONEXANT_DVB_T1:
507         case CX88_BOARD_KWORLD_DVB_T_CX22702:
508         case CX88_BOARD_WINFAST_DTV1000:
509                 dev->dvb.frontend = dvb_attach(cx22702_attach,
510                                                &connexant_refboard_config,
511                                                &dev->core->i2c_adap);
512                 if (dev->dvb.frontend != NULL) {
513                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
514                                    &dev->core->i2c_adap,
515                                    DVB_PLL_THOMSON_DTT7579);
516                 }
517                 break;
518         case CX88_BOARD_WINFAST_DTV2000H:
519         case CX88_BOARD_HAUPPAUGE_HVR1100:
520         case CX88_BOARD_HAUPPAUGE_HVR1100LP:
521         case CX88_BOARD_HAUPPAUGE_HVR1300:
522         case CX88_BOARD_HAUPPAUGE_HVR3000:
523                 dev->dvb.frontend = dvb_attach(cx22702_attach,
524                                                &hauppauge_hvr_config,
525                                                &dev->core->i2c_adap);
526                 if (dev->dvb.frontend != NULL) {
527                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
528                                    &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
529                 }
530                 break;
531         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
532                 dev->dvb.frontend = dvb_attach(mt352_attach,
533                                                &dvico_fusionhdtv,
534                                                &dev->core->i2c_adap);
535                 if (dev->dvb.frontend != NULL) {
536                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
537                                    NULL, DVB_PLL_THOMSON_DTT7579);
538                         break;
539                 }
540                 /* ZL10353 replaces MT352 on later cards */
541                 dev->dvb.frontend = dvb_attach(zl10353_attach,
542                                                &dvico_fusionhdtv_plus_v1_1,
543                                                &dev->core->i2c_adap);
544                 if (dev->dvb.frontend != NULL) {
545                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
546                                    NULL, DVB_PLL_THOMSON_DTT7579);
547                 }
548                 break;
549         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
550                 /* The tin box says DEE1601, but it seems to be DTT7579
551                  * compatible, with a slightly different MT352 AGC gain. */
552                 dev->dvb.frontend = dvb_attach(mt352_attach,
553                                                &dvico_fusionhdtv_dual,
554                                                &dev->core->i2c_adap);
555                 if (dev->dvb.frontend != NULL) {
556                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
557                                    NULL, DVB_PLL_THOMSON_DTT7579);
558                         break;
559                 }
560                 /* ZL10353 replaces MT352 on later cards */
561                 dev->dvb.frontend = dvb_attach(zl10353_attach,
562                                                &dvico_fusionhdtv_plus_v1_1,
563                                                &dev->core->i2c_adap);
564                 if (dev->dvb.frontend != NULL) {
565                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
566                                    NULL, DVB_PLL_THOMSON_DTT7579);
567                 }
568                 break;
569         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
570                 dev->dvb.frontend = dvb_attach(mt352_attach,
571                                                &dvico_fusionhdtv,
572                                                &dev->core->i2c_adap);
573                 if (dev->dvb.frontend != NULL) {
574                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
575                                    NULL, DVB_PLL_LG_Z201);
576                 }
577                 break;
578         case CX88_BOARD_KWORLD_DVB_T:
579         case CX88_BOARD_DNTV_LIVE_DVB_T:
580         case CX88_BOARD_ADSTECH_DVB_T_PCI:
581                 dev->dvb.frontend = dvb_attach(mt352_attach,
582                                                &dntv_live_dvbt_config,
583                                                &dev->core->i2c_adap);
584                 if (dev->dvb.frontend != NULL) {
585                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
586                                    NULL, DVB_PLL_UNKNOWN_1);
587                 }
588                 break;
589         case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
590 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
591                 /* MT352 is on a secondary I2C bus made from some GPIO lines */
592                 dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
593                                                &dev->vp3054->adap);
594                 if (dev->dvb.frontend != NULL) {
595                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
596                                    &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
597                 }
598 #else
599                 printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
600 #endif
601                 break;
602         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
603                 dev->dvb.frontend = dvb_attach(zl10353_attach,
604                                                &dvico_fusionhdtv_hybrid,
605                                                &dev->core->i2c_adap);
606                 if (dev->dvb.frontend != NULL) {
607                         dvb_attach(simple_tuner_attach, dev->dvb.frontend,
608                                    &dev->core->i2c_adap, 0x61,
609                                    TUNER_THOMSON_FE6600);
610                 }
611                 break;
612         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
613                 dev->dvb.frontend = dvb_attach(zl10353_attach,
614                                                &dvico_fusionhdtv_xc3028,
615                                                &dev->core->i2c_adap);
616                 if (dev->dvb.frontend == NULL)
617                         dev->dvb.frontend = dvb_attach(mt352_attach,
618                                                 &dvico_fusionhdtv_mt352_xc3028,
619                                                 &dev->core->i2c_adap);
620                 /*
621                  * On this board, the demod provides the I2C bus pullup.
622                  * We must not permit gate_ctrl to be performed, or
623                  * the xc3028 cannot communicate on the bus.
624                  */
625                 if (dev->dvb.frontend)
626                         dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
627                 if (attach_xc3028(0x61, dev) < 0)
628                         return -EINVAL;
629                 break;
630         case CX88_BOARD_PCHDTV_HD3000:
631                 dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
632                                                &dev->core->i2c_adap);
633                 if (dev->dvb.frontend != NULL) {
634                         dvb_attach(simple_tuner_attach, dev->dvb.frontend,
635                                    &dev->core->i2c_adap, 0x61,
636                                    TUNER_THOMSON_DTT761X);
637                 }
638                 break;
639         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
640                 dev->ts_gen_cntrl = 0x08;
641                 {
642                 /* Do a hardware reset of chip before using it. */
643                 struct cx88_core *core = dev->core;
644
645                 cx_clear(MO_GP0_IO, 1);
646                 mdelay(100);
647                 cx_set(MO_GP0_IO, 1);
648                 mdelay(200);
649
650                 /* Select RF connector callback */
651                 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
652                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
653                                                &fusionhdtv_3_gold,
654                                                &dev->core->i2c_adap);
655                 if (dev->dvb.frontend != NULL) {
656                         dvb_attach(simple_tuner_attach, dev->dvb.frontend,
657                                    &dev->core->i2c_adap, 0x61,
658                                    TUNER_MICROTUNE_4042FI5);
659                 }
660                 }
661                 break;
662         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
663                 dev->ts_gen_cntrl = 0x08;
664                 {
665                 /* Do a hardware reset of chip before using it. */
666                 struct cx88_core *core = dev->core;
667
668                 cx_clear(MO_GP0_IO, 1);
669                 mdelay(100);
670                 cx_set(MO_GP0_IO, 9);
671                 mdelay(200);
672                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
673                                                &fusionhdtv_3_gold,
674                                                &dev->core->i2c_adap);
675                 if (dev->dvb.frontend != NULL) {
676                         dvb_attach(simple_tuner_attach, dev->dvb.frontend,
677                                    &dev->core->i2c_adap, 0x61,
678                                    TUNER_THOMSON_DTT761X);
679                 }
680                 }
681                 break;
682         case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
683                 dev->ts_gen_cntrl = 0x08;
684                 {
685                 /* Do a hardware reset of chip before using it. */
686                 struct cx88_core *core = dev->core;
687
688                 cx_clear(MO_GP0_IO, 1);
689                 mdelay(100);
690                 cx_set(MO_GP0_IO, 1);
691                 mdelay(200);
692                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
693                                                &fusionhdtv_5_gold,
694                                                &dev->core->i2c_adap);
695                 if (dev->dvb.frontend != NULL) {
696                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
697                                    &dev->core->i2c_adap,
698                                    DVB_PLL_LG_TDVS_H06XF);
699                 }
700                 }
701                 break;
702         case CX88_BOARD_PCHDTV_HD5500:
703                 dev->ts_gen_cntrl = 0x08;
704                 {
705                 /* Do a hardware reset of chip before using it. */
706                 struct cx88_core *core = dev->core;
707
708                 cx_clear(MO_GP0_IO, 1);
709                 mdelay(100);
710                 cx_set(MO_GP0_IO, 1);
711                 mdelay(200);
712                 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
713                                                &pchdtv_hd5500,
714                                                &dev->core->i2c_adap);
715                 if (dev->dvb.frontend != NULL) {
716                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
717                                    &dev->core->i2c_adap,
718                                    DVB_PLL_LG_TDVS_H06XF);
719                 }
720                 }
721                 break;
722         case CX88_BOARD_ATI_HDTVWONDER:
723                 dev->dvb.frontend = dvb_attach(nxt200x_attach,
724                                                &ati_hdtvwonder,
725                                                &dev->core->i2c_adap);
726                 if (dev->dvb.frontend != NULL) {
727                         dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
728                                    NULL, DVB_PLL_TUV1236D);
729                 }
730                 break;
731         case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
732         case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
733                 dev->dvb.frontend = dvb_attach(cx24123_attach,
734                                                &hauppauge_novas_config,
735                                                &dev->core->i2c_adap);
736                 if (dev->dvb.frontend) {
737                         dvb_attach(isl6421_attach, dev->dvb.frontend,
738                                    &dev->core->i2c_adap, 0x08, 0x00, 0x00);
739                 }
740                 break;
741         case CX88_BOARD_KWORLD_DVBS_100:
742                 dev->dvb.frontend = dvb_attach(cx24123_attach,
743                                                &kworld_dvbs_100_config,
744                                                &dev->core->i2c_adap);
745                 if (dev->dvb.frontend) {
746                         dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
747                         dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
748                 }
749                 break;
750         case CX88_BOARD_GENIATECH_DVBS:
751                 dev->dvb.frontend = dvb_attach(cx24123_attach,
752                                                &geniatech_dvbs_config,
753                                                &dev->core->i2c_adap);
754                 if (dev->dvb.frontend) {
755                         dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
756                         dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
757                 }
758                 break;
759         case CX88_BOARD_PINNACLE_PCTV_HD_800i:
760                 dev->dvb.frontend = dvb_attach(s5h1409_attach,
761                                                &pinnacle_pctv_hd_800i_config,
762                                                &dev->core->i2c_adap);
763                 if (dev->dvb.frontend != NULL) {
764                         /* tuner_config.video_dev must point to
765                          * i2c_adap.algo_data
766                          */
767                         pinnacle_pctv_hd_800i_tuner_config.priv =
768                                                 dev->core->i2c_adap.algo_data;
769                         dvb_attach(xc5000_attach, dev->dvb.frontend,
770                                    &dev->core->i2c_adap,
771                                    &pinnacle_pctv_hd_800i_tuner_config);
772                 }
773                 break;
774         case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
775                 dev->dvb.frontend = dvb_attach(s5h1409_attach,
776                                                 &dvico_hdtv5_pci_nano_config,
777                                                 &dev->core->i2c_adap);
778                 if (dev->dvb.frontend != NULL) {
779                         struct dvb_frontend *fe;
780                         struct xc2028_config cfg = {
781                                 .i2c_adap  = &dev->core->i2c_adap,
782                                 .i2c_addr  = 0x61,
783                                 .callback  = cx88_pci_nano_callback,
784                         };
785                         static struct xc2028_ctrl ctl = {
786                                 .fname       = "xc3028-v27.fw",
787                                 .max_len     = 64,
788                                 .scode_table = OREN538,
789                         };
790
791                         fe = dvb_attach(xc2028_attach,
792                                         dev->dvb.frontend, &cfg);
793                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
794                                 fe->ops.tuner_ops.set_config(fe, &ctl);
795                 }
796                 break;
797          case CX88_BOARD_PINNACLE_HYBRID_PCTV:
798                 dev->dvb.frontend = dvb_attach(zl10353_attach,
799                                                &cx88_geniatech_x8000_mt,
800                                                &dev->core->i2c_adap);
801                 if (attach_xc3028(0x61, dev) < 0)
802                         return -EINVAL;
803                 break;
804          case CX88_BOARD_GENIATECH_X8000_MT:
805                dev->ts_gen_cntrl = 0x00;
806
807                 dev->dvb.frontend = dvb_attach(zl10353_attach,
808                                                &cx88_geniatech_x8000_mt,
809                                                &dev->core->i2c_adap);
810                 if (attach_xc3028(0x61, dev) < 0)
811                         return -EINVAL;
812                 break;
813         default:
814                 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
815                        dev->core->name);
816                 break;
817         }
818         if (NULL == dev->dvb.frontend) {
819                 printk(KERN_ERR
820                        "%s/2: frontend initialization failed\n",
821                        dev->core->name);
822                 return -EINVAL;
823         }
824
825         /* Ensure all frontends negotiate bus access */
826         dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
827
828         /* Put the analog decoder in standby to keep it quiet */
829         cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
830
831         /* register everything */
832         return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
833 }
834
835 /* ----------------------------------------------------------- */
836
837 /* CX8802 MPEG -> mini driver - We have been given the hardware */
838 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
839 {
840         struct cx88_core *core = drv->core;
841         int err = 0;
842         dprintk( 1, "%s\n", __FUNCTION__);
843
844         switch (core->boardnr) {
845         case CX88_BOARD_HAUPPAUGE_HVR1300:
846                 /* We arrive here with either the cx23416 or the cx22702
847                  * on the bus. Take the bus from the cx23416 and enable the
848                  * cx22702 demod
849                  */
850                 cx_set(MO_GP0_IO,   0x00000080); /* cx22702 out of reset and enable */
851                 cx_clear(MO_GP0_IO, 0x00000004);
852                 udelay(1000);
853                 break;
854         default:
855                 err = -ENODEV;
856         }
857         return err;
858 }
859
860 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
861 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
862 {
863         struct cx88_core *core = drv->core;
864         int err = 0;
865         dprintk( 1, "%s\n", __FUNCTION__);
866
867         switch (core->boardnr) {
868         case CX88_BOARD_HAUPPAUGE_HVR1300:
869                 /* Do Nothing, leave the cx22702 on the bus. */
870                 break;
871         default:
872                 err = -ENODEV;
873         }
874         return err;
875 }
876
877 static int cx8802_dvb_probe(struct cx8802_driver *drv)
878 {
879         struct cx88_core *core = drv->core;
880         struct cx8802_dev *dev = drv->core->dvbdev;
881         int err;
882
883         dprintk( 1, "%s\n", __FUNCTION__);
884         dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
885                 core->boardnr,
886                 core->name,
887                 core->pci_bus,
888                 core->pci_slot);
889
890         err = -ENODEV;
891         if (!(core->board.mpeg & CX88_MPEG_DVB))
892                 goto fail_core;
893
894         /* If vp3054 isn't enabled, a stub will just return 0 */
895         err = vp3054_i2c_probe(dev);
896         if (0 != err)
897                 goto fail_core;
898
899         /* dvb stuff */
900         printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
901         videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
902                             &dev->pci->dev, &dev->slock,
903                             V4L2_BUF_TYPE_VIDEO_CAPTURE,
904                             V4L2_FIELD_TOP,
905                             sizeof(struct cx88_buffer),
906                             dev);
907         err = dvb_register(dev);
908         if (err != 0)
909                 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
910                        core->name, err);
911
912  fail_core:
913         return err;
914 }
915
916 static int cx8802_dvb_remove(struct cx8802_driver *drv)
917 {
918         struct cx8802_dev *dev = drv->core->dvbdev;
919
920         /* dvb */
921         videobuf_dvb_unregister(&dev->dvb);
922
923         vp3054_i2c_remove(dev);
924
925         return 0;
926 }
927
928 static struct cx8802_driver cx8802_dvb_driver = {
929         .type_id        = CX88_MPEG_DVB,
930         .hw_access      = CX8802_DRVCTL_SHARED,
931         .probe          = cx8802_dvb_probe,
932         .remove         = cx8802_dvb_remove,
933         .advise_acquire = cx8802_dvb_advise_acquire,
934         .advise_release = cx8802_dvb_advise_release,
935 };
936
937 static int dvb_init(void)
938 {
939         printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
940                (CX88_VERSION_CODE >> 16) & 0xff,
941                (CX88_VERSION_CODE >>  8) & 0xff,
942                CX88_VERSION_CODE & 0xff);
943 #ifdef SNAPSHOT
944         printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
945                SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
946 #endif
947         return cx8802_register_driver(&cx8802_dvb_driver);
948 }
949
950 static void dvb_fini(void)
951 {
952         cx8802_unregister_driver(&cx8802_dvb_driver);
953 }
954
955 module_init(dvb_init);
956 module_exit(dvb_fini);
957
958 /*
959  * Local variables:
960  * c-basic-offset: 8
961  * compile-command: "make DVB=1"
962  * End:
963  */