afde3789d702e2f295cc66a4d953b2c028c9ddce
[linux-2.6.git] / drivers / media / video / cx88 / cx88-dvb.c
1 /*
2  *
3  * device driver for Conexant 2388x based TV cards
4  * MPEG Transport Stream (DVB) routines
5  *
6  * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7  * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; either version 2 of the License, or
12  *  (at your option) any later version.
13  *
14  *  This program is distributed in the hope that it will be useful,
15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *  GNU General Public License for more details.
18  *
19  *  You should have received a copy of the GNU General Public License
20  *  along with this program; if not, write to the Free Software
21  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #ifdef HAVE_MT352
37 # include "mt352.h"
38 # include "mt352_priv.h"
39 # ifdef HAVE_VP3054_I2C
40 #  include "cx88-vp3054-i2c.h"
41 # endif
42 #endif
43 #ifdef HAVE_ZL10353
44 # include "zl10353.h"
45 #endif
46 #ifdef HAVE_CX22702
47 # include "cx22702.h"
48 #endif
49 #ifdef HAVE_OR51132
50 # include "or51132.h"
51 #endif
52 #ifdef HAVE_LGDT330X
53 # include "lgdt330x.h"
54 # include "lg_h06xf.h"
55 #endif
56 #ifdef HAVE_NXT200X
57 # include "nxt200x.h"
58 #endif
59 #ifdef HAVE_CX24123
60 # include "cx24123.h"
61 #endif
62 #include "isl6421.h"
63
64 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
65 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
66 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
67 MODULE_LICENSE("GPL");
68
69 static unsigned int debug = 0;
70 module_param(debug, int, 0644);
71 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
72
73 #define dprintk(level,fmt, arg...)      if (debug >= level) \
74         printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
75
76 /* ------------------------------------------------------------------ */
77
78 static int dvb_buf_setup(struct videobuf_queue *q,
79                          unsigned int *count, unsigned int *size)
80 {
81         struct cx8802_dev *dev = q->priv_data;
82
83         dev->ts_packet_size  = 188 * 4;
84         dev->ts_packet_count = 32;
85
86         *size  = dev->ts_packet_size * dev->ts_packet_count;
87         *count = 32;
88         return 0;
89 }
90
91 static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
92                            enum v4l2_field field)
93 {
94         struct cx8802_dev *dev = q->priv_data;
95         return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
96 }
97
98 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
99 {
100         struct cx8802_dev *dev = q->priv_data;
101         cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
102 }
103
104 static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
105 {
106         cx88_free_buffer(q, (struct cx88_buffer*)vb);
107 }
108
109 static struct videobuf_queue_ops dvb_qops = {
110         .buf_setup    = dvb_buf_setup,
111         .buf_prepare  = dvb_buf_prepare,
112         .buf_queue    = dvb_buf_queue,
113         .buf_release  = dvb_buf_release,
114 };
115
116 /* ------------------------------------------------------------------ */
117
118 #ifdef HAVE_MT352
119 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
120 {
121         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x39 };
122         static u8 reset []         = { RESET,      0x80 };
123         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
124         static u8 agc_cfg []       = { AGC_TARGET, 0x24, 0x20 };
125         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
126         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
127
128         mt352_write(fe, clock_config,   sizeof(clock_config));
129         udelay(200);
130         mt352_write(fe, reset,          sizeof(reset));
131         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
132
133         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
134         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
135         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
136         return 0;
137 }
138
139 static int dvico_dual_demod_init(struct dvb_frontend *fe)
140 {
141         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x38 };
142         static u8 reset []         = { RESET,      0x80 };
143         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
144         static u8 agc_cfg []       = { AGC_TARGET, 0x28, 0x20 };
145         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
146         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
147
148         mt352_write(fe, clock_config,   sizeof(clock_config));
149         udelay(200);
150         mt352_write(fe, reset,          sizeof(reset));
151         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
152
153         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
154         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
155         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
156
157         return 0;
158 }
159
160 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
161 {
162         static u8 clock_config []  = { 0x89, 0x38, 0x39 };
163         static u8 reset []         = { 0x50, 0x80 };
164         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
165         static u8 agc_cfg []       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
166                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
167         static u8 dntv_extra[]     = { 0xB5, 0x7A };
168         static u8 capt_range_cfg[] = { 0x75, 0x32 };
169
170         mt352_write(fe, clock_config,   sizeof(clock_config));
171         udelay(2000);
172         mt352_write(fe, reset,          sizeof(reset));
173         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
174
175         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
176         udelay(2000);
177         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
178         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
179
180         return 0;
181 }
182
183 static struct mt352_config dvico_fusionhdtv = {
184         .demod_address = 0x0F,
185         .demod_init    = dvico_fusionhdtv_demod_init,
186 };
187
188 static struct mt352_config dntv_live_dvbt_config = {
189         .demod_address = 0x0f,
190         .demod_init    = dntv_live_dvbt_demod_init,
191 };
192
193 static struct mt352_config dvico_fusionhdtv_dual = {
194         .demod_address = 0x0F,
195         .demod_init    = dvico_dual_demod_init,
196 };
197
198 #ifdef HAVE_VP3054_I2C
199 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
200 {
201         static u8 clock_config []  = { 0x89, 0x38, 0x38 };
202         static u8 reset []         = { 0x50, 0x80 };
203         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
204         static u8 agc_cfg []       = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
205                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
206         static u8 dntv_extra[]     = { 0xB5, 0x7A };
207         static u8 capt_range_cfg[] = { 0x75, 0x32 };
208
209         mt352_write(fe, clock_config,   sizeof(clock_config));
210         udelay(2000);
211         mt352_write(fe, reset,          sizeof(reset));
212         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
213
214         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
215         udelay(2000);
216         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
217         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
218
219         return 0;
220 }
221
222 static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
223 {
224         struct cx8802_dev *dev= fe->dvb->priv;
225
226         /* this message is to set up ATC and ALC */
227         static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
228         struct i2c_msg msg =
229                 { .addr = dev->core->pll_addr, .flags = 0,
230                   .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
231         int err;
232
233         if (fe->ops.i2c_gate_ctrl)
234                 fe->ops.i2c_gate_ctrl(fe, 1);
235         if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
236                 if (err < 0)
237                         return err;
238                 else
239                         return -EREMOTEIO;
240         }
241
242         return 0;
243 }
244
245 static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
246                                                struct dvb_frontend_parameters* params)
247 {
248         struct cx8802_dev *dev= fe->dvb->priv;
249         u8 buf[4];
250         struct i2c_msg msg =
251                 { .addr = dev->core->pll_addr, .flags = 0,
252                   .buf = buf, .len = 4 };
253         int err;
254
255         /* Switch PLL to DVB mode */
256         err = philips_fmd1216_pll_init(fe);
257         if (err)
258                 return err;
259
260         /* Tune PLL */
261         dvb_pll_configure(dev->core->pll_desc, buf,
262                           params->frequency,
263                           params->u.ofdm.bandwidth);
264         if (fe->ops.i2c_gate_ctrl)
265                 fe->ops.i2c_gate_ctrl(fe, 1);
266         if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
267
268                 printk(KERN_WARNING "cx88-dvb: %s error "
269                            "(addr %02x <- %02x, err = %i)\n",
270                            __FUNCTION__, dev->core->pll_addr, buf[0], err);
271                 if (err < 0)
272                         return err;
273                 else
274                         return -EREMOTEIO;
275         }
276
277         return 0;
278 }
279
280 static struct mt352_config dntv_live_dvbt_pro_config = {
281         .demod_address = 0x0f,
282         .no_tuner      = 1,
283         .demod_init    = dntv_live_dvbt_pro_demod_init,
284 };
285 #endif
286 #endif
287
288 #ifdef HAVE_ZL10353
289 static int dvico_hybrid_tuner_set_params(struct dvb_frontend *fe,
290                                          struct dvb_frontend_parameters *params)
291 {
292         u8 pllbuf[4];
293         struct cx8802_dev *dev= fe->dvb->priv;
294         struct i2c_msg msg =
295                 { .addr = dev->core->pll_addr, .flags = 0,
296                   .buf = pllbuf, .len = 4 };
297         int err;
298
299         dvb_pll_configure(dev->core->pll_desc, pllbuf,
300                           params->frequency,
301                           params->u.ofdm.bandwidth);
302
303         if (fe->ops.i2c_gate_ctrl)
304                 fe->ops.i2c_gate_ctrl(fe, 1);
305         if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
306                 printk(KERN_WARNING "cx88-dvb: %s error "
307                            "(addr %02x <- %02x, err = %i)\n",
308                            __FUNCTION__, pllbuf[0], pllbuf[1], err);
309                 if (err < 0)
310                         return err;
311                 else
312                         return -EREMOTEIO;
313         }
314
315         return 0;
316 }
317
318 static struct zl10353_config dvico_fusionhdtv_hybrid = {
319         .demod_address = 0x0F,
320         .no_tuner      = 1,
321 };
322
323 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
324         .demod_address = 0x0F,
325 };
326 #endif
327
328 #ifdef HAVE_CX22702
329 static struct cx22702_config connexant_refboard_config = {
330         .demod_address = 0x43,
331         .output_mode   = CX22702_SERIAL_OUTPUT,
332 };
333
334 static struct cx22702_config hauppauge_novat_config = {
335         .demod_address = 0x43,
336         .output_mode   = CX22702_SERIAL_OUTPUT,
337 };
338 static struct cx22702_config hauppauge_hvr1100_config = {
339         .demod_address = 0x63,
340         .output_mode   = CX22702_SERIAL_OUTPUT,
341 };
342 #endif
343
344 #ifdef HAVE_OR51132
345 static int or51132_set_ts_param(struct dvb_frontend* fe,
346                                 int is_punctured)
347 {
348         struct cx8802_dev *dev= fe->dvb->priv;
349         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
350         return 0;
351 }
352
353 static struct or51132_config pchdtv_hd3000 = {
354         .demod_address    = 0x15,
355         .set_ts_params    = or51132_set_ts_param,
356 };
357 #endif
358
359 #ifdef HAVE_LGDT330X
360 static int lgdt3302_tuner_set_params(struct dvb_frontend* fe,
361                                      struct dvb_frontend_parameters* params)
362 {
363         /* FIXME make this routine use the tuner-simple code.
364          * It could probably be shared with a number of ATSC
365          * frontends. Many share the same tuner with analog TV. */
366
367         struct cx8802_dev *dev= fe->dvb->priv;
368         struct cx88_core *core = dev->core;
369         u8 buf[4];
370         struct i2c_msg msg =
371                 { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
372         int err;
373
374         dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
375         dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
376                         __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
377
378         if (fe->ops.i2c_gate_ctrl)
379                 fe->ops.i2c_gate_ctrl(fe, 1);
380         if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
381                 printk(KERN_WARNING "cx88-dvb: %s error "
382                            "(addr %02x <- %02x, err = %i)\n",
383                            __FUNCTION__, buf[0], buf[1], err);
384                 if (err < 0)
385                         return err;
386                 else
387                         return -EREMOTEIO;
388         }
389         return 0;
390 }
391
392 static int lgdt3303_tuner_set_params(struct dvb_frontend* fe,
393                                      struct dvb_frontend_parameters* params)
394 {
395         struct cx8802_dev *dev= fe->dvb->priv;
396         struct cx88_core *core = dev->core;
397
398         /* Put the analog decoder in standby to keep it quiet */
399         cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
400
401         return lg_h06xf_pll_set(fe, &core->i2c_adap, params);
402 }
403
404 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
405 {
406         struct cx8802_dev *dev= fe->dvb->priv;
407         struct cx88_core *core = dev->core;
408
409         dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
410         if (index == 0)
411                 cx_clear(MO_GP0_IO, 8);
412         else
413                 cx_set(MO_GP0_IO, 8);
414         return 0;
415 }
416
417 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
418 {
419         struct cx8802_dev *dev= fe->dvb->priv;
420         if (is_punctured)
421                 dev->ts_gen_cntrl |= 0x04;
422         else
423                 dev->ts_gen_cntrl &= ~0x04;
424         return 0;
425 }
426
427 static struct lgdt330x_config fusionhdtv_3_gold = {
428         .demod_address    = 0x0e,
429         .demod_chip       = LGDT3302,
430         .serial_mpeg      = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
431         .set_ts_params    = lgdt330x_set_ts_param,
432 };
433
434 static struct lgdt330x_config fusionhdtv_5_gold = {
435         .demod_address    = 0x0e,
436         .demod_chip       = LGDT3303,
437         .serial_mpeg      = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
438         .set_ts_params    = lgdt330x_set_ts_param,
439 };
440
441 static struct lgdt330x_config pchdtv_hd5500 = {
442         .demod_address    = 0x59,
443         .demod_chip       = LGDT3303,
444         .serial_mpeg      = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
445         .set_ts_params    = lgdt330x_set_ts_param,
446 };
447 #endif
448
449 #ifdef HAVE_NXT200X
450 static int nxt200x_set_ts_param(struct dvb_frontend* fe,
451                                 int is_punctured)
452 {
453         struct cx8802_dev *dev= fe->dvb->priv;
454         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
455         return 0;
456 }
457
458 static int nxt200x_set_pll_input(u8* buf, int input)
459 {
460         if (input)
461                 buf[3] |= 0x08;
462         else
463                 buf[3] &= ~0x08;
464         return 0;
465 }
466
467 static struct nxt200x_config ati_hdtvwonder = {
468         .demod_address    = 0x0a,
469         .set_pll_input    = nxt200x_set_pll_input,
470         .set_ts_params    = nxt200x_set_ts_param,
471 };
472 #endif
473
474 #ifdef HAVE_CX24123
475 static int cx24123_set_ts_param(struct dvb_frontend* fe,
476         int is_punctured)
477 {
478         struct cx8802_dev *dev= fe->dvb->priv;
479         dev->ts_gen_cntrl = 0x2;
480         return 0;
481 }
482
483 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
484 {
485         struct cx8802_dev *dev= fe->dvb->priv;
486         struct cx88_core *core = dev->core;
487
488         if (voltage == SEC_VOLTAGE_OFF) {
489                 cx_write(MO_GP0_IO, 0x000006fB);
490         } else {
491                 cx_write(MO_GP0_IO, 0x000006f9);
492         }
493
494         if (core->prev_set_voltage)
495                 return core->prev_set_voltage(fe, voltage);
496         return 0;
497 }
498
499 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
500 {
501         struct cx8802_dev *dev= fe->dvb->priv;
502         struct cx88_core *core = dev->core;
503
504         if (voltage == SEC_VOLTAGE_OFF) {
505                 dprintk(1,"LNB Voltage OFF\n");
506                 cx_write(MO_GP0_IO, 0x0000efff);
507         }
508
509         if (core->prev_set_voltage)
510                 return core->prev_set_voltage(fe, voltage);
511         return 0;
512 }
513
514 static struct cx24123_config geniatech_dvbs_config = {
515         .demod_address  = 0x55,
516         .set_ts_params  = cx24123_set_ts_param,
517 };
518
519 static struct cx24123_config hauppauge_novas_config = {
520         .demod_address          = 0x55,
521         .set_ts_params          = cx24123_set_ts_param,
522 };
523
524 static struct cx24123_config kworld_dvbs_100_config = {
525         .demod_address          = 0x15,
526         .set_ts_params          = cx24123_set_ts_param,
527 };
528 #endif
529
530 static int dvb_register(struct cx8802_dev *dev)
531 {
532         /* init struct videobuf_dvb */
533         dev->dvb.name = dev->core->name;
534         dev->ts_gen_cntrl = 0x0c;
535
536         /* init frontend */
537         switch (dev->core->board) {
538 #ifdef HAVE_CX22702
539         case CX88_BOARD_HAUPPAUGE_DVB_T1:
540                 dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
541                                                    &dev->core->i2c_adap);
542                 if (dev->dvb.frontend != NULL) {
543                         dvb_pll_attach(dev->dvb.frontend, 0x61,
544                                        &dev->core->i2c_adap,
545                                        &dvb_pll_thomson_dtt759x);
546                 }
547                 break;
548         case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
549         case CX88_BOARD_CONEXANT_DVB_T1:
550         case CX88_BOARD_KWORLD_DVB_T_CX22702:
551         case CX88_BOARD_WINFAST_DTV1000:
552                 dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
553                                                    &dev->core->i2c_adap);
554                 if (dev->dvb.frontend != NULL) {
555                         dvb_pll_attach(dev->dvb.frontend, 0x60,
556                                        &dev->core->i2c_adap,
557                                        &dvb_pll_thomson_dtt7579);
558                 }
559                 break;
560         case CX88_BOARD_WINFAST_DTV2000H:
561         case CX88_BOARD_HAUPPAUGE_HVR1100:
562         case CX88_BOARD_HAUPPAUGE_HVR1100LP:
563                 dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
564                                                    &dev->core->i2c_adap);
565                 if (dev->dvb.frontend != NULL) {
566                         dvb_pll_attach(dev->dvb.frontend, 0x61,
567                                        &dev->core->i2c_adap,
568                                        &dvb_pll_fmd1216me);
569                 }
570                 break;
571 #endif
572 #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
573         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
574 #ifdef HAVE_MT352
575                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
576                                                  &dev->core->i2c_adap);
577                 if (dev->dvb.frontend != NULL) {
578                         dvb_pll_attach(dev->dvb.frontend, 0x60,
579                                        &dev->core->i2c_adap,
580                                        &dvb_pll_thomson_dtt7579);
581                         break;
582                 }
583 #endif
584 #ifdef HAVE_ZL10353
585                 /* ZL10353 replaces MT352 on later cards */
586                 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
587                                                    &dev->core->i2c_adap);
588                 if (dev->dvb.frontend != NULL) {
589                         dvb_pll_attach(dev->dvb.frontend, 0x60,
590                                        &dev->core->i2c_adap,
591                                        &dvb_pll_thomson_dtt7579);
592                 }
593 #endif
594                 break;
595         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
596 #ifdef HAVE_MT352
597                 /* The tin box says DEE1601, but it seems to be DTT7579
598                  * compatible, with a slightly different MT352 AGC gain. */
599                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
600                                                  &dev->core->i2c_adap);
601                 if (dev->dvb.frontend != NULL) {
602                         dvb_pll_attach(dev->dvb.frontend, 0x61,
603                                        &dev->core->i2c_adap,
604                                        &dvb_pll_thomson_dtt7579);
605                         break;
606                 }
607 #endif
608 #ifdef HAVE_ZL10353
609                 /* ZL10353 replaces MT352 on later cards */
610                 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
611                                                    &dev->core->i2c_adap);
612                 if (dev->dvb.frontend != NULL) {
613                         dvb_pll_attach(dev->dvb.frontend, 0x61,
614                                        &dev->core->i2c_adap,
615                                        &dvb_pll_thomson_dtt7579);
616                 }
617 #endif
618                 break;
619 #endif /* HAVE_MT352 || HAVE_ZL10353 */
620 #ifdef HAVE_MT352
621         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
622                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
623                                                  &dev->core->i2c_adap);
624                 if (dev->dvb.frontend != NULL) {
625                         dvb_pll_attach(dev->dvb.frontend, 0x61,
626                                        &dev->core->i2c_adap,
627                                        &dvb_pll_lg_z201);
628                 }
629                 break;
630         case CX88_BOARD_KWORLD_DVB_T:
631         case CX88_BOARD_DNTV_LIVE_DVB_T:
632         case CX88_BOARD_ADSTECH_DVB_T_PCI:
633                 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
634                                                  &dev->core->i2c_adap);
635                 if (dev->dvb.frontend != NULL) {
636                         dvb_pll_attach(dev->dvb.frontend, 0x61,
637                                        &dev->core->i2c_adap,
638                                        &dvb_pll_unknown_1);
639                 }
640                 break;
641         case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
642 #ifdef HAVE_VP3054_I2C
643                 dev->core->pll_addr = 0x61;
644                 dev->core->pll_desc = &dvb_pll_fmd1216me;
645                 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
646                         &((struct vp3054_i2c_state *)dev->card_priv)->adap);
647                 if (dev->dvb.frontend != NULL) {
648                         dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
649                 }
650 #else
651                 printk("%s: built without vp3054 support\n", dev->core->name);
652 #endif
653                 break;
654 #endif
655 #ifdef HAVE_ZL10353
656         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
657                 dev->core->pll_addr = 0x61;
658                 dev->core->pll_desc = &dvb_pll_thomson_fe6600;
659                 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_hybrid,
660                                                    &dev->core->i2c_adap);
661                 if (dev->dvb.frontend != NULL) {
662                         dev->dvb.frontend->ops.tuner_ops.set_params = dvico_hybrid_tuner_set_params;
663                 }
664                 break;
665 #endif
666 #ifdef HAVE_OR51132
667         case CX88_BOARD_PCHDTV_HD3000:
668                 dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
669                                                  &dev->core->i2c_adap);
670                 if (dev->dvb.frontend != NULL) {
671                         dvb_pll_attach(dev->dvb.frontend, 0x61,
672                                        &dev->core->i2c_adap,
673                                        &dvb_pll_thomson_dtt761x);
674                 }
675                 break;
676 #endif
677 #ifdef HAVE_LGDT330X
678         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
679                 dev->ts_gen_cntrl = 0x08;
680                 {
681                 /* Do a hardware reset of chip before using it. */
682                 struct cx88_core *core = dev->core;
683
684                 cx_clear(MO_GP0_IO, 1);
685                 mdelay(100);
686                 cx_set(MO_GP0_IO, 1);
687                 mdelay(200);
688
689                 /* Select RF connector callback */
690                 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
691                 dev->core->pll_addr = 0x61;
692                 dev->core->pll_desc = &dvb_pll_microtune_4042;
693                 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
694                                                     &dev->core->i2c_adap);
695                 if (dev->dvb.frontend != NULL) {
696                         dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
697                 }
698                 }
699                 break;
700         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
701                 dev->ts_gen_cntrl = 0x08;
702                 {
703                 /* Do a hardware reset of chip before using it. */
704                 struct cx88_core *core = dev->core;
705
706                 cx_clear(MO_GP0_IO, 1);
707                 mdelay(100);
708                 cx_set(MO_GP0_IO, 9);
709                 mdelay(200);
710                 dev->core->pll_addr = 0x61;
711                 dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
712                 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
713                                                     &dev->core->i2c_adap);
714                 if (dev->dvb.frontend != NULL) {
715                         dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
716                 }
717                 }
718                 break;
719         case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
720                 dev->ts_gen_cntrl = 0x08;
721                 {
722                 /* Do a hardware reset of chip before using it. */
723                 struct cx88_core *core = dev->core;
724
725                 cx_clear(MO_GP0_IO, 1);
726                 mdelay(100);
727                 cx_set(MO_GP0_IO, 1);
728                 mdelay(200);
729                 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
730                                                     &dev->core->i2c_adap);
731                 if (dev->dvb.frontend != NULL) {
732                         dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
733                 }
734                 }
735                 break;
736         case CX88_BOARD_PCHDTV_HD5500:
737                 dev->ts_gen_cntrl = 0x08;
738                 {
739                 /* Do a hardware reset of chip before using it. */
740                 struct cx88_core *core = dev->core;
741
742                 cx_clear(MO_GP0_IO, 1);
743                 mdelay(100);
744                 cx_set(MO_GP0_IO, 1);
745                 mdelay(200);
746                 dev->dvb.frontend = lgdt330x_attach(&pchdtv_hd5500,
747                                                     &dev->core->i2c_adap);
748                 if (dev->dvb.frontend != NULL) {
749                         dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
750                 }
751                 }
752                 break;
753 #endif
754 #ifdef HAVE_NXT200X
755         case CX88_BOARD_ATI_HDTVWONDER:
756                 dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
757                                                  &dev->core->i2c_adap);
758                 if (dev->dvb.frontend != NULL) {
759                         dvb_pll_attach(dev->dvb.frontend, 0x61,
760                                        &dev->core->i2c_adap,
761                                        &dvb_pll_tuv1236d);
762                 }
763                 break;
764 #endif
765 #ifdef HAVE_CX24123
766         case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
767         case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
768                 dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
769                         &dev->core->i2c_adap);
770                 if (dev->dvb.frontend) {
771                         isl6421_attach(dev->dvb.frontend, &dev->core->i2c_adap,
772                                        0x08, 0x00, 0x00);
773                 }
774                 break;
775         case CX88_BOARD_KWORLD_DVBS_100:
776                 dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
777                         &dev->core->i2c_adap);
778                 if (dev->dvb.frontend) {
779                         dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
780                         dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
781                 }
782                 break;
783         case CX88_BOARD_GENIATECH_DVBS:
784                 dev->dvb.frontend = cx24123_attach(&geniatech_dvbs_config,
785                                                    &dev->core->i2c_adap);
786                 if (dev->dvb.frontend) {
787                         dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
788                         dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
789                 }
790                 break;
791 #endif
792         default:
793                 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
794                        dev->core->name);
795                 break;
796         }
797         if (NULL == dev->dvb.frontend) {
798                 printk("%s: frontend initialization failed\n",dev->core->name);
799                 return -1;
800         }
801
802         if (dev->core->pll_desc) {
803                 dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
804                 dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
805         }
806
807         /* Put the analog decoder in standby to keep it quiet */
808         cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
809
810         /* register everything */
811         return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
812 }
813
814 /* ----------------------------------------------------------- */
815
816 static int __devinit dvb_probe(struct pci_dev *pci_dev,
817                                const struct pci_device_id *pci_id)
818 {
819         struct cx8802_dev *dev;
820         struct cx88_core  *core;
821         int err;
822
823         /* general setup */
824         core = cx88_core_get(pci_dev);
825         if (NULL == core)
826                 return -EINVAL;
827
828         err = -ENODEV;
829         if (!cx88_boards[core->board].dvb)
830                 goto fail_core;
831
832         err = -ENOMEM;
833         dev = kzalloc(sizeof(*dev),GFP_KERNEL);
834         if (NULL == dev)
835                 goto fail_core;
836         dev->pci = pci_dev;
837         dev->core = core;
838
839         err = cx8802_init_common(dev);
840         if (0 != err)
841                 goto fail_free;
842
843 #ifdef HAVE_VP3054_I2C
844         err = vp3054_i2c_probe(dev);
845         if (0 != err)
846                 goto fail_free;
847 #endif
848
849         /* dvb stuff */
850         printk("%s/2: cx2388x based dvb card\n", core->name);
851         videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
852                             dev->pci, &dev->slock,
853                             V4L2_BUF_TYPE_VIDEO_CAPTURE,
854                             V4L2_FIELD_TOP,
855                             sizeof(struct cx88_buffer),
856                             dev);
857         err = dvb_register(dev);
858         if (0 != err)
859                 goto fail_fini;
860
861         /* Maintain a reference to cx88-video can query the 8802 device. */
862         core->dvbdev = dev;
863         return 0;
864
865  fail_fini:
866         cx8802_fini_common(dev);
867  fail_free:
868         kfree(dev);
869  fail_core:
870         cx88_core_put(core,pci_dev);
871         return err;
872 }
873
874 static void __devexit dvb_remove(struct pci_dev *pci_dev)
875 {
876         struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
877
878         /* Destroy any 8802 reference. */
879         dev->core->dvbdev = NULL;
880
881         /* dvb */
882         videobuf_dvb_unregister(&dev->dvb);
883
884 #ifdef HAVE_VP3054_I2C
885         vp3054_i2c_remove(dev);
886 #endif
887
888         /* common */
889         cx8802_fini_common(dev);
890         cx88_core_put(dev->core,dev->pci);
891         kfree(dev);
892 }
893
894 static struct pci_device_id cx8802_pci_tbl[] = {
895         {
896                 .vendor       = 0x14f1,
897                 .device       = 0x8802,
898                 .subvendor    = PCI_ANY_ID,
899                 .subdevice    = PCI_ANY_ID,
900         },{
901                 /* --- end of list --- */
902         }
903 };
904 MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
905
906 static struct pci_driver dvb_pci_driver = {
907         .name     = "cx88-dvb",
908         .id_table = cx8802_pci_tbl,
909         .probe    = dvb_probe,
910         .remove   = __devexit_p(dvb_remove),
911         .suspend  = cx8802_suspend_common,
912         .resume   = cx8802_resume_common,
913 };
914
915 static int dvb_init(void)
916 {
917         printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
918                (CX88_VERSION_CODE >> 16) & 0xff,
919                (CX88_VERSION_CODE >>  8) & 0xff,
920                CX88_VERSION_CODE & 0xff);
921 #ifdef SNAPSHOT
922         printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
923                SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
924 #endif
925         return pci_register_driver(&dvb_pci_driver);
926 }
927
928 static void dvb_fini(void)
929 {
930         pci_unregister_driver(&dvb_pci_driver);
931 }
932
933 module_init(dvb_init);
934 module_exit(dvb_fini);
935
936 /*
937  * Local variables:
938  * c-basic-offset: 8
939  * compile-command: "make DVB=1"
940  * End:
941  */