V4L/DVB (6079): Cleanup: remove linux/moduleparam.h from drivers/media files
[linux-2.6.git] / drivers / media / dvb / frontends / nxt200x.c
1 /*
2  *    Support for NXT2002 and NXT2004 - VSB/QAM
3  *
4  *    Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
5  *    Copyright (C) 2006 Michael Krufky <mkrufky@m1k.net>
6  *    based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
7  *    and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
8  *
9  *    This program is free software; you can redistribute it and/or modify
10  *    it under the terms of the GNU General Public License as published by
11  *    the Free Software Foundation; either version 2 of the License, or
12  *    (at your option) any later version.
13  *
14  *    This program is distributed in the hope that it will be useful,
15  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *    GNU General Public License for more details.
18  *
19  *    You should have received a copy of the GNU General Public License
20  *    along with this program; if not, write to the Free Software
21  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  *
23 */
24
25 /*
26  *                      NOTES ABOUT THIS DRIVER
27  *
28  * This Linux driver supports:
29  *   B2C2/BBTI Technisat Air2PC - ATSC (NXT2002)
30  *   AverTVHD MCE A180 (NXT2004)
31  *   ATI HDTV Wonder (NXT2004)
32  *
33  * This driver needs external firmware. Please use the command
34  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" or
35  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to
36  * download/extract the appropriate firmware, and then copy it to
37  * /usr/lib/hotplug/firmware/ or /lib/firmware/
38  * (depending on configuration of firmware hotplug).
39  */
40 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
41 #define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
42 #define CRC_CCIT_MASK 0x1021
43
44 #include <linux/kernel.h>
45 #include <linux/init.h>
46 #include <linux/module.h>
47 #include <linux/slab.h>
48 #include <linux/string.h>
49
50 #include "dvb_frontend.h"
51 #include "nxt200x.h"
52
53 struct nxt200x_state {
54
55         struct i2c_adapter* i2c;
56         const struct nxt200x_config* config;
57         struct dvb_frontend frontend;
58
59         /* demodulator private data */
60         nxt_chip_type demod_chip;
61         u8 initialised:1;
62 };
63
64 static int debug;
65 #define dprintk(args...) \
66         do { \
67                 if (debug) printk(KERN_DEBUG "nxt200x: " args); \
68         } while (0)
69
70 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
71 {
72         int err;
73         struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
74
75         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
76                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
77                         __FUNCTION__, addr, err);
78                 return -EREMOTEIO;
79         }
80         return 0;
81 }
82
83 static u8 i2c_readbytes (struct nxt200x_state* state, u8 addr, u8* buf, u8 len)
84 {
85         int err;
86         struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
87
88         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
89                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
90                         __FUNCTION__, addr, err);
91                 return -EREMOTEIO;
92         }
93         return 0;
94 }
95
96 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg, u8 *buf, u8 len)
97 {
98         u8 buf2 [len+1];
99         int err;
100         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
101
102         buf2[0] = reg;
103         memcpy(&buf2[1], buf, len);
104
105         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
106                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
107                         __FUNCTION__, state->config->demod_address, err);
108                 return -EREMOTEIO;
109         }
110         return 0;
111 }
112
113 static u8 nxt200x_readbytes (struct nxt200x_state* state, u8 reg, u8* buf, u8 len)
114 {
115         u8 reg2 [] = { reg };
116
117         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
118                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
119
120         int err;
121
122         if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
123                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
124                         __FUNCTION__, state->config->demod_address, err);
125                 return -EREMOTEIO;
126         }
127         return 0;
128 }
129
130 static u16 nxt200x_crc(u16 crc, u8 c)
131 {
132         u8 i;
133         u16 input = (u16) c & 0xFF;
134
135         input<<=8;
136         for(i=0; i<8; i++) {
137                 if((crc^input) & 0x8000)
138                         crc=(crc<<1)^CRC_CCIT_MASK;
139                 else
140                         crc<<=1;
141                 input<<=1;
142         }
143         return crc;
144 }
145
146 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
147 {
148         u8 attr, len2, buf;
149         dprintk("%s\n", __FUNCTION__);
150
151         /* set mutli register register */
152         nxt200x_writebytes(state, 0x35, &reg, 1);
153
154         /* send the actual data */
155         nxt200x_writebytes(state, 0x36, data, len);
156
157         switch (state->demod_chip) {
158                 case NXT2002:
159                         len2 = len;
160                         buf = 0x02;
161                         break;
162                 case NXT2004:
163                         /* probably not right, but gives correct values */
164                         attr = 0x02;
165                         if (reg & 0x80) {
166                                 attr = attr << 1;
167                                 if (reg & 0x04)
168                                         attr = attr >> 1;
169                         }
170                         /* set write bit */
171                         len2 = ((attr << 4) | 0x10) | len;
172                         buf = 0x80;
173                         break;
174                 default:
175                         return -EINVAL;
176                         break;
177         }
178
179         /* set multi register length */
180         nxt200x_writebytes(state, 0x34, &len2, 1);
181
182         /* toggle the multireg write bit */
183         nxt200x_writebytes(state, 0x21, &buf, 1);
184
185         nxt200x_readbytes(state, 0x21, &buf, 1);
186
187         switch (state->demod_chip) {
188                 case NXT2002:
189                         if ((buf & 0x02) == 0)
190                                 return 0;
191                         break;
192                 case NXT2004:
193                         if (buf == 0)
194                                 return 0;
195                         break;
196                 default:
197                         return -EINVAL;
198                         break;
199         }
200
201         printk(KERN_WARNING "nxt200x: Error writing multireg register 0x%02X\n",reg);
202
203         return 0;
204 }
205
206 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
207 {
208         int i;
209         u8 buf, len2, attr;
210         dprintk("%s\n", __FUNCTION__);
211
212         /* set mutli register register */
213         nxt200x_writebytes(state, 0x35, &reg, 1);
214
215         switch (state->demod_chip) {
216                 case NXT2002:
217                         /* set multi register length */
218                         len2 = len & 0x80;
219                         nxt200x_writebytes(state, 0x34, &len2, 1);
220
221                         /* read the actual data */
222                         nxt200x_readbytes(state, reg, data, len);
223                         return 0;
224                         break;
225                 case NXT2004:
226                         /* probably not right, but gives correct values */
227                         attr = 0x02;
228                         if (reg & 0x80) {
229                                 attr = attr << 1;
230                                 if (reg & 0x04)
231                                         attr = attr >> 1;
232                         }
233
234                         /* set multi register length */
235                         len2 = (attr << 4) | len;
236                         nxt200x_writebytes(state, 0x34, &len2, 1);
237
238                         /* toggle the multireg bit*/
239                         buf = 0x80;
240                         nxt200x_writebytes(state, 0x21, &buf, 1);
241
242                         /* read the actual data */
243                         for(i = 0; i < len; i++) {
244                                 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
245                         }
246                         return 0;
247                         break;
248                 default:
249                         return -EINVAL;
250                         break;
251         }
252 }
253
254 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
255 {
256         u8 buf, stopval, counter = 0;
257         dprintk("%s\n", __FUNCTION__);
258
259         /* set correct stop value */
260         switch (state->demod_chip) {
261                 case NXT2002:
262                         stopval = 0x40;
263                         break;
264                 case NXT2004:
265                         stopval = 0x10;
266                         break;
267                 default:
268                         stopval = 0;
269                         break;
270         }
271
272         buf = 0x80;
273         nxt200x_writebytes(state, 0x22, &buf, 1);
274
275         while (counter < 20) {
276                 nxt200x_readbytes(state, 0x31, &buf, 1);
277                 if (buf & stopval)
278                         return;
279                 msleep(10);
280                 counter++;
281         }
282
283         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
284         return;
285 }
286
287 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
288 {
289         u8 buf;
290         dprintk("%s\n", __FUNCTION__);
291
292         buf = 0x00;
293         nxt200x_writebytes(state, 0x22, &buf, 1);
294 }
295
296 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
297 {
298         u8 buf[9];
299         u8 counter = 0;
300         dprintk("%s\n", __FUNCTION__);
301
302         buf[0] = 0x00;
303         nxt200x_writebytes(state, 0x2b, buf, 1);
304         buf[0] = 0x70;
305         nxt200x_writebytes(state, 0x34, buf, 1);
306         buf[0] = 0x04;
307         nxt200x_writebytes(state, 0x35, buf, 1);
308         buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
309         buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
310         nxt200x_writebytes(state, 0x36, buf, 9);
311         buf[0] = 0x80;
312         nxt200x_writebytes(state, 0x21, buf, 1);
313
314         while (counter < 20) {
315                 nxt200x_readbytes(state, 0x21, buf, 1);
316                 if (buf[0] == 0)
317                         return;
318                 msleep(10);
319                 counter++;
320         }
321
322         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt2004 to init.\n");
323
324         return;
325 }
326
327 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
328 {
329         u8 buf, count = 0;
330
331         dprintk("%s\n", __FUNCTION__);
332
333         dprintk("Tuner Bytes: %02X %02X %02X %02X\n", data[1], data[2], data[3], data[4]);
334
335         /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
336          * direct write is required for Philips TUV1236D and ALPS TDHU2 */
337         switch (state->demod_chip) {
338                 case NXT2004:
339                         if (i2c_writebytes(state, data[0], data+1, 4))
340                                 printk(KERN_WARNING "nxt200x: error writing to tuner\n");
341                         /* wait until we have a lock */
342                         while (count < 20) {
343                                 i2c_readbytes(state, data[0], &buf, 1);
344                                 if (buf & 0x40)
345                                         return 0;
346                                 msleep(100);
347                                 count++;
348                         }
349                         printk("nxt2004: timeout waiting for tuner lock\n");
350                         break;
351                 case NXT2002:
352                         /* set the i2c transfer speed to the tuner */
353                         buf = 0x03;
354                         nxt200x_writebytes(state, 0x20, &buf, 1);
355
356                         /* setup to transfer 4 bytes via i2c */
357                         buf = 0x04;
358                         nxt200x_writebytes(state, 0x34, &buf, 1);
359
360                         /* write actual tuner bytes */
361                         nxt200x_writebytes(state, 0x36, data+1, 4);
362
363                         /* set tuner i2c address */
364                         buf = data[0] << 1;
365                         nxt200x_writebytes(state, 0x35, &buf, 1);
366
367                         /* write UC Opmode to begin transfer */
368                         buf = 0x80;
369                         nxt200x_writebytes(state, 0x21, &buf, 1);
370
371                         while (count < 20) {
372                                 nxt200x_readbytes(state, 0x21, &buf, 1);
373                                 if ((buf & 0x80)== 0x00)
374                                         return 0;
375                                 msleep(100);
376                                 count++;
377                         }
378                         printk("nxt2002: timeout error writing tuner\n");
379                         break;
380                 default:
381                         return -EINVAL;
382                         break;
383         }
384         return 0;
385 }
386
387 static void nxt200x_agc_reset(struct nxt200x_state* state)
388 {
389         u8 buf;
390         dprintk("%s\n", __FUNCTION__);
391
392         switch (state->demod_chip) {
393                 case NXT2002:
394                         buf = 0x08;
395                         nxt200x_writebytes(state, 0x08, &buf, 1);
396                         buf = 0x00;
397                         nxt200x_writebytes(state, 0x08, &buf, 1);
398                         break;
399                 case NXT2004:
400                         nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
401                         buf = 0x08;
402                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
403                         buf = 0x00;
404                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
405                         break;
406                 default:
407                         break;
408         }
409         return;
410 }
411
412 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
413 {
414
415         struct nxt200x_state* state = fe->demodulator_priv;
416         u8 buf[3], written = 0, chunkpos = 0;
417         u16 rambase, position, crc = 0;
418
419         dprintk("%s\n", __FUNCTION__);
420         dprintk("Firmware is %zu bytes\n", fw->size);
421
422         /* Get the RAM base for this nxt2002 */
423         nxt200x_readbytes(state, 0x10, buf, 1);
424
425         if (buf[0] & 0x10)
426                 rambase = 0x1000;
427         else
428                 rambase = 0x0000;
429
430         dprintk("rambase on this nxt2002 is %04X\n", rambase);
431
432         /* Hold the micro in reset while loading firmware */
433         buf[0] = 0x80;
434         nxt200x_writebytes(state, 0x2B, buf, 1);
435
436         for (position = 0; position < fw->size; position++) {
437                 if (written == 0) {
438                         crc = 0;
439                         chunkpos = 0x28;
440                         buf[0] = ((rambase + position) >> 8);
441                         buf[1] = (rambase + position) & 0xFF;
442                         buf[2] = 0x81;
443                         /* write starting address */
444                         nxt200x_writebytes(state, 0x29, buf, 3);
445                 }
446                 written++;
447                 chunkpos++;
448
449                 if ((written % 4) == 0)
450                         nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
451
452                 crc = nxt200x_crc(crc, fw->data[position]);
453
454                 if ((written == 255) || (position+1 == fw->size)) {
455                         /* write remaining bytes of firmware */
456                         nxt200x_writebytes(state, chunkpos+4-(written %4),
457                                 &fw->data[position-(written %4) + 1],
458                                 written %4);
459                         buf[0] = crc << 8;
460                         buf[1] = crc & 0xFF;
461
462                         /* write crc */
463                         nxt200x_writebytes(state, 0x2C, buf, 2);
464
465                         /* do a read to stop things */
466                         nxt200x_readbytes(state, 0x2A, buf, 1);
467
468                         /* set transfer mode to complete */
469                         buf[0] = 0x80;
470                         nxt200x_writebytes(state, 0x2B, buf, 1);
471
472                         written = 0;
473                 }
474         }
475
476         return 0;
477 };
478
479 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
480 {
481
482         struct nxt200x_state* state = fe->demodulator_priv;
483         u8 buf[3];
484         u16 rambase, position, crc=0;
485
486         dprintk("%s\n", __FUNCTION__);
487         dprintk("Firmware is %zu bytes\n", fw->size);
488
489         /* set rambase */
490         rambase = 0x1000;
491
492         /* hold the micro in reset while loading firmware */
493         buf[0] = 0x80;
494         nxt200x_writebytes(state, 0x2B, buf,1);
495
496         /* calculate firmware CRC */
497         for (position = 0; position < fw->size; position++) {
498                 crc = nxt200x_crc(crc, fw->data[position]);
499         }
500
501         buf[0] = rambase >> 8;
502         buf[1] = rambase & 0xFF;
503         buf[2] = 0x81;
504         /* write starting address */
505         nxt200x_writebytes(state,0x29,buf,3);
506
507         for (position = 0; position < fw->size;) {
508                 nxt200x_writebytes(state, 0x2C, &fw->data[position],
509                         fw->size-position > 255 ? 255 : fw->size-position);
510                 position += (fw->size-position > 255 ? 255 : fw->size-position);
511         }
512         buf[0] = crc >> 8;
513         buf[1] = crc & 0xFF;
514
515         dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
516
517         /* write crc */
518         nxt200x_writebytes(state, 0x2C, buf,2);
519
520         /* do a read to stop things */
521         nxt200x_readbytes(state, 0x2C, buf, 1);
522
523         /* set transfer mode to complete */
524         buf[0] = 0x80;
525         nxt200x_writebytes(state, 0x2B, buf,1);
526
527         return 0;
528 };
529
530 static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
531                                              struct dvb_frontend_parameters *p)
532 {
533         struct nxt200x_state* state = fe->demodulator_priv;
534         u8 buf[5];
535
536         /* stop the micro first */
537         nxt200x_microcontroller_stop(state);
538
539         if (state->demod_chip == NXT2004) {
540                 /* make sure demod is set to digital */
541                 buf[0] = 0x04;
542                 nxt200x_writebytes(state, 0x14, buf, 1);
543                 buf[0] = 0x00;
544                 nxt200x_writebytes(state, 0x17, buf, 1);
545         }
546
547         /* set additional params */
548         switch (p->u.vsb.modulation) {
549                 case QAM_64:
550                 case QAM_256:
551                         /* Set punctured clock for QAM */
552                         /* This is just a guess since I am unable to test it */
553                         if (state->config->set_ts_params)
554                                 state->config->set_ts_params(fe, 1);
555                         break;
556                 case VSB_8:
557                         /* Set non-punctured clock for VSB */
558                         if (state->config->set_ts_params)
559                                 state->config->set_ts_params(fe, 0);
560                         break;
561                 default:
562                         return -EINVAL;
563                         break;
564         }
565
566         if (fe->ops.tuner_ops.calc_regs) {
567                 /* get tuning information */
568                 fe->ops.tuner_ops.calc_regs(fe, p, buf, 5);
569
570                 /* write frequency information */
571                 nxt200x_writetuner(state, buf);
572         }
573
574         /* reset the agc now that tuning has been completed */
575         nxt200x_agc_reset(state);
576
577         /* set target power level */
578         switch (p->u.vsb.modulation) {
579                 case QAM_64:
580                 case QAM_256:
581                         buf[0] = 0x74;
582                         break;
583                 case VSB_8:
584                         buf[0] = 0x70;
585                         break;
586                 default:
587                         return -EINVAL;
588                         break;
589         }
590         nxt200x_writebytes(state, 0x42, buf, 1);
591
592         /* configure sdm */
593         switch (state->demod_chip) {
594                 case NXT2002:
595                         buf[0] = 0x87;
596                         break;
597                 case NXT2004:
598                         buf[0] = 0x07;
599                         break;
600                 default:
601                         return -EINVAL;
602                         break;
603         }
604         nxt200x_writebytes(state, 0x57, buf, 1);
605
606         /* write sdm1 input */
607         buf[0] = 0x10;
608         buf[1] = 0x00;
609         switch (state->demod_chip) {
610                 case NXT2002:
611                         nxt200x_writereg_multibyte(state, 0x58, buf, 2);
612                         break;
613                 case NXT2004:
614                         nxt200x_writebytes(state, 0x58, buf, 2);
615                         break;
616                 default:
617                         return -EINVAL;
618                         break;
619         }
620
621         /* write sdmx input */
622         switch (p->u.vsb.modulation) {
623                 case QAM_64:
624                                 buf[0] = 0x68;
625                                 break;
626                 case QAM_256:
627                                 buf[0] = 0x64;
628                                 break;
629                 case VSB_8:
630                                 buf[0] = 0x60;
631                                 break;
632                 default:
633                                 return -EINVAL;
634                                 break;
635         }
636         buf[1] = 0x00;
637         switch (state->demod_chip) {
638                 case NXT2002:
639                         nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
640                         break;
641                 case NXT2004:
642                         nxt200x_writebytes(state, 0x5C, buf, 2);
643                         break;
644                 default:
645                         return -EINVAL;
646                         break;
647         }
648
649         /* write adc power lpf fc */
650         buf[0] = 0x05;
651         nxt200x_writebytes(state, 0x43, buf, 1);
652
653         if (state->demod_chip == NXT2004) {
654                 /* write ??? */
655                 buf[0] = 0x00;
656                 buf[1] = 0x00;
657                 nxt200x_writebytes(state, 0x46, buf, 2);
658         }
659
660         /* write accumulator2 input */
661         buf[0] = 0x80;
662         buf[1] = 0x00;
663         switch (state->demod_chip) {
664                 case NXT2002:
665                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
666                         break;
667                 case NXT2004:
668                         nxt200x_writebytes(state, 0x4B, buf, 2);
669                         break;
670                 default:
671                         return -EINVAL;
672                         break;
673         }
674
675         /* write kg1 */
676         buf[0] = 0x00;
677         nxt200x_writebytes(state, 0x4D, buf, 1);
678
679         /* write sdm12 lpf fc */
680         buf[0] = 0x44;
681         nxt200x_writebytes(state, 0x55, buf, 1);
682
683         /* write agc control reg */
684         buf[0] = 0x04;
685         nxt200x_writebytes(state, 0x41, buf, 1);
686
687         if (state->demod_chip == NXT2004) {
688                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
689                 buf[0] = 0x24;
690                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
691
692                 /* soft reset? */
693                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
694                 buf[0] = 0x10;
695                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
696                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
697                 buf[0] = 0x00;
698                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
699
700                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
701                 buf[0] = 0x04;
702                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
703                 buf[0] = 0x00;
704                 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
705                 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
706                 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
707                 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
708                 buf[0] = 0x11;
709                 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
710                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
711                 buf[0] = 0x44;
712                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
713         }
714
715         /* write agc ucgp0 */
716         switch (p->u.vsb.modulation) {
717                 case QAM_64:
718                                 buf[0] = 0x02;
719                                 break;
720                 case QAM_256:
721                                 buf[0] = 0x03;
722                                 break;
723                 case VSB_8:
724                                 buf[0] = 0x00;
725                                 break;
726                 default:
727                                 return -EINVAL;
728                                 break;
729         }
730         nxt200x_writebytes(state, 0x30, buf, 1);
731
732         /* write agc control reg */
733         buf[0] = 0x00;
734         nxt200x_writebytes(state, 0x41, buf, 1);
735
736         /* write accumulator2 input */
737         buf[0] = 0x80;
738         buf[1] = 0x00;
739         switch (state->demod_chip) {
740                 case NXT2002:
741                         nxt200x_writereg_multibyte(state, 0x49, buf, 2);
742                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
743                         break;
744                 case NXT2004:
745                         nxt200x_writebytes(state, 0x49, buf, 2);
746                         nxt200x_writebytes(state, 0x4B, buf, 2);
747                         break;
748                 default:
749                         return -EINVAL;
750                         break;
751         }
752
753         /* write agc control reg */
754         buf[0] = 0x04;
755         nxt200x_writebytes(state, 0x41, buf, 1);
756
757         nxt200x_microcontroller_start(state);
758
759         if (state->demod_chip == NXT2004) {
760                 nxt2004_microcontroller_init(state);
761
762                 /* ???? */
763                 buf[0] = 0xF0;
764                 buf[1] = 0x00;
765                 nxt200x_writebytes(state, 0x5C, buf, 2);
766         }
767
768         /* adjacent channel detection should be done here, but I don't
769         have any stations with this need so I cannot test it */
770
771         return 0;
772 }
773
774 static int nxt200x_read_status(struct dvb_frontend* fe, fe_status_t* status)
775 {
776         struct nxt200x_state* state = fe->demodulator_priv;
777         u8 lock;
778         nxt200x_readbytes(state, 0x31, &lock, 1);
779
780         *status = 0;
781         if (lock & 0x20) {
782                 *status |= FE_HAS_SIGNAL;
783                 *status |= FE_HAS_CARRIER;
784                 *status |= FE_HAS_VITERBI;
785                 *status |= FE_HAS_SYNC;
786                 *status |= FE_HAS_LOCK;
787         }
788         return 0;
789 }
790
791 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
792 {
793         struct nxt200x_state* state = fe->demodulator_priv;
794         u8 b[3];
795
796         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
797
798         *ber = ((b[0] << 8) + b[1]) * 8;
799
800         return 0;
801 }
802
803 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
804 {
805         struct nxt200x_state* state = fe->demodulator_priv;
806         u8 b[2];
807         u16 temp = 0;
808
809         /* setup to read cluster variance */
810         b[0] = 0x00;
811         nxt200x_writebytes(state, 0xA1, b, 1);
812
813         /* get multreg val */
814         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
815
816         temp = (b[0] << 8) | b[1];
817         *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
818
819         return 0;
820 }
821
822 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
823 {
824
825         struct nxt200x_state* state = fe->demodulator_priv;
826         u8 b[2];
827         u16 temp = 0, temp2;
828         u32 snrdb = 0;
829
830         /* setup to read cluster variance */
831         b[0] = 0x00;
832         nxt200x_writebytes(state, 0xA1, b, 1);
833
834         /* get multreg val from 0xA6 */
835         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
836
837         temp = (b[0] << 8) | b[1];
838         temp2 = 0x7FFF - temp;
839
840         /* snr will be in db */
841         if (temp2 > 0x7F00)
842                 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
843         else if (temp2 > 0x7EC0)
844                 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
845         else if (temp2 > 0x7C00)
846                 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
847         else
848                 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
849
850         /* the value reported back from the frontend will be FFFF=32db 0000=0db */
851         *snr = snrdb * (0xFFFF/32000);
852
853         return 0;
854 }
855
856 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
857 {
858         struct nxt200x_state* state = fe->demodulator_priv;
859         u8 b[3];
860
861         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
862         *ucblocks = b[2];
863
864         return 0;
865 }
866
867 static int nxt200x_sleep(struct dvb_frontend* fe)
868 {
869         return 0;
870 }
871
872 static int nxt2002_init(struct dvb_frontend* fe)
873 {
874         struct nxt200x_state* state = fe->demodulator_priv;
875         const struct firmware *fw;
876         int ret;
877         u8 buf[2];
878
879         /* request the firmware, this will block until someone uploads it */
880         printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE);
881         ret = request_firmware(&fw, NXT2002_DEFAULT_FIRMWARE, &state->i2c->dev);
882         printk("nxt2002: Waiting for firmware upload(2)...\n");
883         if (ret) {
884                 printk("nxt2002: No firmware uploaded (timeout or file not found?)\n");
885                 return ret;
886         }
887
888         ret = nxt2002_load_firmware(fe, fw);
889         release_firmware(fw);
890         if (ret) {
891                 printk("nxt2002: Writing firmware to device failed\n");
892                 return ret;
893         }
894         printk("nxt2002: Firmware upload complete\n");
895
896         /* Put the micro into reset */
897         nxt200x_microcontroller_stop(state);
898
899         /* ensure transfer is complete */
900         buf[0]=0x00;
901         nxt200x_writebytes(state, 0x2B, buf, 1);
902
903         /* Put the micro into reset for real this time */
904         nxt200x_microcontroller_stop(state);
905
906         /* soft reset everything (agc,frontend,eq,fec)*/
907         buf[0] = 0x0F;
908         nxt200x_writebytes(state, 0x08, buf, 1);
909         buf[0] = 0x00;
910         nxt200x_writebytes(state, 0x08, buf, 1);
911
912         /* write agc sdm configure */
913         buf[0] = 0xF1;
914         nxt200x_writebytes(state, 0x57, buf, 1);
915
916         /* write mod output format */
917         buf[0] = 0x20;
918         nxt200x_writebytes(state, 0x09, buf, 1);
919
920         /* write fec mpeg mode */
921         buf[0] = 0x7E;
922         buf[1] = 0x00;
923         nxt200x_writebytes(state, 0xE9, buf, 2);
924
925         /* write mux selection */
926         buf[0] = 0x00;
927         nxt200x_writebytes(state, 0xCC, buf, 1);
928
929         return 0;
930 }
931
932 static int nxt2004_init(struct dvb_frontend* fe)
933 {
934         struct nxt200x_state* state = fe->demodulator_priv;
935         const struct firmware *fw;
936         int ret;
937         u8 buf[3];
938
939         /* ??? */
940         buf[0]=0x00;
941         nxt200x_writebytes(state, 0x1E, buf, 1);
942
943         /* request the firmware, this will block until someone uploads it */
944         printk("nxt2004: Waiting for firmware upload (%s)...\n", NXT2004_DEFAULT_FIRMWARE);
945         ret = request_firmware(&fw, NXT2004_DEFAULT_FIRMWARE, &state->i2c->dev);
946         printk("nxt2004: Waiting for firmware upload(2)...\n");
947         if (ret) {
948                 printk("nxt2004: No firmware uploaded (timeout or file not found?)\n");
949                 return ret;
950         }
951
952         ret = nxt2004_load_firmware(fe, fw);
953         release_firmware(fw);
954         if (ret) {
955                 printk("nxt2004: Writing firmware to device failed\n");
956                 return ret;
957         }
958         printk("nxt2004: Firmware upload complete\n");
959
960         /* ensure transfer is complete */
961         buf[0] = 0x01;
962         nxt200x_writebytes(state, 0x19, buf, 1);
963
964         nxt2004_microcontroller_init(state);
965         nxt200x_microcontroller_stop(state);
966         nxt200x_microcontroller_stop(state);
967         nxt2004_microcontroller_init(state);
968         nxt200x_microcontroller_stop(state);
969
970         /* soft reset everything (agc,frontend,eq,fec)*/
971         buf[0] = 0xFF;
972         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
973         buf[0] = 0x00;
974         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
975
976         /* write agc sdm configure */
977         buf[0] = 0xD7;
978         nxt200x_writebytes(state, 0x57, buf, 1);
979
980         /* ???*/
981         buf[0] = 0x07;
982         buf[1] = 0xfe;
983         nxt200x_writebytes(state, 0x35, buf, 2);
984         buf[0] = 0x12;
985         nxt200x_writebytes(state, 0x34, buf, 1);
986         buf[0] = 0x80;
987         nxt200x_writebytes(state, 0x21, buf, 1);
988
989         /* ???*/
990         buf[0] = 0x21;
991         nxt200x_writebytes(state, 0x0A, buf, 1);
992
993         /* ???*/
994         buf[0] = 0x01;
995         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
996
997         /* write fec mpeg mode */
998         buf[0] = 0x7E;
999         buf[1] = 0x00;
1000         nxt200x_writebytes(state, 0xE9, buf, 2);
1001
1002         /* write mux selection */
1003         buf[0] = 0x00;
1004         nxt200x_writebytes(state, 0xCC, buf, 1);
1005
1006         /* ???*/
1007         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1008         buf[0] = 0x00;
1009         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1010
1011         /* soft reset? */
1012         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1013         buf[0] = 0x10;
1014         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1015         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1016         buf[0] = 0x00;
1017         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1018
1019         /* ???*/
1020         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1021         buf[0] = 0x01;
1022         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1023         buf[0] = 0x70;
1024         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1025         buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
1026         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1027
1028         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1029         buf[0] = 0x11;
1030         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1031         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1032         buf[0] = 0x40;
1033         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1034
1035         nxt200x_readbytes(state, 0x10, buf, 1);
1036         buf[0] = 0x10;
1037         nxt200x_writebytes(state, 0x10, buf, 1);
1038         nxt200x_readbytes(state, 0x0A, buf, 1);
1039         buf[0] = 0x21;
1040         nxt200x_writebytes(state, 0x0A, buf, 1);
1041
1042         nxt2004_microcontroller_init(state);
1043
1044         buf[0] = 0x21;
1045         nxt200x_writebytes(state, 0x0A, buf, 1);
1046         buf[0] = 0x7E;
1047         nxt200x_writebytes(state, 0xE9, buf, 1);
1048         buf[0] = 0x00;
1049         nxt200x_writebytes(state, 0xEA, buf, 1);
1050
1051         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1052         buf[0] = 0x00;
1053         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1054         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1055         buf[0] = 0x00;
1056         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1057
1058         /* soft reset? */
1059         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1060         buf[0] = 0x10;
1061         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1062         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1063         buf[0] = 0x00;
1064         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1065
1066         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1067         buf[0] = 0x04;
1068         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1069         buf[0] = 0x00;
1070         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1071         buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1072         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1073
1074         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1075         buf[0] = 0x11;
1076         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1077
1078         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1079         buf[0] = 0x44;
1080         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1081
1082         /* initialize tuner */
1083         nxt200x_readbytes(state, 0x10, buf, 1);
1084         buf[0] = 0x12;
1085         nxt200x_writebytes(state, 0x10, buf, 1);
1086         buf[0] = 0x04;
1087         nxt200x_writebytes(state, 0x13, buf, 1);
1088         buf[0] = 0x00;
1089         nxt200x_writebytes(state, 0x16, buf, 1);
1090         buf[0] = 0x04;
1091         nxt200x_writebytes(state, 0x14, buf, 1);
1092         buf[0] = 0x00;
1093         nxt200x_writebytes(state, 0x14, buf, 1);
1094         nxt200x_writebytes(state, 0x17, buf, 1);
1095         nxt200x_writebytes(state, 0x14, buf, 1);
1096         nxt200x_writebytes(state, 0x17, buf, 1);
1097
1098         return 0;
1099 }
1100
1101 static int nxt200x_init(struct dvb_frontend* fe)
1102 {
1103         struct nxt200x_state* state = fe->demodulator_priv;
1104         int ret = 0;
1105
1106         if (!state->initialised) {
1107                 switch (state->demod_chip) {
1108                         case NXT2002:
1109                                 ret = nxt2002_init(fe);
1110                                 break;
1111                         case NXT2004:
1112                                 ret = nxt2004_init(fe);
1113                                 break;
1114                         default:
1115                                 return -EINVAL;
1116                                 break;
1117                 }
1118                 state->initialised = 1;
1119         }
1120         return ret;
1121 }
1122
1123 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1124 {
1125         fesettings->min_delay_ms = 500;
1126         fesettings->step_size = 0;
1127         fesettings->max_drift = 0;
1128         return 0;
1129 }
1130
1131 static void nxt200x_release(struct dvb_frontend* fe)
1132 {
1133         struct nxt200x_state* state = fe->demodulator_priv;
1134         kfree(state);
1135 }
1136
1137 static struct dvb_frontend_ops nxt200x_ops;
1138
1139 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1140                                    struct i2c_adapter* i2c)
1141 {
1142         struct nxt200x_state* state = NULL;
1143         u8 buf [] = {0,0,0,0,0};
1144
1145         /* allocate memory for the internal state */
1146         state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1147         if (state == NULL)
1148                 goto error;
1149
1150         /* setup the state */
1151         state->config = config;
1152         state->i2c = i2c;
1153         state->initialised = 0;
1154
1155         /* read card id */
1156         nxt200x_readbytes(state, 0x00, buf, 5);
1157         dprintk("NXT info: %02X %02X %02X %02X %02X\n",
1158                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1159
1160         /* set demod chip */
1161         switch (buf[0]) {
1162                 case 0x04:
1163                         state->demod_chip = NXT2002;
1164                         printk("nxt200x: NXT2002 Detected\n");
1165                         break;
1166                 case 0x05:
1167                         state->demod_chip = NXT2004;
1168                         printk("nxt200x: NXT2004 Detected\n");
1169                         break;
1170                 default:
1171                         goto error;
1172         }
1173
1174         /* make sure demod chip is supported */
1175         switch (state->demod_chip) {
1176                 case NXT2002:
1177                         if (buf[0] != 0x04) goto error;         /* device id */
1178                         if (buf[1] != 0x02) goto error;         /* fab id */
1179                         if (buf[2] != 0x11) goto error;         /* month */
1180                         if (buf[3] != 0x20) goto error;         /* year msb */
1181                         if (buf[4] != 0x00) goto error;         /* year lsb */
1182                         break;
1183                 case NXT2004:
1184                         if (buf[0] != 0x05) goto error;         /* device id */
1185                         break;
1186                 default:
1187                         goto error;
1188         }
1189
1190         /* create dvb_frontend */
1191         memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1192         state->frontend.demodulator_priv = state;
1193         return &state->frontend;
1194
1195 error:
1196         kfree(state);
1197         printk("Unknown/Unsupported NXT chip: %02X %02X %02X %02X %02X\n",
1198                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1199         return NULL;
1200 }
1201
1202 static struct dvb_frontend_ops nxt200x_ops = {
1203
1204         .info = {
1205                 .name = "Nextwave NXT200X VSB/QAM frontend",
1206                 .type = FE_ATSC,
1207                 .frequency_min =  54000000,
1208                 .frequency_max = 860000000,
1209                 .frequency_stepsize = 166666,   /* stepsize is just a guess */
1210                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1211                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1212                         FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1213         },
1214
1215         .release = nxt200x_release,
1216
1217         .init = nxt200x_init,
1218         .sleep = nxt200x_sleep,
1219
1220         .set_frontend = nxt200x_setup_frontend_parameters,
1221         .get_tune_settings = nxt200x_get_tune_settings,
1222
1223         .read_status = nxt200x_read_status,
1224         .read_ber = nxt200x_read_ber,
1225         .read_signal_strength = nxt200x_read_signal_strength,
1226         .read_snr = nxt200x_read_snr,
1227         .read_ucblocks = nxt200x_read_ucblocks,
1228 };
1229
1230 module_param(debug, int, 0644);
1231 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1232
1233 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1234 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1235 MODULE_LICENSE("GPL");
1236
1237 EXPORT_SYMBOL(nxt200x_attach);
1238