mb86a20s: Group registers into the same line
[linux-2.6.git] / drivers / media / dvb / frontends / mb86a20s.c
1 /*
2  *   Fujitu mb86a20s ISDB-T/ISDB-Tsb Module driver
3  *
4  *   Copyright (C) 2010 Mauro Carvalho Chehab <mchehab@redhat.com>
5  *   Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
6  *
7  *   FIXME: Need to port to DVB v5.2 API
8  *
9  *   This program is free software; you can redistribute it and/or
10  *   modify it under the terms of the GNU General Public License as
11  *   published by the Free Software Foundation version 2.
12  *
13  *   This program is distributed in the hope that it will be useful,
14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16  *   General Public License for more details.
17  */
18
19 #include <linux/kernel.h>
20 #include <asm/div64.h>
21
22 #include "dvb_frontend.h"
23 #include "mb86a20s.h"
24
25 static int debug = 1;
26 module_param(debug, int, 0644);
27 MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
28
29 #define rc(args...)  do {                                               \
30         printk(KERN_ERR  "mb86a20s: " args);                            \
31 } while (0)
32
33 #define dprintk(args...)                                                \
34         do {                                                            \
35                 if (debug) {                                            \
36                         printk(KERN_DEBUG "mb86a20s: %s: ", __func__);  \
37                         printk(args);                                   \
38                 }                                                       \
39         } while (0)
40
41 struct mb86a20s_state {
42         struct i2c_adapter *i2c;
43         const struct mb86a20s_config *config;
44
45         struct dvb_frontend frontend;
46
47         bool need_init;
48 };
49
50 struct regdata {
51         u8 reg;
52         u8 data;
53 };
54
55 /*
56  * Initialization sequence: Use whatevere default values that PV SBTVD
57  * does on its initialisation, obtained via USB snoop
58  */
59 static struct regdata mb86a20s_init[] = {
60         { 0x70, 0x0f },
61         { 0x70, 0xff },
62         { 0x08, 0x01 },
63         { 0x09, 0x3e },
64         { 0x50, 0xd1 }, { 0x51, 0x22 },
65         { 0x39, 0x01 },
66         { 0x71, 0x00 },
67         { 0x28, 0x2a }, { 0x29, 0x00 }, { 0x2a, 0xff }, { 0x2b, 0x80 },
68         { 0x28, 0x20 }, { 0x29, 0x33 }, { 0x2a, 0xdf }, { 0x2b, 0xa9 },
69         { 0x3b, 0x21 },
70         { 0x3c, 0x3a },
71         { 0x01, 0x0d },
72         { 0x04, 0x08 }, { 0x05, 0x05 },
73         { 0x04, 0x0e }, { 0x05, 0x00 },
74         { 0x04, 0x0f }, { 0x05, 0x14 },
75         { 0x04, 0x0b }, { 0x05, 0x8c },
76         { 0x04, 0x00 }, { 0x05, 0x00 },
77         { 0x04, 0x01 }, { 0x05, 0x07 },
78         { 0x04, 0x02 }, { 0x05, 0x0f },
79         { 0x04, 0x03 }, { 0x05, 0xa0 },
80         { 0x04, 0x09 }, { 0x05, 0x00 },
81         { 0x04, 0x0a }, { 0x05, 0xff },
82         { 0x04, 0x27 }, { 0x05, 0x64 },
83         { 0x04, 0x28 }, { 0x05, 0x00 },
84         { 0x04, 0x1e }, { 0x05, 0xff },
85         { 0x04, 0x29 }, { 0x05, 0x0a },
86         { 0x04, 0x32 }, { 0x05, 0x0a },
87         { 0x04, 0x14 }, { 0x05, 0x02 },
88         { 0x04, 0x04 }, { 0x05, 0x00 },
89         { 0x04, 0x05 }, { 0x05, 0x22 },
90         { 0x04, 0x06 }, { 0x05, 0x0e },
91         { 0x04, 0x07 }, { 0x05, 0xd8 },
92         { 0x04, 0x12 }, { 0x05, 0x00 },
93         { 0x04, 0x13 }, { 0x05, 0xff },
94         { 0x52, 0x01 },
95         { 0x50, 0xa7 }, { 0x51, 0x00 },
96         { 0x50, 0xa8 }, { 0x51, 0xff },
97         { 0x50, 0xa9 }, { 0x51, 0xff },
98         { 0x50, 0xaa }, { 0x51, 0x00 },
99         { 0x50, 0xab }, { 0x51, 0xff },
100         { 0x50, 0xac }, { 0x51, 0xff },
101         { 0x50, 0xad }, { 0x51, 0x00 },
102         { 0x50, 0xae }, { 0x51, 0xff },
103         { 0x50, 0xaf }, { 0x51, 0xff },
104         { 0x5e, 0x07 },
105         { 0x50, 0xdc }, { 0x51, 0x01 },
106         { 0x50, 0xdd }, { 0x51, 0xf4 },
107         { 0x50, 0xde }, { 0x51, 0x01 },
108         { 0x50, 0xdf }, { 0x51, 0xf4 },
109         { 0x50, 0xe0 }, { 0x51, 0x01 },
110         { 0x50, 0xe1 }, { 0x51, 0xf4 },
111         { 0x50, 0xb0 }, { 0x51, 0x07 },
112         { 0x50, 0xb2 }, { 0x51, 0xff },
113         { 0x50, 0xb3 }, { 0x51, 0xff },
114         { 0x50, 0xb4 }, { 0x51, 0xff },
115         { 0x50, 0xb5 }, { 0x51, 0xff },
116         { 0x50, 0xb6 }, { 0x51, 0xff },
117         { 0x50, 0xb7 }, { 0x51, 0xff },
118         { 0x50, 0x50 }, { 0x51, 0x02 },
119         { 0x50, 0x51 }, { 0x51, 0x04 },
120         { 0x45, 0x04 },
121         { 0x48, 0x04 },
122         { 0x50, 0xd5 }, { 0x51, 0x01 },         /* Serial */
123         { 0x50, 0xd6 }, { 0x51, 0x1f },
124         { 0x50, 0xd2 }, { 0x51, 0x03 },
125         { 0x50, 0xd7 }, { 0x51, 0x3f },
126         { 0x1c, 0x01 },
127         { 0x28, 0x06 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x03 },
128         { 0x28, 0x07 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0d },
129         { 0x28, 0x08 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x02 },
130         { 0x28, 0x09 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x01 },
131         { 0x28, 0x0a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x21 },
132         { 0x28, 0x0b }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x29 },
133         { 0x28, 0x0c }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x16 },
134         { 0x28, 0x0d }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x31 },
135         { 0x28, 0x0e }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0e },
136         { 0x28, 0x0f }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x4e },
137         { 0x28, 0x10 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x46 },
138         { 0x28, 0x11 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0f },
139         { 0x28, 0x12 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x56 },
140         { 0x28, 0x13 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x35 },
141         { 0x28, 0x14 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbe },
142         { 0x28, 0x15 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0x84 },
143         { 0x28, 0x16 }, { 0x29, 0x00 }, { 0x2a, 0x03 }, { 0x2b, 0xee },
144         { 0x28, 0x17 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x98 },
145         { 0x28, 0x18 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x9f },
146         { 0x28, 0x19 }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0xb2 },
147         { 0x28, 0x1a }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0xc2 },
148         { 0x28, 0x1b }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0x4a },
149         { 0x28, 0x1c }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbc },
150         { 0x28, 0x1d }, { 0x29, 0x00 }, { 0x2a, 0x04 }, { 0x2b, 0xba },
151         { 0x28, 0x1e }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0x14 },
152         { 0x50, 0x1e }, { 0x51, 0x5d },
153         { 0x50, 0x22 }, { 0x51, 0x00 },
154         { 0x50, 0x23 }, { 0x51, 0xc8 },
155         { 0x50, 0x24 }, { 0x51, 0x00 },
156         { 0x50, 0x25 }, { 0x51, 0xf0 },
157         { 0x50, 0x26 }, { 0x51, 0x00 },
158         { 0x50, 0x27 }, { 0x51, 0xc3 },
159         { 0x50, 0x39 }, { 0x51, 0x02 },
160         { 0x50, 0xd5 }, { 0x51, 0x01 },
161         { 0xd0, 0x00 },
162 };
163
164 static struct regdata mb86a20s_reset_reception[] = {
165         { 0x70, 0xf0 },
166         { 0x70, 0xff },
167         { 0x08, 0x01 },
168         { 0x08, 0x00 },
169 };
170
171 static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,
172                              u8 i2c_addr, int reg, int data)
173 {
174         u8 buf[] = { reg, data };
175         struct i2c_msg msg = {
176                 .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
177         };
178         int rc;
179
180         rc = i2c_transfer(state->i2c, &msg, 1);
181         if (rc != 1) {
182                 printk("%s: writereg error (rc == %i, reg == 0x%02x,"
183                          " data == 0x%02x)\n", __func__, rc, reg, data);
184                 return rc;
185         }
186
187         return 0;
188 }
189
190 static int mb86a20s_i2c_writeregdata(struct mb86a20s_state *state,
191                                      u8 i2c_addr, struct regdata *rd, int size)
192 {
193         int i, rc;
194
195         for (i = 0; i < size; i++) {
196                 rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg,
197                                            rd[i].data);
198                 if (rc < 0)
199                         return rc;
200         }
201         return 0;
202 }
203
204 static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,
205                                 u8 i2c_addr, u8 reg)
206 {
207         u8 val;
208         int rc;
209         struct i2c_msg msg[] = {
210                 { .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
211                 { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
212         };
213
214         rc = i2c_transfer(state->i2c, msg, 2);
215
216         if (rc != 2) {
217                 rc("%s: reg=0x%x (error=%d)\n", __func__, reg, rc);
218                 return rc;
219         }
220
221         return val;
222 }
223
224 #define mb86a20s_readreg(state, reg) \
225         mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
226 #define mb86a20s_writereg(state, reg, val) \
227         mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
228 #define mb86a20s_writeregdata(state, regdata) \
229         mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
230         regdata, ARRAY_SIZE(regdata))
231
232 static int mb86a20s_initfe(struct dvb_frontend *fe)
233 {
234         struct mb86a20s_state *state = fe->demodulator_priv;
235         int rc;
236         u8  regD5 = 1;
237
238         dprintk("\n");
239
240         if (fe->ops.i2c_gate_ctrl)
241                 fe->ops.i2c_gate_ctrl(fe, 0);
242
243         /* Initialize the frontend */
244         rc = mb86a20s_writeregdata(state, mb86a20s_init);
245         if (rc < 0)
246                 goto err;
247
248         if (!state->config->is_serial) {
249                 regD5 &= ~1;
250
251                 rc = mb86a20s_writereg(state, 0x50, 0xd5);
252                 if (rc < 0)
253                         goto err;
254                 rc = mb86a20s_writereg(state, 0x51, regD5);
255                 if (rc < 0)
256                         goto err;
257         }
258
259         if (fe->ops.i2c_gate_ctrl)
260                 fe->ops.i2c_gate_ctrl(fe, 1);
261
262 err:
263         if (rc < 0) {
264                 state->need_init = true;
265                 printk(KERN_INFO "mb86a20s: Init failed. Will try again later\n");
266         } else {
267                 state->need_init = false;
268                 dprintk("Initialization succeeded.\n");
269         }
270         return rc;
271 }
272
273 static int mb86a20s_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
274 {
275         struct mb86a20s_state *state = fe->demodulator_priv;
276         unsigned rf_max, rf_min, rf;
277         u8       val;
278
279         dprintk("\n");
280
281         if (fe->ops.i2c_gate_ctrl)
282                 fe->ops.i2c_gate_ctrl(fe, 0);
283
284         /* Does a binary search to get RF strength */
285         rf_max = 0xfff;
286         rf_min = 0;
287         do {
288                 rf = (rf_max + rf_min) / 2;
289                 mb86a20s_writereg(state, 0x04, 0x1f);
290                 mb86a20s_writereg(state, 0x05, rf >> 8);
291                 mb86a20s_writereg(state, 0x04, 0x20);
292                 mb86a20s_writereg(state, 0x04, rf);
293
294                 val = mb86a20s_readreg(state, 0x02);
295                 if (val & 0x08)
296                         rf_min = (rf_max + rf_min) / 2;
297                 else
298                         rf_max = (rf_max + rf_min) / 2;
299                 if (rf_max - rf_min < 4) {
300                         *strength = (((rf_max + rf_min) / 2) * 65535) / 4095;
301                         break;
302                 }
303         } while (1);
304
305         dprintk("signal strength = %d\n", *strength);
306
307         if (fe->ops.i2c_gate_ctrl)
308                 fe->ops.i2c_gate_ctrl(fe, 1);
309
310         return 0;
311 }
312
313 static int mb86a20s_read_status(struct dvb_frontend *fe, fe_status_t *status)
314 {
315         struct mb86a20s_state *state = fe->demodulator_priv;
316         u8 val;
317
318         dprintk("\n");
319         *status = 0;
320
321         if (fe->ops.i2c_gate_ctrl)
322                 fe->ops.i2c_gate_ctrl(fe, 0);
323         val = mb86a20s_readreg(state, 0x0a) & 0xf;
324         if (fe->ops.i2c_gate_ctrl)
325                 fe->ops.i2c_gate_ctrl(fe, 1);
326
327         if (val >= 2)
328                 *status |= FE_HAS_SIGNAL;
329
330         if (val >= 4)
331                 *status |= FE_HAS_CARRIER;
332
333         if (val >= 5)
334                 *status |= FE_HAS_VITERBI;
335
336         if (val >= 7)
337                 *status |= FE_HAS_SYNC;
338
339         if (val >= 8)                           /* Maybe 9? */
340                 *status |= FE_HAS_LOCK;
341
342         dprintk("val = %d, status = 0x%02x\n", val, *status);
343
344         return 0;
345 }
346
347 static int mb86a20s_set_frontend(struct dvb_frontend *fe)
348 {
349         struct mb86a20s_state *state = fe->demodulator_priv;
350         int rc;
351 #if 0
352         /*
353          * FIXME: Properly implement the set frontend properties
354          */
355         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
356 #endif
357
358         dprintk("\n");
359
360         if (fe->ops.i2c_gate_ctrl)
361                 fe->ops.i2c_gate_ctrl(fe, 1);
362         dprintk("Calling tuner set parameters\n");
363         fe->ops.tuner_ops.set_params(fe);
364
365         /*
366          * Make it more reliable: if, for some reason, the initial
367          * device initialization doesn't happen, initialize it when
368          * a SBTVD parameters are adjusted.
369          *
370          * Unfortunately, due to a hard to track bug at tda829x/tda18271,
371          * the agc callback logic is not called during DVB attach time,
372          * causing mb86a20s to not be initialized with Kworld SBTVD.
373          * So, this hack is needed, in order to make Kworld SBTVD to work.
374          */
375         if (state->need_init)
376                 mb86a20s_initfe(fe);
377
378         if (fe->ops.i2c_gate_ctrl)
379                 fe->ops.i2c_gate_ctrl(fe, 0);
380         rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);
381         if (fe->ops.i2c_gate_ctrl)
382                 fe->ops.i2c_gate_ctrl(fe, 1);
383
384         return rc;
385 }
386
387 static int mb86a20s_get_modulation(struct mb86a20s_state *state,
388                                    unsigned layer)
389 {
390         int rc;
391         static unsigned char reg[] = {
392                 [0] = 0x86,     /* Layer A */
393                 [1] = 0x8a,     /* Layer B */
394                 [2] = 0x8e,     /* Layer C */
395         };
396
397         if (layer > ARRAY_SIZE(reg))
398                 return -EINVAL;
399         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
400         if (rc < 0)
401                 return rc;
402         rc = mb86a20s_readreg(state, 0x6e);
403         if (rc < 0)
404                 return rc;
405         switch ((rc & 0x70) >> 4) {
406         case 0:
407                 return DQPSK;
408         case 1:
409                 return QPSK;
410         case 2:
411                 return QAM_16;
412         case 3:
413                 return QAM_64;
414         default:
415                 return QAM_AUTO;
416         }
417 }
418
419 static int mb86a20s_get_fec(struct mb86a20s_state *state,
420                             unsigned layer)
421 {
422         int rc;
423
424         static unsigned char reg[] = {
425                 [0] = 0x87,     /* Layer A */
426                 [1] = 0x8b,     /* Layer B */
427                 [2] = 0x8f,     /* Layer C */
428         };
429
430         if (layer > ARRAY_SIZE(reg))
431                 return -EINVAL;
432         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
433         if (rc < 0)
434                 return rc;
435         rc = mb86a20s_readreg(state, 0x6e);
436         if (rc < 0)
437                 return rc;
438         switch (rc) {
439         case 0:
440                 return FEC_1_2;
441         case 1:
442                 return FEC_2_3;
443         case 2:
444                 return FEC_3_4;
445         case 3:
446                 return FEC_5_6;
447         case 4:
448                 return FEC_7_8;
449         default:
450                 return FEC_AUTO;
451         }
452 }
453
454 static int mb86a20s_get_interleaving(struct mb86a20s_state *state,
455                                      unsigned layer)
456 {
457         int rc;
458
459         static unsigned char reg[] = {
460                 [0] = 0x88,     /* Layer A */
461                 [1] = 0x8c,     /* Layer B */
462                 [2] = 0x90,     /* Layer C */
463         };
464
465         if (layer > ARRAY_SIZE(reg))
466                 return -EINVAL;
467         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
468         if (rc < 0)
469                 return rc;
470         rc = mb86a20s_readreg(state, 0x6e);
471         if (rc < 0)
472                 return rc;
473         if (rc > 3)
474                 return -EINVAL; /* Not used */
475         return rc;
476 }
477
478 static int mb86a20s_get_segment_count(struct mb86a20s_state *state,
479                                       unsigned layer)
480 {
481         int rc, count;
482
483         static unsigned char reg[] = {
484                 [0] = 0x89,     /* Layer A */
485                 [1] = 0x8d,     /* Layer B */
486                 [2] = 0x91,     /* Layer C */
487         };
488
489         if (layer > ARRAY_SIZE(reg))
490                 return -EINVAL;
491         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
492         if (rc < 0)
493                 return rc;
494         rc = mb86a20s_readreg(state, 0x6e);
495         if (rc < 0)
496                 return rc;
497         count = (rc >> 4) & 0x0f;
498
499         return count;
500 }
501
502 static int mb86a20s_get_frontend(struct dvb_frontend *fe)
503 {
504         struct mb86a20s_state *state = fe->demodulator_priv;
505         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
506         int i, rc;
507
508         /* Fixed parameters */
509         p->delivery_system = SYS_ISDBT;
510         p->bandwidth_hz = 6000000;
511
512         if (fe->ops.i2c_gate_ctrl)
513                 fe->ops.i2c_gate_ctrl(fe, 0);
514
515         /* Check for partial reception */
516         rc = mb86a20s_writereg(state, 0x6d, 0x85);
517         if (rc >= 0)
518                 rc = mb86a20s_readreg(state, 0x6e);
519         if (rc >= 0)
520                 p->isdbt_partial_reception = (rc & 0x10) ? 1 : 0;
521
522         /* Get per-layer data */
523         p->isdbt_layer_enabled = 0;
524         for (i = 0; i < 3; i++) {
525                 rc = mb86a20s_get_segment_count(state, i);
526                         if (rc >= 0 && rc < 14)
527                                 p->layer[i].segment_count = rc;
528                 if (rc == 0x0f)
529                         continue;
530                 p->isdbt_layer_enabled |= 1 << i;
531                 rc = mb86a20s_get_modulation(state, i);
532                         if (rc >= 0)
533                                 p->layer[i].modulation = rc;
534                 rc = mb86a20s_get_fec(state, i);
535                         if (rc >= 0)
536                                 p->layer[i].fec = rc;
537                 rc = mb86a20s_get_interleaving(state, i);
538                         if (rc >= 0)
539                                 p->layer[i].interleaving = rc;
540         }
541
542         p->isdbt_sb_mode = 0;
543         rc = mb86a20s_writereg(state, 0x6d, 0x84);
544         if ((rc >= 0) && ((rc & 0x60) == 0x20)) {
545                 p->isdbt_sb_mode = 1;
546                 /* At least, one segment should exist */
547                 if (!p->isdbt_sb_segment_count)
548                         p->isdbt_sb_segment_count = 1;
549         } else
550                 p->isdbt_sb_segment_count = 0;
551
552         /* Get transmission mode and guard interval */
553         p->transmission_mode = TRANSMISSION_MODE_AUTO;
554         p->guard_interval = GUARD_INTERVAL_AUTO;
555         rc = mb86a20s_readreg(state, 0x07);
556         if (rc >= 0) {
557                 if ((rc & 0x60) == 0x20) {
558                         switch (rc & 0x0c >> 2) {
559                         case 0:
560                                 p->transmission_mode = TRANSMISSION_MODE_2K;
561                                 break;
562                         case 1:
563                                 p->transmission_mode = TRANSMISSION_MODE_4K;
564                                 break;
565                         case 2:
566                                 p->transmission_mode = TRANSMISSION_MODE_8K;
567                                 break;
568                         }
569                 }
570                 if (!(rc & 0x10)) {
571                         switch (rc & 0x3) {
572                         case 0:
573                                 p->guard_interval = GUARD_INTERVAL_1_4;
574                                 break;
575                         case 1:
576                                 p->guard_interval = GUARD_INTERVAL_1_8;
577                                 break;
578                         case 2:
579                                 p->guard_interval = GUARD_INTERVAL_1_16;
580                                 break;
581                         }
582                 }
583         }
584
585         if (fe->ops.i2c_gate_ctrl)
586                 fe->ops.i2c_gate_ctrl(fe, 1);
587
588         return 0;
589 }
590
591 static int mb86a20s_tune(struct dvb_frontend *fe,
592                         bool re_tune,
593                         unsigned int mode_flags,
594                         unsigned int *delay,
595                         fe_status_t *status)
596 {
597         int rc = 0;
598
599         dprintk("\n");
600
601         if (re_tune)
602                 rc = mb86a20s_set_frontend(fe);
603
604         if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
605                 mb86a20s_read_status(fe, status);
606
607         return rc;
608 }
609
610 static void mb86a20s_release(struct dvb_frontend *fe)
611 {
612         struct mb86a20s_state *state = fe->demodulator_priv;
613
614         dprintk("\n");
615
616         kfree(state);
617 }
618
619 static struct dvb_frontend_ops mb86a20s_ops;
620
621 struct dvb_frontend *mb86a20s_attach(const struct mb86a20s_config *config,
622                                     struct i2c_adapter *i2c)
623 {
624         u8      rev;
625
626         /* allocate memory for the internal state */
627         struct mb86a20s_state *state =
628                 kzalloc(sizeof(struct mb86a20s_state), GFP_KERNEL);
629
630         dprintk("\n");
631         if (state == NULL) {
632                 rc("Unable to kzalloc\n");
633                 goto error;
634         }
635
636         /* setup the state */
637         state->config = config;
638         state->i2c = i2c;
639
640         /* create dvb_frontend */
641         memcpy(&state->frontend.ops, &mb86a20s_ops,
642                 sizeof(struct dvb_frontend_ops));
643         state->frontend.demodulator_priv = state;
644
645         /* Check if it is a mb86a20s frontend */
646         rev = mb86a20s_readreg(state, 0);
647
648         if (rev == 0x13) {
649                 printk(KERN_INFO "Detected a Fujitsu mb86a20s frontend\n");
650         } else {
651                 printk(KERN_ERR "Frontend revision %d is unknown - aborting.\n",
652                        rev);
653                 goto error;
654         }
655
656         return &state->frontend;
657
658 error:
659         kfree(state);
660         return NULL;
661 }
662 EXPORT_SYMBOL(mb86a20s_attach);
663
664 static struct dvb_frontend_ops mb86a20s_ops = {
665         .delsys = { SYS_ISDBT },
666         /* Use dib8000 values per default */
667         .info = {
668                 .name = "Fujitsu mb86A20s",
669                 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER |
670                         FE_CAN_FEC_1_2  | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
671                         FE_CAN_FEC_5_6  | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
672                         FE_CAN_QPSK     | FE_CAN_QAM_16  | FE_CAN_QAM_64 |
673                         FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_QAM_AUTO |
674                         FE_CAN_GUARD_INTERVAL_AUTO    | FE_CAN_HIERARCHY_AUTO,
675                 /* Actually, those values depend on the used tuner */
676                 .frequency_min = 45000000,
677                 .frequency_max = 864000000,
678                 .frequency_stepsize = 62500,
679         },
680
681         .release = mb86a20s_release,
682
683         .init = mb86a20s_initfe,
684         .set_frontend = mb86a20s_set_frontend,
685         .get_frontend = mb86a20s_get_frontend,
686         .read_status = mb86a20s_read_status,
687         .read_signal_strength = mb86a20s_read_signal_strength,
688         .tune = mb86a20s_tune,
689 };
690
691 MODULE_DESCRIPTION("DVB Frontend module for Fujitsu mb86A20s hardware");
692 MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
693 MODULE_LICENSE("GPL");