KVM: Per-vcpu inodes
[linux-2.6.git] / drivers / kvm / vmx.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * Copyright (C) 2006 Qumranet, Inc.
8  *
9  * Authors:
10  *   Avi Kivity   <avi@qumranet.com>
11  *   Yaniv Kamay  <yaniv@qumranet.com>
12  *
13  * This work is licensed under the terms of the GNU GPL, version 2.  See
14  * the COPYING file in the top-level directory.
15  *
16  */
17
18 #include "kvm.h"
19 #include "vmx.h"
20 #include "kvm_vmx.h"
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/mm.h>
24 #include <linux/highmem.h>
25 #include <linux/profile.h>
26 #include <asm/io.h>
27 #include <asm/desc.h>
28
29 #include "segment_descriptor.h"
30
31 MODULE_AUTHOR("Qumranet");
32 MODULE_LICENSE("GPL");
33
34 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
35 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
36
37 #ifdef CONFIG_X86_64
38 #define HOST_IS_64 1
39 #else
40 #define HOST_IS_64 0
41 #endif
42
43 static struct vmcs_descriptor {
44         int size;
45         int order;
46         u32 revision_id;
47 } vmcs_descriptor;
48
49 #define VMX_SEGMENT_FIELD(seg)                                  \
50         [VCPU_SREG_##seg] = {                                   \
51                 .selector = GUEST_##seg##_SELECTOR,             \
52                 .base = GUEST_##seg##_BASE,                     \
53                 .limit = GUEST_##seg##_LIMIT,                   \
54                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
55         }
56
57 static struct kvm_vmx_segment_field {
58         unsigned selector;
59         unsigned base;
60         unsigned limit;
61         unsigned ar_bytes;
62 } kvm_vmx_segment_fields[] = {
63         VMX_SEGMENT_FIELD(CS),
64         VMX_SEGMENT_FIELD(DS),
65         VMX_SEGMENT_FIELD(ES),
66         VMX_SEGMENT_FIELD(FS),
67         VMX_SEGMENT_FIELD(GS),
68         VMX_SEGMENT_FIELD(SS),
69         VMX_SEGMENT_FIELD(TR),
70         VMX_SEGMENT_FIELD(LDTR),
71 };
72
73 static const u32 vmx_msr_index[] = {
74 #ifdef CONFIG_X86_64
75         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
76 #endif
77         MSR_EFER, MSR_K6_STAR,
78 };
79 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
80
81 static inline int is_page_fault(u32 intr_info)
82 {
83         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
84                              INTR_INFO_VALID_MASK)) ==
85                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
86 }
87
88 static inline int is_external_interrupt(u32 intr_info)
89 {
90         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
91                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
92 }
93
94 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
95 {
96         int i;
97
98         for (i = 0; i < vcpu->nmsrs; ++i)
99                 if (vcpu->guest_msrs[i].index == msr)
100                         return &vcpu->guest_msrs[i];
101         return NULL;
102 }
103
104 static void vmcs_clear(struct vmcs *vmcs)
105 {
106         u64 phys_addr = __pa(vmcs);
107         u8 error;
108
109         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
110                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
111                       : "cc", "memory");
112         if (error)
113                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
114                        vmcs, phys_addr);
115 }
116
117 static void __vcpu_clear(void *arg)
118 {
119         struct kvm_vcpu *vcpu = arg;
120         int cpu = raw_smp_processor_id();
121
122         if (vcpu->cpu == cpu)
123                 vmcs_clear(vcpu->vmcs);
124         if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
125                 per_cpu(current_vmcs, cpu) = NULL;
126 }
127
128 static void vcpu_clear(struct kvm_vcpu *vcpu)
129 {
130         if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
131                 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
132         else
133                 __vcpu_clear(vcpu);
134         vcpu->launched = 0;
135 }
136
137 static unsigned long vmcs_readl(unsigned long field)
138 {
139         unsigned long value;
140
141         asm volatile (ASM_VMX_VMREAD_RDX_RAX
142                       : "=a"(value) : "d"(field) : "cc");
143         return value;
144 }
145
146 static u16 vmcs_read16(unsigned long field)
147 {
148         return vmcs_readl(field);
149 }
150
151 static u32 vmcs_read32(unsigned long field)
152 {
153         return vmcs_readl(field);
154 }
155
156 static u64 vmcs_read64(unsigned long field)
157 {
158 #ifdef CONFIG_X86_64
159         return vmcs_readl(field);
160 #else
161         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
162 #endif
163 }
164
165 static noinline void vmwrite_error(unsigned long field, unsigned long value)
166 {
167         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
168                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
169         dump_stack();
170 }
171
172 static void vmcs_writel(unsigned long field, unsigned long value)
173 {
174         u8 error;
175
176         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
177                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
178         if (unlikely(error))
179                 vmwrite_error(field, value);
180 }
181
182 static void vmcs_write16(unsigned long field, u16 value)
183 {
184         vmcs_writel(field, value);
185 }
186
187 static void vmcs_write32(unsigned long field, u32 value)
188 {
189         vmcs_writel(field, value);
190 }
191
192 static void vmcs_write64(unsigned long field, u64 value)
193 {
194 #ifdef CONFIG_X86_64
195         vmcs_writel(field, value);
196 #else
197         vmcs_writel(field, value);
198         asm volatile ("");
199         vmcs_writel(field+1, value >> 32);
200 #endif
201 }
202
203 /*
204  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
205  * vcpu mutex is already taken.
206  */
207 static void vmx_vcpu_load(struct kvm_vcpu *vcpu)
208 {
209         u64 phys_addr = __pa(vcpu->vmcs);
210         int cpu;
211
212         cpu = get_cpu();
213
214         if (vcpu->cpu != cpu)
215                 vcpu_clear(vcpu);
216
217         if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
218                 u8 error;
219
220                 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
221                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
222                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
223                               : "cc");
224                 if (error)
225                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
226                                vcpu->vmcs, phys_addr);
227         }
228
229         if (vcpu->cpu != cpu) {
230                 struct descriptor_table dt;
231                 unsigned long sysenter_esp;
232
233                 vcpu->cpu = cpu;
234                 /*
235                  * Linux uses per-cpu TSS and GDT, so set these when switching
236                  * processors.
237                  */
238                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
239                 get_gdt(&dt);
240                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
241
242                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
243                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
244         }
245 }
246
247 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
248 {
249         put_cpu();
250 }
251
252 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
253 {
254         vcpu_clear(vcpu);
255 }
256
257 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
258 {
259         return vmcs_readl(GUEST_RFLAGS);
260 }
261
262 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
263 {
264         vmcs_writel(GUEST_RFLAGS, rflags);
265 }
266
267 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
268 {
269         unsigned long rip;
270         u32 interruptibility;
271
272         rip = vmcs_readl(GUEST_RIP);
273         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
274         vmcs_writel(GUEST_RIP, rip);
275
276         /*
277          * We emulated an instruction, so temporary interrupt blocking
278          * should be removed, if set.
279          */
280         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
281         if (interruptibility & 3)
282                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
283                              interruptibility & ~3);
284         vcpu->interrupt_window_open = 1;
285 }
286
287 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
288 {
289         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
290                vmcs_readl(GUEST_RIP));
291         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
292         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
293                      GP_VECTOR |
294                      INTR_TYPE_EXCEPTION |
295                      INTR_INFO_DELIEVER_CODE_MASK |
296                      INTR_INFO_VALID_MASK);
297 }
298
299 /*
300  * reads and returns guest's timestamp counter "register"
301  * guest_tsc = host_tsc + tsc_offset    -- 21.3
302  */
303 static u64 guest_read_tsc(void)
304 {
305         u64 host_tsc, tsc_offset;
306
307         rdtscll(host_tsc);
308         tsc_offset = vmcs_read64(TSC_OFFSET);
309         return host_tsc + tsc_offset;
310 }
311
312 /*
313  * writes 'guest_tsc' into guest's timestamp counter "register"
314  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
315  */
316 static void guest_write_tsc(u64 guest_tsc)
317 {
318         u64 host_tsc;
319
320         rdtscll(host_tsc);
321         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
322 }
323
324 static void reload_tss(void)
325 {
326 #ifndef CONFIG_X86_64
327
328         /*
329          * VT restores TR but not its size.  Useless.
330          */
331         struct descriptor_table gdt;
332         struct segment_descriptor *descs;
333
334         get_gdt(&gdt);
335         descs = (void *)gdt.base;
336         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
337         load_TR_desc();
338 #endif
339 }
340
341 /*
342  * Reads an msr value (of 'msr_index') into 'pdata'.
343  * Returns 0 on success, non-0 otherwise.
344  * Assumes vcpu_load() was already called.
345  */
346 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
347 {
348         u64 data;
349         struct vmx_msr_entry *msr;
350
351         if (!pdata) {
352                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
353                 return -EINVAL;
354         }
355
356         switch (msr_index) {
357 #ifdef CONFIG_X86_64
358         case MSR_FS_BASE:
359                 data = vmcs_readl(GUEST_FS_BASE);
360                 break;
361         case MSR_GS_BASE:
362                 data = vmcs_readl(GUEST_GS_BASE);
363                 break;
364         case MSR_EFER:
365                 return kvm_get_msr_common(vcpu, msr_index, pdata);
366 #endif
367         case MSR_IA32_TIME_STAMP_COUNTER:
368                 data = guest_read_tsc();
369                 break;
370         case MSR_IA32_SYSENTER_CS:
371                 data = vmcs_read32(GUEST_SYSENTER_CS);
372                 break;
373         case MSR_IA32_SYSENTER_EIP:
374                 data = vmcs_read32(GUEST_SYSENTER_EIP);
375                 break;
376         case MSR_IA32_SYSENTER_ESP:
377                 data = vmcs_read32(GUEST_SYSENTER_ESP);
378                 break;
379         default:
380                 msr = find_msr_entry(vcpu, msr_index);
381                 if (msr) {
382                         data = msr->data;
383                         break;
384                 }
385                 return kvm_get_msr_common(vcpu, msr_index, pdata);
386         }
387
388         *pdata = data;
389         return 0;
390 }
391
392 /*
393  * Writes msr value into into the appropriate "register".
394  * Returns 0 on success, non-0 otherwise.
395  * Assumes vcpu_load() was already called.
396  */
397 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
398 {
399         struct vmx_msr_entry *msr;
400         switch (msr_index) {
401 #ifdef CONFIG_X86_64
402         case MSR_EFER:
403                 return kvm_set_msr_common(vcpu, msr_index, data);
404         case MSR_FS_BASE:
405                 vmcs_writel(GUEST_FS_BASE, data);
406                 break;
407         case MSR_GS_BASE:
408                 vmcs_writel(GUEST_GS_BASE, data);
409                 break;
410 #endif
411         case MSR_IA32_SYSENTER_CS:
412                 vmcs_write32(GUEST_SYSENTER_CS, data);
413                 break;
414         case MSR_IA32_SYSENTER_EIP:
415                 vmcs_write32(GUEST_SYSENTER_EIP, data);
416                 break;
417         case MSR_IA32_SYSENTER_ESP:
418                 vmcs_write32(GUEST_SYSENTER_ESP, data);
419                 break;
420         case MSR_IA32_TIME_STAMP_COUNTER:
421                 guest_write_tsc(data);
422                 break;
423         default:
424                 msr = find_msr_entry(vcpu, msr_index);
425                 if (msr) {
426                         msr->data = data;
427                         break;
428                 }
429                 return kvm_set_msr_common(vcpu, msr_index, data);
430                 msr->data = data;
431                 break;
432         }
433
434         return 0;
435 }
436
437 /*
438  * Sync the rsp and rip registers into the vcpu structure.  This allows
439  * registers to be accessed by indexing vcpu->regs.
440  */
441 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
442 {
443         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
444         vcpu->rip = vmcs_readl(GUEST_RIP);
445 }
446
447 /*
448  * Syncs rsp and rip back into the vmcs.  Should be called after possible
449  * modification.
450  */
451 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
452 {
453         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
454         vmcs_writel(GUEST_RIP, vcpu->rip);
455 }
456
457 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
458 {
459         unsigned long dr7 = 0x400;
460         u32 exception_bitmap;
461         int old_singlestep;
462
463         exception_bitmap = vmcs_read32(EXCEPTION_BITMAP);
464         old_singlestep = vcpu->guest_debug.singlestep;
465
466         vcpu->guest_debug.enabled = dbg->enabled;
467         if (vcpu->guest_debug.enabled) {
468                 int i;
469
470                 dr7 |= 0x200;  /* exact */
471                 for (i = 0; i < 4; ++i) {
472                         if (!dbg->breakpoints[i].enabled)
473                                 continue;
474                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
475                         dr7 |= 2 << (i*2);    /* global enable */
476                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
477                 }
478
479                 exception_bitmap |= (1u << 1);  /* Trap debug exceptions */
480
481                 vcpu->guest_debug.singlestep = dbg->singlestep;
482         } else {
483                 exception_bitmap &= ~(1u << 1); /* Ignore debug exceptions */
484                 vcpu->guest_debug.singlestep = 0;
485         }
486
487         if (old_singlestep && !vcpu->guest_debug.singlestep) {
488                 unsigned long flags;
489
490                 flags = vmcs_readl(GUEST_RFLAGS);
491                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
492                 vmcs_writel(GUEST_RFLAGS, flags);
493         }
494
495         vmcs_write32(EXCEPTION_BITMAP, exception_bitmap);
496         vmcs_writel(GUEST_DR7, dr7);
497
498         return 0;
499 }
500
501 static __init int cpu_has_kvm_support(void)
502 {
503         unsigned long ecx = cpuid_ecx(1);
504         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
505 }
506
507 static __init int vmx_disabled_by_bios(void)
508 {
509         u64 msr;
510
511         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
512         return (msr & 5) == 1; /* locked but not enabled */
513 }
514
515 static void hardware_enable(void *garbage)
516 {
517         int cpu = raw_smp_processor_id();
518         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
519         u64 old;
520
521         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
522         if ((old & 5) != 5)
523                 /* enable and lock */
524                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
525         write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
526         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
527                       : "memory", "cc");
528 }
529
530 static void hardware_disable(void *garbage)
531 {
532         asm volatile (ASM_VMX_VMXOFF : : : "cc");
533 }
534
535 static __init void setup_vmcs_descriptor(void)
536 {
537         u32 vmx_msr_low, vmx_msr_high;
538
539         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
540         vmcs_descriptor.size = vmx_msr_high & 0x1fff;
541         vmcs_descriptor.order = get_order(vmcs_descriptor.size);
542         vmcs_descriptor.revision_id = vmx_msr_low;
543 }
544
545 static struct vmcs *alloc_vmcs_cpu(int cpu)
546 {
547         int node = cpu_to_node(cpu);
548         struct page *pages;
549         struct vmcs *vmcs;
550
551         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
552         if (!pages)
553                 return NULL;
554         vmcs = page_address(pages);
555         memset(vmcs, 0, vmcs_descriptor.size);
556         vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
557         return vmcs;
558 }
559
560 static struct vmcs *alloc_vmcs(void)
561 {
562         return alloc_vmcs_cpu(raw_smp_processor_id());
563 }
564
565 static void free_vmcs(struct vmcs *vmcs)
566 {
567         free_pages((unsigned long)vmcs, vmcs_descriptor.order);
568 }
569
570 static __exit void free_kvm_area(void)
571 {
572         int cpu;
573
574         for_each_online_cpu(cpu)
575                 free_vmcs(per_cpu(vmxarea, cpu));
576 }
577
578 extern struct vmcs *alloc_vmcs_cpu(int cpu);
579
580 static __init int alloc_kvm_area(void)
581 {
582         int cpu;
583
584         for_each_online_cpu(cpu) {
585                 struct vmcs *vmcs;
586
587                 vmcs = alloc_vmcs_cpu(cpu);
588                 if (!vmcs) {
589                         free_kvm_area();
590                         return -ENOMEM;
591                 }
592
593                 per_cpu(vmxarea, cpu) = vmcs;
594         }
595         return 0;
596 }
597
598 static __init int hardware_setup(void)
599 {
600         setup_vmcs_descriptor();
601         return alloc_kvm_area();
602 }
603
604 static __exit void hardware_unsetup(void)
605 {
606         free_kvm_area();
607 }
608
609 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
610 {
611         if (vcpu->rmode.active)
612                 vmcs_write32(EXCEPTION_BITMAP, ~0);
613         else
614                 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
615 }
616
617 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
618 {
619         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
620
621         if (vmcs_readl(sf->base) == save->base) {
622                 vmcs_write16(sf->selector, save->selector);
623                 vmcs_writel(sf->base, save->base);
624                 vmcs_write32(sf->limit, save->limit);
625                 vmcs_write32(sf->ar_bytes, save->ar);
626         } else {
627                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
628                         << AR_DPL_SHIFT;
629                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
630         }
631 }
632
633 static void enter_pmode(struct kvm_vcpu *vcpu)
634 {
635         unsigned long flags;
636
637         vcpu->rmode.active = 0;
638
639         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
640         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
641         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
642
643         flags = vmcs_readl(GUEST_RFLAGS);
644         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
645         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
646         vmcs_writel(GUEST_RFLAGS, flags);
647
648         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
649                         (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
650
651         update_exception_bitmap(vcpu);
652
653         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
654         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
655         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
656         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
657
658         vmcs_write16(GUEST_SS_SELECTOR, 0);
659         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
660
661         vmcs_write16(GUEST_CS_SELECTOR,
662                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
663         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
664 }
665
666 static int rmode_tss_base(struct kvm* kvm)
667 {
668         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
669         return base_gfn << PAGE_SHIFT;
670 }
671
672 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
673 {
674         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
675
676         save->selector = vmcs_read16(sf->selector);
677         save->base = vmcs_readl(sf->base);
678         save->limit = vmcs_read32(sf->limit);
679         save->ar = vmcs_read32(sf->ar_bytes);
680         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
681         vmcs_write32(sf->limit, 0xffff);
682         vmcs_write32(sf->ar_bytes, 0xf3);
683 }
684
685 static void enter_rmode(struct kvm_vcpu *vcpu)
686 {
687         unsigned long flags;
688
689         vcpu->rmode.active = 1;
690
691         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
692         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
693
694         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
695         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
696
697         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
698         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
699
700         flags = vmcs_readl(GUEST_RFLAGS);
701         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
702
703         flags |= IOPL_MASK | X86_EFLAGS_VM;
704
705         vmcs_writel(GUEST_RFLAGS, flags);
706         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
707         update_exception_bitmap(vcpu);
708
709         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
710         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
711         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
712
713         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
714         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
715         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
716
717         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
718         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
719         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
720         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
721 }
722
723 #ifdef CONFIG_X86_64
724
725 static void enter_lmode(struct kvm_vcpu *vcpu)
726 {
727         u32 guest_tr_ar;
728
729         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
730         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
731                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
732                        __FUNCTION__);
733                 vmcs_write32(GUEST_TR_AR_BYTES,
734                              (guest_tr_ar & ~AR_TYPE_MASK)
735                              | AR_TYPE_BUSY_64_TSS);
736         }
737
738         vcpu->shadow_efer |= EFER_LMA;
739
740         find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
741         vmcs_write32(VM_ENTRY_CONTROLS,
742                      vmcs_read32(VM_ENTRY_CONTROLS)
743                      | VM_ENTRY_CONTROLS_IA32E_MASK);
744 }
745
746 static void exit_lmode(struct kvm_vcpu *vcpu)
747 {
748         vcpu->shadow_efer &= ~EFER_LMA;
749
750         vmcs_write32(VM_ENTRY_CONTROLS,
751                      vmcs_read32(VM_ENTRY_CONTROLS)
752                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
753 }
754
755 #endif
756
757 static void vmx_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
758 {
759         vcpu->cr0 &= KVM_GUEST_CR0_MASK;
760         vcpu->cr0 |= vmcs_readl(GUEST_CR0) & ~KVM_GUEST_CR0_MASK;
761
762         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
763         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
764 }
765
766 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
767 {
768         if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
769                 enter_pmode(vcpu);
770
771         if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
772                 enter_rmode(vcpu);
773
774 #ifdef CONFIG_X86_64
775         if (vcpu->shadow_efer & EFER_LME) {
776                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
777                         enter_lmode(vcpu);
778                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
779                         exit_lmode(vcpu);
780         }
781 #endif
782
783         vmcs_writel(CR0_READ_SHADOW, cr0);
784         vmcs_writel(GUEST_CR0,
785                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
786         vcpu->cr0 = cr0;
787 }
788
789 /*
790  * Used when restoring the VM to avoid corrupting segment registers
791  */
792 static void vmx_set_cr0_no_modeswitch(struct kvm_vcpu *vcpu, unsigned long cr0)
793 {
794         if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
795                 enter_rmode(vcpu);
796
797         vcpu->rmode.active = ((cr0 & CR0_PE_MASK) == 0);
798         update_exception_bitmap(vcpu);
799         vmcs_writel(CR0_READ_SHADOW, cr0);
800         vmcs_writel(GUEST_CR0,
801                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
802         vcpu->cr0 = cr0;
803 }
804
805 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
806 {
807         vmcs_writel(GUEST_CR3, cr3);
808 }
809
810 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
811 {
812         vmcs_writel(CR4_READ_SHADOW, cr4);
813         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
814                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
815         vcpu->cr4 = cr4;
816 }
817
818 #ifdef CONFIG_X86_64
819
820 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
821 {
822         struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
823
824         vcpu->shadow_efer = efer;
825         if (efer & EFER_LMA) {
826                 vmcs_write32(VM_ENTRY_CONTROLS,
827                                      vmcs_read32(VM_ENTRY_CONTROLS) |
828                                      VM_ENTRY_CONTROLS_IA32E_MASK);
829                 msr->data = efer;
830
831         } else {
832                 vmcs_write32(VM_ENTRY_CONTROLS,
833                                      vmcs_read32(VM_ENTRY_CONTROLS) &
834                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
835
836                 msr->data = efer & ~EFER_LME;
837         }
838 }
839
840 #endif
841
842 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
843 {
844         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
845
846         return vmcs_readl(sf->base);
847 }
848
849 static void vmx_get_segment(struct kvm_vcpu *vcpu,
850                             struct kvm_segment *var, int seg)
851 {
852         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
853         u32 ar;
854
855         var->base = vmcs_readl(sf->base);
856         var->limit = vmcs_read32(sf->limit);
857         var->selector = vmcs_read16(sf->selector);
858         ar = vmcs_read32(sf->ar_bytes);
859         if (ar & AR_UNUSABLE_MASK)
860                 ar = 0;
861         var->type = ar & 15;
862         var->s = (ar >> 4) & 1;
863         var->dpl = (ar >> 5) & 3;
864         var->present = (ar >> 7) & 1;
865         var->avl = (ar >> 12) & 1;
866         var->l = (ar >> 13) & 1;
867         var->db = (ar >> 14) & 1;
868         var->g = (ar >> 15) & 1;
869         var->unusable = (ar >> 16) & 1;
870 }
871
872 static void vmx_set_segment(struct kvm_vcpu *vcpu,
873                             struct kvm_segment *var, int seg)
874 {
875         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
876         u32 ar;
877
878         vmcs_writel(sf->base, var->base);
879         vmcs_write32(sf->limit, var->limit);
880         vmcs_write16(sf->selector, var->selector);
881         if (var->unusable)
882                 ar = 1 << 16;
883         else {
884                 ar = var->type & 15;
885                 ar |= (var->s & 1) << 4;
886                 ar |= (var->dpl & 3) << 5;
887                 ar |= (var->present & 1) << 7;
888                 ar |= (var->avl & 1) << 12;
889                 ar |= (var->l & 1) << 13;
890                 ar |= (var->db & 1) << 14;
891                 ar |= (var->g & 1) << 15;
892         }
893         if (ar == 0) /* a 0 value means unusable */
894                 ar = AR_UNUSABLE_MASK;
895         vmcs_write32(sf->ar_bytes, ar);
896 }
897
898 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
899 {
900         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
901
902         *db = (ar >> 14) & 1;
903         *l = (ar >> 13) & 1;
904 }
905
906 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
907 {
908         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
909         dt->base = vmcs_readl(GUEST_IDTR_BASE);
910 }
911
912 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
913 {
914         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
915         vmcs_writel(GUEST_IDTR_BASE, dt->base);
916 }
917
918 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
919 {
920         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
921         dt->base = vmcs_readl(GUEST_GDTR_BASE);
922 }
923
924 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
925 {
926         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
927         vmcs_writel(GUEST_GDTR_BASE, dt->base);
928 }
929
930 static int init_rmode_tss(struct kvm* kvm)
931 {
932         struct page *p1, *p2, *p3;
933         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
934         char *page;
935
936         p1 = _gfn_to_page(kvm, fn++);
937         p2 = _gfn_to_page(kvm, fn++);
938         p3 = _gfn_to_page(kvm, fn);
939
940         if (!p1 || !p2 || !p3) {
941                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
942                 return 0;
943         }
944
945         page = kmap_atomic(p1, KM_USER0);
946         memset(page, 0, PAGE_SIZE);
947         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
948         kunmap_atomic(page, KM_USER0);
949
950         page = kmap_atomic(p2, KM_USER0);
951         memset(page, 0, PAGE_SIZE);
952         kunmap_atomic(page, KM_USER0);
953
954         page = kmap_atomic(p3, KM_USER0);
955         memset(page, 0, PAGE_SIZE);
956         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
957         kunmap_atomic(page, KM_USER0);
958
959         return 1;
960 }
961
962 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
963 {
964         u32 msr_high, msr_low;
965
966         rdmsr(msr, msr_low, msr_high);
967
968         val &= msr_high;
969         val |= msr_low;
970         vmcs_write32(vmcs_field, val);
971 }
972
973 static void seg_setup(int seg)
974 {
975         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
976
977         vmcs_write16(sf->selector, 0);
978         vmcs_writel(sf->base, 0);
979         vmcs_write32(sf->limit, 0xffff);
980         vmcs_write32(sf->ar_bytes, 0x93);
981 }
982
983 /*
984  * Sets up the vmcs for emulated real mode.
985  */
986 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
987 {
988         u32 host_sysenter_cs;
989         u32 junk;
990         unsigned long a;
991         struct descriptor_table dt;
992         int i;
993         int ret = 0;
994         int nr_good_msrs;
995         extern asmlinkage void kvm_vmx_return(void);
996
997         if (!init_rmode_tss(vcpu->kvm)) {
998                 ret = -ENOMEM;
999                 goto out;
1000         }
1001
1002         memset(vcpu->regs, 0, sizeof(vcpu->regs));
1003         vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1004         vcpu->cr8 = 0;
1005         vcpu->apic_base = 0xfee00000 |
1006                         /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1007                         MSR_IA32_APICBASE_ENABLE;
1008
1009         fx_init(vcpu);
1010
1011         /*
1012          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1013          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1014          */
1015         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1016         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1017         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1018         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1019
1020         seg_setup(VCPU_SREG_DS);
1021         seg_setup(VCPU_SREG_ES);
1022         seg_setup(VCPU_SREG_FS);
1023         seg_setup(VCPU_SREG_GS);
1024         seg_setup(VCPU_SREG_SS);
1025
1026         vmcs_write16(GUEST_TR_SELECTOR, 0);
1027         vmcs_writel(GUEST_TR_BASE, 0);
1028         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1029         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1030
1031         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1032         vmcs_writel(GUEST_LDTR_BASE, 0);
1033         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1034         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1035
1036         vmcs_write32(GUEST_SYSENTER_CS, 0);
1037         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1038         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1039
1040         vmcs_writel(GUEST_RFLAGS, 0x02);
1041         vmcs_writel(GUEST_RIP, 0xfff0);
1042         vmcs_writel(GUEST_RSP, 0);
1043
1044         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1045         vmcs_writel(GUEST_DR7, 0x400);
1046
1047         vmcs_writel(GUEST_GDTR_BASE, 0);
1048         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1049
1050         vmcs_writel(GUEST_IDTR_BASE, 0);
1051         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1052
1053         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1054         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1055         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1056
1057         /* I/O */
1058         vmcs_write64(IO_BITMAP_A, 0);
1059         vmcs_write64(IO_BITMAP_B, 0);
1060
1061         guest_write_tsc(0);
1062
1063         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1064
1065         /* Special registers */
1066         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1067
1068         /* Control */
1069         vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1070                                PIN_BASED_VM_EXEC_CONTROL,
1071                                PIN_BASED_EXT_INTR_MASK   /* 20.6.1 */
1072                                | PIN_BASED_NMI_EXITING   /* 20.6.1 */
1073                         );
1074         vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1075                                CPU_BASED_VM_EXEC_CONTROL,
1076                                CPU_BASED_HLT_EXITING         /* 20.6.2 */
1077                                | CPU_BASED_CR8_LOAD_EXITING    /* 20.6.2 */
1078                                | CPU_BASED_CR8_STORE_EXITING   /* 20.6.2 */
1079                                | CPU_BASED_UNCOND_IO_EXITING   /* 20.6.2 */
1080                                | CPU_BASED_MOV_DR_EXITING
1081                                | CPU_BASED_USE_TSC_OFFSETING   /* 21.3 */
1082                         );
1083
1084         vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
1085         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1086         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1087         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1088
1089         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1090         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1091         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1092
1093         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1094         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1095         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1096         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1097         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1098         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1099 #ifdef CONFIG_X86_64
1100         rdmsrl(MSR_FS_BASE, a);
1101         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1102         rdmsrl(MSR_GS_BASE, a);
1103         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1104 #else
1105         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1106         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1107 #endif
1108
1109         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1110
1111         get_idt(&dt);
1112         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1113
1114
1115         vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1116
1117         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1118         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1119         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1120         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1121         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1122         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1123
1124         for (i = 0; i < NR_VMX_MSR; ++i) {
1125                 u32 index = vmx_msr_index[i];
1126                 u32 data_low, data_high;
1127                 u64 data;
1128                 int j = vcpu->nmsrs;
1129
1130                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1131                         continue;
1132                 if (wrmsr_safe(index, data_low, data_high) < 0)
1133                         continue;
1134                 data = data_low | ((u64)data_high << 32);
1135                 vcpu->host_msrs[j].index = index;
1136                 vcpu->host_msrs[j].reserved = 0;
1137                 vcpu->host_msrs[j].data = data;
1138                 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1139                 ++vcpu->nmsrs;
1140         }
1141         printk(KERN_DEBUG "kvm: msrs: %d\n", vcpu->nmsrs);
1142
1143         nr_good_msrs = vcpu->nmsrs - NR_BAD_MSRS;
1144         vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
1145                     virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1146         vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
1147                     virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1148         vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
1149                     virt_to_phys(vcpu->host_msrs + NR_BAD_MSRS));
1150         vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1151                                (HOST_IS_64 << 9));  /* 22.2,1, 20.7.1 */
1152         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
1153         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs);  /* 22.2.2 */
1154         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1155
1156
1157         /* 22.2.1, 20.8.1 */
1158         vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1159                                VM_ENTRY_CONTROLS, 0);
1160         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1161
1162 #ifdef CONFIG_X86_64
1163         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1164         vmcs_writel(TPR_THRESHOLD, 0);
1165 #endif
1166
1167         vmcs_writel(CR0_GUEST_HOST_MASK, KVM_GUEST_CR0_MASK);
1168         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1169
1170         vcpu->cr0 = 0x60000010;
1171         vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1172         vmx_set_cr4(vcpu, 0);
1173 #ifdef CONFIG_X86_64
1174         vmx_set_efer(vcpu, 0);
1175 #endif
1176
1177         return 0;
1178
1179 out:
1180         return ret;
1181 }
1182
1183 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1184 {
1185         u16 ent[2];
1186         u16 cs;
1187         u16 ip;
1188         unsigned long flags;
1189         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1190         u16 sp =  vmcs_readl(GUEST_RSP);
1191         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1192
1193         if (sp > ss_limit || sp - 6 > sp) {
1194                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1195                             __FUNCTION__,
1196                             vmcs_readl(GUEST_RSP),
1197                             vmcs_readl(GUEST_SS_BASE),
1198                             vmcs_read32(GUEST_SS_LIMIT));
1199                 return;
1200         }
1201
1202         if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1203                                                                 sizeof(ent)) {
1204                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1205                 return;
1206         }
1207
1208         flags =  vmcs_readl(GUEST_RFLAGS);
1209         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1210         ip =  vmcs_readl(GUEST_RIP);
1211
1212
1213         if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1214             kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1215             kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1216                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1217                 return;
1218         }
1219
1220         vmcs_writel(GUEST_RFLAGS, flags &
1221                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1222         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1223         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1224         vmcs_writel(GUEST_RIP, ent[0]);
1225         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1226 }
1227
1228 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1229 {
1230         int word_index = __ffs(vcpu->irq_summary);
1231         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1232         int irq = word_index * BITS_PER_LONG + bit_index;
1233
1234         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1235         if (!vcpu->irq_pending[word_index])
1236                 clear_bit(word_index, &vcpu->irq_summary);
1237
1238         if (vcpu->rmode.active) {
1239                 inject_rmode_irq(vcpu, irq);
1240                 return;
1241         }
1242         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1243                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1244 }
1245
1246
1247 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1248                                        struct kvm_run *kvm_run)
1249 {
1250         u32 cpu_based_vm_exec_control;
1251
1252         vcpu->interrupt_window_open =
1253                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1254                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1255
1256         if (vcpu->interrupt_window_open &&
1257             vcpu->irq_summary &&
1258             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1259                 /*
1260                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1261                  */
1262                 kvm_do_inject_irq(vcpu);
1263
1264         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1265         if (!vcpu->interrupt_window_open &&
1266             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1267                 /*
1268                  * Interrupts blocked.  Wait for unblock.
1269                  */
1270                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1271         else
1272                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1273         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1274 }
1275
1276 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1277 {
1278         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1279
1280         set_debugreg(dbg->bp[0], 0);
1281         set_debugreg(dbg->bp[1], 1);
1282         set_debugreg(dbg->bp[2], 2);
1283         set_debugreg(dbg->bp[3], 3);
1284
1285         if (dbg->singlestep) {
1286                 unsigned long flags;
1287
1288                 flags = vmcs_readl(GUEST_RFLAGS);
1289                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1290                 vmcs_writel(GUEST_RFLAGS, flags);
1291         }
1292 }
1293
1294 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1295                                   int vec, u32 err_code)
1296 {
1297         if (!vcpu->rmode.active)
1298                 return 0;
1299
1300         if (vec == GP_VECTOR && err_code == 0)
1301                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1302                         return 1;
1303         return 0;
1304 }
1305
1306 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1307 {
1308         u32 intr_info, error_code;
1309         unsigned long cr2, rip;
1310         u32 vect_info;
1311         enum emulation_result er;
1312         int r;
1313
1314         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1315         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1316
1317         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1318                                                 !is_page_fault(intr_info)) {
1319                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1320                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1321         }
1322
1323         if (is_external_interrupt(vect_info)) {
1324                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1325                 set_bit(irq, vcpu->irq_pending);
1326                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1327         }
1328
1329         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1330                 asm ("int $2");
1331                 return 1;
1332         }
1333         error_code = 0;
1334         rip = vmcs_readl(GUEST_RIP);
1335         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1336                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1337         if (is_page_fault(intr_info)) {
1338                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1339
1340                 spin_lock(&vcpu->kvm->lock);
1341                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1342                 if (r < 0) {
1343                         spin_unlock(&vcpu->kvm->lock);
1344                         return r;
1345                 }
1346                 if (!r) {
1347                         spin_unlock(&vcpu->kvm->lock);
1348                         return 1;
1349                 }
1350
1351                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1352                 spin_unlock(&vcpu->kvm->lock);
1353
1354                 switch (er) {
1355                 case EMULATE_DONE:
1356                         return 1;
1357                 case EMULATE_DO_MMIO:
1358                         ++kvm_stat.mmio_exits;
1359                         kvm_run->exit_reason = KVM_EXIT_MMIO;
1360                         return 0;
1361                  case EMULATE_FAIL:
1362                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1363                         break;
1364                 default:
1365                         BUG();
1366                 }
1367         }
1368
1369         if (vcpu->rmode.active &&
1370             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1371                                                                 error_code))
1372                 return 1;
1373
1374         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1375                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1376                 return 0;
1377         }
1378         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1379         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1380         kvm_run->ex.error_code = error_code;
1381         return 0;
1382 }
1383
1384 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1385                                      struct kvm_run *kvm_run)
1386 {
1387         ++kvm_stat.irq_exits;
1388         return 1;
1389 }
1390
1391 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1392 {
1393         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1394         return 0;
1395 }
1396
1397 static int get_io_count(struct kvm_vcpu *vcpu, u64 *count)
1398 {
1399         u64 inst;
1400         gva_t rip;
1401         int countr_size;
1402         int i, n;
1403
1404         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1405                 countr_size = 2;
1406         } else {
1407                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1408
1409                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1410                               (cs_ar & AR_DB_MASK) ? 4: 2;
1411         }
1412
1413         rip =  vmcs_readl(GUEST_RIP);
1414         if (countr_size != 8)
1415                 rip += vmcs_readl(GUEST_CS_BASE);
1416
1417         n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1418
1419         for (i = 0; i < n; i++) {
1420                 switch (((u8*)&inst)[i]) {
1421                 case 0xf0:
1422                 case 0xf2:
1423                 case 0xf3:
1424                 case 0x2e:
1425                 case 0x36:
1426                 case 0x3e:
1427                 case 0x26:
1428                 case 0x64:
1429                 case 0x65:
1430                 case 0x66:
1431                         break;
1432                 case 0x67:
1433                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1434                 default:
1435                         goto done;
1436                 }
1437         }
1438         return 0;
1439 done:
1440         countr_size *= 8;
1441         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1442         return 1;
1443 }
1444
1445 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1446 {
1447         u64 exit_qualification;
1448
1449         ++kvm_stat.io_exits;
1450         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1451         kvm_run->exit_reason = KVM_EXIT_IO;
1452         if (exit_qualification & 8)
1453                 kvm_run->io.direction = KVM_EXIT_IO_IN;
1454         else
1455                 kvm_run->io.direction = KVM_EXIT_IO_OUT;
1456         kvm_run->io.size = (exit_qualification & 7) + 1;
1457         kvm_run->io.string = (exit_qualification & 16) != 0;
1458         kvm_run->io.string_down
1459                 = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1460         kvm_run->io.rep = (exit_qualification & 32) != 0;
1461         kvm_run->io.port = exit_qualification >> 16;
1462         if (kvm_run->io.string) {
1463                 if (!get_io_count(vcpu, &kvm_run->io.count))
1464                         return 1;
1465                 kvm_run->io.address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1466         } else
1467                 kvm_run->io.value = vcpu->regs[VCPU_REGS_RAX]; /* rax */
1468         return 0;
1469 }
1470
1471 static void
1472 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1473 {
1474         /*
1475          * Patch in the VMCALL instruction:
1476          */
1477         hypercall[0] = 0x0f;
1478         hypercall[1] = 0x01;
1479         hypercall[2] = 0xc1;
1480         hypercall[3] = 0xc3;
1481 }
1482
1483 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1484 {
1485         u64 exit_qualification;
1486         int cr;
1487         int reg;
1488
1489         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1490         cr = exit_qualification & 15;
1491         reg = (exit_qualification >> 8) & 15;
1492         switch ((exit_qualification >> 4) & 3) {
1493         case 0: /* mov to cr */
1494                 switch (cr) {
1495                 case 0:
1496                         vcpu_load_rsp_rip(vcpu);
1497                         set_cr0(vcpu, vcpu->regs[reg]);
1498                         skip_emulated_instruction(vcpu);
1499                         return 1;
1500                 case 3:
1501                         vcpu_load_rsp_rip(vcpu);
1502                         set_cr3(vcpu, vcpu->regs[reg]);
1503                         skip_emulated_instruction(vcpu);
1504                         return 1;
1505                 case 4:
1506                         vcpu_load_rsp_rip(vcpu);
1507                         set_cr4(vcpu, vcpu->regs[reg]);
1508                         skip_emulated_instruction(vcpu);
1509                         return 1;
1510                 case 8:
1511                         vcpu_load_rsp_rip(vcpu);
1512                         set_cr8(vcpu, vcpu->regs[reg]);
1513                         skip_emulated_instruction(vcpu);
1514                         return 1;
1515                 };
1516                 break;
1517         case 1: /*mov from cr*/
1518                 switch (cr) {
1519                 case 3:
1520                         vcpu_load_rsp_rip(vcpu);
1521                         vcpu->regs[reg] = vcpu->cr3;
1522                         vcpu_put_rsp_rip(vcpu);
1523                         skip_emulated_instruction(vcpu);
1524                         return 1;
1525                 case 8:
1526                         printk(KERN_DEBUG "handle_cr: read CR8 "
1527                                "cpu erratum AA15\n");
1528                         vcpu_load_rsp_rip(vcpu);
1529                         vcpu->regs[reg] = vcpu->cr8;
1530                         vcpu_put_rsp_rip(vcpu);
1531                         skip_emulated_instruction(vcpu);
1532                         return 1;
1533                 }
1534                 break;
1535         case 3: /* lmsw */
1536                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1537
1538                 skip_emulated_instruction(vcpu);
1539                 return 1;
1540         default:
1541                 break;
1542         }
1543         kvm_run->exit_reason = 0;
1544         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1545                (int)(exit_qualification >> 4) & 3, cr);
1546         return 0;
1547 }
1548
1549 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1550 {
1551         u64 exit_qualification;
1552         unsigned long val;
1553         int dr, reg;
1554
1555         /*
1556          * FIXME: this code assumes the host is debugging the guest.
1557          *        need to deal with guest debugging itself too.
1558          */
1559         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1560         dr = exit_qualification & 7;
1561         reg = (exit_qualification >> 8) & 15;
1562         vcpu_load_rsp_rip(vcpu);
1563         if (exit_qualification & 16) {
1564                 /* mov from dr */
1565                 switch (dr) {
1566                 case 6:
1567                         val = 0xffff0ff0;
1568                         break;
1569                 case 7:
1570                         val = 0x400;
1571                         break;
1572                 default:
1573                         val = 0;
1574                 }
1575                 vcpu->regs[reg] = val;
1576         } else {
1577                 /* mov to dr */
1578         }
1579         vcpu_put_rsp_rip(vcpu);
1580         skip_emulated_instruction(vcpu);
1581         return 1;
1582 }
1583
1584 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1585 {
1586         kvm_run->exit_reason = KVM_EXIT_CPUID;
1587         return 0;
1588 }
1589
1590 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1591 {
1592         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1593         u64 data;
1594
1595         if (vmx_get_msr(vcpu, ecx, &data)) {
1596                 vmx_inject_gp(vcpu, 0);
1597                 return 1;
1598         }
1599
1600         /* FIXME: handling of bits 32:63 of rax, rdx */
1601         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1602         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1603         skip_emulated_instruction(vcpu);
1604         return 1;
1605 }
1606
1607 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1608 {
1609         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1610         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1611                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1612
1613         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1614                 vmx_inject_gp(vcpu, 0);
1615                 return 1;
1616         }
1617
1618         skip_emulated_instruction(vcpu);
1619         return 1;
1620 }
1621
1622 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1623                               struct kvm_run *kvm_run)
1624 {
1625         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1626         kvm_run->cr8 = vcpu->cr8;
1627         kvm_run->apic_base = vcpu->apic_base;
1628         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1629                                                   vcpu->irq_summary == 0);
1630 }
1631
1632 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1633                                    struct kvm_run *kvm_run)
1634 {
1635         /*
1636          * If the user space waits to inject interrupts, exit as soon as
1637          * possible
1638          */
1639         if (kvm_run->request_interrupt_window &&
1640             !vcpu->irq_summary) {
1641                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1642                 ++kvm_stat.irq_window_exits;
1643                 return 0;
1644         }
1645         return 1;
1646 }
1647
1648 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1649 {
1650         skip_emulated_instruction(vcpu);
1651         if (vcpu->irq_summary)
1652                 return 1;
1653
1654         kvm_run->exit_reason = KVM_EXIT_HLT;
1655         ++kvm_stat.halt_exits;
1656         return 0;
1657 }
1658
1659 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1660 {
1661         vmcs_writel(GUEST_RIP, vmcs_readl(GUEST_RIP)+3);
1662         return kvm_hypercall(vcpu, kvm_run);
1663 }
1664
1665 /*
1666  * The exit handlers return 1 if the exit was handled fully and guest execution
1667  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
1668  * to be done to userspace and return 0.
1669  */
1670 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1671                                       struct kvm_run *kvm_run) = {
1672         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
1673         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
1674         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
1675         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
1676         [EXIT_REASON_CR_ACCESS]               = handle_cr,
1677         [EXIT_REASON_DR_ACCESS]               = handle_dr,
1678         [EXIT_REASON_CPUID]                   = handle_cpuid,
1679         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
1680         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
1681         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
1682         [EXIT_REASON_HLT]                     = handle_halt,
1683         [EXIT_REASON_VMCALL]                  = handle_vmcall,
1684 };
1685
1686 static const int kvm_vmx_max_exit_handlers =
1687         sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1688
1689 /*
1690  * The guest has exited.  See if we can fix it or if we need userspace
1691  * assistance.
1692  */
1693 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1694 {
1695         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1696         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1697
1698         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1699                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1700                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1701                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1702         kvm_run->instruction_length = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
1703         if (exit_reason < kvm_vmx_max_exit_handlers
1704             && kvm_vmx_exit_handlers[exit_reason])
1705                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1706         else {
1707                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1708                 kvm_run->hw.hardware_exit_reason = exit_reason;
1709         }
1710         return 0;
1711 }
1712
1713 /*
1714  * Check if userspace requested an interrupt window, and that the
1715  * interrupt window is open.
1716  *
1717  * No need to exit to userspace if we already have an interrupt queued.
1718  */
1719 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1720                                           struct kvm_run *kvm_run)
1721 {
1722         return (!vcpu->irq_summary &&
1723                 kvm_run->request_interrupt_window &&
1724                 vcpu->interrupt_window_open &&
1725                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1726 }
1727
1728 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1729 {
1730         u8 fail;
1731         u16 fs_sel, gs_sel, ldt_sel;
1732         int fs_gs_ldt_reload_needed;
1733         int r;
1734
1735 again:
1736         /*
1737          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
1738          * allow segment selectors with cpl > 0 or ti == 1.
1739          */
1740         fs_sel = read_fs();
1741         gs_sel = read_gs();
1742         ldt_sel = read_ldt();
1743         fs_gs_ldt_reload_needed = (fs_sel & 7) | (gs_sel & 7) | ldt_sel;
1744         if (!fs_gs_ldt_reload_needed) {
1745                 vmcs_write16(HOST_FS_SELECTOR, fs_sel);
1746                 vmcs_write16(HOST_GS_SELECTOR, gs_sel);
1747         } else {
1748                 vmcs_write16(HOST_FS_SELECTOR, 0);
1749                 vmcs_write16(HOST_GS_SELECTOR, 0);
1750         }
1751
1752 #ifdef CONFIG_X86_64
1753         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1754         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1755 #else
1756         vmcs_writel(HOST_FS_BASE, segment_base(fs_sel));
1757         vmcs_writel(HOST_GS_BASE, segment_base(gs_sel));
1758 #endif
1759
1760         if (!vcpu->mmio_read_completed)
1761                 do_interrupt_requests(vcpu, kvm_run);
1762
1763         if (vcpu->guest_debug.enabled)
1764                 kvm_guest_debug_pre(vcpu);
1765
1766         fx_save(vcpu->host_fx_image);
1767         fx_restore(vcpu->guest_fx_image);
1768
1769         save_msrs(vcpu->host_msrs, vcpu->nmsrs);
1770         load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1771
1772         asm (
1773                 /* Store host registers */
1774                 "pushf \n\t"
1775 #ifdef CONFIG_X86_64
1776                 "push %%rax; push %%rbx; push %%rdx;"
1777                 "push %%rsi; push %%rdi; push %%rbp;"
1778                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1779                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1780                 "push %%rcx \n\t"
1781                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1782 #else
1783                 "pusha; push %%ecx \n\t"
1784                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1785 #endif
1786                 /* Check if vmlaunch of vmresume is needed */
1787                 "cmp $0, %1 \n\t"
1788                 /* Load guest registers.  Don't clobber flags. */
1789 #ifdef CONFIG_X86_64
1790                 "mov %c[cr2](%3), %%rax \n\t"
1791                 "mov %%rax, %%cr2 \n\t"
1792                 "mov %c[rax](%3), %%rax \n\t"
1793                 "mov %c[rbx](%3), %%rbx \n\t"
1794                 "mov %c[rdx](%3), %%rdx \n\t"
1795                 "mov %c[rsi](%3), %%rsi \n\t"
1796                 "mov %c[rdi](%3), %%rdi \n\t"
1797                 "mov %c[rbp](%3), %%rbp \n\t"
1798                 "mov %c[r8](%3),  %%r8  \n\t"
1799                 "mov %c[r9](%3),  %%r9  \n\t"
1800                 "mov %c[r10](%3), %%r10 \n\t"
1801                 "mov %c[r11](%3), %%r11 \n\t"
1802                 "mov %c[r12](%3), %%r12 \n\t"
1803                 "mov %c[r13](%3), %%r13 \n\t"
1804                 "mov %c[r14](%3), %%r14 \n\t"
1805                 "mov %c[r15](%3), %%r15 \n\t"
1806                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1807 #else
1808                 "mov %c[cr2](%3), %%eax \n\t"
1809                 "mov %%eax,   %%cr2 \n\t"
1810                 "mov %c[rax](%3), %%eax \n\t"
1811                 "mov %c[rbx](%3), %%ebx \n\t"
1812                 "mov %c[rdx](%3), %%edx \n\t"
1813                 "mov %c[rsi](%3), %%esi \n\t"
1814                 "mov %c[rdi](%3), %%edi \n\t"
1815                 "mov %c[rbp](%3), %%ebp \n\t"
1816                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1817 #endif
1818                 /* Enter guest mode */
1819                 "jne launched \n\t"
1820                 ASM_VMX_VMLAUNCH "\n\t"
1821                 "jmp kvm_vmx_return \n\t"
1822                 "launched: " ASM_VMX_VMRESUME "\n\t"
1823                 ".globl kvm_vmx_return \n\t"
1824                 "kvm_vmx_return: "
1825                 /* Save guest registers, load host registers, keep flags */
1826 #ifdef CONFIG_X86_64
1827                 "xchg %3,     (%%rsp) \n\t"
1828                 "mov %%rax, %c[rax](%3) \n\t"
1829                 "mov %%rbx, %c[rbx](%3) \n\t"
1830                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1831                 "mov %%rdx, %c[rdx](%3) \n\t"
1832                 "mov %%rsi, %c[rsi](%3) \n\t"
1833                 "mov %%rdi, %c[rdi](%3) \n\t"
1834                 "mov %%rbp, %c[rbp](%3) \n\t"
1835                 "mov %%r8,  %c[r8](%3) \n\t"
1836                 "mov %%r9,  %c[r9](%3) \n\t"
1837                 "mov %%r10, %c[r10](%3) \n\t"
1838                 "mov %%r11, %c[r11](%3) \n\t"
1839                 "mov %%r12, %c[r12](%3) \n\t"
1840                 "mov %%r13, %c[r13](%3) \n\t"
1841                 "mov %%r14, %c[r14](%3) \n\t"
1842                 "mov %%r15, %c[r15](%3) \n\t"
1843                 "mov %%cr2, %%rax   \n\t"
1844                 "mov %%rax, %c[cr2](%3) \n\t"
1845                 "mov (%%rsp), %3 \n\t"
1846
1847                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1848                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1849                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1850                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
1851 #else
1852                 "xchg %3, (%%esp) \n\t"
1853                 "mov %%eax, %c[rax](%3) \n\t"
1854                 "mov %%ebx, %c[rbx](%3) \n\t"
1855                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1856                 "mov %%edx, %c[rdx](%3) \n\t"
1857                 "mov %%esi, %c[rsi](%3) \n\t"
1858                 "mov %%edi, %c[rdi](%3) \n\t"
1859                 "mov %%ebp, %c[rbp](%3) \n\t"
1860                 "mov %%cr2, %%eax  \n\t"
1861                 "mov %%eax, %c[cr2](%3) \n\t"
1862                 "mov (%%esp), %3 \n\t"
1863
1864                 "pop %%ecx; popa \n\t"
1865 #endif
1866                 "setbe %0 \n\t"
1867                 "popf \n\t"
1868               : "=q" (fail)
1869               : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
1870                 "c"(vcpu),
1871                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
1872                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1873                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1874                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1875                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1876                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1877                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
1878 #ifdef CONFIG_X86_64
1879                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1880                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1881                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1882                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1883                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1884                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1885                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1886                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
1887 #endif
1888                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
1889               : "cc", "memory" );
1890
1891         ++kvm_stat.exits;
1892
1893         save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1894         load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
1895
1896         fx_save(vcpu->guest_fx_image);
1897         fx_restore(vcpu->host_fx_image);
1898         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
1899
1900         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
1901
1902         kvm_run->exit_type = 0;
1903         if (fail) {
1904                 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1905                 kvm_run->exit_reason = vmcs_read32(VM_INSTRUCTION_ERROR);
1906                 r = 0;
1907         } else {
1908                 if (fs_gs_ldt_reload_needed) {
1909                         load_ldt(ldt_sel);
1910                         load_fs(fs_sel);
1911                         /*
1912                          * If we have to reload gs, we must take care to
1913                          * preserve our gs base.
1914                          */
1915                         local_irq_disable();
1916                         load_gs(gs_sel);
1917 #ifdef CONFIG_X86_64
1918                         wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
1919 #endif
1920                         local_irq_enable();
1921
1922                         reload_tss();
1923                 }
1924                 /*
1925                  * Profile KVM exit RIPs:
1926                  */
1927                 if (unlikely(prof_on == KVM_PROFILING))
1928                         profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
1929
1930                 vcpu->launched = 1;
1931                 kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1932                 r = kvm_handle_exit(kvm_run, vcpu);
1933                 if (r > 0) {
1934                         /* Give scheduler a change to reschedule. */
1935                         if (signal_pending(current)) {
1936                                 ++kvm_stat.signal_exits;
1937                                 post_kvm_run_save(vcpu, kvm_run);
1938                                 return -EINTR;
1939                         }
1940
1941                         if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1942                                 ++kvm_stat.request_irq_exits;
1943                                 post_kvm_run_save(vcpu, kvm_run);
1944                                 return -EINTR;
1945                         }
1946
1947                         kvm_resched(vcpu);
1948                         goto again;
1949                 }
1950         }
1951
1952         post_kvm_run_save(vcpu, kvm_run);
1953         return r;
1954 }
1955
1956 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
1957 {
1958         vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
1959 }
1960
1961 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
1962                                   unsigned long addr,
1963                                   u32 err_code)
1964 {
1965         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1966
1967         ++kvm_stat.pf_guest;
1968
1969         if (is_page_fault(vect_info)) {
1970                 printk(KERN_DEBUG "inject_page_fault: "
1971                        "double fault 0x%lx @ 0x%lx\n",
1972                        addr, vmcs_readl(GUEST_RIP));
1973                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
1974                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1975                              DF_VECTOR |
1976                              INTR_TYPE_EXCEPTION |
1977                              INTR_INFO_DELIEVER_CODE_MASK |
1978                              INTR_INFO_VALID_MASK);
1979                 return;
1980         }
1981         vcpu->cr2 = addr;
1982         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
1983         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1984                      PF_VECTOR |
1985                      INTR_TYPE_EXCEPTION |
1986                      INTR_INFO_DELIEVER_CODE_MASK |
1987                      INTR_INFO_VALID_MASK);
1988
1989 }
1990
1991 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
1992 {
1993         if (vcpu->vmcs) {
1994                 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
1995                 free_vmcs(vcpu->vmcs);
1996                 vcpu->vmcs = NULL;
1997         }
1998 }
1999
2000 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2001 {
2002         vmx_free_vmcs(vcpu);
2003 }
2004
2005 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
2006 {
2007         struct vmcs *vmcs;
2008
2009         vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2010         if (!vcpu->guest_msrs)
2011                 return -ENOMEM;
2012
2013         vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2014         if (!vcpu->host_msrs)
2015                 goto out_free_guest_msrs;
2016
2017         vmcs = alloc_vmcs();
2018         if (!vmcs)
2019                 goto out_free_msrs;
2020
2021         vmcs_clear(vmcs);
2022         vcpu->vmcs = vmcs;
2023         vcpu->launched = 0;
2024
2025         return 0;
2026
2027 out_free_msrs:
2028         kfree(vcpu->host_msrs);
2029         vcpu->host_msrs = NULL;
2030
2031 out_free_guest_msrs:
2032         kfree(vcpu->guest_msrs);
2033         vcpu->guest_msrs = NULL;
2034
2035         return -ENOMEM;
2036 }
2037
2038 static struct kvm_arch_ops vmx_arch_ops = {
2039         .cpu_has_kvm_support = cpu_has_kvm_support,
2040         .disabled_by_bios = vmx_disabled_by_bios,
2041         .hardware_setup = hardware_setup,
2042         .hardware_unsetup = hardware_unsetup,
2043         .hardware_enable = hardware_enable,
2044         .hardware_disable = hardware_disable,
2045
2046         .vcpu_create = vmx_create_vcpu,
2047         .vcpu_free = vmx_free_vcpu,
2048
2049         .vcpu_load = vmx_vcpu_load,
2050         .vcpu_put = vmx_vcpu_put,
2051         .vcpu_decache = vmx_vcpu_decache,
2052
2053         .set_guest_debug = set_guest_debug,
2054         .get_msr = vmx_get_msr,
2055         .set_msr = vmx_set_msr,
2056         .get_segment_base = vmx_get_segment_base,
2057         .get_segment = vmx_get_segment,
2058         .set_segment = vmx_set_segment,
2059         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2060         .decache_cr0_cr4_guest_bits = vmx_decache_cr0_cr4_guest_bits,
2061         .set_cr0 = vmx_set_cr0,
2062         .set_cr0_no_modeswitch = vmx_set_cr0_no_modeswitch,
2063         .set_cr3 = vmx_set_cr3,
2064         .set_cr4 = vmx_set_cr4,
2065 #ifdef CONFIG_X86_64
2066         .set_efer = vmx_set_efer,
2067 #endif
2068         .get_idt = vmx_get_idt,
2069         .set_idt = vmx_set_idt,
2070         .get_gdt = vmx_get_gdt,
2071         .set_gdt = vmx_set_gdt,
2072         .cache_regs = vcpu_load_rsp_rip,
2073         .decache_regs = vcpu_put_rsp_rip,
2074         .get_rflags = vmx_get_rflags,
2075         .set_rflags = vmx_set_rflags,
2076
2077         .tlb_flush = vmx_flush_tlb,
2078         .inject_page_fault = vmx_inject_page_fault,
2079
2080         .inject_gp = vmx_inject_gp,
2081
2082         .run = vmx_vcpu_run,
2083         .skip_emulated_instruction = skip_emulated_instruction,
2084         .vcpu_setup = vmx_vcpu_setup,
2085         .patch_hypercall = vmx_patch_hypercall,
2086 };
2087
2088 static int __init vmx_init(void)
2089 {
2090         return kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2091 }
2092
2093 static void __exit vmx_exit(void)
2094 {
2095         kvm_exit_arch();
2096 }
2097
2098 module_init(vmx_init)
2099 module_exit(vmx_exit)