PCI: push deprecated pci_find_device() function to last user
[linux-2.6.git] / drivers / isdn / hisax / w6692.c
1 /* $Id: w6692.c,v 1.18.2.4 2004/02/11 13:21:34 keil Exp $
2  *
3  * Winbond W6692 specific routines
4  *
5  * Author       Petr Novak
6  * Copyright    by Petr Novak        <petr.novak@i.cz>
7  * 
8  * This software may be used and distributed according to the terms
9  * of the GNU General Public License, incorporated herein by reference.
10  *
11  */
12
13 #include <linux/init.h>
14 #include "hisax.h"
15 #include "w6692.h"
16 #include "isdnl1.h"
17 #include <linux/interrupt.h>
18 #include <linux/pci.h>
19
20 /* table entry in the PCI devices list */
21 typedef struct {
22         int vendor_id;
23         int device_id;
24         char *vendor_name;
25         char *card_name;
26 } PCI_ENTRY;
27
28 static const PCI_ENTRY id_list[] =
29 {
30         {PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, "Winbond", "W6692"},
31         {PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH, "Dynalink/AsusCom", "IS64PH"},
32         {0, 0, "U.S.Robotics", "ISDN PCI Card TA"}
33 };
34
35 #define W6692_SV_USR   0x16ec
36 #define W6692_SD_USR   0x3409
37 #define W6692_WINBOND  0
38 #define W6692_DYNALINK 1
39 #define W6692_USR      2
40
41 static const char *w6692_revision = "$Revision: 1.18.2.4 $";
42
43 #define DBUSY_TIMER_VALUE 80
44
45 static char *W6692Ver[] =
46 {"W6692 V00", "W6692 V01", "W6692 V10",
47  "W6692 V11"};
48
49 static void
50 W6692Version(struct IsdnCardState *cs, char *s)
51 {
52         int val;
53
54         val = cs->readW6692(cs, W_D_RBCH);
55         printk(KERN_INFO "%s Winbond W6692 version (%x): %s\n", s, val, W6692Ver[(val >> 6) & 3]);
56 }
57
58 static void
59 ph_command(struct IsdnCardState *cs, unsigned int command)
60 {
61         if (cs->debug & L1_DEB_ISAC)
62                 debugl1(cs, "ph_command %x", command);
63         cs->writeisac(cs, W_CIX, command);
64 }
65
66
67 static void
68 W6692_new_ph(struct IsdnCardState *cs)
69 {
70         switch (cs->dc.w6692.ph_state) {
71                 case (W_L1CMD_RST):
72                         ph_command(cs, W_L1CMD_DRC);
73                         l1_msg(cs, HW_RESET | INDICATION, NULL);
74                         /* fallthru */
75                 case (W_L1IND_CD):
76                         l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
77                         break;
78                 case (W_L1IND_DRD):
79                         l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
80                         break;
81                 case (W_L1IND_CE):
82                         l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
83                         break;
84                 case (W_L1IND_LD):
85                         l1_msg(cs, HW_RSYNC | INDICATION, NULL);
86                         break;
87                 case (W_L1IND_ARD):
88                         l1_msg(cs, HW_INFO2 | INDICATION, NULL);
89                         break;
90                 case (W_L1IND_AI8):
91                         l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
92                         break;
93                 case (W_L1IND_AI10):
94                         l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL);
95                         break;
96                 default:
97                         break;
98         }
99 }
100
101 static void
102 W6692_bh(struct work_struct *work)
103 {
104         struct IsdnCardState *cs =
105                 container_of(work, struct IsdnCardState, tqueue);
106         struct PStack *stptr;
107
108         if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) {
109                 if (cs->debug)
110                         debugl1(cs, "D-Channel Busy cleared");
111                 stptr = cs->stlist;
112                 while (stptr != NULL) {
113                         stptr->l1.l1l2(stptr, PH_PAUSE | CONFIRM, NULL);
114                         stptr = stptr->next;
115                 }
116         }
117         if (test_and_clear_bit(D_L1STATECHANGE, &cs->event))
118                 W6692_new_ph(cs);
119         if (test_and_clear_bit(D_RCVBUFREADY, &cs->event))
120                 DChannel_proc_rcv(cs);
121         if (test_and_clear_bit(D_XMTBUFREADY, &cs->event))
122                 DChannel_proc_xmt(cs);
123 /*
124    if (test_and_clear_bit(D_RX_MON1, &cs->event))
125    arcofi_fsm(cs, ARCOFI_RX_END, NULL);
126    if (test_and_clear_bit(D_TX_MON1, &cs->event))
127    arcofi_fsm(cs, ARCOFI_TX_END, NULL);
128  */
129 }
130
131 static void
132 W6692_empty_fifo(struct IsdnCardState *cs, int count)
133 {
134         u_char *ptr;
135
136         if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
137                 debugl1(cs, "W6692_empty_fifo");
138
139         if ((cs->rcvidx + count) >= MAX_DFRAME_LEN_L1) {
140                 if (cs->debug & L1_DEB_WARN)
141                         debugl1(cs, "W6692_empty_fifo overrun %d",
142                                 cs->rcvidx + count);
143                 cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RACK);
144                 cs->rcvidx = 0;
145                 return;
146         }
147         ptr = cs->rcvbuf + cs->rcvidx;
148         cs->rcvidx += count;
149         cs->readW6692fifo(cs, ptr, count);
150         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RACK);
151         if (cs->debug & L1_DEB_ISAC_FIFO) {
152                 char *t = cs->dlog;
153
154                 t += sprintf(t, "W6692_empty_fifo cnt %d", count);
155                 QuickHex(t, ptr, count);
156                 debugl1(cs, cs->dlog);
157         }
158 }
159
160 static void
161 W6692_fill_fifo(struct IsdnCardState *cs)
162 {
163         int count, more;
164         u_char *ptr;
165
166         if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
167                 debugl1(cs, "W6692_fill_fifo");
168
169         if (!cs->tx_skb)
170                 return;
171
172         count = cs->tx_skb->len;
173         if (count <= 0)
174                 return;
175
176         more = 0;
177         if (count > W_D_FIFO_THRESH) {
178                 more = !0;
179                 count = W_D_FIFO_THRESH;
180         }
181         ptr = cs->tx_skb->data;
182         skb_pull(cs->tx_skb, count);
183         cs->tx_cnt += count;
184         cs->writeW6692fifo(cs, ptr, count);
185         cs->writeW6692(cs, W_D_CMDR, more ? W_D_CMDR_XMS : (W_D_CMDR_XMS | W_D_CMDR_XME));
186         if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
187                 debugl1(cs, "W6692_fill_fifo dbusytimer running");
188                 del_timer(&cs->dbusytimer);
189         }
190         init_timer(&cs->dbusytimer);
191         cs->dbusytimer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000);
192         add_timer(&cs->dbusytimer);
193         if (cs->debug & L1_DEB_ISAC_FIFO) {
194                 char *t = cs->dlog;
195
196                 t += sprintf(t, "W6692_fill_fifo cnt %d", count);
197                 QuickHex(t, ptr, count);
198                 debugl1(cs, cs->dlog);
199         }
200 }
201
202 static void
203 W6692B_empty_fifo(struct BCState *bcs, int count)
204 {
205         u_char *ptr;
206         struct IsdnCardState *cs = bcs->cs;
207
208         if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
209                 debugl1(cs, "W6692B_empty_fifo");
210
211         if (bcs->hw.w6692.rcvidx + count > HSCX_BUFMAX) {
212                 if (cs->debug & L1_DEB_WARN)
213                         debugl1(cs, "W6692B_empty_fifo: incoming packet too large");
214                 cs->BC_Write_Reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
215                 bcs->hw.w6692.rcvidx = 0;
216                 return;
217         }
218         ptr = bcs->hw.w6692.rcvbuf + bcs->hw.w6692.rcvidx;
219         bcs->hw.w6692.rcvidx += count;
220         READW6692BFIFO(cs, bcs->channel, ptr, count);
221         cs->BC_Write_Reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
222         if (cs->debug & L1_DEB_HSCX_FIFO) {
223                 char *t = bcs->blog;
224
225                 t += sprintf(t, "W6692B_empty_fifo %c cnt %d",
226                              bcs->channel + '1', count);
227                 QuickHex(t, ptr, count);
228                 debugl1(cs, bcs->blog);
229         }
230 }
231
232 static void
233 W6692B_fill_fifo(struct BCState *bcs)
234 {
235         struct IsdnCardState *cs = bcs->cs;
236         int more, count;
237         u_char *ptr;
238
239         if (!bcs->tx_skb)
240                 return;
241         if (bcs->tx_skb->len <= 0)
242                 return;
243
244         more = (bcs->mode == L1_MODE_TRANS) ? 1 : 0;
245         if (bcs->tx_skb->len > W_B_FIFO_THRESH) {
246                 more = 1;
247                 count = W_B_FIFO_THRESH;
248         } else
249                 count = bcs->tx_skb->len;
250
251         if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
252                 debugl1(cs, "W6692B_fill_fifo%s%d", (more ? " ": " last "), count);
253
254         ptr = bcs->tx_skb->data;
255         skb_pull(bcs->tx_skb, count);
256         bcs->tx_cnt -= count;
257         bcs->hw.w6692.count += count;
258         WRITEW6692BFIFO(cs, bcs->channel, ptr, count);
259         cs->BC_Write_Reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACT | W_B_CMDR_XMS | (more ? 0 : W_B_CMDR_XME));
260         if (cs->debug & L1_DEB_HSCX_FIFO) {
261                 char *t = bcs->blog;
262
263                 t += sprintf(t, "W6692B_fill_fifo %c cnt %d",
264                              bcs->channel + '1', count);
265                 QuickHex(t, ptr, count);
266                 debugl1(cs, bcs->blog);
267         }
268 }
269
270 static void
271 W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
272 {
273         u_char val;
274         u_char r;
275         struct BCState *bcs;
276         struct sk_buff *skb;
277         int count;
278
279         bcs = (cs->bcs->channel == bchan) ? cs->bcs : (cs->bcs+1);
280         val = cs->BC_Read_Reg(cs, bchan, W_B_EXIR);
281         debugl1(cs, "W6692B chan %d B_EXIR 0x%02X", bchan, val);
282
283         if (!test_bit(BC_FLG_INIT, &bcs->Flag)) {
284                 debugl1(cs, "W6692B not INIT yet");
285                 return;
286         }
287         if (val & W_B_EXI_RME) {        /* RME */
288                 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
289                 if (r & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
290                         if (cs->debug & L1_DEB_WARN)
291                                 debugl1(cs, "W6692 B STAR %x", r);
292                         if ((r & W_B_STAR_RDOV) && bcs->mode)
293                                 if (cs->debug & L1_DEB_WARN)
294                                         debugl1(cs, "W6692 B RDOV mode=%d",
295                                                 bcs->mode);
296                         if (r & W_B_STAR_CRCE)
297                                 if (cs->debug & L1_DEB_WARN)
298                                         debugl1(cs, "W6692 B CRC error");
299                         cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RRST | W_B_CMDR_RACT);
300                 } else {
301                         count = cs->BC_Read_Reg(cs, bchan, W_B_RBCL) & (W_B_FIFO_THRESH - 1);
302                         if (count == 0)
303                                 count = W_B_FIFO_THRESH;
304                         W6692B_empty_fifo(bcs, count);
305                         if ((count = bcs->hw.w6692.rcvidx) > 0) {
306                                 if (cs->debug & L1_DEB_HSCX_FIFO)
307                                         debugl1(cs, "W6692 Bchan Frame %d", count);
308                                 if (!(skb = dev_alloc_skb(count)))
309                                         printk(KERN_WARNING "W6692: Bchan receive out of memory\n");
310                                 else {
311                                         memcpy(skb_put(skb, count), bcs->hw.w6692.rcvbuf, count);
312                                         skb_queue_tail(&bcs->rqueue, skb);
313                                 }
314                         }
315                 }
316                 bcs->hw.w6692.rcvidx = 0;
317                 schedule_event(bcs, B_RCVBUFREADY);
318         }
319         if (val & W_B_EXI_RMR) {        /* RMR */
320                 W6692B_empty_fifo(bcs, W_B_FIFO_THRESH);
321                 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
322                 if (r & W_B_STAR_RDOV) {
323                         if (cs->debug & L1_DEB_WARN)
324                                 debugl1(cs, "W6692 B RDOV(RMR) mode=%d",bcs->mode);
325                         cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RRST | W_B_CMDR_RACT);
326                         if (bcs->mode != L1_MODE_TRANS)
327                                 bcs->hw.w6692.rcvidx = 0;
328                 }
329                 if (bcs->mode == L1_MODE_TRANS) {
330                         /* receive audio data */
331                         if (!(skb = dev_alloc_skb(W_B_FIFO_THRESH)))
332                                 printk(KERN_WARNING "HiSax: receive out of memory\n");
333                         else {
334                                 memcpy(skb_put(skb, W_B_FIFO_THRESH), bcs->hw.w6692.rcvbuf, W_B_FIFO_THRESH);
335                                 skb_queue_tail(&bcs->rqueue, skb);
336                         }
337                         bcs->hw.w6692.rcvidx = 0;
338                         schedule_event(bcs, B_RCVBUFREADY);
339                 }
340         }
341         if (val & W_B_EXI_XDUN) {       /* XDUN */
342                 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
343                 if (cs->debug & L1_DEB_WARN)
344                         debugl1(cs, "W6692 B EXIR %x Lost TX", val);
345                 if (bcs->mode == 1)
346                         W6692B_fill_fifo(bcs);
347                 else {
348                         /* Here we lost an TX interrupt, so
349                            * restart transmitting the whole frame.
350                          */
351                         if (bcs->tx_skb) {
352                                 skb_push(bcs->tx_skb, bcs->hw.w6692.count);
353                                 bcs->tx_cnt += bcs->hw.w6692.count;
354                                 bcs->hw.w6692.count = 0;
355                         }
356                 }
357                 return;
358         }
359         if (val & W_B_EXI_XFR) {        /* XFR */
360                 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
361                 if (r & W_B_STAR_XDOW) {
362                         if (cs->debug & L1_DEB_WARN)
363                                 debugl1(cs, "W6692 B STAR %x XDOW", r);
364                         cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
365                         if (bcs->tx_skb && (bcs->mode != 1)) {
366                                 skb_push(bcs->tx_skb, bcs->hw.w6692.count);
367                                 bcs->tx_cnt += bcs->hw.w6692.count;
368                                 bcs->hw.w6692.count = 0;
369                         }
370                 }
371                 if (bcs->tx_skb) {
372                         if (bcs->tx_skb->len) {
373                                 W6692B_fill_fifo(bcs);
374                                 return;
375                         } else {
376                                 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
377                                         (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
378                                         u_long  flags;
379                                         spin_lock_irqsave(&bcs->aclock, flags);
380                                         bcs->ackcnt += bcs->hw.w6692.count;
381                                         spin_unlock_irqrestore(&bcs->aclock, flags);
382                                         schedule_event(bcs, B_ACKPENDING);
383                                 }
384                                 dev_kfree_skb_irq(bcs->tx_skb);
385                                 bcs->hw.w6692.count = 0;
386                                 bcs->tx_skb = NULL;
387                         }
388                 }
389                 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
390                         bcs->hw.w6692.count = 0;
391                         test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
392                         W6692B_fill_fifo(bcs);
393                 } else {
394                         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
395                         schedule_event(bcs, B_XMTBUFREADY);
396                 }
397         }
398 }
399
400 static irqreturn_t
401 W6692_interrupt(int intno, void *dev_id)
402 {
403         struct IsdnCardState    *cs = dev_id;
404         u_char                  val, exval, v1;
405         struct sk_buff          *skb;
406         u_int                   count;
407         u_long                  flags;
408         int                     icnt = 5;
409
410         spin_lock_irqsave(&cs->lock, flags);
411         val = cs->readW6692(cs, W_ISTA);
412         if (!val) {
413                 spin_unlock_irqrestore(&cs->lock, flags);
414                 return IRQ_NONE;
415         }
416       StartW6692:
417         if (cs->debug & L1_DEB_ISAC)
418                 debugl1(cs, "W6692 ISTA %x", val);
419
420         if (val & W_INT_D_RME) {        /* RME */
421                 exval = cs->readW6692(cs, W_D_RSTA);
422                 if (exval & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
423                         if (exval & W_D_RSTA_RDOV)
424                                 if (cs->debug & L1_DEB_WARN)
425                                         debugl1(cs, "W6692 RDOV");
426                         if (exval & W_D_RSTA_CRCE)
427                                 if (cs->debug & L1_DEB_WARN)
428                                         debugl1(cs, "W6692 D-channel CRC error");
429                         if (exval & W_D_RSTA_RMB)
430                                 if (cs->debug & L1_DEB_WARN)
431                                         debugl1(cs, "W6692 D-channel ABORT");
432                         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
433                 } else {
434                         count = cs->readW6692(cs, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
435                         if (count == 0)
436                                 count = W_D_FIFO_THRESH;
437                         W6692_empty_fifo(cs, count);
438                         if ((count = cs->rcvidx) > 0) {
439                                 cs->rcvidx = 0;
440                                 if (!(skb = alloc_skb(count, GFP_ATOMIC)))
441                                         printk(KERN_WARNING "HiSax: D receive out of memory\n");
442                                 else {
443                                         memcpy(skb_put(skb, count), cs->rcvbuf, count);
444                                         skb_queue_tail(&cs->rq, skb);
445                                 }
446                         }
447                 }
448                 cs->rcvidx = 0;
449                 schedule_event(cs, D_RCVBUFREADY);
450         }
451         if (val & W_INT_D_RMR) {        /* RMR */
452                 W6692_empty_fifo(cs, W_D_FIFO_THRESH);
453         }
454         if (val & W_INT_D_XFR) {        /* XFR */
455                 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
456                         del_timer(&cs->dbusytimer);
457                 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
458                         schedule_event(cs, D_CLEARBUSY);
459                 if (cs->tx_skb) {
460                         if (cs->tx_skb->len) {
461                                 W6692_fill_fifo(cs);
462                                 goto afterXFR;
463                         } else {
464                                 dev_kfree_skb_irq(cs->tx_skb);
465                                 cs->tx_cnt = 0;
466                                 cs->tx_skb = NULL;
467                         }
468                 }
469                 if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
470                         cs->tx_cnt = 0;
471                         W6692_fill_fifo(cs);
472                 } else
473                         schedule_event(cs, D_XMTBUFREADY);
474         }
475       afterXFR:
476         if (val & (W_INT_XINT0 | W_INT_XINT1)) {        /* XINT0/1 - never */
477                 if (cs->debug & L1_DEB_ISAC)
478                         debugl1(cs, "W6692 spurious XINT!");
479         }
480         if (val & W_INT_D_EXI) {        /* EXI */
481                 exval = cs->readW6692(cs, W_D_EXIR);
482                 if (cs->debug & L1_DEB_WARN)
483                         debugl1(cs, "W6692 D_EXIR %02x", exval);
484                 if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {    /* Transmit underrun/collision */
485                         debugl1(cs, "W6692 D-chan underrun/collision");
486                         printk(KERN_WARNING "HiSax: W6692 XDUN/XCOL\n");
487                         if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
488                                 del_timer(&cs->dbusytimer);
489                         if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
490                                 schedule_event(cs, D_CLEARBUSY);
491                         if (cs->tx_skb) {       /* Restart frame */
492                                 skb_push(cs->tx_skb, cs->tx_cnt);
493                                 cs->tx_cnt = 0;
494                                 W6692_fill_fifo(cs);
495                         } else {
496                                 printk(KERN_WARNING "HiSax: W6692 XDUN/XCOL no skb\n");
497                                 debugl1(cs, "W6692 XDUN/XCOL no skb");
498                                 cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_XRST);
499                         }
500                 }
501                 if (exval & W_D_EXI_RDOV) {     /* RDOV */
502                         debugl1(cs, "W6692 D-channel RDOV");
503                         printk(KERN_WARNING "HiSax: W6692 D-RDOV\n");
504                         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RRST);
505                 }
506                 if (exval & W_D_EXI_TIN2) {     /* TIN2 - never */
507                         debugl1(cs, "W6692 spurious TIN2 interrupt");
508                 }
509                 if (exval & W_D_EXI_MOC) {      /* MOC - not supported */
510                         debugl1(cs, "W6692 spurious MOC interrupt");
511                         v1 = cs->readW6692(cs, W_MOSR);
512                         debugl1(cs, "W6692 MOSR %02x", v1);
513                 }
514                 if (exval & W_D_EXI_ISC) {      /* ISC - Level1 change */
515                         v1 = cs->readW6692(cs, W_CIR);
516                         if (cs->debug & L1_DEB_ISAC)
517                                 debugl1(cs, "W6692 ISC CIR=0x%02X", v1);
518                         if (v1 & W_CIR_ICC) {
519                                 cs->dc.w6692.ph_state = v1 & W_CIR_COD_MASK;
520                                 if (cs->debug & L1_DEB_ISAC)
521                                         debugl1(cs, "ph_state_change %x", cs->dc.w6692.ph_state);
522                                 schedule_event(cs, D_L1STATECHANGE);
523                         }
524                         if (v1 & W_CIR_SCC) {
525                                 v1 = cs->readW6692(cs, W_SQR);
526                                 debugl1(cs, "W6692 SCC SQR=0x%02X", v1);
527                         }
528                 }
529                 if (exval & W_D_EXI_WEXP) {
530                         debugl1(cs, "W6692 spurious WEXP interrupt!");
531                 }
532                 if (exval & W_D_EXI_TEXP) {
533                         debugl1(cs, "W6692 spurious TEXP interrupt!");
534                 }
535         }
536         if (val & W_INT_B1_EXI) {
537                 debugl1(cs, "W6692 B channel 1 interrupt");
538                 W6692B_interrupt(cs, 0);
539         }
540         if (val & W_INT_B2_EXI) {
541                 debugl1(cs, "W6692 B channel 2 interrupt");
542                 W6692B_interrupt(cs, 1);
543         }
544         val = cs->readW6692(cs, W_ISTA);
545         if (val && icnt) {
546                 icnt--;
547                 goto StartW6692;
548         }
549         if (!icnt) {
550                 printk(KERN_WARNING "W6692 IRQ LOOP\n");
551                 cs->writeW6692(cs, W_IMASK, 0xff);
552         }
553         spin_unlock_irqrestore(&cs->lock, flags);
554         return IRQ_HANDLED;
555 }
556
557 static void
558 W6692_l1hw(struct PStack *st, int pr, void *arg)
559 {
560         struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
561         struct sk_buff *skb = arg;
562         u_long flags;
563         int val;
564
565         switch (pr) {
566                 case (PH_DATA | REQUEST):
567                         if (cs->debug & DEB_DLOG_HEX)
568                                 LogFrame(cs, skb->data, skb->len);
569                         if (cs->debug & DEB_DLOG_VERBOSE)
570                                 dlogframe(cs, skb, 0);
571                         spin_lock_irqsave(&cs->lock, flags);
572                         if (cs->tx_skb) {
573                                 skb_queue_tail(&cs->sq, skb);
574 #ifdef L2FRAME_DEBUG            /* psa */
575                                 if (cs->debug & L1_DEB_LAPD)
576                                         Logl2Frame(cs, skb, "PH_DATA Queued", 0);
577 #endif
578                         } else {
579                                 cs->tx_skb = skb;
580                                 cs->tx_cnt = 0;
581 #ifdef L2FRAME_DEBUG            /* psa */
582                                 if (cs->debug & L1_DEB_LAPD)
583                                         Logl2Frame(cs, skb, "PH_DATA", 0);
584 #endif
585                                 W6692_fill_fifo(cs);
586                         }
587                         spin_unlock_irqrestore(&cs->lock, flags);
588                         break;
589                 case (PH_PULL | INDICATION):
590                         spin_lock_irqsave(&cs->lock, flags);
591                         if (cs->tx_skb) {
592                                 if (cs->debug & L1_DEB_WARN)
593                                         debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
594                                 skb_queue_tail(&cs->sq, skb);
595                                 spin_unlock_irqrestore(&cs->lock, flags);
596                                 break;
597                         }
598                         if (cs->debug & DEB_DLOG_HEX)
599                                 LogFrame(cs, skb->data, skb->len);
600                         if (cs->debug & DEB_DLOG_VERBOSE)
601                                 dlogframe(cs, skb, 0);
602                         cs->tx_skb = skb;
603                         cs->tx_cnt = 0;
604 #ifdef L2FRAME_DEBUG            /* psa */
605                         if (cs->debug & L1_DEB_LAPD)
606                                 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
607 #endif
608                         W6692_fill_fifo(cs);
609                         spin_unlock_irqrestore(&cs->lock, flags);
610                         break;
611                 case (PH_PULL | REQUEST):
612 #ifdef L2FRAME_DEBUG            /* psa */
613                         if (cs->debug & L1_DEB_LAPD)
614                                 debugl1(cs, "-> PH_REQUEST_PULL");
615 #endif
616                         if (!cs->tx_skb) {
617                                 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
618                                 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
619                         } else
620                                 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
621                         break;
622                 case (HW_RESET | REQUEST):
623                         spin_lock_irqsave(&cs->lock, flags);
624                         if ((cs->dc.w6692.ph_state == W_L1IND_DRD)) {
625                                 ph_command(cs, W_L1CMD_ECK);
626                                 spin_unlock_irqrestore(&cs->lock, flags);
627                         } else {
628                                 ph_command(cs, W_L1CMD_RST);
629                                 cs->dc.w6692.ph_state = W_L1CMD_RST;
630                                 spin_unlock_irqrestore(&cs->lock, flags);
631                                 W6692_new_ph(cs);
632                         }
633                         break;
634                 case (HW_ENABLE | REQUEST):
635                         spin_lock_irqsave(&cs->lock, flags);
636                         ph_command(cs, W_L1CMD_ECK);
637                         spin_unlock_irqrestore(&cs->lock, flags);
638                         break;
639                 case (HW_INFO3 | REQUEST):
640                         spin_lock_irqsave(&cs->lock, flags);
641                         ph_command(cs, W_L1CMD_AR8);
642                         spin_unlock_irqrestore(&cs->lock, flags);
643                         break;
644                 case (HW_TESTLOOP | REQUEST):
645                         val = 0;
646                         if (1 & (long) arg)
647                                 val |= 0x0c;
648                         if (2 & (long) arg)
649                                 val |= 0x3;
650                         /* !!! not implemented yet */
651                         break;
652                 case (HW_DEACTIVATE | RESPONSE):
653                         skb_queue_purge(&cs->rq);
654                         skb_queue_purge(&cs->sq);
655                         if (cs->tx_skb) {
656                                 dev_kfree_skb_any(cs->tx_skb);
657                                 cs->tx_skb = NULL;
658                         }
659                         if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
660                                 del_timer(&cs->dbusytimer);
661                         if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
662                                 schedule_event(cs, D_CLEARBUSY);
663                         break;
664                 default:
665                         if (cs->debug & L1_DEB_WARN)
666                                 debugl1(cs, "W6692_l1hw unknown %04x", pr);
667                         break;
668         }
669 }
670
671 static void
672 setstack_W6692(struct PStack *st, struct IsdnCardState *cs)
673 {
674         st->l1.l1hw = W6692_l1hw;
675 }
676
677 static void
678 DC_Close_W6692(struct IsdnCardState *cs)
679 {
680 }
681
682 static void
683 dbusy_timer_handler(struct IsdnCardState *cs)
684 {
685         struct PStack *stptr;
686         int rbch, star;
687         u_long flags;
688
689         spin_lock_irqsave(&cs->lock, flags);
690         if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
691                 rbch = cs->readW6692(cs, W_D_RBCH);
692                 star = cs->readW6692(cs, W_D_STAR);
693                 if (cs->debug)
694                         debugl1(cs, "D-Channel Busy D_RBCH %02x D_STAR %02x",
695                                 rbch, star);
696                 if (star & W_D_STAR_XBZ) {      /* D-Channel Busy */
697                         test_and_set_bit(FLG_L1_DBUSY, &cs->HW_Flags);
698                         stptr = cs->stlist;
699                         while (stptr != NULL) {
700                                 stptr->l1.l1l2(stptr, PH_PAUSE | INDICATION, NULL);
701                                 stptr = stptr->next;
702                         }
703                 } else {
704                         /* discard frame; reset transceiver */
705                         test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags);
706                         if (cs->tx_skb) {
707                                 dev_kfree_skb_any(cs->tx_skb);
708                                 cs->tx_cnt = 0;
709                                 cs->tx_skb = NULL;
710                         } else {
711                                 printk(KERN_WARNING "HiSax: W6692 D-Channel Busy no skb\n");
712                                 debugl1(cs, "D-Channel Busy no skb");
713                         }
714                         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_XRST);    /* Transmitter reset */
715                         spin_unlock_irqrestore(&cs->lock, flags);
716                         cs->irq_func(cs->irq, cs);
717                         return;
718                 }
719         }
720         spin_unlock_irqrestore(&cs->lock, flags);
721 }
722
723 static void
724 W6692Bmode(struct BCState *bcs, int mode, int bchan)
725 {
726         struct IsdnCardState *cs = bcs->cs;
727
728         if (cs->debug & L1_DEB_HSCX)
729                 debugl1(cs, "w6692 %c mode %d ichan %d",
730                         '1' + bchan, mode, bchan);
731         bcs->mode = mode;
732         bcs->channel = bchan;
733         bcs->hw.w6692.bchan = bchan;
734
735         switch (mode) {
736                 case (L1_MODE_NULL):
737                         cs->BC_Write_Reg(cs, bchan, W_B_MODE, 0);
738                         break;
739                 case (L1_MODE_TRANS):
740                         cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_MMS);
741                         break;
742                 case (L1_MODE_HDLC):
743                         cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_ITF);
744                         cs->BC_Write_Reg(cs, bchan, W_B_ADM1, 0xff);
745                         cs->BC_Write_Reg(cs, bchan, W_B_ADM2, 0xff);
746                         break;
747         }
748         if (mode)
749                 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RRST |
750                                  W_B_CMDR_RACT | W_B_CMDR_XRST);
751         cs->BC_Write_Reg(cs, bchan, W_B_EXIM, 0x00);
752 }
753
754 static void
755 W6692_l2l1(struct PStack *st, int pr, void *arg)
756 {
757         struct sk_buff *skb = arg;
758         struct BCState *bcs = st->l1.bcs; 
759         u_long flags;
760
761         switch (pr) {
762                 case (PH_DATA | REQUEST):
763                         spin_lock_irqsave(&bcs->cs->lock, flags);
764                         if (bcs->tx_skb) {
765                                 skb_queue_tail(&bcs->squeue, skb);
766                         } else {
767                                 bcs->tx_skb = skb;
768                                 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
769                                 bcs->hw.w6692.count = 0;
770                                 bcs->cs->BC_Send_Data(bcs);
771                         }
772                         spin_unlock_irqrestore(&bcs->cs->lock, flags);
773                         break;
774                 case (PH_PULL | INDICATION):
775                         if (bcs->tx_skb) {
776                                 printk(KERN_WARNING "W6692_l2l1: this shouldn't happen\n");
777                                 break;
778                         }
779                         spin_lock_irqsave(&bcs->cs->lock, flags);
780                         test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
781                         bcs->tx_skb = skb;
782                         bcs->hw.w6692.count = 0;
783                         bcs->cs->BC_Send_Data(bcs);
784                         spin_unlock_irqrestore(&bcs->cs->lock, flags);
785                         break;
786                 case (PH_PULL | REQUEST):
787                         if (!bcs->tx_skb) {
788                                 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
789                                 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
790                         } else
791                                 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
792                         break;
793                 case (PH_ACTIVATE | REQUEST):
794                         spin_lock_irqsave(&bcs->cs->lock, flags);
795                         test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
796                         W6692Bmode(bcs, st->l1.mode, st->l1.bc);
797                         spin_unlock_irqrestore(&bcs->cs->lock, flags);
798                         l1_msg_b(st, pr, arg);
799                         break;
800                 case (PH_DEACTIVATE | REQUEST):
801                         l1_msg_b(st, pr, arg);
802                         break;
803                 case (PH_DEACTIVATE | CONFIRM):
804                         spin_lock_irqsave(&bcs->cs->lock, flags);
805                         test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
806                         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
807                         W6692Bmode(bcs, 0, st->l1.bc);
808                         spin_unlock_irqrestore(&bcs->cs->lock, flags);
809                         st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
810                         break;
811         }
812 }
813
814 static void
815 close_w6692state(struct BCState *bcs)
816 {
817         W6692Bmode(bcs, 0, bcs->channel);
818         if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) {
819                 kfree(bcs->hw.w6692.rcvbuf);
820                 bcs->hw.w6692.rcvbuf = NULL;
821                 kfree(bcs->blog);
822                 bcs->blog = NULL;
823                 skb_queue_purge(&bcs->rqueue);
824                 skb_queue_purge(&bcs->squeue);
825                 if (bcs->tx_skb) {
826                         dev_kfree_skb_any(bcs->tx_skb);
827                         bcs->tx_skb = NULL;
828                         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
829                 }
830         }
831 }
832
833 static int
834 open_w6692state(struct IsdnCardState *cs, struct BCState *bcs)
835 {
836         if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
837                 if (!(bcs->hw.w6692.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) {
838                         printk(KERN_WARNING
839                                "HiSax: No memory for w6692.rcvbuf\n");
840                         test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
841                         return (1);
842                 }
843                 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) {
844                         printk(KERN_WARNING
845                                "HiSax: No memory for bcs->blog\n");
846                         test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
847                         kfree(bcs->hw.w6692.rcvbuf);
848                         bcs->hw.w6692.rcvbuf = NULL;
849                         return (2);
850                 }
851                 skb_queue_head_init(&bcs->rqueue);
852                 skb_queue_head_init(&bcs->squeue);
853         }
854         bcs->tx_skb = NULL;
855         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
856         bcs->event = 0;
857         bcs->hw.w6692.rcvidx = 0;
858         bcs->tx_cnt = 0;
859         return (0);
860 }
861
862 static int
863 setstack_w6692(struct PStack *st, struct BCState *bcs)
864 {
865         bcs->channel = st->l1.bc;
866         if (open_w6692state(st->l1.hardware, bcs))
867                 return (-1);
868         st->l1.bcs = bcs;
869         st->l2.l2l1 = W6692_l2l1;
870         setstack_manager(st);
871         bcs->st = st;
872         setstack_l1_B(st);
873         return (0);
874 }
875
876 static void resetW6692(struct IsdnCardState *cs)
877 {
878         cs->writeW6692(cs, W_D_CTL, W_D_CTL_SRST);
879         mdelay(10);
880         cs->writeW6692(cs, W_D_CTL, 0x00);
881         mdelay(10);
882         cs->writeW6692(cs, W_IMASK, 0xff);
883         cs->writeW6692(cs, W_D_SAM, 0xff);
884         cs->writeW6692(cs, W_D_TAM, 0xff);
885         cs->writeW6692(cs, W_D_EXIM, 0x00);
886         cs->writeW6692(cs, W_D_MODE, W_D_MODE_RACT);
887         cs->writeW6692(cs, W_IMASK, 0x18);
888         if (cs->subtyp == W6692_USR) {
889                 /* seems that USR implemented some power control features
890                  * Pin 79 is connected to the oscilator circuit so we
891                  * have to handle it here
892                  */
893                 cs->writeW6692(cs, W_PCTL, 0x80);
894                 cs->writeW6692(cs, W_XDATA, 0x00);
895         }
896 }
897
898 static void initW6692(struct IsdnCardState *cs, int part)
899 {
900         if (part & 1) {
901                 cs->setstack_d = setstack_W6692;
902                 cs->DC_Close = DC_Close_W6692;
903                 cs->dbusytimer.function = (void *) dbusy_timer_handler;
904                 cs->dbusytimer.data = (long) cs;
905                 init_timer(&cs->dbusytimer);
906                 resetW6692(cs);
907                 ph_command(cs, W_L1CMD_RST);
908                 cs->dc.w6692.ph_state = W_L1CMD_RST;
909                 W6692_new_ph(cs);
910                 ph_command(cs, W_L1CMD_ECK);
911
912                 cs->bcs[0].BC_SetStack = setstack_w6692;
913                 cs->bcs[1].BC_SetStack = setstack_w6692;
914                 cs->bcs[0].BC_Close = close_w6692state;
915                 cs->bcs[1].BC_Close = close_w6692state;
916                 W6692Bmode(cs->bcs, 0, 0);
917                 W6692Bmode(cs->bcs + 1, 0, 0);
918         }
919         if (part & 2) {
920                 /* Reenable all IRQ */
921                 cs->writeW6692(cs, W_IMASK, 0x18);
922                 cs->writeW6692(cs, W_D_EXIM, 0x00);
923                 cs->BC_Write_Reg(cs, 0, W_B_EXIM, 0x00);
924                 cs->BC_Write_Reg(cs, 1, W_B_EXIM, 0x00);
925                 /* Reset D-chan receiver and transmitter */
926                 cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
927         }
928 }
929
930 /* Interface functions */
931
932 static u_char
933 ReadW6692(struct IsdnCardState *cs, u_char offset)
934 {
935         return (inb(cs->hw.w6692.iobase + offset));
936 }
937
938 static void
939 WriteW6692(struct IsdnCardState *cs, u_char offset, u_char value)
940 {
941         outb(value, cs->hw.w6692.iobase + offset);
942 }
943
944 static void
945 ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
946 {
947         insb(cs->hw.w6692.iobase + W_D_RFIFO, data, size);
948 }
949
950 static void
951 WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
952 {
953         outsb(cs->hw.w6692.iobase + W_D_XFIFO, data, size);
954 }
955
956 static u_char
957 ReadW6692B(struct IsdnCardState *cs, int bchan, u_char offset)
958 {
959         return (inb(cs->hw.w6692.iobase + (bchan ? 0x40 : 0) + offset));
960 }
961
962 static void
963 WriteW6692B(struct IsdnCardState *cs, int bchan, u_char offset, u_char value)
964 {
965         outb(value, cs->hw.w6692.iobase + (bchan ? 0x40 : 0) + offset);
966 }
967
968 static int
969 w6692_card_msg(struct IsdnCardState *cs, int mt, void *arg)
970 {
971         switch (mt) {
972                 case CARD_RESET:
973                         resetW6692(cs);
974                         return (0);
975                 case CARD_RELEASE:
976                         cs->writeW6692(cs, W_IMASK, 0xff);
977                         release_region(cs->hw.w6692.iobase, 256);
978                         if (cs->subtyp == W6692_USR) {
979                                 cs->writeW6692(cs, W_XDATA, 0x04);
980                         }
981                         return (0);
982                 case CARD_INIT:
983                         initW6692(cs, 3);
984                         return (0);
985                 case CARD_TEST:
986                         return (0);
987         }
988         return (0);
989 }
990
991 static int id_idx ;
992
993 static struct pci_dev *dev_w6692 __devinitdata = NULL;
994
995 int __devinit
996 setup_w6692(struct IsdnCard *card)
997 {
998         struct IsdnCardState *cs = card->cs;
999         char tmp[64];
1000         u_char found = 0;
1001         u_char pci_irq = 0;
1002         u_int pci_ioaddr = 0;
1003
1004         strcpy(tmp, w6692_revision);
1005         printk(KERN_INFO "HiSax: W6692 driver Rev. %s\n", HiSax_getrev(tmp));
1006         if (cs->typ != ISDN_CTYPE_W6692)
1007                 return (0);
1008
1009         while (id_list[id_idx].vendor_id) {
1010                 dev_w6692 = hisax_find_pci_device(id_list[id_idx].vendor_id,
1011                                             id_list[id_idx].device_id,
1012                                             dev_w6692);
1013                 if (dev_w6692) {
1014                         if (pci_enable_device(dev_w6692))
1015                                 continue;
1016                         cs->subtyp = id_idx;
1017                         break;
1018                 }
1019                 id_idx++;
1020         }
1021         if (dev_w6692) {
1022                 found = 1;
1023                 pci_irq = dev_w6692->irq;
1024                 /* I think address 0 is allways the configuration area */
1025                 /* and address 1 is the real IO space KKe 03.09.99 */
1026                 pci_ioaddr = pci_resource_start(dev_w6692, 1);
1027                 /* USR ISDN PCI card TA need some special handling */
1028                 if (cs->subtyp == W6692_WINBOND) {
1029                         if ((W6692_SV_USR == dev_w6692->subsystem_vendor) &&
1030                             (W6692_SD_USR == dev_w6692->subsystem_device)) {
1031                                 cs->subtyp = W6692_USR;
1032                         }
1033                 }
1034         }
1035         if (!found) {
1036                 printk(KERN_WARNING "W6692: No PCI card found\n");
1037                 return (0);
1038         }
1039         cs->irq = pci_irq;
1040         if (!cs->irq) {
1041                 printk(KERN_WARNING "W6692: No IRQ for PCI card found\n");
1042                 return (0);
1043         }
1044         if (!pci_ioaddr) {
1045                 printk(KERN_WARNING "W6692: NO I/O Base Address found\n");
1046                 return (0);
1047         }
1048         cs->hw.w6692.iobase = pci_ioaddr;
1049         printk(KERN_INFO "Found: %s %s, I/O base: 0x%x, irq: %d\n",
1050                id_list[cs->subtyp].vendor_name, id_list[cs->subtyp].card_name,
1051                pci_ioaddr, pci_irq);
1052         if (!request_region(cs->hw.w6692.iobase, 256, id_list[cs->subtyp].card_name)) {
1053                 printk(KERN_WARNING
1054                        "HiSax: %s I/O ports %x-%x already in use\n",
1055                        id_list[cs->subtyp].card_name,
1056                        cs->hw.w6692.iobase,
1057                        cs->hw.w6692.iobase + 255);
1058                 return (0);
1059         }
1060
1061         printk(KERN_INFO
1062                "HiSax: %s config irq:%d I/O:%x\n",
1063                id_list[cs->subtyp].card_name, cs->irq,
1064                cs->hw.w6692.iobase);
1065
1066         INIT_WORK(&cs->tqueue, W6692_bh);
1067         cs->readW6692 = &ReadW6692;
1068         cs->writeW6692 = &WriteW6692;
1069         cs->readisacfifo = &ReadISACfifo;
1070         cs->writeisacfifo = &WriteISACfifo;
1071         cs->BC_Read_Reg = &ReadW6692B;
1072         cs->BC_Write_Reg = &WriteW6692B;
1073         cs->BC_Send_Data = &W6692B_fill_fifo;
1074         cs->cardmsg = &w6692_card_msg;
1075         cs->irq_func = &W6692_interrupt;
1076         cs->irq_flags |= IRQF_SHARED;
1077         W6692Version(cs, "W6692:");
1078         printk(KERN_INFO "W6692 ISTA=0x%X\n", ReadW6692(cs, W_ISTA));
1079         printk(KERN_INFO "W6692 IMASK=0x%X\n", ReadW6692(cs, W_IMASK));
1080         printk(KERN_INFO "W6692 D_EXIR=0x%X\n", ReadW6692(cs, W_D_EXIR));
1081         printk(KERN_INFO "W6692 D_EXIM=0x%X\n", ReadW6692(cs, W_D_EXIM));
1082         printk(KERN_INFO "W6692 D_RSTA=0x%X\n", ReadW6692(cs, W_D_RSTA));
1083         return (1);
1084 }