IB/ipath: Changes to support PIO bandwidth check on IBA7220
[linux-2.6.git] / drivers / infiniband / hw / ipath / ipath_driver.c
1 /*
2  * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
4  *
5  * This software is available to you under a choice of one of two
6  * licenses.  You may choose to be licensed under the terms of the GNU
7  * General Public License (GPL) Version 2, available from the file
8  * COPYING in the main directory of this source tree, or the
9  * OpenIB.org BSD license below:
10  *
11  *     Redistribution and use in source and binary forms, with or
12  *     without modification, are permitted provided that the following
13  *     conditions are met:
14  *
15  *      - Redistributions of source code must retain the above
16  *        copyright notice, this list of conditions and the following
17  *        disclaimer.
18  *
19  *      - Redistributions in binary form must reproduce the above
20  *        copyright notice, this list of conditions and the following
21  *        disclaimer in the documentation and/or other materials
22  *        provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  */
33
34 #include <linux/spinlock.h>
35 #include <linux/idr.h>
36 #include <linux/pci.h>
37 #include <linux/io.h>
38 #include <linux/delay.h>
39 #include <linux/netdevice.h>
40 #include <linux/vmalloc.h>
41
42 #include "ipath_kernel.h"
43 #include "ipath_verbs.h"
44 #include "ipath_common.h"
45
46 static void ipath_update_pio_bufs(struct ipath_devdata *);
47
48 const char *ipath_get_unit_name(int unit)
49 {
50         static char iname[16];
51         snprintf(iname, sizeof iname, "infinipath%u", unit);
52         return iname;
53 }
54
55 #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: "
56 #define PFX IPATH_DRV_NAME ": "
57
58 /*
59  * The size has to be longer than this string, so we can append
60  * board/chip information to it in the init code.
61  */
62 const char ib_ipath_version[] = IPATH_IDSTR "\n";
63
64 static struct idr unit_table;
65 DEFINE_SPINLOCK(ipath_devs_lock);
66 LIST_HEAD(ipath_dev_list);
67
68 wait_queue_head_t ipath_state_wait;
69
70 unsigned ipath_debug = __IPATH_INFO;
71
72 module_param_named(debug, ipath_debug, uint, S_IWUSR | S_IRUGO);
73 MODULE_PARM_DESC(debug, "mask for debug prints");
74 EXPORT_SYMBOL_GPL(ipath_debug);
75
76 MODULE_LICENSE("GPL");
77 MODULE_AUTHOR("QLogic <support@pathscale.com>");
78 MODULE_DESCRIPTION("QLogic InfiniPath driver");
79
80 const char *ipath_ibcstatus_str[] = {
81         "Disabled",
82         "LinkUp",
83         "PollActive",
84         "PollQuiet",
85         "SleepDelay",
86         "SleepQuiet",
87         "LState6",              /* unused */
88         "LState7",              /* unused */
89         "CfgDebounce",
90         "CfgRcvfCfg",
91         "CfgWaitRmt",
92         "CfgIdle",
93         "RecovRetrain",
94         "LState0xD",            /* unused */
95         "RecovWaitRmt",
96         "RecovIdle",
97 };
98
99 static void __devexit ipath_remove_one(struct pci_dev *);
100 static int __devinit ipath_init_one(struct pci_dev *,
101                                     const struct pci_device_id *);
102
103 /* Only needed for registration, nothing else needs this info */
104 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
105 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
106 #define PCI_DEVICE_ID_INFINIPATH_PE800 0x10
107
108 /* Number of seconds before our card status check...  */
109 #define STATUS_TIMEOUT 60
110
111 static const struct pci_device_id ipath_pci_tbl[] = {
112         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_HT) },
113         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_PE800) },
114         { 0, }
115 };
116
117 MODULE_DEVICE_TABLE(pci, ipath_pci_tbl);
118
119 static struct pci_driver ipath_driver = {
120         .name = IPATH_DRV_NAME,
121         .probe = ipath_init_one,
122         .remove = __devexit_p(ipath_remove_one),
123         .id_table = ipath_pci_tbl,
124         .driver = {
125                 .groups = ipath_driver_attr_groups,
126         },
127 };
128
129 static void ipath_check_status(struct work_struct *work)
130 {
131         struct ipath_devdata *dd = container_of(work, struct ipath_devdata,
132                                                 status_work.work);
133
134         /*
135          * If we don't have any interrupts, let the user know and
136          * don't bother checking again.
137          */
138         if (dd->ipath_int_counter == 0)
139                 dev_err(&dd->pcidev->dev, "No interrupts detected.\n");
140 }
141
142 static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev,
143                              u32 *bar0, u32 *bar1)
144 {
145         int ret;
146
147         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
148         if (ret)
149                 ipath_dev_err(dd, "failed to read bar0 before enable: "
150                               "error %d\n", -ret);
151
152         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, bar1);
153         if (ret)
154                 ipath_dev_err(dd, "failed to read bar1 before enable: "
155                               "error %d\n", -ret);
156
157         ipath_dbg("Read bar0 %x bar1 %x\n", *bar0, *bar1);
158 }
159
160 static void ipath_free_devdata(struct pci_dev *pdev,
161                                struct ipath_devdata *dd)
162 {
163         unsigned long flags;
164
165         pci_set_drvdata(pdev, NULL);
166
167         if (dd->ipath_unit != -1) {
168                 spin_lock_irqsave(&ipath_devs_lock, flags);
169                 idr_remove(&unit_table, dd->ipath_unit);
170                 list_del(&dd->ipath_list);
171                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
172         }
173         vfree(dd);
174 }
175
176 static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev)
177 {
178         unsigned long flags;
179         struct ipath_devdata *dd;
180         int ret;
181
182         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
183                 dd = ERR_PTR(-ENOMEM);
184                 goto bail;
185         }
186
187         dd = vmalloc(sizeof(*dd));
188         if (!dd) {
189                 dd = ERR_PTR(-ENOMEM);
190                 goto bail;
191         }
192         memset(dd, 0, sizeof(*dd));
193         dd->ipath_unit = -1;
194
195         spin_lock_irqsave(&ipath_devs_lock, flags);
196
197         ret = idr_get_new(&unit_table, dd, &dd->ipath_unit);
198         if (ret < 0) {
199                 printk(KERN_ERR IPATH_DRV_NAME
200                        ": Could not allocate unit ID: error %d\n", -ret);
201                 ipath_free_devdata(pdev, dd);
202                 dd = ERR_PTR(ret);
203                 goto bail_unlock;
204         }
205
206         dd->pcidev = pdev;
207         pci_set_drvdata(pdev, dd);
208
209         INIT_DELAYED_WORK(&dd->status_work, ipath_check_status);
210
211         list_add(&dd->ipath_list, &ipath_dev_list);
212
213 bail_unlock:
214         spin_unlock_irqrestore(&ipath_devs_lock, flags);
215
216 bail:
217         return dd;
218 }
219
220 static inline struct ipath_devdata *__ipath_lookup(int unit)
221 {
222         return idr_find(&unit_table, unit);
223 }
224
225 struct ipath_devdata *ipath_lookup(int unit)
226 {
227         struct ipath_devdata *dd;
228         unsigned long flags;
229
230         spin_lock_irqsave(&ipath_devs_lock, flags);
231         dd = __ipath_lookup(unit);
232         spin_unlock_irqrestore(&ipath_devs_lock, flags);
233
234         return dd;
235 }
236
237 int ipath_count_units(int *npresentp, int *nupp, u32 *maxportsp)
238 {
239         int nunits, npresent, nup;
240         struct ipath_devdata *dd;
241         unsigned long flags;
242         u32 maxports;
243
244         nunits = npresent = nup = maxports = 0;
245
246         spin_lock_irqsave(&ipath_devs_lock, flags);
247
248         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
249                 nunits++;
250                 if ((dd->ipath_flags & IPATH_PRESENT) && dd->ipath_kregbase)
251                         npresent++;
252                 if (dd->ipath_lid &&
253                     !(dd->ipath_flags & (IPATH_DISABLED | IPATH_LINKDOWN
254                                          | IPATH_LINKUNK)))
255                         nup++;
256                 if (dd->ipath_cfgports > maxports)
257                         maxports = dd->ipath_cfgports;
258         }
259
260         spin_unlock_irqrestore(&ipath_devs_lock, flags);
261
262         if (npresentp)
263                 *npresentp = npresent;
264         if (nupp)
265                 *nupp = nup;
266         if (maxportsp)
267                 *maxportsp = maxports;
268
269         return nunits;
270 }
271
272 /*
273  * These next two routines are placeholders in case we don't have per-arch
274  * code for controlling write combining.  If explicit control of write
275  * combining is not available, performance will probably be awful.
276  */
277
278 int __attribute__((weak)) ipath_enable_wc(struct ipath_devdata *dd)
279 {
280         return -EOPNOTSUPP;
281 }
282
283 void __attribute__((weak)) ipath_disable_wc(struct ipath_devdata *dd)
284 {
285 }
286
287 /*
288  * Perform a PIO buffer bandwidth write test, to verify proper system
289  * configuration.  Even when all the setup calls work, occasionally
290  * BIOS or other issues can prevent write combining from working, or
291  * can cause other bandwidth problems to the chip.
292  *
293  * This test simply writes the same buffer over and over again, and
294  * measures close to the peak bandwidth to the chip (not testing
295  * data bandwidth to the wire).   On chips that use an address-based
296  * trigger to send packets to the wire, this is easy.  On chips that
297  * use a count to trigger, we want to make sure that the packet doesn't
298  * go out on the wire, or trigger flow control checks.
299  */
300 static void ipath_verify_pioperf(struct ipath_devdata *dd)
301 {
302         u32 pbnum, cnt, lcnt;
303         u32 __iomem *piobuf;
304         u32 *addr;
305         u64 msecs, emsecs;
306
307         piobuf = ipath_getpiobuf(dd, &pbnum);
308         if (!piobuf) {
309                 dev_info(&dd->pcidev->dev,
310                         "No PIObufs for checking perf, skipping\n");
311                 return;
312         }
313
314         /*
315          * Enough to give us a reasonable test, less than piobuf size, and
316          * likely multiple of store buffer length.
317          */
318         cnt = 1024;
319
320         addr = vmalloc(cnt);
321         if (!addr) {
322                 dev_info(&dd->pcidev->dev,
323                         "Couldn't get memory for checking PIO perf,"
324                         " skipping\n");
325                 goto done;
326         }
327
328         preempt_disable();  /* we want reasonably accurate elapsed time */
329         msecs = 1 + jiffies_to_msecs(jiffies);
330         for (lcnt = 0; lcnt < 10000U; lcnt++) {
331                 /* wait until we cross msec boundary */
332                 if (jiffies_to_msecs(jiffies) >= msecs)
333                         break;
334                 udelay(1);
335         }
336
337         ipath_disable_armlaunch(dd);
338
339         writeq(0, piobuf); /* length 0, no dwords actually sent */
340         ipath_flush_wc();
341
342         /*
343          * this is only roughly accurate, since even with preempt we
344          * still take interrupts that could take a while.   Running for
345          * >= 5 msec seems to get us "close enough" to accurate values
346          */
347         msecs = jiffies_to_msecs(jiffies);
348         for (emsecs = lcnt = 0; emsecs <= 5UL; lcnt++) {
349                 __iowrite32_copy(piobuf + 64, addr, cnt >> 2);
350                 emsecs = jiffies_to_msecs(jiffies) - msecs;
351         }
352
353         /* 1 GiB/sec, slightly over IB SDR line rate */
354         if (lcnt < (emsecs * 1024U))
355                 ipath_dev_err(dd,
356                         "Performance problem: bandwidth to PIO buffers is "
357                         "only %u MiB/sec\n",
358                         lcnt / (u32) emsecs);
359         else
360                 ipath_dbg("PIO buffer bandwidth %u MiB/sec is OK\n",
361                         lcnt / (u32) emsecs);
362
363         preempt_enable();
364
365         vfree(addr);
366
367 done:
368         /* disarm piobuf, so it's available again */
369         ipath_disarm_piobufs(dd, pbnum, 1);
370         ipath_enable_armlaunch(dd);
371 }
372
373 static int __devinit ipath_init_one(struct pci_dev *pdev,
374                                     const struct pci_device_id *ent)
375 {
376         int ret, len, j;
377         struct ipath_devdata *dd;
378         unsigned long long addr;
379         u32 bar0 = 0, bar1 = 0;
380
381         dd = ipath_alloc_devdata(pdev);
382         if (IS_ERR(dd)) {
383                 ret = PTR_ERR(dd);
384                 printk(KERN_ERR IPATH_DRV_NAME
385                        ": Could not allocate devdata: error %d\n", -ret);
386                 goto bail;
387         }
388
389         ipath_cdbg(VERBOSE, "initializing unit #%u\n", dd->ipath_unit);
390
391         ret = pci_enable_device(pdev);
392         if (ret) {
393                 /* This can happen iff:
394                  *
395                  * We did a chip reset, and then failed to reprogram the
396                  * BAR, or the chip reset due to an internal error.  We then
397                  * unloaded the driver and reloaded it.
398                  *
399                  * Both reset cases set the BAR back to initial state.  For
400                  * the latter case, the AER sticky error bit at offset 0x718
401                  * should be set, but the Linux kernel doesn't yet know
402                  * about that, it appears.  If the original BAR was retained
403                  * in the kernel data structures, this may be OK.
404                  */
405                 ipath_dev_err(dd, "enable unit %d failed: error %d\n",
406                               dd->ipath_unit, -ret);
407                 goto bail_devdata;
408         }
409         addr = pci_resource_start(pdev, 0);
410         len = pci_resource_len(pdev, 0);
411         ipath_cdbg(VERBOSE, "regbase (0) %llx len %d pdev->irq %d, vend %x/%x "
412                    "driver_data %lx\n", addr, len, pdev->irq, ent->vendor,
413                    ent->device, ent->driver_data);
414
415         read_bars(dd, pdev, &bar0, &bar1);
416
417         if (!bar1 && !(bar0 & ~0xf)) {
418                 if (addr) {
419                         dev_info(&pdev->dev, "BAR is 0 (probable RESET), "
420                                  "rewriting as %llx\n", addr);
421                         ret = pci_write_config_dword(
422                                 pdev, PCI_BASE_ADDRESS_0, addr);
423                         if (ret) {
424                                 ipath_dev_err(dd, "rewrite of BAR0 "
425                                               "failed: err %d\n", -ret);
426                                 goto bail_disable;
427                         }
428                         ret = pci_write_config_dword(
429                                 pdev, PCI_BASE_ADDRESS_1, addr >> 32);
430                         if (ret) {
431                                 ipath_dev_err(dd, "rewrite of BAR1 "
432                                               "failed: err %d\n", -ret);
433                                 goto bail_disable;
434                         }
435                 } else {
436                         ipath_dev_err(dd, "BAR is 0 (probable RESET), "
437                                       "not usable until reboot\n");
438                         ret = -ENODEV;
439                         goto bail_disable;
440                 }
441         }
442
443         ret = pci_request_regions(pdev, IPATH_DRV_NAME);
444         if (ret) {
445                 dev_info(&pdev->dev, "pci_request_regions unit %u fails: "
446                          "err %d\n", dd->ipath_unit, -ret);
447                 goto bail_disable;
448         }
449
450         ret = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
451         if (ret) {
452                 /*
453                  * if the 64 bit setup fails, try 32 bit.  Some systems
454                  * do not setup 64 bit maps on systems with 2GB or less
455                  * memory installed.
456                  */
457                 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
458                 if (ret) {
459                         dev_info(&pdev->dev,
460                                 "Unable to set DMA mask for unit %u: %d\n",
461                                 dd->ipath_unit, ret);
462                         goto bail_regions;
463                 }
464                 else {
465                         ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
466                         ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
467                         if (ret)
468                                 dev_info(&pdev->dev,
469                                         "Unable to set DMA consistent mask "
470                                         "for unit %u: %d\n",
471                                         dd->ipath_unit, ret);
472
473                 }
474         }
475         else {
476                 ret = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
477                 if (ret)
478                         dev_info(&pdev->dev,
479                                 "Unable to set DMA consistent mask "
480                                 "for unit %u: %d\n",
481                                 dd->ipath_unit, ret);
482         }
483
484         pci_set_master(pdev);
485
486         /*
487          * Save BARs to rewrite after device reset.  Save all 64 bits of
488          * BAR, just in case.
489          */
490         dd->ipath_pcibar0 = addr;
491         dd->ipath_pcibar1 = addr >> 32;
492         dd->ipath_deviceid = ent->device;       /* save for later use */
493         dd->ipath_vendorid = ent->vendor;
494
495         /* setup the chip-specific functions, as early as possible. */
496         switch (ent->device) {
497         case PCI_DEVICE_ID_INFINIPATH_HT:
498 #ifdef CONFIG_HT_IRQ
499                 ipath_init_iba6110_funcs(dd);
500                 break;
501 #else
502                 ipath_dev_err(dd, "QLogic HT device 0x%x cannot work if "
503                               "CONFIG_HT_IRQ is not enabled\n", ent->device);
504                 return -ENODEV;
505 #endif
506         case PCI_DEVICE_ID_INFINIPATH_PE800:
507 #ifdef CONFIG_PCI_MSI
508                 ipath_init_iba6120_funcs(dd);
509                 break;
510 #else
511                 ipath_dev_err(dd, "QLogic PCIE device 0x%x cannot work if "
512                               "CONFIG_PCI_MSI is not enabled\n", ent->device);
513                 return -ENODEV;
514 #endif
515         default:
516                 ipath_dev_err(dd, "Found unknown QLogic deviceid 0x%x, "
517                               "failing\n", ent->device);
518                 return -ENODEV;
519         }
520
521         for (j = 0; j < 6; j++) {
522                 if (!pdev->resource[j].start)
523                         continue;
524                 ipath_cdbg(VERBOSE, "BAR %d start %llx, end %llx, len %llx\n",
525                            j, (unsigned long long)pdev->resource[j].start,
526                            (unsigned long long)pdev->resource[j].end,
527                            (unsigned long long)pci_resource_len(pdev, j));
528         }
529
530         if (!addr) {
531                 ipath_dev_err(dd, "No valid address in BAR 0!\n");
532                 ret = -ENODEV;
533                 goto bail_regions;
534         }
535
536         dd->ipath_pcirev = pdev->revision;
537
538 #if defined(__powerpc__)
539         /* There isn't a generic way to specify writethrough mappings */
540         dd->ipath_kregbase = __ioremap(addr, len,
541                 (_PAGE_NO_CACHE|_PAGE_WRITETHRU));
542 #else
543         dd->ipath_kregbase = ioremap_nocache(addr, len);
544 #endif
545
546         if (!dd->ipath_kregbase) {
547                 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
548                           addr);
549                 ret = -ENOMEM;
550                 goto bail_iounmap;
551         }
552         dd->ipath_kregend = (u64 __iomem *)
553                 ((void __iomem *)dd->ipath_kregbase + len);
554         dd->ipath_physaddr = addr;      /* used for io_remap, etc. */
555         /* for user mmap */
556         ipath_cdbg(VERBOSE, "mapped io addr %llx to kregbase %p\n",
557                    addr, dd->ipath_kregbase);
558
559         /*
560          * clear ipath_flags here instead of in ipath_init_chip as it is set
561          * by ipath_setup_htconfig.
562          */
563         dd->ipath_flags = 0;
564         dd->ipath_lli_counter = 0;
565         dd->ipath_lli_errors = 0;
566
567         if (dd->ipath_f_bus(dd, pdev))
568                 ipath_dev_err(dd, "Failed to setup config space; "
569                               "continuing anyway\n");
570
571         /*
572          * set up our interrupt handler; IRQF_SHARED probably not needed,
573          * since MSI interrupts shouldn't be shared but won't  hurt for now.
574          * check 0 irq after we return from chip-specific bus setup, since
575          * that can affect this due to setup
576          */
577         if (!dd->ipath_irq)
578                 ipath_dev_err(dd, "irq is 0, BIOS error?  Interrupts won't "
579                               "work\n");
580         else {
581                 ret = request_irq(dd->ipath_irq, ipath_intr, IRQF_SHARED,
582                                   IPATH_DRV_NAME, dd);
583                 if (ret) {
584                         ipath_dev_err(dd, "Couldn't setup irq handler, "
585                                       "irq=%d: %d\n", dd->ipath_irq, ret);
586                         goto bail_iounmap;
587                 }
588         }
589
590         ret = ipath_init_chip(dd, 0);   /* do the chip-specific init */
591         if (ret)
592                 goto bail_irqsetup;
593
594         ret = ipath_enable_wc(dd);
595
596         if (ret) {
597                 ipath_dev_err(dd, "Write combining not enabled "
598                               "(err %d): performance may be poor\n",
599                               -ret);
600                 ret = 0;
601         }
602
603         ipath_verify_pioperf(dd);
604
605         ipath_device_create_group(&pdev->dev, dd);
606         ipathfs_add_device(dd);
607         ipath_user_add(dd);
608         ipath_diag_add(dd);
609         ipath_register_ib_device(dd);
610
611         /* Check that card status in STATUS_TIMEOUT seconds. */
612         schedule_delayed_work(&dd->status_work, HZ * STATUS_TIMEOUT);
613
614         goto bail;
615
616 bail_irqsetup:
617         if (pdev->irq) free_irq(pdev->irq, dd);
618
619 bail_iounmap:
620         iounmap((volatile void __iomem *) dd->ipath_kregbase);
621
622 bail_regions:
623         pci_release_regions(pdev);
624
625 bail_disable:
626         pci_disable_device(pdev);
627
628 bail_devdata:
629         ipath_free_devdata(pdev, dd);
630
631 bail:
632         return ret;
633 }
634
635 static void __devexit cleanup_device(struct ipath_devdata *dd)
636 {
637         int port;
638
639         if (*dd->ipath_statusp & IPATH_STATUS_CHIP_PRESENT) {
640                 /* can't do anything more with chip; needs re-init */
641                 *dd->ipath_statusp &= ~IPATH_STATUS_CHIP_PRESENT;
642                 if (dd->ipath_kregbase) {
643                         /*
644                          * if we haven't already cleaned up before these are
645                          * to ensure any register reads/writes "fail" until
646                          * re-init
647                          */
648                         dd->ipath_kregbase = NULL;
649                         dd->ipath_uregbase = 0;
650                         dd->ipath_sregbase = 0;
651                         dd->ipath_cregbase = 0;
652                         dd->ipath_kregsize = 0;
653                 }
654                 ipath_disable_wc(dd);
655         }
656
657         if (dd->ipath_pioavailregs_dma) {
658                 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
659                                   (void *) dd->ipath_pioavailregs_dma,
660                                   dd->ipath_pioavailregs_phys);
661                 dd->ipath_pioavailregs_dma = NULL;
662         }
663         if (dd->ipath_dummy_hdrq) {
664                 dma_free_coherent(&dd->pcidev->dev,
665                         dd->ipath_pd[0]->port_rcvhdrq_size,
666                         dd->ipath_dummy_hdrq, dd->ipath_dummy_hdrq_phys);
667                 dd->ipath_dummy_hdrq = NULL;
668         }
669
670         if (dd->ipath_pageshadow) {
671                 struct page **tmpp = dd->ipath_pageshadow;
672                 dma_addr_t *tmpd = dd->ipath_physshadow;
673                 int i, cnt = 0;
674
675                 ipath_cdbg(VERBOSE, "Unlocking any expTID pages still "
676                            "locked\n");
677                 for (port = 0; port < dd->ipath_cfgports; port++) {
678                         int port_tidbase = port * dd->ipath_rcvtidcnt;
679                         int maxtid = port_tidbase + dd->ipath_rcvtidcnt;
680                         for (i = port_tidbase; i < maxtid; i++) {
681                                 if (!tmpp[i])
682                                         continue;
683                                 pci_unmap_page(dd->pcidev, tmpd[i],
684                                         PAGE_SIZE, PCI_DMA_FROMDEVICE);
685                                 ipath_release_user_pages(&tmpp[i], 1);
686                                 tmpp[i] = NULL;
687                                 cnt++;
688                         }
689                 }
690                 if (cnt) {
691                         ipath_stats.sps_pageunlocks += cnt;
692                         ipath_cdbg(VERBOSE, "There were still %u expTID "
693                                    "entries locked\n", cnt);
694                 }
695                 if (ipath_stats.sps_pagelocks ||
696                     ipath_stats.sps_pageunlocks)
697                         ipath_cdbg(VERBOSE, "%llu pages locked, %llu "
698                                    "unlocked via ipath_m{un}lock\n",
699                                    (unsigned long long)
700                                    ipath_stats.sps_pagelocks,
701                                    (unsigned long long)
702                                    ipath_stats.sps_pageunlocks);
703
704                 ipath_cdbg(VERBOSE, "Free shadow page tid array at %p\n",
705                            dd->ipath_pageshadow);
706                 tmpp = dd->ipath_pageshadow;
707                 dd->ipath_pageshadow = NULL;
708                 vfree(tmpp);
709         }
710
711         /*
712          * free any resources still in use (usually just kernel ports)
713          * at unload; we do for portcnt, not cfgports, because cfgports
714          * could have changed while we were loaded.
715          */
716         for (port = 0; port < dd->ipath_portcnt; port++) {
717                 struct ipath_portdata *pd = dd->ipath_pd[port];
718                 dd->ipath_pd[port] = NULL;
719                 ipath_free_pddata(dd, pd);
720         }
721         kfree(dd->ipath_pd);
722         /*
723          * debuggability, in case some cleanup path tries to use it
724          * after this
725          */
726         dd->ipath_pd = NULL;
727 }
728
729 static void __devexit ipath_remove_one(struct pci_dev *pdev)
730 {
731         struct ipath_devdata *dd = pci_get_drvdata(pdev);
732
733         ipath_cdbg(VERBOSE, "removing, pdev=%p, dd=%p\n", pdev, dd);
734
735         /*
736          * disable the IB link early, to be sure no new packets arrive, which
737          * complicates the shutdown process
738          */
739         ipath_shutdown_device(dd);
740
741         cancel_delayed_work(&dd->status_work);
742         flush_scheduled_work();
743
744         if (dd->verbs_dev)
745                 ipath_unregister_ib_device(dd->verbs_dev);
746
747         ipath_diag_remove(dd);
748         ipath_user_remove(dd);
749         ipathfs_remove_device(dd);
750         ipath_device_remove_group(&pdev->dev, dd);
751
752         ipath_cdbg(VERBOSE, "Releasing pci memory regions, dd %p, "
753                    "unit %u\n", dd, (u32) dd->ipath_unit);
754
755         cleanup_device(dd);
756
757         /*
758          * turn off rcv, send, and interrupts for all ports, all drivers
759          * should also hard reset the chip here?
760          * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
761          * for all versions of the driver, if they were allocated
762          */
763         if (dd->ipath_irq) {
764                 ipath_cdbg(VERBOSE, "unit %u free irq %d\n",
765                            dd->ipath_unit, dd->ipath_irq);
766                 dd->ipath_f_free_irq(dd);
767         } else
768                 ipath_dbg("irq is 0, not doing free_irq "
769                           "for unit %u\n", dd->ipath_unit);
770         /*
771          * we check for NULL here, because it's outside
772          * the kregbase check, and we need to call it
773          * after the free_irq.  Thus it's possible that
774          * the function pointers were never initialized.
775          */
776         if (dd->ipath_f_cleanup)
777                 /* clean up chip-specific stuff */
778                 dd->ipath_f_cleanup(dd);
779
780         ipath_cdbg(VERBOSE, "Unmapping kregbase %p\n", dd->ipath_kregbase);
781         iounmap((volatile void __iomem *) dd->ipath_kregbase);
782         pci_release_regions(pdev);
783         ipath_cdbg(VERBOSE, "calling pci_disable_device\n");
784         pci_disable_device(pdev);
785
786         ipath_free_devdata(pdev, dd);
787 }
788
789 /* general driver use */
790 DEFINE_MUTEX(ipath_mutex);
791
792 static DEFINE_SPINLOCK(ipath_pioavail_lock);
793
794 /**
795  * ipath_disarm_piobufs - cancel a range of PIO buffers
796  * @dd: the infinipath device
797  * @first: the first PIO buffer to cancel
798  * @cnt: the number of PIO buffers to cancel
799  *
800  * cancel a range of PIO buffers, used when they might be armed, but
801  * not triggered.  Used at init to ensure buffer state, and also user
802  * process close, in case it died while writing to a PIO buffer
803  * Also after errors.
804  */
805 void ipath_disarm_piobufs(struct ipath_devdata *dd, unsigned first,
806                           unsigned cnt)
807 {
808         unsigned i, last = first + cnt;
809         unsigned long flags;
810
811         ipath_cdbg(PKT, "disarm %u PIObufs first=%u\n", cnt, first);
812         for (i = first; i < last; i++) {
813                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
814                 /*
815                  * The disarm-related bits are write-only, so it
816                  * is ok to OR them in with our copy of sendctrl
817                  * while we hold the lock.
818                  */
819                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
820                         dd->ipath_sendctrl | INFINIPATH_S_DISARM |
821                         (i << INFINIPATH_S_DISARMPIOBUF_SHIFT));
822                 /* can't disarm bufs back-to-back per iba7220 spec */
823                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
824                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
825         }
826
827         /*
828          * Disable PIOAVAILUPD, then re-enable, reading scratch in
829          * between.  This seems to avoid a chip timing race that causes
830          * pioavail updates to memory to stop.  We xor as we don't
831          * know the state of the bit when we're called.
832          */
833         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
834         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
835                 dd->ipath_sendctrl ^ INFINIPATH_S_PIOBUFAVAILUPD);
836         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
837         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
838                          dd->ipath_sendctrl);
839         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
840 }
841
842 /**
843  * ipath_wait_linkstate - wait for an IB link state change to occur
844  * @dd: the infinipath device
845  * @state: the state to wait for
846  * @msecs: the number of milliseconds to wait
847  *
848  * wait up to msecs milliseconds for IB link state change to occur for
849  * now, take the easy polling route.  Currently used only by
850  * ipath_set_linkstate.  Returns 0 if state reached, otherwise
851  * -ETIMEDOUT state can have multiple states set, for any of several
852  * transitions.
853  */
854 static int ipath_wait_linkstate(struct ipath_devdata *dd, u32 state,
855                                 int msecs)
856 {
857         dd->ipath_state_wanted = state;
858         wait_event_interruptible_timeout(ipath_state_wait,
859                                          (dd->ipath_flags & state),
860                                          msecs_to_jiffies(msecs));
861         dd->ipath_state_wanted = 0;
862
863         if (!(dd->ipath_flags & state)) {
864                 u64 val;
865                 ipath_cdbg(VERBOSE, "Didn't reach linkstate %s within %u"
866                            " ms\n",
867                            /* test INIT ahead of DOWN, both can be set */
868                            (state & IPATH_LINKINIT) ? "INIT" :
869                            ((state & IPATH_LINKDOWN) ? "DOWN" :
870                             ((state & IPATH_LINKARMED) ? "ARM" : "ACTIVE")),
871                            msecs);
872                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
873                 ipath_cdbg(VERBOSE, "ibcc=%llx ibcstatus=%llx (%s)\n",
874                            (unsigned long long) ipath_read_kreg64(
875                                    dd, dd->ipath_kregs->kr_ibcctrl),
876                            (unsigned long long) val,
877                            ipath_ibcstatus_str[val & 0xf]);
878         }
879         return (dd->ipath_flags & state) ? 0 : -ETIMEDOUT;
880 }
881
882 /*
883  * Decode the error status into strings, deciding whether to always
884  * print * it or not depending on "normal packet errors" vs everything
885  * else.   Return 1 if "real" errors, otherwise 0 if only packet
886  * errors, so caller can decide what to print with the string.
887  */
888 int ipath_decode_err(char *buf, size_t blen, ipath_err_t err)
889 {
890         int iserr = 1;
891         *buf = '\0';
892         if (err & INFINIPATH_E_PKTERRS) {
893                 if (!(err & ~INFINIPATH_E_PKTERRS))
894                         iserr = 0; // if only packet errors.
895                 if (ipath_debug & __IPATH_ERRPKTDBG) {
896                         if (err & INFINIPATH_E_REBP)
897                                 strlcat(buf, "EBP ", blen);
898                         if (err & INFINIPATH_E_RVCRC)
899                                 strlcat(buf, "VCRC ", blen);
900                         if (err & INFINIPATH_E_RICRC) {
901                                 strlcat(buf, "CRC ", blen);
902                                 // clear for check below, so only once
903                                 err &= INFINIPATH_E_RICRC;
904                         }
905                         if (err & INFINIPATH_E_RSHORTPKTLEN)
906                                 strlcat(buf, "rshortpktlen ", blen);
907                         if (err & INFINIPATH_E_SDROPPEDDATAPKT)
908                                 strlcat(buf, "sdroppeddatapkt ", blen);
909                         if (err & INFINIPATH_E_SPKTLEN)
910                                 strlcat(buf, "spktlen ", blen);
911                 }
912                 if ((err & INFINIPATH_E_RICRC) &&
913                         !(err&(INFINIPATH_E_RVCRC|INFINIPATH_E_REBP)))
914                         strlcat(buf, "CRC ", blen);
915                 if (!iserr)
916                         goto done;
917         }
918         if (err & INFINIPATH_E_RHDRLEN)
919                 strlcat(buf, "rhdrlen ", blen);
920         if (err & INFINIPATH_E_RBADTID)
921                 strlcat(buf, "rbadtid ", blen);
922         if (err & INFINIPATH_E_RBADVERSION)
923                 strlcat(buf, "rbadversion ", blen);
924         if (err & INFINIPATH_E_RHDR)
925                 strlcat(buf, "rhdr ", blen);
926         if (err & INFINIPATH_E_RLONGPKTLEN)
927                 strlcat(buf, "rlongpktlen ", blen);
928         if (err & INFINIPATH_E_RMAXPKTLEN)
929                 strlcat(buf, "rmaxpktlen ", blen);
930         if (err & INFINIPATH_E_RMINPKTLEN)
931                 strlcat(buf, "rminpktlen ", blen);
932         if (err & INFINIPATH_E_SMINPKTLEN)
933                 strlcat(buf, "sminpktlen ", blen);
934         if (err & INFINIPATH_E_RFORMATERR)
935                 strlcat(buf, "rformaterr ", blen);
936         if (err & INFINIPATH_E_RUNSUPVL)
937                 strlcat(buf, "runsupvl ", blen);
938         if (err & INFINIPATH_E_RUNEXPCHAR)
939                 strlcat(buf, "runexpchar ", blen);
940         if (err & INFINIPATH_E_RIBFLOW)
941                 strlcat(buf, "ribflow ", blen);
942         if (err & INFINIPATH_E_SUNDERRUN)
943                 strlcat(buf, "sunderrun ", blen);
944         if (err & INFINIPATH_E_SPIOARMLAUNCH)
945                 strlcat(buf, "spioarmlaunch ", blen);
946         if (err & INFINIPATH_E_SUNEXPERRPKTNUM)
947                 strlcat(buf, "sunexperrpktnum ", blen);
948         if (err & INFINIPATH_E_SDROPPEDSMPPKT)
949                 strlcat(buf, "sdroppedsmppkt ", blen);
950         if (err & INFINIPATH_E_SMAXPKTLEN)
951                 strlcat(buf, "smaxpktlen ", blen);
952         if (err & INFINIPATH_E_SUNSUPVL)
953                 strlcat(buf, "sunsupVL ", blen);
954         if (err & INFINIPATH_E_INVALIDADDR)
955                 strlcat(buf, "invalidaddr ", blen);
956         if (err & INFINIPATH_E_RRCVEGRFULL)
957                 strlcat(buf, "rcvegrfull ", blen);
958         if (err & INFINIPATH_E_RRCVHDRFULL)
959                 strlcat(buf, "rcvhdrfull ", blen);
960         if (err & INFINIPATH_E_IBSTATUSCHANGED)
961                 strlcat(buf, "ibcstatuschg ", blen);
962         if (err & INFINIPATH_E_RIBLOSTLINK)
963                 strlcat(buf, "riblostlink ", blen);
964         if (err & INFINIPATH_E_HARDWARE)
965                 strlcat(buf, "hardware ", blen);
966         if (err & INFINIPATH_E_RESET)
967                 strlcat(buf, "reset ", blen);
968 done:
969         return iserr;
970 }
971
972 /**
973  * get_rhf_errstring - decode RHF errors
974  * @err: the err number
975  * @msg: the output buffer
976  * @len: the length of the output buffer
977  *
978  * only used one place now, may want more later
979  */
980 static void get_rhf_errstring(u32 err, char *msg, size_t len)
981 {
982         /* if no errors, and so don't need to check what's first */
983         *msg = '\0';
984
985         if (err & INFINIPATH_RHF_H_ICRCERR)
986                 strlcat(msg, "icrcerr ", len);
987         if (err & INFINIPATH_RHF_H_VCRCERR)
988                 strlcat(msg, "vcrcerr ", len);
989         if (err & INFINIPATH_RHF_H_PARITYERR)
990                 strlcat(msg, "parityerr ", len);
991         if (err & INFINIPATH_RHF_H_LENERR)
992                 strlcat(msg, "lenerr ", len);
993         if (err & INFINIPATH_RHF_H_MTUERR)
994                 strlcat(msg, "mtuerr ", len);
995         if (err & INFINIPATH_RHF_H_IHDRERR)
996                 /* infinipath hdr checksum error */
997                 strlcat(msg, "ipathhdrerr ", len);
998         if (err & INFINIPATH_RHF_H_TIDERR)
999                 strlcat(msg, "tiderr ", len);
1000         if (err & INFINIPATH_RHF_H_MKERR)
1001                 /* bad port, offset, etc. */
1002                 strlcat(msg, "invalid ipathhdr ", len);
1003         if (err & INFINIPATH_RHF_H_IBERR)
1004                 strlcat(msg, "iberr ", len);
1005         if (err & INFINIPATH_RHF_L_SWA)
1006                 strlcat(msg, "swA ", len);
1007         if (err & INFINIPATH_RHF_L_SWB)
1008                 strlcat(msg, "swB ", len);
1009 }
1010
1011 /**
1012  * ipath_get_egrbuf - get an eager buffer
1013  * @dd: the infinipath device
1014  * @bufnum: the eager buffer to get
1015  *
1016  * must only be called if ipath_pd[port] is known to be allocated
1017  */
1018 static inline void *ipath_get_egrbuf(struct ipath_devdata *dd, u32 bufnum)
1019 {
1020         return dd->ipath_port0_skbinfo ?
1021                 (void *) dd->ipath_port0_skbinfo[bufnum].skb->data : NULL;
1022 }
1023
1024 /**
1025  * ipath_alloc_skb - allocate an skb and buffer with possible constraints
1026  * @dd: the infinipath device
1027  * @gfp_mask: the sk_buff SFP mask
1028  */
1029 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd,
1030                                 gfp_t gfp_mask)
1031 {
1032         struct sk_buff *skb;
1033         u32 len;
1034
1035         /*
1036          * Only fully supported way to handle this is to allocate lots
1037          * extra, align as needed, and then do skb_reserve().  That wastes
1038          * a lot of memory...  I'll have to hack this into infinipath_copy
1039          * also.
1040          */
1041
1042         /*
1043          * We need 2 extra bytes for ipath_ether data sent in the
1044          * key header.  In order to keep everything dword aligned,
1045          * we'll reserve 4 bytes.
1046          */
1047         len = dd->ipath_ibmaxlen + 4;
1048
1049         if (dd->ipath_flags & IPATH_4BYTE_TID) {
1050                 /* We need a 2KB multiple alignment, and there is no way
1051                  * to do it except to allocate extra and then skb_reserve
1052                  * enough to bring it up to the right alignment.
1053                  */
1054                 len += 2047;
1055         }
1056
1057         skb = __dev_alloc_skb(len, gfp_mask);
1058         if (!skb) {
1059                 ipath_dev_err(dd, "Failed to allocate skbuff, length %u\n",
1060                               len);
1061                 goto bail;
1062         }
1063
1064         skb_reserve(skb, 4);
1065
1066         if (dd->ipath_flags & IPATH_4BYTE_TID) {
1067                 u32 una = (unsigned long)skb->data & 2047;
1068                 if (una)
1069                         skb_reserve(skb, 2048 - una);
1070         }
1071
1072 bail:
1073         return skb;
1074 }
1075
1076 static void ipath_rcv_hdrerr(struct ipath_devdata *dd,
1077                              u32 eflags,
1078                              u32 l,
1079                              u32 etail,
1080                              u64 *rc)
1081 {
1082         char emsg[128];
1083         struct ipath_message_header *hdr;
1084
1085         get_rhf_errstring(eflags, emsg, sizeof emsg);
1086         hdr = (struct ipath_message_header *)&rc[1];
1087         ipath_cdbg(PKT, "RHFerrs %x hdrqtail=%x typ=%u "
1088                    "tlen=%x opcode=%x egridx=%x: %s\n",
1089                    eflags, l,
1090                    ipath_hdrget_rcv_type((__le32 *) rc),
1091                    ipath_hdrget_length_in_bytes((__le32 *) rc),
1092                    be32_to_cpu(hdr->bth[0]) >> 24,
1093                    etail, emsg);
1094
1095         /* Count local link integrity errors. */
1096         if (eflags & (INFINIPATH_RHF_H_ICRCERR | INFINIPATH_RHF_H_VCRCERR)) {
1097                 u8 n = (dd->ipath_ibcctrl >>
1098                         INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT) &
1099                         INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK;
1100
1101                 if (++dd->ipath_lli_counter > n) {
1102                         dd->ipath_lli_counter = 0;
1103                         dd->ipath_lli_errors++;
1104                 }
1105         }
1106 }
1107
1108 /*
1109  * ipath_kreceive - receive a packet
1110  * @pd: the infinipath port
1111  *
1112  * called from interrupt handler for errors or receive interrupt
1113  */
1114 void ipath_kreceive(struct ipath_portdata *pd)
1115 {
1116         u64 *rc;
1117         struct ipath_devdata *dd = pd->port_dd;
1118         void *ebuf;
1119         const u32 rsize = dd->ipath_rcvhdrentsize;      /* words */
1120         const u32 maxcnt = dd->ipath_rcvhdrcnt * rsize; /* words */
1121         u32 etail = -1, l, hdrqtail;
1122         struct ipath_message_header *hdr;
1123         u32 eflags, i, etype, tlen, pkttot = 0, updegr=0, reloop=0;
1124         static u64 totcalls;    /* stats, may eventually remove */
1125
1126         if (!dd->ipath_hdrqtailptr) {
1127                 ipath_dev_err(dd,
1128                               "hdrqtailptr not set, can't do receives\n");
1129                 goto bail;
1130         }
1131
1132         l = pd->port_head;
1133         hdrqtail = ipath_get_rcvhdrtail(pd);
1134         if (l == hdrqtail)
1135                 goto bail;
1136
1137 reloop:
1138         for (i = 0; l != hdrqtail; i++) {
1139                 u32 qp;
1140                 u8 *bthbytes;
1141
1142                 rc = (u64 *) (pd->port_rcvhdrq + (l << 2));
1143                 hdr = (struct ipath_message_header *)&rc[1];
1144                 /*
1145                  * could make a network order version of IPATH_KD_QP, and
1146                  * do the obvious shift before masking to speed this up.
1147                  */
1148                 qp = ntohl(hdr->bth[1]) & 0xffffff;
1149                 bthbytes = (u8 *) hdr->bth;
1150
1151                 eflags = ipath_hdrget_err_flags((__le32 *) rc);
1152                 etype = ipath_hdrget_rcv_type((__le32 *) rc);
1153                 /* total length */
1154                 tlen = ipath_hdrget_length_in_bytes((__le32 *) rc);
1155                 ebuf = NULL;
1156                 if (etype != RCVHQ_RCV_TYPE_EXPECTED) {
1157                         /*
1158                          * it turns out that the chips uses an eager buffer
1159                          * for all non-expected packets, whether it "needs"
1160                          * one or not.  So always get the index, but don't
1161                          * set ebuf (so we try to copy data) unless the
1162                          * length requires it.
1163                          */
1164                         etail = ipath_hdrget_index((__le32 *) rc);
1165                         if (tlen > sizeof(*hdr) ||
1166                             etype == RCVHQ_RCV_TYPE_NON_KD)
1167                                 ebuf = ipath_get_egrbuf(dd, etail);
1168                 }
1169
1170                 /*
1171                  * both tiderr and ipathhdrerr are set for all plain IB
1172                  * packets; only ipathhdrerr should be set.
1173                  */
1174
1175                 if (etype != RCVHQ_RCV_TYPE_NON_KD && etype !=
1176                     RCVHQ_RCV_TYPE_ERROR && ipath_hdrget_ipath_ver(
1177                             hdr->iph.ver_port_tid_offset) !=
1178                     IPS_PROTO_VERSION) {
1179                         ipath_cdbg(PKT, "Bad InfiniPath protocol version "
1180                                    "%x\n", etype);
1181                 }
1182
1183                 if (unlikely(eflags))
1184                         ipath_rcv_hdrerr(dd, eflags, l, etail, rc);
1185                 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
1186                         ipath_ib_rcv(dd->verbs_dev, rc + 1, ebuf, tlen);
1187                         if (dd->ipath_lli_counter)
1188                                 dd->ipath_lli_counter--;
1189                         ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
1190                                    "qp=%x), len %x; ignored\n",
1191                                    etype, bthbytes[0], qp, tlen);
1192                 }
1193                 else if (etype == RCVHQ_RCV_TYPE_EAGER)
1194                         ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
1195                                    "qp=%x), len %x; ignored\n",
1196                                    etype, bthbytes[0], qp, tlen);
1197                 else if (etype == RCVHQ_RCV_TYPE_EXPECTED)
1198                         ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
1199                                   be32_to_cpu(hdr->bth[0]) & 0xff);
1200                 else {
1201                         /*
1202                          * error packet, type of error unknown.
1203                          * Probably type 3, but we don't know, so don't
1204                          * even try to print the opcode, etc.
1205                          */
1206                         ipath_dbg("Error Pkt, but no eflags! egrbuf %x, "
1207                                   "len %x\nhdrq@%lx;hdrq+%x rhf: %llx; "
1208                                   "hdr %llx %llx %llx %llx %llx\n",
1209                                   etail, tlen, (unsigned long) rc, l,
1210                                   (unsigned long long) rc[0],
1211                                   (unsigned long long) rc[1],
1212                                   (unsigned long long) rc[2],
1213                                   (unsigned long long) rc[3],
1214                                   (unsigned long long) rc[4],
1215                                   (unsigned long long) rc[5]);
1216                 }
1217                 l += rsize;
1218                 if (l >= maxcnt)
1219                         l = 0;
1220                 if (etype != RCVHQ_RCV_TYPE_EXPECTED)
1221                     updegr = 1;
1222                 /*
1223                  * update head regs on last packet, and every 16 packets.
1224                  * Reduce bus traffic, while still trying to prevent
1225                  * rcvhdrq overflows, for when the queue is nearly full
1226                  */
1227                 if (l == hdrqtail || (i && !(i&0xf))) {
1228                         u64 lval;
1229                         if (l == hdrqtail)
1230                                 /* request IBA6120 interrupt only on last */
1231                                 lval = dd->ipath_rhdrhead_intr_off | l;
1232                         else
1233                                 lval = l;
1234                         (void)ipath_write_ureg(dd, ur_rcvhdrhead, lval, 0);
1235                         if (updegr) {
1236                                 (void)ipath_write_ureg(dd, ur_rcvegrindexhead,
1237                                                        etail, 0);
1238                                 updegr = 0;
1239                         }
1240                 }
1241         }
1242
1243         if (!dd->ipath_rhdrhead_intr_off && !reloop) {
1244                 /* IBA6110 workaround; we can have a race clearing chip
1245                  * interrupt with another interrupt about to be delivered,
1246                  * and can clear it before it is delivered on the GPIO
1247                  * workaround.  By doing the extra check here for the
1248                  * in-memory tail register updating while we were doing
1249                  * earlier packets, we "almost" guarantee we have covered
1250                  * that case.
1251                  */
1252                 u32 hqtail = ipath_get_rcvhdrtail(pd);
1253                 if (hqtail != hdrqtail) {
1254                         hdrqtail = hqtail;
1255                         reloop = 1; /* loop 1 extra time at most */
1256                         goto reloop;
1257                 }
1258         }
1259
1260         pkttot += i;
1261
1262         pd->port_head = l;
1263
1264         if (pkttot > ipath_stats.sps_maxpkts_call)
1265                 ipath_stats.sps_maxpkts_call = pkttot;
1266         ipath_stats.sps_port0pkts += pkttot;
1267         ipath_stats.sps_avgpkts_call =
1268                 ipath_stats.sps_port0pkts / ++totcalls;
1269
1270 bail:;
1271 }
1272
1273 /**
1274  * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1275  * @dd: the infinipath device
1276  *
1277  * called whenever our local copy indicates we have run out of send buffers
1278  * NOTE: This can be called from interrupt context by some code
1279  * and from non-interrupt context by ipath_getpiobuf().
1280  */
1281
1282 static void ipath_update_pio_bufs(struct ipath_devdata *dd)
1283 {
1284         unsigned long flags;
1285         int i;
1286         const unsigned piobregs = (unsigned)dd->ipath_pioavregs;
1287
1288         /* If the generation (check) bits have changed, then we update the
1289          * busy bit for the corresponding PIO buffer.  This algorithm will
1290          * modify positions to the value they already have in some cases
1291          * (i.e., no change), but it's faster than changing only the bits
1292          * that have changed.
1293          *
1294          * We would like to do this atomicly, to avoid spinlocks in the
1295          * critical send path, but that's not really possible, given the
1296          * type of changes, and that this routine could be called on
1297          * multiple cpu's simultaneously, so we lock in this routine only,
1298          * to avoid conflicting updates; all we change is the shadow, and
1299          * it's a single 64 bit memory location, so by definition the update
1300          * is atomic in terms of what other cpu's can see in testing the
1301          * bits.  The spin_lock overhead isn't too bad, since it only
1302          * happens when all buffers are in use, so only cpu overhead, not
1303          * latency or bandwidth is affected.
1304          */
1305 #define _IPATH_ALL_CHECKBITS 0x5555555555555555ULL
1306         if (!dd->ipath_pioavailregs_dma) {
1307                 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1308                 return;
1309         }
1310         if (ipath_debug & __IPATH_VERBDBG) {
1311                 /* only if packet debug and verbose */
1312                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1313                 unsigned long *shadow = dd->ipath_pioavailshadow;
1314
1315                 ipath_cdbg(PKT, "Refill avail, dma0=%llx shad0=%lx, "
1316                            "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1317                            "s3=%lx\n",
1318                            (unsigned long long) le64_to_cpu(dma[0]),
1319                            shadow[0],
1320                            (unsigned long long) le64_to_cpu(dma[1]),
1321                            shadow[1],
1322                            (unsigned long long) le64_to_cpu(dma[2]),
1323                            shadow[2],
1324                            (unsigned long long) le64_to_cpu(dma[3]),
1325                            shadow[3]);
1326                 if (piobregs > 4)
1327                         ipath_cdbg(
1328                                 PKT, "2nd group, dma4=%llx shad4=%lx, "
1329                                 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1330                                 "d7=%llx s7=%lx\n",
1331                                 (unsigned long long) le64_to_cpu(dma[4]),
1332                                 shadow[4],
1333                                 (unsigned long long) le64_to_cpu(dma[5]),
1334                                 shadow[5],
1335                                 (unsigned long long) le64_to_cpu(dma[6]),
1336                                 shadow[6],
1337                                 (unsigned long long) le64_to_cpu(dma[7]),
1338                                 shadow[7]);
1339         }
1340         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1341         for (i = 0; i < piobregs; i++) {
1342                 u64 pchbusy, pchg, piov, pnew;
1343                 /*
1344                  * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1345                  */
1346                 if (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS))
1347                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i ^ 1]);
1348                 else
1349                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i]);
1350                 pchg = _IPATH_ALL_CHECKBITS &
1351                         ~(dd->ipath_pioavailshadow[i] ^ piov);
1352                 pchbusy = pchg << INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT;
1353                 if (pchg && (pchbusy & dd->ipath_pioavailshadow[i])) {
1354                         pnew = dd->ipath_pioavailshadow[i] & ~pchbusy;
1355                         pnew |= piov & pchbusy;
1356                         dd->ipath_pioavailshadow[i] = pnew;
1357                 }
1358         }
1359         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1360 }
1361
1362 /**
1363  * ipath_setrcvhdrsize - set the receive header size
1364  * @dd: the infinipath device
1365  * @rhdrsize: the receive header size
1366  *
1367  * called from user init code, and also layered driver init
1368  */
1369 int ipath_setrcvhdrsize(struct ipath_devdata *dd, unsigned rhdrsize)
1370 {
1371         int ret = 0;
1372
1373         if (dd->ipath_flags & IPATH_RCVHDRSZ_SET) {
1374                 if (dd->ipath_rcvhdrsize != rhdrsize) {
1375                         dev_info(&dd->pcidev->dev,
1376                                  "Error: can't set protocol header "
1377                                  "size %u, already %u\n",
1378                                  rhdrsize, dd->ipath_rcvhdrsize);
1379                         ret = -EAGAIN;
1380                 } else
1381                         ipath_cdbg(VERBOSE, "Reuse same protocol header "
1382                                    "size %u\n", dd->ipath_rcvhdrsize);
1383         } else if (rhdrsize > (dd->ipath_rcvhdrentsize -
1384                                (sizeof(u64) / sizeof(u32)))) {
1385                 ipath_dbg("Error: can't set protocol header size %u "
1386                           "(> max %u)\n", rhdrsize,
1387                           dd->ipath_rcvhdrentsize -
1388                           (u32) (sizeof(u64) / sizeof(u32)));
1389                 ret = -EOVERFLOW;
1390         } else {
1391                 dd->ipath_flags |= IPATH_RCVHDRSZ_SET;
1392                 dd->ipath_rcvhdrsize = rhdrsize;
1393                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
1394                                  dd->ipath_rcvhdrsize);
1395                 ipath_cdbg(VERBOSE, "Set protocol header size to %u\n",
1396                            dd->ipath_rcvhdrsize);
1397         }
1398         return ret;
1399 }
1400
1401 /**
1402  * ipath_getpiobuf - find an available pio buffer
1403  * @dd: the infinipath device
1404  * @pbufnum: the buffer number is placed here
1405  *
1406  * do appropriate marking as busy, etc.
1407  * returns buffer number if one found (>=0), negative number is error.
1408  * Used by ipath_layer_send
1409  */
1410 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *dd, u32 * pbufnum)
1411 {
1412         int i, j, starti, updated = 0;
1413         unsigned piobcnt, iter;
1414         unsigned long flags;
1415         unsigned long *shadow = dd->ipath_pioavailshadow;
1416         u32 __iomem *buf;
1417
1418         piobcnt = (unsigned)(dd->ipath_piobcnt2k
1419                              + dd->ipath_piobcnt4k);
1420         starti = dd->ipath_lastport_piobuf;
1421         iter = piobcnt - starti;
1422         if (dd->ipath_upd_pio_shadow) {
1423                 /*
1424                  * Minor optimization.  If we had no buffers on last call,
1425                  * start out by doing the update; continue and do scan even
1426                  * if no buffers were updated, to be paranoid
1427                  */
1428                 ipath_update_pio_bufs(dd);
1429                 /* we scanned here, don't do it at end of scan */
1430                 updated = 1;
1431                 i = starti;
1432         } else
1433                 i = dd->ipath_lastpioindex;
1434
1435 rescan:
1436         /*
1437          * while test_and_set_bit() is atomic, we do that and then the
1438          * change_bit(), and the pair is not.  See if this is the cause
1439          * of the remaining armlaunch errors.
1440          */
1441         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1442         for (j = 0; j < iter; j++, i++) {
1443                 if (i >= piobcnt)
1444                         i = starti;
1445                 /*
1446                  * To avoid bus lock overhead, we first find a candidate
1447                  * buffer, then do the test and set, and continue if that
1448                  * fails.
1449                  */
1450                 if (test_bit((2 * i) + 1, shadow) ||
1451                     test_and_set_bit((2 * i) + 1, shadow))
1452                         continue;
1453                 /* flip generation bit */
1454                 change_bit(2 * i, shadow);
1455                 break;
1456         }
1457         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1458
1459         if (j == iter) {
1460                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1461
1462                 /*
1463                  * first time through; shadow exhausted, but may be real
1464                  * buffers available, so go see; if any updated, rescan
1465                  * (once)
1466                  */
1467                 if (!updated) {
1468                         ipath_update_pio_bufs(dd);
1469                         updated = 1;
1470                         i = starti;
1471                         goto rescan;
1472                 }
1473                 dd->ipath_upd_pio_shadow = 1;
1474                 /*
1475                  * not atomic, but if we lose one once in a while, that's OK
1476                  */
1477                 ipath_stats.sps_nopiobufs++;
1478                 if (!(++dd->ipath_consec_nopiobuf % 100000)) {
1479                         ipath_dbg(
1480                                 "%u pio sends with no bufavail; dmacopy: "
1481                                 "%llx %llx %llx %llx; shadow:  "
1482                                 "%lx %lx %lx %lx\n",
1483                                 dd->ipath_consec_nopiobuf,
1484                                 (unsigned long long) le64_to_cpu(dma[0]),
1485                                 (unsigned long long) le64_to_cpu(dma[1]),
1486                                 (unsigned long long) le64_to_cpu(dma[2]),
1487                                 (unsigned long long) le64_to_cpu(dma[3]),
1488                                 shadow[0], shadow[1], shadow[2],
1489                                 shadow[3]);
1490                         /*
1491                          * 4 buffers per byte, 4 registers above, cover rest
1492                          * below
1493                          */
1494                         if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) >
1495                             (sizeof(shadow[0]) * 4 * 4))
1496                                 ipath_dbg("2nd group: dmacopy: %llx %llx "
1497                                           "%llx %llx; shadow: %lx %lx "
1498                                           "%lx %lx\n",
1499                                           (unsigned long long)
1500                                           le64_to_cpu(dma[4]),
1501                                           (unsigned long long)
1502                                           le64_to_cpu(dma[5]),
1503                                           (unsigned long long)
1504                                           le64_to_cpu(dma[6]),
1505                                           (unsigned long long)
1506                                           le64_to_cpu(dma[7]),
1507                                           shadow[4], shadow[5],
1508                                           shadow[6], shadow[7]);
1509                 }
1510                 buf = NULL;
1511                 goto bail;
1512         }
1513
1514         /*
1515          * set next starting place.  Since it's just an optimization,
1516          * it doesn't matter who wins on this, so no locking
1517          */
1518         dd->ipath_lastpioindex = i + 1;
1519         if (dd->ipath_upd_pio_shadow)
1520                 dd->ipath_upd_pio_shadow = 0;
1521         if (dd->ipath_consec_nopiobuf)
1522                 dd->ipath_consec_nopiobuf = 0;
1523         if (i < dd->ipath_piobcnt2k)
1524                 buf = (u32 __iomem *) (dd->ipath_pio2kbase +
1525                                        i * dd->ipath_palign);
1526         else
1527                 buf = (u32 __iomem *)
1528                         (dd->ipath_pio4kbase +
1529                          (i - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
1530         ipath_cdbg(VERBOSE, "Return piobuf%u %uk @ %p\n",
1531                    i, (i < dd->ipath_piobcnt2k) ? 2 : 4, buf);
1532         if (pbufnum)
1533                 *pbufnum = i;
1534
1535 bail:
1536         return buf;
1537 }
1538
1539 /**
1540  * ipath_create_rcvhdrq - create a receive header queue
1541  * @dd: the infinipath device
1542  * @pd: the port data
1543  *
1544  * this must be contiguous memory (from an i/o perspective), and must be
1545  * DMA'able (which means for some systems, it will go through an IOMMU,
1546  * or be forced into a low address range).
1547  */
1548 int ipath_create_rcvhdrq(struct ipath_devdata *dd,
1549                          struct ipath_portdata *pd)
1550 {
1551         int ret = 0;
1552
1553         if (!pd->port_rcvhdrq) {
1554                 dma_addr_t phys_hdrqtail;
1555                 gfp_t gfp_flags = GFP_USER | __GFP_COMP;
1556                 int amt = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize *
1557                                 sizeof(u32), PAGE_SIZE);
1558
1559                 pd->port_rcvhdrq = dma_alloc_coherent(
1560                         &dd->pcidev->dev, amt, &pd->port_rcvhdrq_phys,
1561                         gfp_flags);
1562
1563                 if (!pd->port_rcvhdrq) {
1564                         ipath_dev_err(dd, "attempt to allocate %d bytes "
1565                                       "for port %u rcvhdrq failed\n",
1566                                       amt, pd->port_port);
1567                         ret = -ENOMEM;
1568                         goto bail;
1569                 }
1570                 pd->port_rcvhdrtail_kvaddr = dma_alloc_coherent(
1571                         &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail, GFP_KERNEL);
1572                 if (!pd->port_rcvhdrtail_kvaddr) {
1573                         ipath_dev_err(dd, "attempt to allocate 1 page "
1574                                       "for port %u rcvhdrqtailaddr failed\n",
1575                                       pd->port_port);
1576                         ret = -ENOMEM;
1577                         dma_free_coherent(&dd->pcidev->dev, amt,
1578                                           pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
1579                         pd->port_rcvhdrq = NULL;
1580                         goto bail;
1581                 }
1582                 pd->port_rcvhdrqtailaddr_phys = phys_hdrqtail;
1583
1584                 pd->port_rcvhdrq_size = amt;
1585
1586                 ipath_cdbg(VERBOSE, "%d pages at %p (phys %lx) size=%lu "
1587                            "for port %u rcvhdr Q\n",
1588                            amt >> PAGE_SHIFT, pd->port_rcvhdrq,
1589                            (unsigned long) pd->port_rcvhdrq_phys,
1590                            (unsigned long) pd->port_rcvhdrq_size,
1591                            pd->port_port);
1592
1593                 ipath_cdbg(VERBOSE, "port %d hdrtailaddr, %llx physical\n",
1594                            pd->port_port,
1595                            (unsigned long long) phys_hdrqtail);
1596         }
1597         else
1598                 ipath_cdbg(VERBOSE, "reuse port %d rcvhdrq @%p %llx phys; "
1599                            "hdrtailaddr@%p %llx physical\n",
1600                            pd->port_port, pd->port_rcvhdrq,
1601                            (unsigned long long) pd->port_rcvhdrq_phys,
1602                            pd->port_rcvhdrtail_kvaddr, (unsigned long long)
1603                            pd->port_rcvhdrqtailaddr_phys);
1604
1605         /* clear for security and sanity on each use */
1606         memset(pd->port_rcvhdrq, 0, pd->port_rcvhdrq_size);
1607         if (pd->port_rcvhdrtail_kvaddr)
1608                 memset(pd->port_rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1609
1610         /*
1611          * tell chip each time we init it, even if we are re-using previous
1612          * memory (we zero the register at process close)
1613          */
1614         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdrtailaddr,
1615                               pd->port_port, pd->port_rcvhdrqtailaddr_phys);
1616         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr,
1617                               pd->port_port, pd->port_rcvhdrq_phys);
1618
1619         ret = 0;
1620 bail:
1621         return ret;
1622 }
1623
1624
1625 /*
1626  * Flush all sends that might be in the ready to send state, as well as any
1627  * that are in the process of being sent.   Used whenever we need to be
1628  * sure the send side is idle.  Cleans up all buffer state by canceling
1629  * all pio buffers, and issuing an abort, which cleans up anything in the
1630  * launch fifo.  The cancel is superfluous on some chip versions, but
1631  * it's safer to always do it.
1632  * PIOAvail bits are updated by the chip as if normal send had happened.
1633  */
1634 void ipath_cancel_sends(struct ipath_devdata *dd, int restore_sendctrl)
1635 {
1636         ipath_dbg("Cancelling all in-progress send buffers\n");
1637         dd->ipath_lastcancel = jiffies+HZ/2; /* skip armlaunch errs a bit */
1638         /*
1639          * the abort bit is auto-clearing.  We read scratch to be sure
1640          * that cancels and the abort have taken effect in the chip.
1641          */
1642         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1643                 INFINIPATH_S_ABORT);
1644         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1645         ipath_disarm_piobufs(dd, 0,
1646                 (unsigned)(dd->ipath_piobcnt2k + dd->ipath_piobcnt4k));
1647         if (restore_sendctrl) /* else done by caller later */
1648                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1649                                  dd->ipath_sendctrl);
1650
1651         /* and again, be sure all have hit the chip */
1652         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1653 }
1654
1655
1656 static void ipath_set_ib_lstate(struct ipath_devdata *dd, int which)
1657 {
1658         static const char *what[4] = {
1659                 [0] = "DOWN",
1660                 [INFINIPATH_IBCC_LINKCMD_INIT] = "INIT",
1661                 [INFINIPATH_IBCC_LINKCMD_ARMED] = "ARMED",
1662                 [INFINIPATH_IBCC_LINKCMD_ACTIVE] = "ACTIVE"
1663         };
1664         int linkcmd = (which >> INFINIPATH_IBCC_LINKCMD_SHIFT) &
1665                         INFINIPATH_IBCC_LINKCMD_MASK;
1666
1667         ipath_cdbg(VERBOSE, "Trying to move unit %u to %s, current ltstate "
1668                    "is %s\n", dd->ipath_unit,
1669                    what[linkcmd],
1670                    ipath_ibcstatus_str[
1671                            (ipath_read_kreg64
1672                             (dd, dd->ipath_kregs->kr_ibcstatus) >>
1673                             INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1674                            INFINIPATH_IBCS_LINKTRAININGSTATE_MASK]);
1675         /* flush all queued sends when going to DOWN or INIT, to be sure that
1676          * they don't block MAD packets */
1677         if (!linkcmd || linkcmd == INFINIPATH_IBCC_LINKCMD_INIT)
1678                 ipath_cancel_sends(dd, 1);
1679
1680         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1681                          dd->ipath_ibcctrl | which);
1682 }
1683
1684 int ipath_set_linkstate(struct ipath_devdata *dd, u8 newstate)
1685 {
1686         u32 lstate;
1687         int ret;
1688
1689         switch (newstate) {
1690         case IPATH_IB_LINKDOWN:
1691                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_POLL <<
1692                                     INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1693                 /* don't wait */
1694                 ret = 0;
1695                 goto bail;
1696
1697         case IPATH_IB_LINKDOWN_SLEEP:
1698                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_SLEEP <<
1699                                     INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1700                 /* don't wait */
1701                 ret = 0;
1702                 goto bail;
1703
1704         case IPATH_IB_LINKDOWN_DISABLE:
1705                 ipath_set_ib_lstate(dd,
1706                                     INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
1707                                     INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1708                 /* don't wait */
1709                 ret = 0;
1710                 goto bail;
1711
1712         case IPATH_IB_LINKINIT:
1713                 if (dd->ipath_flags & IPATH_LINKINIT) {
1714                         ret = 0;
1715                         goto bail;
1716                 }
1717                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_INIT <<
1718                                     INFINIPATH_IBCC_LINKCMD_SHIFT);
1719                 lstate = IPATH_LINKINIT;
1720                 break;
1721
1722         case IPATH_IB_LINKARM:
1723                 if (dd->ipath_flags & IPATH_LINKARMED) {
1724                         ret = 0;
1725                         goto bail;
1726                 }
1727                 if (!(dd->ipath_flags &
1728                       (IPATH_LINKINIT | IPATH_LINKACTIVE))) {
1729                         ret = -EINVAL;
1730                         goto bail;
1731                 }
1732                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ARMED <<
1733                                     INFINIPATH_IBCC_LINKCMD_SHIFT);
1734                 /*
1735                  * Since the port can transition to ACTIVE by receiving
1736                  * a non VL 15 packet, wait for either state.
1737                  */
1738                 lstate = IPATH_LINKARMED | IPATH_LINKACTIVE;
1739                 break;
1740
1741         case IPATH_IB_LINKACTIVE:
1742                 if (dd->ipath_flags & IPATH_LINKACTIVE) {
1743                         ret = 0;
1744                         goto bail;
1745                 }
1746                 if (!(dd->ipath_flags & IPATH_LINKARMED)) {
1747                         ret = -EINVAL;
1748                         goto bail;
1749                 }
1750                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ACTIVE <<
1751                                     INFINIPATH_IBCC_LINKCMD_SHIFT);
1752                 lstate = IPATH_LINKACTIVE;
1753                 break;
1754
1755         case IPATH_IB_LINK_LOOPBACK:
1756                 dev_info(&dd->pcidev->dev, "Enabling IB local loopback\n");
1757                 dd->ipath_ibcctrl |= INFINIPATH_IBCC_LOOPBACK;
1758                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1759                                  dd->ipath_ibcctrl);
1760                 ret = 0;
1761                 goto bail; // no state change to wait for
1762
1763         case IPATH_IB_LINK_EXTERNAL:
1764                 dev_info(&dd->pcidev->dev, "Disabling IB local loopback (normal)\n");
1765                 dd->ipath_ibcctrl &= ~INFINIPATH_IBCC_LOOPBACK;
1766                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1767                                  dd->ipath_ibcctrl);
1768                 ret = 0;
1769                 goto bail; // no state change to wait for
1770
1771         default:
1772                 ipath_dbg("Invalid linkstate 0x%x requested\n", newstate);
1773                 ret = -EINVAL;
1774                 goto bail;
1775         }
1776         ret = ipath_wait_linkstate(dd, lstate, 2000);
1777
1778 bail:
1779         return ret;
1780 }
1781
1782 /**
1783  * ipath_set_mtu - set the MTU
1784  * @dd: the infinipath device
1785  * @arg: the new MTU
1786  *
1787  * we can handle "any" incoming size, the issue here is whether we
1788  * need to restrict our outgoing size.   For now, we don't do any
1789  * sanity checking on this, and we don't deal with what happens to
1790  * programs that are already running when the size changes.
1791  * NOTE: changing the MTU will usually cause the IBC to go back to
1792  * link initialize (IPATH_IBSTATE_INIT) state...
1793  */
1794 int ipath_set_mtu(struct ipath_devdata *dd, u16 arg)
1795 {
1796         u32 piosize;
1797         int changed = 0;
1798         int ret;
1799
1800         /*
1801          * mtu is IB data payload max.  It's the largest power of 2 less
1802          * than piosize (or even larger, since it only really controls the
1803          * largest we can receive; we can send the max of the mtu and
1804          * piosize).  We check that it's one of the valid IB sizes.
1805          */
1806         if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
1807             arg != 4096) {
1808                 ipath_dbg("Trying to set invalid mtu %u, failing\n", arg);
1809                 ret = -EINVAL;
1810                 goto bail;
1811         }
1812         if (dd->ipath_ibmtu == arg) {
1813                 ret = 0;        /* same as current */
1814                 goto bail;
1815         }
1816
1817         piosize = dd->ipath_ibmaxlen;
1818         dd->ipath_ibmtu = arg;
1819
1820         if (arg >= (piosize - IPATH_PIO_MAXIBHDR)) {
1821                 /* Only if it's not the initial value (or reset to it) */
1822                 if (piosize != dd->ipath_init_ibmaxlen) {
1823                         dd->ipath_ibmaxlen = piosize;
1824                         changed = 1;
1825                 }
1826         } else if ((arg + IPATH_PIO_MAXIBHDR) != dd->ipath_ibmaxlen) {
1827                 piosize = arg + IPATH_PIO_MAXIBHDR;
1828                 ipath_cdbg(VERBOSE, "ibmaxlen was 0x%x, setting to 0x%x "
1829                            "(mtu 0x%x)\n", dd->ipath_ibmaxlen, piosize,
1830                            arg);
1831                 dd->ipath_ibmaxlen = piosize;
1832                 changed = 1;
1833         }
1834
1835         if (changed) {
1836                 /*
1837                  * set the IBC maxpktlength to the size of our pio
1838                  * buffers in words
1839                  */
1840                 u64 ibc = dd->ipath_ibcctrl;
1841                 ibc &= ~(INFINIPATH_IBCC_MAXPKTLEN_MASK <<
1842                          INFINIPATH_IBCC_MAXPKTLEN_SHIFT);
1843
1844                 piosize = piosize - 2 * sizeof(u32);    /* ignore pbc */
1845                 dd->ipath_ibmaxlen = piosize;
1846                 piosize /= sizeof(u32); /* in words */
1847                 /*
1848                  * for ICRC, which we only send in diag test pkt mode, and
1849                  * we don't need to worry about that for mtu
1850                  */
1851                 piosize += 1;
1852
1853                 ibc |= piosize << INFINIPATH_IBCC_MAXPKTLEN_SHIFT;
1854                 dd->ipath_ibcctrl = ibc;
1855                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1856                                  dd->ipath_ibcctrl);
1857                 dd->ipath_f_tidtemplate(dd);
1858         }
1859
1860         ret = 0;
1861
1862 bail:
1863         return ret;
1864 }
1865
1866 int ipath_set_lid(struct ipath_devdata *dd, u32 arg, u8 lmc)
1867 {
1868         dd->ipath_lid = arg;
1869         dd->ipath_lmc = lmc;
1870
1871         return 0;
1872 }
1873
1874
1875 /**
1876  * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
1877  * @dd: the infinipath device
1878  * @regno: the register number to write
1879  * @port: the port containing the register
1880  * @value: the value to write
1881  *
1882  * Registers that vary with the chip implementation constants (port)
1883  * use this routine.
1884  */
1885 void ipath_write_kreg_port(const struct ipath_devdata *dd, ipath_kreg regno,
1886                           unsigned port, u64 value)
1887 {
1888         u16 where;
1889
1890         if (port < dd->ipath_portcnt &&
1891             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
1892              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
1893                 where = regno + port;
1894         else
1895                 where = -1;
1896
1897         ipath_write_kreg(dd, where, value);
1898 }
1899
1900 /*
1901  * Following deal with the "obviously simple" task of overriding the state
1902  * of the LEDS, which normally indicate link physical and logical status.
1903  * The complications arise in dealing with different hardware mappings
1904  * and the board-dependent routine being called from interrupts.
1905  * and then there's the requirement to _flash_ them.
1906  */
1907 #define LED_OVER_FREQ_SHIFT 8
1908 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
1909 /* Below is "non-zero" to force override, but both actual LEDs are off */
1910 #define LED_OVER_BOTH_OFF (8)
1911
1912 static void ipath_run_led_override(unsigned long opaque)
1913 {
1914         struct ipath_devdata *dd = (struct ipath_devdata *)opaque;
1915         int timeoff;
1916         int pidx;
1917         u64 lstate, ltstate, val;
1918
1919         if (!(dd->ipath_flags & IPATH_INITTED))
1920                 return;
1921
1922         pidx = dd->ipath_led_override_phase++ & 1;
1923         dd->ipath_led_override = dd->ipath_led_override_vals[pidx];
1924         timeoff = dd->ipath_led_override_timeoff;
1925
1926         /*
1927          * below potentially restores the LED values per current status,
1928          * should also possibly setup the traffic-blink register,
1929          * but leave that to per-chip functions.
1930          */
1931         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
1932         ltstate = (val >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1933                   INFINIPATH_IBCS_LINKTRAININGSTATE_MASK;
1934         lstate = (val >> INFINIPATH_IBCS_LINKSTATE_SHIFT) &
1935                  INFINIPATH_IBCS_LINKSTATE_MASK;
1936
1937         dd->ipath_f_setextled(dd, lstate, ltstate);
1938         mod_timer(&dd->ipath_led_override_timer, jiffies + timeoff);
1939 }
1940
1941 void ipath_set_led_override(struct ipath_devdata *dd, unsigned int val)
1942 {
1943         int timeoff, freq;
1944
1945         if (!(dd->ipath_flags & IPATH_INITTED))
1946                 return;
1947
1948         /* First check if we are blinking. If not, use 1HZ polling */
1949         timeoff = HZ;
1950         freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
1951
1952         if (freq) {
1953                 /* For blink, set each phase from one nybble of val */
1954                 dd->ipath_led_override_vals[0] = val & 0xF;
1955                 dd->ipath_led_override_vals[1] = (val >> 4) & 0xF;
1956                 timeoff = (HZ << 4)/freq;
1957         } else {
1958                 /* Non-blink set both phases the same. */
1959                 dd->ipath_led_override_vals[0] = val & 0xF;
1960                 dd->ipath_led_override_vals[1] = val & 0xF;
1961         }
1962         dd->ipath_led_override_timeoff = timeoff;
1963
1964         /*
1965          * If the timer has not already been started, do so. Use a "quick"
1966          * timeout so the function will be called soon, to look at our request.
1967          */
1968         if (atomic_inc_return(&dd->ipath_led_override_timer_active) == 1) {
1969                 /* Need to start timer */
1970                 init_timer(&dd->ipath_led_override_timer);
1971                 dd->ipath_led_override_timer.function =
1972                                                  ipath_run_led_override;
1973                 dd->ipath_led_override_timer.data = (unsigned long) dd;
1974                 dd->ipath_led_override_timer.expires = jiffies + 1;
1975                 add_timer(&dd->ipath_led_override_timer);
1976         } else {
1977                 atomic_dec(&dd->ipath_led_override_timer_active);
1978         }
1979 }
1980
1981 /**
1982  * ipath_shutdown_device - shut down a device
1983  * @dd: the infinipath device
1984  *
1985  * This is called to make the device quiet when we are about to
1986  * unload the driver, and also when the device is administratively
1987  * disabled.   It does not free any data structures.
1988  * Everything it does has to be setup again by ipath_init_chip(dd,1)
1989  */
1990 void ipath_shutdown_device(struct ipath_devdata *dd)
1991 {
1992         unsigned long flags;
1993
1994         ipath_dbg("Shutting down the device\n");
1995
1996         dd->ipath_flags |= IPATH_LINKUNK;
1997         dd->ipath_flags &= ~(IPATH_INITTED | IPATH_LINKDOWN |
1998                              IPATH_LINKINIT | IPATH_LINKARMED |
1999                              IPATH_LINKACTIVE);
2000         *dd->ipath_statusp &= ~(IPATH_STATUS_IB_CONF |
2001                                 IPATH_STATUS_IB_READY);
2002
2003         /* mask interrupts, but not errors */
2004         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
2005
2006         dd->ipath_rcvctrl = 0;
2007         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
2008                          dd->ipath_rcvctrl);
2009
2010         /*
2011          * gracefully stop all sends allowing any in progress to trickle out
2012          * first.
2013          */
2014         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
2015         dd->ipath_sendctrl = 0;
2016         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl);
2017         /* flush it */
2018         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
2019         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
2020
2021         /*
2022          * enough for anything that's going to trickle out to have actually
2023          * done so.
2024          */
2025         udelay(5);
2026
2027         ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
2028                             INFINIPATH_IBCC_LINKINITCMD_SHIFT);
2029         ipath_cancel_sends(dd, 0);
2030
2031         signal_ib_event(dd, IB_EVENT_PORT_ERR);
2032
2033         /* disable IBC */
2034         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
2035         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
2036                          dd->ipath_control | INFINIPATH_C_FREEZEMODE);
2037
2038         /*
2039          * clear SerdesEnable and turn the leds off; do this here because
2040          * we are unloading, so don't count on interrupts to move along
2041          * Turn the LEDs off explictly for the same reason.
2042          */
2043         dd->ipath_f_quiet_serdes(dd);
2044
2045         if (dd->ipath_stats_timer_active) {
2046                 del_timer_sync(&dd->ipath_stats_timer);
2047                 dd->ipath_stats_timer_active = 0;
2048         }
2049
2050         /*
2051          * clear all interrupts and errors, so that the next time the driver
2052          * is loaded or device is enabled, we know that whatever is set
2053          * happened while we were unloaded
2054          */
2055         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
2056                          ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED);
2057         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
2058         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
2059
2060         ipath_cdbg(VERBOSE, "Flush time and errors to EEPROM\n");
2061         ipath_update_eeprom_log(dd);
2062 }
2063
2064 /**
2065  * ipath_free_pddata - free a port's allocated data
2066  * @dd: the infinipath device
2067  * @pd: the portdata structure
2068  *
2069  * free up any allocated data for a port
2070  * This should not touch anything that would affect a simultaneous
2071  * re-allocation of port data, because it is called after ipath_mutex
2072  * is released (and can be called from reinit as well).
2073  * It should never change any chip state, or global driver state.
2074  * (The only exception to global state is freeing the port0 port0_skbs.)
2075  */
2076 void ipath_free_pddata(struct ipath_devdata *dd, struct ipath_portdata *pd)
2077 {
2078         if (!pd)
2079                 return;
2080
2081         if (pd->port_rcvhdrq) {
2082                 ipath_cdbg(VERBOSE, "free closed port %d rcvhdrq @ %p "
2083                            "(size=%lu)\n", pd->port_port, pd->port_rcvhdrq,
2084                            (unsigned long) pd->port_rcvhdrq_size);
2085                 dma_free_coherent(&dd->pcidev->dev, pd->port_rcvhdrq_size,
2086                                   pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
2087                 pd->port_rcvhdrq = NULL;
2088                 if (pd->port_rcvhdrtail_kvaddr) {
2089                         dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
2090                                          pd->port_rcvhdrtail_kvaddr,
2091                                          pd->port_rcvhdrqtailaddr_phys);
2092                         pd->port_rcvhdrtail_kvaddr = NULL;
2093                 }
2094         }
2095         if (pd->port_port && pd->port_rcvegrbuf) {
2096                 unsigned e;
2097
2098                 for (e = 0; e < pd->port_rcvegrbuf_chunks; e++) {
2099                         void *base = pd->port_rcvegrbuf[e];
2100                         size_t size = pd->port_rcvegrbuf_size;
2101
2102                         ipath_cdbg(VERBOSE, "egrbuf free(%p, %lu), "
2103                                    "chunk %u/%u\n", base,
2104                                    (unsigned long) size,
2105                                    e, pd->port_rcvegrbuf_chunks);
2106                         dma_free_coherent(&dd->pcidev->dev, size,
2107                                 base, pd->port_rcvegrbuf_phys[e]);
2108                 }
2109                 kfree(pd->port_rcvegrbuf);
2110                 pd->port_rcvegrbuf = NULL;
2111                 kfree(pd->port_rcvegrbuf_phys);
2112                 pd->port_rcvegrbuf_phys = NULL;
2113                 pd->port_rcvegrbuf_chunks = 0;
2114         } else if (pd->port_port == 0 && dd->ipath_port0_skbinfo) {
2115                 unsigned e;
2116                 struct ipath_skbinfo *skbinfo = dd->ipath_port0_skbinfo;
2117
2118                 dd->ipath_port0_skbinfo = NULL;
2119                 ipath_cdbg(VERBOSE, "free closed port %d "
2120                            "ipath_port0_skbinfo @ %p\n", pd->port_port,
2121                            skbinfo);
2122                 for (e = 0; e < dd->ipath_rcvegrcnt; e++)
2123                 if (skbinfo[e].skb) {
2124                         pci_unmap_single(dd->pcidev, skbinfo[e].phys,
2125                                          dd->ipath_ibmaxlen,
2126                                          PCI_DMA_FROMDEVICE);
2127                         dev_kfree_skb(skbinfo[e].skb);
2128                 }
2129                 vfree(skbinfo);
2130         }
2131         kfree(pd->port_tid_pg_list);
2132         vfree(pd->subport_uregbase);
2133         vfree(pd->subport_rcvegrbuf);
2134         vfree(pd->subport_rcvhdr_base);
2135         kfree(pd);
2136 }
2137
2138 static int __init infinipath_init(void)
2139 {
2140         int ret;
2141
2142         if (ipath_debug & __IPATH_DBG)
2143                 printk(KERN_INFO DRIVER_LOAD_MSG "%s", ib_ipath_version);
2144
2145         /*
2146          * These must be called before the driver is registered with
2147          * the PCI subsystem.
2148          */
2149         idr_init(&unit_table);
2150         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
2151                 ret = -ENOMEM;
2152                 goto bail;
2153         }
2154
2155         ret = pci_register_driver(&ipath_driver);
2156         if (ret < 0) {
2157                 printk(KERN_ERR IPATH_DRV_NAME
2158                        ": Unable to register driver: error %d\n", -ret);
2159                 goto bail_unit;
2160         }
2161
2162         ret = ipath_init_ipathfs();
2163         if (ret < 0) {
2164                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create "
2165                        "ipathfs: error %d\n", -ret);
2166                 goto bail_pci;
2167         }
2168
2169         goto bail;
2170
2171 bail_pci:
2172         pci_unregister_driver(&ipath_driver);
2173
2174 bail_unit:
2175         idr_destroy(&unit_table);
2176
2177 bail:
2178         return ret;
2179 }
2180
2181 static void __exit infinipath_cleanup(void)
2182 {
2183         ipath_exit_ipathfs();
2184
2185         ipath_cdbg(VERBOSE, "Unregistering pci driver\n");
2186         pci_unregister_driver(&ipath_driver);
2187
2188         idr_destroy(&unit_table);
2189 }
2190
2191 /**
2192  * ipath_reset_device - reset the chip if possible
2193  * @unit: the device to reset
2194  *
2195  * Whether or not reset is successful, we attempt to re-initialize the chip
2196  * (that is, much like a driver unload/reload).  We clear the INITTED flag
2197  * so that the various entry points will fail until we reinitialize.  For
2198  * now, we only allow this if no user ports are open that use chip resources
2199  */
2200 int ipath_reset_device(int unit)
2201 {
2202         int ret, i;
2203         struct ipath_devdata *dd = ipath_lookup(unit);
2204
2205         if (!dd) {
2206                 ret = -ENODEV;
2207                 goto bail;
2208         }
2209
2210         if (atomic_read(&dd->ipath_led_override_timer_active)) {
2211                 /* Need to stop LED timer, _then_ shut off LEDs */
2212                 del_timer_sync(&dd->ipath_led_override_timer);
2213                 atomic_set(&dd->ipath_led_override_timer_active, 0);
2214         }
2215
2216         /* Shut off LEDs after we are sure timer is not running */
2217         dd->ipath_led_override = LED_OVER_BOTH_OFF;
2218         dd->ipath_f_setextled(dd, 0, 0);
2219
2220         dev_info(&dd->pcidev->dev, "Reset on unit %u requested\n", unit);
2221
2222         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT)) {
2223                 dev_info(&dd->pcidev->dev, "Invalid unit number %u or "
2224                          "not initialized or not present\n", unit);
2225                 ret = -ENXIO;
2226                 goto bail;
2227         }
2228
2229         if (dd->ipath_pd)
2230                 for (i = 1; i < dd->ipath_cfgports; i++) {
2231                         if (dd->ipath_pd[i] && dd->ipath_pd[i]->port_cnt) {
2232                                 ipath_dbg("unit %u port %d is in use "
2233                                           "(PID %u cmd %s), can't reset\n",
2234                                           unit, i,
2235                                           dd->ipath_pd[i]->port_pid,
2236                                           dd->ipath_pd[i]->port_comm);
2237                                 ret = -EBUSY;
2238                                 goto bail;
2239                         }
2240                 }
2241
2242         dd->ipath_flags &= ~IPATH_INITTED;
2243         ret = dd->ipath_f_reset(dd);
2244         if (ret != 1)
2245                 ipath_dbg("reset was not successful\n");
2246         ipath_dbg("Trying to reinitialize unit %u after reset attempt\n",
2247                   unit);
2248         ret = ipath_init_chip(dd, 1);
2249         if (ret)
2250                 ipath_dev_err(dd, "Reinitialize unit %u after "
2251                               "reset failed with %d\n", unit, ret);
2252         else
2253                 dev_info(&dd->pcidev->dev, "Reinitialized unit %u after "
2254                          "resetting\n", unit);
2255
2256 bail:
2257         return ret;
2258 }
2259
2260 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv)
2261 {
2262         u64 val;
2263         if ( new_pol_inv > INFINIPATH_XGXS_RX_POL_MASK ) {
2264                 return -1;
2265         }
2266         if ( dd->ipath_rx_pol_inv != new_pol_inv ) {
2267                 dd->ipath_rx_pol_inv = new_pol_inv;
2268                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig);
2269                 val &= ~(INFINIPATH_XGXS_RX_POL_MASK <<
2270                          INFINIPATH_XGXS_RX_POL_SHIFT);
2271                 val |= ((u64)dd->ipath_rx_pol_inv) <<
2272                         INFINIPATH_XGXS_RX_POL_SHIFT;
2273                 ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, val);
2274         }
2275         return 0;
2276 }
2277
2278 /*
2279  * Disable and enable the armlaunch error.  Used for PIO bandwidth testing on
2280  * the 7220, which is count-based, rather than trigger-based.  Safe for the
2281  * driver check, since it's at init.   Not completely safe when used for
2282  * user-mode checking, since some error checking can be lost, but not
2283  * particularly risky, and only has problematic side-effects in the face of
2284  * very buggy user code.  There is no reference counting, but that's also
2285  * fine, given the intended use.
2286  */
2287 void ipath_enable_armlaunch(struct ipath_devdata *dd)
2288 {
2289         dd->ipath_lasterror &= ~INFINIPATH_E_SPIOARMLAUNCH;
2290         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
2291                 INFINIPATH_E_SPIOARMLAUNCH);
2292         dd->ipath_errormask |= INFINIPATH_E_SPIOARMLAUNCH;
2293         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
2294                 dd->ipath_errormask);
2295 }
2296
2297 void ipath_disable_armlaunch(struct ipath_devdata *dd)
2298 {
2299         /* so don't re-enable if already set */
2300         dd->ipath_maskederrs &= ~INFINIPATH_E_SPIOARMLAUNCH;
2301         dd->ipath_errormask &= ~INFINIPATH_E_SPIOARMLAUNCH;
2302         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
2303                 dd->ipath_errormask);
2304 }
2305
2306 module_init(infinipath_init);
2307 module_exit(infinipath_cleanup);