48e9ceacd6fac10edfbfd396e9d5b52b8d784c2c
[linux-2.6.git] / drivers / infiniband / hw / ehca / ehca_qp.c
1 /*
2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
3  *
4  *  QP functions
5  *
6  *  Authors: Joachim Fenkes <fenkes@de.ibm.com>
7  *           Stefan Roscher <stefan.roscher@de.ibm.com>
8  *           Waleri Fomin <fomin@de.ibm.com>
9  *           Hoang-Nam Nguyen <hnguyen@de.ibm.com>
10  *           Reinhard Ernst <rernst@de.ibm.com>
11  *           Heiko J Schick <schickhj@de.ibm.com>
12  *
13  *  Copyright (c) 2005 IBM Corporation
14  *
15  *  All rights reserved.
16  *
17  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
18  *  BSD.
19  *
20  * OpenIB BSD License
21  *
22  * Redistribution and use in source and binary forms, with or without
23  * modification, are permitted provided that the following conditions are met:
24  *
25  * Redistributions of source code must retain the above copyright notice, this
26  * list of conditions and the following disclaimer.
27  *
28  * Redistributions in binary form must reproduce the above copyright notice,
29  * this list of conditions and the following disclaimer in the documentation
30  * and/or other materials
31  * provided with the distribution.
32  *
33  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
34  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
37  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
38  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
39  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
40  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
41  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
43  * POSSIBILITY OF SUCH DAMAGE.
44  */
45
46
47 #include <asm/current.h>
48
49 #include "ehca_classes.h"
50 #include "ehca_tools.h"
51 #include "ehca_qes.h"
52 #include "ehca_iverbs.h"
53 #include "hcp_if.h"
54 #include "hipz_fns.h"
55
56 static struct kmem_cache *qp_cache;
57
58 /*
59  * attributes not supported by query qp
60  */
61 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
62                                      IB_QP_MAX_QP_RD_ATOMIC   | \
63                                      IB_QP_ACCESS_FLAGS       | \
64                                      IB_QP_EN_SQD_ASYNC_NOTIFY)
65
66 /*
67  * ehca (internal) qp state values
68  */
69 enum ehca_qp_state {
70         EHCA_QPS_RESET = 1,
71         EHCA_QPS_INIT = 2,
72         EHCA_QPS_RTR = 3,
73         EHCA_QPS_RTS = 5,
74         EHCA_QPS_SQD = 6,
75         EHCA_QPS_SQE = 8,
76         EHCA_QPS_ERR = 128
77 };
78
79 /*
80  * qp state transitions as defined by IB Arch Rel 1.1 page 431
81  */
82 enum ib_qp_statetrans {
83         IB_QPST_ANY2RESET,
84         IB_QPST_ANY2ERR,
85         IB_QPST_RESET2INIT,
86         IB_QPST_INIT2RTR,
87         IB_QPST_INIT2INIT,
88         IB_QPST_RTR2RTS,
89         IB_QPST_RTS2SQD,
90         IB_QPST_RTS2RTS,
91         IB_QPST_SQD2RTS,
92         IB_QPST_SQE2RTS,
93         IB_QPST_SQD2SQD,
94         IB_QPST_MAX     /* nr of transitions, this must be last!!! */
95 };
96
97 /*
98  * ib2ehca_qp_state maps IB to ehca qp_state
99  * returns ehca qp state corresponding to given ib qp state
100  */
101 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
102 {
103         switch (ib_qp_state) {
104         case IB_QPS_RESET:
105                 return EHCA_QPS_RESET;
106         case IB_QPS_INIT:
107                 return EHCA_QPS_INIT;
108         case IB_QPS_RTR:
109                 return EHCA_QPS_RTR;
110         case IB_QPS_RTS:
111                 return EHCA_QPS_RTS;
112         case IB_QPS_SQD:
113                 return EHCA_QPS_SQD;
114         case IB_QPS_SQE:
115                 return EHCA_QPS_SQE;
116         case IB_QPS_ERR:
117                 return EHCA_QPS_ERR;
118         default:
119                 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
120                 return -EINVAL;
121         }
122 }
123
124 /*
125  * ehca2ib_qp_state maps ehca to IB qp_state
126  * returns ib qp state corresponding to given ehca qp state
127  */
128 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
129                                                 ehca_qp_state)
130 {
131         switch (ehca_qp_state) {
132         case EHCA_QPS_RESET:
133                 return IB_QPS_RESET;
134         case EHCA_QPS_INIT:
135                 return IB_QPS_INIT;
136         case EHCA_QPS_RTR:
137                 return IB_QPS_RTR;
138         case EHCA_QPS_RTS:
139                 return IB_QPS_RTS;
140         case EHCA_QPS_SQD:
141                 return IB_QPS_SQD;
142         case EHCA_QPS_SQE:
143                 return IB_QPS_SQE;
144         case EHCA_QPS_ERR:
145                 return IB_QPS_ERR;
146         default:
147                 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
148                 return -EINVAL;
149         }
150 }
151
152 /*
153  * ehca_qp_type used as index for req_attr and opt_attr of
154  * struct ehca_modqp_statetrans
155  */
156 enum ehca_qp_type {
157         QPT_RC = 0,
158         QPT_UC = 1,
159         QPT_UD = 2,
160         QPT_SQP = 3,
161         QPT_MAX
162 };
163
164 /*
165  * ib2ehcaqptype maps Ib to ehca qp_type
166  * returns ehca qp type corresponding to ib qp type
167  */
168 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
169 {
170         switch (ibqptype) {
171         case IB_QPT_SMI:
172         case IB_QPT_GSI:
173                 return QPT_SQP;
174         case IB_QPT_RC:
175                 return QPT_RC;
176         case IB_QPT_UC:
177                 return QPT_UC;
178         case IB_QPT_UD:
179                 return QPT_UD;
180         default:
181                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
182                 return -EINVAL;
183         }
184 }
185
186 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
187                                                          int ib_tostate)
188 {
189         int index = -EINVAL;
190         switch (ib_tostate) {
191         case IB_QPS_RESET:
192                 index = IB_QPST_ANY2RESET;
193                 break;
194         case IB_QPS_INIT:
195                 switch (ib_fromstate) {
196                 case IB_QPS_RESET:
197                         index = IB_QPST_RESET2INIT;
198                         break;
199                 case IB_QPS_INIT:
200                         index = IB_QPST_INIT2INIT;
201                         break;
202                 }
203                 break;
204         case IB_QPS_RTR:
205                 if (ib_fromstate == IB_QPS_INIT)
206                         index = IB_QPST_INIT2RTR;
207                 break;
208         case IB_QPS_RTS:
209                 switch (ib_fromstate) {
210                 case IB_QPS_RTR:
211                         index = IB_QPST_RTR2RTS;
212                         break;
213                 case IB_QPS_RTS:
214                         index = IB_QPST_RTS2RTS;
215                         break;
216                 case IB_QPS_SQD:
217                         index = IB_QPST_SQD2RTS;
218                         break;
219                 case IB_QPS_SQE:
220                         index = IB_QPST_SQE2RTS;
221                         break;
222                 }
223                 break;
224         case IB_QPS_SQD:
225                 if (ib_fromstate == IB_QPS_RTS)
226                         index = IB_QPST_RTS2SQD;
227                 break;
228         case IB_QPS_SQE:
229                 break;
230         case IB_QPS_ERR:
231                 index = IB_QPST_ANY2ERR;
232                 break;
233         default:
234                 break;
235         }
236         return index;
237 }
238
239 /*
240  * ibqptype2servicetype returns hcp service type corresponding to given
241  * ib qp type used by create_qp()
242  */
243 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
244 {
245         switch (ibqptype) {
246         case IB_QPT_SMI:
247         case IB_QPT_GSI:
248                 return ST_UD;
249         case IB_QPT_RC:
250                 return ST_RC;
251         case IB_QPT_UC:
252                 return ST_UC;
253         case IB_QPT_UD:
254                 return ST_UD;
255         case IB_QPT_RAW_IPV6:
256                 return -EINVAL;
257         case IB_QPT_RAW_ETY:
258                 return -EINVAL;
259         default:
260                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
261                 return -EINVAL;
262         }
263 }
264
265 /*
266  * init userspace queue info from ipz_queue data
267  */
268 static inline void queue2resp(struct ipzu_queue_resp *resp,
269                               struct ipz_queue *queue)
270 {
271         resp->qe_size = queue->qe_size;
272         resp->act_nr_of_sg = queue->act_nr_of_sg;
273         resp->queue_length = queue->queue_length;
274         resp->pagesize = queue->pagesize;
275         resp->toggle_state = queue->toggle_state;
276 }
277
278 static inline int ll_qp_msg_size(int nr_sge)
279 {
280         return 128 << nr_sge;
281 }
282
283 /*
284  * init_qp_queue initializes/constructs r/squeue and registers queue pages.
285  */
286 static inline int init_qp_queue(struct ehca_shca *shca,
287                                 struct ehca_qp *my_qp,
288                                 struct ipz_queue *queue,
289                                 int q_type,
290                                 u64 expected_hret,
291                                 int nr_q_pages,
292                                 int wqe_size,
293                                 int nr_sges)
294 {
295         int ret, cnt, ipz_rc;
296         void *vpage;
297         u64 rpage, h_ret;
298         struct ib_device *ib_dev = &shca->ib_device;
299         struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
300
301         if (!nr_q_pages)
302                 return 0;
303
304         ipz_rc = ipz_queue_ctor(queue, nr_q_pages, EHCA_PAGESIZE,
305                                 wqe_size, nr_sges);
306         if (!ipz_rc) {
307                 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%x",
308                          ipz_rc);
309                 return -EBUSY;
310         }
311
312         /* register queue pages */
313         for (cnt = 0; cnt < nr_q_pages; cnt++) {
314                 vpage = ipz_qpageit_get_inc(queue);
315                 if (!vpage) {
316                         ehca_err(ib_dev, "ipz_qpageit_get_inc() "
317                                  "failed p_vpage= %p", vpage);
318                         ret = -EINVAL;
319                         goto init_qp_queue1;
320                 }
321                 rpage = virt_to_abs(vpage);
322
323                 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
324                                                  my_qp->ipz_qp_handle,
325                                                  NULL, 0, q_type,
326                                                  rpage, 1,
327                                                  my_qp->galpas.kernel);
328                 if (cnt == (nr_q_pages - 1)) {  /* last page! */
329                         if (h_ret != expected_hret) {
330                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
331                                          "h_ret= %lx ", h_ret);
332                                 ret = ehca2ib_return_code(h_ret);
333                                 goto init_qp_queue1;
334                         }
335                         vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
336                         if (vpage) {
337                                 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
338                                          "should not succeed vpage=%p", vpage);
339                                 ret = -EINVAL;
340                                 goto init_qp_queue1;
341                         }
342                 } else {
343                         if (h_ret != H_PAGE_REGISTERED) {
344                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
345                                          "h_ret= %lx ", h_ret);
346                                 ret = ehca2ib_return_code(h_ret);
347                                 goto init_qp_queue1;
348                         }
349                 }
350         }
351
352         ipz_qeit_reset(queue);
353
354         return 0;
355
356 init_qp_queue1:
357         ipz_queue_dtor(queue);
358         return ret;
359 }
360
361 /*
362  * Create an ib_qp struct that is either a QP or an SRQ, depending on
363  * the value of the is_srq parameter. If init_attr and srq_init_attr share
364  * fields, the field out of init_attr is used.
365  */
366 struct ehca_qp *internal_create_qp(struct ib_pd *pd,
367                                    struct ib_qp_init_attr *init_attr,
368                                    struct ib_srq_init_attr *srq_init_attr,
369                                    struct ib_udata *udata, int is_srq)
370 {
371         struct ehca_qp *my_qp;
372         struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
373         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
374                                               ib_device);
375         struct ib_ucontext *context = NULL;
376         u64 h_ret;
377         int is_llqp = 0, has_srq = 0;
378         int qp_type, max_send_sge, max_recv_sge, ret;
379
380         /* h_call's out parameters */
381         struct ehca_alloc_qp_parms parms;
382         u32 swqe_size = 0, rwqe_size = 0, ib_qp_num;
383         unsigned long flags;
384
385         memset(&parms, 0, sizeof(parms));
386         qp_type = init_attr->qp_type;
387
388         if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
389                 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
390                 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
391                          init_attr->sq_sig_type);
392                 return ERR_PTR(-EINVAL);
393         }
394
395         /* save LLQP info */
396         if (qp_type & 0x80) {
397                 is_llqp = 1;
398                 parms.ext_type = EQPT_LLQP;
399                 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
400         }
401         qp_type &= 0x1F;
402         init_attr->qp_type &= 0x1F;
403
404         /* handle SRQ base QPs */
405         if (init_attr->srq) {
406                 struct ehca_qp *my_srq =
407                         container_of(init_attr->srq, struct ehca_qp, ib_srq);
408
409                 has_srq = 1;
410                 parms.ext_type = EQPT_SRQBASE;
411                 parms.srq_qpn = my_srq->real_qp_num;
412                 parms.srq_token = my_srq->token;
413         }
414
415         if (is_llqp && has_srq) {
416                 ehca_err(pd->device, "LLQPs can't have an SRQ");
417                 return ERR_PTR(-EINVAL);
418         }
419
420         /* handle SRQs */
421         if (is_srq) {
422                 parms.ext_type = EQPT_SRQ;
423                 parms.srq_limit = srq_init_attr->attr.srq_limit;
424                 if (init_attr->cap.max_recv_sge > 3) {
425                         ehca_err(pd->device, "no more than three SGEs "
426                                  "supported for SRQ  pd=%p  max_sge=%x",
427                                  pd, init_attr->cap.max_recv_sge);
428                         return ERR_PTR(-EINVAL);
429                 }
430         }
431
432         /* check QP type */
433         if (qp_type != IB_QPT_UD &&
434             qp_type != IB_QPT_UC &&
435             qp_type != IB_QPT_RC &&
436             qp_type != IB_QPT_SMI &&
437             qp_type != IB_QPT_GSI) {
438                 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
439                 return ERR_PTR(-EINVAL);
440         }
441
442         if (is_llqp) {
443                 switch (qp_type) {
444                 case IB_QPT_RC:
445                         if ((init_attr->cap.max_send_wr > 255) ||
446                             (init_attr->cap.max_recv_wr > 255)) {
447                                 ehca_err(pd->device,
448                                          "Invalid Number of max_sq_wr=%x "
449                                          "or max_rq_wr=%x for RC LLQP",
450                                          init_attr->cap.max_send_wr,
451                                          init_attr->cap.max_recv_wr);
452                                 return ERR_PTR(-EINVAL);
453                         }
454                         break;
455                 case IB_QPT_UD:
456                         if (!EHCA_BMASK_GET(HCA_CAP_UD_LL_QP, shca->hca_cap)) {
457                                 ehca_err(pd->device, "UD LLQP not supported "
458                                          "by this adapter");
459                                 return ERR_PTR(-ENOSYS);
460                         }
461                         if (!(init_attr->cap.max_send_sge <= 5
462                             && init_attr->cap.max_send_sge >= 1
463                             && init_attr->cap.max_recv_sge <= 5
464                             && init_attr->cap.max_recv_sge >= 1)) {
465                                 ehca_err(pd->device,
466                                          "Invalid Number of max_send_sge=%x "
467                                          "or max_recv_sge=%x for UD LLQP",
468                                          init_attr->cap.max_send_sge,
469                                          init_attr->cap.max_recv_sge);
470                                 return ERR_PTR(-EINVAL);
471                         } else if (init_attr->cap.max_send_wr > 255) {
472                                 ehca_err(pd->device,
473                                          "Invalid Number of "
474                                          "ax_send_wr=%x for UD QP_TYPE=%x",
475                                          init_attr->cap.max_send_wr, qp_type);
476                                 return ERR_PTR(-EINVAL);
477                         }
478                         break;
479                 default:
480                         ehca_err(pd->device, "unsupported LL QP Type=%x",
481                                  qp_type);
482                         return ERR_PTR(-EINVAL);
483                         break;
484                 }
485         }
486
487         if (pd->uobject && udata)
488                 context = pd->uobject->context;
489
490         my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
491         if (!my_qp) {
492                 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
493                 return ERR_PTR(-ENOMEM);
494         }
495
496         spin_lock_init(&my_qp->spinlock_s);
497         spin_lock_init(&my_qp->spinlock_r);
498         my_qp->qp_type = qp_type;
499         my_qp->ext_type = parms.ext_type;
500
501         if (init_attr->recv_cq)
502                 my_qp->recv_cq =
503                         container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
504         if (init_attr->send_cq)
505                 my_qp->send_cq =
506                         container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
507
508         do {
509                 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
510                         ret = -ENOMEM;
511                         ehca_err(pd->device, "Can't reserve idr resources.");
512                         goto create_qp_exit0;
513                 }
514
515                 write_lock_irqsave(&ehca_qp_idr_lock, flags);
516                 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
517                 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
518
519         } while (ret == -EAGAIN);
520
521         if (ret) {
522                 ret = -ENOMEM;
523                 ehca_err(pd->device, "Can't allocate new idr entry.");
524                 goto create_qp_exit0;
525         }
526
527         parms.servicetype = ibqptype2servicetype(qp_type);
528         if (parms.servicetype < 0) {
529                 ret = -EINVAL;
530                 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
531                 goto create_qp_exit0;
532         }
533
534         if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
535                 parms.sigtype = HCALL_SIGT_EVERY;
536         else
537                 parms.sigtype = HCALL_SIGT_BY_WQE;
538
539         /* UD_AV CIRCUMVENTION */
540         max_send_sge = init_attr->cap.max_send_sge;
541         max_recv_sge = init_attr->cap.max_recv_sge;
542         if (parms.servicetype == ST_UD && !is_llqp) {
543                 max_send_sge += 2;
544                 max_recv_sge += 2;
545         }
546
547         parms.token = my_qp->token;
548         parms.eq_handle = shca->eq.ipz_eq_handle;
549         parms.pd = my_pd->fw_pd;
550         if (my_qp->send_cq)
551                 parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
552         if (my_qp->recv_cq)
553                 parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
554
555         parms.max_send_wr = init_attr->cap.max_send_wr;
556         parms.max_recv_wr = init_attr->cap.max_recv_wr;
557         parms.max_send_sge = max_send_sge;
558         parms.max_recv_sge = max_recv_sge;
559
560         h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
561         if (h_ret != H_SUCCESS) {
562                 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%lx",
563                          h_ret);
564                 ret = ehca2ib_return_code(h_ret);
565                 goto create_qp_exit1;
566         }
567
568         ib_qp_num = my_qp->real_qp_num = parms.real_qp_num;
569         my_qp->ipz_qp_handle = parms.qp_handle;
570         my_qp->galpas = parms.galpas;
571
572         switch (qp_type) {
573         case IB_QPT_RC:
574                 if (!is_llqp) {
575                         swqe_size = offsetof(struct ehca_wqe, u.nud.sg_list[
576                                              (parms.act_nr_send_sges)]);
577                         rwqe_size = offsetof(struct ehca_wqe, u.nud.sg_list[
578                                              (parms.act_nr_recv_sges)]);
579                 } else { /* for LLQP we need to use msg size, not wqe size */
580                         swqe_size = ll_qp_msg_size(max_send_sge);
581                         rwqe_size = ll_qp_msg_size(max_recv_sge);
582                         parms.act_nr_send_sges = 1;
583                         parms.act_nr_recv_sges = 1;
584                 }
585                 break;
586         case IB_QPT_UC:
587                 swqe_size = offsetof(struct ehca_wqe,
588                                      u.nud.sg_list[parms.act_nr_send_sges]);
589                 rwqe_size = offsetof(struct ehca_wqe,
590                                      u.nud.sg_list[parms.act_nr_recv_sges]);
591                 break;
592
593         case IB_QPT_UD:
594         case IB_QPT_GSI:
595         case IB_QPT_SMI:
596                 if (is_llqp) {
597                         swqe_size = ll_qp_msg_size(parms.act_nr_send_sges);
598                         rwqe_size = ll_qp_msg_size(parms.act_nr_recv_sges);
599                         parms.act_nr_send_sges = 1;
600                         parms.act_nr_recv_sges = 1;
601                 } else {
602                         /* UD circumvention */
603                         parms.act_nr_send_sges -= 2;
604                         parms.act_nr_recv_sges -= 2;
605                         swqe_size = offsetof(struct ehca_wqe, u.ud_av.sg_list[
606                                                      parms.act_nr_send_sges]);
607                         rwqe_size = offsetof(struct ehca_wqe, u.ud_av.sg_list[
608                                                      parms.act_nr_recv_sges]);
609                 }
610
611                 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
612                         parms.act_nr_send_wqes = init_attr->cap.max_send_wr;
613                         parms.act_nr_recv_wqes = init_attr->cap.max_recv_wr;
614                         parms.act_nr_send_sges = init_attr->cap.max_send_sge;
615                         parms.act_nr_recv_sges = init_attr->cap.max_recv_sge;
616                         ib_qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
617                 }
618
619                 break;
620
621         default:
622                 break;
623         }
624
625         /* initialize r/squeue and register queue pages */
626         if (HAS_SQ(my_qp)) {
627                 ret = init_qp_queue(
628                         shca, my_qp, &my_qp->ipz_squeue, 0,
629                         HAS_RQ(my_qp) ? H_PAGE_REGISTERED : H_SUCCESS,
630                         parms.nr_sq_pages, swqe_size,
631                         parms.act_nr_send_sges);
632                 if (ret) {
633                         ehca_err(pd->device, "Couldn't initialize squeue "
634                                  "and pages  ret=%x", ret);
635                         goto create_qp_exit2;
636                 }
637         }
638
639         if (HAS_RQ(my_qp)) {
640                 ret = init_qp_queue(
641                         shca, my_qp, &my_qp->ipz_rqueue, 1,
642                         H_SUCCESS, parms.nr_rq_pages, rwqe_size,
643                         parms.act_nr_recv_sges);
644                 if (ret) {
645                         ehca_err(pd->device, "Couldn't initialize rqueue "
646                                  "and pages ret=%x", ret);
647                         goto create_qp_exit3;
648                 }
649         }
650
651         if (is_srq) {
652                 my_qp->ib_srq.pd = &my_pd->ib_pd;
653                 my_qp->ib_srq.device = my_pd->ib_pd.device;
654
655                 my_qp->ib_srq.srq_context = init_attr->qp_context;
656                 my_qp->ib_srq.event_handler = init_attr->event_handler;
657         } else {
658                 my_qp->ib_qp.qp_num = ib_qp_num;
659                 my_qp->ib_qp.pd = &my_pd->ib_pd;
660                 my_qp->ib_qp.device = my_pd->ib_pd.device;
661
662                 my_qp->ib_qp.recv_cq = init_attr->recv_cq;
663                 my_qp->ib_qp.send_cq = init_attr->send_cq;
664
665                 my_qp->ib_qp.qp_type = qp_type;
666                 my_qp->ib_qp.srq = init_attr->srq;
667
668                 my_qp->ib_qp.qp_context = init_attr->qp_context;
669                 my_qp->ib_qp.event_handler = init_attr->event_handler;
670         }
671
672         init_attr->cap.max_inline_data = 0; /* not supported yet */
673         init_attr->cap.max_recv_sge = parms.act_nr_recv_sges;
674         init_attr->cap.max_recv_wr = parms.act_nr_recv_wqes;
675         init_attr->cap.max_send_sge = parms.act_nr_send_sges;
676         init_attr->cap.max_send_wr = parms.act_nr_send_wqes;
677         my_qp->init_attr = *init_attr;
678
679         /* NOTE: define_apq0() not supported yet */
680         if (qp_type == IB_QPT_GSI) {
681                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
682                 if (h_ret != H_SUCCESS) {
683                         ehca_err(pd->device, "ehca_define_sqp() failed rc=%lx",
684                                  h_ret);
685                         ret = ehca2ib_return_code(h_ret);
686                         goto create_qp_exit4;
687                 }
688         }
689
690         if (my_qp->send_cq) {
691                 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
692                 if (ret) {
693                         ehca_err(pd->device,
694                                  "Couldn't assign qp to send_cq ret=%x", ret);
695                         goto create_qp_exit4;
696                 }
697         }
698
699         /* copy queues, galpa data to user space */
700         if (context && udata) {
701                 struct ehca_create_qp_resp resp;
702                 memset(&resp, 0, sizeof(resp));
703
704                 resp.qp_num = my_qp->real_qp_num;
705                 resp.token = my_qp->token;
706                 resp.qp_type = my_qp->qp_type;
707                 resp.ext_type = my_qp->ext_type;
708                 resp.qkey = my_qp->qkey;
709                 resp.real_qp_num = my_qp->real_qp_num;
710                 if (HAS_SQ(my_qp))
711                         queue2resp(&resp.ipz_squeue, &my_qp->ipz_squeue);
712                 if (HAS_RQ(my_qp))
713                         queue2resp(&resp.ipz_rqueue, &my_qp->ipz_rqueue);
714
715                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
716                         ehca_err(pd->device, "Copy to udata failed");
717                         ret = -EINVAL;
718                         goto create_qp_exit4;
719                 }
720         }
721
722         return my_qp;
723
724 create_qp_exit4:
725         if (HAS_RQ(my_qp))
726                 ipz_queue_dtor(&my_qp->ipz_rqueue);
727
728 create_qp_exit3:
729         if (HAS_SQ(my_qp))
730                 ipz_queue_dtor(&my_qp->ipz_squeue);
731
732 create_qp_exit2:
733         hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
734
735 create_qp_exit1:
736         write_lock_irqsave(&ehca_qp_idr_lock, flags);
737         idr_remove(&ehca_qp_idr, my_qp->token);
738         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
739
740 create_qp_exit0:
741         kmem_cache_free(qp_cache, my_qp);
742         return ERR_PTR(ret);
743 }
744
745 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
746                              struct ib_qp_init_attr *qp_init_attr,
747                              struct ib_udata *udata)
748 {
749         struct ehca_qp *ret;
750
751         ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
752         return IS_ERR(ret) ? (struct ib_qp *)ret : &ret->ib_qp;
753 }
754
755 int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
756                         struct ib_uobject *uobject);
757
758 struct ib_srq *ehca_create_srq(struct ib_pd *pd,
759                                struct ib_srq_init_attr *srq_init_attr,
760                                struct ib_udata *udata)
761 {
762         struct ib_qp_init_attr qp_init_attr;
763         struct ehca_qp *my_qp;
764         struct ib_srq *ret;
765         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
766                                               ib_device);
767         struct hcp_modify_qp_control_block *mqpcb;
768         u64 hret, update_mask;
769
770         /* For common attributes, internal_create_qp() takes its info
771          * out of qp_init_attr, so copy all common attrs there.
772          */
773         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
774         qp_init_attr.event_handler = srq_init_attr->event_handler;
775         qp_init_attr.qp_context = srq_init_attr->srq_context;
776         qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
777         qp_init_attr.qp_type = IB_QPT_RC;
778         qp_init_attr.cap.max_recv_wr = srq_init_attr->attr.max_wr;
779         qp_init_attr.cap.max_recv_sge = srq_init_attr->attr.max_sge;
780
781         my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
782         if (IS_ERR(my_qp))
783                 return (struct ib_srq *)my_qp;
784
785         /* copy back return values */
786         srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
787         srq_init_attr->attr.max_sge = qp_init_attr.cap.max_recv_sge;
788
789         /* drive SRQ into RTR state */
790         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
791         if (!mqpcb) {
792                 ehca_err(pd->device, "Could not get zeroed page for mqpcb "
793                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
794                 ret = ERR_PTR(-ENOMEM);
795                 goto create_srq1;
796         }
797
798         mqpcb->qp_state = EHCA_QPS_INIT;
799         mqpcb->prim_phys_port = 1;
800         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
801         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
802                                 my_qp->ipz_qp_handle,
803                                 &my_qp->pf,
804                                 update_mask,
805                                 mqpcb, my_qp->galpas.kernel);
806         if (hret != H_SUCCESS) {
807                 ehca_err(pd->device, "Could not modify SRQ to INIT"
808                          "ehca_qp=%p qp_num=%x hret=%lx",
809                          my_qp, my_qp->real_qp_num, hret);
810                 goto create_srq2;
811         }
812
813         mqpcb->qp_enable = 1;
814         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
815         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
816                                 my_qp->ipz_qp_handle,
817                                 &my_qp->pf,
818                                 update_mask,
819                                 mqpcb, my_qp->galpas.kernel);
820         if (hret != H_SUCCESS) {
821                 ehca_err(pd->device, "Could not enable SRQ"
822                          "ehca_qp=%p qp_num=%x hret=%lx",
823                          my_qp, my_qp->real_qp_num, hret);
824                 goto create_srq2;
825         }
826
827         mqpcb->qp_state  = EHCA_QPS_RTR;
828         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
829         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
830                                 my_qp->ipz_qp_handle,
831                                 &my_qp->pf,
832                                 update_mask,
833                                 mqpcb, my_qp->galpas.kernel);
834         if (hret != H_SUCCESS) {
835                 ehca_err(pd->device, "Could not modify SRQ to RTR"
836                          "ehca_qp=%p qp_num=%x hret=%lx",
837                          my_qp, my_qp->real_qp_num, hret);
838                 goto create_srq2;
839         }
840
841         return &my_qp->ib_srq;
842
843 create_srq2:
844         ret = ERR_PTR(ehca2ib_return_code(hret));
845         ehca_free_fw_ctrlblock(mqpcb);
846
847 create_srq1:
848         internal_destroy_qp(pd->device, my_qp, my_qp->ib_srq.uobject);
849
850         return ret;
851 }
852
853 /*
854  * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
855  * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
856  * returns total number of bad wqes in bad_wqe_cnt
857  */
858 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
859                            int *bad_wqe_cnt)
860 {
861         u64 h_ret;
862         struct ipz_queue *squeue;
863         void *bad_send_wqe_p, *bad_send_wqe_v;
864         u64 q_ofs;
865         struct ehca_wqe *wqe;
866         int qp_num = my_qp->ib_qp.qp_num;
867
868         /* get send wqe pointer */
869         h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
870                                            my_qp->ipz_qp_handle, &my_qp->pf,
871                                            &bad_send_wqe_p, NULL, 2);
872         if (h_ret != H_SUCCESS) {
873                 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
874                          " ehca_qp=%p qp_num=%x h_ret=%lx",
875                          my_qp, qp_num, h_ret);
876                 return ehca2ib_return_code(h_ret);
877         }
878         bad_send_wqe_p = (void *)((u64)bad_send_wqe_p & (~(1L << 63)));
879         ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
880                  qp_num, bad_send_wqe_p);
881         /* convert wqe pointer to vadr */
882         bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
883         if (ehca_debug_level)
884                 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
885         squeue = &my_qp->ipz_squeue;
886         if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
887                 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
888                          " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
889                 return -EFAULT;
890         }
891
892         /* loop sets wqe's purge bit */
893         wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
894         *bad_wqe_cnt = 0;
895         while (wqe->optype != 0xff && wqe->wqef != 0xff) {
896                 if (ehca_debug_level)
897                         ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
898                 wqe->nr_of_data_seg = 0; /* suppress data access */
899                 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
900                 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
901                 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
902                 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
903         }
904         /*
905          * bad wqe will be reprocessed and ignored when pol_cq() is called,
906          *  i.e. nr of wqes with flush error status is one less
907          */
908         ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
909                  qp_num, (*bad_wqe_cnt)-1);
910         wqe->wqef = 0;
911
912         return 0;
913 }
914
915 /*
916  * internal_modify_qp with circumvention to handle aqp0 properly
917  * smi_reset2init indicates if this is an internal reset-to-init-call for
918  * smi. This flag must always be zero if called from ehca_modify_qp()!
919  * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
920  */
921 static int internal_modify_qp(struct ib_qp *ibqp,
922                               struct ib_qp_attr *attr,
923                               int attr_mask, int smi_reset2init)
924 {
925         enum ib_qp_state qp_cur_state, qp_new_state;
926         int cnt, qp_attr_idx, ret = 0;
927         enum ib_qp_statetrans statetrans;
928         struct hcp_modify_qp_control_block *mqpcb;
929         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
930         struct ehca_shca *shca =
931                 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
932         u64 update_mask;
933         u64 h_ret;
934         int bad_wqe_cnt = 0;
935         int squeue_locked = 0;
936         unsigned long flags = 0;
937
938         /* do query_qp to obtain current attr values */
939         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
940         if (!mqpcb) {
941                 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
942                          "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
943                 return -ENOMEM;
944         }
945
946         h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
947                                 my_qp->ipz_qp_handle,
948                                 &my_qp->pf,
949                                 mqpcb, my_qp->galpas.kernel);
950         if (h_ret != H_SUCCESS) {
951                 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
952                          "ehca_qp=%p qp_num=%x h_ret=%lx",
953                          my_qp, ibqp->qp_num, h_ret);
954                 ret = ehca2ib_return_code(h_ret);
955                 goto modify_qp_exit1;
956         }
957
958         qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
959
960         if (qp_cur_state == -EINVAL) {  /* invalid qp state */
961                 ret = -EINVAL;
962                 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
963                          "ehca_qp=%p qp_num=%x",
964                          mqpcb->qp_state, my_qp, ibqp->qp_num);
965                 goto modify_qp_exit1;
966         }
967         /*
968          * circumvention to set aqp0 initial state to init
969          * as expected by IB spec
970          */
971         if (smi_reset2init == 0 &&
972             ibqp->qp_type == IB_QPT_SMI &&
973             qp_cur_state == IB_QPS_RESET &&
974             (attr_mask & IB_QP_STATE) &&
975             attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
976                 struct ib_qp_attr smiqp_attr = {
977                         .qp_state = IB_QPS_INIT,
978                         .port_num = my_qp->init_attr.port_num,
979                         .pkey_index = 0,
980                         .qkey = 0
981                 };
982                 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
983                         IB_QP_PKEY_INDEX | IB_QP_QKEY;
984                 int smirc = internal_modify_qp(
985                         ibqp, &smiqp_attr, smiqp_attr_mask, 1);
986                 if (smirc) {
987                         ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
988                                  "ehca_modify_qp() rc=%x", smirc);
989                         ret = H_PARAMETER;
990                         goto modify_qp_exit1;
991                 }
992                 qp_cur_state = IB_QPS_INIT;
993                 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
994         }
995         /* is transmitted current state  equal to "real" current state */
996         if ((attr_mask & IB_QP_CUR_STATE) &&
997             qp_cur_state != attr->cur_qp_state) {
998                 ret = -EINVAL;
999                 ehca_err(ibqp->device,
1000                          "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
1001                          " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
1002                          attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
1003                 goto modify_qp_exit1;
1004         }
1005
1006         ehca_dbg(ibqp->device, "ehca_qp=%p qp_num=%x current qp_state=%x "
1007                  "new qp_state=%x attribute_mask=%x",
1008                  my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
1009
1010         qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
1011         if (!smi_reset2init &&
1012             !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
1013                                 attr_mask)) {
1014                 ret = -EINVAL;
1015                 ehca_err(ibqp->device,
1016                          "Invalid qp transition new_state=%x cur_state=%x "
1017                          "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
1018                          qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
1019                 goto modify_qp_exit1;
1020         }
1021
1022         mqpcb->qp_state = ib2ehca_qp_state(qp_new_state);
1023         if (mqpcb->qp_state)
1024                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1025         else {
1026                 ret = -EINVAL;
1027                 ehca_err(ibqp->device, "Invalid new qp state=%x "
1028                          "ehca_qp=%p qp_num=%x",
1029                          qp_new_state, my_qp, ibqp->qp_num);
1030                 goto modify_qp_exit1;
1031         }
1032
1033         /* retrieve state transition struct to get req and opt attrs */
1034         statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
1035         if (statetrans < 0) {
1036                 ret = -EINVAL;
1037                 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
1038                          "new_qp_state=%x State_xsition=%x ehca_qp=%p "
1039                          "qp_num=%x", qp_cur_state, qp_new_state,
1040                          statetrans, my_qp, ibqp->qp_num);
1041                 goto modify_qp_exit1;
1042         }
1043
1044         qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
1045
1046         if (qp_attr_idx < 0) {
1047                 ret = qp_attr_idx;
1048                 ehca_err(ibqp->device,
1049                          "Invalid QP type=%x ehca_qp=%p qp_num=%x",
1050                          ibqp->qp_type, my_qp, ibqp->qp_num);
1051                 goto modify_qp_exit1;
1052         }
1053
1054         ehca_dbg(ibqp->device,
1055                  "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
1056                  my_qp, ibqp->qp_num, statetrans);
1057
1058         /* eHCA2 rev2 and higher require the SEND_GRH_FLAG to be set
1059          * in non-LL UD QPs.
1060          */
1061         if ((my_qp->qp_type == IB_QPT_UD) &&
1062             (my_qp->ext_type != EQPT_LLQP) &&
1063             (statetrans == IB_QPST_INIT2RTR) &&
1064             (shca->hw_level >= 0x22)) {
1065                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1066                 mqpcb->send_grh_flag = 1;
1067         }
1068
1069         /* sqe -> rts: set purge bit of bad wqe before actual trans */
1070         if ((my_qp->qp_type == IB_QPT_UD ||
1071              my_qp->qp_type == IB_QPT_GSI ||
1072              my_qp->qp_type == IB_QPT_SMI) &&
1073             statetrans == IB_QPST_SQE2RTS) {
1074                 /* mark next free wqe if kernel */
1075                 if (!ibqp->uobject) {
1076                         struct ehca_wqe *wqe;
1077                         /* lock send queue */
1078                         spin_lock_irqsave(&my_qp->spinlock_s, flags);
1079                         squeue_locked = 1;
1080                         /* mark next free wqe */
1081                         wqe = (struct ehca_wqe *)
1082                                 ipz_qeit_get(&my_qp->ipz_squeue);
1083                         wqe->optype = wqe->wqef = 0xff;
1084                         ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
1085                                  ibqp->qp_num, wqe);
1086                 }
1087                 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
1088                 if (ret) {
1089                         ehca_err(ibqp->device, "prepare_sqe_rts() failed "
1090                                  "ehca_qp=%p qp_num=%x ret=%x",
1091                                  my_qp, ibqp->qp_num, ret);
1092                         goto modify_qp_exit2;
1093                 }
1094         }
1095
1096         /*
1097          * enable RDMA_Atomic_Control if reset->init und reliable con
1098          * this is necessary since gen2 does not provide that flag,
1099          * but pHyp requires it
1100          */
1101         if (statetrans == IB_QPST_RESET2INIT &&
1102             (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
1103                 mqpcb->rdma_atomic_ctrl = 3;
1104                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1105         }
1106         /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
1107         if (statetrans == IB_QPST_INIT2RTR &&
1108             (ibqp->qp_type == IB_QPT_UC) &&
1109             !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
1110                 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
1111                 update_mask |=
1112                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1113         }
1114
1115         if (attr_mask & IB_QP_PKEY_INDEX) {
1116                 mqpcb->prim_p_key_idx = attr->pkey_index;
1117                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1118         }
1119         if (attr_mask & IB_QP_PORT) {
1120                 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
1121                         ret = -EINVAL;
1122                         ehca_err(ibqp->device, "Invalid port=%x. "
1123                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1124                                  attr->port_num, my_qp, ibqp->qp_num,
1125                                  shca->num_ports);
1126                         goto modify_qp_exit2;
1127                 }
1128                 mqpcb->prim_phys_port = attr->port_num;
1129                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1130         }
1131         if (attr_mask & IB_QP_QKEY) {
1132                 mqpcb->qkey = attr->qkey;
1133                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
1134         }
1135         if (attr_mask & IB_QP_AV) {
1136                 int ah_mult = ib_rate_to_mult(attr->ah_attr.static_rate);
1137                 int ehca_mult = ib_rate_to_mult(shca->sport[my_qp->
1138                                                 init_attr.port_num].rate);
1139
1140                 mqpcb->dlid = attr->ah_attr.dlid;
1141                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
1142                 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
1143                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
1144                 mqpcb->service_level = attr->ah_attr.sl;
1145                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
1146
1147                 if (ah_mult < ehca_mult)
1148                         mqpcb->max_static_rate = (ah_mult > 0) ?
1149                         ((ehca_mult - 1) / ah_mult) : 0;
1150                 else
1151                         mqpcb->max_static_rate = 0;
1152                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
1153
1154                 /*
1155                  * Always supply the GRH flag, even if it's zero, to give the
1156                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1157                  */
1158                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1159
1160                 /*
1161                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1162                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1163                  */
1164                 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
1165                         mqpcb->send_grh_flag = 1;
1166
1167                         mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
1168                         update_mask |=
1169                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
1170
1171                         for (cnt = 0; cnt < 16; cnt++)
1172                                 mqpcb->dest_gid.byte[cnt] =
1173                                         attr->ah_attr.grh.dgid.raw[cnt];
1174
1175                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
1176                         mqpcb->flow_label = attr->ah_attr.grh.flow_label;
1177                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
1178                         mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
1179                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
1180                         mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
1181                         update_mask |=
1182                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
1183                 }
1184         }
1185
1186         if (attr_mask & IB_QP_PATH_MTU) {
1187                 mqpcb->path_mtu = attr->path_mtu;
1188                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
1189         }
1190         if (attr_mask & IB_QP_TIMEOUT) {
1191                 mqpcb->timeout = attr->timeout;
1192                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
1193         }
1194         if (attr_mask & IB_QP_RETRY_CNT) {
1195                 mqpcb->retry_count = attr->retry_cnt;
1196                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
1197         }
1198         if (attr_mask & IB_QP_RNR_RETRY) {
1199                 mqpcb->rnr_retry_count = attr->rnr_retry;
1200                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
1201         }
1202         if (attr_mask & IB_QP_RQ_PSN) {
1203                 mqpcb->receive_psn = attr->rq_psn;
1204                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
1205         }
1206         if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1207                 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1208                         attr->max_dest_rd_atomic : 2;
1209                 update_mask |=
1210                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1211         }
1212         if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1213                 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1214                         attr->max_rd_atomic : 2;
1215                 update_mask |=
1216                         EHCA_BMASK_SET
1217                         (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1218         }
1219         if (attr_mask & IB_QP_ALT_PATH) {
1220                 int ah_mult = ib_rate_to_mult(attr->alt_ah_attr.static_rate);
1221                 int ehca_mult = ib_rate_to_mult(
1222                         shca->sport[my_qp->init_attr.port_num].rate);
1223
1224                 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1225                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1);
1226                 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1227                 update_mask |=
1228                         EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1);
1229                 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1230                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1);
1231
1232                 if (ah_mult < ehca_mult)
1233                         mqpcb->max_static_rate = (ah_mult > 0) ?
1234                         ((ehca_mult - 1) / ah_mult) : 0;
1235                 else
1236                         mqpcb->max_static_rate_al = 0;
1237
1238                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1);
1239
1240                 /*
1241                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1242                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1243                  */
1244                 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1245                         mqpcb->send_grh_flag_al = 1 << 31;
1246                         update_mask |=
1247                                 EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1248                         mqpcb->source_gid_idx_al =
1249                                 attr->alt_ah_attr.grh.sgid_index;
1250                         update_mask |=
1251                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1);
1252
1253                         for (cnt = 0; cnt < 16; cnt++)
1254                                 mqpcb->dest_gid_al.byte[cnt] =
1255                                         attr->alt_ah_attr.grh.dgid.raw[cnt];
1256
1257                         update_mask |=
1258                                 EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1);
1259                         mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1260                         update_mask |=
1261                                 EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1);
1262                         mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1263                         update_mask |=
1264                                 EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1);
1265                         mqpcb->traffic_class_al =
1266                                 attr->alt_ah_attr.grh.traffic_class;
1267                         update_mask |=
1268                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1269                 }
1270         }
1271
1272         if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1273                 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1274                 update_mask |=
1275                         EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1276         }
1277
1278         if (attr_mask & IB_QP_SQ_PSN) {
1279                 mqpcb->send_psn = attr->sq_psn;
1280                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1281         }
1282
1283         if (attr_mask & IB_QP_DEST_QPN) {
1284                 mqpcb->dest_qp_nr = attr->dest_qp_num;
1285                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1286         }
1287
1288         if (attr_mask & IB_QP_PATH_MIG_STATE) {
1289                 mqpcb->path_migration_state = attr->path_mig_state;
1290                 update_mask |=
1291                         EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1292         }
1293
1294         if (attr_mask & IB_QP_CAP) {
1295                 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1296                 update_mask |=
1297                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1298                 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1299                 update_mask |=
1300                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1301                 /* no support for max_send/recv_sge yet */
1302         }
1303
1304         if (ehca_debug_level)
1305                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1306
1307         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1308                                  my_qp->ipz_qp_handle,
1309                                  &my_qp->pf,
1310                                  update_mask,
1311                                  mqpcb, my_qp->galpas.kernel);
1312
1313         if (h_ret != H_SUCCESS) {
1314                 ret = ehca2ib_return_code(h_ret);
1315                 ehca_err(ibqp->device, "hipz_h_modify_qp() failed rc=%lx "
1316                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, ibqp->qp_num);
1317                 goto modify_qp_exit2;
1318         }
1319
1320         if ((my_qp->qp_type == IB_QPT_UD ||
1321              my_qp->qp_type == IB_QPT_GSI ||
1322              my_qp->qp_type == IB_QPT_SMI) &&
1323             statetrans == IB_QPST_SQE2RTS) {
1324                 /* doorbell to reprocessing wqes */
1325                 iosync(); /* serialize GAL register access */
1326                 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1327                 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1328         }
1329
1330         if (statetrans == IB_QPST_RESET2INIT ||
1331             statetrans == IB_QPST_INIT2INIT) {
1332                 mqpcb->qp_enable = 1;
1333                 mqpcb->qp_state = EHCA_QPS_INIT;
1334                 update_mask = 0;
1335                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1336
1337                 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1338                                          my_qp->ipz_qp_handle,
1339                                          &my_qp->pf,
1340                                          update_mask,
1341                                          mqpcb,
1342                                          my_qp->galpas.kernel);
1343
1344                 if (h_ret != H_SUCCESS) {
1345                         ret = ehca2ib_return_code(h_ret);
1346                         ehca_err(ibqp->device, "ENABLE in context of "
1347                                  "RESET_2_INIT failed! Maybe you didn't get "
1348                                  "a LID h_ret=%lx ehca_qp=%p qp_num=%x",
1349                                  h_ret, my_qp, ibqp->qp_num);
1350                         goto modify_qp_exit2;
1351                 }
1352         }
1353
1354         if (statetrans == IB_QPST_ANY2RESET) {
1355                 ipz_qeit_reset(&my_qp->ipz_rqueue);
1356                 ipz_qeit_reset(&my_qp->ipz_squeue);
1357         }
1358
1359         if (attr_mask & IB_QP_QKEY)
1360                 my_qp->qkey = attr->qkey;
1361
1362 modify_qp_exit2:
1363         if (squeue_locked) { /* this means: sqe -> rts */
1364                 spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
1365                 my_qp->sqerr_purgeflag = 1;
1366         }
1367
1368 modify_qp_exit1:
1369         ehca_free_fw_ctrlblock(mqpcb);
1370
1371         return ret;
1372 }
1373
1374 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1375                    struct ib_udata *udata)
1376 {
1377         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1378         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1379                                              ib_pd);
1380         u32 cur_pid = current->tgid;
1381
1382         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1383             my_pd->ownpid != cur_pid) {
1384                 ehca_err(ibqp->pd->device, "Invalid caller pid=%x ownpid=%x",
1385                          cur_pid, my_pd->ownpid);
1386                 return -EINVAL;
1387         }
1388
1389         return internal_modify_qp(ibqp, attr, attr_mask, 0);
1390 }
1391
1392 int ehca_query_qp(struct ib_qp *qp,
1393                   struct ib_qp_attr *qp_attr,
1394                   int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1395 {
1396         struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1397         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1398                                              ib_pd);
1399         struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1400                                               ib_device);
1401         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1402         struct hcp_modify_qp_control_block *qpcb;
1403         u32 cur_pid = current->tgid;
1404         int cnt, ret = 0;
1405         u64 h_ret;
1406
1407         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1408             my_pd->ownpid != cur_pid) {
1409                 ehca_err(qp->device, "Invalid caller pid=%x ownpid=%x",
1410                          cur_pid, my_pd->ownpid);
1411                 return -EINVAL;
1412         }
1413
1414         if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1415                 ehca_err(qp->device, "Invalid attribute mask "
1416                          "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1417                          my_qp, qp->qp_num, qp_attr_mask);
1418                 return -EINVAL;
1419         }
1420
1421         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1422         if (!qpcb) {
1423                 ehca_err(qp->device, "Out of memory for qpcb "
1424                          "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1425                 return -ENOMEM;
1426         }
1427
1428         h_ret = hipz_h_query_qp(adapter_handle,
1429                                 my_qp->ipz_qp_handle,
1430                                 &my_qp->pf,
1431                                 qpcb, my_qp->galpas.kernel);
1432
1433         if (h_ret != H_SUCCESS) {
1434                 ret = ehca2ib_return_code(h_ret);
1435                 ehca_err(qp->device, "hipz_h_query_qp() failed "
1436                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1437                          my_qp, qp->qp_num, h_ret);
1438                 goto query_qp_exit1;
1439         }
1440
1441         qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1442         qp_attr->qp_state = qp_attr->cur_qp_state;
1443
1444         if (qp_attr->cur_qp_state == -EINVAL) {
1445                 ret = -EINVAL;
1446                 ehca_err(qp->device, "Got invalid ehca_qp_state=%x "
1447                          "ehca_qp=%p qp_num=%x",
1448                          qpcb->qp_state, my_qp, qp->qp_num);
1449                 goto query_qp_exit1;
1450         }
1451
1452         if (qp_attr->qp_state == IB_QPS_SQD)
1453                 qp_attr->sq_draining = 1;
1454
1455         qp_attr->qkey = qpcb->qkey;
1456         qp_attr->path_mtu = qpcb->path_mtu;
1457         qp_attr->path_mig_state = qpcb->path_migration_state;
1458         qp_attr->rq_psn = qpcb->receive_psn;
1459         qp_attr->sq_psn = qpcb->send_psn;
1460         qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1461         qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1462         qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1463         /* UD_AV CIRCUMVENTION */
1464         if (my_qp->qp_type == IB_QPT_UD) {
1465                 qp_attr->cap.max_send_sge =
1466                         qpcb->actual_nr_sges_in_sq_wqe - 2;
1467                 qp_attr->cap.max_recv_sge =
1468                         qpcb->actual_nr_sges_in_rq_wqe - 2;
1469         } else {
1470                 qp_attr->cap.max_send_sge =
1471                         qpcb->actual_nr_sges_in_sq_wqe;
1472                 qp_attr->cap.max_recv_sge =
1473                         qpcb->actual_nr_sges_in_rq_wqe;
1474         }
1475
1476         qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1477         qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1478
1479         qp_attr->pkey_index =
1480                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1481
1482         qp_attr->port_num =
1483                 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1484
1485         qp_attr->timeout = qpcb->timeout;
1486         qp_attr->retry_cnt = qpcb->retry_count;
1487         qp_attr->rnr_retry = qpcb->rnr_retry_count;
1488
1489         qp_attr->alt_pkey_index =
1490                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1491
1492         qp_attr->alt_port_num = qpcb->alt_phys_port;
1493         qp_attr->alt_timeout = qpcb->timeout_al;
1494
1495         qp_attr->max_dest_rd_atomic = qpcb->rdma_nr_atomic_resp_res;
1496         qp_attr->max_rd_atomic = qpcb->rdma_atomic_outst_dest_qp;
1497
1498         /* primary av */
1499         qp_attr->ah_attr.sl = qpcb->service_level;
1500
1501         if (qpcb->send_grh_flag) {
1502                 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1503         }
1504
1505         qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1506         qp_attr->ah_attr.dlid = qpcb->dlid;
1507         qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1508         qp_attr->ah_attr.port_num = qp_attr->port_num;
1509
1510         /* primary GRH */
1511         qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1512         qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1513         qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1514         qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1515
1516         for (cnt = 0; cnt < 16; cnt++)
1517                 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1518                         qpcb->dest_gid.byte[cnt];
1519
1520         /* alternate AV */
1521         qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1522         if (qpcb->send_grh_flag_al) {
1523                 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1524         }
1525
1526         qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1527         qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1528         qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1529
1530         /* alternate GRH */
1531         qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1532         qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1533         qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1534         qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1535
1536         for (cnt = 0; cnt < 16; cnt++)
1537                 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1538                         qpcb->dest_gid_al.byte[cnt];
1539
1540         /* return init attributes given in ehca_create_qp */
1541         if (qp_init_attr)
1542                 *qp_init_attr = my_qp->init_attr;
1543
1544         if (ehca_debug_level)
1545                 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1546
1547 query_qp_exit1:
1548         ehca_free_fw_ctrlblock(qpcb);
1549
1550         return ret;
1551 }
1552
1553 int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
1554                     enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1555 {
1556         struct ehca_qp *my_qp =
1557                 container_of(ibsrq, struct ehca_qp, ib_srq);
1558         struct ehca_pd *my_pd =
1559                 container_of(ibsrq->pd, struct ehca_pd, ib_pd);
1560         struct ehca_shca *shca =
1561                 container_of(ibsrq->pd->device, struct ehca_shca, ib_device);
1562         struct hcp_modify_qp_control_block *mqpcb;
1563         u64 update_mask;
1564         u64 h_ret;
1565         int ret = 0;
1566
1567         u32 cur_pid = current->tgid;
1568         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1569             my_pd->ownpid != cur_pid) {
1570                 ehca_err(ibsrq->pd->device, "Invalid caller pid=%x ownpid=%x",
1571                          cur_pid, my_pd->ownpid);
1572                 return -EINVAL;
1573         }
1574
1575         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1576         if (!mqpcb) {
1577                 ehca_err(ibsrq->device, "Could not get zeroed page for mqpcb "
1578                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
1579                 return -ENOMEM;
1580         }
1581
1582         update_mask = 0;
1583         if (attr_mask & IB_SRQ_LIMIT) {
1584                 attr_mask &= ~IB_SRQ_LIMIT;
1585                 update_mask |=
1586                         EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1)
1587                         | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1);
1588                 mqpcb->curr_srq_limit =
1589                         EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit);
1590                 mqpcb->qp_aff_asyn_ev_log_reg =
1591                         EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1);
1592         }
1593
1594         /* by now, all bits in attr_mask should have been cleared */
1595         if (attr_mask) {
1596                 ehca_err(ibsrq->device, "invalid attribute mask bits set  "
1597                          "attr_mask=%x", attr_mask);
1598                 ret = -EINVAL;
1599                 goto modify_srq_exit0;
1600         }
1601
1602         if (ehca_debug_level)
1603                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1604
1605         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle, my_qp->ipz_qp_handle,
1606                                  NULL, update_mask, mqpcb,
1607                                  my_qp->galpas.kernel);
1608
1609         if (h_ret != H_SUCCESS) {
1610                 ret = ehca2ib_return_code(h_ret);
1611                 ehca_err(ibsrq->device, "hipz_h_modify_qp() failed rc=%lx "
1612                          "ehca_qp=%p qp_num=%x",
1613                          h_ret, my_qp, my_qp->real_qp_num);
1614         }
1615
1616 modify_srq_exit0:
1617         ehca_free_fw_ctrlblock(mqpcb);
1618
1619         return ret;
1620 }
1621
1622 int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
1623 {
1624         struct ehca_qp *my_qp = container_of(srq, struct ehca_qp, ib_srq);
1625         struct ehca_pd *my_pd = container_of(srq->pd, struct ehca_pd, ib_pd);
1626         struct ehca_shca *shca = container_of(srq->device, struct ehca_shca,
1627                                               ib_device);
1628         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1629         struct hcp_modify_qp_control_block *qpcb;
1630         u32 cur_pid = current->tgid;
1631         int ret = 0;
1632         u64 h_ret;
1633
1634         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1635             my_pd->ownpid != cur_pid) {
1636                 ehca_err(srq->device, "Invalid caller pid=%x ownpid=%x",
1637                          cur_pid, my_pd->ownpid);
1638                 return -EINVAL;
1639         }
1640
1641         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1642         if (!qpcb) {
1643                 ehca_err(srq->device, "Out of memory for qpcb "
1644                          "ehca_qp=%p qp_num=%x", my_qp, my_qp->real_qp_num);
1645                 return -ENOMEM;
1646         }
1647
1648         h_ret = hipz_h_query_qp(adapter_handle, my_qp->ipz_qp_handle,
1649                                 NULL, qpcb, my_qp->galpas.kernel);
1650
1651         if (h_ret != H_SUCCESS) {
1652                 ret = ehca2ib_return_code(h_ret);
1653                 ehca_err(srq->device, "hipz_h_query_qp() failed "
1654                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1655                          my_qp, my_qp->real_qp_num, h_ret);
1656                 goto query_srq_exit1;
1657         }
1658
1659         srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
1660         srq_attr->srq_limit = EHCA_BMASK_GET(
1661                 MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
1662
1663         if (ehca_debug_level)
1664                 ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1665
1666 query_srq_exit1:
1667         ehca_free_fw_ctrlblock(qpcb);
1668
1669         return ret;
1670 }
1671
1672 int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1673                         struct ib_uobject *uobject)
1674 {
1675         struct ehca_shca *shca = container_of(dev, struct ehca_shca, ib_device);
1676         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1677                                              ib_pd);
1678         u32 cur_pid = current->tgid;
1679         u32 qp_num = my_qp->real_qp_num;
1680         int ret;
1681         u64 h_ret;
1682         u8 port_num;
1683         enum ib_qp_type qp_type;
1684         unsigned long flags;
1685
1686         if (uobject) {
1687                 if (my_qp->mm_count_galpa ||
1688                     my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1689                         ehca_err(dev, "Resources still referenced in "
1690                                  "user space qp_num=%x", qp_num);
1691                         return -EINVAL;
1692                 }
1693                 if (my_pd->ownpid != cur_pid) {
1694                         ehca_err(dev, "Invalid caller pid=%x ownpid=%x",
1695                                  cur_pid, my_pd->ownpid);
1696                         return -EINVAL;
1697                 }
1698         }
1699
1700         if (my_qp->send_cq) {
1701                 ret = ehca_cq_unassign_qp(my_qp->send_cq, qp_num);
1702                 if (ret) {
1703                         ehca_err(dev, "Couldn't unassign qp from "
1704                                  "send_cq ret=%x qp_num=%x cq_num=%x", ret,
1705                                  qp_num, my_qp->send_cq->cq_number);
1706                         return ret;
1707                 }
1708         }
1709
1710         write_lock_irqsave(&ehca_qp_idr_lock, flags);
1711         idr_remove(&ehca_qp_idr, my_qp->token);
1712         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1713
1714         h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1715         if (h_ret != H_SUCCESS) {
1716                 ehca_err(dev, "hipz_h_destroy_qp() failed rc=%lx "
1717                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1718                 return ehca2ib_return_code(h_ret);
1719         }
1720
1721         port_num = my_qp->init_attr.port_num;
1722         qp_type  = my_qp->init_attr.qp_type;
1723
1724         /* no support for IB_QPT_SMI yet */
1725         if (qp_type == IB_QPT_GSI) {
1726                 struct ib_event event;
1727                 ehca_info(dev, "device %s: port %x is inactive.",
1728                           shca->ib_device.name, port_num);
1729                 event.device = &shca->ib_device;
1730                 event.event = IB_EVENT_PORT_ERR;
1731                 event.element.port_num = port_num;
1732                 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1733                 ib_dispatch_event(&event);
1734         }
1735
1736         if (HAS_RQ(my_qp))
1737                 ipz_queue_dtor(&my_qp->ipz_rqueue);
1738         if (HAS_SQ(my_qp))
1739                 ipz_queue_dtor(&my_qp->ipz_squeue);
1740         kmem_cache_free(qp_cache, my_qp);
1741         return 0;
1742 }
1743
1744 int ehca_destroy_qp(struct ib_qp *qp)
1745 {
1746         return internal_destroy_qp(qp->device,
1747                                    container_of(qp, struct ehca_qp, ib_qp),
1748                                    qp->uobject);
1749 }
1750
1751 int ehca_destroy_srq(struct ib_srq *srq)
1752 {
1753         return internal_destroy_qp(srq->device,
1754                                    container_of(srq, struct ehca_qp, ib_srq),
1755                                    srq->uobject);
1756 }
1757
1758 int ehca_init_qp_cache(void)
1759 {
1760         qp_cache = kmem_cache_create("ehca_cache_qp",
1761                                      sizeof(struct ehca_qp), 0,
1762                                      SLAB_HWCACHE_ALIGN,
1763                                      NULL, NULL);
1764         if (!qp_cache)
1765                 return -ENOMEM;
1766         return 0;
1767 }
1768
1769 void ehca_cleanup_qp_cache(void)
1770 {
1771         if (qp_cache)
1772                 kmem_cache_destroy(qp_cache);
1773 }