RDMA/cxgb3: Fix severe limit on userspace memory registration size
[linux-2.6.git] / drivers / infiniband / hw / cxgb3 / iwch_provider.h
1 /*
2  * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 #ifndef __IWCH_PROVIDER_H__
33 #define __IWCH_PROVIDER_H__
34
35 #include <linux/list.h>
36 #include <linux/spinlock.h>
37 #include <rdma/ib_verbs.h>
38 #include <asm/types.h>
39 #include "t3cdev.h"
40 #include "iwch.h"
41 #include "cxio_wr.h"
42 #include "cxio_hal.h"
43
44 struct iwch_pd {
45         struct ib_pd ibpd;
46         u32 pdid;
47         struct iwch_dev *rhp;
48 };
49
50 static inline struct iwch_pd *to_iwch_pd(struct ib_pd *ibpd)
51 {
52         return container_of(ibpd, struct iwch_pd, ibpd);
53 }
54
55 struct tpt_attributes {
56         u32 stag;
57         u32 state:1;
58         u32 type:2;
59         u32 rsvd:1;
60         enum tpt_mem_perm perms;
61         u32 remote_invaliate_disable:1;
62         u32 zbva:1;
63         u32 mw_bind_enable:1;
64         u32 page_size:5;
65
66         u32 pdid;
67         u32 qpid;
68         u32 pbl_addr;
69         u32 len;
70         u64 va_fbo;
71         u32 pbl_size;
72 };
73
74 struct iwch_mr {
75         struct ib_mr ibmr;
76         struct ib_umem *umem;
77         struct iwch_dev *rhp;
78         u64 kva;
79         struct tpt_attributes attr;
80 };
81
82 typedef struct iwch_mw iwch_mw_handle;
83
84 static inline struct iwch_mr *to_iwch_mr(struct ib_mr *ibmr)
85 {
86         return container_of(ibmr, struct iwch_mr, ibmr);
87 }
88
89 struct iwch_mw {
90         struct ib_mw ibmw;
91         struct iwch_dev *rhp;
92         u64 kva;
93         struct tpt_attributes attr;
94 };
95
96 static inline struct iwch_mw *to_iwch_mw(struct ib_mw *ibmw)
97 {
98         return container_of(ibmw, struct iwch_mw, ibmw);
99 }
100
101 struct iwch_cq {
102         struct ib_cq ibcq;
103         struct iwch_dev *rhp;
104         struct t3_cq cq;
105         spinlock_t lock;
106         atomic_t refcnt;
107         wait_queue_head_t wait;
108         u32 __user *user_rptr_addr;
109 };
110
111 static inline struct iwch_cq *to_iwch_cq(struct ib_cq *ibcq)
112 {
113         return container_of(ibcq, struct iwch_cq, ibcq);
114 }
115
116 enum IWCH_QP_FLAGS {
117         QP_QUIESCED = 0x01
118 };
119
120 struct iwch_mpa_attributes {
121         u8 initiator;
122         u8 recv_marker_enabled;
123         u8 xmit_marker_enabled; /* iWARP: enable inbound Read Resp. */
124         u8 crc_enabled;
125         u8 version;     /* 0 or 1 */
126 };
127
128 struct iwch_qp_attributes {
129         u32 scq;
130         u32 rcq;
131         u32 sq_num_entries;
132         u32 rq_num_entries;
133         u32 sq_max_sges;
134         u32 sq_max_sges_rdma_write;
135         u32 rq_max_sges;
136         u32 state;
137         u8 enable_rdma_read;
138         u8 enable_rdma_write;   /* enable inbound Read Resp. */
139         u8 enable_bind;
140         u8 enable_mmid0_fastreg;        /* Enable STAG0 + Fast-register */
141         /*
142          * Next QP state. If specify the current state, only the
143          * QP attributes will be modified.
144          */
145         u32 max_ord;
146         u32 max_ird;
147         u32 pd; /* IN */
148         u32 next_state;
149         char terminate_buffer[52];
150         u32 terminate_msg_len;
151         u8 is_terminate_local;
152         struct iwch_mpa_attributes mpa_attr;    /* IN-OUT */
153         struct iwch_ep *llp_stream_handle;
154         char *stream_msg_buf;   /* Last stream msg. before Idle -> RTS */
155         u32 stream_msg_buf_len; /* Only on Idle -> RTS */
156 };
157
158 struct iwch_qp {
159         struct ib_qp ibqp;
160         struct iwch_dev *rhp;
161         struct iwch_ep *ep;
162         struct iwch_qp_attributes attr;
163         struct t3_wq wq;
164         spinlock_t lock;
165         atomic_t refcnt;
166         wait_queue_head_t wait;
167         enum IWCH_QP_FLAGS flags;
168         struct timer_list timer;
169 };
170
171 static inline int qp_quiesced(struct iwch_qp *qhp)
172 {
173         return qhp->flags & QP_QUIESCED;
174 }
175
176 static inline struct iwch_qp *to_iwch_qp(struct ib_qp *ibqp)
177 {
178         return container_of(ibqp, struct iwch_qp, ibqp);
179 }
180
181 void iwch_qp_add_ref(struct ib_qp *qp);
182 void iwch_qp_rem_ref(struct ib_qp *qp);
183
184 struct iwch_ucontext {
185         struct ib_ucontext ibucontext;
186         struct cxio_ucontext uctx;
187         u32 key;
188         spinlock_t mmap_lock;
189         struct list_head mmaps;
190 };
191
192 static inline struct iwch_ucontext *to_iwch_ucontext(struct ib_ucontext *c)
193 {
194         return container_of(c, struct iwch_ucontext, ibucontext);
195 }
196
197 struct iwch_mm_entry {
198         struct list_head entry;
199         u64 addr;
200         u32 key;
201         unsigned len;
202 };
203
204 static inline struct iwch_mm_entry *remove_mmap(struct iwch_ucontext *ucontext,
205                                                 u32 key, unsigned len)
206 {
207         struct list_head *pos, *nxt;
208         struct iwch_mm_entry *mm;
209
210         spin_lock(&ucontext->mmap_lock);
211         list_for_each_safe(pos, nxt, &ucontext->mmaps) {
212
213                 mm = list_entry(pos, struct iwch_mm_entry, entry);
214                 if (mm->key == key && mm->len == len) {
215                         list_del_init(&mm->entry);
216                         spin_unlock(&ucontext->mmap_lock);
217                         PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__,
218                              key, (unsigned long long) mm->addr, mm->len);
219                         return mm;
220                 }
221         }
222         spin_unlock(&ucontext->mmap_lock);
223         return NULL;
224 }
225
226 static inline void insert_mmap(struct iwch_ucontext *ucontext,
227                                struct iwch_mm_entry *mm)
228 {
229         spin_lock(&ucontext->mmap_lock);
230         PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__,
231              mm->key, (unsigned long long) mm->addr, mm->len);
232         list_add_tail(&mm->entry, &ucontext->mmaps);
233         spin_unlock(&ucontext->mmap_lock);
234 }
235
236 enum iwch_qp_attr_mask {
237         IWCH_QP_ATTR_NEXT_STATE = 1 << 0,
238         IWCH_QP_ATTR_ENABLE_RDMA_READ = 1 << 7,
239         IWCH_QP_ATTR_ENABLE_RDMA_WRITE = 1 << 8,
240         IWCH_QP_ATTR_ENABLE_RDMA_BIND = 1 << 9,
241         IWCH_QP_ATTR_MAX_ORD = 1 << 11,
242         IWCH_QP_ATTR_MAX_IRD = 1 << 12,
243         IWCH_QP_ATTR_LLP_STREAM_HANDLE = 1 << 22,
244         IWCH_QP_ATTR_STREAM_MSG_BUFFER = 1 << 23,
245         IWCH_QP_ATTR_MPA_ATTR = 1 << 24,
246         IWCH_QP_ATTR_QP_CONTEXT_ACTIVATE = 1 << 25,
247         IWCH_QP_ATTR_VALID_MODIFY = (IWCH_QP_ATTR_ENABLE_RDMA_READ |
248                                      IWCH_QP_ATTR_ENABLE_RDMA_WRITE |
249                                      IWCH_QP_ATTR_MAX_ORD |
250                                      IWCH_QP_ATTR_MAX_IRD |
251                                      IWCH_QP_ATTR_LLP_STREAM_HANDLE |
252                                      IWCH_QP_ATTR_STREAM_MSG_BUFFER |
253                                      IWCH_QP_ATTR_MPA_ATTR |
254                                      IWCH_QP_ATTR_QP_CONTEXT_ACTIVATE)
255 };
256
257 int iwch_modify_qp(struct iwch_dev *rhp,
258                                 struct iwch_qp *qhp,
259                                 enum iwch_qp_attr_mask mask,
260                                 struct iwch_qp_attributes *attrs,
261                                 int internal);
262
263 enum iwch_qp_state {
264         IWCH_QP_STATE_IDLE,
265         IWCH_QP_STATE_RTS,
266         IWCH_QP_STATE_ERROR,
267         IWCH_QP_STATE_TERMINATE,
268         IWCH_QP_STATE_CLOSING,
269         IWCH_QP_STATE_TOT
270 };
271
272 static inline int iwch_convert_state(enum ib_qp_state ib_state)
273 {
274         switch (ib_state) {
275         case IB_QPS_RESET:
276         case IB_QPS_INIT:
277                 return IWCH_QP_STATE_IDLE;
278         case IB_QPS_RTS:
279                 return IWCH_QP_STATE_RTS;
280         case IB_QPS_SQD:
281                 return IWCH_QP_STATE_CLOSING;
282         case IB_QPS_SQE:
283                 return IWCH_QP_STATE_TERMINATE;
284         case IB_QPS_ERR:
285                 return IWCH_QP_STATE_ERROR;
286         default:
287                 return -1;
288         }
289 }
290
291 static inline u32 iwch_ib_to_tpt_access(int acc)
292 {
293         return (acc & IB_ACCESS_REMOTE_WRITE ? TPT_REMOTE_WRITE : 0) |
294                (acc & IB_ACCESS_REMOTE_READ ? TPT_REMOTE_READ : 0) |
295                (acc & IB_ACCESS_LOCAL_WRITE ? TPT_LOCAL_WRITE : 0) |
296                TPT_LOCAL_READ;
297 }
298
299 static inline u32 iwch_ib_to_mwbind_access(int acc)
300 {
301         return (acc & IB_ACCESS_REMOTE_WRITE ? T3_MEM_ACCESS_REM_WRITE : 0) |
302                (acc & IB_ACCESS_REMOTE_READ ? T3_MEM_ACCESS_REM_READ : 0) |
303                (acc & IB_ACCESS_LOCAL_WRITE ? T3_MEM_ACCESS_LOCAL_WRITE : 0) |
304                T3_MEM_ACCESS_LOCAL_READ;
305 }
306
307 enum iwch_mmid_state {
308         IWCH_STAG_STATE_VALID,
309         IWCH_STAG_STATE_INVALID
310 };
311
312 enum iwch_qp_query_flags {
313         IWCH_QP_QUERY_CONTEXT_NONE = 0x0,       /* No ctx; Only attrs */
314         IWCH_QP_QUERY_CONTEXT_GET = 0x1,        /* Get ctx + attrs */
315         IWCH_QP_QUERY_CONTEXT_SUSPEND = 0x2,    /* Not Supported */
316
317         /*
318          * Quiesce QP context; Consumer
319          * will NOT replay outstanding WR
320          */
321         IWCH_QP_QUERY_CONTEXT_QUIESCE = 0x4,
322         IWCH_QP_QUERY_CONTEXT_REMOVE = 0x8,
323         IWCH_QP_QUERY_TEST_USERWRITE = 0x32     /* Test special */
324 };
325
326 u16 iwch_rqes_posted(struct iwch_qp *qhp);
327 int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
328                       struct ib_send_wr **bad_wr);
329 int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
330                       struct ib_recv_wr **bad_wr);
331 int iwch_bind_mw(struct ib_qp *qp,
332                              struct ib_mw *mw,
333                              struct ib_mw_bind *mw_bind);
334 int iwch_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
335 int iwch_post_terminate(struct iwch_qp *qhp, struct respQ_msg_t *rsp_msg);
336 int iwch_post_zb_read(struct iwch_qp *qhp);
337 int iwch_register_device(struct iwch_dev *dev);
338 void iwch_unregister_device(struct iwch_dev *dev);
339 int iwch_quiesce_qps(struct iwch_cq *chp);
340 int iwch_resume_qps(struct iwch_cq *chp);
341 void stop_read_rep_timer(struct iwch_qp *qhp);
342 int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
343                       struct iwch_mr *mhp, int shift);
344 int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,
345                                         struct iwch_mr *mhp,
346                                         int shift,
347                                         int npages);
348 int iwch_alloc_pbl(struct iwch_mr *mhp, int npages);
349 void iwch_free_pbl(struct iwch_mr *mhp);
350 int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset);
351 int build_phys_page_list(struct ib_phys_buf *buffer_list,
352                                         int num_phys_buf,
353                                         u64 *iova_start,
354                                         u64 *total_size,
355                                         int *npages,
356                                         int *shift,
357                                         __be64 **page_list);
358
359
360 #define IWCH_NODE_DESC "cxgb3 Chelsio Communications"
361
362 #endif