Merge branch 'i2c-next-s3c' into i2c-next
[linux-2.6.git] / drivers / i2c / busses / i2c-s3c2410.c
1 /* linux/drivers/i2c/busses/i2c-s3c2410.c
2  *
3  * Copyright (C) 2004,2005 Simtec Electronics
4  *      Ben Dooks <ben@simtec.co.uk>
5  *
6  * S3C2410 I2C Controller
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25
26 #include <linux/i2c.h>
27 #include <linux/i2c-id.h>
28 #include <linux/init.h>
29 #include <linux/time.h>
30 #include <linux/interrupt.h>
31 #include <linux/delay.h>
32 #include <linux/errno.h>
33 #include <linux/err.h>
34 #include <linux/platform_device.h>
35 #include <linux/clk.h>
36 #include <linux/cpufreq.h>
37
38 #include <asm/irq.h>
39 #include <asm/io.h>
40
41 #include <asm/plat-s3c/regs-iic.h>
42 #include <asm/plat-s3c/iic.h>
43
44 /* i2c controller state */
45
46 enum s3c24xx_i2c_state {
47         STATE_IDLE,
48         STATE_START,
49         STATE_READ,
50         STATE_WRITE,
51         STATE_STOP
52 };
53
54 struct s3c24xx_i2c {
55         spinlock_t              lock;
56         wait_queue_head_t       wait;
57
58         struct i2c_msg          *msg;
59         unsigned int            msg_num;
60         unsigned int            msg_idx;
61         unsigned int            msg_ptr;
62
63         unsigned int            tx_setup;
64         unsigned int            irq;
65
66         enum s3c24xx_i2c_state  state;
67         unsigned long           clkrate;
68
69         void __iomem            *regs;
70         struct clk              *clk;
71         struct device           *dev;
72         struct resource         *ioarea;
73         struct i2c_adapter      adap;
74
75 #ifdef CONFIG_CPU_FREQ
76         struct notifier_block   freq_transition;
77 #endif
78 };
79
80 /* default platform data removed, dev should always carry data. */
81
82 /* s3c24xx_i2c_is2440()
83  *
84  * return true is this is an s3c2440
85 */
86
87 static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)
88 {
89         struct platform_device *pdev = to_platform_device(i2c->dev);
90
91         return !strcmp(pdev->name, "s3c2440-i2c");
92 }
93
94 /* s3c24xx_i2c_master_complete
95  *
96  * complete the message and wake up the caller, using the given return code,
97  * or zero to mean ok.
98 */
99
100 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret)
101 {
102         dev_dbg(i2c->dev, "master_complete %d\n", ret);
103
104         i2c->msg_ptr = 0;
105         i2c->msg = NULL;
106         i2c->msg_idx++;
107         i2c->msg_num = 0;
108         if (ret)
109                 i2c->msg_idx = ret;
110
111         wake_up(&i2c->wait);
112 }
113
114 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)
115 {
116         unsigned long tmp;
117
118         tmp = readl(i2c->regs + S3C2410_IICCON);
119         writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
120 }
121
122 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)
123 {
124         unsigned long tmp;
125
126         tmp = readl(i2c->regs + S3C2410_IICCON);
127         writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
128 }
129
130 /* irq enable/disable functions */
131
132 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)
133 {
134         unsigned long tmp;
135
136         tmp = readl(i2c->regs + S3C2410_IICCON);
137         writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
138 }
139
140 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)
141 {
142         unsigned long tmp;
143
144         tmp = readl(i2c->regs + S3C2410_IICCON);
145         writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
146 }
147
148
149 /* s3c24xx_i2c_message_start
150  *
151  * put the start of a message onto the bus
152 */
153
154 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,
155                                       struct i2c_msg *msg)
156 {
157         unsigned int addr = (msg->addr & 0x7f) << 1;
158         unsigned long stat;
159         unsigned long iiccon;
160
161         stat = 0;
162         stat |=  S3C2410_IICSTAT_TXRXEN;
163
164         if (msg->flags & I2C_M_RD) {
165                 stat |= S3C2410_IICSTAT_MASTER_RX;
166                 addr |= 1;
167         } else
168                 stat |= S3C2410_IICSTAT_MASTER_TX;
169
170         if (msg->flags & I2C_M_REV_DIR_ADDR)
171                 addr ^= 1;
172
173         /* todo - check for wether ack wanted or not */
174         s3c24xx_i2c_enable_ack(i2c);
175
176         iiccon = readl(i2c->regs + S3C2410_IICCON);
177         writel(stat, i2c->regs + S3C2410_IICSTAT);
178
179         dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);
180         writeb(addr, i2c->regs + S3C2410_IICDS);
181
182         /* delay here to ensure the data byte has gotten onto the bus
183          * before the transaction is started */
184
185         ndelay(i2c->tx_setup);
186
187         dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);
188         writel(iiccon, i2c->regs + S3C2410_IICCON);
189
190         stat |= S3C2410_IICSTAT_START;
191         writel(stat, i2c->regs + S3C2410_IICSTAT);
192 }
193
194 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret)
195 {
196         unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);
197
198         dev_dbg(i2c->dev, "STOP\n");
199
200         /* stop the transfer */
201         iicstat &= ~S3C2410_IICSTAT_START;
202         writel(iicstat, i2c->regs + S3C2410_IICSTAT);
203
204         i2c->state = STATE_STOP;
205
206         s3c24xx_i2c_master_complete(i2c, ret);
207         s3c24xx_i2c_disable_irq(i2c);
208 }
209
210 /* helper functions to determine the current state in the set of
211  * messages we are sending */
212
213 /* is_lastmsg()
214  *
215  * returns TRUE if the current message is the last in the set
216 */
217
218 static inline int is_lastmsg(struct s3c24xx_i2c *i2c)
219 {
220         return i2c->msg_idx >= (i2c->msg_num - 1);
221 }
222
223 /* is_msglast
224  *
225  * returns TRUE if we this is the last byte in the current message
226 */
227
228 static inline int is_msglast(struct s3c24xx_i2c *i2c)
229 {
230         return i2c->msg_ptr == i2c->msg->len-1;
231 }
232
233 /* is_msgend
234  *
235  * returns TRUE if we reached the end of the current message
236 */
237
238 static inline int is_msgend(struct s3c24xx_i2c *i2c)
239 {
240         return i2c->msg_ptr >= i2c->msg->len;
241 }
242
243 /* i2s_s3c_irq_nextbyte
244  *
245  * process an interrupt and work out what to do
246  */
247
248 static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
249 {
250         unsigned long tmp;
251         unsigned char byte;
252         int ret = 0;
253
254         switch (i2c->state) {
255
256         case STATE_IDLE:
257                 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
258                 goto out;
259                 break;
260
261         case STATE_STOP:
262                 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
263                 s3c24xx_i2c_disable_irq(i2c);
264                 goto out_ack;
265
266         case STATE_START:
267                 /* last thing we did was send a start condition on the
268                  * bus, or started a new i2c message
269                  */
270
271                 if (iicstat & S3C2410_IICSTAT_LASTBIT &&
272                     !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
273                         /* ack was not received... */
274
275                         dev_dbg(i2c->dev, "ack was not received\n");
276                         s3c24xx_i2c_stop(i2c, -ENXIO);
277                         goto out_ack;
278                 }
279
280                 if (i2c->msg->flags & I2C_M_RD)
281                         i2c->state = STATE_READ;
282                 else
283                         i2c->state = STATE_WRITE;
284
285                 /* terminate the transfer if there is nothing to do
286                  * as this is used by the i2c probe to find devices. */
287
288                 if (is_lastmsg(i2c) && i2c->msg->len == 0) {
289                         s3c24xx_i2c_stop(i2c, 0);
290                         goto out_ack;
291                 }
292
293                 if (i2c->state == STATE_READ)
294                         goto prepare_read;
295
296                 /* fall through to the write state, as we will need to
297                  * send a byte as well */
298
299         case STATE_WRITE:
300                 /* we are writing data to the device... check for the
301                  * end of the message, and if so, work out what to do
302                  */
303
304                 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
305                         if (iicstat & S3C2410_IICSTAT_LASTBIT) {
306                                 dev_dbg(i2c->dev, "WRITE: No Ack\n");
307
308                                 s3c24xx_i2c_stop(i2c, -ECONNREFUSED);
309                                 goto out_ack;
310                         }
311                 }
312
313  retry_write:
314
315                 if (!is_msgend(i2c)) {
316                         byte = i2c->msg->buf[i2c->msg_ptr++];
317                         writeb(byte, i2c->regs + S3C2410_IICDS);
318
319                         /* delay after writing the byte to allow the
320                          * data setup time on the bus, as writing the
321                          * data to the register causes the first bit
322                          * to appear on SDA, and SCL will change as
323                          * soon as the interrupt is acknowledged */
324
325                         ndelay(i2c->tx_setup);
326
327                 } else if (!is_lastmsg(i2c)) {
328                         /* we need to go to the next i2c message */
329
330                         dev_dbg(i2c->dev, "WRITE: Next Message\n");
331
332                         i2c->msg_ptr = 0;
333                         i2c->msg_idx++;
334                         i2c->msg++;
335
336                         /* check to see if we need to do another message */
337                         if (i2c->msg->flags & I2C_M_NOSTART) {
338
339                                 if (i2c->msg->flags & I2C_M_RD) {
340                                         /* cannot do this, the controller
341                                          * forces us to send a new START
342                                          * when we change direction */
343
344                                         s3c24xx_i2c_stop(i2c, -EINVAL);
345                                 }
346
347                                 goto retry_write;
348                         } else {
349                                 /* send the new start */
350                                 s3c24xx_i2c_message_start(i2c, i2c->msg);
351                                 i2c->state = STATE_START;
352                         }
353
354                 } else {
355                         /* send stop */
356
357                         s3c24xx_i2c_stop(i2c, 0);
358                 }
359                 break;
360
361         case STATE_READ:
362                 /* we have a byte of data in the data register, do
363                  * something with it, and then work out wether we are
364                  * going to do any more read/write
365                  */
366
367                 byte = readb(i2c->regs + S3C2410_IICDS);
368                 i2c->msg->buf[i2c->msg_ptr++] = byte;
369
370  prepare_read:
371                 if (is_msglast(i2c)) {
372                         /* last byte of buffer */
373
374                         if (is_lastmsg(i2c))
375                                 s3c24xx_i2c_disable_ack(i2c);
376
377                 } else if (is_msgend(i2c)) {
378                         /* ok, we've read the entire buffer, see if there
379                          * is anything else we need to do */
380
381                         if (is_lastmsg(i2c)) {
382                                 /* last message, send stop and complete */
383                                 dev_dbg(i2c->dev, "READ: Send Stop\n");
384
385                                 s3c24xx_i2c_stop(i2c, 0);
386                         } else {
387                                 /* go to the next transfer */
388                                 dev_dbg(i2c->dev, "READ: Next Transfer\n");
389
390                                 i2c->msg_ptr = 0;
391                                 i2c->msg_idx++;
392                                 i2c->msg++;
393                         }
394                 }
395
396                 break;
397         }
398
399         /* acknowlegde the IRQ and get back on with the work */
400
401  out_ack:
402         tmp = readl(i2c->regs + S3C2410_IICCON);
403         tmp &= ~S3C2410_IICCON_IRQPEND;
404         writel(tmp, i2c->regs + S3C2410_IICCON);
405  out:
406         return ret;
407 }
408
409 /* s3c24xx_i2c_irq
410  *
411  * top level IRQ servicing routine
412 */
413
414 static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id)
415 {
416         struct s3c24xx_i2c *i2c = dev_id;
417         unsigned long status;
418         unsigned long tmp;
419
420         status = readl(i2c->regs + S3C2410_IICSTAT);
421
422         if (status & S3C2410_IICSTAT_ARBITR) {
423                 /* deal with arbitration loss */
424                 dev_err(i2c->dev, "deal with arbitration loss\n");
425         }
426
427         if (i2c->state == STATE_IDLE) {
428                 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
429
430                 tmp = readl(i2c->regs + S3C2410_IICCON);
431                 tmp &= ~S3C2410_IICCON_IRQPEND;
432                 writel(tmp, i2c->regs +  S3C2410_IICCON);
433                 goto out;
434         }
435
436         /* pretty much this leaves us with the fact that we've
437          * transmitted or received whatever byte we last sent */
438
439         i2s_s3c_irq_nextbyte(i2c, status);
440
441  out:
442         return IRQ_HANDLED;
443 }
444
445
446 /* s3c24xx_i2c_set_master
447  *
448  * get the i2c bus for a master transaction
449 */
450
451 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
452 {
453         unsigned long iicstat;
454         int timeout = 400;
455
456         while (timeout-- > 0) {
457                 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
458
459                 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))
460                         return 0;
461
462                 msleep(1);
463         }
464
465         return -ETIMEDOUT;
466 }
467
468 /* s3c24xx_i2c_doxfer
469  *
470  * this starts an i2c transfer
471 */
472
473 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c,
474                               struct i2c_msg *msgs, int num)
475 {
476         unsigned long timeout;
477         int ret;
478
479         if (!(readl(i2c->regs + S3C2410_IICCON) & S3C2410_IICCON_IRQEN))
480                 return -EIO;
481
482         ret = s3c24xx_i2c_set_master(i2c);
483         if (ret != 0) {
484                 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
485                 ret = -EAGAIN;
486                 goto out;
487         }
488
489         spin_lock_irq(&i2c->lock);
490
491         i2c->msg     = msgs;
492         i2c->msg_num = num;
493         i2c->msg_ptr = 0;
494         i2c->msg_idx = 0;
495         i2c->state   = STATE_START;
496
497         s3c24xx_i2c_enable_irq(i2c);
498         s3c24xx_i2c_message_start(i2c, msgs);
499         spin_unlock_irq(&i2c->lock);
500
501         timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
502
503         ret = i2c->msg_idx;
504
505         /* having these next two as dev_err() makes life very
506          * noisy when doing an i2cdetect */
507
508         if (timeout == 0)
509                 dev_dbg(i2c->dev, "timeout\n");
510         else if (ret != num)
511                 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
512
513         /* ensure the stop has been through the bus */
514
515         msleep(1);
516
517  out:
518         return ret;
519 }
520
521 /* s3c24xx_i2c_xfer
522  *
523  * first port of call from the i2c bus code when an message needs
524  * transferring across the i2c bus.
525 */
526
527 static int s3c24xx_i2c_xfer(struct i2c_adapter *adap,
528                         struct i2c_msg *msgs, int num)
529 {
530         struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data;
531         int retry;
532         int ret;
533
534         for (retry = 0; retry < adap->retries; retry++) {
535
536                 ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
537
538                 if (ret != -EAGAIN)
539                         return ret;
540
541                 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
542
543                 udelay(100);
544         }
545
546         return -EREMOTEIO;
547 }
548
549 /* declare our i2c functionality */
550 static u32 s3c24xx_i2c_func(struct i2c_adapter *adap)
551 {
552         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
553 }
554
555 /* i2c bus registration info */
556
557 static const struct i2c_algorithm s3c24xx_i2c_algorithm = {
558         .master_xfer            = s3c24xx_i2c_xfer,
559         .functionality          = s3c24xx_i2c_func,
560 };
561
562 /* s3c24xx_i2c_calcdivisor
563  *
564  * return the divisor settings for a given frequency
565 */
566
567 static int s3c24xx_i2c_calcdivisor(unsigned long clkin, unsigned int wanted,
568                                    unsigned int *div1, unsigned int *divs)
569 {
570         unsigned int calc_divs = clkin / wanted;
571         unsigned int calc_div1;
572
573         if (calc_divs > (16*16))
574                 calc_div1 = 512;
575         else
576                 calc_div1 = 16;
577
578         calc_divs += calc_div1-1;
579         calc_divs /= calc_div1;
580
581         if (calc_divs == 0)
582                 calc_divs = 1;
583         if (calc_divs > 17)
584                 calc_divs = 17;
585
586         *divs = calc_divs;
587         *div1 = calc_div1;
588
589         return clkin / (calc_divs * calc_div1);
590 }
591
592 /* freq_acceptable
593  *
594  * test wether a frequency is within the acceptable range of error
595 */
596
597 static inline int freq_acceptable(unsigned int freq, unsigned int wanted)
598 {
599         int diff = freq - wanted;
600
601         return diff >= -2 && diff <= 2;
602 }
603
604 /* s3c24xx_i2c_clockrate
605  *
606  * work out a divisor for the user requested frequency setting,
607  * either by the requested frequency, or scanning the acceptable
608  * range of frequencies until something is found
609 */
610
611 static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)
612 {
613         struct s3c2410_platform_i2c *pdata = i2c->dev->platform_data;
614         unsigned long clkin = clk_get_rate(i2c->clk);
615         unsigned int divs, div1;
616         u32 iiccon;
617         int freq;
618         int start, end;
619
620         i2c->clkrate = clkin;
621         clkin /= 1000;          /* clkin now in KHz */
622
623         dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",
624                  pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);
625
626         if (pdata->bus_freq != 0) {
627                 freq = s3c24xx_i2c_calcdivisor(clkin, pdata->bus_freq/1000,
628                                                &div1, &divs);
629                 if (freq_acceptable(freq, pdata->bus_freq/1000))
630                         goto found;
631         }
632
633         /* ok, we may have to search for something suitable... */
634
635         start = (pdata->max_freq == 0) ? pdata->bus_freq : pdata->max_freq;
636         end = pdata->min_freq;
637
638         start /= 1000;
639         end /= 1000;
640
641         /* search loop... */
642
643         for (; start > end; start--) {
644                 freq = s3c24xx_i2c_calcdivisor(clkin, start, &div1, &divs);
645                 if (freq_acceptable(freq, start))
646                         goto found;
647         }
648
649         /* cannot find frequency spec */
650
651         return -EINVAL;
652
653  found:
654         *got = freq;
655
656         iiccon = readl(i2c->regs + S3C2410_IICCON);
657         iiccon &= ~(S3C2410_IICCON_SCALEMASK | S3C2410_IICCON_TXDIV_512);
658         iiccon |= (divs-1);
659
660         if (div1 == 512)
661                 iiccon |= S3C2410_IICCON_TXDIV_512;
662
663         writel(iiccon, i2c->regs + S3C2410_IICCON);
664
665         return 0;
666 }
667
668 #ifdef CONFIG_CPU_FREQ
669
670 #define freq_to_i2c(_n) container_of(_n, struct s3c24xx_i2c, freq_transition)
671
672 static int s3c24xx_i2c_cpufreq_transition(struct notifier_block *nb,
673                                           unsigned long val, void *data)
674 {
675         struct s3c24xx_i2c *i2c = freq_to_i2c(nb);
676         unsigned long flags;
677         unsigned int got;
678         int delta_f;
679         int ret;
680
681         delta_f = clk_get_rate(i2c->clk) - i2c->clkrate;
682
683         /* if we're post-change and the input clock has slowed down
684          * or at pre-change and the clock is about to speed up, then
685          * adjust our clock rate. <0 is slow, >0 speedup.
686          */
687
688         if ((val == CPUFREQ_POSTCHANGE && delta_f < 0) ||
689             (val == CPUFREQ_PRECHANGE && delta_f > 0)) {
690                 spin_lock_irqsave(&i2c->lock, flags);
691                 ret = s3c24xx_i2c_clockrate(i2c, &got);
692                 spin_unlock_irqrestore(&i2c->lock, flags);
693
694                 if (ret < 0)
695                         dev_err(i2c->dev, "cannot find frequency\n");
696                 else
697                         dev_info(i2c->dev, "setting freq %d\n", got);
698         }
699
700         return 0;
701 }
702
703 static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c)
704 {
705         i2c->freq_transition.notifier_call = s3c24xx_i2c_cpufreq_transition;
706
707         return cpufreq_register_notifier(&i2c->freq_transition,
708                                          CPUFREQ_TRANSITION_NOTIFIER);
709 }
710
711 static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c)
712 {
713         cpufreq_unregister_notifier(&i2c->freq_transition,
714                                     CPUFREQ_TRANSITION_NOTIFIER);
715 }
716
717 #else
718 static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c)
719 {
720         return 0;
721 }
722
723 static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c)
724 {
725 }
726 #endif
727
728 /* s3c24xx_i2c_init
729  *
730  * initialise the controller, set the IO lines and frequency
731 */
732
733 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
734 {
735         unsigned long iicon = S3C2410_IICCON_IRQEN | S3C2410_IICCON_ACKEN;
736         struct s3c2410_platform_i2c *pdata;
737         unsigned int freq;
738
739         /* get the plafrom data */
740
741         pdata = i2c->dev->platform_data;
742
743         /* inititalise the gpio */
744
745         if (pdata->cfg_gpio)
746                 pdata->cfg_gpio(to_platform_device(i2c->dev));
747
748         /* write slave address */
749
750         writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);
751
752         dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
753
754         writel(iicon, i2c->regs + S3C2410_IICCON);
755
756         /* we need to work out the divisors for the clock... */
757
758         if (s3c24xx_i2c_clockrate(i2c, &freq) != 0) {
759                 writel(0, i2c->regs + S3C2410_IICCON);
760                 dev_err(i2c->dev, "cannot meet bus frequency required\n");
761                 return -EINVAL;
762         }
763
764         /* todo - check that the i2c lines aren't being dragged anywhere */
765
766         dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
767         dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
768
769         /* check for s3c2440 i2c controller  */
770
771         if (s3c24xx_i2c_is2440(i2c)) {
772                 dev_dbg(i2c->dev, "S3C2440_IICLC=%08x\n", pdata->sda_delay);
773
774                 writel(pdata->sda_delay, i2c->regs + S3C2440_IICLC);
775         }
776
777         return 0;
778 }
779
780 /* s3c24xx_i2c_probe
781  *
782  * called by the bus driver when a suitable device is found
783 */
784
785 static int s3c24xx_i2c_probe(struct platform_device *pdev)
786 {
787         struct s3c24xx_i2c *i2c;
788         struct s3c2410_platform_i2c *pdata;
789         struct resource *res;
790         int ret;
791
792         pdata = pdev->dev.platform_data;
793         if (!pdata) {
794                 dev_err(&pdev->dev, "no platform data\n");
795                 return -EINVAL;
796         }
797
798         i2c = kzalloc(sizeof(struct s3c24xx_i2c), GFP_KERNEL);
799         if (!i2c) {
800                 dev_err(&pdev->dev, "no memory for state\n");
801                 return -ENOMEM;
802         }
803
804         strlcpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name));
805         i2c->adap.owner   = THIS_MODULE;
806         i2c->adap.algo    = &s3c24xx_i2c_algorithm;
807         i2c->adap.retries = 2;
808         i2c->adap.class   = I2C_CLASS_HWMON | I2C_CLASS_SPD;
809         i2c->tx_setup     = 50;
810
811         spin_lock_init(&i2c->lock);
812         init_waitqueue_head(&i2c->wait);
813
814         /* find the clock and enable it */
815
816         i2c->dev = &pdev->dev;
817         i2c->clk = clk_get(&pdev->dev, "i2c");
818         if (IS_ERR(i2c->clk)) {
819                 dev_err(&pdev->dev, "cannot get clock\n");
820                 ret = -ENOENT;
821                 goto err_noclk;
822         }
823
824         dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
825
826         clk_enable(i2c->clk);
827
828         /* map the registers */
829
830         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
831         if (res == NULL) {
832                 dev_err(&pdev->dev, "cannot find IO resource\n");
833                 ret = -ENOENT;
834                 goto err_clk;
835         }
836
837         i2c->ioarea = request_mem_region(res->start, (res->end-res->start)+1,
838                                          pdev->name);
839
840         if (i2c->ioarea == NULL) {
841                 dev_err(&pdev->dev, "cannot request IO\n");
842                 ret = -ENXIO;
843                 goto err_clk;
844         }
845
846         i2c->regs = ioremap(res->start, (res->end-res->start)+1);
847
848         if (i2c->regs == NULL) {
849                 dev_err(&pdev->dev, "cannot map IO\n");
850                 ret = -ENXIO;
851                 goto err_ioarea;
852         }
853
854         dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",
855                 i2c->regs, i2c->ioarea, res);
856
857         /* setup info block for the i2c core */
858
859         i2c->adap.algo_data = i2c;
860         i2c->adap.dev.parent = &pdev->dev;
861
862         /* initialise the i2c controller */
863
864         ret = s3c24xx_i2c_init(i2c);
865         if (ret != 0)
866                 goto err_iomap;
867
868         /* find the IRQ for this unit (note, this relies on the init call to
869          * ensure no current IRQs pending
870          */
871
872         i2c->irq = ret = platform_get_irq(pdev, 0);
873         if (ret <= 0) {
874                 dev_err(&pdev->dev, "cannot find IRQ\n");
875                 goto err_iomap;
876         }
877
878         ret = request_irq(i2c->irq, s3c24xx_i2c_irq, IRQF_DISABLED,
879                           dev_name(&pdev->dev), i2c);
880
881         if (ret != 0) {
882                 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);
883                 goto err_iomap;
884         }
885
886         ret = s3c24xx_i2c_register_cpufreq(i2c);
887         if (ret < 0) {
888                 dev_err(&pdev->dev, "failed to register cpufreq notifier\n");
889                 goto err_irq;
890         }
891
892         /* Note, previous versions of the driver used i2c_add_adapter()
893          * to add the bus at any number. We now pass the bus number via
894          * the platform data, so if unset it will now default to always
895          * being bus 0.
896          */
897
898         i2c->adap.nr = pdata->bus_num;
899
900         ret = i2c_add_numbered_adapter(&i2c->adap);
901         if (ret < 0) {
902                 dev_err(&pdev->dev, "failed to add bus to i2c core\n");
903                 goto err_cpufreq;
904         }
905
906         platform_set_drvdata(pdev, i2c);
907
908         dev_info(&pdev->dev, "%s: S3C I2C adapter\n", i2c->adap.dev.bus_id);
909         return 0;
910
911  err_cpufreq:
912         s3c24xx_i2c_deregister_cpufreq(i2c);
913
914  err_irq:
915         free_irq(i2c->irq, i2c);
916
917  err_iomap:
918         iounmap(i2c->regs);
919
920  err_ioarea:
921         release_resource(i2c->ioarea);
922         kfree(i2c->ioarea);
923
924  err_clk:
925         clk_disable(i2c->clk);
926         clk_put(i2c->clk);
927
928  err_noclk:
929         kfree(i2c);
930         return ret;
931 }
932
933 /* s3c24xx_i2c_remove
934  *
935  * called when device is removed from the bus
936 */
937
938 static int s3c24xx_i2c_remove(struct platform_device *pdev)
939 {
940         struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
941
942         s3c24xx_i2c_deregister_cpufreq(i2c);
943
944         i2c_del_adapter(&i2c->adap);
945         free_irq(i2c->irq, i2c);
946
947         clk_disable(i2c->clk);
948         clk_put(i2c->clk);
949
950         iounmap(i2c->regs);
951
952         release_resource(i2c->ioarea);
953         kfree(i2c->ioarea);
954         kfree(i2c);
955
956         return 0;
957 }
958
959 #ifdef CONFIG_PM
960 static int s3c24xx_i2c_resume(struct platform_device *dev)
961 {
962         struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
963
964         if (i2c != NULL)
965                 s3c24xx_i2c_init(i2c);
966
967         return 0;
968 }
969
970 #else
971 #define s3c24xx_i2c_resume NULL
972 #endif
973
974 /* device driver for platform bus bits */
975
976 static struct platform_driver s3c2410_i2c_driver = {
977         .probe          = s3c24xx_i2c_probe,
978         .remove         = s3c24xx_i2c_remove,
979         .resume         = s3c24xx_i2c_resume,
980         .driver         = {
981                 .owner  = THIS_MODULE,
982                 .name   = "s3c2410-i2c",
983         },
984 };
985
986 static struct platform_driver s3c2440_i2c_driver = {
987         .probe          = s3c24xx_i2c_probe,
988         .remove         = s3c24xx_i2c_remove,
989         .resume         = s3c24xx_i2c_resume,
990         .driver         = {
991                 .owner  = THIS_MODULE,
992                 .name   = "s3c2440-i2c",
993         },
994 };
995
996 static int __init i2c_adap_s3c_init(void)
997 {
998         int ret;
999
1000         ret = platform_driver_register(&s3c2410_i2c_driver);
1001         if (ret == 0) {
1002                 ret = platform_driver_register(&s3c2440_i2c_driver);
1003                 if (ret)
1004                         platform_driver_unregister(&s3c2410_i2c_driver);
1005         }
1006
1007         return ret;
1008 }
1009
1010 static void __exit i2c_adap_s3c_exit(void)
1011 {
1012         platform_driver_unregister(&s3c2410_i2c_driver);
1013         platform_driver_unregister(&s3c2440_i2c_driver);
1014 }
1015
1016 module_init(i2c_adap_s3c_init);
1017 module_exit(i2c_adap_s3c_exit);
1018
1019 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
1020 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
1021 MODULE_LICENSE("GPL");
1022 MODULE_ALIAS("platform:s3c2410-i2c");
1023 MODULE_ALIAS("platform:s3c2440-i2c");