hwmon: Add Freescale MC13783 ADC driver
[linux-2.6.git] / drivers / hwmon / w83781d.c
1 /*
2     w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3                 monitoring
4     Copyright (c) 1998 - 2001  Frodo Looijaard <frodol@dds.nl>,
5                                Philip Edelbrock <phil@netroedge.com>,
6                                and Mark Studebaker <mdsxyz123@yahoo.com>
7     Copyright (c) 2007 - 2008  Jean Delvare <khali@linux-fr.org>
8
9     This program is free software; you can redistribute it and/or modify
10     it under the terms of the GNU General Public License as published by
11     the Free Software Foundation; either version 2 of the License, or
12     (at your option) any later version.
13
14     This program is distributed in the hope that it will be useful,
15     but WITHOUT ANY WARRANTY; without even the implied warranty of
16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17     GNU General Public License for more details.
18
19     You should have received a copy of the GNU General Public License
20     along with this program; if not, write to the Free Software
21     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 /*
25     Supports following chips:
26
27     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
28     as99127f    7       3       0       3       0x31    0x12c3  yes     no
29     as99127f rev.2 (type_name = as99127f)       0x31    0x5ca3  yes     no
30     w83781d     7       3       0       3       0x10-1  0x5ca3  yes     yes
31     w83782d     9       3       2-4     3       0x30    0x5ca3  yes     yes
32     w83783s     5-6     3       2       1-2     0x40    0x5ca3  yes     no
33
34 */
35
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/slab.h>
39 #include <linux/jiffies.h>
40 #include <linux/i2c.h>
41 #include <linux/hwmon.h>
42 #include <linux/hwmon-vid.h>
43 #include <linux/hwmon-sysfs.h>
44 #include <linux/sysfs.h>
45 #include <linux/err.h>
46 #include <linux/mutex.h>
47
48 #ifdef CONFIG_ISA
49 #include <linux/platform_device.h>
50 #include <linux/ioport.h>
51 #include <linux/io.h>
52 #endif
53
54 #include "lm75.h"
55
56 /* Addresses to scan */
57 static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
58                                                 0x2e, 0x2f, I2C_CLIENT_END };
59 /* Insmod parameters */
60 I2C_CLIENT_INSMOD_4(w83781d, w83782d, w83783s, as99127f);
61
62 static unsigned short force_subclients[4];
63 module_param_array(force_subclients, short, NULL, 0);
64 MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
65                     "{bus, clientaddr, subclientaddr1, subclientaddr2}");
66
67 static int reset;
68 module_param(reset, bool, 0);
69 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
70
71 static int init = 1;
72 module_param(init, bool, 0);
73 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
74
75 /* Constants specified below */
76
77 /* Length of ISA address segment */
78 #define W83781D_EXTENT                  8
79
80 /* Where are the ISA address/data registers relative to the base address */
81 #define W83781D_ADDR_REG_OFFSET         5
82 #define W83781D_DATA_REG_OFFSET         6
83
84 /* The device registers */
85 /* in nr from 0 to 8 */
86 #define W83781D_REG_IN_MAX(nr)          ((nr < 7) ? (0x2b + (nr) * 2) : \
87                                                     (0x554 + (((nr) - 7) * 2)))
88 #define W83781D_REG_IN_MIN(nr)          ((nr < 7) ? (0x2c + (nr) * 2) : \
89                                                     (0x555 + (((nr) - 7) * 2)))
90 #define W83781D_REG_IN(nr)              ((nr < 7) ? (0x20 + (nr)) : \
91                                                     (0x550 + (nr) - 7))
92
93 /* fan nr from 0 to 2 */
94 #define W83781D_REG_FAN_MIN(nr)         (0x3b + (nr))
95 #define W83781D_REG_FAN(nr)             (0x28 + (nr))
96
97 #define W83781D_REG_BANK                0x4E
98 #define W83781D_REG_TEMP2_CONFIG        0x152
99 #define W83781D_REG_TEMP3_CONFIG        0x252
100 /* temp nr from 1 to 3 */
101 #define W83781D_REG_TEMP(nr)            ((nr == 3) ? (0x0250) : \
102                                         ((nr == 2) ? (0x0150) : \
103                                                      (0x27)))
104 #define W83781D_REG_TEMP_HYST(nr)       ((nr == 3) ? (0x253) : \
105                                         ((nr == 2) ? (0x153) : \
106                                                      (0x3A)))
107 #define W83781D_REG_TEMP_OVER(nr)       ((nr == 3) ? (0x255) : \
108                                         ((nr == 2) ? (0x155) : \
109                                                      (0x39)))
110
111 #define W83781D_REG_CONFIG              0x40
112
113 /* Interrupt status (W83781D, AS99127F) */
114 #define W83781D_REG_ALARM1              0x41
115 #define W83781D_REG_ALARM2              0x42
116
117 /* Real-time status (W83782D, W83783S) */
118 #define W83782D_REG_ALARM1              0x459
119 #define W83782D_REG_ALARM2              0x45A
120 #define W83782D_REG_ALARM3              0x45B
121
122 #define W83781D_REG_BEEP_CONFIG         0x4D
123 #define W83781D_REG_BEEP_INTS1          0x56
124 #define W83781D_REG_BEEP_INTS2          0x57
125 #define W83781D_REG_BEEP_INTS3          0x453   /* not on W83781D */
126
127 #define W83781D_REG_VID_FANDIV          0x47
128
129 #define W83781D_REG_CHIPID              0x49
130 #define W83781D_REG_WCHIPID             0x58
131 #define W83781D_REG_CHIPMAN             0x4F
132 #define W83781D_REG_PIN                 0x4B
133
134 /* 782D/783S only */
135 #define W83781D_REG_VBAT                0x5D
136
137 /* PWM 782D (1-4) and 783S (1-2) only */
138 static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
139 #define W83781D_REG_PWMCLK12            0x5C
140 #define W83781D_REG_PWMCLK34            0x45C
141
142 #define W83781D_REG_I2C_ADDR            0x48
143 #define W83781D_REG_I2C_SUBADDR         0x4A
144
145 /* The following are undocumented in the data sheets however we
146    received the information in an email from Winbond tech support */
147 /* Sensor selection - not on 781d */
148 #define W83781D_REG_SCFG1               0x5D
149 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
150
151 #define W83781D_REG_SCFG2               0x59
152 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
153
154 #define W83781D_DEFAULT_BETA            3435
155
156 /* Conversions */
157 #define IN_TO_REG(val)                  SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
158 #define IN_FROM_REG(val)                ((val) * 16)
159
160 static inline u8
161 FAN_TO_REG(long rpm, int div)
162 {
163         if (rpm == 0)
164                 return 255;
165         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
166         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
167 }
168
169 static inline long
170 FAN_FROM_REG(u8 val, int div)
171 {
172         if (val == 0)
173                 return -1;
174         if (val == 255)
175                 return 0;
176         return 1350000 / (val * div);
177 }
178
179 #define TEMP_TO_REG(val)                SENSORS_LIMIT((val) / 1000, -127, 128)
180 #define TEMP_FROM_REG(val)              ((val) * 1000)
181
182 #define BEEP_MASK_FROM_REG(val,type)    ((type) == as99127f ? \
183                                          (~(val)) & 0x7fff : (val) & 0xff7fff)
184 #define BEEP_MASK_TO_REG(val,type)      ((type) == as99127f ? \
185                                          (~(val)) & 0x7fff : (val) & 0xff7fff)
186
187 #define DIV_FROM_REG(val)               (1 << (val))
188
189 static inline u8
190 DIV_TO_REG(long val, enum chips type)
191 {
192         int i;
193         val = SENSORS_LIMIT(val, 1,
194                             ((type == w83781d
195                               || type == as99127f) ? 8 : 128)) >> 1;
196         for (i = 0; i < 7; i++) {
197                 if (val == 0)
198                         break;
199                 val >>= 1;
200         }
201         return i;
202 }
203
204 struct w83781d_data {
205         struct i2c_client *client;
206         struct device *hwmon_dev;
207         struct mutex lock;
208         enum chips type;
209
210         /* For ISA device only */
211         const char *name;
212         int isa_addr;
213
214         struct mutex update_lock;
215         char valid;             /* !=0 if following fields are valid */
216         unsigned long last_updated;     /* In jiffies */
217
218         struct i2c_client *lm75[2];     /* for secondary I2C addresses */
219         /* array of 2 pointers to subclients */
220
221         u8 in[9];               /* Register value - 8 & 9 for 782D only */
222         u8 in_max[9];           /* Register value - 8 & 9 for 782D only */
223         u8 in_min[9];           /* Register value - 8 & 9 for 782D only */
224         u8 fan[3];              /* Register value */
225         u8 fan_min[3];          /* Register value */
226         s8 temp;                /* Register value */
227         s8 temp_max;            /* Register value */
228         s8 temp_max_hyst;       /* Register value */
229         u16 temp_add[2];        /* Register value */
230         u16 temp_max_add[2];    /* Register value */
231         u16 temp_max_hyst_add[2];       /* Register value */
232         u8 fan_div[3];          /* Register encoding, shifted right */
233         u8 vid;                 /* Register encoding, combined */
234         u32 alarms;             /* Register encoding, combined */
235         u32 beep_mask;          /* Register encoding, combined */
236         u8 pwm[4];              /* Register value */
237         u8 pwm2_enable;         /* Boolean */
238         u16 sens[3];            /* 782D/783S only.
239                                    1 = pentium diode; 2 = 3904 diode;
240                                    4 = thermistor */
241         u8 vrm;
242 };
243
244 static struct w83781d_data *w83781d_data_if_isa(void);
245 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
246
247 static int w83781d_read_value(struct w83781d_data *data, u16 reg);
248 static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
249 static struct w83781d_data *w83781d_update_device(struct device *dev);
250 static void w83781d_init_device(struct device *dev);
251
252 /* following are the sysfs callback functions */
253 #define show_in_reg(reg) \
254 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
255                 char *buf) \
256 { \
257         struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
258         struct w83781d_data *data = w83781d_update_device(dev); \
259         return sprintf(buf, "%ld\n", \
260                        (long)IN_FROM_REG(data->reg[attr->index])); \
261 }
262 show_in_reg(in);
263 show_in_reg(in_min);
264 show_in_reg(in_max);
265
266 #define store_in_reg(REG, reg) \
267 static ssize_t store_in_##reg (struct device *dev, struct device_attribute \
268                 *da, const char *buf, size_t count) \
269 { \
270         struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
271         struct w83781d_data *data = dev_get_drvdata(dev); \
272         int nr = attr->index; \
273         u32 val; \
274          \
275         val = simple_strtoul(buf, NULL, 10); \
276          \
277         mutex_lock(&data->update_lock); \
278         data->in_##reg[nr] = IN_TO_REG(val); \
279         w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
280          \
281         mutex_unlock(&data->update_lock); \
282         return count; \
283 }
284 store_in_reg(MIN, min);
285 store_in_reg(MAX, max);
286
287 #define sysfs_in_offsets(offset) \
288 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
289                 show_in, NULL, offset); \
290 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
291                 show_in_min, store_in_min, offset); \
292 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
293                 show_in_max, store_in_max, offset)
294
295 sysfs_in_offsets(0);
296 sysfs_in_offsets(1);
297 sysfs_in_offsets(2);
298 sysfs_in_offsets(3);
299 sysfs_in_offsets(4);
300 sysfs_in_offsets(5);
301 sysfs_in_offsets(6);
302 sysfs_in_offsets(7);
303 sysfs_in_offsets(8);
304
305 #define show_fan_reg(reg) \
306 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
307                 char *buf) \
308 { \
309         struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
310         struct w83781d_data *data = w83781d_update_device(dev); \
311         return sprintf(buf,"%ld\n", \
312                 FAN_FROM_REG(data->reg[attr->index], \
313                         DIV_FROM_REG(data->fan_div[attr->index]))); \
314 }
315 show_fan_reg(fan);
316 show_fan_reg(fan_min);
317
318 static ssize_t
319 store_fan_min(struct device *dev, struct device_attribute *da,
320                 const char *buf, size_t count)
321 {
322         struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
323         struct w83781d_data *data = dev_get_drvdata(dev);
324         int nr = attr->index;
325         u32 val;
326
327         val = simple_strtoul(buf, NULL, 10);
328
329         mutex_lock(&data->update_lock);
330         data->fan_min[nr] =
331             FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
332         w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
333                             data->fan_min[nr]);
334
335         mutex_unlock(&data->update_lock);
336         return count;
337 }
338
339 static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
340 static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
341                 show_fan_min, store_fan_min, 0);
342 static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
343 static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
344                 show_fan_min, store_fan_min, 1);
345 static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
346 static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
347                 show_fan_min, store_fan_min, 2);
348
349 #define show_temp_reg(reg) \
350 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
351                 char *buf) \
352 { \
353         struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
354         struct w83781d_data *data = w83781d_update_device(dev); \
355         int nr = attr->index; \
356         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
357                 return sprintf(buf,"%d\n", \
358                         LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
359         } else {        /* TEMP1 */ \
360                 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
361         } \
362 }
363 show_temp_reg(temp);
364 show_temp_reg(temp_max);
365 show_temp_reg(temp_max_hyst);
366
367 #define store_temp_reg(REG, reg) \
368 static ssize_t store_temp_##reg (struct device *dev, \
369                 struct device_attribute *da, const char *buf, size_t count) \
370 { \
371         struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
372         struct w83781d_data *data = dev_get_drvdata(dev); \
373         int nr = attr->index; \
374         long val; \
375          \
376         val = simple_strtol(buf, NULL, 10); \
377          \
378         mutex_lock(&data->update_lock); \
379          \
380         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
381                 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
382                 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
383                                 data->temp_##reg##_add[nr-2]); \
384         } else {        /* TEMP1 */ \
385                 data->temp_##reg = TEMP_TO_REG(val); \
386                 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
387                         data->temp_##reg); \
388         } \
389          \
390         mutex_unlock(&data->update_lock); \
391         return count; \
392 }
393 store_temp_reg(OVER, max);
394 store_temp_reg(HYST, max_hyst);
395
396 #define sysfs_temp_offsets(offset) \
397 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
398                 show_temp, NULL, offset); \
399 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
400                 show_temp_max, store_temp_max, offset); \
401 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
402                 show_temp_max_hyst, store_temp_max_hyst, offset);
403
404 sysfs_temp_offsets(1);
405 sysfs_temp_offsets(2);
406 sysfs_temp_offsets(3);
407
408 static ssize_t
409 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
410 {
411         struct w83781d_data *data = w83781d_update_device(dev);
412         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
413 }
414
415 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
416
417 static ssize_t
418 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
419 {
420         struct w83781d_data *data = dev_get_drvdata(dev);
421         return sprintf(buf, "%ld\n", (long) data->vrm);
422 }
423
424 static ssize_t
425 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
426 {
427         struct w83781d_data *data = dev_get_drvdata(dev);
428         u32 val;
429
430         val = simple_strtoul(buf, NULL, 10);
431         data->vrm = val;
432
433         return count;
434 }
435
436 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
437
438 static ssize_t
439 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
440 {
441         struct w83781d_data *data = w83781d_update_device(dev);
442         return sprintf(buf, "%u\n", data->alarms);
443 }
444
445 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
446
447 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
448                 char *buf)
449 {
450         struct w83781d_data *data = w83781d_update_device(dev);
451         int bitnr = to_sensor_dev_attr(attr)->index;
452         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
453 }
454
455 /* The W83781D has a single alarm bit for temp2 and temp3 */
456 static ssize_t show_temp3_alarm(struct device *dev,
457                 struct device_attribute *attr, char *buf)
458 {
459         struct w83781d_data *data = w83781d_update_device(dev);
460         int bitnr = (data->type == w83781d) ? 5 : 13;
461         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
462 }
463
464 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
465 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
466 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
467 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
468 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
469 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
470 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
471 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
472 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
473 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
474 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
475 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
476 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
477 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
478 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
479
480 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
481 {
482         struct w83781d_data *data = w83781d_update_device(dev);
483         return sprintf(buf, "%ld\n",
484                        (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
485 }
486
487 static ssize_t
488 store_beep_mask(struct device *dev, struct device_attribute *attr,
489                 const char *buf, size_t count)
490 {
491         struct w83781d_data *data = dev_get_drvdata(dev);
492         u32 val;
493
494         val = simple_strtoul(buf, NULL, 10);
495
496         mutex_lock(&data->update_lock);
497         data->beep_mask &= 0x8000; /* preserve beep enable */
498         data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
499         w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
500                             data->beep_mask & 0xff);
501         w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
502                             (data->beep_mask >> 8) & 0xff);
503         if (data->type != w83781d && data->type != as99127f) {
504                 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
505                                     ((data->beep_mask) >> 16) & 0xff);
506         }
507         mutex_unlock(&data->update_lock);
508
509         return count;
510 }
511
512 static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
513                 show_beep_mask, store_beep_mask);
514
515 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
516                 char *buf)
517 {
518         struct w83781d_data *data = w83781d_update_device(dev);
519         int bitnr = to_sensor_dev_attr(attr)->index;
520         return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
521 }
522
523 static ssize_t
524 store_beep(struct device *dev, struct device_attribute *attr,
525                 const char *buf, size_t count)
526 {
527         struct w83781d_data *data = dev_get_drvdata(dev);
528         int bitnr = to_sensor_dev_attr(attr)->index;
529         unsigned long bit;
530         u8 reg;
531
532         bit = simple_strtoul(buf, NULL, 10);
533         if (bit & ~1)
534                 return -EINVAL;
535
536         mutex_lock(&data->update_lock);
537         if (bit)
538                 data->beep_mask |= (1 << bitnr);
539         else
540                 data->beep_mask &= ~(1 << bitnr);
541
542         if (bitnr < 8) {
543                 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
544                 if (bit)
545                         reg |= (1 << bitnr);
546                 else
547                         reg &= ~(1 << bitnr);
548                 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
549         } else if (bitnr < 16) {
550                 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
551                 if (bit)
552                         reg |= (1 << (bitnr - 8));
553                 else
554                         reg &= ~(1 << (bitnr - 8));
555                 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
556         } else {
557                 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
558                 if (bit)
559                         reg |= (1 << (bitnr - 16));
560                 else
561                         reg &= ~(1 << (bitnr - 16));
562                 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
563         }
564         mutex_unlock(&data->update_lock);
565
566         return count;
567 }
568
569 /* The W83781D has a single beep bit for temp2 and temp3 */
570 static ssize_t show_temp3_beep(struct device *dev,
571                 struct device_attribute *attr, char *buf)
572 {
573         struct w83781d_data *data = w83781d_update_device(dev);
574         int bitnr = (data->type == w83781d) ? 5 : 13;
575         return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
576 }
577
578 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
579                         show_beep, store_beep, 0);
580 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
581                         show_beep, store_beep, 1);
582 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
583                         show_beep, store_beep, 2);
584 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
585                         show_beep, store_beep, 3);
586 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
587                         show_beep, store_beep, 8);
588 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
589                         show_beep, store_beep, 9);
590 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
591                         show_beep, store_beep, 10);
592 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
593                         show_beep, store_beep, 16);
594 static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
595                         show_beep, store_beep, 17);
596 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
597                         show_beep, store_beep, 6);
598 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
599                         show_beep, store_beep, 7);
600 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
601                         show_beep, store_beep, 11);
602 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
603                         show_beep, store_beep, 4);
604 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
605                         show_beep, store_beep, 5);
606 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
607                         show_temp3_beep, store_beep, 13);
608 static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
609                         show_beep, store_beep, 15);
610
611 static ssize_t
612 show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
613 {
614         struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
615         struct w83781d_data *data = w83781d_update_device(dev);
616         return sprintf(buf, "%ld\n",
617                        (long) DIV_FROM_REG(data->fan_div[attr->index]));
618 }
619
620 /* Note: we save and restore the fan minimum here, because its value is
621    determined in part by the fan divisor.  This follows the principle of
622    least surprise; the user doesn't expect the fan minimum to change just
623    because the divisor changed. */
624 static ssize_t
625 store_fan_div(struct device *dev, struct device_attribute *da,
626                 const char *buf, size_t count)
627 {
628         struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
629         struct w83781d_data *data = dev_get_drvdata(dev);
630         unsigned long min;
631         int nr = attr->index;
632         u8 reg;
633         unsigned long val = simple_strtoul(buf, NULL, 10);
634
635         mutex_lock(&data->update_lock);
636
637         /* Save fan_min */
638         min = FAN_FROM_REG(data->fan_min[nr],
639                            DIV_FROM_REG(data->fan_div[nr]));
640
641         data->fan_div[nr] = DIV_TO_REG(val, data->type);
642
643         reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
644                & (nr==0 ? 0xcf : 0x3f))
645             | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
646         w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
647
648         /* w83781d and as99127f don't have extended divisor bits */
649         if (data->type != w83781d && data->type != as99127f) {
650                 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
651                        & ~(1 << (5 + nr)))
652                     | ((data->fan_div[nr] & 0x04) << (3 + nr));
653                 w83781d_write_value(data, W83781D_REG_VBAT, reg);
654         }
655
656         /* Restore fan_min */
657         data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
658         w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
659
660         mutex_unlock(&data->update_lock);
661         return count;
662 }
663
664 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
665                 show_fan_div, store_fan_div, 0);
666 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
667                 show_fan_div, store_fan_div, 1);
668 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
669                 show_fan_div, store_fan_div, 2);
670
671 static ssize_t
672 show_pwm(struct device *dev, struct device_attribute *da, char *buf)
673 {
674         struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
675         struct w83781d_data *data = w83781d_update_device(dev);
676         return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
677 }
678
679 static ssize_t
680 show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
681 {
682         struct w83781d_data *data = w83781d_update_device(dev);
683         return sprintf(buf, "%d\n", (int)data->pwm2_enable);
684 }
685
686 static ssize_t
687 store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
688                 size_t count)
689 {
690         struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
691         struct w83781d_data *data = dev_get_drvdata(dev);
692         int nr = attr->index;
693         u32 val;
694
695         val = simple_strtoul(buf, NULL, 10);
696
697         mutex_lock(&data->update_lock);
698         data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
699         w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
700         mutex_unlock(&data->update_lock);
701         return count;
702 }
703
704 static ssize_t
705 store_pwm2_enable(struct device *dev, struct device_attribute *da,
706                 const char *buf, size_t count)
707 {
708         struct w83781d_data *data = dev_get_drvdata(dev);
709         u32 val, reg;
710
711         val = simple_strtoul(buf, NULL, 10);
712
713         mutex_lock(&data->update_lock);
714
715         switch (val) {
716         case 0:
717         case 1:
718                 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
719                 w83781d_write_value(data, W83781D_REG_PWMCLK12,
720                                     (reg & 0xf7) | (val << 3));
721
722                 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
723                 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
724                                     (reg & 0xef) | (!val << 4));
725
726                 data->pwm2_enable = val;
727                 break;
728
729         default:
730                 mutex_unlock(&data->update_lock);
731                 return -EINVAL;
732         }
733
734         mutex_unlock(&data->update_lock);
735         return count;
736 }
737
738 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
739 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
740 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
741 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
742 /* only PWM2 can be enabled/disabled */
743 static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
744                 show_pwm2_enable, store_pwm2_enable);
745
746 static ssize_t
747 show_sensor(struct device *dev, struct device_attribute *da, char *buf)
748 {
749         struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
750         struct w83781d_data *data = w83781d_update_device(dev);
751         return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
752 }
753
754 static ssize_t
755 store_sensor(struct device *dev, struct device_attribute *da,
756                 const char *buf, size_t count)
757 {
758         struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
759         struct w83781d_data *data = dev_get_drvdata(dev);
760         int nr = attr->index;
761         u32 val, tmp;
762
763         val = simple_strtoul(buf, NULL, 10);
764
765         mutex_lock(&data->update_lock);
766
767         switch (val) {
768         case 1:         /* PII/Celeron diode */
769                 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
770                 w83781d_write_value(data, W83781D_REG_SCFG1,
771                                     tmp | BIT_SCFG1[nr]);
772                 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
773                 w83781d_write_value(data, W83781D_REG_SCFG2,
774                                     tmp | BIT_SCFG2[nr]);
775                 data->sens[nr] = val;
776                 break;
777         case 2:         /* 3904 */
778                 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
779                 w83781d_write_value(data, W83781D_REG_SCFG1,
780                                     tmp | BIT_SCFG1[nr]);
781                 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
782                 w83781d_write_value(data, W83781D_REG_SCFG2,
783                                     tmp & ~BIT_SCFG2[nr]);
784                 data->sens[nr] = val;
785                 break;
786         case W83781D_DEFAULT_BETA:
787                 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
788                          "instead\n", W83781D_DEFAULT_BETA);
789                 /* fall through */
790         case 4:         /* thermistor */
791                 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
792                 w83781d_write_value(data, W83781D_REG_SCFG1,
793                                     tmp & ~BIT_SCFG1[nr]);
794                 data->sens[nr] = val;
795                 break;
796         default:
797                 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
798                        (long) val);
799                 break;
800         }
801
802         mutex_unlock(&data->update_lock);
803         return count;
804 }
805
806 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
807         show_sensor, store_sensor, 0);
808 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
809         show_sensor, store_sensor, 1);
810 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
811         show_sensor, store_sensor, 2);
812
813 /* Assumes that adapter is of I2C, not ISA variety.
814  * OTHERWISE DON'T CALL THIS
815  */
816 static int
817 w83781d_detect_subclients(struct i2c_client *new_client)
818 {
819         int i, val1 = 0, id;
820         int err;
821         int address = new_client->addr;
822         unsigned short sc_addr[2];
823         struct i2c_adapter *adapter = new_client->adapter;
824         struct w83781d_data *data = i2c_get_clientdata(new_client);
825         enum chips kind = data->type;
826
827         id = i2c_adapter_id(adapter);
828
829         if (force_subclients[0] == id && force_subclients[1] == address) {
830                 for (i = 2; i <= 3; i++) {
831                         if (force_subclients[i] < 0x48 ||
832                             force_subclients[i] > 0x4f) {
833                                 dev_err(&new_client->dev, "Invalid subclient "
834                                         "address %d; must be 0x48-0x4f\n",
835                                         force_subclients[i]);
836                                 err = -EINVAL;
837                                 goto ERROR_SC_1;
838                         }
839                 }
840                 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
841                                 (force_subclients[2] & 0x07) |
842                                 ((force_subclients[3] & 0x07) << 4));
843                 sc_addr[0] = force_subclients[2];
844         } else {
845                 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
846                 sc_addr[0] = 0x48 + (val1 & 0x07);
847         }
848
849         if (kind != w83783s) {
850                 if (force_subclients[0] == id &&
851                     force_subclients[1] == address) {
852                         sc_addr[1] = force_subclients[3];
853                 } else {
854                         sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
855                 }
856                 if (sc_addr[0] == sc_addr[1]) {
857                         dev_err(&new_client->dev,
858                                "Duplicate addresses 0x%x for subclients.\n",
859                                sc_addr[0]);
860                         err = -EBUSY;
861                         goto ERROR_SC_2;
862                 }
863         }
864
865         for (i = 0; i <= 1; i++) {
866                 data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]);
867                 if (!data->lm75[i]) {
868                         dev_err(&new_client->dev, "Subclient %d "
869                                 "registration at address 0x%x "
870                                 "failed.\n", i, sc_addr[i]);
871                         err = -ENOMEM;
872                         if (i == 1)
873                                 goto ERROR_SC_3;
874                         goto ERROR_SC_2;
875                 }
876                 if (kind == w83783s)
877                         break;
878         }
879
880         return 0;
881
882 /* Undo inits in case of errors */
883 ERROR_SC_3:
884         i2c_unregister_device(data->lm75[0]);
885 ERROR_SC_2:
886 ERROR_SC_1:
887         return err;
888 }
889
890 #define IN_UNIT_ATTRS(X)                                        \
891         &sensor_dev_attr_in##X##_input.dev_attr.attr,           \
892         &sensor_dev_attr_in##X##_min.dev_attr.attr,             \
893         &sensor_dev_attr_in##X##_max.dev_attr.attr,             \
894         &sensor_dev_attr_in##X##_alarm.dev_attr.attr,           \
895         &sensor_dev_attr_in##X##_beep.dev_attr.attr
896
897 #define FAN_UNIT_ATTRS(X)                                       \
898         &sensor_dev_attr_fan##X##_input.dev_attr.attr,          \
899         &sensor_dev_attr_fan##X##_min.dev_attr.attr,            \
900         &sensor_dev_attr_fan##X##_div.dev_attr.attr,            \
901         &sensor_dev_attr_fan##X##_alarm.dev_attr.attr,          \
902         &sensor_dev_attr_fan##X##_beep.dev_attr.attr
903
904 #define TEMP_UNIT_ATTRS(X)                                      \
905         &sensor_dev_attr_temp##X##_input.dev_attr.attr,         \
906         &sensor_dev_attr_temp##X##_max.dev_attr.attr,           \
907         &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr,      \
908         &sensor_dev_attr_temp##X##_alarm.dev_attr.attr,         \
909         &sensor_dev_attr_temp##X##_beep.dev_attr.attr
910
911 static struct attribute* w83781d_attributes[] = {
912         IN_UNIT_ATTRS(0),
913         IN_UNIT_ATTRS(2),
914         IN_UNIT_ATTRS(3),
915         IN_UNIT_ATTRS(4),
916         IN_UNIT_ATTRS(5),
917         IN_UNIT_ATTRS(6),
918         FAN_UNIT_ATTRS(1),
919         FAN_UNIT_ATTRS(2),
920         FAN_UNIT_ATTRS(3),
921         TEMP_UNIT_ATTRS(1),
922         TEMP_UNIT_ATTRS(2),
923         &dev_attr_cpu0_vid.attr,
924         &dev_attr_vrm.attr,
925         &dev_attr_alarms.attr,
926         &dev_attr_beep_mask.attr,
927         &sensor_dev_attr_beep_enable.dev_attr.attr,
928         NULL
929 };
930 static const struct attribute_group w83781d_group = {
931         .attrs = w83781d_attributes,
932 };
933
934 static struct attribute *w83781d_attributes_opt[] = {
935         IN_UNIT_ATTRS(1),
936         IN_UNIT_ATTRS(7),
937         IN_UNIT_ATTRS(8),
938         TEMP_UNIT_ATTRS(3),
939         &sensor_dev_attr_pwm1.dev_attr.attr,
940         &sensor_dev_attr_pwm2.dev_attr.attr,
941         &sensor_dev_attr_pwm3.dev_attr.attr,
942         &sensor_dev_attr_pwm4.dev_attr.attr,
943         &dev_attr_pwm2_enable.attr,
944         &sensor_dev_attr_temp1_type.dev_attr.attr,
945         &sensor_dev_attr_temp2_type.dev_attr.attr,
946         &sensor_dev_attr_temp3_type.dev_attr.attr,
947         NULL
948 };
949 static const struct attribute_group w83781d_group_opt = {
950         .attrs = w83781d_attributes_opt,
951 };
952
953 /* No clean up is done on error, it's up to the caller */
954 static int
955 w83781d_create_files(struct device *dev, int kind, int is_isa)
956 {
957         int err;
958
959         if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
960                 return err;
961
962         if (kind != w83783s) {
963                 if ((err = device_create_file(dev,
964                                 &sensor_dev_attr_in1_input.dev_attr))
965                     || (err = device_create_file(dev,
966                                 &sensor_dev_attr_in1_min.dev_attr))
967                     || (err = device_create_file(dev,
968                                 &sensor_dev_attr_in1_max.dev_attr))
969                     || (err = device_create_file(dev,
970                                 &sensor_dev_attr_in1_alarm.dev_attr))
971                     || (err = device_create_file(dev,
972                                 &sensor_dev_attr_in1_beep.dev_attr)))
973                         return err;
974         }
975         if (kind != as99127f && kind != w83781d && kind != w83783s) {
976                 if ((err = device_create_file(dev,
977                                 &sensor_dev_attr_in7_input.dev_attr))
978                     || (err = device_create_file(dev,
979                                 &sensor_dev_attr_in7_min.dev_attr))
980                     || (err = device_create_file(dev,
981                                 &sensor_dev_attr_in7_max.dev_attr))
982                     || (err = device_create_file(dev,
983                                 &sensor_dev_attr_in7_alarm.dev_attr))
984                     || (err = device_create_file(dev,
985                                 &sensor_dev_attr_in7_beep.dev_attr))
986                     || (err = device_create_file(dev,
987                                 &sensor_dev_attr_in8_input.dev_attr))
988                     || (err = device_create_file(dev,
989                                 &sensor_dev_attr_in8_min.dev_attr))
990                     || (err = device_create_file(dev,
991                                 &sensor_dev_attr_in8_max.dev_attr))
992                     || (err = device_create_file(dev,
993                                 &sensor_dev_attr_in8_alarm.dev_attr))
994                     || (err = device_create_file(dev,
995                                 &sensor_dev_attr_in8_beep.dev_attr)))
996                         return err;
997         }
998         if (kind != w83783s) {
999                 if ((err = device_create_file(dev,
1000                                 &sensor_dev_attr_temp3_input.dev_attr))
1001                     || (err = device_create_file(dev,
1002                                 &sensor_dev_attr_temp3_max.dev_attr))
1003                     || (err = device_create_file(dev,
1004                                 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1005                     || (err = device_create_file(dev,
1006                                 &sensor_dev_attr_temp3_alarm.dev_attr))
1007                     || (err = device_create_file(dev,
1008                                 &sensor_dev_attr_temp3_beep.dev_attr)))
1009                         return err;
1010
1011                 if (kind != w83781d) {
1012                         err = sysfs_chmod_file(&dev->kobj,
1013                                 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1014                                 S_IRUGO | S_IWUSR);
1015                         if (err)
1016                                 return err;
1017                 }
1018         }
1019
1020         if (kind != w83781d && kind != as99127f) {
1021                 if ((err = device_create_file(dev,
1022                                 &sensor_dev_attr_pwm1.dev_attr))
1023                     || (err = device_create_file(dev,
1024                                 &sensor_dev_attr_pwm2.dev_attr))
1025                     || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1026                         return err;
1027         }
1028         if (kind == w83782d && !is_isa) {
1029                 if ((err = device_create_file(dev,
1030                                 &sensor_dev_attr_pwm3.dev_attr))
1031                     || (err = device_create_file(dev,
1032                                 &sensor_dev_attr_pwm4.dev_attr)))
1033                         return err;
1034         }
1035
1036         if (kind != as99127f && kind != w83781d) {
1037                 if ((err = device_create_file(dev,
1038                                 &sensor_dev_attr_temp1_type.dev_attr))
1039                     || (err = device_create_file(dev,
1040                                 &sensor_dev_attr_temp2_type.dev_attr)))
1041                         return err;
1042                 if (kind != w83783s) {
1043                         if ((err = device_create_file(dev,
1044                                         &sensor_dev_attr_temp3_type.dev_attr)))
1045                                 return err;
1046                 }
1047         }
1048
1049         return 0;
1050 }
1051
1052 /* Return 0 if detection is successful, -ENODEV otherwise */
1053 static int
1054 w83781d_detect(struct i2c_client *client, int kind,
1055                struct i2c_board_info *info)
1056 {
1057         int val1, val2;
1058         struct w83781d_data *isa = w83781d_data_if_isa();
1059         struct i2c_adapter *adapter = client->adapter;
1060         int address = client->addr;
1061         const char *client_name;
1062         enum vendor { winbond, asus } vendid;
1063
1064         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1065                 return -ENODEV;
1066
1067         /* We block updates of the ISA device to minimize the risk of
1068            concurrent access to the same W83781D chip through different
1069            interfaces. */
1070         if (isa)
1071                 mutex_lock(&isa->update_lock);
1072
1073         if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
1074                 dev_dbg(&adapter->dev,
1075                         "Detection of w83781d chip failed at step 3\n");
1076                 goto err_nodev;
1077         }
1078
1079         val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
1080         val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1081         /* Check for Winbond or Asus ID if in bank 0 */
1082         if (!(val1 & 0x07) &&
1083             ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
1084              ( (val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
1085                 dev_dbg(&adapter->dev,
1086                         "Detection of w83781d chip failed at step 4\n");
1087                 goto err_nodev;
1088         }
1089         /* If Winbond SMBus, check address at 0x48.
1090            Asus doesn't support, except for as99127f rev.2 */
1091         if ((!(val1 & 0x80) && val2 == 0xa3) ||
1092             ( (val1 & 0x80) && val2 == 0x5c)) {
1093                 if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
1094                     != address) {
1095                         dev_dbg(&adapter->dev,
1096                                 "Detection of w83781d chip failed at step 5\n");
1097                         goto err_nodev;
1098                 }
1099         }
1100
1101         /* Put it now into bank 0 and Vendor ID High Byte */
1102         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1103                 (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
1104                  & 0x78) | 0x80);
1105
1106         /* Get the vendor ID */
1107         val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1108         if (val2 == 0x5c)
1109                 vendid = winbond;
1110         else if (val2 == 0x12)
1111                 vendid = asus;
1112         else {
1113                 dev_dbg(&adapter->dev,
1114                         "w83781d chip vendor is neither Winbond nor Asus\n");
1115                 goto err_nodev;
1116         }
1117
1118         /* Determine the chip type. */
1119         val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
1120         if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1121                 client_name = "w83781d";
1122         else if (val1 == 0x30 && vendid == winbond)
1123                 client_name = "w83782d";
1124         else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1125                 client_name = "w83783s";
1126         else if (val1 == 0x31)
1127                 client_name = "as99127f";
1128         else
1129                 goto err_nodev;
1130
1131         if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
1132                 dev_dbg(&adapter->dev, "Device at 0x%02x appears to "
1133                         "be the same as ISA device\n", address);
1134                 goto err_nodev;
1135         }
1136
1137         if (isa)
1138                 mutex_unlock(&isa->update_lock);
1139
1140         strlcpy(info->type, client_name, I2C_NAME_SIZE);
1141
1142         return 0;
1143
1144  err_nodev:
1145         if (isa)
1146                 mutex_unlock(&isa->update_lock);
1147         return -ENODEV;
1148 }
1149
1150 static int
1151 w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id)
1152 {
1153         struct device *dev = &client->dev;
1154         struct w83781d_data *data;
1155         int err;
1156
1157         data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
1158         if (!data) {
1159                 err = -ENOMEM;
1160                 goto ERROR1;
1161         }
1162
1163         i2c_set_clientdata(client, data);
1164         mutex_init(&data->lock);
1165         mutex_init(&data->update_lock);
1166
1167         data->type = id->driver_data;
1168         data->client = client;
1169
1170         /* attach secondary i2c lm75-like clients */
1171         err = w83781d_detect_subclients(client);
1172         if (err)
1173                 goto ERROR3;
1174
1175         /* Initialize the chip */
1176         w83781d_init_device(dev);
1177
1178         /* Register sysfs hooks */
1179         err = w83781d_create_files(dev, data->type, 0);
1180         if (err)
1181                 goto ERROR4;
1182
1183         data->hwmon_dev = hwmon_device_register(dev);
1184         if (IS_ERR(data->hwmon_dev)) {
1185                 err = PTR_ERR(data->hwmon_dev);
1186                 goto ERROR4;
1187         }
1188
1189         return 0;
1190
1191 ERROR4:
1192         sysfs_remove_group(&dev->kobj, &w83781d_group);
1193         sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1194
1195         if (data->lm75[0])
1196                 i2c_unregister_device(data->lm75[0]);
1197         if (data->lm75[1])
1198                 i2c_unregister_device(data->lm75[1]);
1199 ERROR3:
1200         i2c_set_clientdata(client, NULL);
1201         kfree(data);
1202 ERROR1:
1203         return err;
1204 }
1205
1206 static int
1207 w83781d_remove(struct i2c_client *client)
1208 {
1209         struct w83781d_data *data = i2c_get_clientdata(client);
1210         struct device *dev = &client->dev;
1211
1212         hwmon_device_unregister(data->hwmon_dev);
1213
1214         sysfs_remove_group(&dev->kobj, &w83781d_group);
1215         sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1216
1217         if (data->lm75[0])
1218                 i2c_unregister_device(data->lm75[0]);
1219         if (data->lm75[1])
1220                 i2c_unregister_device(data->lm75[1]);
1221
1222         i2c_set_clientdata(client, NULL);
1223         kfree(data);
1224
1225         return 0;
1226 }
1227
1228 static int
1229 w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
1230 {
1231         struct i2c_client *client = data->client;
1232         int res, bank;
1233         struct i2c_client *cl;
1234
1235         bank = (reg >> 8) & 0x0f;
1236         if (bank > 2)
1237                 /* switch banks */
1238                 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1239                                           bank);
1240         if (bank == 0 || bank > 2) {
1241                 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1242         } else {
1243                 /* switch to subclient */
1244                 cl = data->lm75[bank - 1];
1245                 /* convert from ISA to LM75 I2C addresses */
1246                 switch (reg & 0xff) {
1247                 case 0x50:      /* TEMP */
1248                         res = swab16(i2c_smbus_read_word_data(cl, 0));
1249                         break;
1250                 case 0x52:      /* CONFIG */
1251                         res = i2c_smbus_read_byte_data(cl, 1);
1252                         break;
1253                 case 0x53:      /* HYST */
1254                         res = swab16(i2c_smbus_read_word_data(cl, 2));
1255                         break;
1256                 case 0x55:      /* OVER */
1257                 default:
1258                         res = swab16(i2c_smbus_read_word_data(cl, 3));
1259                         break;
1260                 }
1261         }
1262         if (bank > 2)
1263                 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1264
1265         return res;
1266 }
1267
1268 static int
1269 w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
1270 {
1271         struct i2c_client *client = data->client;
1272         int bank;
1273         struct i2c_client *cl;
1274
1275         bank = (reg >> 8) & 0x0f;
1276         if (bank > 2)
1277                 /* switch banks */
1278                 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1279                                           bank);
1280         if (bank == 0 || bank > 2) {
1281                 i2c_smbus_write_byte_data(client, reg & 0xff,
1282                                           value & 0xff);
1283         } else {
1284                 /* switch to subclient */
1285                 cl = data->lm75[bank - 1];
1286                 /* convert from ISA to LM75 I2C addresses */
1287                 switch (reg & 0xff) {
1288                 case 0x52:      /* CONFIG */
1289                         i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1290                         break;
1291                 case 0x53:      /* HYST */
1292                         i2c_smbus_write_word_data(cl, 2, swab16(value));
1293                         break;
1294                 case 0x55:      /* OVER */
1295                         i2c_smbus_write_word_data(cl, 3, swab16(value));
1296                         break;
1297                 }
1298         }
1299         if (bank > 2)
1300                 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1301
1302         return 0;
1303 }
1304
1305 static void
1306 w83781d_init_device(struct device *dev)
1307 {
1308         struct w83781d_data *data = dev_get_drvdata(dev);
1309         int i, p;
1310         int type = data->type;
1311         u8 tmp;
1312
1313         if (reset && type != as99127f) { /* this resets registers we don't have
1314                                            documentation for on the as99127f */
1315                 /* Resetting the chip has been the default for a long time,
1316                    but it causes the BIOS initializations (fan clock dividers,
1317                    thermal sensor types...) to be lost, so it is now optional.
1318                    It might even go away if nobody reports it as being useful,
1319                    as I see very little reason why this would be needed at
1320                    all. */
1321                 dev_info(dev, "If reset=1 solved a problem you were "
1322                          "having, please report!\n");
1323
1324                 /* save these registers */
1325                 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1326                 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1327                 /* Reset all except Watchdog values and last conversion values
1328                    This sets fan-divs to 2, among others */
1329                 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1330                 /* Restore the registers and disable power-on abnormal beep.
1331                    This saves FAN 1/2/3 input/output values set by BIOS. */
1332                 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1333                 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1334                 /* Disable master beep-enable (reset turns it on).
1335                    Individual beep_mask should be reset to off but for some reason
1336                    disabling this bit helps some people not get beeped */
1337                 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1338         }
1339
1340         /* Disable power-on abnormal beep, as advised by the datasheet.
1341            Already done if reset=1. */
1342         if (init && !reset && type != as99127f) {
1343                 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1344                 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1345         }
1346
1347         data->vrm = vid_which_vrm();
1348
1349         if ((type != w83781d) && (type != as99127f)) {
1350                 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1351                 for (i = 1; i <= 3; i++) {
1352                         if (!(tmp & BIT_SCFG1[i - 1])) {
1353                                 data->sens[i - 1] = 4;
1354                         } else {
1355                                 if (w83781d_read_value
1356                                     (data,
1357                                      W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1358                                         data->sens[i - 1] = 1;
1359                                 else
1360                                         data->sens[i - 1] = 2;
1361                         }
1362                         if (type == w83783s && i == 2)
1363                                 break;
1364                 }
1365         }
1366
1367         if (init && type != as99127f) {
1368                 /* Enable temp2 */
1369                 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1370                 if (tmp & 0x01) {
1371                         dev_warn(dev, "Enabling temp2, readings "
1372                                  "might not make sense\n");
1373                         w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1374                                 tmp & 0xfe);
1375                 }
1376
1377                 /* Enable temp3 */
1378                 if (type != w83783s) {
1379                         tmp = w83781d_read_value(data,
1380                                 W83781D_REG_TEMP3_CONFIG);
1381                         if (tmp & 0x01) {
1382                                 dev_warn(dev, "Enabling temp3, "
1383                                          "readings might not make sense\n");
1384                                 w83781d_write_value(data,
1385                                         W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1386                         }
1387                 }
1388         }
1389
1390         /* Start monitoring */
1391         w83781d_write_value(data, W83781D_REG_CONFIG,
1392                             (w83781d_read_value(data,
1393                                                 W83781D_REG_CONFIG) & 0xf7)
1394                             | 0x01);
1395
1396         /* A few vars need to be filled upon startup */
1397         for (i = 0; i < 3; i++) {
1398                 data->fan_min[i] = w83781d_read_value(data,
1399                                         W83781D_REG_FAN_MIN(i));
1400         }
1401
1402         mutex_init(&data->update_lock);
1403 }
1404
1405 static struct w83781d_data *w83781d_update_device(struct device *dev)
1406 {
1407         struct w83781d_data *data = dev_get_drvdata(dev);
1408         struct i2c_client *client = data->client;
1409         int i;
1410
1411         mutex_lock(&data->update_lock);
1412
1413         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1414             || !data->valid) {
1415                 dev_dbg(dev, "Starting device update\n");
1416
1417                 for (i = 0; i <= 8; i++) {
1418                         if (data->type == w83783s && i == 1)
1419                                 continue;       /* 783S has no in1 */
1420                         data->in[i] =
1421                             w83781d_read_value(data, W83781D_REG_IN(i));
1422                         data->in_min[i] =
1423                             w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1424                         data->in_max[i] =
1425                             w83781d_read_value(data, W83781D_REG_IN_MAX(i));
1426                         if ((data->type != w83782d) && (i == 6))
1427                                 break;
1428                 }
1429                 for (i = 0; i < 3; i++) {
1430                         data->fan[i] =
1431                             w83781d_read_value(data, W83781D_REG_FAN(i));
1432                         data->fan_min[i] =
1433                             w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1434                 }
1435                 if (data->type != w83781d && data->type != as99127f) {
1436                         for (i = 0; i < 4; i++) {
1437                                 data->pwm[i] =
1438                                     w83781d_read_value(data,
1439                                                        W83781D_REG_PWM[i]);
1440                                 /* Only W83782D on SMBus has PWM3 and PWM4 */
1441                                 if ((data->type != w83782d || !client)
1442                                     && i == 1)
1443                                         break;
1444                         }
1445                         /* Only PWM2 can be disabled */
1446                         data->pwm2_enable = (w83781d_read_value(data,
1447                                               W83781D_REG_PWMCLK12) & 0x08) >> 3;
1448                 }
1449
1450                 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1451                 data->temp_max =
1452                     w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1453                 data->temp_max_hyst =
1454                     w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1455                 data->temp_add[0] =
1456                     w83781d_read_value(data, W83781D_REG_TEMP(2));
1457                 data->temp_max_add[0] =
1458                     w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1459                 data->temp_max_hyst_add[0] =
1460                     w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
1461                 if (data->type != w83783s) {
1462                         data->temp_add[1] =
1463                             w83781d_read_value(data, W83781D_REG_TEMP(3));
1464                         data->temp_max_add[1] =
1465                             w83781d_read_value(data,
1466                                                W83781D_REG_TEMP_OVER(3));
1467                         data->temp_max_hyst_add[1] =
1468                             w83781d_read_value(data,
1469                                                W83781D_REG_TEMP_HYST(3));
1470                 }
1471                 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
1472                 data->vid = i & 0x0f;
1473                 data->vid |= (w83781d_read_value(data,
1474                                         W83781D_REG_CHIPID) & 0x01) << 4;
1475                 data->fan_div[0] = (i >> 4) & 0x03;
1476                 data->fan_div[1] = (i >> 6) & 0x03;
1477                 data->fan_div[2] = (w83781d_read_value(data,
1478                                         W83781D_REG_PIN) >> 6) & 0x03;
1479                 if ((data->type != w83781d) && (data->type != as99127f)) {
1480                         i = w83781d_read_value(data, W83781D_REG_VBAT);
1481                         data->fan_div[0] |= (i >> 3) & 0x04;
1482                         data->fan_div[1] |= (i >> 4) & 0x04;
1483                         data->fan_div[2] |= (i >> 5) & 0x04;
1484                 }
1485                 if (data->type == w83782d) {
1486                         data->alarms = w83781d_read_value(data,
1487                                                 W83782D_REG_ALARM1)
1488                                      | (w83781d_read_value(data,
1489                                                 W83782D_REG_ALARM2) << 8)
1490                                      | (w83781d_read_value(data,
1491                                                 W83782D_REG_ALARM3) << 16);
1492                 } else if (data->type == w83783s) {
1493                         data->alarms = w83781d_read_value(data,
1494                                                 W83782D_REG_ALARM1)
1495                                      | (w83781d_read_value(data,
1496                                                 W83782D_REG_ALARM2) << 8);
1497                 } else {
1498                         /* No real-time status registers, fall back to
1499                            interrupt status registers */
1500                         data->alarms = w83781d_read_value(data,
1501                                                 W83781D_REG_ALARM1)
1502                                      | (w83781d_read_value(data,
1503                                                 W83781D_REG_ALARM2) << 8);
1504                 }
1505                 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1506                 data->beep_mask = (i << 8) +
1507                     w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1508                 if ((data->type != w83781d) && (data->type != as99127f)) {
1509                         data->beep_mask |=
1510                             w83781d_read_value(data,
1511                                                W83781D_REG_BEEP_INTS3) << 16;
1512                 }
1513                 data->last_updated = jiffies;
1514                 data->valid = 1;
1515         }
1516
1517         mutex_unlock(&data->update_lock);
1518
1519         return data;
1520 }
1521
1522 static const struct i2c_device_id w83781d_ids[] = {
1523         { "w83781d", w83781d, },
1524         { "w83782d", w83782d, },
1525         { "w83783s", w83783s, },
1526         { "as99127f", as99127f },
1527         { /* LIST END */ }
1528 };
1529 MODULE_DEVICE_TABLE(i2c, w83781d_ids);
1530
1531 static struct i2c_driver w83781d_driver = {
1532         .class          = I2C_CLASS_HWMON,
1533         .driver = {
1534                 .name = "w83781d",
1535         },
1536         .probe          = w83781d_probe,
1537         .remove         = w83781d_remove,
1538         .id_table       = w83781d_ids,
1539         .detect         = w83781d_detect,
1540         .address_data   = &addr_data,
1541 };
1542
1543 /*
1544  * ISA related code
1545  */
1546 #ifdef CONFIG_ISA
1547
1548 /* ISA device, if found */
1549 static struct platform_device *pdev;
1550
1551 static unsigned short isa_address = 0x290;
1552
1553 /* I2C devices get this name attribute automatically, but for ISA devices
1554    we must create it by ourselves. */
1555 static ssize_t
1556 show_name(struct device *dev, struct device_attribute *devattr, char *buf)
1557 {
1558         struct w83781d_data *data = dev_get_drvdata(dev);
1559         return sprintf(buf, "%s\n", data->name);
1560 }
1561 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1562
1563 static struct w83781d_data *w83781d_data_if_isa(void)
1564 {
1565         return pdev ? platform_get_drvdata(pdev) : NULL;
1566 }
1567
1568 /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
1569 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1570 {
1571         struct w83781d_data *isa;
1572         int i;
1573
1574         if (!pdev)      /* No ISA chip */
1575                 return 0;
1576
1577         isa = platform_get_drvdata(pdev);
1578
1579         if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
1580                 return 0;       /* Address doesn't match */
1581         if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
1582                 return 0;       /* Chip type doesn't match */
1583
1584         /* We compare all the limit registers, the config register and the
1585          * interrupt mask registers */
1586         for (i = 0x2b; i <= 0x3d; i++) {
1587                 if (w83781d_read_value(isa, i) !=
1588                     i2c_smbus_read_byte_data(client, i))
1589                         return 0;
1590         }
1591         if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
1592             i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
1593                 return 0;
1594         for (i = 0x43; i <= 0x46; i++) {
1595                 if (w83781d_read_value(isa, i) !=
1596                     i2c_smbus_read_byte_data(client, i))
1597                         return 0;
1598         }
1599
1600         return 1;
1601 }
1602
1603 static int
1604 w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
1605 {
1606         int word_sized, res;
1607
1608         word_sized = (((reg & 0xff00) == 0x100)
1609                       || ((reg & 0xff00) == 0x200))
1610             && (((reg & 0x00ff) == 0x50)
1611                 || ((reg & 0x00ff) == 0x53)
1612                 || ((reg & 0x00ff) == 0x55));
1613         if (reg & 0xff00) {
1614                 outb_p(W83781D_REG_BANK,
1615                        data->isa_addr + W83781D_ADDR_REG_OFFSET);
1616                 outb_p(reg >> 8,
1617                        data->isa_addr + W83781D_DATA_REG_OFFSET);
1618         }
1619         outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1620         res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
1621         if (word_sized) {
1622                 outb_p((reg & 0xff) + 1,
1623                        data->isa_addr + W83781D_ADDR_REG_OFFSET);
1624                 res =
1625                     (res << 8) + inb_p(data->isa_addr +
1626                                        W83781D_DATA_REG_OFFSET);
1627         }
1628         if (reg & 0xff00) {
1629                 outb_p(W83781D_REG_BANK,
1630                        data->isa_addr + W83781D_ADDR_REG_OFFSET);
1631                 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1632         }
1633         return res;
1634 }
1635
1636 static void
1637 w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
1638 {
1639         int word_sized;
1640
1641         word_sized = (((reg & 0xff00) == 0x100)
1642                       || ((reg & 0xff00) == 0x200))
1643             && (((reg & 0x00ff) == 0x53)
1644                 || ((reg & 0x00ff) == 0x55));
1645         if (reg & 0xff00) {
1646                 outb_p(W83781D_REG_BANK,
1647                        data->isa_addr + W83781D_ADDR_REG_OFFSET);
1648                 outb_p(reg >> 8,
1649                        data->isa_addr + W83781D_DATA_REG_OFFSET);
1650         }
1651         outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1652         if (word_sized) {
1653                 outb_p(value >> 8,
1654                        data->isa_addr + W83781D_DATA_REG_OFFSET);
1655                 outb_p((reg & 0xff) + 1,
1656                        data->isa_addr + W83781D_ADDR_REG_OFFSET);
1657         }
1658         outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
1659         if (reg & 0xff00) {
1660                 outb_p(W83781D_REG_BANK,
1661                        data->isa_addr + W83781D_ADDR_REG_OFFSET);
1662                 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1663         }
1664 }
1665
1666 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1667    bank switches. ISA access must always be locked explicitly!
1668    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1669    would slow down the W83781D access and should not be necessary.
1670    There are some ugly typecasts here, but the good news is - they should
1671    nowhere else be necessary! */
1672 static int
1673 w83781d_read_value(struct w83781d_data *data, u16 reg)
1674 {
1675         struct i2c_client *client = data->client;
1676         int res;
1677
1678         mutex_lock(&data->lock);
1679         if (client)
1680                 res = w83781d_read_value_i2c(data, reg);
1681         else
1682                 res = w83781d_read_value_isa(data, reg);
1683         mutex_unlock(&data->lock);
1684         return res;
1685 }
1686
1687 static int
1688 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1689 {
1690         struct i2c_client *client = data->client;
1691
1692         mutex_lock(&data->lock);
1693         if (client)
1694                 w83781d_write_value_i2c(data, reg, value);
1695         else
1696                 w83781d_write_value_isa(data, reg, value);
1697         mutex_unlock(&data->lock);
1698         return 0;
1699 }
1700
1701 static int __devinit
1702 w83781d_isa_probe(struct platform_device *pdev)
1703 {
1704         int err, reg;
1705         struct w83781d_data *data;
1706         struct resource *res;
1707
1708         /* Reserve the ISA region */
1709         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1710         if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2,
1711                             "w83781d")) {
1712                 err = -EBUSY;
1713                 goto exit;
1714         }
1715
1716         data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
1717         if (!data) {
1718                 err = -ENOMEM;
1719                 goto exit_release_region;
1720         }
1721         mutex_init(&data->lock);
1722         data->isa_addr = res->start;
1723         platform_set_drvdata(pdev, data);
1724
1725         reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1726         switch (reg) {
1727         case 0x30:
1728                 data->type = w83782d;
1729                 data->name = "w83782d";
1730                 break;
1731         default:
1732                 data->type = w83781d;
1733                 data->name = "w83781d";
1734         }
1735
1736         /* Initialize the W83781D chip */
1737         w83781d_init_device(&pdev->dev);
1738
1739         /* Register sysfs hooks */
1740         err = w83781d_create_files(&pdev->dev, data->type, 1);
1741         if (err)
1742                 goto exit_remove_files;
1743
1744         err = device_create_file(&pdev->dev, &dev_attr_name);
1745         if (err)
1746                 goto exit_remove_files;
1747
1748         data->hwmon_dev = hwmon_device_register(&pdev->dev);
1749         if (IS_ERR(data->hwmon_dev)) {
1750                 err = PTR_ERR(data->hwmon_dev);
1751                 goto exit_remove_files;
1752         }
1753
1754         return 0;
1755
1756  exit_remove_files:
1757         sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1758         sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1759         device_remove_file(&pdev->dev, &dev_attr_name);
1760         kfree(data);
1761  exit_release_region:
1762         release_region(res->start + W83781D_ADDR_REG_OFFSET, 2);
1763  exit:
1764         return err;
1765 }
1766
1767 static int __devexit
1768 w83781d_isa_remove(struct platform_device *pdev)
1769 {
1770         struct w83781d_data *data = platform_get_drvdata(pdev);
1771
1772         hwmon_device_unregister(data->hwmon_dev);
1773         sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1774         sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1775         device_remove_file(&pdev->dev, &dev_attr_name);
1776         release_region(data->isa_addr + W83781D_ADDR_REG_OFFSET, 2);
1777         kfree(data);
1778
1779         return 0;
1780 }
1781
1782 static struct platform_driver w83781d_isa_driver = {
1783         .driver = {
1784                 .owner = THIS_MODULE,
1785                 .name = "w83781d",
1786         },
1787         .probe = w83781d_isa_probe,
1788         .remove = __devexit_p(w83781d_isa_remove),
1789 };
1790
1791 /* return 1 if a supported chip is found, 0 otherwise */
1792 static int __init
1793 w83781d_isa_found(unsigned short address)
1794 {
1795         int val, save, found = 0;
1796
1797         /* We have to request the region in two parts because some
1798            boards declare base+4 to base+7 as a PNP device */
1799         if (!request_region(address, 4, "w83781d")) {
1800                 pr_debug("w83781d: Failed to request low part of region\n");
1801                 return 0;
1802         }
1803         if (!request_region(address + 4, 4, "w83781d")) {
1804                 pr_debug("w83781d: Failed to request high part of region\n");
1805                 release_region(address, 4);
1806                 return 0;
1807         }
1808
1809 #define REALLY_SLOW_IO
1810         /* We need the timeouts for at least some W83781D-like
1811            chips. But only if we read 'undefined' registers. */
1812         val = inb_p(address + 1);
1813         if (inb_p(address + 2) != val
1814          || inb_p(address + 3) != val
1815          || inb_p(address + 7) != val) {
1816                 pr_debug("w83781d: Detection failed at step 1\n");
1817                 goto release;
1818         }
1819 #undef REALLY_SLOW_IO
1820
1821         /* We should be able to change the 7 LSB of the address port. The
1822            MSB (busy flag) should be clear initially, set after the write. */
1823         save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1824         if (save & 0x80) {
1825                 pr_debug("w83781d: Detection failed at step 2\n");
1826                 goto release;
1827         }
1828         val = ~save & 0x7f;
1829         outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1830         if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1831                 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1832                 pr_debug("w83781d: Detection failed at step 3\n");
1833                 goto release;
1834         }
1835
1836         /* We found a device, now see if it could be a W83781D */
1837         outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1838         val = inb_p(address + W83781D_DATA_REG_OFFSET);
1839         if (val & 0x80) {
1840                 pr_debug("w83781d: Detection failed at step 4\n");
1841                 goto release;
1842         }
1843         outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1844         save = inb_p(address + W83781D_DATA_REG_OFFSET);
1845         outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1846         val = inb_p(address + W83781D_DATA_REG_OFFSET);
1847         if ((!(save & 0x80) && (val != 0xa3))
1848          || ((save & 0x80) && (val != 0x5c))) {
1849                 pr_debug("w83781d: Detection failed at step 5\n");
1850                 goto release;
1851         }
1852         outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1853         val = inb_p(address + W83781D_DATA_REG_OFFSET);
1854         if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1855                 pr_debug("w83781d: Detection failed at step 6\n");
1856                 goto release;
1857         }
1858
1859         /* The busy flag should be clear again */
1860         if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1861                 pr_debug("w83781d: Detection failed at step 7\n");
1862                 goto release;
1863         }
1864
1865         /* Determine the chip type */
1866         outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1867         save = inb_p(address + W83781D_DATA_REG_OFFSET);
1868         outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1869         outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1870         val = inb_p(address + W83781D_DATA_REG_OFFSET);
1871         if ((val & 0xfe) == 0x10        /* W83781D */
1872          || val == 0x30)                /* W83782D */
1873                 found = 1;
1874
1875         if (found)
1876                 pr_info("w83781d: Found a %s chip at %#x\n",
1877                         val == 0x30 ? "W83782D" : "W83781D", (int)address);
1878
1879  release:
1880         release_region(address + 4, 4);
1881         release_region(address, 4);
1882         return found;
1883 }
1884
1885 static int __init
1886 w83781d_isa_device_add(unsigned short address)
1887 {
1888         struct resource res = {
1889                 .start  = address,
1890                 .end    = address + W83781D_EXTENT - 1,
1891                 .name   = "w83781d",
1892                 .flags  = IORESOURCE_IO,
1893         };
1894         int err;
1895
1896         pdev = platform_device_alloc("w83781d", address);
1897         if (!pdev) {
1898                 err = -ENOMEM;
1899                 printk(KERN_ERR "w83781d: Device allocation failed\n");
1900                 goto exit;
1901         }
1902
1903         err = platform_device_add_resources(pdev, &res, 1);
1904         if (err) {
1905                 printk(KERN_ERR "w83781d: Device resource addition failed "
1906                        "(%d)\n", err);
1907                 goto exit_device_put;
1908         }
1909
1910         err = platform_device_add(pdev);
1911         if (err) {
1912                 printk(KERN_ERR "w83781d: Device addition failed (%d)\n",
1913                        err);
1914                 goto exit_device_put;
1915         }
1916
1917         return 0;
1918
1919  exit_device_put:
1920         platform_device_put(pdev);
1921  exit:
1922         pdev = NULL;
1923         return err;
1924 }
1925
1926 static int __init
1927 w83781d_isa_register(void)
1928 {
1929         int res;
1930
1931         if (w83781d_isa_found(isa_address)) {
1932                 res = platform_driver_register(&w83781d_isa_driver);
1933                 if (res)
1934                         goto exit;
1935
1936                 /* Sets global pdev as a side effect */
1937                 res = w83781d_isa_device_add(isa_address);
1938                 if (res)
1939                         goto exit_unreg_isa_driver;
1940         }
1941
1942         return 0;
1943
1944 exit_unreg_isa_driver:
1945         platform_driver_unregister(&w83781d_isa_driver);
1946 exit:
1947         return res;
1948 }
1949
1950 static void
1951 w83781d_isa_unregister(void)
1952 {
1953         if (pdev) {
1954                 platform_device_unregister(pdev);
1955                 platform_driver_unregister(&w83781d_isa_driver);
1956         }
1957 }
1958 #else /* !CONFIG_ISA */
1959
1960 static struct w83781d_data *w83781d_data_if_isa(void)
1961 {
1962         return NULL;
1963 }
1964
1965 static int
1966 w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1967 {
1968         return 0;
1969 }
1970
1971 static int
1972 w83781d_read_value(struct w83781d_data *data, u16 reg)
1973 {
1974         int res;
1975
1976         mutex_lock(&data->lock);
1977         res = w83781d_read_value_i2c(data, reg);
1978         mutex_unlock(&data->lock);
1979
1980         return res;
1981 }
1982
1983 static int
1984 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1985 {
1986         mutex_lock(&data->lock);
1987         w83781d_write_value_i2c(data, reg, value);
1988         mutex_unlock(&data->lock);
1989
1990         return 0;
1991 }
1992
1993 static int __init
1994 w83781d_isa_register(void)
1995 {
1996         return 0;
1997 }
1998
1999 static void
2000 w83781d_isa_unregister(void)
2001 {
2002 }
2003 #endif /* CONFIG_ISA */
2004
2005 static int __init
2006 sensors_w83781d_init(void)
2007 {
2008         int res;
2009
2010         /* We register the ISA device first, so that we can skip the
2011          * registration of an I2C interface to the same device. */
2012         res = w83781d_isa_register();
2013         if (res)
2014                 goto exit;
2015
2016         res = i2c_add_driver(&w83781d_driver);
2017         if (res)
2018                 goto exit_unreg_isa;
2019
2020         return 0;
2021
2022  exit_unreg_isa:
2023         w83781d_isa_unregister();
2024  exit:
2025         return res;
2026 }
2027
2028 static void __exit
2029 sensors_w83781d_exit(void)
2030 {
2031         w83781d_isa_unregister();
2032         i2c_del_driver(&w83781d_driver);
2033 }
2034
2035 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2036               "Philip Edelbrock <phil@netroedge.com>, "
2037               "and Mark Studebaker <mdsxyz123@yahoo.com>");
2038 MODULE_DESCRIPTION("W83781D driver");
2039 MODULE_LICENSE("GPL");
2040
2041 module_init(sensors_w83781d_init);
2042 module_exit(sensors_w83781d_exit);