drm/radeon/r600: remove some regs are not safe regs for command buffers
[linux-2.6.git] / drivers / gpu / drm / radeon / reg_srcs / r600
1 r600 0x9400
2 0x000287A0 R7xx_CB_SHADER_CONTROL
3 0x00028230 R7xx_PA_SC_EDGERULE
4 0x000286C8 R7xx_SPI_THREAD_GROUPING
5 0x00008D8C R7xx_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ
6 0x000088C4 VGT_CACHE_INVALIDATION
7 0x00028A50 VGT_ENHANCE
8 0x000088CC VGT_ES_PER_GS
9 0x00028A2C VGT_GROUP_DECR
10 0x00028A28 VGT_GROUP_FIRST_DECR
11 0x00028A24 VGT_GROUP_PRIM_TYPE
12 0x00028A30 VGT_GROUP_VECT_0_CNTL
13 0x00028A38 VGT_GROUP_VECT_0_FMT_CNTL
14 0x00028A34 VGT_GROUP_VECT_1_CNTL
15 0x00028A3C VGT_GROUP_VECT_1_FMT_CNTL
16 0x00028A40 VGT_GS_MODE
17 0x00028A6C VGT_GS_OUT_PRIM_TYPE
18 0x000088C8 VGT_GS_PER_ES
19 0x000088E8 VGT_GS_PER_VS
20 0x000088D4 VGT_GS_VERTEX_REUSE
21 0x00028A14 VGT_HOS_CNTL
22 0x00028A18 VGT_HOS_MAX_TESS_LEVEL
23 0x00028A1C VGT_HOS_MIN_TESS_LEVEL
24 0x00028A20 VGT_HOS_REUSE_DEPTH
25 0x0000895C VGT_INDEX_TYPE
26 0x00028408 VGT_INDX_OFFSET
27 0x00028AA0 VGT_INSTANCE_STEP_RATE_0
28 0x00028AA4 VGT_INSTANCE_STEP_RATE_1
29 0x000088C0 VGT_LAST_COPY_STATE
30 0x00028400 VGT_MAX_VTX_INDX
31 0x000088D8 VGT_MC_LAT_CNTL
32 0x00028404 VGT_MIN_VTX_INDX
33 0x00028A94 VGT_MULTI_PRIM_IB_RESET_EN
34 0x0002840C VGT_MULTI_PRIM_IB_RESET_INDX
35 0x00008970 VGT_NUM_INDICES
36 0x00008974 VGT_NUM_INSTANCES
37 0x00028A10 VGT_OUTPUT_PATH_CNTL
38 0x00028C5C VGT_OUT_DEALLOC_CNTL
39 0x00028A84 VGT_PRIMITIVEID_EN
40 0x00008958 VGT_PRIMITIVE_TYPE
41 0x00028AB4 VGT_REUSE_OFF
42 0x00028C58 VGT_VERTEX_REUSE_BLOCK_CNTL
43 0x00028AB8 VGT_VTX_CNT_EN
44 0x000088B0 VGT_VTX_VECT_EJECT_REG
45 0x00028810 PA_CL_CLIP_CNTL
46 0x00008A14 PA_CL_ENHANCE
47 0x00028C14 PA_CL_GB_HORZ_CLIP_ADJ
48 0x00028C18 PA_CL_GB_HORZ_DISC_ADJ
49 0x00028C0C PA_CL_GB_VERT_CLIP_ADJ
50 0x00028C10 PA_CL_GB_VERT_DISC_ADJ
51 0x00028820 PA_CL_NANINF_CNTL
52 0x00028E1C PA_CL_POINT_CULL_RAD
53 0x00028E18 PA_CL_POINT_SIZE
54 0x00028E10 PA_CL_POINT_X_RAD
55 0x00028E14 PA_CL_POINT_Y_RAD
56 0x00028E2C PA_CL_UCP_0_W
57 0x00028E3C PA_CL_UCP_1_W
58 0x00028E4C PA_CL_UCP_2_W
59 0x00028E5C PA_CL_UCP_3_W
60 0x00028E6C PA_CL_UCP_4_W
61 0x00028E7C PA_CL_UCP_5_W
62 0x00028E20 PA_CL_UCP_0_X
63 0x00028E30 PA_CL_UCP_1_X
64 0x00028E40 PA_CL_UCP_2_X
65 0x00028E50 PA_CL_UCP_3_X
66 0x00028E60 PA_CL_UCP_4_X
67 0x00028E70 PA_CL_UCP_5_X
68 0x00028E24 PA_CL_UCP_0_Y
69 0x00028E34 PA_CL_UCP_1_Y
70 0x00028E44 PA_CL_UCP_2_Y
71 0x00028E54 PA_CL_UCP_3_Y
72 0x00028E64 PA_CL_UCP_4_Y
73 0x00028E74 PA_CL_UCP_5_Y
74 0x00028E28 PA_CL_UCP_0_Z
75 0x00028E38 PA_CL_UCP_1_Z
76 0x00028E48 PA_CL_UCP_2_Z
77 0x00028E58 PA_CL_UCP_3_Z
78 0x00028E68 PA_CL_UCP_4_Z
79 0x00028E78 PA_CL_UCP_5_Z
80 0x00028440 PA_CL_VPORT_XOFFSET_0
81 0x00028458 PA_CL_VPORT_XOFFSET_1
82 0x00028470 PA_CL_VPORT_XOFFSET_2
83 0x00028488 PA_CL_VPORT_XOFFSET_3
84 0x000284A0 PA_CL_VPORT_XOFFSET_4
85 0x000284B8 PA_CL_VPORT_XOFFSET_5
86 0x000284D0 PA_CL_VPORT_XOFFSET_6
87 0x000284E8 PA_CL_VPORT_XOFFSET_7
88 0x00028500 PA_CL_VPORT_XOFFSET_8
89 0x00028518 PA_CL_VPORT_XOFFSET_9
90 0x00028530 PA_CL_VPORT_XOFFSET_10
91 0x00028548 PA_CL_VPORT_XOFFSET_11
92 0x00028560 PA_CL_VPORT_XOFFSET_12
93 0x00028578 PA_CL_VPORT_XOFFSET_13
94 0x00028590 PA_CL_VPORT_XOFFSET_14
95 0x000285A8 PA_CL_VPORT_XOFFSET_15
96 0x0002843C PA_CL_VPORT_XSCALE_0
97 0x00028454 PA_CL_VPORT_XSCALE_1
98 0x0002846C PA_CL_VPORT_XSCALE_2
99 0x00028484 PA_CL_VPORT_XSCALE_3
100 0x0002849C PA_CL_VPORT_XSCALE_4
101 0x000284B4 PA_CL_VPORT_XSCALE_5
102 0x000284CC PA_CL_VPORT_XSCALE_6
103 0x000284E4 PA_CL_VPORT_XSCALE_7
104 0x000284FC PA_CL_VPORT_XSCALE_8
105 0x00028514 PA_CL_VPORT_XSCALE_9
106 0x0002852C PA_CL_VPORT_XSCALE_10
107 0x00028544 PA_CL_VPORT_XSCALE_11
108 0x0002855C PA_CL_VPORT_XSCALE_12
109 0x00028574 PA_CL_VPORT_XSCALE_13
110 0x0002858C PA_CL_VPORT_XSCALE_14
111 0x000285A4 PA_CL_VPORT_XSCALE_15
112 0x00028448 PA_CL_VPORT_YOFFSET_0
113 0x00028460 PA_CL_VPORT_YOFFSET_1
114 0x00028478 PA_CL_VPORT_YOFFSET_2
115 0x00028490 PA_CL_VPORT_YOFFSET_3
116 0x000284A8 PA_CL_VPORT_YOFFSET_4
117 0x000284C0 PA_CL_VPORT_YOFFSET_5
118 0x000284D8 PA_CL_VPORT_YOFFSET_6
119 0x000284F0 PA_CL_VPORT_YOFFSET_7
120 0x00028508 PA_CL_VPORT_YOFFSET_8
121 0x00028520 PA_CL_VPORT_YOFFSET_9
122 0x00028538 PA_CL_VPORT_YOFFSET_10
123 0x00028550 PA_CL_VPORT_YOFFSET_11
124 0x00028568 PA_CL_VPORT_YOFFSET_12
125 0x00028580 PA_CL_VPORT_YOFFSET_13
126 0x00028598 PA_CL_VPORT_YOFFSET_14
127 0x000285B0 PA_CL_VPORT_YOFFSET_15
128 0x00028444 PA_CL_VPORT_YSCALE_0
129 0x0002845C PA_CL_VPORT_YSCALE_1
130 0x00028474 PA_CL_VPORT_YSCALE_2
131 0x0002848C PA_CL_VPORT_YSCALE_3
132 0x000284A4 PA_CL_VPORT_YSCALE_4
133 0x000284BC PA_CL_VPORT_YSCALE_5
134 0x000284D4 PA_CL_VPORT_YSCALE_6
135 0x000284EC PA_CL_VPORT_YSCALE_7
136 0x00028504 PA_CL_VPORT_YSCALE_8
137 0x0002851C PA_CL_VPORT_YSCALE_9
138 0x00028534 PA_CL_VPORT_YSCALE_10
139 0x0002854C PA_CL_VPORT_YSCALE_11
140 0x00028564 PA_CL_VPORT_YSCALE_12
141 0x0002857C PA_CL_VPORT_YSCALE_13
142 0x00028594 PA_CL_VPORT_YSCALE_14
143 0x000285AC PA_CL_VPORT_YSCALE_15
144 0x00028450 PA_CL_VPORT_ZOFFSET_0
145 0x00028468 PA_CL_VPORT_ZOFFSET_1
146 0x00028480 PA_CL_VPORT_ZOFFSET_2
147 0x00028498 PA_CL_VPORT_ZOFFSET_3
148 0x000284B0 PA_CL_VPORT_ZOFFSET_4
149 0x000284C8 PA_CL_VPORT_ZOFFSET_5
150 0x000284E0 PA_CL_VPORT_ZOFFSET_6
151 0x000284F8 PA_CL_VPORT_ZOFFSET_7
152 0x00028510 PA_CL_VPORT_ZOFFSET_8
153 0x00028528 PA_CL_VPORT_ZOFFSET_9
154 0x00028540 PA_CL_VPORT_ZOFFSET_10
155 0x00028558 PA_CL_VPORT_ZOFFSET_11
156 0x00028570 PA_CL_VPORT_ZOFFSET_12
157 0x00028588 PA_CL_VPORT_ZOFFSET_13
158 0x000285A0 PA_CL_VPORT_ZOFFSET_14
159 0x000285B8 PA_CL_VPORT_ZOFFSET_15
160 0x0002844C PA_CL_VPORT_ZSCALE_0
161 0x00028464 PA_CL_VPORT_ZSCALE_1
162 0x0002847C PA_CL_VPORT_ZSCALE_2
163 0x00028494 PA_CL_VPORT_ZSCALE_3
164 0x000284AC PA_CL_VPORT_ZSCALE_4
165 0x000284C4 PA_CL_VPORT_ZSCALE_5
166 0x000284DC PA_CL_VPORT_ZSCALE_6
167 0x000284F4 PA_CL_VPORT_ZSCALE_7
168 0x0002850C PA_CL_VPORT_ZSCALE_8
169 0x00028524 PA_CL_VPORT_ZSCALE_9
170 0x0002853C PA_CL_VPORT_ZSCALE_10
171 0x00028554 PA_CL_VPORT_ZSCALE_11
172 0x0002856C PA_CL_VPORT_ZSCALE_12
173 0x00028584 PA_CL_VPORT_ZSCALE_13
174 0x0002859C PA_CL_VPORT_ZSCALE_14
175 0x000285B4 PA_CL_VPORT_ZSCALE_15
176 0x0002881C PA_CL_VS_OUT_CNTL
177 0x00028818 PA_CL_VTE_CNTL
178 0x00028C48 PA_SC_AA_MASK
179 0x00008B40 PA_SC_AA_SAMPLE_LOCS_2S
180 0x00008B44 PA_SC_AA_SAMPLE_LOCS_4S
181 0x00008B48 PA_SC_AA_SAMPLE_LOCS_8S_WD0
182 0x00008B4C PA_SC_AA_SAMPLE_LOCS_8S_WD1
183 0x00028C20 PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX
184 0x00028C1C PA_SC_AA_SAMPLE_LOCS_MCTX
185 0x00028214 PA_SC_CLIPRECT_0_BR
186 0x0002821C PA_SC_CLIPRECT_1_BR
187 0x00028224 PA_SC_CLIPRECT_2_BR
188 0x0002822C PA_SC_CLIPRECT_3_BR
189 0x00028210 PA_SC_CLIPRECT_0_TL
190 0x00028218 PA_SC_CLIPRECT_1_TL
191 0x00028220 PA_SC_CLIPRECT_2_TL
192 0x00028228 PA_SC_CLIPRECT_3_TL
193 0x0002820C PA_SC_CLIPRECT_RULE
194 0x00008BF0 PA_SC_ENHANCE
195 0x00028244 PA_SC_GENERIC_SCISSOR_BR
196 0x00028240 PA_SC_GENERIC_SCISSOR_TL
197 0x00028C00 PA_SC_LINE_CNTL
198 0x00028A0C PA_SC_LINE_STIPPLE
199 0x00008B10 PA_SC_LINE_STIPPLE_STATE
200 0x00028A4C PA_SC_MODE_CNTL
201 0x00028A48 PA_SC_MPASS_PS_CNTL
202 0x00008B20 PA_SC_MULTI_CHIP_CNTL
203 0x00028034 PA_SC_SCREEN_SCISSOR_BR
204 0x00028030 PA_SC_SCREEN_SCISSOR_TL
205 0x00028254 PA_SC_VPORT_SCISSOR_0_BR
206 0x0002825C PA_SC_VPORT_SCISSOR_1_BR
207 0x00028264 PA_SC_VPORT_SCISSOR_2_BR
208 0x0002826C PA_SC_VPORT_SCISSOR_3_BR
209 0x00028274 PA_SC_VPORT_SCISSOR_4_BR
210 0x0002827C PA_SC_VPORT_SCISSOR_5_BR
211 0x00028284 PA_SC_VPORT_SCISSOR_6_BR
212 0x0002828C PA_SC_VPORT_SCISSOR_7_BR
213 0x00028294 PA_SC_VPORT_SCISSOR_8_BR
214 0x0002829C PA_SC_VPORT_SCISSOR_9_BR
215 0x000282A4 PA_SC_VPORT_SCISSOR_10_BR
216 0x000282AC PA_SC_VPORT_SCISSOR_11_BR
217 0x000282B4 PA_SC_VPORT_SCISSOR_12_BR
218 0x000282BC PA_SC_VPORT_SCISSOR_13_BR
219 0x000282C4 PA_SC_VPORT_SCISSOR_14_BR
220 0x000282CC PA_SC_VPORT_SCISSOR_15_BR
221 0x00028250 PA_SC_VPORT_SCISSOR_0_TL
222 0x00028258 PA_SC_VPORT_SCISSOR_1_TL
223 0x00028260 PA_SC_VPORT_SCISSOR_2_TL
224 0x00028268 PA_SC_VPORT_SCISSOR_3_TL
225 0x00028270 PA_SC_VPORT_SCISSOR_4_TL
226 0x00028278 PA_SC_VPORT_SCISSOR_5_TL
227 0x00028280 PA_SC_VPORT_SCISSOR_6_TL
228 0x00028288 PA_SC_VPORT_SCISSOR_7_TL
229 0x00028290 PA_SC_VPORT_SCISSOR_8_TL
230 0x00028298 PA_SC_VPORT_SCISSOR_9_TL
231 0x000282A0 PA_SC_VPORT_SCISSOR_10_TL
232 0x000282A8 PA_SC_VPORT_SCISSOR_11_TL
233 0x000282B0 PA_SC_VPORT_SCISSOR_12_TL
234 0x000282B8 PA_SC_VPORT_SCISSOR_13_TL
235 0x000282C0 PA_SC_VPORT_SCISSOR_14_TL
236 0x000282C8 PA_SC_VPORT_SCISSOR_15_TL
237 0x000282D4 PA_SC_VPORT_ZMAX_0
238 0x000282DC PA_SC_VPORT_ZMAX_1
239 0x000282E4 PA_SC_VPORT_ZMAX_2
240 0x000282EC PA_SC_VPORT_ZMAX_3
241 0x000282F4 PA_SC_VPORT_ZMAX_4
242 0x000282FC PA_SC_VPORT_ZMAX_5
243 0x00028304 PA_SC_VPORT_ZMAX_6
244 0x0002830C PA_SC_VPORT_ZMAX_7
245 0x00028314 PA_SC_VPORT_ZMAX_8
246 0x0002831C PA_SC_VPORT_ZMAX_9
247 0x00028324 PA_SC_VPORT_ZMAX_10
248 0x0002832C PA_SC_VPORT_ZMAX_11
249 0x00028334 PA_SC_VPORT_ZMAX_12
250 0x0002833C PA_SC_VPORT_ZMAX_13
251 0x00028344 PA_SC_VPORT_ZMAX_14
252 0x0002834C PA_SC_VPORT_ZMAX_15
253 0x000282D0 PA_SC_VPORT_ZMIN_0
254 0x000282D8 PA_SC_VPORT_ZMIN_1
255 0x000282E0 PA_SC_VPORT_ZMIN_2
256 0x000282E8 PA_SC_VPORT_ZMIN_3
257 0x000282F0 PA_SC_VPORT_ZMIN_4
258 0x000282F8 PA_SC_VPORT_ZMIN_5
259 0x00028300 PA_SC_VPORT_ZMIN_6
260 0x00028308 PA_SC_VPORT_ZMIN_7
261 0x00028310 PA_SC_VPORT_ZMIN_8
262 0x00028318 PA_SC_VPORT_ZMIN_9
263 0x00028320 PA_SC_VPORT_ZMIN_10
264 0x00028328 PA_SC_VPORT_ZMIN_11
265 0x00028330 PA_SC_VPORT_ZMIN_12
266 0x00028338 PA_SC_VPORT_ZMIN_13
267 0x00028340 PA_SC_VPORT_ZMIN_14
268 0x00028348 PA_SC_VPORT_ZMIN_15
269 0x00028200 PA_SC_WINDOW_OFFSET
270 0x00028208 PA_SC_WINDOW_SCISSOR_BR
271 0x00028204 PA_SC_WINDOW_SCISSOR_TL
272 0x00028A08 PA_SU_LINE_CNTL
273 0x00028A04 PA_SU_POINT_MINMAX
274 0x00028A00 PA_SU_POINT_SIZE
275 0x00028E0C PA_SU_POLY_OFFSET_BACK_OFFSET
276 0x00028E08 PA_SU_POLY_OFFSET_BACK_SCALE
277 0x00028DFC PA_SU_POLY_OFFSET_CLAMP
278 0x00028DF8 PA_SU_POLY_OFFSET_DB_FMT_CNTL
279 0x00028E04 PA_SU_POLY_OFFSET_FRONT_OFFSET
280 0x00028E00 PA_SU_POLY_OFFSET_FRONT_SCALE
281 0x00028814 PA_SU_SC_MODE_CNTL
282 0x00028C08 PA_SU_VTX_CNTL
283 0x00008C00 SQ_CONFIG
284 0x00008C04 SQ_GPR_RESOURCE_MGMT_1
285 0x00008C08 SQ_GPR_RESOURCE_MGMT_2
286 0x00008C10 SQ_STACK_RESOURCE_MGMT_1
287 0x00008C14 SQ_STACK_RESOURCE_MGMT_2
288 0x00008C0C SQ_THREAD_RESOURCE_MGMT
289 0x00028380 SQ_VTX_SEMANTIC_0
290 0x00028384 SQ_VTX_SEMANTIC_1
291 0x00028388 SQ_VTX_SEMANTIC_2
292 0x0002838C SQ_VTX_SEMANTIC_3
293 0x00028390 SQ_VTX_SEMANTIC_4
294 0x00028394 SQ_VTX_SEMANTIC_5
295 0x00028398 SQ_VTX_SEMANTIC_6
296 0x0002839C SQ_VTX_SEMANTIC_7
297 0x000283A0 SQ_VTX_SEMANTIC_8
298 0x000283A4 SQ_VTX_SEMANTIC_9
299 0x000283A8 SQ_VTX_SEMANTIC_10
300 0x000283AC SQ_VTX_SEMANTIC_11
301 0x000283B0 SQ_VTX_SEMANTIC_12
302 0x000283B4 SQ_VTX_SEMANTIC_13
303 0x000283B8 SQ_VTX_SEMANTIC_14
304 0x000283BC SQ_VTX_SEMANTIC_15
305 0x000283C0 SQ_VTX_SEMANTIC_16
306 0x000283C4 SQ_VTX_SEMANTIC_17
307 0x000283C8 SQ_VTX_SEMANTIC_18
308 0x000283CC SQ_VTX_SEMANTIC_19
309 0x000283D0 SQ_VTX_SEMANTIC_20
310 0x000283D4 SQ_VTX_SEMANTIC_21
311 0x000283D8 SQ_VTX_SEMANTIC_22
312 0x000283DC SQ_VTX_SEMANTIC_23
313 0x000283E0 SQ_VTX_SEMANTIC_24
314 0x000283E4 SQ_VTX_SEMANTIC_25
315 0x000283E8 SQ_VTX_SEMANTIC_26
316 0x000283EC SQ_VTX_SEMANTIC_27
317 0x000283F0 SQ_VTX_SEMANTIC_28
318 0x000283F4 SQ_VTX_SEMANTIC_29
319 0x000283F8 SQ_VTX_SEMANTIC_30
320 0x000283FC SQ_VTX_SEMANTIC_31
321 0x000288E0 SQ_VTX_SEMANTIC_CLEAR
322 0x0003CFF4 SQ_VTX_START_INST_LOC
323 0x0003C000 SQ_TEX_SAMPLER_WORD0_0
324 0x0003C004 SQ_TEX_SAMPLER_WORD1_0
325 0x0003C008 SQ_TEX_SAMPLER_WORD2_0
326 0x00030000 SQ_ALU_CONSTANT0_0
327 0x00030004 SQ_ALU_CONSTANT1_0
328 0x00030008 SQ_ALU_CONSTANT2_0
329 0x0003000C SQ_ALU_CONSTANT3_0
330 0x0003E380 SQ_BOOL_CONST_0
331 0x0003E384 SQ_BOOL_CONST_1
332 0x0003E388 SQ_BOOL_CONST_2
333 0x0003E200 SQ_LOOP_CONST_0
334 0x0003E200 SQ_LOOP_CONST_DX10_0
335 0x000281C0 SQ_ALU_CONST_BUFFER_SIZE_GS_0
336 0x000281C4 SQ_ALU_CONST_BUFFER_SIZE_GS_1
337 0x000281C8 SQ_ALU_CONST_BUFFER_SIZE_GS_2
338 0x000281CC SQ_ALU_CONST_BUFFER_SIZE_GS_3
339 0x000281D0 SQ_ALU_CONST_BUFFER_SIZE_GS_4
340 0x000281D4 SQ_ALU_CONST_BUFFER_SIZE_GS_5
341 0x000281D8 SQ_ALU_CONST_BUFFER_SIZE_GS_6
342 0x000281DC SQ_ALU_CONST_BUFFER_SIZE_GS_7
343 0x000281E0 SQ_ALU_CONST_BUFFER_SIZE_GS_8
344 0x000281E4 SQ_ALU_CONST_BUFFER_SIZE_GS_9
345 0x000281E8 SQ_ALU_CONST_BUFFER_SIZE_GS_10
346 0x000281EC SQ_ALU_CONST_BUFFER_SIZE_GS_11
347 0x000281F0 SQ_ALU_CONST_BUFFER_SIZE_GS_12
348 0x000281F4 SQ_ALU_CONST_BUFFER_SIZE_GS_13
349 0x000281F8 SQ_ALU_CONST_BUFFER_SIZE_GS_14
350 0x000281FC SQ_ALU_CONST_BUFFER_SIZE_GS_15
351 0x00028140 SQ_ALU_CONST_BUFFER_SIZE_PS_0
352 0x00028144 SQ_ALU_CONST_BUFFER_SIZE_PS_1
353 0x00028148 SQ_ALU_CONST_BUFFER_SIZE_PS_2
354 0x0002814C SQ_ALU_CONST_BUFFER_SIZE_PS_3
355 0x00028150 SQ_ALU_CONST_BUFFER_SIZE_PS_4
356 0x00028154 SQ_ALU_CONST_BUFFER_SIZE_PS_5
357 0x00028158 SQ_ALU_CONST_BUFFER_SIZE_PS_6
358 0x0002815C SQ_ALU_CONST_BUFFER_SIZE_PS_7
359 0x00028160 SQ_ALU_CONST_BUFFER_SIZE_PS_8
360 0x00028164 SQ_ALU_CONST_BUFFER_SIZE_PS_9
361 0x00028168 SQ_ALU_CONST_BUFFER_SIZE_PS_10
362 0x0002816C SQ_ALU_CONST_BUFFER_SIZE_PS_11
363 0x00028170 SQ_ALU_CONST_BUFFER_SIZE_PS_12
364 0x00028174 SQ_ALU_CONST_BUFFER_SIZE_PS_13
365 0x00028178 SQ_ALU_CONST_BUFFER_SIZE_PS_14
366 0x0002817C SQ_ALU_CONST_BUFFER_SIZE_PS_15
367 0x00028180 SQ_ALU_CONST_BUFFER_SIZE_VS_0
368 0x00028184 SQ_ALU_CONST_BUFFER_SIZE_VS_1
369 0x00028188 SQ_ALU_CONST_BUFFER_SIZE_VS_2
370 0x0002818C SQ_ALU_CONST_BUFFER_SIZE_VS_3
371 0x00028190 SQ_ALU_CONST_BUFFER_SIZE_VS_4
372 0x00028194 SQ_ALU_CONST_BUFFER_SIZE_VS_5
373 0x00028198 SQ_ALU_CONST_BUFFER_SIZE_VS_6
374 0x0002819C SQ_ALU_CONST_BUFFER_SIZE_VS_7
375 0x000281A0 SQ_ALU_CONST_BUFFER_SIZE_VS_8
376 0x000281A4 SQ_ALU_CONST_BUFFER_SIZE_VS_9
377 0x000281A8 SQ_ALU_CONST_BUFFER_SIZE_VS_10
378 0x000281AC SQ_ALU_CONST_BUFFER_SIZE_VS_11
379 0x000281B0 SQ_ALU_CONST_BUFFER_SIZE_VS_12
380 0x000281B4 SQ_ALU_CONST_BUFFER_SIZE_VS_13
381 0x000281B8 SQ_ALU_CONST_BUFFER_SIZE_VS_14
382 0x000281BC SQ_ALU_CONST_BUFFER_SIZE_VS_15
383 0x000289C0 SQ_ALU_CONST_CACHE_GS_0
384 0x000289C4 SQ_ALU_CONST_CACHE_GS_1
385 0x000289C8 SQ_ALU_CONST_CACHE_GS_2
386 0x000289CC SQ_ALU_CONST_CACHE_GS_3
387 0x000289D0 SQ_ALU_CONST_CACHE_GS_4
388 0x000289D4 SQ_ALU_CONST_CACHE_GS_5
389 0x000289D8 SQ_ALU_CONST_CACHE_GS_6
390 0x000289DC SQ_ALU_CONST_CACHE_GS_7
391 0x000289E0 SQ_ALU_CONST_CACHE_GS_8
392 0x000289E4 SQ_ALU_CONST_CACHE_GS_9
393 0x000289E8 SQ_ALU_CONST_CACHE_GS_10
394 0x000289EC SQ_ALU_CONST_CACHE_GS_11
395 0x000289F0 SQ_ALU_CONST_CACHE_GS_12
396 0x000289F4 SQ_ALU_CONST_CACHE_GS_13
397 0x000289F8 SQ_ALU_CONST_CACHE_GS_14
398 0x000289FC SQ_ALU_CONST_CACHE_GS_15
399 0x00028940 SQ_ALU_CONST_CACHE_PS_0
400 0x00028944 SQ_ALU_CONST_CACHE_PS_1
401 0x00028948 SQ_ALU_CONST_CACHE_PS_2
402 0x0002894C SQ_ALU_CONST_CACHE_PS_3
403 0x00028950 SQ_ALU_CONST_CACHE_PS_4
404 0x00028954 SQ_ALU_CONST_CACHE_PS_5
405 0x00028958 SQ_ALU_CONST_CACHE_PS_6
406 0x0002895C SQ_ALU_CONST_CACHE_PS_7
407 0x00028960 SQ_ALU_CONST_CACHE_PS_8
408 0x00028964 SQ_ALU_CONST_CACHE_PS_9
409 0x00028968 SQ_ALU_CONST_CACHE_PS_10
410 0x0002896C SQ_ALU_CONST_CACHE_PS_11
411 0x00028970 SQ_ALU_CONST_CACHE_PS_12
412 0x00028974 SQ_ALU_CONST_CACHE_PS_13
413 0x00028978 SQ_ALU_CONST_CACHE_PS_14
414 0x0002897C SQ_ALU_CONST_CACHE_PS_15
415 0x00028980 SQ_ALU_CONST_CACHE_VS_0
416 0x00028984 SQ_ALU_CONST_CACHE_VS_1
417 0x00028988 SQ_ALU_CONST_CACHE_VS_2
418 0x0002898C SQ_ALU_CONST_CACHE_VS_3
419 0x00028990 SQ_ALU_CONST_CACHE_VS_4
420 0x00028994 SQ_ALU_CONST_CACHE_VS_5
421 0x00028998 SQ_ALU_CONST_CACHE_VS_6
422 0x0002899C SQ_ALU_CONST_CACHE_VS_7
423 0x000289A0 SQ_ALU_CONST_CACHE_VS_8
424 0x000289A4 SQ_ALU_CONST_CACHE_VS_9
425 0x000289A8 SQ_ALU_CONST_CACHE_VS_10
426 0x000289AC SQ_ALU_CONST_CACHE_VS_11
427 0x000289B0 SQ_ALU_CONST_CACHE_VS_12
428 0x000289B4 SQ_ALU_CONST_CACHE_VS_13
429 0x000289B8 SQ_ALU_CONST_CACHE_VS_14
430 0x000289BC SQ_ALU_CONST_CACHE_VS_15
431 0x000288D8 SQ_PGM_CF_OFFSET_ES
432 0x000288DC SQ_PGM_CF_OFFSET_FS
433 0x000288D4 SQ_PGM_CF_OFFSET_GS
434 0x000288CC SQ_PGM_CF_OFFSET_PS
435 0x000288D0 SQ_PGM_CF_OFFSET_VS
436 0x00028854 SQ_PGM_EXPORTS_PS
437 0x00028890 SQ_PGM_RESOURCES_ES
438 0x000288A4 SQ_PGM_RESOURCES_FS
439 0x0002887C SQ_PGM_RESOURCES_GS
440 0x00028850 SQ_PGM_RESOURCES_PS
441 0x00028868 SQ_PGM_RESOURCES_VS
442 0x00009100 SPI_CONFIG_CNTL
443 0x0000913C SPI_CONFIG_CNTL_1
444 0x000286DC SPI_FOG_CNTL
445 0x000286E4 SPI_FOG_FUNC_BIAS
446 0x000286E0 SPI_FOG_FUNC_SCALE
447 0x000286D8 SPI_INPUT_Z
448 0x000286D4 SPI_INTERP_CONTROL_0
449 0x00028644 SPI_PS_INPUT_CNTL_0
450 0x00028648 SPI_PS_INPUT_CNTL_1
451 0x0002864C SPI_PS_INPUT_CNTL_2
452 0x00028650 SPI_PS_INPUT_CNTL_3
453 0x00028654 SPI_PS_INPUT_CNTL_4
454 0x00028658 SPI_PS_INPUT_CNTL_5
455 0x0002865C SPI_PS_INPUT_CNTL_6
456 0x00028660 SPI_PS_INPUT_CNTL_7
457 0x00028664 SPI_PS_INPUT_CNTL_8
458 0x00028668 SPI_PS_INPUT_CNTL_9
459 0x0002866C SPI_PS_INPUT_CNTL_10
460 0x00028670 SPI_PS_INPUT_CNTL_11
461 0x00028674 SPI_PS_INPUT_CNTL_12
462 0x00028678 SPI_PS_INPUT_CNTL_13
463 0x0002867C SPI_PS_INPUT_CNTL_14
464 0x00028680 SPI_PS_INPUT_CNTL_15
465 0x00028684 SPI_PS_INPUT_CNTL_16
466 0x00028688 SPI_PS_INPUT_CNTL_17
467 0x0002868C SPI_PS_INPUT_CNTL_18
468 0x00028690 SPI_PS_INPUT_CNTL_19
469 0x00028694 SPI_PS_INPUT_CNTL_20
470 0x00028698 SPI_PS_INPUT_CNTL_21
471 0x0002869C SPI_PS_INPUT_CNTL_22
472 0x000286A0 SPI_PS_INPUT_CNTL_23
473 0x000286A4 SPI_PS_INPUT_CNTL_24
474 0x000286A8 SPI_PS_INPUT_CNTL_25
475 0x000286AC SPI_PS_INPUT_CNTL_26
476 0x000286B0 SPI_PS_INPUT_CNTL_27
477 0x000286B4 SPI_PS_INPUT_CNTL_28
478 0x000286B8 SPI_PS_INPUT_CNTL_29
479 0x000286BC SPI_PS_INPUT_CNTL_30
480 0x000286C0 SPI_PS_INPUT_CNTL_31
481 0x000286CC SPI_PS_IN_CONTROL_0
482 0x000286D0 SPI_PS_IN_CONTROL_1
483 0x000286C4 SPI_VS_OUT_CONFIG
484 0x00028614 SPI_VS_OUT_ID_0
485 0x00028618 SPI_VS_OUT_ID_1
486 0x0002861C SPI_VS_OUT_ID_2
487 0x00028620 SPI_VS_OUT_ID_3
488 0x00028624 SPI_VS_OUT_ID_4
489 0x00028628 SPI_VS_OUT_ID_5
490 0x0002862C SPI_VS_OUT_ID_6
491 0x00028630 SPI_VS_OUT_ID_7
492 0x00028634 SPI_VS_OUT_ID_8
493 0x00028638 SPI_VS_OUT_ID_9
494 0x00028438 SX_ALPHA_REF
495 0x00028410 SX_ALPHA_TEST_CONTROL
496 0x00028350 SX_MISC
497 0x0000A020 SMX_DC_CTL0
498 0x0000A024 SMX_DC_CTL1
499 0x0000A028 SMX_DC_CTL2
500 0x00009608 TC_CNTL
501 0x00009604 TC_INVALIDATE
502 0x00009490 TD_CNTL
503 0x00009400 TD_FILTER4
504 0x00009404 TD_FILTER4_1
505 0x00009408 TD_FILTER4_2
506 0x0000940C TD_FILTER4_3
507 0x00009410 TD_FILTER4_4
508 0x00009414 TD_FILTER4_5
509 0x00009418 TD_FILTER4_6
510 0x0000941C TD_FILTER4_7
511 0x00009420 TD_FILTER4_8
512 0x00009424 TD_FILTER4_9
513 0x00009428 TD_FILTER4_10
514 0x0000942C TD_FILTER4_11
515 0x00009430 TD_FILTER4_12
516 0x00009434 TD_FILTER4_13
517 0x00009438 TD_FILTER4_14
518 0x0000943C TD_FILTER4_15
519 0x00009440 TD_FILTER4_16
520 0x00009444 TD_FILTER4_17
521 0x00009448 TD_FILTER4_18
522 0x0000944C TD_FILTER4_19
523 0x00009450 TD_FILTER4_20
524 0x00009454 TD_FILTER4_21
525 0x00009458 TD_FILTER4_22
526 0x0000945C TD_FILTER4_23
527 0x00009460 TD_FILTER4_24
528 0x00009464 TD_FILTER4_25
529 0x00009468 TD_FILTER4_26
530 0x0000946C TD_FILTER4_27
531 0x00009470 TD_FILTER4_28
532 0x00009474 TD_FILTER4_29
533 0x00009478 TD_FILTER4_30
534 0x0000947C TD_FILTER4_31
535 0x00009480 TD_FILTER4_32
536 0x00009484 TD_FILTER4_33
537 0x00009488 TD_FILTER4_34
538 0x0000948C TD_FILTER4_35
539 0x0000A80C TD_GS_SAMPLER0_BORDER_ALPHA
540 0x0000A81C TD_GS_SAMPLER1_BORDER_ALPHA
541 0x0000A82C TD_GS_SAMPLER2_BORDER_ALPHA
542 0x0000A83C TD_GS_SAMPLER3_BORDER_ALPHA
543 0x0000A84C TD_GS_SAMPLER4_BORDER_ALPHA
544 0x0000A85C TD_GS_SAMPLER5_BORDER_ALPHA
545 0x0000A86C TD_GS_SAMPLER6_BORDER_ALPHA
546 0x0000A87C TD_GS_SAMPLER7_BORDER_ALPHA
547 0x0000A88C TD_GS_SAMPLER8_BORDER_ALPHA
548 0x0000A89C TD_GS_SAMPLER9_BORDER_ALPHA
549 0x0000A8AC TD_GS_SAMPLER10_BORDER_ALPHA
550 0x0000A8BC TD_GS_SAMPLER11_BORDER_ALPHA
551 0x0000A8CC TD_GS_SAMPLER12_BORDER_ALPHA
552 0x0000A8DC TD_GS_SAMPLER13_BORDER_ALPHA
553 0x0000A8EC TD_GS_SAMPLER14_BORDER_ALPHA
554 0x0000A8FC TD_GS_SAMPLER15_BORDER_ALPHA
555 0x0000A90C TD_GS_SAMPLER16_BORDER_ALPHA
556 0x0000A91C TD_GS_SAMPLER17_BORDER_ALPHA
557 0x0000A808 TD_GS_SAMPLER0_BORDER_BLUE
558 0x0000A818 TD_GS_SAMPLER1_BORDER_BLUE
559 0x0000A828 TD_GS_SAMPLER2_BORDER_BLUE
560 0x0000A838 TD_GS_SAMPLER3_BORDER_BLUE
561 0x0000A848 TD_GS_SAMPLER4_BORDER_BLUE
562 0x0000A858 TD_GS_SAMPLER5_BORDER_BLUE
563 0x0000A868 TD_GS_SAMPLER6_BORDER_BLUE
564 0x0000A878 TD_GS_SAMPLER7_BORDER_BLUE
565 0x0000A888 TD_GS_SAMPLER8_BORDER_BLUE
566 0x0000A898 TD_GS_SAMPLER9_BORDER_BLUE
567 0x0000A8A8 TD_GS_SAMPLER10_BORDER_BLUE
568 0x0000A8B8 TD_GS_SAMPLER11_BORDER_BLUE
569 0x0000A8C8 TD_GS_SAMPLER12_BORDER_BLUE
570 0x0000A8D8 TD_GS_SAMPLER13_BORDER_BLUE
571 0x0000A8E8 TD_GS_SAMPLER14_BORDER_BLUE
572 0x0000A8F8 TD_GS_SAMPLER15_BORDER_BLUE
573 0x0000A908 TD_GS_SAMPLER16_BORDER_BLUE
574 0x0000A918 TD_GS_SAMPLER17_BORDER_BLUE
575 0x0000A804 TD_GS_SAMPLER0_BORDER_GREEN
576 0x0000A814 TD_GS_SAMPLER1_BORDER_GREEN
577 0x0000A824 TD_GS_SAMPLER2_BORDER_GREEN
578 0x0000A834 TD_GS_SAMPLER3_BORDER_GREEN
579 0x0000A844 TD_GS_SAMPLER4_BORDER_GREEN
580 0x0000A854 TD_GS_SAMPLER5_BORDER_GREEN
581 0x0000A864 TD_GS_SAMPLER6_BORDER_GREEN
582 0x0000A874 TD_GS_SAMPLER7_BORDER_GREEN
583 0x0000A884 TD_GS_SAMPLER8_BORDER_GREEN
584 0x0000A894 TD_GS_SAMPLER9_BORDER_GREEN
585 0x0000A8A4 TD_GS_SAMPLER10_BORDER_GREEN
586 0x0000A8B4 TD_GS_SAMPLER11_BORDER_GREEN
587 0x0000A8C4 TD_GS_SAMPLER12_BORDER_GREEN
588 0x0000A8D4 TD_GS_SAMPLER13_BORDER_GREEN
589 0x0000A8E4 TD_GS_SAMPLER14_BORDER_GREEN
590 0x0000A8F4 TD_GS_SAMPLER15_BORDER_GREEN
591 0x0000A904 TD_GS_SAMPLER16_BORDER_GREEN
592 0x0000A914 TD_GS_SAMPLER17_BORDER_GREEN
593 0x0000A800 TD_GS_SAMPLER0_BORDER_RED
594 0x0000A810 TD_GS_SAMPLER1_BORDER_RED
595 0x0000A820 TD_GS_SAMPLER2_BORDER_RED
596 0x0000A830 TD_GS_SAMPLER3_BORDER_RED
597 0x0000A840 TD_GS_SAMPLER4_BORDER_RED
598 0x0000A850 TD_GS_SAMPLER5_BORDER_RED
599 0x0000A860 TD_GS_SAMPLER6_BORDER_RED
600 0x0000A870 TD_GS_SAMPLER7_BORDER_RED
601 0x0000A880 TD_GS_SAMPLER8_BORDER_RED
602 0x0000A890 TD_GS_SAMPLER9_BORDER_RED
603 0x0000A8A0 TD_GS_SAMPLER10_BORDER_RED
604 0x0000A8B0 TD_GS_SAMPLER11_BORDER_RED
605 0x0000A8C0 TD_GS_SAMPLER12_BORDER_RED
606 0x0000A8D0 TD_GS_SAMPLER13_BORDER_RED
607 0x0000A8E0 TD_GS_SAMPLER14_BORDER_RED
608 0x0000A8F0 TD_GS_SAMPLER15_BORDER_RED
609 0x0000A900 TD_GS_SAMPLER16_BORDER_RED
610 0x0000A910 TD_GS_SAMPLER17_BORDER_RED
611 0x0000A40C TD_PS_SAMPLER0_BORDER_ALPHA
612 0x0000A41C TD_PS_SAMPLER1_BORDER_ALPHA
613 0x0000A42C TD_PS_SAMPLER2_BORDER_ALPHA
614 0x0000A43C TD_PS_SAMPLER3_BORDER_ALPHA
615 0x0000A44C TD_PS_SAMPLER4_BORDER_ALPHA
616 0x0000A45C TD_PS_SAMPLER5_BORDER_ALPHA
617 0x0000A46C TD_PS_SAMPLER6_BORDER_ALPHA
618 0x0000A47C TD_PS_SAMPLER7_BORDER_ALPHA
619 0x0000A48C TD_PS_SAMPLER8_BORDER_ALPHA
620 0x0000A49C TD_PS_SAMPLER9_BORDER_ALPHA
621 0x0000A4AC TD_PS_SAMPLER10_BORDER_ALPHA
622 0x0000A4BC TD_PS_SAMPLER11_BORDER_ALPHA
623 0x0000A4CC TD_PS_SAMPLER12_BORDER_ALPHA
624 0x0000A4DC TD_PS_SAMPLER13_BORDER_ALPHA
625 0x0000A4EC TD_PS_SAMPLER14_BORDER_ALPHA
626 0x0000A4FC TD_PS_SAMPLER15_BORDER_ALPHA
627 0x0000A50C TD_PS_SAMPLER16_BORDER_ALPHA
628 0x0000A51C TD_PS_SAMPLER17_BORDER_ALPHA
629 0x0000A408 TD_PS_SAMPLER0_BORDER_BLUE
630 0x0000A418 TD_PS_SAMPLER1_BORDER_BLUE
631 0x0000A428 TD_PS_SAMPLER2_BORDER_BLUE
632 0x0000A438 TD_PS_SAMPLER3_BORDER_BLUE
633 0x0000A448 TD_PS_SAMPLER4_BORDER_BLUE
634 0x0000A458 TD_PS_SAMPLER5_BORDER_BLUE
635 0x0000A468 TD_PS_SAMPLER6_BORDER_BLUE
636 0x0000A478 TD_PS_SAMPLER7_BORDER_BLUE
637 0x0000A488 TD_PS_SAMPLER8_BORDER_BLUE
638 0x0000A498 TD_PS_SAMPLER9_BORDER_BLUE
639 0x0000A4A8 TD_PS_SAMPLER10_BORDER_BLUE
640 0x0000A4B8 TD_PS_SAMPLER11_BORDER_BLUE
641 0x0000A4C8 TD_PS_SAMPLER12_BORDER_BLUE
642 0x0000A4D8 TD_PS_SAMPLER13_BORDER_BLUE
643 0x0000A4E8 TD_PS_SAMPLER14_BORDER_BLUE
644 0x0000A4F8 TD_PS_SAMPLER15_BORDER_BLUE
645 0x0000A508 TD_PS_SAMPLER16_BORDER_BLUE
646 0x0000A518 TD_PS_SAMPLER17_BORDER_BLUE
647 0x0000A404 TD_PS_SAMPLER0_BORDER_GREEN
648 0x0000A414 TD_PS_SAMPLER1_BORDER_GREEN
649 0x0000A424 TD_PS_SAMPLER2_BORDER_GREEN
650 0x0000A434 TD_PS_SAMPLER3_BORDER_GREEN
651 0x0000A444 TD_PS_SAMPLER4_BORDER_GREEN
652 0x0000A454 TD_PS_SAMPLER5_BORDER_GREEN
653 0x0000A464 TD_PS_SAMPLER6_BORDER_GREEN
654 0x0000A474 TD_PS_SAMPLER7_BORDER_GREEN
655 0x0000A484 TD_PS_SAMPLER8_BORDER_GREEN
656 0x0000A494 TD_PS_SAMPLER9_BORDER_GREEN
657 0x0000A4A4 TD_PS_SAMPLER10_BORDER_GREEN
658 0x0000A4B4 TD_PS_SAMPLER11_BORDER_GREEN
659 0x0000A4C4 TD_PS_SAMPLER12_BORDER_GREEN
660 0x0000A4D4 TD_PS_SAMPLER13_BORDER_GREEN
661 0x0000A4E4 TD_PS_SAMPLER14_BORDER_GREEN
662 0x0000A4F4 TD_PS_SAMPLER15_BORDER_GREEN
663 0x0000A504 TD_PS_SAMPLER16_BORDER_GREEN
664 0x0000A514 TD_PS_SAMPLER17_BORDER_GREEN
665 0x0000A400 TD_PS_SAMPLER0_BORDER_RED
666 0x0000A410 TD_PS_SAMPLER1_BORDER_RED
667 0x0000A420 TD_PS_SAMPLER2_BORDER_RED
668 0x0000A430 TD_PS_SAMPLER3_BORDER_RED
669 0x0000A440 TD_PS_SAMPLER4_BORDER_RED
670 0x0000A450 TD_PS_SAMPLER5_BORDER_RED
671 0x0000A460 TD_PS_SAMPLER6_BORDER_RED
672 0x0000A470 TD_PS_SAMPLER7_BORDER_RED
673 0x0000A480 TD_PS_SAMPLER8_BORDER_RED
674 0x0000A490 TD_PS_SAMPLER9_BORDER_RED
675 0x0000A4A0 TD_PS_SAMPLER10_BORDER_RED
676 0x0000A4B0 TD_PS_SAMPLER11_BORDER_RED
677 0x0000A4C0 TD_PS_SAMPLER12_BORDER_RED
678 0x0000A4D0 TD_PS_SAMPLER13_BORDER_RED
679 0x0000A4E0 TD_PS_SAMPLER14_BORDER_RED
680 0x0000A4F0 TD_PS_SAMPLER15_BORDER_RED
681 0x0000A500 TD_PS_SAMPLER16_BORDER_RED
682 0x0000A510 TD_PS_SAMPLER17_BORDER_RED
683 0x0000AA00 TD_PS_SAMPLER0_CLEARTYPE_KERNEL
684 0x0000AA04 TD_PS_SAMPLER1_CLEARTYPE_KERNEL
685 0x0000AA08 TD_PS_SAMPLER2_CLEARTYPE_KERNEL
686 0x0000AA0C TD_PS_SAMPLER3_CLEARTYPE_KERNEL
687 0x0000AA10 TD_PS_SAMPLER4_CLEARTYPE_KERNEL
688 0x0000AA14 TD_PS_SAMPLER5_CLEARTYPE_KERNEL
689 0x0000AA18 TD_PS_SAMPLER6_CLEARTYPE_KERNEL
690 0x0000AA1C TD_PS_SAMPLER7_CLEARTYPE_KERNEL
691 0x0000AA20 TD_PS_SAMPLER8_CLEARTYPE_KERNEL
692 0x0000AA24 TD_PS_SAMPLER9_CLEARTYPE_KERNEL
693 0x0000AA28 TD_PS_SAMPLER10_CLEARTYPE_KERNEL
694 0x0000AA2C TD_PS_SAMPLER11_CLEARTYPE_KERNEL
695 0x0000AA30 TD_PS_SAMPLER12_CLEARTYPE_KERNEL
696 0x0000AA34 TD_PS_SAMPLER13_CLEARTYPE_KERNEL
697 0x0000AA38 TD_PS_SAMPLER14_CLEARTYPE_KERNEL
698 0x0000AA3C TD_PS_SAMPLER15_CLEARTYPE_KERNEL
699 0x0000AA40 TD_PS_SAMPLER16_CLEARTYPE_KERNEL
700 0x0000AA44 TD_PS_SAMPLER17_CLEARTYPE_KERNEL
701 0x0000A60C TD_VS_SAMPLER0_BORDER_ALPHA
702 0x0000A61C TD_VS_SAMPLER1_BORDER_ALPHA
703 0x0000A62C TD_VS_SAMPLER2_BORDER_ALPHA
704 0x0000A63C TD_VS_SAMPLER3_BORDER_ALPHA
705 0x0000A64C TD_VS_SAMPLER4_BORDER_ALPHA
706 0x0000A65C TD_VS_SAMPLER5_BORDER_ALPHA
707 0x0000A66C TD_VS_SAMPLER6_BORDER_ALPHA
708 0x0000A67C TD_VS_SAMPLER7_BORDER_ALPHA
709 0x0000A68C TD_VS_SAMPLER8_BORDER_ALPHA
710 0x0000A69C TD_VS_SAMPLER9_BORDER_ALPHA
711 0x0000A6AC TD_VS_SAMPLER10_BORDER_ALPHA
712 0x0000A6BC TD_VS_SAMPLER11_BORDER_ALPHA
713 0x0000A6CC TD_VS_SAMPLER12_BORDER_ALPHA
714 0x0000A6DC TD_VS_SAMPLER13_BORDER_ALPHA
715 0x0000A6EC TD_VS_SAMPLER14_BORDER_ALPHA
716 0x0000A6FC TD_VS_SAMPLER15_BORDER_ALPHA
717 0x0000A70C TD_VS_SAMPLER16_BORDER_ALPHA
718 0x0000A71C TD_VS_SAMPLER17_BORDER_ALPHA
719 0x0000A608 TD_VS_SAMPLER0_BORDER_BLUE
720 0x0000A618 TD_VS_SAMPLER1_BORDER_BLUE
721 0x0000A628 TD_VS_SAMPLER2_BORDER_BLUE
722 0x0000A638 TD_VS_SAMPLER3_BORDER_BLUE
723 0x0000A648 TD_VS_SAMPLER4_BORDER_BLUE
724 0x0000A658 TD_VS_SAMPLER5_BORDER_BLUE
725 0x0000A668 TD_VS_SAMPLER6_BORDER_BLUE
726 0x0000A678 TD_VS_SAMPLER7_BORDER_BLUE
727 0x0000A688 TD_VS_SAMPLER8_BORDER_BLUE
728 0x0000A698 TD_VS_SAMPLER9_BORDER_BLUE
729 0x0000A6A8 TD_VS_SAMPLER10_BORDER_BLUE
730 0x0000A6B8 TD_VS_SAMPLER11_BORDER_BLUE
731 0x0000A6C8 TD_VS_SAMPLER12_BORDER_BLUE
732 0x0000A6D8 TD_VS_SAMPLER13_BORDER_BLUE
733 0x0000A6E8 TD_VS_SAMPLER14_BORDER_BLUE
734 0x0000A6F8 TD_VS_SAMPLER15_BORDER_BLUE
735 0x0000A708 TD_VS_SAMPLER16_BORDER_BLUE
736 0x0000A718 TD_VS_SAMPLER17_BORDER_BLUE
737 0x0000A604 TD_VS_SAMPLER0_BORDER_GREEN
738 0x0000A614 TD_VS_SAMPLER1_BORDER_GREEN
739 0x0000A624 TD_VS_SAMPLER2_BORDER_GREEN
740 0x0000A634 TD_VS_SAMPLER3_BORDER_GREEN
741 0x0000A644 TD_VS_SAMPLER4_BORDER_GREEN
742 0x0000A654 TD_VS_SAMPLER5_BORDER_GREEN
743 0x0000A664 TD_VS_SAMPLER6_BORDER_GREEN
744 0x0000A674 TD_VS_SAMPLER7_BORDER_GREEN
745 0x0000A684 TD_VS_SAMPLER8_BORDER_GREEN
746 0x0000A694 TD_VS_SAMPLER9_BORDER_GREEN
747 0x0000A6A4 TD_VS_SAMPLER10_BORDER_GREEN
748 0x0000A6B4 TD_VS_SAMPLER11_BORDER_GREEN
749 0x0000A6C4 TD_VS_SAMPLER12_BORDER_GREEN
750 0x0000A6D4 TD_VS_SAMPLER13_BORDER_GREEN
751 0x0000A6E4 TD_VS_SAMPLER14_BORDER_GREEN
752 0x0000A6F4 TD_VS_SAMPLER15_BORDER_GREEN
753 0x0000A704 TD_VS_SAMPLER16_BORDER_GREEN
754 0x0000A714 TD_VS_SAMPLER17_BORDER_GREEN
755 0x0000A600 TD_VS_SAMPLER0_BORDER_RED
756 0x0000A610 TD_VS_SAMPLER1_BORDER_RED
757 0x0000A620 TD_VS_SAMPLER2_BORDER_RED
758 0x0000A630 TD_VS_SAMPLER3_BORDER_RED
759 0x0000A640 TD_VS_SAMPLER4_BORDER_RED
760 0x0000A650 TD_VS_SAMPLER5_BORDER_RED
761 0x0000A660 TD_VS_SAMPLER6_BORDER_RED
762 0x0000A670 TD_VS_SAMPLER7_BORDER_RED
763 0x0000A680 TD_VS_SAMPLER8_BORDER_RED
764 0x0000A690 TD_VS_SAMPLER9_BORDER_RED
765 0x0000A6A0 TD_VS_SAMPLER10_BORDER_RED
766 0x0000A6B0 TD_VS_SAMPLER11_BORDER_RED
767 0x0000A6C0 TD_VS_SAMPLER12_BORDER_RED
768 0x0000A6D0 TD_VS_SAMPLER13_BORDER_RED
769 0x0000A6E0 TD_VS_SAMPLER14_BORDER_RED
770 0x0000A6F0 TD_VS_SAMPLER15_BORDER_RED
771 0x0000A700 TD_VS_SAMPLER16_BORDER_RED
772 0x0000A710 TD_VS_SAMPLER17_BORDER_RED
773 0x00009508 TA_CNTL_AUX
774 0x0002802C DB_DEPTH_CLEAR
775 0x00028D24 DB_HTILE_SURFACE
776 0x00028D34 DB_PREFETCH_LIMIT
777 0x00028D30 DB_PRELOAD_CONTROL
778 0x00028D0C DB_RENDER_CONTROL
779 0x00028D10 DB_RENDER_OVERRIDE
780 0x0002880C DB_SHADER_CONTROL
781 0x00028D2C DB_SRESULTS_COMPARE_STATE1
782 0x00028430 DB_STENCILREFMASK
783 0x00028434 DB_STENCILREFMASK_BF
784 0x00028028 DB_STENCIL_CLEAR
785 0x00028780 CB_BLEND0_CONTROL
786 0x00028784 CB_BLEND1_CONTROL
787 0x00028788 CB_BLEND2_CONTROL
788 0x0002878C CB_BLEND3_CONTROL
789 0x00028790 CB_BLEND4_CONTROL
790 0x00028794 CB_BLEND5_CONTROL
791 0x00028798 CB_BLEND6_CONTROL
792 0x0002879C CB_BLEND7_CONTROL
793 0x00028804 CB_BLEND_CONTROL
794 0x00028420 CB_BLEND_ALPHA
795 0x0002841C CB_BLEND_BLUE
796 0x00028418 CB_BLEND_GREEN
797 0x00028414 CB_BLEND_RED
798 0x0002812C CB_CLEAR_ALPHA
799 0x00028128 CB_CLEAR_BLUE
800 0x00028124 CB_CLEAR_GREEN
801 0x00028120 CB_CLEAR_RED
802 0x00028C30 CB_CLRCMP_CONTROL
803 0x00028C38 CB_CLRCMP_DST
804 0x00028C3C CB_CLRCMP_MSK
805 0x00028C34 CB_CLRCMP_SRC
806 0x00028100 CB_COLOR0_MASK
807 0x00028104 CB_COLOR1_MASK
808 0x00028108 CB_COLOR2_MASK
809 0x0002810C CB_COLOR3_MASK
810 0x00028110 CB_COLOR4_MASK
811 0x00028114 CB_COLOR5_MASK
812 0x00028118 CB_COLOR6_MASK
813 0x0002811C CB_COLOR7_MASK
814 0x00028080 CB_COLOR0_VIEW
815 0x00028084 CB_COLOR1_VIEW
816 0x00028088 CB_COLOR2_VIEW
817 0x0002808C CB_COLOR3_VIEW
818 0x00028090 CB_COLOR4_VIEW
819 0x00028094 CB_COLOR5_VIEW
820 0x00028098 CB_COLOR6_VIEW
821 0x0002809C CB_COLOR7_VIEW
822 0x00028808 CB_COLOR_CONTROL
823 0x0002842C CB_FOG_BLUE
824 0x00028428 CB_FOG_GREEN
825 0x00028424 CB_FOG_RED
826 0x00008040 WAIT_UNTIL
827 0x00009714 VC_ENHANCE
828 0x00009830 DB_DEBUG
829 0x00009838 DB_WATERMARKS
830 0x00028D28 DB_SRESULTS_COMPARE_STATE0
831 0x00028D44 DB_ALPHA_TO_MASK
832 0x00009504 TA_CNTL
833 0x00009700 VC_CNTL
834 0x00009718 VC_CONFIG