drm/radeon: add support for evergreen/ni tiling informations v11
[linux-2.6.git] / drivers / gpu / drm / radeon / reg_srcs / evergreen
1 evergreen 0x9400
2 0x0000802C GRBM_GFX_INDEX
3 0x00008040 WAIT_UNTIL
4 0x00008044 WAIT_UNTIL_POLL_CNTL
5 0x00008048 WAIT_UNTIL_POLL_MASK
6 0x0000804c WAIT_UNTIL_POLL_REFDATA
7 0x000084FC CP_STRMOUT_CNTL
8 0x000085F0 CP_COHER_CNTL
9 0x000085F4 CP_COHER_SIZE
10 0x000088B0 VGT_VTX_VECT_EJECT_REG
11 0x000088C4 VGT_CACHE_INVALIDATION
12 0x000088D4 VGT_GS_VERTEX_REUSE
13 0x00008958 VGT_PRIMITIVE_TYPE
14 0x0000895C VGT_INDEX_TYPE
15 0x00008970 VGT_NUM_INDICES
16 0x00008974 VGT_NUM_INSTANCES
17 0x00008990 VGT_COMPUTE_DIM_X
18 0x00008994 VGT_COMPUTE_DIM_Y
19 0x00008998 VGT_COMPUTE_DIM_Z
20 0x0000899C VGT_COMPUTE_START_X
21 0x000089A0 VGT_COMPUTE_START_Y
22 0x000089A4 VGT_COMPUTE_START_Z
23 0x000089AC VGT_COMPUTE_THREAD_GOURP_SIZE
24 0x00008A14 PA_CL_ENHANCE
25 0x00008A60 PA_SC_LINE_STIPPLE_VALUE
26 0x00008B10 PA_SC_LINE_STIPPLE_STATE
27 0x00008BF0 PA_SC_ENHANCE
28 0x00008D8C SQ_DYN_GPR_CNTL_PS_FLUSH_REQ
29 0x00008D90 SQ_DYN_GPR_OPTIMIZATION
30 0x00008D94 SQ_DYN_GPR_SIMD_LOCK_EN
31 0x00008D98 SQ_DYN_GPR_THREAD_LIMIT
32 0x00008D9C SQ_DYN_GPR_LDS_LIMIT
33 0x00008C00 SQ_CONFIG
34 0x00008C04 SQ_GPR_RESOURCE_MGMT_1
35 0x00008C08 SQ_GPR_RESOURCE_MGMT_2
36 0x00008C0C SQ_GPR_RESOURCE_MGMT_3
37 0x00008C10 SQ_GLOBAL_GPR_RESOURCE_MGMT_1
38 0x00008C14 SQ_GLOBAL_GPR_RESOURCE_MGMT_2
39 0x00008C18 SQ_THREAD_RESOURCE_MGMT
40 0x00008C1C SQ_THREAD_RESOURCE_MGMT_2
41 0x00008C20 SQ_STACK_RESOURCE_MGMT_1
42 0x00008C24 SQ_STACK_RESOURCE_MGMT_2
43 0x00008C28 SQ_STACK_RESOURCE_MGMT_3
44 0x00008DF8 SQ_CONST_MEM_BASE
45 0x00008E20 SQ_STATIC_THREAD_MGMT_1
46 0x00008E24 SQ_STATIC_THREAD_MGMT_2
47 0x00008E28 SQ_STATIC_THREAD_MGMT_3
48 0x00008E2C SQ_LDS_RESOURCE_MGMT
49 0x00008E48 SQ_EX_ALLOC_TABLE_SLOTS
50 0x00009014 SX_MEMORY_EXPORT_SIZE
51 0x00009100 SPI_CONFIG_CNTL
52 0x0000913C SPI_CONFIG_CNTL_1
53 0x00009508 TA_CNTL_AUX
54 0x00009700 VC_CNTL
55 0x00009714 VC_ENHANCE
56 0x00009830 DB_DEBUG
57 0x00009834 DB_DEBUG2
58 0x00009838 DB_DEBUG3
59 0x0000983C DB_DEBUG4
60 0x00009854 DB_WATERMARKS
61 0x0000A400 TD_PS_BORDER_COLOR_INDEX
62 0x0000A404 TD_PS_BORDER_COLOR_RED
63 0x0000A408 TD_PS_BORDER_COLOR_GREEN
64 0x0000A40C TD_PS_BORDER_COLOR_BLUE
65 0x0000A410 TD_PS_BORDER_COLOR_ALPHA
66 0x0000A414 TD_VS_BORDER_COLOR_INDEX
67 0x0000A418 TD_VS_BORDER_COLOR_RED
68 0x0000A41C TD_VS_BORDER_COLOR_GREEN
69 0x0000A420 TD_VS_BORDER_COLOR_BLUE
70 0x0000A424 TD_VS_BORDER_COLOR_ALPHA
71 0x0000A428 TD_GS_BORDER_COLOR_INDEX
72 0x0000A42C TD_GS_BORDER_COLOR_RED
73 0x0000A430 TD_GS_BORDER_COLOR_GREEN
74 0x0000A434 TD_GS_BORDER_COLOR_BLUE
75 0x0000A438 TD_GS_BORDER_COLOR_ALPHA
76 0x0000A43C TD_HS_BORDER_COLOR_INDEX
77 0x0000A440 TD_HS_BORDER_COLOR_RED
78 0x0000A444 TD_HS_BORDER_COLOR_GREEN
79 0x0000A448 TD_HS_BORDER_COLOR_BLUE
80 0x0000A44C TD_HS_BORDER_COLOR_ALPHA
81 0x0000A450 TD_LS_BORDER_COLOR_INDEX
82 0x0000A454 TD_LS_BORDER_COLOR_RED
83 0x0000A458 TD_LS_BORDER_COLOR_GREEN
84 0x0000A45C TD_LS_BORDER_COLOR_BLUE
85 0x0000A460 TD_LS_BORDER_COLOR_ALPHA
86 0x0000A464 TD_CS_BORDER_COLOR_INDEX
87 0x0000A468 TD_CS_BORDER_COLOR_RED
88 0x0000A46C TD_CS_BORDER_COLOR_GREEN
89 0x0000A470 TD_CS_BORDER_COLOR_BLUE
90 0x0000A474 TD_CS_BORDER_COLOR_ALPHA
91 0x00028000 DB_RENDER_CONTROL
92 0x00028004 DB_COUNT_CONTROL
93 0x0002800C DB_RENDER_OVERRIDE
94 0x00028010 DB_RENDER_OVERRIDE2
95 0x00028028 DB_STENCIL_CLEAR
96 0x0002802C DB_DEPTH_CLEAR
97 0x00028030 PA_SC_SCREEN_SCISSOR_TL
98 0x00028034 PA_SC_SCREEN_SCISSOR_BR
99 0x00028140 SQ_ALU_CONST_BUFFER_SIZE_PS_0
100 0x00028144 SQ_ALU_CONST_BUFFER_SIZE_PS_1
101 0x00028148 SQ_ALU_CONST_BUFFER_SIZE_PS_2
102 0x0002814C SQ_ALU_CONST_BUFFER_SIZE_PS_3
103 0x00028150 SQ_ALU_CONST_BUFFER_SIZE_PS_4
104 0x00028154 SQ_ALU_CONST_BUFFER_SIZE_PS_5
105 0x00028158 SQ_ALU_CONST_BUFFER_SIZE_PS_6
106 0x0002815C SQ_ALU_CONST_BUFFER_SIZE_PS_7
107 0x00028160 SQ_ALU_CONST_BUFFER_SIZE_PS_8
108 0x00028164 SQ_ALU_CONST_BUFFER_SIZE_PS_9
109 0x00028168 SQ_ALU_CONST_BUFFER_SIZE_PS_10
110 0x0002816C SQ_ALU_CONST_BUFFER_SIZE_PS_11
111 0x00028170 SQ_ALU_CONST_BUFFER_SIZE_PS_12
112 0x00028174 SQ_ALU_CONST_BUFFER_SIZE_PS_13
113 0x00028178 SQ_ALU_CONST_BUFFER_SIZE_PS_14
114 0x0002817C SQ_ALU_CONST_BUFFER_SIZE_PS_15
115 0x00028180 SQ_ALU_CONST_BUFFER_SIZE_VS_0
116 0x00028184 SQ_ALU_CONST_BUFFER_SIZE_VS_1
117 0x00028188 SQ_ALU_CONST_BUFFER_SIZE_VS_2
118 0x0002818C SQ_ALU_CONST_BUFFER_SIZE_VS_3
119 0x00028190 SQ_ALU_CONST_BUFFER_SIZE_VS_4
120 0x00028194 SQ_ALU_CONST_BUFFER_SIZE_VS_5
121 0x00028198 SQ_ALU_CONST_BUFFER_SIZE_VS_6
122 0x0002819C SQ_ALU_CONST_BUFFER_SIZE_VS_7
123 0x000281A0 SQ_ALU_CONST_BUFFER_SIZE_VS_8
124 0x000281A4 SQ_ALU_CONST_BUFFER_SIZE_VS_9
125 0x000281A8 SQ_ALU_CONST_BUFFER_SIZE_VS_10
126 0x000281AC SQ_ALU_CONST_BUFFER_SIZE_VS_11
127 0x000281B0 SQ_ALU_CONST_BUFFER_SIZE_VS_12
128 0x000281B4 SQ_ALU_CONST_BUFFER_SIZE_VS_13
129 0x000281B8 SQ_ALU_CONST_BUFFER_SIZE_VS_14
130 0x000281BC SQ_ALU_CONST_BUFFER_SIZE_VS_15
131 0x000281C0 SQ_ALU_CONST_BUFFER_SIZE_GS_0
132 0x000281C4 SQ_ALU_CONST_BUFFER_SIZE_GS_1
133 0x000281C8 SQ_ALU_CONST_BUFFER_SIZE_GS_2
134 0x000281CC SQ_ALU_CONST_BUFFER_SIZE_GS_3
135 0x000281D0 SQ_ALU_CONST_BUFFER_SIZE_GS_4
136 0x000281D4 SQ_ALU_CONST_BUFFER_SIZE_GS_5
137 0x000281D8 SQ_ALU_CONST_BUFFER_SIZE_GS_6
138 0x000281DC SQ_ALU_CONST_BUFFER_SIZE_GS_7
139 0x000281E0 SQ_ALU_CONST_BUFFER_SIZE_GS_8
140 0x000281E4 SQ_ALU_CONST_BUFFER_SIZE_GS_9
141 0x000281E8 SQ_ALU_CONST_BUFFER_SIZE_GS_10
142 0x000281EC SQ_ALU_CONST_BUFFER_SIZE_GS_11
143 0x000281F0 SQ_ALU_CONST_BUFFER_SIZE_GS_12
144 0x000281F4 SQ_ALU_CONST_BUFFER_SIZE_GS_13
145 0x000281F8 SQ_ALU_CONST_BUFFER_SIZE_GS_14
146 0x000281FC SQ_ALU_CONST_BUFFER_SIZE_GS_15
147 0x00028200 PA_SC_WINDOW_OFFSET
148 0x00028204 PA_SC_WINDOW_SCISSOR_TL
149 0x00028208 PA_SC_WINDOW_SCISSOR_BR
150 0x0002820C PA_SC_CLIPRECT_RULE
151 0x00028210 PA_SC_CLIPRECT_0_TL
152 0x00028214 PA_SC_CLIPRECT_0_BR
153 0x00028218 PA_SC_CLIPRECT_1_TL
154 0x0002821C PA_SC_CLIPRECT_1_BR
155 0x00028220 PA_SC_CLIPRECT_2_TL
156 0x00028224 PA_SC_CLIPRECT_2_BR
157 0x00028228 PA_SC_CLIPRECT_3_TL
158 0x0002822C PA_SC_CLIPRECT_3_BR
159 0x00028230 PA_SC_EDGERULE
160 0x00028234 PA_SU_HARDWARE_SCREEN_OFFSET
161 0x00028240 PA_SC_GENERIC_SCISSOR_TL
162 0x00028244 PA_SC_GENERIC_SCISSOR_BR
163 0x00028250 PA_SC_VPORT_SCISSOR_0_TL
164 0x00028254 PA_SC_VPORT_SCISSOR_0_BR
165 0x00028258 PA_SC_VPORT_SCISSOR_1_TL
166 0x0002825C PA_SC_VPORT_SCISSOR_1_BR
167 0x00028260 PA_SC_VPORT_SCISSOR_2_TL
168 0x00028264 PA_SC_VPORT_SCISSOR_2_BR
169 0x00028268 PA_SC_VPORT_SCISSOR_3_TL
170 0x0002826C PA_SC_VPORT_SCISSOR_3_BR
171 0x00028270 PA_SC_VPORT_SCISSOR_4_TL
172 0x00028274 PA_SC_VPORT_SCISSOR_4_BR
173 0x00028278 PA_SC_VPORT_SCISSOR_5_TL
174 0x0002827C PA_SC_VPORT_SCISSOR_5_BR
175 0x00028280 PA_SC_VPORT_SCISSOR_6_TL
176 0x00028284 PA_SC_VPORT_SCISSOR_6_BR
177 0x00028288 PA_SC_VPORT_SCISSOR_7_TL
178 0x0002828C PA_SC_VPORT_SCISSOR_7_BR
179 0x00028290 PA_SC_VPORT_SCISSOR_8_TL
180 0x00028294 PA_SC_VPORT_SCISSOR_8_BR
181 0x00028298 PA_SC_VPORT_SCISSOR_9_TL
182 0x0002829C PA_SC_VPORT_SCISSOR_9_BR
183 0x000282A0 PA_SC_VPORT_SCISSOR_10_TL
184 0x000282A4 PA_SC_VPORT_SCISSOR_10_BR
185 0x000282A8 PA_SC_VPORT_SCISSOR_11_TL
186 0x000282AC PA_SC_VPORT_SCISSOR_11_BR
187 0x000282B0 PA_SC_VPORT_SCISSOR_12_TL
188 0x000282B4 PA_SC_VPORT_SCISSOR_12_BR
189 0x000282B8 PA_SC_VPORT_SCISSOR_13_TL
190 0x000282BC PA_SC_VPORT_SCISSOR_13_BR
191 0x000282C0 PA_SC_VPORT_SCISSOR_14_TL
192 0x000282C4 PA_SC_VPORT_SCISSOR_14_BR
193 0x000282C8 PA_SC_VPORT_SCISSOR_15_TL
194 0x000282CC PA_SC_VPORT_SCISSOR_15_BR
195 0x000282D0 PA_SC_VPORT_ZMIN_0
196 0x000282D4 PA_SC_VPORT_ZMAX_0
197 0x000282D8 PA_SC_VPORT_ZMIN_1
198 0x000282DC PA_SC_VPORT_ZMAX_1
199 0x000282E0 PA_SC_VPORT_ZMIN_2
200 0x000282E4 PA_SC_VPORT_ZMAX_2
201 0x000282E8 PA_SC_VPORT_ZMIN_3
202 0x000282EC PA_SC_VPORT_ZMAX_3
203 0x000282F0 PA_SC_VPORT_ZMIN_4
204 0x000282F4 PA_SC_VPORT_ZMAX_4
205 0x000282F8 PA_SC_VPORT_ZMIN_5
206 0x000282FC PA_SC_VPORT_ZMAX_5
207 0x00028300 PA_SC_VPORT_ZMIN_6
208 0x00028304 PA_SC_VPORT_ZMAX_6
209 0x00028308 PA_SC_VPORT_ZMIN_7
210 0x0002830C PA_SC_VPORT_ZMAX_7
211 0x00028310 PA_SC_VPORT_ZMIN_8
212 0x00028314 PA_SC_VPORT_ZMAX_8
213 0x00028318 PA_SC_VPORT_ZMIN_9
214 0x0002831C PA_SC_VPORT_ZMAX_9
215 0x00028320 PA_SC_VPORT_ZMIN_10
216 0x00028324 PA_SC_VPORT_ZMAX_10
217 0x00028328 PA_SC_VPORT_ZMIN_11
218 0x0002832C PA_SC_VPORT_ZMAX_11
219 0x00028330 PA_SC_VPORT_ZMIN_12
220 0x00028334 PA_SC_VPORT_ZMAX_12
221 0x00028338 PA_SC_VPORT_ZMIN_13
222 0x0002833C PA_SC_VPORT_ZMAX_13
223 0x00028340 PA_SC_VPORT_ZMIN_14
224 0x00028344 PA_SC_VPORT_ZMAX_14
225 0x00028348 PA_SC_VPORT_ZMIN_15
226 0x0002834C PA_SC_VPORT_ZMAX_15
227 0x00028350 SX_MISC
228 0x00028354 SX_SURFACE_SYNC
229 0x00028380 SQ_VTX_SEMANTIC_0
230 0x00028384 SQ_VTX_SEMANTIC_1
231 0x00028388 SQ_VTX_SEMANTIC_2
232 0x0002838C SQ_VTX_SEMANTIC_3
233 0x00028390 SQ_VTX_SEMANTIC_4
234 0x00028394 SQ_VTX_SEMANTIC_5
235 0x00028398 SQ_VTX_SEMANTIC_6
236 0x0002839C SQ_VTX_SEMANTIC_7
237 0x000283A0 SQ_VTX_SEMANTIC_8
238 0x000283A4 SQ_VTX_SEMANTIC_9
239 0x000283A8 SQ_VTX_SEMANTIC_10
240 0x000283AC SQ_VTX_SEMANTIC_11
241 0x000283B0 SQ_VTX_SEMANTIC_12
242 0x000283B4 SQ_VTX_SEMANTIC_13
243 0x000283B8 SQ_VTX_SEMANTIC_14
244 0x000283BC SQ_VTX_SEMANTIC_15
245 0x000283C0 SQ_VTX_SEMANTIC_16
246 0x000283C4 SQ_VTX_SEMANTIC_17
247 0x000283C8 SQ_VTX_SEMANTIC_18
248 0x000283CC SQ_VTX_SEMANTIC_19
249 0x000283D0 SQ_VTX_SEMANTIC_20
250 0x000283D4 SQ_VTX_SEMANTIC_21
251 0x000283D8 SQ_VTX_SEMANTIC_22
252 0x000283DC SQ_VTX_SEMANTIC_23
253 0x000283E0 SQ_VTX_SEMANTIC_24
254 0x000283E4 SQ_VTX_SEMANTIC_25
255 0x000283E8 SQ_VTX_SEMANTIC_26
256 0x000283EC SQ_VTX_SEMANTIC_27
257 0x000283F0 SQ_VTX_SEMANTIC_28
258 0x000283F4 SQ_VTX_SEMANTIC_29
259 0x000283F8 SQ_VTX_SEMANTIC_30
260 0x000283FC SQ_VTX_SEMANTIC_31
261 0x00028400 VGT_MAX_VTX_INDX
262 0x00028404 VGT_MIN_VTX_INDX
263 0x00028408 VGT_INDX_OFFSET
264 0x0002840C VGT_MULTI_PRIM_IB_RESET_INDX
265 0x00028410 SX_ALPHA_TEST_CONTROL
266 0x00028414 CB_BLEND_RED
267 0x00028418 CB_BLEND_GREEN
268 0x0002841C CB_BLEND_BLUE
269 0x00028420 CB_BLEND_ALPHA
270 0x00028430 DB_STENCILREFMASK
271 0x00028434 DB_STENCILREFMASK_BF
272 0x00028438 SX_ALPHA_REF
273 0x0002843C PA_CL_VPORT_XSCALE_0
274 0x00028440 PA_CL_VPORT_XOFFSET_0
275 0x00028444 PA_CL_VPORT_YSCALE_0
276 0x00028448 PA_CL_VPORT_YOFFSET_0
277 0x0002844C PA_CL_VPORT_ZSCALE_0
278 0x00028450 PA_CL_VPORT_ZOFFSET_0
279 0x00028454 PA_CL_VPORT_XSCALE_1
280 0x00028458 PA_CL_VPORT_XOFFSET_1
281 0x0002845C PA_CL_VPORT_YSCALE_1
282 0x00028460 PA_CL_VPORT_YOFFSET_1
283 0x00028464 PA_CL_VPORT_ZSCALE_1
284 0x00028468 PA_CL_VPORT_ZOFFSET_1
285 0x0002846C PA_CL_VPORT_XSCALE_2
286 0x00028470 PA_CL_VPORT_XOFFSET_2
287 0x00028474 PA_CL_VPORT_YSCALE_2
288 0x00028478 PA_CL_VPORT_YOFFSET_2
289 0x0002847C PA_CL_VPORT_ZSCALE_2
290 0x00028480 PA_CL_VPORT_ZOFFSET_2
291 0x00028484 PA_CL_VPORT_XSCALE_3
292 0x00028488 PA_CL_VPORT_XOFFSET_3
293 0x0002848C PA_CL_VPORT_YSCALE_3
294 0x00028490 PA_CL_VPORT_YOFFSET_3
295 0x00028494 PA_CL_VPORT_ZSCALE_3
296 0x00028498 PA_CL_VPORT_ZOFFSET_3
297 0x0002849C PA_CL_VPORT_XSCALE_4
298 0x000284A0 PA_CL_VPORT_XOFFSET_4
299 0x000284A4 PA_CL_VPORT_YSCALE_4
300 0x000284A8 PA_CL_VPORT_YOFFSET_4
301 0x000284AC PA_CL_VPORT_ZSCALE_4
302 0x000284B0 PA_CL_VPORT_ZOFFSET_4
303 0x000284B4 PA_CL_VPORT_XSCALE_5
304 0x000284B8 PA_CL_VPORT_XOFFSET_5
305 0x000284BC PA_CL_VPORT_YSCALE_5
306 0x000284C0 PA_CL_VPORT_YOFFSET_5
307 0x000284C4 PA_CL_VPORT_ZSCALE_5
308 0x000284C8 PA_CL_VPORT_ZOFFSET_5
309 0x000284CC PA_CL_VPORT_XSCALE_6
310 0x000284D0 PA_CL_VPORT_XOFFSET_6
311 0x000284D4 PA_CL_VPORT_YSCALE_6
312 0x000284D8 PA_CL_VPORT_YOFFSET_6
313 0x000284DC PA_CL_VPORT_ZSCALE_6
314 0x000284E0 PA_CL_VPORT_ZOFFSET_6
315 0x000284E4 PA_CL_VPORT_XSCALE_7
316 0x000284E8 PA_CL_VPORT_XOFFSET_7
317 0x000284EC PA_CL_VPORT_YSCALE_7
318 0x000284F0 PA_CL_VPORT_YOFFSET_7
319 0x000284F4 PA_CL_VPORT_ZSCALE_7
320 0x000284F8 PA_CL_VPORT_ZOFFSET_7
321 0x000284FC PA_CL_VPORT_XSCALE_8
322 0x00028500 PA_CL_VPORT_XOFFSET_8
323 0x00028504 PA_CL_VPORT_YSCALE_8
324 0x00028508 PA_CL_VPORT_YOFFSET_8
325 0x0002850C PA_CL_VPORT_ZSCALE_8
326 0x00028510 PA_CL_VPORT_ZOFFSET_8
327 0x00028514 PA_CL_VPORT_XSCALE_9
328 0x00028518 PA_CL_VPORT_XOFFSET_9
329 0x0002851C PA_CL_VPORT_YSCALE_9
330 0x00028520 PA_CL_VPORT_YOFFSET_9
331 0x00028524 PA_CL_VPORT_ZSCALE_9
332 0x00028528 PA_CL_VPORT_ZOFFSET_9
333 0x0002852C PA_CL_VPORT_XSCALE_10
334 0x00028530 PA_CL_VPORT_XOFFSET_10
335 0x00028534 PA_CL_VPORT_YSCALE_10
336 0x00028538 PA_CL_VPORT_YOFFSET_10
337 0x0002853C PA_CL_VPORT_ZSCALE_10
338 0x00028540 PA_CL_VPORT_ZOFFSET_10
339 0x00028544 PA_CL_VPORT_XSCALE_11
340 0x00028548 PA_CL_VPORT_XOFFSET_11
341 0x0002854C PA_CL_VPORT_YSCALE_11
342 0x00028550 PA_CL_VPORT_YOFFSET_11
343 0x00028554 PA_CL_VPORT_ZSCALE_11
344 0x00028558 PA_CL_VPORT_ZOFFSET_11
345 0x0002855C PA_CL_VPORT_XSCALE_12
346 0x00028560 PA_CL_VPORT_XOFFSET_12
347 0x00028564 PA_CL_VPORT_YSCALE_12
348 0x00028568 PA_CL_VPORT_YOFFSET_12
349 0x0002856C PA_CL_VPORT_ZSCALE_12
350 0x00028570 PA_CL_VPORT_ZOFFSET_12
351 0x00028574 PA_CL_VPORT_XSCALE_13
352 0x00028578 PA_CL_VPORT_XOFFSET_13
353 0x0002857C PA_CL_VPORT_YSCALE_13
354 0x00028580 PA_CL_VPORT_YOFFSET_13
355 0x00028584 PA_CL_VPORT_ZSCALE_13
356 0x00028588 PA_CL_VPORT_ZOFFSET_13
357 0x0002858C PA_CL_VPORT_XSCALE_14
358 0x00028590 PA_CL_VPORT_XOFFSET_14
359 0x00028594 PA_CL_VPORT_YSCALE_14
360 0x00028598 PA_CL_VPORT_YOFFSET_14
361 0x0002859C PA_CL_VPORT_ZSCALE_14
362 0x000285A0 PA_CL_VPORT_ZOFFSET_14
363 0x000285A4 PA_CL_VPORT_XSCALE_15
364 0x000285A8 PA_CL_VPORT_XOFFSET_15
365 0x000285AC PA_CL_VPORT_YSCALE_15
366 0x000285B0 PA_CL_VPORT_YOFFSET_15
367 0x000285B4 PA_CL_VPORT_ZSCALE_15
368 0x000285B8 PA_CL_VPORT_ZOFFSET_15
369 0x000285BC PA_CL_UCP_0_X
370 0x000285C0 PA_CL_UCP_0_Y
371 0x000285C4 PA_CL_UCP_0_Z
372 0x000285C8 PA_CL_UCP_0_W
373 0x000285CC PA_CL_UCP_1_X
374 0x000285D0 PA_CL_UCP_1_Y
375 0x000285D4 PA_CL_UCP_1_Z
376 0x000285D8 PA_CL_UCP_1_W
377 0x000285DC PA_CL_UCP_2_X
378 0x000285E0 PA_CL_UCP_2_Y
379 0x000285E4 PA_CL_UCP_2_Z
380 0x000285E8 PA_CL_UCP_2_W
381 0x000285EC PA_CL_UCP_3_X
382 0x000285F0 PA_CL_UCP_3_Y
383 0x000285F4 PA_CL_UCP_3_Z
384 0x000285F8 PA_CL_UCP_3_W
385 0x000285FC PA_CL_UCP_4_X
386 0x00028600 PA_CL_UCP_4_Y
387 0x00028604 PA_CL_UCP_4_Z
388 0x00028608 PA_CL_UCP_4_W
389 0x0002860C PA_CL_UCP_5_X
390 0x00028610 PA_CL_UCP_5_Y
391 0x00028614 PA_CL_UCP_5_Z
392 0x00028618 PA_CL_UCP_5_W
393 0x0002861C SPI_VS_OUT_ID_0
394 0x00028620 SPI_VS_OUT_ID_1
395 0x00028624 SPI_VS_OUT_ID_2
396 0x00028628 SPI_VS_OUT_ID_3
397 0x0002862C SPI_VS_OUT_ID_4
398 0x00028630 SPI_VS_OUT_ID_5
399 0x00028634 SPI_VS_OUT_ID_6
400 0x00028638 SPI_VS_OUT_ID_7
401 0x0002863C SPI_VS_OUT_ID_8
402 0x00028640 SPI_VS_OUT_ID_9
403 0x00028644 SPI_PS_INPUT_CNTL_0
404 0x00028648 SPI_PS_INPUT_CNTL_1
405 0x0002864C SPI_PS_INPUT_CNTL_2
406 0x00028650 SPI_PS_INPUT_CNTL_3
407 0x00028654 SPI_PS_INPUT_CNTL_4
408 0x00028658 SPI_PS_INPUT_CNTL_5
409 0x0002865C SPI_PS_INPUT_CNTL_6
410 0x00028660 SPI_PS_INPUT_CNTL_7
411 0x00028664 SPI_PS_INPUT_CNTL_8
412 0x00028668 SPI_PS_INPUT_CNTL_9
413 0x0002866C SPI_PS_INPUT_CNTL_10
414 0x00028670 SPI_PS_INPUT_CNTL_11
415 0x00028674 SPI_PS_INPUT_CNTL_12
416 0x00028678 SPI_PS_INPUT_CNTL_13
417 0x0002867C SPI_PS_INPUT_CNTL_14
418 0x00028680 SPI_PS_INPUT_CNTL_15
419 0x00028684 SPI_PS_INPUT_CNTL_16
420 0x00028688 SPI_PS_INPUT_CNTL_17
421 0x0002868C SPI_PS_INPUT_CNTL_18
422 0x00028690 SPI_PS_INPUT_CNTL_19
423 0x00028694 SPI_PS_INPUT_CNTL_20
424 0x00028698 SPI_PS_INPUT_CNTL_21
425 0x0002869C SPI_PS_INPUT_CNTL_22
426 0x000286A0 SPI_PS_INPUT_CNTL_23
427 0x000286A4 SPI_PS_INPUT_CNTL_24
428 0x000286A8 SPI_PS_INPUT_CNTL_25
429 0x000286AC SPI_PS_INPUT_CNTL_26
430 0x000286B0 SPI_PS_INPUT_CNTL_27
431 0x000286B4 SPI_PS_INPUT_CNTL_28
432 0x000286B8 SPI_PS_INPUT_CNTL_29
433 0x000286BC SPI_PS_INPUT_CNTL_30
434 0x000286C0 SPI_PS_INPUT_CNTL_31
435 0x000286C4 SPI_VS_OUT_CONFIG
436 0x000286C8 SPI_THREAD_GROUPING
437 0x000286CC SPI_PS_IN_CONTROL_0
438 0x000286D0 SPI_PS_IN_CONTROL_1
439 0x000286D4 SPI_INTERP_CONTROL_0
440 0x000286D8 SPI_INPUT_Z
441 0x000286DC SPI_FOG_CNTL
442 0x000286E0 SPI_BARYC_CNTL
443 0x000286E4 SPI_PS_IN_CONTROL_2
444 0x000286E8 SPI_COMPUTE_INPUT_CNTL
445 0x000286EC SPI_COMPUTE_NUM_THREAD_X
446 0x000286F0 SPI_COMPUTE_NUM_THREAD_Y
447 0x000286F4 SPI_COMPUTE_NUM_THREAD_Z
448 0x00028720 GDS_ADDR_BASE
449 0x00028724 GDS_ADDR_SIZE
450 0x00028728 GDS_ORDERED_WAVE_PER_SE
451 0x00028780 CB_BLEND0_CONTROL
452 0x00028784 CB_BLEND1_CONTROL
453 0x00028788 CB_BLEND2_CONTROL
454 0x0002878C CB_BLEND3_CONTROL
455 0x00028790 CB_BLEND4_CONTROL
456 0x00028794 CB_BLEND5_CONTROL
457 0x00028798 CB_BLEND6_CONTROL
458 0x0002879C CB_BLEND7_CONTROL
459 0x000287CC CS_COPY_STATE
460 0x000287D0 GFX_COPY_STATE
461 0x000287D4 PA_CL_POINT_X_RAD
462 0x000287D8 PA_CL_POINT_Y_RAD
463 0x000287DC PA_CL_POINT_SIZE
464 0x000287E0 PA_CL_POINT_CULL_RAD
465 0x00028808 CB_COLOR_CONTROL
466 0x0002880C DB_SHADER_CONTROL
467 0x00028810 PA_CL_CLIP_CNTL
468 0x00028814 PA_SU_SC_MODE_CNTL
469 0x00028818 PA_CL_VTE_CNTL
470 0x0002881C PA_CL_VS_OUT_CNTL
471 0x00028820 PA_CL_NANINF_CNTL
472 0x00028824 PA_SU_LINE_STIPPLE_CNTL
473 0x00028828 PA_SU_LINE_STIPPLE_SCALE
474 0x0002882C PA_SU_PRIM_FILTER_CNTL
475 0x00028838 SQ_DYN_GPR_RESOURCE_LIMIT_1
476 0x00028844 SQ_PGM_RESOURCES_PS
477 0x00028848 SQ_PGM_RESOURCES_2_PS
478 0x0002884C SQ_PGM_EXPORTS_PS
479 0x00028860 SQ_PGM_RESOURCES_VS
480 0x00028864 SQ_PGM_RESOURCES_2_VS
481 0x00028878 SQ_PGM_RESOURCES_GS
482 0x0002887C SQ_PGM_RESOURCES_2_GS
483 0x00028890 SQ_PGM_RESOURCES_ES
484 0x00028894 SQ_PGM_RESOURCES_2_ES
485 0x000288A8 SQ_PGM_RESOURCES_FS
486 0x000288BC SQ_PGM_RESOURCES_HS
487 0x000288C0 SQ_PGM_RESOURCES_2_HS
488 0x000288D4 SQ_PGM_RESOURCES_LS
489 0x000288D8 SQ_PGM_RESOURCES_2_LS
490 0x000288E8 SQ_LDS_ALLOC
491 0x000288EC SQ_LDS_ALLOC_PS
492 0x000288F0 SQ_VTX_SEMANTIC_CLEAR
493 0x00028A00 PA_SU_POINT_SIZE
494 0x00028A04 PA_SU_POINT_MINMAX
495 0x00028A08 PA_SU_LINE_CNTL
496 0x00028A0C PA_SC_LINE_STIPPLE
497 0x00028A10 VGT_OUTPUT_PATH_CNTL
498 0x00028A14 VGT_HOS_CNTL
499 0x00028A18 VGT_HOS_MAX_TESS_LEVEL
500 0x00028A1C VGT_HOS_MIN_TESS_LEVEL
501 0x00028A20 VGT_HOS_REUSE_DEPTH
502 0x00028A24 VGT_GROUP_PRIM_TYPE
503 0x00028A28 VGT_GROUP_FIRST_DECR
504 0x00028A2C VGT_GROUP_DECR
505 0x00028A30 VGT_GROUP_VECT_0_CNTL
506 0x00028A34 VGT_GROUP_VECT_1_CNTL
507 0x00028A38 VGT_GROUP_VECT_0_FMT_CNTL
508 0x00028A3C VGT_GROUP_VECT_1_FMT_CNTL
509 0x00028A40 VGT_GS_MODE
510 0x00028A48 PA_SC_MODE_CNTL_0
511 0x00028A4C PA_SC_MODE_CNTL_1
512 0x00028A50 VGT_ENHANCE
513 0x00028A54 VGT_GS_PER_ES
514 0x00028A58 VGT_ES_PER_GS
515 0x00028A5C VGT_GS_PER_VS
516 0x00028A6C VGT_GS_OUT_PRIM_TYPE
517 0x00028A84 VGT_PRIMITIVEID_EN
518 0x00028A94 VGT_MULTI_PRIM_IB_RESET_EN
519 0x00028AA0 VGT_INSTANCE_STEP_RATE_0
520 0x00028AA4 VGT_INSTANCE_STEP_RATE_1
521 0x00028AB4 VGT_REUSE_OFF
522 0x00028AB8 VGT_VTX_CNT_EN
523 0x00028ABC DB_HTILE_SURFACE
524 0x00028AC0 DB_SRESULTS_COMPARE_STATE0
525 0x00028AC4 DB_SRESULTS_COMPARE_STATE1
526 0x00028AC8 DB_PRELOAD_CONTROL
527 0x00028AD4 VGT_STRMOUT_VTX_STRIDE_0
528 0x00028AE4 VGT_STRMOUT_VTX_STRIDE_1
529 0x00028AF4 VGT_STRMOUT_VTX_STRIDE_2
530 0x00028B04 VGT_STRMOUT_VTX_STRIDE_3
531 0x00028B28 VGT_STRMOUT_DRAW_OPAQUE_OFFSET
532 0x00028B2C VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE
533 0x00028B30 VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE
534 0x00028B38 VGT_GS_MAX_VERT_OUT
535 0x00028B54 VGT_SHADER_STAGES_EN
536 0x00028B58 VGT_LS_HS_CONFIG
537 0x00028B5C VGT_LS_SIZE
538 0x00028B60 VGT_HS_SIZE
539 0x00028B64 VGT_LS_HS_ALLOC
540 0x00028B68 VGT_HS_PATCH_CONST
541 0x00028B6C VGT_TF_PARAM
542 0x00028B70 DB_ALPHA_TO_MASK
543 0x00028B74 VGT_DISPATCH_INITIATOR
544 0x00028B78 PA_SU_POLY_OFFSET_DB_FMT_CNTL
545 0x00028B7C PA_SU_POLY_OFFSET_CLAMP
546 0x00028B80 PA_SU_POLY_OFFSET_FRONT_SCALE
547 0x00028B84 PA_SU_POLY_OFFSET_FRONT_OFFSET
548 0x00028B88 PA_SU_POLY_OFFSET_BACK_SCALE
549 0x00028B8C PA_SU_POLY_OFFSET_BACK_OFFSET
550 0x00028B74 VGT_GS_INSTANCE_CNT
551 0x00028C00 PA_SC_LINE_CNTL
552 0x00028C08 PA_SU_VTX_CNTL
553 0x00028C0C PA_CL_GB_VERT_CLIP_ADJ
554 0x00028C10 PA_CL_GB_VERT_DISC_ADJ
555 0x00028C14 PA_CL_GB_HORZ_CLIP_ADJ
556 0x00028C18 PA_CL_GB_HORZ_DISC_ADJ
557 0x00028C1C PA_SC_AA_SAMPLE_LOCS_0
558 0x00028C20 PA_SC_AA_SAMPLE_LOCS_1
559 0x00028C24 PA_SC_AA_SAMPLE_LOCS_2
560 0x00028C28 PA_SC_AA_SAMPLE_LOCS_3
561 0x00028C2C PA_SC_AA_SAMPLE_LOCS_4
562 0x00028C30 PA_SC_AA_SAMPLE_LOCS_5
563 0x00028C34 PA_SC_AA_SAMPLE_LOCS_6
564 0x00028C38 PA_SC_AA_SAMPLE_LOCS_7
565 0x00028C3C PA_SC_AA_MASK
566 0x00028C8C CB_COLOR0_CLEAR_WORD0
567 0x00028C90 CB_COLOR0_CLEAR_WORD1
568 0x00028C94 CB_COLOR0_CLEAR_WORD2
569 0x00028C98 CB_COLOR0_CLEAR_WORD3
570 0x00028CC8 CB_COLOR1_CLEAR_WORD0
571 0x00028CCC CB_COLOR1_CLEAR_WORD1
572 0x00028CD0 CB_COLOR1_CLEAR_WORD2
573 0x00028CD4 CB_COLOR1_CLEAR_WORD3
574 0x00028D04 CB_COLOR2_CLEAR_WORD0
575 0x00028D08 CB_COLOR2_CLEAR_WORD1
576 0x00028D0C CB_COLOR2_CLEAR_WORD2
577 0x00028D10 CB_COLOR2_CLEAR_WORD3
578 0x00028D40 CB_COLOR3_CLEAR_WORD0
579 0x00028D44 CB_COLOR3_CLEAR_WORD1
580 0x00028D48 CB_COLOR3_CLEAR_WORD2
581 0x00028D4C CB_COLOR3_CLEAR_WORD3
582 0x00028D7C CB_COLOR4_CLEAR_WORD0
583 0x00028D80 CB_COLOR4_CLEAR_WORD1
584 0x00028D84 CB_COLOR4_CLEAR_WORD2
585 0x00028D88 CB_COLOR4_CLEAR_WORD3
586 0x00028DB8 CB_COLOR5_CLEAR_WORD0
587 0x00028DBC CB_COLOR5_CLEAR_WORD1
588 0x00028DC0 CB_COLOR5_CLEAR_WORD2
589 0x00028DC4 CB_COLOR5_CLEAR_WORD3
590 0x00028DF4 CB_COLOR6_CLEAR_WORD0
591 0x00028DF8 CB_COLOR6_CLEAR_WORD1
592 0x00028DFC CB_COLOR6_CLEAR_WORD2
593 0x00028E00 CB_COLOR6_CLEAR_WORD3
594 0x00028E30 CB_COLOR7_CLEAR_WORD0
595 0x00028E34 CB_COLOR7_CLEAR_WORD1
596 0x00028E38 CB_COLOR7_CLEAR_WORD2
597 0x00028E3C CB_COLOR7_CLEAR_WORD3
598 0x00028F80 SQ_ALU_CONST_BUFFER_SIZE_HS_0
599 0x00028F84 SQ_ALU_CONST_BUFFER_SIZE_HS_1
600 0x00028F88 SQ_ALU_CONST_BUFFER_SIZE_HS_2
601 0x00028F8C SQ_ALU_CONST_BUFFER_SIZE_HS_3
602 0x00028F90 SQ_ALU_CONST_BUFFER_SIZE_HS_4
603 0x00028F94 SQ_ALU_CONST_BUFFER_SIZE_HS_5
604 0x00028F98 SQ_ALU_CONST_BUFFER_SIZE_HS_6
605 0x00028F9C SQ_ALU_CONST_BUFFER_SIZE_HS_7
606 0x00028FA0 SQ_ALU_CONST_BUFFER_SIZE_HS_8
607 0x00028FA4 SQ_ALU_CONST_BUFFER_SIZE_HS_9
608 0x00028FA8 SQ_ALU_CONST_BUFFER_SIZE_HS_10
609 0x00028FAC SQ_ALU_CONST_BUFFER_SIZE_HS_11
610 0x00028FB0 SQ_ALU_CONST_BUFFER_SIZE_HS_12
611 0x00028FB4 SQ_ALU_CONST_BUFFER_SIZE_HS_13
612 0x00028FB8 SQ_ALU_CONST_BUFFER_SIZE_HS_14
613 0x00028FBC SQ_ALU_CONST_BUFFER_SIZE_HS_15
614 0x00028FC0 SQ_ALU_CONST_BUFFER_SIZE_LS_0
615 0x00028FC4 SQ_ALU_CONST_BUFFER_SIZE_LS_1
616 0x00028FC8 SQ_ALU_CONST_BUFFER_SIZE_LS_2
617 0x00028FCC SQ_ALU_CONST_BUFFER_SIZE_LS_3
618 0x00028FD0 SQ_ALU_CONST_BUFFER_SIZE_LS_4
619 0x00028FD4 SQ_ALU_CONST_BUFFER_SIZE_LS_5
620 0x00028FD8 SQ_ALU_CONST_BUFFER_SIZE_LS_6
621 0x00028FDC SQ_ALU_CONST_BUFFER_SIZE_LS_7
622 0x00028FE0 SQ_ALU_CONST_BUFFER_SIZE_LS_8
623 0x00028FE4 SQ_ALU_CONST_BUFFER_SIZE_LS_9
624 0x00028FE8 SQ_ALU_CONST_BUFFER_SIZE_LS_10
625 0x00028FEC SQ_ALU_CONST_BUFFER_SIZE_LS_11
626 0x00028FF0 SQ_ALU_CONST_BUFFER_SIZE_LS_12
627 0x00028FF4 SQ_ALU_CONST_BUFFER_SIZE_LS_13
628 0x00028FF8 SQ_ALU_CONST_BUFFER_SIZE_LS_14
629 0x00028FFC SQ_ALU_CONST_BUFFER_SIZE_LS_15
630 0x0003CFF0 SQ_VTX_BASE_VTX_LOC
631 0x0003CFF4 SQ_VTX_START_INST_LOC
632 0x0003FF00 SQ_TEX_SAMPLER_CLEAR
633 0x0003FF04 SQ_TEX_RESOURCE_CLEAR
634 0x0003FF08 SQ_LOOP_BOOL_CLEAR