drm/i915: Ensure that while(INREG()) are bounded (v2)
[linux-2.6.git] / drivers / gpu / drm / i915 / intel_lvds.c
1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *      Eric Anholt <eric@anholt.net>
26  *      Dave Airlie <airlied@linux.ie>
27  *      Jesse Barnes <jesse.barnes@intel.com>
28  */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include "drmP.h"
35 #include "drm.h"
36 #include "drm_crtc.h"
37 #include "drm_edid.h"
38 #include "intel_drv.h"
39 #include "i915_drm.h"
40 #include "i915_drv.h"
41 #include <linux/acpi.h>
42
43 /* Private structure for the integrated LVDS support */
44 struct intel_lvds {
45         struct intel_encoder base;
46         int fitting_mode;
47         u32 pfit_control;
48         u32 pfit_pgm_ratios;
49 };
50
51 static struct intel_lvds *enc_to_intel_lvds(struct drm_encoder *encoder)
52 {
53         return container_of(enc_to_intel_encoder(encoder), struct intel_lvds, base);
54 }
55
56 /**
57  * Sets the backlight level.
58  *
59  * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
60  */
61 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
62 {
63         struct drm_i915_private *dev_priv = dev->dev_private;
64         u32 blc_pwm_ctl, reg;
65
66         if (HAS_PCH_SPLIT(dev))
67                 reg = BLC_PWM_CPU_CTL;
68         else
69                 reg = BLC_PWM_CTL;
70
71         blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
72         I915_WRITE(reg, (blc_pwm_ctl |
73                                  (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
74 }
75
76 /**
77  * Returns the maximum level of the backlight duty cycle field.
78  */
79 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
80 {
81         struct drm_i915_private *dev_priv = dev->dev_private;
82         u32 reg;
83
84         if (HAS_PCH_SPLIT(dev))
85                 reg = BLC_PWM_PCH_CTL2;
86         else
87                 reg = BLC_PWM_CTL;
88
89         return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
90                 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
91 }
92
93 /**
94  * Sets the power state for the panel.
95  */
96 static void intel_lvds_set_power(struct drm_device *dev, bool on)
97 {
98         struct drm_i915_private *dev_priv = dev->dev_private;
99         u32 ctl_reg, status_reg, lvds_reg;
100
101         if (HAS_PCH_SPLIT(dev)) {
102                 ctl_reg = PCH_PP_CONTROL;
103                 status_reg = PCH_PP_STATUS;
104                 lvds_reg = PCH_LVDS;
105         } else {
106                 ctl_reg = PP_CONTROL;
107                 status_reg = PP_STATUS;
108                 lvds_reg = LVDS;
109         }
110
111         if (on) {
112                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
113                 POSTING_READ(lvds_reg);
114
115                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
116                            POWER_TARGET_ON);
117                 if (wait_for(I915_READ(status_reg) & PP_ON, 1000, 0))
118                         DRM_ERROR("timed out waiting to enable LVDS pipe");
119
120                 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
121         } else {
122                 intel_lvds_set_backlight(dev, 0);
123
124                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
125                            ~POWER_TARGET_ON);
126                 if (wait_for((I915_READ(status_reg) & PP_ON) == 0, 1000, 0))
127                         DRM_ERROR("timed out waiting for LVDS pipe to turn off");
128
129                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
130                 POSTING_READ(lvds_reg);
131         }
132 }
133
134 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
135 {
136         struct drm_device *dev = encoder->dev;
137
138         if (mode == DRM_MODE_DPMS_ON)
139                 intel_lvds_set_power(dev, true);
140         else
141                 intel_lvds_set_power(dev, false);
142
143         /* XXX: We never power down the LVDS pairs. */
144 }
145
146 static int intel_lvds_mode_valid(struct drm_connector *connector,
147                                  struct drm_display_mode *mode)
148 {
149         struct drm_device *dev = connector->dev;
150         struct drm_i915_private *dev_priv = dev->dev_private;
151         struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
152
153         if (fixed_mode) {
154                 if (mode->hdisplay > fixed_mode->hdisplay)
155                         return MODE_PANEL;
156                 if (mode->vdisplay > fixed_mode->vdisplay)
157                         return MODE_PANEL;
158         }
159
160         return MODE_OK;
161 }
162
163 static void
164 centre_horizontally(struct drm_display_mode *mode,
165                     int width)
166 {
167         u32 border, sync_pos, blank_width, sync_width;
168
169         /* keep the hsync and hblank widths constant */
170         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
171         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
172         sync_pos = (blank_width - sync_width + 1) / 2;
173
174         border = (mode->hdisplay - width + 1) / 2;
175         border += border & 1; /* make the border even */
176
177         mode->crtc_hdisplay = width;
178         mode->crtc_hblank_start = width + border;
179         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
180
181         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
182         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
183 }
184
185 static void
186 centre_vertically(struct drm_display_mode *mode,
187                   int height)
188 {
189         u32 border, sync_pos, blank_width, sync_width;
190
191         /* keep the vsync and vblank widths constant */
192         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
193         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
194         sync_pos = (blank_width - sync_width + 1) / 2;
195
196         border = (mode->vdisplay - height + 1) / 2;
197
198         mode->crtc_vdisplay = height;
199         mode->crtc_vblank_start = height + border;
200         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
201
202         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
203         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
204 }
205
206 static inline u32 panel_fitter_scaling(u32 source, u32 target)
207 {
208         /*
209          * Floating point operation is not supported. So the FACTOR
210          * is defined, which can avoid the floating point computation
211          * when calculating the panel ratio.
212          */
213 #define ACCURACY 12
214 #define FACTOR (1 << ACCURACY)
215         u32 ratio = source * FACTOR / target;
216         return (FACTOR * ratio + FACTOR/2) / FACTOR;
217 }
218
219 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
220                                   struct drm_display_mode *mode,
221                                   struct drm_display_mode *adjusted_mode)
222 {
223         struct drm_device *dev = encoder->dev;
224         struct drm_i915_private *dev_priv = dev->dev_private;
225         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
226         struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
227         struct drm_encoder *tmp_encoder;
228         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
229
230         /* Should never happen!! */
231         if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
232                 DRM_ERROR("Can't support LVDS on pipe A\n");
233                 return false;
234         }
235
236         /* Should never happen!! */
237         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
238                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
239                         DRM_ERROR("Can't enable LVDS and another "
240                                "encoder on the same pipe\n");
241                         return false;
242                 }
243         }
244         /* If we don't have a panel mode, there is nothing we can do */
245         if (dev_priv->panel_fixed_mode == NULL)
246                 return true;
247
248         /*
249          * We have timings from the BIOS for the panel, put them in
250          * to the adjusted mode.  The CRTC will be set up for this mode,
251          * with the panel scaling set up to source from the H/VDisplay
252          * of the original mode.
253          */
254         intel_fixed_panel_mode(dev_priv->panel_fixed_mode, adjusted_mode);
255
256         if (HAS_PCH_SPLIT(dev)) {
257                 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
258                                         mode, adjusted_mode);
259                 return true;
260         }
261
262         /* Make sure pre-965s set dither correctly */
263         if (!IS_I965G(dev)) {
264                 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
265                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
266         }
267
268         /* Native modes don't need fitting */
269         if (adjusted_mode->hdisplay == mode->hdisplay &&
270             adjusted_mode->vdisplay == mode->vdisplay)
271                 goto out;
272
273         /* 965+ wants fuzzy fitting */
274         if (IS_I965G(dev))
275                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
276                                  PFIT_FILTER_FUZZY);
277
278         /*
279          * Enable automatic panel scaling for non-native modes so that they fill
280          * the screen.  Should be enabled before the pipe is enabled, according
281          * to register description and PRM.
282          * Change the value here to see the borders for debugging
283          */
284         I915_WRITE(BCLRPAT_A, 0);
285         I915_WRITE(BCLRPAT_B, 0);
286
287         switch (intel_lvds->fitting_mode) {
288         case DRM_MODE_SCALE_CENTER:
289                 /*
290                  * For centered modes, we have to calculate border widths &
291                  * heights and modify the values programmed into the CRTC.
292                  */
293                 centre_horizontally(adjusted_mode, mode->hdisplay);
294                 centre_vertically(adjusted_mode, mode->vdisplay);
295                 border = LVDS_BORDER_ENABLE;
296                 break;
297
298         case DRM_MODE_SCALE_ASPECT:
299                 /* Scale but preserve the aspect ratio */
300                 if (IS_I965G(dev)) {
301                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
302                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
303
304                         pfit_control |= PFIT_ENABLE;
305                         /* 965+ is easy, it does everything in hw */
306                         if (scaled_width > scaled_height)
307                                 pfit_control |= PFIT_SCALING_PILLAR;
308                         else if (scaled_width < scaled_height)
309                                 pfit_control |= PFIT_SCALING_LETTER;
310                         else
311                                 pfit_control |= PFIT_SCALING_AUTO;
312                 } else {
313                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
314                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
315                         /*
316                          * For earlier chips we have to calculate the scaling
317                          * ratio by hand and program it into the
318                          * PFIT_PGM_RATIO register
319                          */
320                         if (scaled_width > scaled_height) { /* pillar */
321                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
322
323                                 border = LVDS_BORDER_ENABLE;
324                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
325                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
326                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
327                                                             bits << PFIT_VERT_SCALE_SHIFT);
328                                         pfit_control |= (PFIT_ENABLE |
329                                                          VERT_INTERP_BILINEAR |
330                                                          HORIZ_INTERP_BILINEAR);
331                                 }
332                         } else if (scaled_width < scaled_height) { /* letter */
333                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
334
335                                 border = LVDS_BORDER_ENABLE;
336                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
337                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
338                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
339                                                             bits << PFIT_VERT_SCALE_SHIFT);
340                                         pfit_control |= (PFIT_ENABLE |
341                                                          VERT_INTERP_BILINEAR |
342                                                          HORIZ_INTERP_BILINEAR);
343                                 }
344                         } else
345                                 /* Aspects match, Let hw scale both directions */
346                                 pfit_control |= (PFIT_ENABLE |
347                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
348                                                  VERT_INTERP_BILINEAR |
349                                                  HORIZ_INTERP_BILINEAR);
350                 }
351                 break;
352
353         case DRM_MODE_SCALE_FULLSCREEN:
354                 /*
355                  * Full scaling, even if it changes the aspect ratio.
356                  * Fortunately this is all done for us in hw.
357                  */
358                 pfit_control |= PFIT_ENABLE;
359                 if (IS_I965G(dev))
360                         pfit_control |= PFIT_SCALING_AUTO;
361                 else
362                         pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
363                                          VERT_INTERP_BILINEAR |
364                                          HORIZ_INTERP_BILINEAR);
365                 break;
366
367         default:
368                 break;
369         }
370
371 out:
372         intel_lvds->pfit_control = pfit_control;
373         intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
374         dev_priv->lvds_border_bits = border;
375
376         /*
377          * XXX: It would be nice to support lower refresh rates on the
378          * panels to reduce power consumption, and perhaps match the
379          * user's requested refresh rate.
380          */
381
382         return true;
383 }
384
385 static void intel_lvds_prepare(struct drm_encoder *encoder)
386 {
387         struct drm_device *dev = encoder->dev;
388         struct drm_i915_private *dev_priv = dev->dev_private;
389         u32 reg;
390
391         if (HAS_PCH_SPLIT(dev))
392                 reg = BLC_PWM_CPU_CTL;
393         else
394                 reg = BLC_PWM_CTL;
395
396         dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
397         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
398                                        BACKLIGHT_DUTY_CYCLE_MASK);
399
400         intel_lvds_set_power(dev, false);
401 }
402
403 static void intel_lvds_commit( struct drm_encoder *encoder)
404 {
405         struct drm_device *dev = encoder->dev;
406         struct drm_i915_private *dev_priv = dev->dev_private;
407
408         if (dev_priv->backlight_duty_cycle == 0)
409                 dev_priv->backlight_duty_cycle =
410                         intel_lvds_get_max_backlight(dev);
411
412         intel_lvds_set_power(dev, true);
413 }
414
415 static void intel_lvds_mode_set(struct drm_encoder *encoder,
416                                 struct drm_display_mode *mode,
417                                 struct drm_display_mode *adjusted_mode)
418 {
419         struct drm_device *dev = encoder->dev;
420         struct drm_i915_private *dev_priv = dev->dev_private;
421         struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
422
423         /*
424          * The LVDS pin pair will already have been turned on in the
425          * intel_crtc_mode_set since it has a large impact on the DPLL
426          * settings.
427          */
428
429         if (HAS_PCH_SPLIT(dev))
430                 return;
431
432         /*
433          * Enable automatic panel scaling so that non-native modes fill the
434          * screen.  Should be enabled before the pipe is enabled, according to
435          * register description and PRM.
436          */
437         I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
438         I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
439 }
440
441 /**
442  * Detect the LVDS connection.
443  *
444  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
445  * connected and closed means disconnected.  We also send hotplug events as
446  * needed, using lid status notification from the input layer.
447  */
448 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
449 {
450         struct drm_device *dev = connector->dev;
451         enum drm_connector_status status = connector_status_connected;
452
453         /* ACPI lid methods were generally unreliable in this generation, so
454          * don't even bother.
455          */
456         if (IS_GEN2(dev) || IS_GEN3(dev))
457                 return connector_status_connected;
458
459         return status;
460 }
461
462 /**
463  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
464  */
465 static int intel_lvds_get_modes(struct drm_connector *connector)
466 {
467         struct drm_device *dev = connector->dev;
468         struct drm_encoder *encoder = intel_attached_encoder(connector);
469         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
470         struct drm_i915_private *dev_priv = dev->dev_private;
471         int ret = 0;
472
473         if (dev_priv->lvds_edid_good) {
474                 ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
475
476                 if (ret)
477                         return ret;
478         }
479
480         /* Didn't get an EDID, so
481          * Set wide sync ranges so we get all modes
482          * handed to valid_mode for checking
483          */
484         connector->display_info.min_vfreq = 0;
485         connector->display_info.max_vfreq = 200;
486         connector->display_info.min_hfreq = 0;
487         connector->display_info.max_hfreq = 200;
488
489         if (dev_priv->panel_fixed_mode != NULL) {
490                 struct drm_display_mode *mode;
491
492                 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
493                 drm_mode_probed_add(connector, mode);
494
495                 return 1;
496         }
497
498         return 0;
499 }
500
501 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
502 {
503         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
504         return 1;
505 }
506
507 /* The GPU hangs up on these systems if modeset is performed on LID open */
508 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
509         {
510                 .callback = intel_no_modeset_on_lid_dmi_callback,
511                 .ident = "Toshiba Tecra A11",
512                 .matches = {
513                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
514                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
515                 },
516         },
517
518         { }     /* terminating entry */
519 };
520
521 /*
522  * Lid events. Note the use of 'modeset_on_lid':
523  *  - we set it on lid close, and reset it on open
524  *  - we use it as a "only once" bit (ie we ignore
525  *    duplicate events where it was already properly
526  *    set/reset)
527  *  - the suspend/resume paths will also set it to
528  *    zero, since they restore the mode ("lid open").
529  */
530 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
531                             void *unused)
532 {
533         struct drm_i915_private *dev_priv =
534                 container_of(nb, struct drm_i915_private, lid_notifier);
535         struct drm_device *dev = dev_priv->dev;
536         struct drm_connector *connector = dev_priv->int_lvds_connector;
537
538         /*
539          * check and update the status of LVDS connector after receiving
540          * the LID nofication event.
541          */
542         if (connector)
543                 connector->status = connector->funcs->detect(connector);
544         /* Don't force modeset on machines where it causes a GPU lockup */
545         if (dmi_check_system(intel_no_modeset_on_lid))
546                 return NOTIFY_OK;
547         if (!acpi_lid_open()) {
548                 dev_priv->modeset_on_lid = 1;
549                 return NOTIFY_OK;
550         }
551
552         if (!dev_priv->modeset_on_lid)
553                 return NOTIFY_OK;
554
555         dev_priv->modeset_on_lid = 0;
556
557         mutex_lock(&dev->mode_config.mutex);
558         drm_helper_resume_force_mode(dev);
559         mutex_unlock(&dev->mode_config.mutex);
560
561         return NOTIFY_OK;
562 }
563
564 /**
565  * intel_lvds_destroy - unregister and free LVDS structures
566  * @connector: connector to free
567  *
568  * Unregister the DDC bus for this connector then free the driver private
569  * structure.
570  */
571 static void intel_lvds_destroy(struct drm_connector *connector)
572 {
573         struct drm_device *dev = connector->dev;
574         struct drm_i915_private *dev_priv = dev->dev_private;
575
576         if (dev_priv->lid_notifier.notifier_call)
577                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
578         drm_sysfs_connector_remove(connector);
579         drm_connector_cleanup(connector);
580         kfree(connector);
581 }
582
583 static int intel_lvds_set_property(struct drm_connector *connector,
584                                    struct drm_property *property,
585                                    uint64_t value)
586 {
587         struct drm_device *dev = connector->dev;
588
589         if (property == dev->mode_config.scaling_mode_property &&
590                                 connector->encoder) {
591                 struct drm_crtc *crtc = connector->encoder->crtc;
592                 struct drm_encoder *encoder = connector->encoder;
593                 struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
594
595                 if (value == DRM_MODE_SCALE_NONE) {
596                         DRM_DEBUG_KMS("no scaling not supported\n");
597                         return 0;
598                 }
599                 if (intel_lvds->fitting_mode == value) {
600                         /* the LVDS scaling property is not changed */
601                         return 0;
602                 }
603                 intel_lvds->fitting_mode = value;
604                 if (crtc && crtc->enabled) {
605                         /*
606                          * If the CRTC is enabled, the display will be changed
607                          * according to the new panel fitting mode.
608                          */
609                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
610                                 crtc->x, crtc->y, crtc->fb);
611                 }
612         }
613
614         return 0;
615 }
616
617 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
618         .dpms = intel_lvds_dpms,
619         .mode_fixup = intel_lvds_mode_fixup,
620         .prepare = intel_lvds_prepare,
621         .mode_set = intel_lvds_mode_set,
622         .commit = intel_lvds_commit,
623 };
624
625 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
626         .get_modes = intel_lvds_get_modes,
627         .mode_valid = intel_lvds_mode_valid,
628         .best_encoder = intel_attached_encoder,
629 };
630
631 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
632         .dpms = drm_helper_connector_dpms,
633         .detect = intel_lvds_detect,
634         .fill_modes = drm_helper_probe_single_connector_modes,
635         .set_property = intel_lvds_set_property,
636         .destroy = intel_lvds_destroy,
637 };
638
639 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
640         .destroy = intel_encoder_destroy,
641 };
642
643 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
644 {
645         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
646         return 1;
647 }
648
649 /* These systems claim to have LVDS, but really don't */
650 static const struct dmi_system_id intel_no_lvds[] = {
651         {
652                 .callback = intel_no_lvds_dmi_callback,
653                 .ident = "Apple Mac Mini (Core series)",
654                 .matches = {
655                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
656                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
657                 },
658         },
659         {
660                 .callback = intel_no_lvds_dmi_callback,
661                 .ident = "Apple Mac Mini (Core 2 series)",
662                 .matches = {
663                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
664                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
665                 },
666         },
667         {
668                 .callback = intel_no_lvds_dmi_callback,
669                 .ident = "MSI IM-945GSE-A",
670                 .matches = {
671                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
672                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
673                 },
674         },
675         {
676                 .callback = intel_no_lvds_dmi_callback,
677                 .ident = "Dell Studio Hybrid",
678                 .matches = {
679                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
680                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
681                 },
682         },
683         {
684                 .callback = intel_no_lvds_dmi_callback,
685                 .ident = "AOpen Mini PC",
686                 .matches = {
687                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
688                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
689                 },
690         },
691         {
692                 .callback = intel_no_lvds_dmi_callback,
693                 .ident = "AOpen Mini PC MP915",
694                 .matches = {
695                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
696                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
697                 },
698         },
699         {
700                 .callback = intel_no_lvds_dmi_callback,
701                 .ident = "Aopen i945GTt-VFA",
702                 .matches = {
703                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
704                 },
705         },
706         {
707                 .callback = intel_no_lvds_dmi_callback,
708                 .ident = "Clientron U800",
709                 .matches = {
710                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
711                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
712                 },
713         },
714
715         { }     /* terminating entry */
716 };
717
718 /**
719  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
720  * @dev: drm device
721  * @connector: LVDS connector
722  *
723  * Find the reduced downclock for LVDS in EDID.
724  */
725 static void intel_find_lvds_downclock(struct drm_device *dev,
726                                 struct drm_connector *connector)
727 {
728         struct drm_i915_private *dev_priv = dev->dev_private;
729         struct drm_display_mode *scan, *panel_fixed_mode;
730         int temp_downclock;
731
732         panel_fixed_mode = dev_priv->panel_fixed_mode;
733         temp_downclock = panel_fixed_mode->clock;
734
735         mutex_lock(&dev->mode_config.mutex);
736         list_for_each_entry(scan, &connector->probed_modes, head) {
737                 /*
738                  * If one mode has the same resolution with the fixed_panel
739                  * mode while they have the different refresh rate, it means
740                  * that the reduced downclock is found for the LVDS. In such
741                  * case we can set the different FPx0/1 to dynamically select
742                  * between low and high frequency.
743                  */
744                 if (scan->hdisplay == panel_fixed_mode->hdisplay &&
745                         scan->hsync_start == panel_fixed_mode->hsync_start &&
746                         scan->hsync_end == panel_fixed_mode->hsync_end &&
747                         scan->htotal == panel_fixed_mode->htotal &&
748                         scan->vdisplay == panel_fixed_mode->vdisplay &&
749                         scan->vsync_start == panel_fixed_mode->vsync_start &&
750                         scan->vsync_end == panel_fixed_mode->vsync_end &&
751                         scan->vtotal == panel_fixed_mode->vtotal) {
752                         if (scan->clock < temp_downclock) {
753                                 /*
754                                  * The downclock is already found. But we
755                                  * expect to find the lower downclock.
756                                  */
757                                 temp_downclock = scan->clock;
758                         }
759                 }
760         }
761         mutex_unlock(&dev->mode_config.mutex);
762         if (temp_downclock < panel_fixed_mode->clock &&
763             i915_lvds_downclock) {
764                 /* We found the downclock for LVDS. */
765                 dev_priv->lvds_downclock_avail = 1;
766                 dev_priv->lvds_downclock = temp_downclock;
767                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
768                                 "Normal clock %dKhz, downclock %dKhz\n",
769                                 panel_fixed_mode->clock, temp_downclock);
770         }
771         return;
772 }
773
774 /*
775  * Enumerate the child dev array parsed from VBT to check whether
776  * the LVDS is present.
777  * If it is present, return 1.
778  * If it is not present, return false.
779  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
780  * Note: The addin_offset should also be checked for LVDS panel.
781  * Only when it is non-zero, it is assumed that it is present.
782  */
783 static int lvds_is_present_in_vbt(struct drm_device *dev)
784 {
785         struct drm_i915_private *dev_priv = dev->dev_private;
786         struct child_device_config *p_child;
787         int i, ret;
788
789         if (!dev_priv->child_dev_num)
790                 return 1;
791
792         ret = 0;
793         for (i = 0; i < dev_priv->child_dev_num; i++) {
794                 p_child = dev_priv->child_dev + i;
795                 /*
796                  * If the device type is not LFP, continue.
797                  * If the device type is 0x22, it is also regarded as LFP.
798                  */
799                 if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
800                         p_child->device_type != DEVICE_TYPE_LFP)
801                         continue;
802
803                 /* The addin_offset should be checked. Only when it is
804                  * non-zero, it is regarded as present.
805                  */
806                 if (p_child->addin_offset) {
807                         ret = 1;
808                         break;
809                 }
810         }
811         return ret;
812 }
813
814 /**
815  * intel_lvds_init - setup LVDS connectors on this device
816  * @dev: drm device
817  *
818  * Create the connector, register the LVDS DDC bus, and try to figure out what
819  * modes we can display on the LVDS panel (if present).
820  */
821 void intel_lvds_init(struct drm_device *dev)
822 {
823         struct drm_i915_private *dev_priv = dev->dev_private;
824         struct intel_lvds *intel_lvds;
825         struct intel_encoder *intel_encoder;
826         struct intel_connector *intel_connector;
827         struct drm_connector *connector;
828         struct drm_encoder *encoder;
829         struct drm_display_mode *scan; /* *modes, *bios_mode; */
830         struct drm_crtc *crtc;
831         u32 lvds;
832         int pipe, gpio = GPIOC;
833
834         /* Skip init on machines we know falsely report LVDS */
835         if (dmi_check_system(intel_no_lvds))
836                 return;
837
838         if (!lvds_is_present_in_vbt(dev)) {
839                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
840                 return;
841         }
842
843         if (HAS_PCH_SPLIT(dev)) {
844                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
845                         return;
846                 if (dev_priv->edp_support) {
847                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
848                         return;
849                 }
850                 gpio = PCH_GPIOC;
851         }
852
853         intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
854         if (!intel_lvds) {
855                 return;
856         }
857
858         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
859         if (!intel_connector) {
860                 kfree(intel_lvds);
861                 return;
862         }
863
864         intel_encoder = &intel_lvds->base;
865         encoder = &intel_encoder->enc;
866         connector = &intel_connector->base;
867         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
868                            DRM_MODE_CONNECTOR_LVDS);
869
870         drm_encoder_init(dev, &intel_encoder->enc, &intel_lvds_enc_funcs,
871                          DRM_MODE_ENCODER_LVDS);
872
873         drm_mode_connector_attach_encoder(&intel_connector->base, &intel_encoder->enc);
874         intel_encoder->type = INTEL_OUTPUT_LVDS;
875
876         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
877         intel_encoder->crtc_mask = (1 << 1);
878         if (IS_I965G(dev))
879                 intel_encoder->crtc_mask |= (1 << 0);
880         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
881         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
882         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
883         connector->interlace_allowed = false;
884         connector->doublescan_allowed = false;
885
886         /* create the scaling mode property */
887         drm_mode_create_scaling_mode_property(dev);
888         /*
889          * the initial panel fitting mode will be FULL_SCREEN.
890          */
891
892         drm_connector_attach_property(&intel_connector->base,
893                                       dev->mode_config.scaling_mode_property,
894                                       DRM_MODE_SCALE_ASPECT);
895         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
896         /*
897          * LVDS discovery:
898          * 1) check for EDID on DDC
899          * 2) check for VBT data
900          * 3) check to see if LVDS is already on
901          *    if none of the above, no panel
902          * 4) make sure lid is open
903          *    if closed, act like it's not there for now
904          */
905
906         /* Set up the DDC bus. */
907         intel_encoder->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
908         if (!intel_encoder->ddc_bus) {
909                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
910                            "failed.\n");
911                 goto failed;
912         }
913
914         /*
915          * Attempt to get the fixed panel mode from DDC.  Assume that the
916          * preferred mode is the right one.
917          */
918         dev_priv->lvds_edid_good = true;
919
920         if (!intel_ddc_get_modes(connector, intel_encoder->ddc_bus))
921                 dev_priv->lvds_edid_good = false;
922
923         list_for_each_entry(scan, &connector->probed_modes, head) {
924                 mutex_lock(&dev->mode_config.mutex);
925                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
926                         dev_priv->panel_fixed_mode =
927                                 drm_mode_duplicate(dev, scan);
928                         mutex_unlock(&dev->mode_config.mutex);
929                         intel_find_lvds_downclock(dev, connector);
930                         goto out;
931                 }
932                 mutex_unlock(&dev->mode_config.mutex);
933         }
934
935         /* Failed to get EDID, what about VBT? */
936         if (dev_priv->lfp_lvds_vbt_mode) {
937                 mutex_lock(&dev->mode_config.mutex);
938                 dev_priv->panel_fixed_mode =
939                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
940                 mutex_unlock(&dev->mode_config.mutex);
941                 if (dev_priv->panel_fixed_mode) {
942                         dev_priv->panel_fixed_mode->type |=
943                                 DRM_MODE_TYPE_PREFERRED;
944                         goto out;
945                 }
946         }
947
948         /*
949          * If we didn't get EDID, try checking if the panel is already turned
950          * on.  If so, assume that whatever is currently programmed is the
951          * correct mode.
952          */
953
954         /* Ironlake: FIXME if still fail, not try pipe mode now */
955         if (HAS_PCH_SPLIT(dev))
956                 goto failed;
957
958         lvds = I915_READ(LVDS);
959         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
960         crtc = intel_get_crtc_from_pipe(dev, pipe);
961
962         if (crtc && (lvds & LVDS_PORT_EN)) {
963                 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
964                 if (dev_priv->panel_fixed_mode) {
965                         dev_priv->panel_fixed_mode->type |=
966                                 DRM_MODE_TYPE_PREFERRED;
967                         goto out;
968                 }
969         }
970
971         /* If we still don't have a mode after all that, give up. */
972         if (!dev_priv->panel_fixed_mode)
973                 goto failed;
974
975 out:
976         if (HAS_PCH_SPLIT(dev)) {
977                 u32 pwm;
978                 /* make sure PWM is enabled */
979                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
980                 pwm |= (PWM_ENABLE | PWM_PIPE_B);
981                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
982
983                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
984                 pwm |= PWM_PCH_ENABLE;
985                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
986         }
987         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
988         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
989                 DRM_DEBUG_KMS("lid notifier registration failed\n");
990                 dev_priv->lid_notifier.notifier_call = NULL;
991         }
992         /* keep the LVDS connector */
993         dev_priv->int_lvds_connector = connector;
994         drm_sysfs_connector_add(connector);
995         return;
996
997 failed:
998         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
999         if (intel_encoder->ddc_bus)
1000                 intel_i2c_destroy(intel_encoder->ddc_bus);
1001         drm_connector_cleanup(connector);
1002         drm_encoder_cleanup(encoder);
1003         kfree(intel_lvds);
1004         kfree(intel_connector);
1005 }