drm/i915: Refactor panel fitting on the LVDS. (v2)
[linux-2.6.git] / drivers / gpu / drm / i915 / intel_lvds.c
1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *      Eric Anholt <eric@anholt.net>
26  *      Dave Airlie <airlied@linux.ie>
27  *      Jesse Barnes <jesse.barnes@intel.com>
28  */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include "drmP.h"
35 #include "drm.h"
36 #include "drm_crtc.h"
37 #include "drm_edid.h"
38 #include "intel_drv.h"
39 #include "i915_drm.h"
40 #include "i915_drv.h"
41 #include <linux/acpi.h>
42
43 /* Private structure for the integrated LVDS support */
44 struct intel_lvds_priv {
45         int fitting_mode;
46         u32 pfit_control;
47         u32 pfit_pgm_ratios;
48 };
49
50 /**
51  * Sets the backlight level.
52  *
53  * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
54  */
55 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
56 {
57         struct drm_i915_private *dev_priv = dev->dev_private;
58         u32 blc_pwm_ctl, reg;
59
60         if (HAS_PCH_SPLIT(dev))
61                 reg = BLC_PWM_CPU_CTL;
62         else
63                 reg = BLC_PWM_CTL;
64
65         blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
66         I915_WRITE(reg, (blc_pwm_ctl |
67                                  (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
68 }
69
70 /**
71  * Returns the maximum level of the backlight duty cycle field.
72  */
73 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
74 {
75         struct drm_i915_private *dev_priv = dev->dev_private;
76         u32 reg;
77
78         if (HAS_PCH_SPLIT(dev))
79                 reg = BLC_PWM_PCH_CTL2;
80         else
81                 reg = BLC_PWM_CTL;
82
83         return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
84                 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
85 }
86
87 /**
88  * Sets the power state for the panel.
89  */
90 static void intel_lvds_set_power(struct drm_device *dev, bool on)
91 {
92         struct drm_i915_private *dev_priv = dev->dev_private;
93         u32 pp_status, ctl_reg, status_reg, lvds_reg;
94
95         if (HAS_PCH_SPLIT(dev)) {
96                 ctl_reg = PCH_PP_CONTROL;
97                 status_reg = PCH_PP_STATUS;
98                 lvds_reg = PCH_LVDS;
99         } else {
100                 ctl_reg = PP_CONTROL;
101                 status_reg = PP_STATUS;
102                 lvds_reg = LVDS;
103         }
104
105         if (on) {
106                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
107                 POSTING_READ(lvds_reg);
108
109                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
110                            POWER_TARGET_ON);
111                 do {
112                         pp_status = I915_READ(status_reg);
113                 } while ((pp_status & PP_ON) == 0);
114
115                 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
116         } else {
117                 intel_lvds_set_backlight(dev, 0);
118
119                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
120                            ~POWER_TARGET_ON);
121                 do {
122                         pp_status = I915_READ(status_reg);
123                 } while (pp_status & PP_ON);
124
125                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
126                 POSTING_READ(lvds_reg);
127         }
128 }
129
130 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
131 {
132         struct drm_device *dev = encoder->dev;
133
134         if (mode == DRM_MODE_DPMS_ON)
135                 intel_lvds_set_power(dev, true);
136         else
137                 intel_lvds_set_power(dev, false);
138
139         /* XXX: We never power down the LVDS pairs. */
140 }
141
142 static int intel_lvds_mode_valid(struct drm_connector *connector,
143                                  struct drm_display_mode *mode)
144 {
145         struct drm_device *dev = connector->dev;
146         struct drm_i915_private *dev_priv = dev->dev_private;
147         struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
148
149         if (fixed_mode) {
150                 if (mode->hdisplay > fixed_mode->hdisplay)
151                         return MODE_PANEL;
152                 if (mode->vdisplay > fixed_mode->vdisplay)
153                         return MODE_PANEL;
154         }
155
156         return MODE_OK;
157 }
158
159 static void
160 centre_horizontally(struct drm_display_mode *mode,
161                     int width)
162 {
163         u32 border, sync_pos, blank_width, sync_width;
164
165         /* keep the hsync and hblank widths constant */
166         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
167         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
168         sync_pos = (blank_width - sync_width + 1) / 2;
169
170         border = (mode->hdisplay - width + 1) / 2;
171         border += border & 1; /* make the border even */
172
173         mode->crtc_hdisplay = width;
174         mode->crtc_hblank_start = width + border;
175         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
176
177         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
178         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
179 }
180
181 static void
182 centre_vertically(struct drm_display_mode *mode,
183                   int height)
184 {
185         u32 border, sync_pos, blank_width, sync_width;
186
187         /* keep the vsync and vblank widths constant */
188         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
189         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
190         sync_pos = (blank_width - sync_width + 1) / 2;
191
192         border = (mode->vdisplay - height + 1) / 2;
193
194         mode->crtc_vdisplay = height;
195         mode->crtc_vblank_start = height + border;
196         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
197
198         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
199         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
200 }
201
202 static inline u32 panel_fitter_scaling(u32 source, u32 target)
203 {
204         /*
205          * Floating point operation is not supported. So the FACTOR
206          * is defined, which can avoid the floating point computation
207          * when calculating the panel ratio.
208          */
209 #define ACCURACY 12
210 #define FACTOR (1 << ACCURACY)
211         u32 ratio = source * FACTOR / target;
212         return (FACTOR * ratio + FACTOR/2) / FACTOR;
213 }
214
215 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
216                                   struct drm_display_mode *mode,
217                                   struct drm_display_mode *adjusted_mode)
218 {
219         struct drm_device *dev = encoder->dev;
220         struct drm_i915_private *dev_priv = dev->dev_private;
221         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
222         struct drm_encoder *tmp_encoder;
223         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
224         struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
225         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
226
227         /* Should never happen!! */
228         if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
229                 DRM_ERROR("Can't support LVDS on pipe A\n");
230                 return false;
231         }
232
233         /* Should never happen!! */
234         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
235                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
236                         DRM_ERROR("Can't enable LVDS and another "
237                                "encoder on the same pipe\n");
238                         return false;
239                 }
240         }
241         /* If we don't have a panel mode, there is nothing we can do */
242         if (dev_priv->panel_fixed_mode == NULL)
243                 return true;
244         /*
245          * We have timings from the BIOS for the panel, put them in
246          * to the adjusted mode.  The CRTC will be set up for this mode,
247          * with the panel scaling set up to source from the H/VDisplay
248          * of the original mode.
249          */
250         adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
251         adjusted_mode->hsync_start =
252                 dev_priv->panel_fixed_mode->hsync_start;
253         adjusted_mode->hsync_end =
254                 dev_priv->panel_fixed_mode->hsync_end;
255         adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
256         adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
257         adjusted_mode->vsync_start =
258                 dev_priv->panel_fixed_mode->vsync_start;
259         adjusted_mode->vsync_end =
260                 dev_priv->panel_fixed_mode->vsync_end;
261         adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
262         adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
263         drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
264
265         /* Make sure pre-965s set dither correctly */
266         if (!IS_I965G(dev)) {
267                 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
268                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
269         }
270
271         /* Native modes don't need fitting */
272         if (adjusted_mode->hdisplay == mode->hdisplay &&
273             adjusted_mode->vdisplay == mode->vdisplay)
274                 goto out;
275
276         /* full screen scale for now */
277         if (HAS_PCH_SPLIT(dev))
278                 goto out;
279
280         /* 965+ wants fuzzy fitting */
281         if (IS_I965G(dev))
282                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
283                                  PFIT_FILTER_FUZZY);
284
285         /*
286          * Enable automatic panel scaling for non-native modes so that they fill
287          * the screen.  Should be enabled before the pipe is enabled, according
288          * to register description and PRM.
289          * Change the value here to see the borders for debugging
290          */
291         if (!HAS_PCH_SPLIT(dev)) {
292                 I915_WRITE(BCLRPAT_A, 0);
293                 I915_WRITE(BCLRPAT_B, 0);
294         }
295
296         switch (lvds_priv->fitting_mode) {
297         case DRM_MODE_SCALE_CENTER:
298                 /*
299                  * For centered modes, we have to calculate border widths &
300                  * heights and modify the values programmed into the CRTC.
301                  */
302                 centre_horizontally(adjusted_mode, mode->hdisplay);
303                 centre_vertically(adjusted_mode, mode->vdisplay);
304                 border = LVDS_BORDER_ENABLE;
305                 break;
306
307         case DRM_MODE_SCALE_ASPECT:
308                 /* Scale but preserve the aspect ratio */
309                 if (IS_I965G(dev)) {
310                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
311                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
312
313                         pfit_control |= PFIT_ENABLE;
314                         /* 965+ is easy, it does everything in hw */
315                         if (scaled_width > scaled_height)
316                                 pfit_control |= PFIT_SCALING_PILLAR;
317                         else if (scaled_width < scaled_height)
318                                 pfit_control |= PFIT_SCALING_LETTER;
319                         else
320                                 pfit_control |= PFIT_SCALING_AUTO;
321                 } else {
322                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
323                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
324                         /*
325                          * For earlier chips we have to calculate the scaling
326                          * ratio by hand and program it into the
327                          * PFIT_PGM_RATIO register
328                          */
329                         if (scaled_width > scaled_height) { /* pillar */
330                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
331
332                                 border = LVDS_BORDER_ENABLE;
333                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
334                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
335                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
336                                                             bits << PFIT_VERT_SCALE_SHIFT);
337                                         pfit_control |= (PFIT_ENABLE |
338                                                          VERT_INTERP_BILINEAR |
339                                                          HORIZ_INTERP_BILINEAR);
340                                 }
341                         } else if (scaled_width < scaled_height) { /* letter */
342                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
343
344                                 border = LVDS_BORDER_ENABLE;
345                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
346                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
347                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
348                                                             bits << PFIT_VERT_SCALE_SHIFT);
349                                         pfit_control |= (PFIT_ENABLE |
350                                                          VERT_INTERP_BILINEAR |
351                                                          HORIZ_INTERP_BILINEAR);
352                                 }
353                         } else
354                                 /* Aspects match, Let hw scale both directions */
355                                 pfit_control |= (PFIT_ENABLE |
356                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
357                                                  VERT_INTERP_BILINEAR |
358                                                  HORIZ_INTERP_BILINEAR);
359                 }
360                 break;
361
362         case DRM_MODE_SCALE_FULLSCREEN:
363                 /*
364                  * Full scaling, even if it changes the aspect ratio.
365                  * Fortunately this is all done for us in hw.
366                  */
367                 pfit_control |= PFIT_ENABLE;
368                 if (IS_I965G(dev))
369                         pfit_control |= PFIT_SCALING_AUTO;
370                 else
371                         pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
372                                          VERT_INTERP_BILINEAR |
373                                          HORIZ_INTERP_BILINEAR);
374                 break;
375
376         default:
377                 break;
378         }
379
380 out:
381         lvds_priv->pfit_control = pfit_control;
382         lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
383         dev_priv->lvds_border_bits = border;
384
385         /*
386          * XXX: It would be nice to support lower refresh rates on the
387          * panels to reduce power consumption, and perhaps match the
388          * user's requested refresh rate.
389          */
390
391         return true;
392 }
393
394 static void intel_lvds_prepare(struct drm_encoder *encoder)
395 {
396         struct drm_device *dev = encoder->dev;
397         struct drm_i915_private *dev_priv = dev->dev_private;
398         u32 reg;
399
400         if (HAS_PCH_SPLIT(dev))
401                 reg = BLC_PWM_CPU_CTL;
402         else
403                 reg = BLC_PWM_CTL;
404
405         dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
406         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
407                                        BACKLIGHT_DUTY_CYCLE_MASK);
408
409         intel_lvds_set_power(dev, false);
410 }
411
412 static void intel_lvds_commit( struct drm_encoder *encoder)
413 {
414         struct drm_device *dev = encoder->dev;
415         struct drm_i915_private *dev_priv = dev->dev_private;
416
417         if (dev_priv->backlight_duty_cycle == 0)
418                 dev_priv->backlight_duty_cycle =
419                         intel_lvds_get_max_backlight(dev);
420
421         intel_lvds_set_power(dev, true);
422 }
423
424 static void intel_lvds_mode_set(struct drm_encoder *encoder,
425                                 struct drm_display_mode *mode,
426                                 struct drm_display_mode *adjusted_mode)
427 {
428         struct drm_device *dev = encoder->dev;
429         struct drm_i915_private *dev_priv = dev->dev_private;
430         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
431         struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
432
433         /*
434          * The LVDS pin pair will already have been turned on in the
435          * intel_crtc_mode_set since it has a large impact on the DPLL
436          * settings.
437          */
438
439         if (HAS_PCH_SPLIT(dev))
440                 return;
441
442         /*
443          * Enable automatic panel scaling so that non-native modes fill the
444          * screen.  Should be enabled before the pipe is enabled, according to
445          * register description and PRM.
446          */
447         I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
448         I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
449 }
450
451 /**
452  * Detect the LVDS connection.
453  *
454  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
455  * connected and closed means disconnected.  We also send hotplug events as
456  * needed, using lid status notification from the input layer.
457  */
458 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
459 {
460         struct drm_device *dev = connector->dev;
461         enum drm_connector_status status = connector_status_connected;
462
463         /* ACPI lid methods were generally unreliable in this generation, so
464          * don't even bother.
465          */
466         if (IS_GEN2(dev) || IS_GEN3(dev))
467                 return connector_status_connected;
468
469         return status;
470 }
471
472 /**
473  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
474  */
475 static int intel_lvds_get_modes(struct drm_connector *connector)
476 {
477         struct drm_device *dev = connector->dev;
478         struct drm_encoder *encoder = intel_attached_encoder(connector);
479         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
480         struct drm_i915_private *dev_priv = dev->dev_private;
481         int ret = 0;
482
483         if (dev_priv->lvds_edid_good) {
484                 ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
485
486                 if (ret)
487                         return ret;
488         }
489
490         /* Didn't get an EDID, so
491          * Set wide sync ranges so we get all modes
492          * handed to valid_mode for checking
493          */
494         connector->display_info.min_vfreq = 0;
495         connector->display_info.max_vfreq = 200;
496         connector->display_info.min_hfreq = 0;
497         connector->display_info.max_hfreq = 200;
498
499         if (dev_priv->panel_fixed_mode != NULL) {
500                 struct drm_display_mode *mode;
501
502                 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
503                 drm_mode_probed_add(connector, mode);
504
505                 return 1;
506         }
507
508         return 0;
509 }
510
511 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
512 {
513         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
514         return 1;
515 }
516
517 /* The GPU hangs up on these systems if modeset is performed on LID open */
518 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
519         {
520                 .callback = intel_no_modeset_on_lid_dmi_callback,
521                 .ident = "Toshiba Tecra A11",
522                 .matches = {
523                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
524                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
525                 },
526         },
527
528         { }     /* terminating entry */
529 };
530
531 /*
532  * Lid events. Note the use of 'modeset_on_lid':
533  *  - we set it on lid close, and reset it on open
534  *  - we use it as a "only once" bit (ie we ignore
535  *    duplicate events where it was already properly
536  *    set/reset)
537  *  - the suspend/resume paths will also set it to
538  *    zero, since they restore the mode ("lid open").
539  */
540 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
541                             void *unused)
542 {
543         struct drm_i915_private *dev_priv =
544                 container_of(nb, struct drm_i915_private, lid_notifier);
545         struct drm_device *dev = dev_priv->dev;
546         struct drm_connector *connector = dev_priv->int_lvds_connector;
547
548         /*
549          * check and update the status of LVDS connector after receiving
550          * the LID nofication event.
551          */
552         if (connector)
553                 connector->status = connector->funcs->detect(connector);
554         /* Don't force modeset on machines where it causes a GPU lockup */
555         if (dmi_check_system(intel_no_modeset_on_lid))
556                 return NOTIFY_OK;
557         if (!acpi_lid_open()) {
558                 dev_priv->modeset_on_lid = 1;
559                 return NOTIFY_OK;
560         }
561
562         if (!dev_priv->modeset_on_lid)
563                 return NOTIFY_OK;
564
565         dev_priv->modeset_on_lid = 0;
566
567         mutex_lock(&dev->mode_config.mutex);
568         drm_helper_resume_force_mode(dev);
569         mutex_unlock(&dev->mode_config.mutex);
570
571         return NOTIFY_OK;
572 }
573
574 /**
575  * intel_lvds_destroy - unregister and free LVDS structures
576  * @connector: connector to free
577  *
578  * Unregister the DDC bus for this connector then free the driver private
579  * structure.
580  */
581 static void intel_lvds_destroy(struct drm_connector *connector)
582 {
583         struct drm_device *dev = connector->dev;
584         struct drm_i915_private *dev_priv = dev->dev_private;
585
586         if (dev_priv->lid_notifier.notifier_call)
587                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
588         drm_sysfs_connector_remove(connector);
589         drm_connector_cleanup(connector);
590         kfree(connector);
591 }
592
593 static int intel_lvds_set_property(struct drm_connector *connector,
594                                    struct drm_property *property,
595                                    uint64_t value)
596 {
597         struct drm_device *dev = connector->dev;
598
599         if (property == dev->mode_config.scaling_mode_property &&
600                                 connector->encoder) {
601                 struct drm_crtc *crtc = connector->encoder->crtc;
602                 struct drm_encoder *encoder = connector->encoder;
603                 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
604                 struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
605
606                 if (value == DRM_MODE_SCALE_NONE) {
607                         DRM_DEBUG_KMS("no scaling not supported\n");
608                         return 0;
609                 }
610                 if (lvds_priv->fitting_mode == value) {
611                         /* the LVDS scaling property is not changed */
612                         return 0;
613                 }
614                 lvds_priv->fitting_mode = value;
615                 if (crtc && crtc->enabled) {
616                         /*
617                          * If the CRTC is enabled, the display will be changed
618                          * according to the new panel fitting mode.
619                          */
620                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
621                                 crtc->x, crtc->y, crtc->fb);
622                 }
623         }
624
625         return 0;
626 }
627
628 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
629         .dpms = intel_lvds_dpms,
630         .mode_fixup = intel_lvds_mode_fixup,
631         .prepare = intel_lvds_prepare,
632         .mode_set = intel_lvds_mode_set,
633         .commit = intel_lvds_commit,
634 };
635
636 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
637         .get_modes = intel_lvds_get_modes,
638         .mode_valid = intel_lvds_mode_valid,
639         .best_encoder = intel_attached_encoder,
640 };
641
642 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
643         .dpms = drm_helper_connector_dpms,
644         .detect = intel_lvds_detect,
645         .fill_modes = drm_helper_probe_single_connector_modes,
646         .set_property = intel_lvds_set_property,
647         .destroy = intel_lvds_destroy,
648 };
649
650
651 static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
652 {
653         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
654
655         if (intel_encoder->ddc_bus)
656                 intel_i2c_destroy(intel_encoder->ddc_bus);
657         drm_encoder_cleanup(encoder);
658         kfree(intel_encoder);
659 }
660
661 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
662         .destroy = intel_lvds_enc_destroy,
663 };
664
665 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
666 {
667         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
668         return 1;
669 }
670
671 /* These systems claim to have LVDS, but really don't */
672 static const struct dmi_system_id intel_no_lvds[] = {
673         {
674                 .callback = intel_no_lvds_dmi_callback,
675                 .ident = "Apple Mac Mini (Core series)",
676                 .matches = {
677                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
678                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
679                 },
680         },
681         {
682                 .callback = intel_no_lvds_dmi_callback,
683                 .ident = "Apple Mac Mini (Core 2 series)",
684                 .matches = {
685                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
686                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
687                 },
688         },
689         {
690                 .callback = intel_no_lvds_dmi_callback,
691                 .ident = "MSI IM-945GSE-A",
692                 .matches = {
693                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
694                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
695                 },
696         },
697         {
698                 .callback = intel_no_lvds_dmi_callback,
699                 .ident = "Dell Studio Hybrid",
700                 .matches = {
701                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
702                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
703                 },
704         },
705         {
706                 .callback = intel_no_lvds_dmi_callback,
707                 .ident = "AOpen Mini PC",
708                 .matches = {
709                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
710                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
711                 },
712         },
713         {
714                 .callback = intel_no_lvds_dmi_callback,
715                 .ident = "AOpen Mini PC MP915",
716                 .matches = {
717                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
718                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
719                 },
720         },
721         {
722                 .callback = intel_no_lvds_dmi_callback,
723                 .ident = "Aopen i945GTt-VFA",
724                 .matches = {
725                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
726                 },
727         },
728         {
729                 .callback = intel_no_lvds_dmi_callback,
730                 .ident = "Clientron U800",
731                 .matches = {
732                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
733                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
734                 },
735         },
736
737         { }     /* terminating entry */
738 };
739
740 /**
741  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
742  * @dev: drm device
743  * @connector: LVDS connector
744  *
745  * Find the reduced downclock for LVDS in EDID.
746  */
747 static void intel_find_lvds_downclock(struct drm_device *dev,
748                                 struct drm_connector *connector)
749 {
750         struct drm_i915_private *dev_priv = dev->dev_private;
751         struct drm_display_mode *scan, *panel_fixed_mode;
752         int temp_downclock;
753
754         panel_fixed_mode = dev_priv->panel_fixed_mode;
755         temp_downclock = panel_fixed_mode->clock;
756
757         mutex_lock(&dev->mode_config.mutex);
758         list_for_each_entry(scan, &connector->probed_modes, head) {
759                 /*
760                  * If one mode has the same resolution with the fixed_panel
761                  * mode while they have the different refresh rate, it means
762                  * that the reduced downclock is found for the LVDS. In such
763                  * case we can set the different FPx0/1 to dynamically select
764                  * between low and high frequency.
765                  */
766                 if (scan->hdisplay == panel_fixed_mode->hdisplay &&
767                         scan->hsync_start == panel_fixed_mode->hsync_start &&
768                         scan->hsync_end == panel_fixed_mode->hsync_end &&
769                         scan->htotal == panel_fixed_mode->htotal &&
770                         scan->vdisplay == panel_fixed_mode->vdisplay &&
771                         scan->vsync_start == panel_fixed_mode->vsync_start &&
772                         scan->vsync_end == panel_fixed_mode->vsync_end &&
773                         scan->vtotal == panel_fixed_mode->vtotal) {
774                         if (scan->clock < temp_downclock) {
775                                 /*
776                                  * The downclock is already found. But we
777                                  * expect to find the lower downclock.
778                                  */
779                                 temp_downclock = scan->clock;
780                         }
781                 }
782         }
783         mutex_unlock(&dev->mode_config.mutex);
784         if (temp_downclock < panel_fixed_mode->clock &&
785             i915_lvds_downclock) {
786                 /* We found the downclock for LVDS. */
787                 dev_priv->lvds_downclock_avail = 1;
788                 dev_priv->lvds_downclock = temp_downclock;
789                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
790                                 "Normal clock %dKhz, downclock %dKhz\n",
791                                 panel_fixed_mode->clock, temp_downclock);
792         }
793         return;
794 }
795
796 /*
797  * Enumerate the child dev array parsed from VBT to check whether
798  * the LVDS is present.
799  * If it is present, return 1.
800  * If it is not present, return false.
801  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
802  * Note: The addin_offset should also be checked for LVDS panel.
803  * Only when it is non-zero, it is assumed that it is present.
804  */
805 static int lvds_is_present_in_vbt(struct drm_device *dev)
806 {
807         struct drm_i915_private *dev_priv = dev->dev_private;
808         struct child_device_config *p_child;
809         int i, ret;
810
811         if (!dev_priv->child_dev_num)
812                 return 1;
813
814         ret = 0;
815         for (i = 0; i < dev_priv->child_dev_num; i++) {
816                 p_child = dev_priv->child_dev + i;
817                 /*
818                  * If the device type is not LFP, continue.
819                  * If the device type is 0x22, it is also regarded as LFP.
820                  */
821                 if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
822                         p_child->device_type != DEVICE_TYPE_LFP)
823                         continue;
824
825                 /* The addin_offset should be checked. Only when it is
826                  * non-zero, it is regarded as present.
827                  */
828                 if (p_child->addin_offset) {
829                         ret = 1;
830                         break;
831                 }
832         }
833         return ret;
834 }
835
836 /**
837  * intel_lvds_init - setup LVDS connectors on this device
838  * @dev: drm device
839  *
840  * Create the connector, register the LVDS DDC bus, and try to figure out what
841  * modes we can display on the LVDS panel (if present).
842  */
843 void intel_lvds_init(struct drm_device *dev)
844 {
845         struct drm_i915_private *dev_priv = dev->dev_private;
846         struct intel_encoder *intel_encoder;
847         struct intel_connector *intel_connector;
848         struct drm_connector *connector;
849         struct drm_encoder *encoder;
850         struct drm_display_mode *scan; /* *modes, *bios_mode; */
851         struct drm_crtc *crtc;
852         struct intel_lvds_priv *lvds_priv;
853         u32 lvds;
854         int pipe, gpio = GPIOC;
855
856         /* Skip init on machines we know falsely report LVDS */
857         if (dmi_check_system(intel_no_lvds))
858                 return;
859
860         if (!lvds_is_present_in_vbt(dev)) {
861                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
862                 return;
863         }
864
865         if (HAS_PCH_SPLIT(dev)) {
866                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
867                         return;
868                 if (dev_priv->edp_support) {
869                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
870                         return;
871                 }
872                 gpio = PCH_GPIOC;
873         }
874
875         intel_encoder = kzalloc(sizeof(struct intel_encoder) +
876                                 sizeof(struct intel_lvds_priv), GFP_KERNEL);
877         if (!intel_encoder) {
878                 return;
879         }
880
881         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
882         if (!intel_connector) {
883                 kfree(intel_encoder);
884                 return;
885         }
886
887         connector = &intel_connector->base;
888         encoder = &intel_encoder->enc;
889         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
890                            DRM_MODE_CONNECTOR_LVDS);
891
892         drm_encoder_init(dev, &intel_encoder->enc, &intel_lvds_enc_funcs,
893                          DRM_MODE_ENCODER_LVDS);
894
895         drm_mode_connector_attach_encoder(&intel_connector->base, &intel_encoder->enc);
896         intel_encoder->type = INTEL_OUTPUT_LVDS;
897
898         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
899         intel_encoder->crtc_mask = (1 << 1);
900         if (IS_I965G(dev))
901                 intel_encoder->crtc_mask |= (1 << 0);
902         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
903         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
904         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
905         connector->interlace_allowed = false;
906         connector->doublescan_allowed = false;
907
908         lvds_priv = (struct intel_lvds_priv *)(intel_encoder + 1);
909         intel_encoder->dev_priv = lvds_priv;
910         /* create the scaling mode property */
911         drm_mode_create_scaling_mode_property(dev);
912         /*
913          * the initial panel fitting mode will be FULL_SCREEN.
914          */
915
916         drm_connector_attach_property(&intel_connector->base,
917                                       dev->mode_config.scaling_mode_property,
918                                       DRM_MODE_SCALE_ASPECT);
919         lvds_priv->fitting_mode = DRM_MODE_SCALE_ASPECT;
920         /*
921          * LVDS discovery:
922          * 1) check for EDID on DDC
923          * 2) check for VBT data
924          * 3) check to see if LVDS is already on
925          *    if none of the above, no panel
926          * 4) make sure lid is open
927          *    if closed, act like it's not there for now
928          */
929
930         /* Set up the DDC bus. */
931         intel_encoder->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
932         if (!intel_encoder->ddc_bus) {
933                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
934                            "failed.\n");
935                 goto failed;
936         }
937
938         /*
939          * Attempt to get the fixed panel mode from DDC.  Assume that the
940          * preferred mode is the right one.
941          */
942         dev_priv->lvds_edid_good = true;
943
944         if (!intel_ddc_get_modes(connector, intel_encoder->ddc_bus))
945                 dev_priv->lvds_edid_good = false;
946
947         list_for_each_entry(scan, &connector->probed_modes, head) {
948                 mutex_lock(&dev->mode_config.mutex);
949                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
950                         dev_priv->panel_fixed_mode =
951                                 drm_mode_duplicate(dev, scan);
952                         mutex_unlock(&dev->mode_config.mutex);
953                         intel_find_lvds_downclock(dev, connector);
954                         goto out;
955                 }
956                 mutex_unlock(&dev->mode_config.mutex);
957         }
958
959         /* Failed to get EDID, what about VBT? */
960         if (dev_priv->lfp_lvds_vbt_mode) {
961                 mutex_lock(&dev->mode_config.mutex);
962                 dev_priv->panel_fixed_mode =
963                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
964                 mutex_unlock(&dev->mode_config.mutex);
965                 if (dev_priv->panel_fixed_mode) {
966                         dev_priv->panel_fixed_mode->type |=
967                                 DRM_MODE_TYPE_PREFERRED;
968                         goto out;
969                 }
970         }
971
972         /*
973          * If we didn't get EDID, try checking if the panel is already turned
974          * on.  If so, assume that whatever is currently programmed is the
975          * correct mode.
976          */
977
978         /* Ironlake: FIXME if still fail, not try pipe mode now */
979         if (HAS_PCH_SPLIT(dev))
980                 goto failed;
981
982         lvds = I915_READ(LVDS);
983         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
984         crtc = intel_get_crtc_from_pipe(dev, pipe);
985
986         if (crtc && (lvds & LVDS_PORT_EN)) {
987                 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
988                 if (dev_priv->panel_fixed_mode) {
989                         dev_priv->panel_fixed_mode->type |=
990                                 DRM_MODE_TYPE_PREFERRED;
991                         goto out;
992                 }
993         }
994
995         /* If we still don't have a mode after all that, give up. */
996         if (!dev_priv->panel_fixed_mode)
997                 goto failed;
998
999 out:
1000         if (HAS_PCH_SPLIT(dev)) {
1001                 u32 pwm;
1002                 /* make sure PWM is enabled */
1003                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1004                 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1005                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1006
1007                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1008                 pwm |= PWM_PCH_ENABLE;
1009                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1010         }
1011         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1012         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1013                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1014                 dev_priv->lid_notifier.notifier_call = NULL;
1015         }
1016         /* keep the LVDS connector */
1017         dev_priv->int_lvds_connector = connector;
1018         drm_sysfs_connector_add(connector);
1019         return;
1020
1021 failed:
1022         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1023         if (intel_encoder->ddc_bus)
1024                 intel_i2c_destroy(intel_encoder->ddc_bus);
1025         drm_connector_cleanup(connector);
1026         drm_encoder_cleanup(encoder);
1027         kfree(intel_encoder);
1028         kfree(intel_connector);
1029 }