drm/i915: enable/disable LVDS port at DPMS time
[linux-2.6.git] / drivers / gpu / drm / i915 / intel_lvds.c
1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *      Eric Anholt <eric@anholt.net>
26  *      Dave Airlie <airlied@linux.ie>
27  *      Jesse Barnes <jesse.barnes@intel.com>
28  */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include "drmP.h"
34 #include "drm.h"
35 #include "drm_crtc.h"
36 #include "drm_edid.h"
37 #include "intel_drv.h"
38 #include "i915_drm.h"
39 #include "i915_drv.h"
40 #include <linux/acpi.h>
41
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds_priv {
44         int fitting_mode;
45         u32 pfit_control;
46         u32 pfit_pgm_ratios;
47 };
48
49 /**
50  * Sets the backlight level.
51  *
52  * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
53  */
54 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
55 {
56         struct drm_i915_private *dev_priv = dev->dev_private;
57         u32 blc_pwm_ctl, reg;
58
59         if (HAS_PCH_SPLIT(dev))
60                 reg = BLC_PWM_CPU_CTL;
61         else
62                 reg = BLC_PWM_CTL;
63
64         blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
65         I915_WRITE(reg, (blc_pwm_ctl |
66                                  (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
67 }
68
69 /**
70  * Returns the maximum level of the backlight duty cycle field.
71  */
72 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
73 {
74         struct drm_i915_private *dev_priv = dev->dev_private;
75         u32 reg;
76
77         if (HAS_PCH_SPLIT(dev))
78                 reg = BLC_PWM_PCH_CTL2;
79         else
80                 reg = BLC_PWM_CTL;
81
82         return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
83                 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
84 }
85
86 /**
87  * Sets the power state for the panel.
88  */
89 static void intel_lvds_set_power(struct drm_device *dev, bool on)
90 {
91         struct drm_i915_private *dev_priv = dev->dev_private;
92         u32 pp_status, ctl_reg, status_reg, lvds_reg;
93
94         if (HAS_PCH_SPLIT(dev)) {
95                 ctl_reg = PCH_PP_CONTROL;
96                 status_reg = PCH_PP_STATUS;
97                 lvds_reg = PCH_LVDS;
98         } else {
99                 ctl_reg = PP_CONTROL;
100                 status_reg = PP_STATUS;
101                 lvds_reg = LVDS;
102         }
103
104         if (on) {
105                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
106                 POSTING_READ(lvds_reg);
107
108                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
109                            POWER_TARGET_ON);
110                 do {
111                         pp_status = I915_READ(status_reg);
112                 } while ((pp_status & PP_ON) == 0);
113
114                 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
115         } else {
116                 intel_lvds_set_backlight(dev, 0);
117
118                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
119                            ~POWER_TARGET_ON);
120                 do {
121                         pp_status = I915_READ(status_reg);
122                 } while (pp_status & PP_ON);
123
124                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
125                 POSTING_READ(lvds_reg);
126         }
127 }
128
129 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
130 {
131         struct drm_device *dev = encoder->dev;
132
133         if (mode == DRM_MODE_DPMS_ON)
134                 intel_lvds_set_power(dev, true);
135         else
136                 intel_lvds_set_power(dev, false);
137
138         /* XXX: We never power down the LVDS pairs. */
139 }
140
141 static void intel_lvds_save(struct drm_connector *connector)
142 {
143         struct drm_device *dev = connector->dev;
144         struct drm_i915_private *dev_priv = dev->dev_private;
145         u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
146         u32 pwm_ctl_reg;
147
148         if (HAS_PCH_SPLIT(dev)) {
149                 pp_on_reg = PCH_PP_ON_DELAYS;
150                 pp_off_reg = PCH_PP_OFF_DELAYS;
151                 pp_ctl_reg = PCH_PP_CONTROL;
152                 pp_div_reg = PCH_PP_DIVISOR;
153                 pwm_ctl_reg = BLC_PWM_CPU_CTL;
154         } else {
155                 pp_on_reg = PP_ON_DELAYS;
156                 pp_off_reg = PP_OFF_DELAYS;
157                 pp_ctl_reg = PP_CONTROL;
158                 pp_div_reg = PP_DIVISOR;
159                 pwm_ctl_reg = BLC_PWM_CTL;
160         }
161
162         dev_priv->savePP_ON = I915_READ(pp_on_reg);
163         dev_priv->savePP_OFF = I915_READ(pp_off_reg);
164         dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
165         dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
166         dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
167         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
168                                        BACKLIGHT_DUTY_CYCLE_MASK);
169
170         /*
171          * If the light is off at server startup, just make it full brightness
172          */
173         if (dev_priv->backlight_duty_cycle == 0)
174                 dev_priv->backlight_duty_cycle =
175                         intel_lvds_get_max_backlight(dev);
176 }
177
178 static void intel_lvds_restore(struct drm_connector *connector)
179 {
180         struct drm_device *dev = connector->dev;
181         struct drm_i915_private *dev_priv = dev->dev_private;
182         u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
183         u32 pwm_ctl_reg;
184
185         if (HAS_PCH_SPLIT(dev)) {
186                 pp_on_reg = PCH_PP_ON_DELAYS;
187                 pp_off_reg = PCH_PP_OFF_DELAYS;
188                 pp_ctl_reg = PCH_PP_CONTROL;
189                 pp_div_reg = PCH_PP_DIVISOR;
190                 pwm_ctl_reg = BLC_PWM_CPU_CTL;
191         } else {
192                 pp_on_reg = PP_ON_DELAYS;
193                 pp_off_reg = PP_OFF_DELAYS;
194                 pp_ctl_reg = PP_CONTROL;
195                 pp_div_reg = PP_DIVISOR;
196                 pwm_ctl_reg = BLC_PWM_CTL;
197         }
198
199         I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
200         I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
201         I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
202         I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
203         I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
204         if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
205                 intel_lvds_set_power(dev, true);
206         else
207                 intel_lvds_set_power(dev, false);
208 }
209
210 static int intel_lvds_mode_valid(struct drm_connector *connector,
211                                  struct drm_display_mode *mode)
212 {
213         struct drm_device *dev = connector->dev;
214         struct drm_i915_private *dev_priv = dev->dev_private;
215         struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
216
217         if (fixed_mode) {
218                 if (mode->hdisplay > fixed_mode->hdisplay)
219                         return MODE_PANEL;
220                 if (mode->vdisplay > fixed_mode->vdisplay)
221                         return MODE_PANEL;
222         }
223
224         return MODE_OK;
225 }
226
227 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
228                                   struct drm_display_mode *mode,
229                                   struct drm_display_mode *adjusted_mode)
230 {
231         /*
232          * float point operation is not supported . So the PANEL_RATIO_FACTOR
233          * is defined, which can avoid the float point computation when
234          * calculating the panel ratio.
235          */
236 #define PANEL_RATIO_FACTOR 8192
237         struct drm_device *dev = encoder->dev;
238         struct drm_i915_private *dev_priv = dev->dev_private;
239         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
240         struct drm_encoder *tmp_encoder;
241         struct intel_output *intel_output = enc_to_intel_output(encoder);
242         struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
243         u32 pfit_control = 0, pfit_pgm_ratios = 0;
244         int left_border = 0, right_border = 0, top_border = 0;
245         int bottom_border = 0;
246         bool border = 0;
247         int panel_ratio, desired_ratio, vert_scale, horiz_scale;
248         int horiz_ratio, vert_ratio;
249         u32 hsync_width, vsync_width;
250         u32 hblank_width, vblank_width;
251         u32 hsync_pos, vsync_pos;
252
253         /* Should never happen!! */
254         if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
255                 DRM_ERROR("Can't support LVDS on pipe A\n");
256                 return false;
257         }
258
259         /* Should never happen!! */
260         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
261                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
262                         DRM_ERROR("Can't enable LVDS and another "
263                                "encoder on the same pipe\n");
264                         return false;
265                 }
266         }
267         /* If we don't have a panel mode, there is nothing we can do */
268         if (dev_priv->panel_fixed_mode == NULL)
269                 return true;
270         /*
271          * If we have timings from the BIOS for the panel, put them in
272          * to the adjusted mode.  The CRTC will be set up for this mode,
273          * with the panel scaling set up to source from the H/VDisplay
274          * of the original mode.
275          */
276         if (dev_priv->panel_fixed_mode != NULL) {
277                 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
278                 adjusted_mode->hsync_start =
279                         dev_priv->panel_fixed_mode->hsync_start;
280                 adjusted_mode->hsync_end =
281                         dev_priv->panel_fixed_mode->hsync_end;
282                 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
283                 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
284                 adjusted_mode->vsync_start =
285                         dev_priv->panel_fixed_mode->vsync_start;
286                 adjusted_mode->vsync_end =
287                         dev_priv->panel_fixed_mode->vsync_end;
288                 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
289                 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
290                 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
291         }
292
293         /* Make sure pre-965s set dither correctly */
294         if (!IS_I965G(dev)) {
295                 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
296                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
297         }
298
299         /* Native modes don't need fitting */
300         if (adjusted_mode->hdisplay == mode->hdisplay &&
301                         adjusted_mode->vdisplay == mode->vdisplay) {
302                 pfit_pgm_ratios = 0;
303                 border = 0;
304                 goto out;
305         }
306
307         /* full screen scale for now */
308         if (HAS_PCH_SPLIT(dev))
309                 goto out;
310
311         /* 965+ wants fuzzy fitting */
312         if (IS_I965G(dev))
313                 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
314                                         PFIT_FILTER_FUZZY;
315
316         hsync_width = adjusted_mode->crtc_hsync_end -
317                                         adjusted_mode->crtc_hsync_start;
318         vsync_width = adjusted_mode->crtc_vsync_end -
319                                         adjusted_mode->crtc_vsync_start;
320         hblank_width = adjusted_mode->crtc_hblank_end -
321                                         adjusted_mode->crtc_hblank_start;
322         vblank_width = adjusted_mode->crtc_vblank_end -
323                                         adjusted_mode->crtc_vblank_start;
324         /*
325          * Deal with panel fitting options. Figure out how to stretch the
326          * image based on its aspect ratio & the current panel fitting mode.
327          */
328         panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
329                                 adjusted_mode->vdisplay;
330         desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
331                                 mode->vdisplay;
332         /*
333          * Enable automatic panel scaling for non-native modes so that they fill
334          * the screen.  Should be enabled before the pipe is enabled, according
335          * to register description and PRM.
336          * Change the value here to see the borders for debugging
337          */
338         if (!HAS_PCH_SPLIT(dev)) {
339                 I915_WRITE(BCLRPAT_A, 0);
340                 I915_WRITE(BCLRPAT_B, 0);
341         }
342
343         switch (lvds_priv->fitting_mode) {
344         case DRM_MODE_SCALE_CENTER:
345                 /*
346                  * For centered modes, we have to calculate border widths &
347                  * heights and modify the values programmed into the CRTC.
348                  */
349                 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
350                 right_border = left_border;
351                 if (mode->hdisplay & 1)
352                         right_border++;
353                 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
354                 bottom_border = top_border;
355                 if (mode->vdisplay & 1)
356                         bottom_border++;
357                 /* Set active & border values */
358                 adjusted_mode->crtc_hdisplay = mode->hdisplay;
359                 /* Keep the boder be even */
360                 if (right_border & 1)
361                         right_border++;
362                 /* use the border directly instead of border minuse one */
363                 adjusted_mode->crtc_hblank_start = mode->hdisplay +
364                                                 right_border;
365                 /* keep the blank width constant */
366                 adjusted_mode->crtc_hblank_end =
367                         adjusted_mode->crtc_hblank_start + hblank_width;
368                 /* get the hsync pos relative to hblank start */
369                 hsync_pos = (hblank_width - hsync_width) / 2;
370                 /* keep the hsync pos be even */
371                 if (hsync_pos & 1)
372                         hsync_pos++;
373                 adjusted_mode->crtc_hsync_start =
374                                 adjusted_mode->crtc_hblank_start + hsync_pos;
375                 /* keep the hsync width constant */
376                 adjusted_mode->crtc_hsync_end =
377                                 adjusted_mode->crtc_hsync_start + hsync_width;
378                 adjusted_mode->crtc_vdisplay = mode->vdisplay;
379                 /* use the border instead of border minus one */
380                 adjusted_mode->crtc_vblank_start = mode->vdisplay +
381                                                 bottom_border;
382                 /* keep the vblank width constant */
383                 adjusted_mode->crtc_vblank_end =
384                                 adjusted_mode->crtc_vblank_start + vblank_width;
385                 /* get the vsync start postion relative to vblank start */
386                 vsync_pos = (vblank_width - vsync_width) / 2;
387                 adjusted_mode->crtc_vsync_start =
388                                 adjusted_mode->crtc_vblank_start + vsync_pos;
389                 /* keep the vsync width constant */
390                 adjusted_mode->crtc_vsync_end =
391                                 adjusted_mode->crtc_vsync_start + vsync_width;
392                 border = 1;
393                 break;
394         case DRM_MODE_SCALE_ASPECT:
395                 /* Scale but preserve the spect ratio */
396                 pfit_control |= PFIT_ENABLE;
397                 if (IS_I965G(dev)) {
398                         /* 965+ is easy, it does everything in hw */
399                         if (panel_ratio > desired_ratio)
400                                 pfit_control |= PFIT_SCALING_PILLAR;
401                         else if (panel_ratio < desired_ratio)
402                                 pfit_control |= PFIT_SCALING_LETTER;
403                         else
404                                 pfit_control |= PFIT_SCALING_AUTO;
405                 } else {
406                         /*
407                          * For earlier chips we have to calculate the scaling
408                          * ratio by hand and program it into the
409                          * PFIT_PGM_RATIO register
410                          */
411                         u32 horiz_bits, vert_bits, bits = 12;
412                         horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
413                                                 adjusted_mode->hdisplay;
414                         vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
415                                                 adjusted_mode->vdisplay;
416                         horiz_scale = adjusted_mode->hdisplay *
417                                         PANEL_RATIO_FACTOR / mode->hdisplay;
418                         vert_scale = adjusted_mode->vdisplay *
419                                         PANEL_RATIO_FACTOR / mode->vdisplay;
420
421                         /* retain aspect ratio */
422                         if (panel_ratio > desired_ratio) { /* Pillar */
423                                 u32 scaled_width;
424                                 scaled_width = mode->hdisplay * vert_scale /
425                                                 PANEL_RATIO_FACTOR;
426                                 horiz_ratio = vert_ratio;
427                                 pfit_control |= (VERT_AUTO_SCALE |
428                                                  VERT_INTERP_BILINEAR |
429                                                  HORIZ_INTERP_BILINEAR);
430                                 /* Pillar will have left/right borders */
431                                 left_border = (adjusted_mode->hdisplay -
432                                                 scaled_width) / 2;
433                                 right_border = left_border;
434                                 if (mode->hdisplay & 1) /* odd resolutions */
435                                         right_border++;
436                                 /* keep the border be even */
437                                 if (right_border & 1)
438                                         right_border++;
439                                 adjusted_mode->crtc_hdisplay = scaled_width;
440                                 /* use border instead of border minus one */
441                                 adjusted_mode->crtc_hblank_start =
442                                         scaled_width + right_border;
443                                 /* keep the hblank width constant */
444                                 adjusted_mode->crtc_hblank_end =
445                                         adjusted_mode->crtc_hblank_start +
446                                                         hblank_width;
447                                 /*
448                                  * get the hsync start pos relative to
449                                  * hblank start
450                                  */
451                                 hsync_pos = (hblank_width - hsync_width) / 2;
452                                 /* keep the hsync_pos be even */
453                                 if (hsync_pos & 1)
454                                         hsync_pos++;
455                                 adjusted_mode->crtc_hsync_start =
456                                         adjusted_mode->crtc_hblank_start +
457                                                         hsync_pos;
458                                 /* keept hsync width constant */
459                                 adjusted_mode->crtc_hsync_end =
460                                         adjusted_mode->crtc_hsync_start +
461                                                         hsync_width;
462                                 border = 1;
463                         } else if (panel_ratio < desired_ratio) { /* letter */
464                                 u32 scaled_height = mode->vdisplay *
465                                         horiz_scale / PANEL_RATIO_FACTOR;
466                                 vert_ratio = horiz_ratio;
467                                 pfit_control |= (HORIZ_AUTO_SCALE |
468                                                  VERT_INTERP_BILINEAR |
469                                                  HORIZ_INTERP_BILINEAR);
470                                 /* Letterbox will have top/bottom border */
471                                 top_border = (adjusted_mode->vdisplay -
472                                         scaled_height) / 2;
473                                 bottom_border = top_border;
474                                 if (mode->vdisplay & 1)
475                                         bottom_border++;
476                                 adjusted_mode->crtc_vdisplay = scaled_height;
477                                 /* use border instead of border minus one */
478                                 adjusted_mode->crtc_vblank_start =
479                                         scaled_height + bottom_border;
480                                 /* keep the vblank width constant */
481                                 adjusted_mode->crtc_vblank_end =
482                                         adjusted_mode->crtc_vblank_start +
483                                                         vblank_width;
484                                 /*
485                                  * get the vsync start pos relative to
486                                  * vblank start
487                                  */
488                                 vsync_pos = (vblank_width - vsync_width) / 2;
489                                 adjusted_mode->crtc_vsync_start =
490                                         adjusted_mode->crtc_vblank_start +
491                                                         vsync_pos;
492                                 /* keep the vsync width constant */
493                                 adjusted_mode->crtc_vsync_end =
494                                         adjusted_mode->crtc_vsync_start +
495                                                         vsync_width;
496                                 border = 1;
497                         } else {
498                         /* Aspects match, Let hw scale both directions */
499                                 pfit_control |= (VERT_AUTO_SCALE |
500                                                  HORIZ_AUTO_SCALE |
501                                                  VERT_INTERP_BILINEAR |
502                                                  HORIZ_INTERP_BILINEAR);
503                         }
504                         horiz_bits = (1 << bits) * horiz_ratio /
505                                         PANEL_RATIO_FACTOR;
506                         vert_bits = (1 << bits) * vert_ratio /
507                                         PANEL_RATIO_FACTOR;
508                         pfit_pgm_ratios =
509                                 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
510                                                 PFIT_VERT_SCALE_MASK) |
511                                 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
512                                                 PFIT_HORIZ_SCALE_MASK);
513                 }
514                 break;
515
516         case DRM_MODE_SCALE_FULLSCREEN:
517                 /*
518                  * Full scaling, even if it changes the aspect ratio.
519                  * Fortunately this is all done for us in hw.
520                  */
521                 pfit_control |= PFIT_ENABLE;
522                 if (IS_I965G(dev))
523                         pfit_control |= PFIT_SCALING_AUTO;
524                 else
525                         pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
526                                          VERT_INTERP_BILINEAR |
527                                          HORIZ_INTERP_BILINEAR);
528                 break;
529         default:
530                 break;
531         }
532
533 out:
534         lvds_priv->pfit_control = pfit_control;
535         lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
536         /*
537          * When there exists the border, it means that the LVDS_BORDR
538          * should be enabled.
539          */
540         if (border)
541                 dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
542         else
543                 dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
544         /*
545          * XXX: It would be nice to support lower refresh rates on the
546          * panels to reduce power consumption, and perhaps match the
547          * user's requested refresh rate.
548          */
549
550         return true;
551 }
552
553 static void intel_lvds_prepare(struct drm_encoder *encoder)
554 {
555         struct drm_device *dev = encoder->dev;
556         struct drm_i915_private *dev_priv = dev->dev_private;
557         u32 reg;
558
559         if (HAS_PCH_SPLIT(dev))
560                 reg = BLC_PWM_CPU_CTL;
561         else
562                 reg = BLC_PWM_CTL;
563
564         dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
565         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
566                                        BACKLIGHT_DUTY_CYCLE_MASK);
567
568         intel_lvds_set_power(dev, false);
569 }
570
571 static void intel_lvds_commit( struct drm_encoder *encoder)
572 {
573         struct drm_device *dev = encoder->dev;
574         struct drm_i915_private *dev_priv = dev->dev_private;
575
576         if (dev_priv->backlight_duty_cycle == 0)
577                 dev_priv->backlight_duty_cycle =
578                         intel_lvds_get_max_backlight(dev);
579
580         intel_lvds_set_power(dev, true);
581 }
582
583 static void intel_lvds_mode_set(struct drm_encoder *encoder,
584                                 struct drm_display_mode *mode,
585                                 struct drm_display_mode *adjusted_mode)
586 {
587         struct drm_device *dev = encoder->dev;
588         struct drm_i915_private *dev_priv = dev->dev_private;
589         struct intel_output *intel_output = enc_to_intel_output(encoder);
590         struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
591
592         /*
593          * The LVDS pin pair will already have been turned on in the
594          * intel_crtc_mode_set since it has a large impact on the DPLL
595          * settings.
596          */
597
598         if (HAS_PCH_SPLIT(dev))
599                 return;
600
601         /*
602          * Enable automatic panel scaling so that non-native modes fill the
603          * screen.  Should be enabled before the pipe is enabled, according to
604          * register description and PRM.
605          */
606         I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
607         I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
608 }
609
610 /* Some lid devices report incorrect lid status, assume they're connected */
611 static const struct dmi_system_id bad_lid_status[] = {
612         {
613                 .ident = "Compaq nx9020",
614                 .matches = {
615                         DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
616                         DMI_MATCH(DMI_BOARD_NAME, "3084"),
617                 },
618         },
619         {
620                 .ident = "Samsung SX20S",
621                 .matches = {
622                         DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
623                         DMI_MATCH(DMI_BOARD_NAME, "SX20S"),
624                 },
625         },
626         {
627                 .ident = "Aspire One",
628                 .matches = {
629                         DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
630                         DMI_MATCH(DMI_PRODUCT_NAME, "Aspire one"),
631                 },
632         },
633         {
634                 .ident = "Aspire 1810T",
635                 .matches = {
636                         DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
637                         DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 1810T"),
638                 },
639         },
640         {
641                 .ident = "PC-81005",
642                 .matches = {
643                         DMI_MATCH(DMI_SYS_VENDOR, "MALATA"),
644                         DMI_MATCH(DMI_PRODUCT_NAME, "PC-81005"),
645                 },
646         },
647         {
648                 .ident = "Clevo M5x0N",
649                 .matches = {
650                         DMI_MATCH(DMI_SYS_VENDOR, "CLEVO Co."),
651                         DMI_MATCH(DMI_BOARD_NAME, "M5x0N"),
652                 },
653         },
654         { }
655 };
656
657 /**
658  * Detect the LVDS connection.
659  *
660  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
661  * connected and closed means disconnected.  We also send hotplug events as
662  * needed, using lid status notification from the input layer.
663  */
664 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
665 {
666         struct drm_device *dev = connector->dev;
667         enum drm_connector_status status = connector_status_connected;
668
669         /* ACPI lid methods were generally unreliable in this generation, so
670          * don't even bother.
671          */
672         if (IS_GEN2(dev))
673                 return connector_status_connected;
674
675         if (!dmi_check_system(bad_lid_status) && !acpi_lid_open())
676                 status = connector_status_disconnected;
677
678         return status;
679 }
680
681 /**
682  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
683  */
684 static int intel_lvds_get_modes(struct drm_connector *connector)
685 {
686         struct drm_device *dev = connector->dev;
687         struct intel_output *intel_output = to_intel_output(connector);
688         struct drm_i915_private *dev_priv = dev->dev_private;
689         int ret = 0;
690
691         ret = intel_ddc_get_modes(intel_output);
692
693         if (ret)
694                 return ret;
695
696         /* Didn't get an EDID, so
697          * Set wide sync ranges so we get all modes
698          * handed to valid_mode for checking
699          */
700         connector->display_info.min_vfreq = 0;
701         connector->display_info.max_vfreq = 200;
702         connector->display_info.min_hfreq = 0;
703         connector->display_info.max_hfreq = 200;
704
705         if (dev_priv->panel_fixed_mode != NULL) {
706                 struct drm_display_mode *mode;
707
708                 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
709                 drm_mode_probed_add(connector, mode);
710
711                 return 1;
712         }
713
714         return 0;
715 }
716
717 /*
718  * Lid events. Note the use of 'modeset_on_lid':
719  *  - we set it on lid close, and reset it on open
720  *  - we use it as a "only once" bit (ie we ignore
721  *    duplicate events where it was already properly
722  *    set/reset)
723  *  - the suspend/resume paths will also set it to
724  *    zero, since they restore the mode ("lid open").
725  */
726 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
727                             void *unused)
728 {
729         struct drm_i915_private *dev_priv =
730                 container_of(nb, struct drm_i915_private, lid_notifier);
731         struct drm_device *dev = dev_priv->dev;
732         struct drm_connector *connector = dev_priv->int_lvds_connector;
733
734         /*
735          * check and update the status of LVDS connector after receiving
736          * the LID nofication event.
737          */
738         if (connector)
739                 connector->status = connector->funcs->detect(connector);
740         if (!acpi_lid_open()) {
741                 dev_priv->modeset_on_lid = 1;
742                 return NOTIFY_OK;
743         }
744
745         if (!dev_priv->modeset_on_lid)
746                 return NOTIFY_OK;
747
748         dev_priv->modeset_on_lid = 0;
749
750         mutex_lock(&dev->mode_config.mutex);
751         drm_helper_resume_force_mode(dev);
752         mutex_unlock(&dev->mode_config.mutex);
753
754         return NOTIFY_OK;
755 }
756
757 /**
758  * intel_lvds_destroy - unregister and free LVDS structures
759  * @connector: connector to free
760  *
761  * Unregister the DDC bus for this connector then free the driver private
762  * structure.
763  */
764 static void intel_lvds_destroy(struct drm_connector *connector)
765 {
766         struct drm_device *dev = connector->dev;
767         struct intel_output *intel_output = to_intel_output(connector);
768         struct drm_i915_private *dev_priv = dev->dev_private;
769
770         if (intel_output->ddc_bus)
771                 intel_i2c_destroy(intel_output->ddc_bus);
772         if (dev_priv->lid_notifier.notifier_call)
773                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
774         drm_sysfs_connector_remove(connector);
775         drm_connector_cleanup(connector);
776         kfree(connector);
777 }
778
779 static int intel_lvds_set_property(struct drm_connector *connector,
780                                    struct drm_property *property,
781                                    uint64_t value)
782 {
783         struct drm_device *dev = connector->dev;
784         struct intel_output *intel_output =
785                         to_intel_output(connector);
786
787         if (property == dev->mode_config.scaling_mode_property &&
788                                 connector->encoder) {
789                 struct drm_crtc *crtc = connector->encoder->crtc;
790                 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
791                 if (value == DRM_MODE_SCALE_NONE) {
792                         DRM_DEBUG_KMS("no scaling not supported\n");
793                         return 0;
794                 }
795                 if (lvds_priv->fitting_mode == value) {
796                         /* the LVDS scaling property is not changed */
797                         return 0;
798                 }
799                 lvds_priv->fitting_mode = value;
800                 if (crtc && crtc->enabled) {
801                         /*
802                          * If the CRTC is enabled, the display will be changed
803                          * according to the new panel fitting mode.
804                          */
805                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
806                                 crtc->x, crtc->y, crtc->fb);
807                 }
808         }
809
810         return 0;
811 }
812
813 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
814         .dpms = intel_lvds_dpms,
815         .mode_fixup = intel_lvds_mode_fixup,
816         .prepare = intel_lvds_prepare,
817         .mode_set = intel_lvds_mode_set,
818         .commit = intel_lvds_commit,
819 };
820
821 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
822         .get_modes = intel_lvds_get_modes,
823         .mode_valid = intel_lvds_mode_valid,
824         .best_encoder = intel_best_encoder,
825 };
826
827 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
828         .dpms = drm_helper_connector_dpms,
829         .save = intel_lvds_save,
830         .restore = intel_lvds_restore,
831         .detect = intel_lvds_detect,
832         .fill_modes = drm_helper_probe_single_connector_modes,
833         .set_property = intel_lvds_set_property,
834         .destroy = intel_lvds_destroy,
835 };
836
837
838 static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
839 {
840         drm_encoder_cleanup(encoder);
841 }
842
843 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
844         .destroy = intel_lvds_enc_destroy,
845 };
846
847 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
848 {
849         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
850         return 1;
851 }
852
853 /* These systems claim to have LVDS, but really don't */
854 static const struct dmi_system_id intel_no_lvds[] = {
855         {
856                 .callback = intel_no_lvds_dmi_callback,
857                 .ident = "Apple Mac Mini (Core series)",
858                 .matches = {
859                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
860                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
861                 },
862         },
863         {
864                 .callback = intel_no_lvds_dmi_callback,
865                 .ident = "Apple Mac Mini (Core 2 series)",
866                 .matches = {
867                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
868                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
869                 },
870         },
871         {
872                 .callback = intel_no_lvds_dmi_callback,
873                 .ident = "MSI IM-945GSE-A",
874                 .matches = {
875                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
876                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
877                 },
878         },
879         {
880                 .callback = intel_no_lvds_dmi_callback,
881                 .ident = "Dell Studio Hybrid",
882                 .matches = {
883                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
884                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
885                 },
886         },
887         {
888                 .callback = intel_no_lvds_dmi_callback,
889                 .ident = "AOpen Mini PC",
890                 .matches = {
891                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
892                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
893                 },
894         },
895         {
896                 .callback = intel_no_lvds_dmi_callback,
897                 .ident = "AOpen Mini PC MP915",
898                 .matches = {
899                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
900                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
901                 },
902         },
903         {
904                 .callback = intel_no_lvds_dmi_callback,
905                 .ident = "Aopen i945GTt-VFA",
906                 .matches = {
907                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
908                 },
909         },
910
911         { }     /* terminating entry */
912 };
913
914 /**
915  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
916  * @dev: drm device
917  * @connector: LVDS connector
918  *
919  * Find the reduced downclock for LVDS in EDID.
920  */
921 static void intel_find_lvds_downclock(struct drm_device *dev,
922                                 struct drm_connector *connector)
923 {
924         struct drm_i915_private *dev_priv = dev->dev_private;
925         struct drm_display_mode *scan, *panel_fixed_mode;
926         int temp_downclock;
927
928         panel_fixed_mode = dev_priv->panel_fixed_mode;
929         temp_downclock = panel_fixed_mode->clock;
930
931         mutex_lock(&dev->mode_config.mutex);
932         list_for_each_entry(scan, &connector->probed_modes, head) {
933                 /*
934                  * If one mode has the same resolution with the fixed_panel
935                  * mode while they have the different refresh rate, it means
936                  * that the reduced downclock is found for the LVDS. In such
937                  * case we can set the different FPx0/1 to dynamically select
938                  * between low and high frequency.
939                  */
940                 if (scan->hdisplay == panel_fixed_mode->hdisplay &&
941                         scan->hsync_start == panel_fixed_mode->hsync_start &&
942                         scan->hsync_end == panel_fixed_mode->hsync_end &&
943                         scan->htotal == panel_fixed_mode->htotal &&
944                         scan->vdisplay == panel_fixed_mode->vdisplay &&
945                         scan->vsync_start == panel_fixed_mode->vsync_start &&
946                         scan->vsync_end == panel_fixed_mode->vsync_end &&
947                         scan->vtotal == panel_fixed_mode->vtotal) {
948                         if (scan->clock < temp_downclock) {
949                                 /*
950                                  * The downclock is already found. But we
951                                  * expect to find the lower downclock.
952                                  */
953                                 temp_downclock = scan->clock;
954                         }
955                 }
956         }
957         mutex_unlock(&dev->mode_config.mutex);
958         if (temp_downclock < panel_fixed_mode->clock &&
959             i915_lvds_downclock) {
960                 /* We found the downclock for LVDS. */
961                 dev_priv->lvds_downclock_avail = 1;
962                 dev_priv->lvds_downclock = temp_downclock;
963                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
964                                 "Normal clock %dKhz, downclock %dKhz\n",
965                                 panel_fixed_mode->clock, temp_downclock);
966         }
967         return;
968 }
969
970 /*
971  * Enumerate the child dev array parsed from VBT to check whether
972  * the LVDS is present.
973  * If it is present, return 1.
974  * If it is not present, return false.
975  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
976  * Note: The addin_offset should also be checked for LVDS panel.
977  * Only when it is non-zero, it is assumed that it is present.
978  */
979 static int lvds_is_present_in_vbt(struct drm_device *dev)
980 {
981         struct drm_i915_private *dev_priv = dev->dev_private;
982         struct child_device_config *p_child;
983         int i, ret;
984
985         if (!dev_priv->child_dev_num)
986                 return 1;
987
988         ret = 0;
989         for (i = 0; i < dev_priv->child_dev_num; i++) {
990                 p_child = dev_priv->child_dev + i;
991                 /*
992                  * If the device type is not LFP, continue.
993                  * If the device type is 0x22, it is also regarded as LFP.
994                  */
995                 if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
996                         p_child->device_type != DEVICE_TYPE_LFP)
997                         continue;
998
999                 /* The addin_offset should be checked. Only when it is
1000                  * non-zero, it is regarded as present.
1001                  */
1002                 if (p_child->addin_offset) {
1003                         ret = 1;
1004                         break;
1005                 }
1006         }
1007         return ret;
1008 }
1009
1010 /**
1011  * intel_lvds_init - setup LVDS connectors on this device
1012  * @dev: drm device
1013  *
1014  * Create the connector, register the LVDS DDC bus, and try to figure out what
1015  * modes we can display on the LVDS panel (if present).
1016  */
1017 void intel_lvds_init(struct drm_device *dev)
1018 {
1019         struct drm_i915_private *dev_priv = dev->dev_private;
1020         struct intel_output *intel_output;
1021         struct drm_connector *connector;
1022         struct drm_encoder *encoder;
1023         struct drm_display_mode *scan; /* *modes, *bios_mode; */
1024         struct drm_crtc *crtc;
1025         struct intel_lvds_priv *lvds_priv;
1026         u32 lvds;
1027         int pipe, gpio = GPIOC;
1028
1029         /* Skip init on machines we know falsely report LVDS */
1030         if (dmi_check_system(intel_no_lvds))
1031                 return;
1032
1033         if (!lvds_is_present_in_vbt(dev)) {
1034                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
1035                 return;
1036         }
1037
1038         if (HAS_PCH_SPLIT(dev)) {
1039                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
1040                         return;
1041                 if (dev_priv->edp_support) {
1042                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
1043                         return;
1044                 }
1045                 gpio = PCH_GPIOC;
1046         }
1047
1048         intel_output = kzalloc(sizeof(struct intel_output) +
1049                                 sizeof(struct intel_lvds_priv), GFP_KERNEL);
1050         if (!intel_output) {
1051                 return;
1052         }
1053
1054         connector = &intel_output->base;
1055         encoder = &intel_output->enc;
1056         drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
1057                            DRM_MODE_CONNECTOR_LVDS);
1058
1059         drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
1060                          DRM_MODE_ENCODER_LVDS);
1061
1062         drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
1063         intel_output->type = INTEL_OUTPUT_LVDS;
1064
1065         intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
1066         intel_output->crtc_mask = (1 << 1);
1067         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
1068         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1069         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1070         connector->interlace_allowed = false;
1071         connector->doublescan_allowed = false;
1072
1073         lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
1074         intel_output->dev_priv = lvds_priv;
1075         /* create the scaling mode property */
1076         drm_mode_create_scaling_mode_property(dev);
1077         /*
1078          * the initial panel fitting mode will be FULL_SCREEN.
1079          */
1080
1081         drm_connector_attach_property(&intel_output->base,
1082                                       dev->mode_config.scaling_mode_property,
1083                                       DRM_MODE_SCALE_FULLSCREEN);
1084         lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
1085         /*
1086          * LVDS discovery:
1087          * 1) check for EDID on DDC
1088          * 2) check for VBT data
1089          * 3) check to see if LVDS is already on
1090          *    if none of the above, no panel
1091          * 4) make sure lid is open
1092          *    if closed, act like it's not there for now
1093          */
1094
1095         /* Set up the DDC bus. */
1096         intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
1097         if (!intel_output->ddc_bus) {
1098                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
1099                            "failed.\n");
1100                 goto failed;
1101         }
1102
1103         /*
1104          * Attempt to get the fixed panel mode from DDC.  Assume that the
1105          * preferred mode is the right one.
1106          */
1107         intel_ddc_get_modes(intel_output);
1108
1109         list_for_each_entry(scan, &connector->probed_modes, head) {
1110                 mutex_lock(&dev->mode_config.mutex);
1111                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1112                         dev_priv->panel_fixed_mode =
1113                                 drm_mode_duplicate(dev, scan);
1114                         mutex_unlock(&dev->mode_config.mutex);
1115                         intel_find_lvds_downclock(dev, connector);
1116                         goto out;
1117                 }
1118                 mutex_unlock(&dev->mode_config.mutex);
1119         }
1120
1121         /* Failed to get EDID, what about VBT? */
1122         if (dev_priv->lfp_lvds_vbt_mode) {
1123                 mutex_lock(&dev->mode_config.mutex);
1124                 dev_priv->panel_fixed_mode =
1125                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1126                 mutex_unlock(&dev->mode_config.mutex);
1127                 if (dev_priv->panel_fixed_mode) {
1128                         dev_priv->panel_fixed_mode->type |=
1129                                 DRM_MODE_TYPE_PREFERRED;
1130                         goto out;
1131                 }
1132         }
1133
1134         /*
1135          * If we didn't get EDID, try checking if the panel is already turned
1136          * on.  If so, assume that whatever is currently programmed is the
1137          * correct mode.
1138          */
1139
1140         /* Ironlake: FIXME if still fail, not try pipe mode now */
1141         if (HAS_PCH_SPLIT(dev))
1142                 goto failed;
1143
1144         lvds = I915_READ(LVDS);
1145         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1146         crtc = intel_get_crtc_from_pipe(dev, pipe);
1147
1148         if (crtc && (lvds & LVDS_PORT_EN)) {
1149                 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
1150                 if (dev_priv->panel_fixed_mode) {
1151                         dev_priv->panel_fixed_mode->type |=
1152                                 DRM_MODE_TYPE_PREFERRED;
1153                         goto out;
1154                 }
1155         }
1156
1157         /* If we still don't have a mode after all that, give up. */
1158         if (!dev_priv->panel_fixed_mode)
1159                 goto failed;
1160
1161 out:
1162         if (HAS_PCH_SPLIT(dev)) {
1163                 u32 pwm;
1164                 /* make sure PWM is enabled */
1165                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1166                 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1167                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1168
1169                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1170                 pwm |= PWM_PCH_ENABLE;
1171                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1172         }
1173         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1174         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1175                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1176                 dev_priv->lid_notifier.notifier_call = NULL;
1177         }
1178         /* keep the LVDS connector */
1179         dev_priv->int_lvds_connector = connector;
1180         drm_sysfs_connector_add(connector);
1181         return;
1182
1183 failed:
1184         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1185         if (intel_output->ddc_bus)
1186                 intel_i2c_destroy(intel_output->ddc_bus);
1187         drm_connector_cleanup(connector);
1188         drm_encoder_cleanup(encoder);
1189         kfree(intel_output);
1190 }