4e7dcb330dadba8156ce46aa7923d09fef4c3446
[linux-2.6.git] / drivers / gpu / drm / i915 / intel_lvds.c
1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *      Eric Anholt <eric@anholt.net>
26  *      Dave Airlie <airlied@linux.ie>
27  *      Jesse Barnes <jesse.barnes@intel.com>
28  */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include "drmP.h"
35 #include "drm.h"
36 #include "drm_crtc.h"
37 #include "drm_edid.h"
38 #include "intel_drv.h"
39 #include "i915_drm.h"
40 #include "i915_drv.h"
41 #include <linux/acpi.h>
42
43 /* Private structure for the integrated LVDS support */
44 struct intel_lvds {
45         struct intel_encoder base;
46
47         struct edid *edid;
48
49         int fitting_mode;
50         u32 pfit_control;
51         u32 pfit_pgm_ratios;
52         bool pfit_dirty;
53
54         struct drm_display_mode *fixed_mode;
55 };
56
57 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
58 {
59         return container_of(encoder, struct intel_lvds, base.base);
60 }
61
62 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
63 {
64         return container_of(intel_attached_encoder(connector),
65                             struct intel_lvds, base);
66 }
67
68 /**
69  * Sets the power state for the panel.
70  */
71 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
72 {
73         struct drm_device *dev = intel_lvds->base.base.dev;
74         struct drm_i915_private *dev_priv = dev->dev_private;
75         u32 ctl_reg, lvds_reg;
76
77         if (HAS_PCH_SPLIT(dev)) {
78                 ctl_reg = PCH_PP_CONTROL;
79                 lvds_reg = PCH_LVDS;
80         } else {
81                 ctl_reg = PP_CONTROL;
82                 lvds_reg = LVDS;
83         }
84
85         I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
86
87         if (intel_lvds->pfit_dirty) {
88                 /*
89                  * Enable automatic panel scaling so that non-native modes
90                  * fill the screen.  The panel fitter should only be
91                  * adjusted whilst the pipe is disabled, according to
92                  * register description and PRM.
93                  */
94                 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
95                               intel_lvds->pfit_control,
96                               intel_lvds->pfit_pgm_ratios);
97                 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) {
98                         DRM_ERROR("timed out waiting for panel to power off\n");
99                 } else {
100                         I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
101                         I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
102                         intel_lvds->pfit_dirty = false;
103                 }
104         }
105
106         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
107         POSTING_READ(lvds_reg);
108
109         intel_panel_enable_backlight(dev);
110 }
111
112 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
113 {
114         struct drm_device *dev = intel_lvds->base.base.dev;
115         struct drm_i915_private *dev_priv = dev->dev_private;
116         u32 ctl_reg, lvds_reg;
117
118         if (HAS_PCH_SPLIT(dev)) {
119                 ctl_reg = PCH_PP_CONTROL;
120                 lvds_reg = PCH_LVDS;
121         } else {
122                 ctl_reg = PP_CONTROL;
123                 lvds_reg = LVDS;
124         }
125
126         intel_panel_disable_backlight(dev);
127
128         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
129
130         if (intel_lvds->pfit_control) {
131                 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
132                         DRM_ERROR("timed out waiting for panel to power off\n");
133
134                 I915_WRITE(PFIT_CONTROL, 0);
135                 intel_lvds->pfit_dirty = true;
136         }
137
138         I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
139         POSTING_READ(lvds_reg);
140 }
141
142 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
143 {
144         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
145
146         if (mode == DRM_MODE_DPMS_ON)
147                 intel_lvds_enable(intel_lvds);
148         else
149                 intel_lvds_disable(intel_lvds);
150
151         /* XXX: We never power down the LVDS pairs. */
152 }
153
154 static int intel_lvds_mode_valid(struct drm_connector *connector,
155                                  struct drm_display_mode *mode)
156 {
157         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
158         struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
159
160         if (mode->hdisplay > fixed_mode->hdisplay)
161                 return MODE_PANEL;
162         if (mode->vdisplay > fixed_mode->vdisplay)
163                 return MODE_PANEL;
164
165         return MODE_OK;
166 }
167
168 static void
169 centre_horizontally(struct drm_display_mode *mode,
170                     int width)
171 {
172         u32 border, sync_pos, blank_width, sync_width;
173
174         /* keep the hsync and hblank widths constant */
175         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
176         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
177         sync_pos = (blank_width - sync_width + 1) / 2;
178
179         border = (mode->hdisplay - width + 1) / 2;
180         border += border & 1; /* make the border even */
181
182         mode->crtc_hdisplay = width;
183         mode->crtc_hblank_start = width + border;
184         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
185
186         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
187         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
188 }
189
190 static void
191 centre_vertically(struct drm_display_mode *mode,
192                   int height)
193 {
194         u32 border, sync_pos, blank_width, sync_width;
195
196         /* keep the vsync and vblank widths constant */
197         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
198         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
199         sync_pos = (blank_width - sync_width + 1) / 2;
200
201         border = (mode->vdisplay - height + 1) / 2;
202
203         mode->crtc_vdisplay = height;
204         mode->crtc_vblank_start = height + border;
205         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
206
207         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
208         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
209 }
210
211 static inline u32 panel_fitter_scaling(u32 source, u32 target)
212 {
213         /*
214          * Floating point operation is not supported. So the FACTOR
215          * is defined, which can avoid the floating point computation
216          * when calculating the panel ratio.
217          */
218 #define ACCURACY 12
219 #define FACTOR (1 << ACCURACY)
220         u32 ratio = source * FACTOR / target;
221         return (FACTOR * ratio + FACTOR/2) / FACTOR;
222 }
223
224 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
225                                   struct drm_display_mode *mode,
226                                   struct drm_display_mode *adjusted_mode)
227 {
228         struct drm_device *dev = encoder->dev;
229         struct drm_i915_private *dev_priv = dev->dev_private;
230         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
231         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
232         struct drm_encoder *tmp_encoder;
233         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
234
235         /* Should never happen!! */
236         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
237                 DRM_ERROR("Can't support LVDS on pipe A\n");
238                 return false;
239         }
240
241         /* Should never happen!! */
242         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
243                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
244                         DRM_ERROR("Can't enable LVDS and another "
245                                "encoder on the same pipe\n");
246                         return false;
247                 }
248         }
249
250         /*
251          * We have timings from the BIOS for the panel, put them in
252          * to the adjusted mode.  The CRTC will be set up for this mode,
253          * with the panel scaling set up to source from the H/VDisplay
254          * of the original mode.
255          */
256         intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
257
258         if (HAS_PCH_SPLIT(dev)) {
259                 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
260                                         mode, adjusted_mode);
261                 return true;
262         }
263
264         /* Make sure pre-965s set dither correctly */
265         if (INTEL_INFO(dev)->gen < 4) {
266                 if (dev_priv->lvds_dither)
267                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
268         }
269
270         /* Native modes don't need fitting */
271         if (adjusted_mode->hdisplay == mode->hdisplay &&
272             adjusted_mode->vdisplay == mode->vdisplay)
273                 goto out;
274
275         /* 965+ wants fuzzy fitting */
276         if (INTEL_INFO(dev)->gen >= 4)
277                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
278                                  PFIT_FILTER_FUZZY);
279
280         /*
281          * Enable automatic panel scaling for non-native modes so that they fill
282          * the screen.  Should be enabled before the pipe is enabled, according
283          * to register description and PRM.
284          * Change the value here to see the borders for debugging
285          */
286         I915_WRITE(BCLRPAT_A, 0);
287         I915_WRITE(BCLRPAT_B, 0);
288
289         switch (intel_lvds->fitting_mode) {
290         case DRM_MODE_SCALE_CENTER:
291                 /*
292                  * For centered modes, we have to calculate border widths &
293                  * heights and modify the values programmed into the CRTC.
294                  */
295                 centre_horizontally(adjusted_mode, mode->hdisplay);
296                 centre_vertically(adjusted_mode, mode->vdisplay);
297                 border = LVDS_BORDER_ENABLE;
298                 break;
299
300         case DRM_MODE_SCALE_ASPECT:
301                 /* Scale but preserve the aspect ratio */
302                 if (INTEL_INFO(dev)->gen >= 4) {
303                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
304                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
305
306                         /* 965+ is easy, it does everything in hw */
307                         if (scaled_width > scaled_height)
308                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
309                         else if (scaled_width < scaled_height)
310                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
311                         else if (adjusted_mode->hdisplay != mode->hdisplay)
312                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
313                 } else {
314                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
315                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
316                         /*
317                          * For earlier chips we have to calculate the scaling
318                          * ratio by hand and program it into the
319                          * PFIT_PGM_RATIO register
320                          */
321                         if (scaled_width > scaled_height) { /* pillar */
322                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
323
324                                 border = LVDS_BORDER_ENABLE;
325                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
326                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
327                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
328                                                             bits << PFIT_VERT_SCALE_SHIFT);
329                                         pfit_control |= (PFIT_ENABLE |
330                                                          VERT_INTERP_BILINEAR |
331                                                          HORIZ_INTERP_BILINEAR);
332                                 }
333                         } else if (scaled_width < scaled_height) { /* letter */
334                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
335
336                                 border = LVDS_BORDER_ENABLE;
337                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
338                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
339                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
340                                                             bits << PFIT_VERT_SCALE_SHIFT);
341                                         pfit_control |= (PFIT_ENABLE |
342                                                          VERT_INTERP_BILINEAR |
343                                                          HORIZ_INTERP_BILINEAR);
344                                 }
345                         } else
346                                 /* Aspects match, Let hw scale both directions */
347                                 pfit_control |= (PFIT_ENABLE |
348                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
349                                                  VERT_INTERP_BILINEAR |
350                                                  HORIZ_INTERP_BILINEAR);
351                 }
352                 break;
353
354         case DRM_MODE_SCALE_FULLSCREEN:
355                 /*
356                  * Full scaling, even if it changes the aspect ratio.
357                  * Fortunately this is all done for us in hw.
358                  */
359                 if (mode->vdisplay != adjusted_mode->vdisplay ||
360                     mode->hdisplay != adjusted_mode->hdisplay) {
361                         pfit_control |= PFIT_ENABLE;
362                         if (INTEL_INFO(dev)->gen >= 4)
363                                 pfit_control |= PFIT_SCALING_AUTO;
364                         else
365                                 pfit_control |= (VERT_AUTO_SCALE |
366                                                  VERT_INTERP_BILINEAR |
367                                                  HORIZ_AUTO_SCALE |
368                                                  HORIZ_INTERP_BILINEAR);
369                 }
370                 break;
371
372         default:
373                 break;
374         }
375
376 out:
377         if (pfit_control != intel_lvds->pfit_control ||
378             pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
379                 intel_lvds->pfit_control = pfit_control;
380                 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
381                 intel_lvds->pfit_dirty = true;
382         }
383         dev_priv->lvds_border_bits = border;
384
385         /*
386          * XXX: It would be nice to support lower refresh rates on the
387          * panels to reduce power consumption, and perhaps match the
388          * user's requested refresh rate.
389          */
390
391         return true;
392 }
393
394 static void intel_lvds_prepare(struct drm_encoder *encoder)
395 {
396         struct drm_device *dev = encoder->dev;
397         struct drm_i915_private *dev_priv = dev->dev_private;
398         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
399
400         /* We try to do the minimum that is necessary in order to unlock
401          * the registers for mode setting.
402          *
403          * On Ironlake, this is quite simple as we just set the unlock key
404          * and ignore all subtleties. (This may cause some issues...)
405          *
406          * Prior to Ironlake, we must disable the pipe if we want to adjust
407          * the panel fitter. However at all other times we can just reset
408          * the registers regardless.
409          */
410
411         if (HAS_PCH_SPLIT(dev)) {
412                 I915_WRITE(PCH_PP_CONTROL,
413                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
414         } else if (intel_lvds->pfit_dirty) {
415                 I915_WRITE(PP_CONTROL,
416                            (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS)
417                            & ~POWER_TARGET_ON);
418         } else {
419                 I915_WRITE(PP_CONTROL,
420                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
421         }
422 }
423
424 static void intel_lvds_commit(struct drm_encoder *encoder)
425 {
426         struct drm_device *dev = encoder->dev;
427         struct drm_i915_private *dev_priv = dev->dev_private;
428         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
429
430         /* Undo any unlocking done in prepare to prevent accidental
431          * adjustment of the registers.
432          */
433         if (HAS_PCH_SPLIT(dev)) {
434                 u32 val = I915_READ(PCH_PP_CONTROL);
435                 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
436                         I915_WRITE(PCH_PP_CONTROL, val & 0x3);
437         } else {
438                 u32 val = I915_READ(PP_CONTROL);
439                 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
440                         I915_WRITE(PP_CONTROL, val & 0x3);
441         }
442
443         /* Always do a full power on as we do not know what state
444          * we were left in.
445          */
446         intel_lvds_enable(intel_lvds);
447 }
448
449 static void intel_lvds_mode_set(struct drm_encoder *encoder,
450                                 struct drm_display_mode *mode,
451                                 struct drm_display_mode *adjusted_mode)
452 {
453         /*
454          * The LVDS pin pair will already have been turned on in the
455          * intel_crtc_mode_set since it has a large impact on the DPLL
456          * settings.
457          */
458 }
459
460 /**
461  * Detect the LVDS connection.
462  *
463  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
464  * connected and closed means disconnected.  We also send hotplug events as
465  * needed, using lid status notification from the input layer.
466  */
467 static enum drm_connector_status
468 intel_lvds_detect(struct drm_connector *connector, bool force)
469 {
470         struct drm_device *dev = connector->dev;
471         enum drm_connector_status status = connector_status_connected;
472
473         /* ACPI lid methods were generally unreliable in this generation, so
474          * don't even bother.
475          */
476         if (IS_GEN2(dev) || IS_GEN3(dev))
477                 return connector_status_connected;
478
479         return status;
480 }
481
482 /**
483  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
484  */
485 static int intel_lvds_get_modes(struct drm_connector *connector)
486 {
487         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
488         struct drm_device *dev = connector->dev;
489         struct drm_display_mode *mode;
490
491         if (intel_lvds->edid)
492                 return drm_add_edid_modes(connector, intel_lvds->edid);
493
494         mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
495         if (mode == 0)
496                 return 0;
497
498         drm_mode_probed_add(connector, mode);
499         return 1;
500 }
501
502 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
503 {
504         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
505         return 1;
506 }
507
508 /* The GPU hangs up on these systems if modeset is performed on LID open */
509 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
510         {
511                 .callback = intel_no_modeset_on_lid_dmi_callback,
512                 .ident = "Toshiba Tecra A11",
513                 .matches = {
514                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
515                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
516                 },
517         },
518
519         { }     /* terminating entry */
520 };
521
522 /*
523  * Lid events. Note the use of 'modeset_on_lid':
524  *  - we set it on lid close, and reset it on open
525  *  - we use it as a "only once" bit (ie we ignore
526  *    duplicate events where it was already properly
527  *    set/reset)
528  *  - the suspend/resume paths will also set it to
529  *    zero, since they restore the mode ("lid open").
530  */
531 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
532                             void *unused)
533 {
534         struct drm_i915_private *dev_priv =
535                 container_of(nb, struct drm_i915_private, lid_notifier);
536         struct drm_device *dev = dev_priv->dev;
537         struct drm_connector *connector = dev_priv->int_lvds_connector;
538
539         /*
540          * check and update the status of LVDS connector after receiving
541          * the LID nofication event.
542          */
543         if (connector)
544                 connector->status = connector->funcs->detect(connector,
545                                                              false);
546
547         /* Don't force modeset on machines where it causes a GPU lockup */
548         if (dmi_check_system(intel_no_modeset_on_lid))
549                 return NOTIFY_OK;
550         if (!acpi_lid_open()) {
551                 dev_priv->modeset_on_lid = 1;
552                 return NOTIFY_OK;
553         }
554
555         if (!dev_priv->modeset_on_lid)
556                 return NOTIFY_OK;
557
558         dev_priv->modeset_on_lid = 0;
559
560         mutex_lock(&dev->mode_config.mutex);
561         drm_helper_resume_force_mode(dev);
562         mutex_unlock(&dev->mode_config.mutex);
563
564         return NOTIFY_OK;
565 }
566
567 /**
568  * intel_lvds_destroy - unregister and free LVDS structures
569  * @connector: connector to free
570  *
571  * Unregister the DDC bus for this connector then free the driver private
572  * structure.
573  */
574 static void intel_lvds_destroy(struct drm_connector *connector)
575 {
576         struct drm_device *dev = connector->dev;
577         struct drm_i915_private *dev_priv = dev->dev_private;
578
579         if (dev_priv->lid_notifier.notifier_call)
580                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
581         drm_sysfs_connector_remove(connector);
582         drm_connector_cleanup(connector);
583         kfree(connector);
584 }
585
586 static int intel_lvds_set_property(struct drm_connector *connector,
587                                    struct drm_property *property,
588                                    uint64_t value)
589 {
590         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
591         struct drm_device *dev = connector->dev;
592
593         if (property == dev->mode_config.scaling_mode_property) {
594                 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
595
596                 if (value == DRM_MODE_SCALE_NONE) {
597                         DRM_DEBUG_KMS("no scaling not supported\n");
598                         return -EINVAL;
599                 }
600
601                 if (intel_lvds->fitting_mode == value) {
602                         /* the LVDS scaling property is not changed */
603                         return 0;
604                 }
605                 intel_lvds->fitting_mode = value;
606                 if (crtc && crtc->enabled) {
607                         /*
608                          * If the CRTC is enabled, the display will be changed
609                          * according to the new panel fitting mode.
610                          */
611                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
612                                 crtc->x, crtc->y, crtc->fb);
613                 }
614         }
615
616         return 0;
617 }
618
619 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
620         .dpms = intel_lvds_dpms,
621         .mode_fixup = intel_lvds_mode_fixup,
622         .prepare = intel_lvds_prepare,
623         .mode_set = intel_lvds_mode_set,
624         .commit = intel_lvds_commit,
625 };
626
627 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
628         .get_modes = intel_lvds_get_modes,
629         .mode_valid = intel_lvds_mode_valid,
630         .best_encoder = intel_best_encoder,
631 };
632
633 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
634         .dpms = drm_helper_connector_dpms,
635         .detect = intel_lvds_detect,
636         .fill_modes = drm_helper_probe_single_connector_modes,
637         .set_property = intel_lvds_set_property,
638         .destroy = intel_lvds_destroy,
639 };
640
641 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
642         .destroy = intel_encoder_destroy,
643 };
644
645 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
646 {
647         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
648         return 1;
649 }
650
651 /* These systems claim to have LVDS, but really don't */
652 static const struct dmi_system_id intel_no_lvds[] = {
653         {
654                 .callback = intel_no_lvds_dmi_callback,
655                 .ident = "Apple Mac Mini (Core series)",
656                 .matches = {
657                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
658                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
659                 },
660         },
661         {
662                 .callback = intel_no_lvds_dmi_callback,
663                 .ident = "Apple Mac Mini (Core 2 series)",
664                 .matches = {
665                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
666                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
667                 },
668         },
669         {
670                 .callback = intel_no_lvds_dmi_callback,
671                 .ident = "MSI IM-945GSE-A",
672                 .matches = {
673                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
674                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
675                 },
676         },
677         {
678                 .callback = intel_no_lvds_dmi_callback,
679                 .ident = "Dell Studio Hybrid",
680                 .matches = {
681                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
682                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
683                 },
684         },
685         {
686                 .callback = intel_no_lvds_dmi_callback,
687                 .ident = "AOpen Mini PC",
688                 .matches = {
689                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
690                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
691                 },
692         },
693         {
694                 .callback = intel_no_lvds_dmi_callback,
695                 .ident = "AOpen Mini PC MP915",
696                 .matches = {
697                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
698                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
699                 },
700         },
701         {
702                 .callback = intel_no_lvds_dmi_callback,
703                 .ident = "Aopen i945GTt-VFA",
704                 .matches = {
705                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
706                 },
707         },
708         {
709                 .callback = intel_no_lvds_dmi_callback,
710                 .ident = "Clientron U800",
711                 .matches = {
712                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
713                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
714                 },
715         },
716
717         { }     /* terminating entry */
718 };
719
720 /**
721  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
722  * @dev: drm device
723  * @connector: LVDS connector
724  *
725  * Find the reduced downclock for LVDS in EDID.
726  */
727 static void intel_find_lvds_downclock(struct drm_device *dev,
728                                       struct drm_display_mode *fixed_mode,
729                                       struct drm_connector *connector)
730 {
731         struct drm_i915_private *dev_priv = dev->dev_private;
732         struct drm_display_mode *scan;
733         int temp_downclock;
734
735         temp_downclock = fixed_mode->clock;
736         list_for_each_entry(scan, &connector->probed_modes, head) {
737                 /*
738                  * If one mode has the same resolution with the fixed_panel
739                  * mode while they have the different refresh rate, it means
740                  * that the reduced downclock is found for the LVDS. In such
741                  * case we can set the different FPx0/1 to dynamically select
742                  * between low and high frequency.
743                  */
744                 if (scan->hdisplay == fixed_mode->hdisplay &&
745                     scan->hsync_start == fixed_mode->hsync_start &&
746                     scan->hsync_end == fixed_mode->hsync_end &&
747                     scan->htotal == fixed_mode->htotal &&
748                     scan->vdisplay == fixed_mode->vdisplay &&
749                     scan->vsync_start == fixed_mode->vsync_start &&
750                     scan->vsync_end == fixed_mode->vsync_end &&
751                     scan->vtotal == fixed_mode->vtotal) {
752                         if (scan->clock < temp_downclock) {
753                                 /*
754                                  * The downclock is already found. But we
755                                  * expect to find the lower downclock.
756                                  */
757                                 temp_downclock = scan->clock;
758                         }
759                 }
760         }
761         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
762                 /* We found the downclock for LVDS. */
763                 dev_priv->lvds_downclock_avail = 1;
764                 dev_priv->lvds_downclock = temp_downclock;
765                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
766                               "Normal clock %dKhz, downclock %dKhz\n",
767                               fixed_mode->clock, temp_downclock);
768         }
769 }
770
771 /*
772  * Enumerate the child dev array parsed from VBT to check whether
773  * the LVDS is present.
774  * If it is present, return 1.
775  * If it is not present, return false.
776  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
777  */
778 static bool lvds_is_present_in_vbt(struct drm_device *dev,
779                                    u8 *i2c_pin)
780 {
781         struct drm_i915_private *dev_priv = dev->dev_private;
782         int i;
783
784         if (!dev_priv->child_dev_num)
785                 return true;
786
787         for (i = 0; i < dev_priv->child_dev_num; i++) {
788                 struct child_device_config *child = dev_priv->child_dev + i;
789
790                 /* If the device type is not LFP, continue.
791                  * We have to check both the new identifiers as well as the
792                  * old for compatibility with some BIOSes.
793                  */
794                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
795                     child->device_type != DEVICE_TYPE_LFP)
796                         continue;
797
798                 if (child->i2c_pin)
799                     *i2c_pin = child->i2c_pin;
800
801                 /* However, we cannot trust the BIOS writers to populate
802                  * the VBT correctly.  Since LVDS requires additional
803                  * information from AIM blocks, a non-zero addin offset is
804                  * a good indicator that the LVDS is actually present.
805                  */
806                 if (child->addin_offset)
807                         return true;
808
809                 /* But even then some BIOS writers perform some black magic
810                  * and instantiate the device without reference to any
811                  * additional data.  Trust that if the VBT was written into
812                  * the OpRegion then they have validated the LVDS's existence.
813                  */
814                 if (dev_priv->opregion.vbt)
815                         return true;
816         }
817
818         return false;
819 }
820
821 static bool intel_lvds_ddc_probe(struct drm_device *dev, u8 pin)
822 {
823         struct drm_i915_private *dev_priv = dev->dev_private;
824         u8 buf = 0;
825         struct i2c_msg msgs[] = {
826                 {
827                         .addr = 0xA0,
828                         .flags = 0,
829                         .len = 1,
830                         .buf = &buf,
831                 },
832         };
833         struct i2c_adapter *i2c = &dev_priv->gmbus[pin].adapter;
834         /* XXX this only appears to work when using GMBUS */
835         if (intel_gmbus_is_forced_bit(i2c))
836                 return true;
837         return i2c_transfer(i2c, msgs, 1) == 1;
838 }
839
840 /**
841  * intel_lvds_init - setup LVDS connectors on this device
842  * @dev: drm device
843  *
844  * Create the connector, register the LVDS DDC bus, and try to figure out what
845  * modes we can display on the LVDS panel (if present).
846  */
847 bool intel_lvds_init(struct drm_device *dev)
848 {
849         struct drm_i915_private *dev_priv = dev->dev_private;
850         struct intel_lvds *intel_lvds;
851         struct intel_encoder *intel_encoder;
852         struct intel_connector *intel_connector;
853         struct drm_connector *connector;
854         struct drm_encoder *encoder;
855         struct drm_display_mode *scan; /* *modes, *bios_mode; */
856         struct drm_crtc *crtc;
857         u32 lvds;
858         int pipe;
859         u8 pin;
860
861         /* Skip init on machines we know falsely report LVDS */
862         if (dmi_check_system(intel_no_lvds))
863                 return false;
864
865         pin = GMBUS_PORT_PANEL;
866         if (!lvds_is_present_in_vbt(dev, &pin)) {
867                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
868                 return false;
869         }
870
871         if (HAS_PCH_SPLIT(dev)) {
872                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
873                         return false;
874                 if (dev_priv->edp.support) {
875                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
876                         return false;
877                 }
878         }
879
880         if (!intel_lvds_ddc_probe(dev, pin)) {
881                 DRM_DEBUG_KMS("LVDS did not respond to DDC probe\n");
882                 return false;
883         }
884
885         intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
886         if (!intel_lvds) {
887                 return false;
888         }
889
890         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
891         if (!intel_connector) {
892                 kfree(intel_lvds);
893                 return false;
894         }
895
896         if (!HAS_PCH_SPLIT(dev)) {
897                 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
898         }
899
900         intel_encoder = &intel_lvds->base;
901         encoder = &intel_encoder->base;
902         connector = &intel_connector->base;
903         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
904                            DRM_MODE_CONNECTOR_LVDS);
905
906         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
907                          DRM_MODE_ENCODER_LVDS);
908
909         intel_connector_attach_encoder(intel_connector, intel_encoder);
910         intel_encoder->type = INTEL_OUTPUT_LVDS;
911
912         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
913         intel_encoder->crtc_mask = (1 << 1);
914         if (INTEL_INFO(dev)->gen >= 5)
915                 intel_encoder->crtc_mask |= (1 << 0);
916         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
917         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
918         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
919         connector->interlace_allowed = false;
920         connector->doublescan_allowed = false;
921
922         /* create the scaling mode property */
923         drm_mode_create_scaling_mode_property(dev);
924         /*
925          * the initial panel fitting mode will be FULL_SCREEN.
926          */
927
928         drm_connector_attach_property(&intel_connector->base,
929                                       dev->mode_config.scaling_mode_property,
930                                       DRM_MODE_SCALE_ASPECT);
931         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
932         /*
933          * LVDS discovery:
934          * 1) check for EDID on DDC
935          * 2) check for VBT data
936          * 3) check to see if LVDS is already on
937          *    if none of the above, no panel
938          * 4) make sure lid is open
939          *    if closed, act like it's not there for now
940          */
941
942         /*
943          * Attempt to get the fixed panel mode from DDC.  Assume that the
944          * preferred mode is the right one.
945          */
946         intel_lvds->edid = drm_get_edid(connector,
947                                         &dev_priv->gmbus[pin].adapter);
948         if (intel_lvds->edid) {
949                 if (drm_add_edid_modes(connector,
950                                        intel_lvds->edid)) {
951                         drm_mode_connector_update_edid_property(connector,
952                                                                 intel_lvds->edid);
953                 } else {
954                         kfree(intel_lvds->edid);
955                         intel_lvds->edid = NULL;
956                 }
957         }
958         if (!intel_lvds->edid) {
959                 /* Didn't get an EDID, so
960                  * Set wide sync ranges so we get all modes
961                  * handed to valid_mode for checking
962                  */
963                 connector->display_info.min_vfreq = 0;
964                 connector->display_info.max_vfreq = 200;
965                 connector->display_info.min_hfreq = 0;
966                 connector->display_info.max_hfreq = 200;
967         }
968
969         list_for_each_entry(scan, &connector->probed_modes, head) {
970                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
971                         intel_lvds->fixed_mode =
972                                 drm_mode_duplicate(dev, scan);
973                         intel_find_lvds_downclock(dev,
974                                                   intel_lvds->fixed_mode,
975                                                   connector);
976                         goto out;
977                 }
978         }
979
980         /* Failed to get EDID, what about VBT? */
981         if (dev_priv->lfp_lvds_vbt_mode) {
982                 intel_lvds->fixed_mode =
983                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
984                 if (intel_lvds->fixed_mode) {
985                         intel_lvds->fixed_mode->type |=
986                                 DRM_MODE_TYPE_PREFERRED;
987                         goto out;
988                 }
989         }
990
991         /*
992          * If we didn't get EDID, try checking if the panel is already turned
993          * on.  If so, assume that whatever is currently programmed is the
994          * correct mode.
995          */
996
997         /* Ironlake: FIXME if still fail, not try pipe mode now */
998         if (HAS_PCH_SPLIT(dev))
999                 goto failed;
1000
1001         lvds = I915_READ(LVDS);
1002         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1003         crtc = intel_get_crtc_for_pipe(dev, pipe);
1004
1005         if (crtc && (lvds & LVDS_PORT_EN)) {
1006                 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1007                 if (intel_lvds->fixed_mode) {
1008                         intel_lvds->fixed_mode->type |=
1009                                 DRM_MODE_TYPE_PREFERRED;
1010                         goto out;
1011                 }
1012         }
1013
1014         /* If we still don't have a mode after all that, give up. */
1015         if (!intel_lvds->fixed_mode)
1016                 goto failed;
1017
1018 out:
1019         if (HAS_PCH_SPLIT(dev)) {
1020                 u32 pwm;
1021
1022                 pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
1023
1024                 /* make sure PWM is enabled and locked to the LVDS pipe */
1025                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1026                 if (pipe == 0 && (pwm & PWM_PIPE_B))
1027                         I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
1028                 if (pipe)
1029                         pwm |= PWM_PIPE_B;
1030                 else
1031                         pwm &= ~PWM_PIPE_B;
1032                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
1033
1034                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1035                 pwm |= PWM_PCH_ENABLE;
1036                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1037         }
1038         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1039         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1040                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1041                 dev_priv->lid_notifier.notifier_call = NULL;
1042         }
1043         /* keep the LVDS connector */
1044         dev_priv->int_lvds_connector = connector;
1045         drm_sysfs_connector_add(connector);
1046         return true;
1047
1048 failed:
1049         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1050         drm_connector_cleanup(connector);
1051         drm_encoder_cleanup(encoder);
1052         kfree(intel_lvds);
1053         kfree(intel_connector);
1054         return false;
1055 }