drm/i915: use GMBUS to manage i2c links
[linux-2.6.git] / drivers / gpu / drm / i915 / intel_dvo.c
1 /*
2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
3  * Copyright © 2006-2007 Intel Corporation
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *      Eric Anholt <eric@anholt.net>
26  */
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include "drmP.h"
30 #include "drm.h"
31 #include "drm_crtc.h"
32 #include "intel_drv.h"
33 #include "i915_drm.h"
34 #include "i915_drv.h"
35 #include "dvo.h"
36
37 #define SIL164_ADDR     0x38
38 #define CH7xxx_ADDR     0x76
39 #define TFP410_ADDR     0x38
40
41 static const struct intel_dvo_device intel_dvo_devices[] = {
42         {
43                 .type = INTEL_DVO_CHIP_TMDS,
44                 .name = "sil164",
45                 .dvo_reg = DVOC,
46                 .slave_addr = SIL164_ADDR,
47                 .dev_ops = &sil164_ops,
48         },
49         {
50                 .type = INTEL_DVO_CHIP_TMDS,
51                 .name = "ch7xxx",
52                 .dvo_reg = DVOC,
53                 .slave_addr = CH7xxx_ADDR,
54                 .dev_ops = &ch7xxx_ops,
55         },
56         {
57                 .type = INTEL_DVO_CHIP_LVDS,
58                 .name = "ivch",
59                 .dvo_reg = DVOA,
60                 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
61                 .dev_ops = &ivch_ops,
62         },
63         {
64                 .type = INTEL_DVO_CHIP_TMDS,
65                 .name = "tfp410",
66                 .dvo_reg = DVOC,
67                 .slave_addr = TFP410_ADDR,
68                 .dev_ops = &tfp410_ops,
69         },
70         {
71                 .type = INTEL_DVO_CHIP_LVDS,
72                 .name = "ch7017",
73                 .dvo_reg = DVOC,
74                 .slave_addr = 0x75,
75                 .gpio = GMBUS_PORT_DPD,
76                 .dev_ops = &ch7017_ops,
77         }
78 };
79
80 struct intel_dvo {
81         struct intel_encoder base;
82
83         struct intel_dvo_device dev;
84         int ddc_bus;
85
86         struct drm_display_mode *panel_fixed_mode;
87         bool panel_wants_dither;
88 };
89
90 static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
91 {
92         return container_of(encoder, struct intel_dvo, base.base);
93 }
94
95 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
96 {
97         return container_of(intel_attached_encoder(connector),
98                             struct intel_dvo, base);
99 }
100
101 static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
102 {
103         struct drm_i915_private *dev_priv = encoder->dev->dev_private;
104         struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
105         u32 dvo_reg = intel_dvo->dev.dvo_reg;
106         u32 temp = I915_READ(dvo_reg);
107
108         if (mode == DRM_MODE_DPMS_ON) {
109                 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
110                 I915_READ(dvo_reg);
111                 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
112         } else {
113                 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
114                 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
115                 I915_READ(dvo_reg);
116         }
117 }
118
119 static int intel_dvo_mode_valid(struct drm_connector *connector,
120                                 struct drm_display_mode *mode)
121 {
122         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
123
124         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
125                 return MODE_NO_DBLESCAN;
126
127         /* XXX: Validate clock range */
128
129         if (intel_dvo->panel_fixed_mode) {
130                 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
131                         return MODE_PANEL;
132                 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
133                         return MODE_PANEL;
134         }
135
136         return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
137 }
138
139 static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
140                                  struct drm_display_mode *mode,
141                                  struct drm_display_mode *adjusted_mode)
142 {
143         struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
144
145         /* If we have timings from the BIOS for the panel, put them in
146          * to the adjusted mode.  The CRTC will be set up for this mode,
147          * with the panel scaling set up to source from the H/VDisplay
148          * of the original mode.
149          */
150         if (intel_dvo->panel_fixed_mode != NULL) {
151 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
152                 C(hdisplay);
153                 C(hsync_start);
154                 C(hsync_end);
155                 C(htotal);
156                 C(vdisplay);
157                 C(vsync_start);
158                 C(vsync_end);
159                 C(vtotal);
160                 C(clock);
161                 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
162 #undef C
163         }
164
165         if (intel_dvo->dev.dev_ops->mode_fixup)
166                 return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);
167
168         return true;
169 }
170
171 static void intel_dvo_mode_set(struct drm_encoder *encoder,
172                                struct drm_display_mode *mode,
173                                struct drm_display_mode *adjusted_mode)
174 {
175         struct drm_device *dev = encoder->dev;
176         struct drm_i915_private *dev_priv = dev->dev_private;
177         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
178         struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
179         int pipe = intel_crtc->pipe;
180         u32 dvo_val;
181         u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
182         int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
183
184         switch (dvo_reg) {
185         case DVOA:
186         default:
187                 dvo_srcdim_reg = DVOA_SRCDIM;
188                 break;
189         case DVOB:
190                 dvo_srcdim_reg = DVOB_SRCDIM;
191                 break;
192         case DVOC:
193                 dvo_srcdim_reg = DVOC_SRCDIM;
194                 break;
195         }
196
197         intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);
198
199         /* Save the data order, since I don't know what it should be set to. */
200         dvo_val = I915_READ(dvo_reg) &
201                   (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
202         dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
203                    DVO_BLANK_ACTIVE_HIGH;
204
205         if (pipe == 1)
206                 dvo_val |= DVO_PIPE_B_SELECT;
207         dvo_val |= DVO_PIPE_STALL;
208         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
209                 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
210         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
211                 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
212
213         I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
214
215         /*I915_WRITE(DVOB_SRCDIM,
216           (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
217           (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
218         I915_WRITE(dvo_srcdim_reg,
219                    (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
220                    (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
221         /*I915_WRITE(DVOB, dvo_val);*/
222         I915_WRITE(dvo_reg, dvo_val);
223 }
224
225 /**
226  * Detect the output connection on our DVO device.
227  *
228  * Unimplemented.
229  */
230 static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector)
231 {
232         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
233         return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
234 }
235
236 static int intel_dvo_get_modes(struct drm_connector *connector)
237 {
238         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
239         struct drm_i915_private *dev_priv = connector->dev->dev_private;
240
241         /* We should probably have an i2c driver get_modes function for those
242          * devices which will have a fixed set of modes determined by the chip
243          * (TV-out, for example), but for now with just TMDS and LVDS,
244          * that's not the case.
245          */
246         intel_ddc_get_modes(connector,
247                             &dev_priv->gmbus[intel_dvo->ddc_bus].adapter);
248         if (!list_empty(&connector->probed_modes))
249                 return 1;
250
251         if (intel_dvo->panel_fixed_mode != NULL) {
252                 struct drm_display_mode *mode;
253                 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
254                 if (mode) {
255                         drm_mode_probed_add(connector, mode);
256                         return 1;
257                 }
258         }
259
260         return 0;
261 }
262
263 static void intel_dvo_destroy(struct drm_connector *connector)
264 {
265         drm_sysfs_connector_remove(connector);
266         drm_connector_cleanup(connector);
267         kfree(connector);
268 }
269
270 static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
271         .dpms = intel_dvo_dpms,
272         .mode_fixup = intel_dvo_mode_fixup,
273         .prepare = intel_encoder_prepare,
274         .mode_set = intel_dvo_mode_set,
275         .commit = intel_encoder_commit,
276 };
277
278 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
279         .dpms = drm_helper_connector_dpms,
280         .detect = intel_dvo_detect,
281         .destroy = intel_dvo_destroy,
282         .fill_modes = drm_helper_probe_single_connector_modes,
283 };
284
285 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
286         .mode_valid = intel_dvo_mode_valid,
287         .get_modes = intel_dvo_get_modes,
288         .best_encoder = intel_best_encoder,
289 };
290
291 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
292 {
293         struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
294
295         if (intel_dvo->dev.dev_ops->destroy)
296                 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
297
298         kfree(intel_dvo->panel_fixed_mode);
299
300         intel_encoder_destroy(encoder);
301 }
302
303 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
304         .destroy = intel_dvo_enc_destroy,
305 };
306
307 /**
308  * Attempts to get a fixed panel timing for LVDS (currently only the i830).
309  *
310  * Other chips with DVO LVDS will need to extend this to deal with the LVDS
311  * chip being on DVOB/C and having multiple pipes.
312  */
313 static struct drm_display_mode *
314 intel_dvo_get_current_mode(struct drm_connector *connector)
315 {
316         struct drm_device *dev = connector->dev;
317         struct drm_i915_private *dev_priv = dev->dev_private;
318         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
319         uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
320         struct drm_display_mode *mode = NULL;
321
322         /* If the DVO port is active, that'll be the LVDS, so we can pull out
323          * its timings to get how the BIOS set up the panel.
324          */
325         if (dvo_val & DVO_ENABLE) {
326                 struct drm_crtc *crtc;
327                 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
328
329                 crtc = intel_get_crtc_for_pipe(dev, pipe);
330                 if (crtc) {
331                         mode = intel_crtc_mode_get(dev, crtc);
332                         if (mode) {
333                                 mode->type |= DRM_MODE_TYPE_PREFERRED;
334                                 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
335                                         mode->flags |= DRM_MODE_FLAG_PHSYNC;
336                                 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
337                                         mode->flags |= DRM_MODE_FLAG_PVSYNC;
338                         }
339                 }
340         }
341
342         return mode;
343 }
344
345 void intel_dvo_init(struct drm_device *dev)
346 {
347         struct drm_i915_private *dev_priv = dev->dev_private;
348         struct intel_encoder *intel_encoder;
349         struct intel_dvo *intel_dvo;
350         struct intel_connector *intel_connector;
351         int ret = 0;
352         int i;
353         int encoder_type = DRM_MODE_ENCODER_NONE;
354
355         intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
356         if (!intel_dvo)
357                 return;
358
359         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
360         if (!intel_connector) {
361                 kfree(intel_dvo);
362                 return;
363         }
364
365         intel_encoder = &intel_dvo->base;
366         drm_encoder_init(dev, &intel_encoder->base,
367                          &intel_dvo_enc_funcs, encoder_type);
368
369         /* Set up the DDC bus */
370         intel_dvo->ddc_bus = GMBUS_PORT_DPB;
371
372         /* Now, try to find a controller */
373         for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
374                 struct drm_connector *connector = &intel_connector->base;
375                 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
376                 struct i2c_adapter *i2c;
377                 int gpio;
378
379                 /* Allow the I2C driver info to specify the GPIO to be used in
380                  * special cases, but otherwise default to what's defined
381                  * in the spec.
382                  */
383                 if (dvo->gpio != 0)
384                         gpio = dvo->gpio;
385                 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
386                         gpio = GMBUS_PORT_PANEL;
387                 else
388                         gpio = GMBUS_PORT_DPD;
389
390                 /* Set up the I2C bus necessary for the chip we're probing.
391                  * It appears that everything is on GPIOE except for panels
392                  * on i830 laptops, which are on GPIOB (DVOA).
393                  */
394                 i2c = &dev_priv->gmbus[gpio].adapter;
395
396                 intel_dvo->dev = *dvo;
397                 ret = dvo->dev_ops->init(&intel_dvo->dev, i2c);
398                 if (!ret)
399                         continue;
400
401                 intel_encoder->type = INTEL_OUTPUT_DVO;
402                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
403                 switch (dvo->type) {
404                 case INTEL_DVO_CHIP_TMDS:
405                         intel_encoder->clone_mask =
406                                 (1 << INTEL_DVO_TMDS_CLONE_BIT) |
407                                 (1 << INTEL_ANALOG_CLONE_BIT);
408                         drm_connector_init(dev, connector,
409                                            &intel_dvo_connector_funcs,
410                                            DRM_MODE_CONNECTOR_DVII);
411                         encoder_type = DRM_MODE_ENCODER_TMDS;
412                         break;
413                 case INTEL_DVO_CHIP_LVDS:
414                         intel_encoder->clone_mask =
415                                 (1 << INTEL_DVO_LVDS_CLONE_BIT);
416                         drm_connector_init(dev, connector,
417                                            &intel_dvo_connector_funcs,
418                                            DRM_MODE_CONNECTOR_LVDS);
419                         encoder_type = DRM_MODE_ENCODER_LVDS;
420                         break;
421                 }
422
423                 drm_connector_helper_add(connector,
424                                          &intel_dvo_connector_helper_funcs);
425                 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
426                 connector->interlace_allowed = false;
427                 connector->doublescan_allowed = false;
428
429                 drm_encoder_helper_add(&intel_encoder->base,
430                                        &intel_dvo_helper_funcs);
431
432                 intel_connector_attach_encoder(intel_connector, intel_encoder);
433                 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
434                         /* For our LVDS chipsets, we should hopefully be able
435                          * to dig the fixed panel mode out of the BIOS data.
436                          * However, it's in a different format from the BIOS
437                          * data on chipsets with integrated LVDS (stored in AIM
438                          * headers, likely), so for now, just get the current
439                          * mode being output through DVO.
440                          */
441                         intel_dvo->panel_fixed_mode =
442                                 intel_dvo_get_current_mode(connector);
443                         intel_dvo->panel_wants_dither = true;
444                 }
445
446                 drm_sysfs_connector_add(connector);
447                 return;
448         }
449
450         drm_encoder_cleanup(&intel_encoder->base);
451         kfree(intel_dvo);
452         kfree(intel_connector);
453 }