Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied...
[linux-2.6.git] / drivers / gpu / drm / i915 / intel_crt.c
1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  *      Eric Anholt <eric@anholt.net>
25  */
26
27 #include <linux/i2c.h>
28 #include "drmP.h"
29 #include "drm.h"
30 #include "drm_crtc.h"
31 #include "drm_crtc_helper.h"
32 #include "intel_drv.h"
33 #include "i915_drm.h"
34 #include "i915_drv.h"
35
36 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
37 {
38         struct drm_device *dev = encoder->dev;
39         struct drm_i915_private *dev_priv = dev->dev_private;
40         u32 temp, reg;
41
42         if (IS_IGDNG(dev))
43                 reg = PCH_ADPA;
44         else
45                 reg = ADPA;
46
47         temp = I915_READ(reg);
48         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
49         temp |= ADPA_DAC_ENABLE;
50
51         switch(mode) {
52         case DRM_MODE_DPMS_ON:
53                 temp |= ADPA_DAC_ENABLE;
54                 break;
55         case DRM_MODE_DPMS_STANDBY:
56                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
57                 break;
58         case DRM_MODE_DPMS_SUSPEND:
59                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
60                 break;
61         case DRM_MODE_DPMS_OFF:
62                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
63                 break;
64         }
65
66         I915_WRITE(reg, temp);
67 }
68
69 static int intel_crt_mode_valid(struct drm_connector *connector,
70                                 struct drm_display_mode *mode)
71 {
72         struct drm_device *dev = connector->dev;
73
74         int max_clock = 0;
75         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
76                 return MODE_NO_DBLESCAN;
77
78         if (mode->clock < 25000)
79                 return MODE_CLOCK_LOW;
80
81         if (!IS_I9XX(dev))
82                 max_clock = 350000;
83         else
84                 max_clock = 400000;
85         if (mode->clock > max_clock)
86                 return MODE_CLOCK_HIGH;
87
88         return MODE_OK;
89 }
90
91 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
92                                  struct drm_display_mode *mode,
93                                  struct drm_display_mode *adjusted_mode)
94 {
95         return true;
96 }
97
98 static void intel_crt_mode_set(struct drm_encoder *encoder,
99                                struct drm_display_mode *mode,
100                                struct drm_display_mode *adjusted_mode)
101 {
102
103         struct drm_device *dev = encoder->dev;
104         struct drm_crtc *crtc = encoder->crtc;
105         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
106         struct drm_i915_private *dev_priv = dev->dev_private;
107         int dpll_md_reg;
108         u32 adpa, dpll_md;
109         u32 adpa_reg;
110
111         if (intel_crtc->pipe == 0)
112                 dpll_md_reg = DPLL_A_MD;
113         else
114                 dpll_md_reg = DPLL_B_MD;
115
116         if (IS_IGDNG(dev))
117                 adpa_reg = PCH_ADPA;
118         else
119                 adpa_reg = ADPA;
120
121         /*
122          * Disable separate mode multiplier used when cloning SDVO to CRT
123          * XXX this needs to be adjusted when we really are cloning
124          */
125         if (IS_I965G(dev) && !IS_IGDNG(dev)) {
126                 dpll_md = I915_READ(dpll_md_reg);
127                 I915_WRITE(dpll_md_reg,
128                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
129         }
130
131         adpa = 0;
132         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
133                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
134         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
135                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
136
137         if (intel_crtc->pipe == 0) {
138                 adpa |= ADPA_PIPE_A_SELECT;
139                 if (!IS_IGDNG(dev))
140                         I915_WRITE(BCLRPAT_A, 0);
141         } else {
142                 adpa |= ADPA_PIPE_B_SELECT;
143                 if (!IS_IGDNG(dev))
144                         I915_WRITE(BCLRPAT_B, 0);
145         }
146
147         I915_WRITE(adpa_reg, adpa);
148 }
149
150 static bool intel_igdng_crt_detect_hotplug(struct drm_connector *connector)
151 {
152         struct drm_device *dev = connector->dev;
153         struct drm_i915_private *dev_priv = dev->dev_private;
154         u32 adpa, temp;
155         bool ret;
156
157         temp = adpa = I915_READ(PCH_ADPA);
158
159         adpa &= ~ADPA_CRT_HOTPLUG_MASK;
160
161         adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
162                         ADPA_CRT_HOTPLUG_WARMUP_10MS |
163                         ADPA_CRT_HOTPLUG_SAMPLE_4S |
164                         ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
165                         ADPA_CRT_HOTPLUG_VOLREF_325MV |
166                         ADPA_CRT_HOTPLUG_ENABLE |
167                         ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
168
169         DRM_DEBUG("pch crt adpa 0x%x", adpa);
170         I915_WRITE(PCH_ADPA, adpa);
171
172         /* This might not be needed as not specified in spec...*/
173         udelay(1000);
174
175         /* Check the status to see if both blue and green are on now */
176         adpa = I915_READ(PCH_ADPA);
177         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) ==
178                         ADPA_CRT_HOTPLUG_MONITOR_COLOR)
179                 ret = true;
180         else
181                 ret = false;
182
183         /* restore origin register */
184         I915_WRITE(PCH_ADPA, temp);
185         return ret;
186 }
187
188 /**
189  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
190  *
191  * Not for i915G/i915GM
192  *
193  * \return true if CRT is connected.
194  * \return false if CRT is disconnected.
195  */
196 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
197 {
198         struct drm_device *dev = connector->dev;
199         struct drm_i915_private *dev_priv = dev->dev_private;
200         u32 hotplug_en;
201         int i, tries = 0;
202
203         if (IS_IGDNG(dev))
204                 return intel_igdng_crt_detect_hotplug(connector);
205
206         /*
207          * On 4 series desktop, CRT detect sequence need to be done twice
208          * to get a reliable result.
209          */
210
211         if (IS_G4X(dev) && !IS_GM45(dev))
212                 tries = 2;
213         else
214                 tries = 1;
215         hotplug_en = I915_READ(PORT_HOTPLUG_EN);
216         hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
217         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
218
219         if (IS_G4X(dev))
220                 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
221
222         hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
223
224         for (i = 0; i < tries ; i++) {
225                 unsigned long timeout;
226                 /* turn on the FORCE_DETECT */
227                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
228                 timeout = jiffies + msecs_to_jiffies(1000);
229                 /* wait for FORCE_DETECT to go off */
230                 do {
231                         if (!(I915_READ(PORT_HOTPLUG_EN) &
232                                         CRT_HOTPLUG_FORCE_DETECT))
233                                 break;
234                         msleep(1);
235                 } while (time_after(timeout, jiffies));
236         }
237
238         if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) ==
239             CRT_HOTPLUG_MONITOR_COLOR)
240                 return true;
241
242         return false;
243 }
244
245 static bool intel_crt_detect_ddc(struct drm_connector *connector)
246 {
247         struct intel_output *intel_output = to_intel_output(connector);
248
249         /* CRT should always be at 0, but check anyway */
250         if (intel_output->type != INTEL_OUTPUT_ANALOG)
251                 return false;
252
253         return intel_ddc_probe(intel_output);
254 }
255
256 static enum drm_connector_status
257 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_output *intel_output)
258 {
259         struct drm_encoder *encoder = &intel_output->enc;
260         struct drm_device *dev = encoder->dev;
261         struct drm_i915_private *dev_priv = dev->dev_private;
262         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
263         uint32_t pipe = intel_crtc->pipe;
264         uint32_t save_bclrpat;
265         uint32_t save_vtotal;
266         uint32_t vtotal, vactive;
267         uint32_t vsample;
268         uint32_t vblank, vblank_start, vblank_end;
269         uint32_t dsl;
270         uint32_t bclrpat_reg;
271         uint32_t vtotal_reg;
272         uint32_t vblank_reg;
273         uint32_t vsync_reg;
274         uint32_t pipeconf_reg;
275         uint32_t pipe_dsl_reg;
276         uint8_t st00;
277         enum drm_connector_status status;
278
279         if (pipe == 0) {
280                 bclrpat_reg = BCLRPAT_A;
281                 vtotal_reg = VTOTAL_A;
282                 vblank_reg = VBLANK_A;
283                 vsync_reg = VSYNC_A;
284                 pipeconf_reg = PIPEACONF;
285                 pipe_dsl_reg = PIPEADSL;
286         } else {
287                 bclrpat_reg = BCLRPAT_B;
288                 vtotal_reg = VTOTAL_B;
289                 vblank_reg = VBLANK_B;
290                 vsync_reg = VSYNC_B;
291                 pipeconf_reg = PIPEBCONF;
292                 pipe_dsl_reg = PIPEBDSL;
293         }
294
295         save_bclrpat = I915_READ(bclrpat_reg);
296         save_vtotal = I915_READ(vtotal_reg);
297         vblank = I915_READ(vblank_reg);
298
299         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
300         vactive = (save_vtotal & 0x7ff) + 1;
301
302         vblank_start = (vblank & 0xfff) + 1;
303         vblank_end = ((vblank >> 16) & 0xfff) + 1;
304
305         /* Set the border color to purple. */
306         I915_WRITE(bclrpat_reg, 0x500050);
307
308         if (IS_I9XX(dev)) {
309                 uint32_t pipeconf = I915_READ(pipeconf_reg);
310                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
311                 /* Wait for next Vblank to substitue
312                  * border color for Color info */
313                 intel_wait_for_vblank(dev);
314                 st00 = I915_READ8(VGA_MSR_WRITE);
315                 status = ((st00 & (1 << 4)) != 0) ?
316                         connector_status_connected :
317                         connector_status_disconnected;
318
319                 I915_WRITE(pipeconf_reg, pipeconf);
320         } else {
321                 bool restore_vblank = false;
322                 int count, detect;
323
324                 /*
325                 * If there isn't any border, add some.
326                 * Yes, this will flicker
327                 */
328                 if (vblank_start <= vactive && vblank_end >= vtotal) {
329                         uint32_t vsync = I915_READ(vsync_reg);
330                         uint32_t vsync_start = (vsync & 0xffff) + 1;
331
332                         vblank_start = vsync_start;
333                         I915_WRITE(vblank_reg,
334                                    (vblank_start - 1) |
335                                    ((vblank_end - 1) << 16));
336                         restore_vblank = true;
337                 }
338                 /* sample in the vertical border, selecting the larger one */
339                 if (vblank_start - vactive >= vtotal - vblank_end)
340                         vsample = (vblank_start + vactive) >> 1;
341                 else
342                         vsample = (vtotal + vblank_end) >> 1;
343
344                 /*
345                  * Wait for the border to be displayed
346                  */
347                 while (I915_READ(pipe_dsl_reg) >= vactive)
348                         ;
349                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
350                         ;
351                 /*
352                  * Watch ST00 for an entire scanline
353                  */
354                 detect = 0;
355                 count = 0;
356                 do {
357                         count++;
358                         /* Read the ST00 VGA status register */
359                         st00 = I915_READ8(VGA_MSR_WRITE);
360                         if (st00 & (1 << 4))
361                                 detect++;
362                 } while ((I915_READ(pipe_dsl_reg) == dsl));
363
364                 /* restore vblank if necessary */
365                 if (restore_vblank)
366                         I915_WRITE(vblank_reg, vblank);
367                 /*
368                  * If more than 3/4 of the scanline detected a monitor,
369                  * then it is assumed to be present. This works even on i830,
370                  * where there isn't any way to force the border color across
371                  * the screen
372                  */
373                 status = detect * 4 > count * 3 ?
374                          connector_status_connected :
375                          connector_status_disconnected;
376         }
377
378         /* Restore previous settings */
379         I915_WRITE(bclrpat_reg, save_bclrpat);
380
381         return status;
382 }
383
384 static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
385 {
386         struct drm_device *dev = connector->dev;
387         struct intel_output *intel_output = to_intel_output(connector);
388         struct drm_encoder *encoder = &intel_output->enc;
389         struct drm_crtc *crtc;
390         int dpms_mode;
391         enum drm_connector_status status;
392
393         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
394                 if (intel_crt_detect_hotplug(connector))
395                         return connector_status_connected;
396                 else
397                         return connector_status_disconnected;
398         }
399
400         if (intel_crt_detect_ddc(connector))
401                 return connector_status_connected;
402
403         /* for pre-945g platforms use load detect */
404         if (encoder->crtc && encoder->crtc->enabled) {
405                 status = intel_crt_load_detect(encoder->crtc, intel_output);
406         } else {
407                 crtc = intel_get_load_detect_pipe(intel_output,
408                                                   NULL, &dpms_mode);
409                 if (crtc) {
410                         status = intel_crt_load_detect(crtc, intel_output);
411                         intel_release_load_detect_pipe(intel_output, dpms_mode);
412                 } else
413                         status = connector_status_unknown;
414         }
415
416         return status;
417 }
418
419 static void intel_crt_destroy(struct drm_connector *connector)
420 {
421         struct intel_output *intel_output = to_intel_output(connector);
422
423         intel_i2c_destroy(intel_output->ddc_bus);
424         drm_sysfs_connector_remove(connector);
425         drm_connector_cleanup(connector);
426         kfree(connector);
427 }
428
429 static int intel_crt_get_modes(struct drm_connector *connector)
430 {
431         struct intel_output *intel_output = to_intel_output(connector);
432         return intel_ddc_get_modes(intel_output);
433 }
434
435 static int intel_crt_set_property(struct drm_connector *connector,
436                                   struct drm_property *property,
437                                   uint64_t value)
438 {
439         return 0;
440 }
441
442 /*
443  * Routines for controlling stuff on the analog port
444  */
445
446 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
447         .dpms = intel_crt_dpms,
448         .mode_fixup = intel_crt_mode_fixup,
449         .prepare = intel_encoder_prepare,
450         .commit = intel_encoder_commit,
451         .mode_set = intel_crt_mode_set,
452 };
453
454 static const struct drm_connector_funcs intel_crt_connector_funcs = {
455         .dpms = drm_helper_connector_dpms,
456         .detect = intel_crt_detect,
457         .fill_modes = drm_helper_probe_single_connector_modes,
458         .destroy = intel_crt_destroy,
459         .set_property = intel_crt_set_property,
460 };
461
462 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
463         .mode_valid = intel_crt_mode_valid,
464         .get_modes = intel_crt_get_modes,
465         .best_encoder = intel_best_encoder,
466 };
467
468 static void intel_crt_enc_destroy(struct drm_encoder *encoder)
469 {
470         drm_encoder_cleanup(encoder);
471 }
472
473 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
474         .destroy = intel_crt_enc_destroy,
475 };
476
477 void intel_crt_init(struct drm_device *dev)
478 {
479         struct drm_connector *connector;
480         struct intel_output *intel_output;
481         u32 i2c_reg;
482
483         intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
484         if (!intel_output)
485                 return;
486
487         connector = &intel_output->base;
488         drm_connector_init(dev, &intel_output->base,
489                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
490
491         drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
492                          DRM_MODE_ENCODER_DAC);
493
494         drm_mode_connector_attach_encoder(&intel_output->base,
495                                           &intel_output->enc);
496
497         /* Set up the DDC bus. */
498         if (IS_IGDNG(dev))
499                 i2c_reg = PCH_GPIOA;
500         else
501                 i2c_reg = GPIOA;
502         intel_output->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A");
503         if (!intel_output->ddc_bus) {
504                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
505                            "failed.\n");
506                 return;
507         }
508
509         intel_output->type = INTEL_OUTPUT_ANALOG;
510         connector->interlace_allowed = 0;
511         connector->doublescan_allowed = 0;
512
513         drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
514         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
515
516         drm_sysfs_connector_add(connector);
517 }