drm/i915: Add a new mobile Sandybridge PCI ID.
[linux-2.6.git] / drivers / gpu / drm / i915 / i915_drv.c
1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
2  */
3 /*
4  *
5  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6  * All Rights Reserved.
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a
9  * copy of this software and associated documentation files (the
10  * "Software"), to deal in the Software without restriction, including
11  * without limitation the rights to use, copy, modify, merge, publish,
12  * distribute, sub license, and/or sell copies of the Software, and to
13  * permit persons to whom the Software is furnished to do so, subject to
14  * the following conditions:
15  *
16  * The above copyright notice and this permission notice (including the
17  * next paragraph) shall be included in all copies or substantial portions
18  * of the Software.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27  *
28  */
29
30 #include <linux/device.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "i915_drm.h"
34 #include "i915_drv.h"
35
36 #include <linux/console.h>
37 #include "drm_crtc_helper.h"
38
39 static int i915_modeset = -1;
40 module_param_named(modeset, i915_modeset, int, 0400);
41
42 unsigned int i915_fbpercrtc = 0;
43 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
44
45 unsigned int i915_powersave = 1;
46 module_param_named(powersave, i915_powersave, int, 0400);
47
48 unsigned int i915_lvds_downclock = 0;
49 module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
50
51 static struct drm_driver driver;
52
53 #define INTEL_VGA_DEVICE(id, info) {            \
54         .class = PCI_CLASS_DISPLAY_VGA << 8,    \
55         .class_mask = 0xffff00,                 \
56         .vendor = 0x8086,                       \
57         .device = id,                           \
58         .subvendor = PCI_ANY_ID,                \
59         .subdevice = PCI_ANY_ID,                \
60         .driver_data = (unsigned long) info }
61
62 const static struct intel_device_info intel_i830_info = {
63         .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
64 };
65
66 const static struct intel_device_info intel_845g_info = {
67         .is_i8xx = 1,
68 };
69
70 const static struct intel_device_info intel_i85x_info = {
71         .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
72 };
73
74 const static struct intel_device_info intel_i865g_info = {
75         .is_i8xx = 1,
76 };
77
78 const static struct intel_device_info intel_i915g_info = {
79         .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
80 };
81 const static struct intel_device_info intel_i915gm_info = {
82         .is_i9xx = 1,  .is_mobile = 1, .has_fbc = 1,
83         .cursor_needs_physical = 1,
84 };
85 const static struct intel_device_info intel_i945g_info = {
86         .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
87 };
88 const static struct intel_device_info intel_i945gm_info = {
89         .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
90         .has_hotplug = 1, .cursor_needs_physical = 1,
91 };
92
93 const static struct intel_device_info intel_i965g_info = {
94         .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
95 };
96
97 const static struct intel_device_info intel_i965gm_info = {
98         .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
99         .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
100         .has_hotplug = 1,
101 };
102
103 const static struct intel_device_info intel_g33_info = {
104         .is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
105         .has_hotplug = 1,
106 };
107
108 const static struct intel_device_info intel_g45_info = {
109         .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
110         .has_pipe_cxsr = 1,
111         .has_hotplug = 1,
112 };
113
114 const static struct intel_device_info intel_gm45_info = {
115         .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
116         .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
117         .has_pipe_cxsr = 1,
118         .has_hotplug = 1,
119 };
120
121 const static struct intel_device_info intel_pineview_info = {
122         .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
123         .need_gfx_hws = 1,
124         .has_hotplug = 1,
125 };
126
127 const static struct intel_device_info intel_ironlake_d_info = {
128         .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
129         .has_pipe_cxsr = 1,
130         .has_hotplug = 1,
131 };
132
133 const static struct intel_device_info intel_ironlake_m_info = {
134         .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
135         .need_gfx_hws = 1, .has_rc6 = 1,
136         .has_hotplug = 1,
137 };
138
139 const static struct intel_device_info intel_sandybridge_d_info = {
140         .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
141         .has_pipe_cxsr = 1,
142         .has_hotplug = 1,
143 };
144
145 const static struct intel_device_info intel_sandybridge_m_info = {
146         .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
147         .has_pipe_cxsr = 1,
148         .has_hotplug = 1,
149 };
150
151 const static struct pci_device_id pciidlist[] = {
152         INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
153         INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
154         INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
155         INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
156         INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
157         INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
158         INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
159         INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
160         INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
161         INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
162         INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
163         INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
164         INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
165         INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
166         INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
167         INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
168         INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
169         INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
170         INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
171         INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
172         INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
173         INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
174         INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
175         INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
176         INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
177         INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
178         INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
179         INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
180         INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
181         INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
182         INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
183         INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
184         {0, 0, 0}
185 };
186
187 #if defined(CONFIG_DRM_I915_KMS)
188 MODULE_DEVICE_TABLE(pci, pciidlist);
189 #endif
190
191 static int i915_drm_freeze(struct drm_device *dev)
192 {
193         struct drm_i915_private *dev_priv = dev->dev_private;
194
195         pci_save_state(dev->pdev);
196
197         /* If KMS is active, we do the leavevt stuff here */
198         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
199                 int error = i915_gem_idle(dev);
200                 if (error) {
201                         dev_err(&dev->pdev->dev,
202                                 "GEM idle failed, resume might fail\n");
203                         return error;
204                 }
205                 drm_irq_uninstall(dev);
206         }
207
208         i915_save_state(dev);
209
210         intel_opregion_free(dev, 1);
211
212         /* Modeset on resume, not lid events */
213         dev_priv->modeset_on_lid = 0;
214
215         return 0;
216 }
217
218 static int i915_suspend(struct drm_device *dev, pm_message_t state)
219 {
220         int error;
221
222         if (!dev || !dev->dev_private) {
223                 DRM_ERROR("dev: %p\n", dev);
224                 DRM_ERROR("DRM not initialized, aborting suspend.\n");
225                 return -ENODEV;
226         }
227
228         if (state.event == PM_EVENT_PRETHAW)
229                 return 0;
230
231         error = i915_drm_freeze(dev);
232         if (error)
233                 return error;
234
235         if (state.event == PM_EVENT_SUSPEND) {
236                 /* Shut down the device */
237                 pci_disable_device(dev->pdev);
238                 pci_set_power_state(dev->pdev, PCI_D3hot);
239         }
240
241         return 0;
242 }
243
244 static int i915_drm_thaw(struct drm_device *dev)
245 {
246         struct drm_i915_private *dev_priv = dev->dev_private;
247         int error = 0;
248
249         i915_restore_state(dev);
250
251         intel_opregion_init(dev, 1);
252
253         /* KMS EnterVT equivalent */
254         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
255                 mutex_lock(&dev->struct_mutex);
256                 dev_priv->mm.suspended = 0;
257
258                 error = i915_gem_init_ringbuffer(dev);
259                 mutex_unlock(&dev->struct_mutex);
260
261                 drm_irq_install(dev);
262
263                 /* Resume the modeset for every activated CRTC */
264                 drm_helper_resume_force_mode(dev);
265         }
266
267         dev_priv->modeset_on_lid = 0;
268
269         return error;
270 }
271
272 static int i915_resume(struct drm_device *dev)
273 {
274         if (pci_enable_device(dev->pdev))
275                 return -EIO;
276
277         pci_set_master(dev->pdev);
278
279         return i915_drm_thaw(dev);
280 }
281
282 /**
283  * i965_reset - reset chip after a hang
284  * @dev: drm device to reset
285  * @flags: reset domains
286  *
287  * Reset the chip.  Useful if a hang is detected. Returns zero on successful
288  * reset or otherwise an error code.
289  *
290  * Procedure is fairly simple:
291  *   - reset the chip using the reset reg
292  *   - re-init context state
293  *   - re-init hardware status page
294  *   - re-init ring buffer
295  *   - re-init interrupt state
296  *   - re-init display
297  */
298 int i965_reset(struct drm_device *dev, u8 flags)
299 {
300         drm_i915_private_t *dev_priv = dev->dev_private;
301         unsigned long timeout;
302         u8 gdrst;
303         /*
304          * We really should only reset the display subsystem if we actually
305          * need to
306          */
307         bool need_display = true;
308
309         mutex_lock(&dev->struct_mutex);
310
311         /*
312          * Clear request list
313          */
314         i915_gem_retire_requests(dev);
315
316         if (need_display)
317                 i915_save_display(dev);
318
319         if (IS_I965G(dev) || IS_G4X(dev)) {
320                 /*
321                  * Set the domains we want to reset, then the reset bit (bit 0).
322                  * Clear the reset bit after a while and wait for hardware status
323                  * bit (bit 1) to be set
324                  */
325                 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
326                 pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
327                 udelay(50);
328                 pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
329
330                 /* ...we don't want to loop forever though, 500ms should be plenty */
331                timeout = jiffies + msecs_to_jiffies(500);
332                 do {
333                         udelay(100);
334                         pci_read_config_byte(dev->pdev, GDRST, &gdrst);
335                 } while ((gdrst & 0x1) && time_after(timeout, jiffies));
336
337                 if (gdrst & 0x1) {
338                         WARN(true, "i915: Failed to reset chip\n");
339                         mutex_unlock(&dev->struct_mutex);
340                         return -EIO;
341                 }
342         } else {
343                 DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
344                 return -ENODEV;
345         }
346
347         /* Ok, now get things going again... */
348
349         /*
350          * Everything depends on having the GTT running, so we need to start
351          * there.  Fortunately we don't need to do this unless we reset the
352          * chip at a PCI level.
353          *
354          * Next we need to restore the context, but we don't use those
355          * yet either...
356          *
357          * Ring buffer needs to be re-initialized in the KMS case, or if X
358          * was running at the time of the reset (i.e. we weren't VT
359          * switched away).
360          */
361         if (drm_core_check_feature(dev, DRIVER_MODESET) ||
362             !dev_priv->mm.suspended) {
363                 drm_i915_ring_buffer_t *ring = &dev_priv->ring;
364                 struct drm_gem_object *obj = ring->ring_obj;
365                 struct drm_i915_gem_object *obj_priv = obj->driver_private;
366                 dev_priv->mm.suspended = 0;
367
368                 /* Stop the ring if it's running. */
369                 I915_WRITE(PRB0_CTL, 0);
370                 I915_WRITE(PRB0_TAIL, 0);
371                 I915_WRITE(PRB0_HEAD, 0);
372
373                 /* Initialize the ring. */
374                 I915_WRITE(PRB0_START, obj_priv->gtt_offset);
375                 I915_WRITE(PRB0_CTL,
376                            ((obj->size - 4096) & RING_NR_PAGES) |
377                            RING_NO_REPORT |
378                            RING_VALID);
379                 if (!drm_core_check_feature(dev, DRIVER_MODESET))
380                         i915_kernel_lost_context(dev);
381                 else {
382                         ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
383                         ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
384                         ring->space = ring->head - (ring->tail + 8);
385                         if (ring->space < 0)
386                                 ring->space += ring->Size;
387                 }
388
389                 mutex_unlock(&dev->struct_mutex);
390                 drm_irq_uninstall(dev);
391                 drm_irq_install(dev);
392                 mutex_lock(&dev->struct_mutex);
393         }
394
395         /*
396          * Display needs restore too...
397          */
398         if (need_display)
399                 i915_restore_display(dev);
400
401         mutex_unlock(&dev->struct_mutex);
402         return 0;
403 }
404
405
406 static int __devinit
407 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
408 {
409         return drm_get_dev(pdev, ent, &driver);
410 }
411
412 static void
413 i915_pci_remove(struct pci_dev *pdev)
414 {
415         struct drm_device *dev = pci_get_drvdata(pdev);
416
417         drm_put_dev(dev);
418 }
419
420 static int i915_pm_suspend(struct device *dev)
421 {
422         struct pci_dev *pdev = to_pci_dev(dev);
423         struct drm_device *drm_dev = pci_get_drvdata(pdev);
424         int error;
425
426         if (!drm_dev || !drm_dev->dev_private) {
427                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
428                 return -ENODEV;
429         }
430
431         error = i915_drm_freeze(drm_dev);
432         if (error)
433                 return error;
434
435         pci_disable_device(pdev);
436         pci_set_power_state(pdev, PCI_D3hot);
437
438         return 0;
439 }
440
441 static int i915_pm_resume(struct device *dev)
442 {
443         struct pci_dev *pdev = to_pci_dev(dev);
444         struct drm_device *drm_dev = pci_get_drvdata(pdev);
445
446         return i915_resume(drm_dev);
447 }
448
449 static int i915_pm_freeze(struct device *dev)
450 {
451         struct pci_dev *pdev = to_pci_dev(dev);
452         struct drm_device *drm_dev = pci_get_drvdata(pdev);
453
454         if (!drm_dev || !drm_dev->dev_private) {
455                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
456                 return -ENODEV;
457         }
458
459         return i915_drm_freeze(drm_dev);
460 }
461
462 static int i915_pm_thaw(struct device *dev)
463 {
464         struct pci_dev *pdev = to_pci_dev(dev);
465         struct drm_device *drm_dev = pci_get_drvdata(pdev);
466
467         return i915_drm_thaw(drm_dev);
468 }
469
470 static int i915_pm_poweroff(struct device *dev)
471 {
472         struct pci_dev *pdev = to_pci_dev(dev);
473         struct drm_device *drm_dev = pci_get_drvdata(pdev);
474
475         return i915_drm_freeze(drm_dev);
476 }
477
478 const struct dev_pm_ops i915_pm_ops = {
479      .suspend = i915_pm_suspend,
480      .resume = i915_pm_resume,
481      .freeze = i915_pm_freeze,
482      .thaw = i915_pm_thaw,
483      .poweroff = i915_pm_poweroff,
484      .restore = i915_pm_resume,
485 };
486
487 static struct vm_operations_struct i915_gem_vm_ops = {
488         .fault = i915_gem_fault,
489         .open = drm_gem_vm_open,
490         .close = drm_gem_vm_close,
491 };
492
493 static struct drm_driver driver = {
494         /* don't use mtrr's here, the Xserver or user space app should
495          * deal with them for intel hardware.
496          */
497         .driver_features =
498             DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
499             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
500         .load = i915_driver_load,
501         .unload = i915_driver_unload,
502         .open = i915_driver_open,
503         .lastclose = i915_driver_lastclose,
504         .preclose = i915_driver_preclose,
505         .postclose = i915_driver_postclose,
506
507         /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
508         .suspend = i915_suspend,
509         .resume = i915_resume,
510
511         .device_is_agp = i915_driver_device_is_agp,
512         .enable_vblank = i915_enable_vblank,
513         .disable_vblank = i915_disable_vblank,
514         .irq_preinstall = i915_driver_irq_preinstall,
515         .irq_postinstall = i915_driver_irq_postinstall,
516         .irq_uninstall = i915_driver_irq_uninstall,
517         .irq_handler = i915_driver_irq_handler,
518         .reclaim_buffers = drm_core_reclaim_buffers,
519         .get_map_ofs = drm_core_get_map_ofs,
520         .get_reg_ofs = drm_core_get_reg_ofs,
521         .master_create = i915_master_create,
522         .master_destroy = i915_master_destroy,
523 #if defined(CONFIG_DEBUG_FS)
524         .debugfs_init = i915_debugfs_init,
525         .debugfs_cleanup = i915_debugfs_cleanup,
526 #endif
527         .gem_init_object = i915_gem_init_object,
528         .gem_free_object = i915_gem_free_object,
529         .gem_vm_ops = &i915_gem_vm_ops,
530         .ioctls = i915_ioctls,
531         .fops = {
532                  .owner = THIS_MODULE,
533                  .open = drm_open,
534                  .release = drm_release,
535                  .unlocked_ioctl = drm_ioctl,
536                  .mmap = drm_gem_mmap,
537                  .poll = drm_poll,
538                  .fasync = drm_fasync,
539                  .read = drm_read,
540 #ifdef CONFIG_COMPAT
541                  .compat_ioctl = i915_compat_ioctl,
542 #endif
543         },
544
545         .pci_driver = {
546                  .name = DRIVER_NAME,
547                  .id_table = pciidlist,
548                  .probe = i915_pci_probe,
549                  .remove = i915_pci_remove,
550                  .driver.pm = &i915_pm_ops,
551         },
552
553         .name = DRIVER_NAME,
554         .desc = DRIVER_DESC,
555         .date = DRIVER_DATE,
556         .major = DRIVER_MAJOR,
557         .minor = DRIVER_MINOR,
558         .patchlevel = DRIVER_PATCHLEVEL,
559 };
560
561 static int __init i915_init(void)
562 {
563         driver.num_ioctls = i915_max_ioctl;
564
565         i915_gem_shrinker_init();
566
567         /*
568          * If CONFIG_DRM_I915_KMS is set, default to KMS unless
569          * explicitly disabled with the module pararmeter.
570          *
571          * Otherwise, just follow the parameter (defaulting to off).
572          *
573          * Allow optional vga_text_mode_force boot option to override
574          * the default behavior.
575          */
576 #if defined(CONFIG_DRM_I915_KMS)
577         if (i915_modeset != 0)
578                 driver.driver_features |= DRIVER_MODESET;
579 #endif
580         if (i915_modeset == 1)
581                 driver.driver_features |= DRIVER_MODESET;
582
583 #ifdef CONFIG_VGA_CONSOLE
584         if (vgacon_text_force() && i915_modeset == -1)
585                 driver.driver_features &= ~DRIVER_MODESET;
586 #endif
587
588         if (!(driver.driver_features & DRIVER_MODESET)) {
589                 driver.suspend = i915_suspend;
590                 driver.resume = i915_resume;
591         }
592
593         return drm_init(&driver);
594 }
595
596 static void __exit i915_exit(void)
597 {
598         i915_gem_shrinker_exit();
599         drm_exit(&driver);
600 }
601
602 module_init(i915_init);
603 module_exit(i915_exit);
604
605 MODULE_AUTHOR(DRIVER_AUTHOR);
606 MODULE_DESCRIPTION(DRIVER_DESC);
607 MODULE_LICENSE("GPL and additional rights");