drm: kill BKL from common code
[linux-2.6.git] / drivers / gpu / drm / i830 / i830_dma.c
1 /* i830_dma.c -- DMA support for the I830 -*- linux-c -*-
2  * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3  *
4  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6  * All Rights Reserved.
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a
9  * copy of this software and associated documentation files (the "Software"),
10  * to deal in the Software without restriction, including without limitation
11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12  * and/or sell copies of the Software, and to permit persons to whom the
13  * Software is furnished to do so, subject to the following conditions:
14  *
15  * The above copyright notice and this permission notice (including the next
16  * paragraph) shall be included in all copies or substantial portions of the
17  * Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
22  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25  * DEALINGS IN THE SOFTWARE.
26  *
27  * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28  *          Jeff Hartmann <jhartmann@valinux.com>
29  *          Keith Whitwell <keith@tungstengraphics.com>
30  *          Abraham vd Merwe <abraham@2d3d.co.za>
31  *
32  */
33
34 #include "drmP.h"
35 #include "drm.h"
36 #include "i830_drm.h"
37 #include "i830_drv.h"
38 #include <linux/interrupt.h>    /* For task queue support */
39 #include <linux/smp_lock.h>
40 #include <linux/pagemap.h>
41 #include <linux/delay.h>
42 #include <linux/slab.h>
43 #include <asm/uaccess.h>
44
45 #define I830_BUF_FREE           2
46 #define I830_BUF_CLIENT         1
47 #define I830_BUF_HARDWARE       0
48
49 #define I830_BUF_UNMAPPED 0
50 #define I830_BUF_MAPPED   1
51
52 static struct drm_buf *i830_freelist_get(struct drm_device * dev)
53 {
54         struct drm_device_dma *dma = dev->dma;
55         int i;
56         int used;
57
58         /* Linear search might not be the best solution */
59
60         for (i = 0; i < dma->buf_count; i++) {
61                 struct drm_buf *buf = dma->buflist[i];
62                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
63                 /* In use is already a pointer */
64                 used = cmpxchg(buf_priv->in_use, I830_BUF_FREE,
65                                I830_BUF_CLIENT);
66                 if (used == I830_BUF_FREE)
67                         return buf;
68         }
69         return NULL;
70 }
71
72 /* This should only be called if the buffer is not sent to the hardware
73  * yet, the hardware updates in use for us once its on the ring buffer.
74  */
75
76 static int i830_freelist_put(struct drm_device *dev, struct drm_buf *buf)
77 {
78         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
79         int used;
80
81         /* In use is already a pointer */
82         used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, I830_BUF_FREE);
83         if (used != I830_BUF_CLIENT) {
84                 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
85                 return -EINVAL;
86         }
87
88         return 0;
89 }
90
91 static int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
92 {
93         struct drm_file *priv = filp->private_data;
94         struct drm_device *dev;
95         drm_i830_private_t *dev_priv;
96         struct drm_buf *buf;
97         drm_i830_buf_priv_t *buf_priv;
98
99         lock_kernel();
100         dev = priv->minor->dev;
101         dev_priv = dev->dev_private;
102         buf = dev_priv->mmap_buffer;
103         buf_priv = buf->dev_private;
104
105         vma->vm_flags |= (VM_IO | VM_DONTCOPY);
106         vma->vm_file = filp;
107
108         buf_priv->currently_mapped = I830_BUF_MAPPED;
109         unlock_kernel();
110
111         if (io_remap_pfn_range(vma, vma->vm_start,
112                                vma->vm_pgoff,
113                                vma->vm_end - vma->vm_start, vma->vm_page_prot))
114                 return -EAGAIN;
115         return 0;
116 }
117
118 static const struct file_operations i830_buffer_fops = {
119         .open = drm_open,
120         .release = drm_release,
121         .unlocked_ioctl = drm_ioctl,
122         .mmap = i830_mmap_buffers,
123         .fasync = drm_fasync,
124 };
125
126 static int i830_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
127 {
128         struct drm_device *dev = file_priv->minor->dev;
129         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
130         drm_i830_private_t *dev_priv = dev->dev_private;
131         const struct file_operations *old_fops;
132         unsigned long virtual;
133         int retcode = 0;
134
135         if (buf_priv->currently_mapped == I830_BUF_MAPPED)
136                 return -EINVAL;
137
138         down_write(&current->mm->mmap_sem);
139         old_fops = file_priv->filp->f_op;
140         file_priv->filp->f_op = &i830_buffer_fops;
141         dev_priv->mmap_buffer = buf;
142         virtual = do_mmap(file_priv->filp, 0, buf->total, PROT_READ | PROT_WRITE,
143                           MAP_SHARED, buf->bus_address);
144         dev_priv->mmap_buffer = NULL;
145         file_priv->filp->f_op = old_fops;
146         if (IS_ERR((void *)virtual)) {  /* ugh */
147                 /* Real error */
148                 DRM_ERROR("mmap error\n");
149                 retcode = PTR_ERR((void *)virtual);
150                 buf_priv->virtual = NULL;
151         } else {
152                 buf_priv->virtual = (void __user *)virtual;
153         }
154         up_write(&current->mm->mmap_sem);
155
156         return retcode;
157 }
158
159 static int i830_unmap_buffer(struct drm_buf *buf)
160 {
161         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
162         int retcode = 0;
163
164         if (buf_priv->currently_mapped != I830_BUF_MAPPED)
165                 return -EINVAL;
166
167         down_write(&current->mm->mmap_sem);
168         retcode = do_munmap(current->mm,
169                             (unsigned long)buf_priv->virtual,
170                             (size_t) buf->total);
171         up_write(&current->mm->mmap_sem);
172
173         buf_priv->currently_mapped = I830_BUF_UNMAPPED;
174         buf_priv->virtual = NULL;
175
176         return retcode;
177 }
178
179 static int i830_dma_get_buffer(struct drm_device *dev, drm_i830_dma_t *d,
180                                struct drm_file *file_priv)
181 {
182         struct drm_buf *buf;
183         drm_i830_buf_priv_t *buf_priv;
184         int retcode = 0;
185
186         buf = i830_freelist_get(dev);
187         if (!buf) {
188                 retcode = -ENOMEM;
189                 DRM_DEBUG("retcode=%d\n", retcode);
190                 return retcode;
191         }
192
193         retcode = i830_map_buffer(buf, file_priv);
194         if (retcode) {
195                 i830_freelist_put(dev, buf);
196                 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
197                 return retcode;
198         }
199         buf->file_priv = file_priv;
200         buf_priv = buf->dev_private;
201         d->granted = 1;
202         d->request_idx = buf->idx;
203         d->request_size = buf->total;
204         d->virtual = buf_priv->virtual;
205
206         return retcode;
207 }
208
209 static int i830_dma_cleanup(struct drm_device *dev)
210 {
211         struct drm_device_dma *dma = dev->dma;
212
213         /* Make sure interrupts are disabled here because the uninstall ioctl
214          * may not have been called from userspace and after dev_private
215          * is freed, it's too late.
216          */
217         if (dev->irq_enabled)
218                 drm_irq_uninstall(dev);
219
220         if (dev->dev_private) {
221                 int i;
222                 drm_i830_private_t *dev_priv =
223                     (drm_i830_private_t *) dev->dev_private;
224
225                 if (dev_priv->ring.virtual_start)
226                         drm_core_ioremapfree(&dev_priv->ring.map, dev);
227                 if (dev_priv->hw_status_page) {
228                         pci_free_consistent(dev->pdev, PAGE_SIZE,
229                                             dev_priv->hw_status_page,
230                                             dev_priv->dma_status_page);
231                         /* Need to rewrite hardware status page */
232                         I830_WRITE(0x02080, 0x1ffff000);
233                 }
234
235                 kfree(dev->dev_private);
236                 dev->dev_private = NULL;
237
238                 for (i = 0; i < dma->buf_count; i++) {
239                         struct drm_buf *buf = dma->buflist[i];
240                         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
241                         if (buf_priv->kernel_virtual && buf->total)
242                                 drm_core_ioremapfree(&buf_priv->map, dev);
243                 }
244         }
245         return 0;
246 }
247
248 int i830_wait_ring(struct drm_device *dev, int n, const char *caller)
249 {
250         drm_i830_private_t *dev_priv = dev->dev_private;
251         drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
252         int iters = 0;
253         unsigned long end;
254         unsigned int last_head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
255
256         end = jiffies + (HZ * 3);
257         while (ring->space < n) {
258                 ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
259                 ring->space = ring->head - (ring->tail + 8);
260                 if (ring->space < 0)
261                         ring->space += ring->Size;
262
263                 if (ring->head != last_head) {
264                         end = jiffies + (HZ * 3);
265                         last_head = ring->head;
266                 }
267
268                 iters++;
269                 if (time_before(end, jiffies)) {
270                         DRM_ERROR("space: %d wanted %d\n", ring->space, n);
271                         DRM_ERROR("lockup\n");
272                         goto out_wait_ring;
273                 }
274                 udelay(1);
275                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
276         }
277
278 out_wait_ring:
279         return iters;
280 }
281
282 static void i830_kernel_lost_context(struct drm_device *dev)
283 {
284         drm_i830_private_t *dev_priv = dev->dev_private;
285         drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
286
287         ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
288         ring->tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
289         ring->space = ring->head - (ring->tail + 8);
290         if (ring->space < 0)
291                 ring->space += ring->Size;
292
293         if (ring->head == ring->tail)
294                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY;
295 }
296
297 static int i830_freelist_init(struct drm_device *dev, drm_i830_private_t *dev_priv)
298 {
299         struct drm_device_dma *dma = dev->dma;
300         int my_idx = 36;
301         u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
302         int i;
303
304         if (dma->buf_count > 1019) {
305                 /* Not enough space in the status page for the freelist */
306                 return -EINVAL;
307         }
308
309         for (i = 0; i < dma->buf_count; i++) {
310                 struct drm_buf *buf = dma->buflist[i];
311                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
312
313                 buf_priv->in_use = hw_status++;
314                 buf_priv->my_use_idx = my_idx;
315                 my_idx += 4;
316
317                 *buf_priv->in_use = I830_BUF_FREE;
318
319                 buf_priv->map.offset = buf->bus_address;
320                 buf_priv->map.size = buf->total;
321                 buf_priv->map.type = _DRM_AGP;
322                 buf_priv->map.flags = 0;
323                 buf_priv->map.mtrr = 0;
324
325                 drm_core_ioremap(&buf_priv->map, dev);
326                 buf_priv->kernel_virtual = buf_priv->map.handle;
327         }
328         return 0;
329 }
330
331 static int i830_dma_initialize(struct drm_device *dev,
332                                drm_i830_private_t *dev_priv,
333                                drm_i830_init_t *init)
334 {
335         struct drm_map_list *r_list;
336
337         memset(dev_priv, 0, sizeof(drm_i830_private_t));
338
339         list_for_each_entry(r_list, &dev->maplist, head) {
340                 if (r_list->map &&
341                     r_list->map->type == _DRM_SHM &&
342                     r_list->map->flags & _DRM_CONTAINS_LOCK) {
343                         dev_priv->sarea_map = r_list->map;
344                         break;
345                 }
346         }
347
348         if (!dev_priv->sarea_map) {
349                 dev->dev_private = (void *)dev_priv;
350                 i830_dma_cleanup(dev);
351                 DRM_ERROR("can not find sarea!\n");
352                 return -EINVAL;
353         }
354         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
355         if (!dev_priv->mmio_map) {
356                 dev->dev_private = (void *)dev_priv;
357                 i830_dma_cleanup(dev);
358                 DRM_ERROR("can not find mmio map!\n");
359                 return -EINVAL;
360         }
361         dev->agp_buffer_token = init->buffers_offset;
362         dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
363         if (!dev->agp_buffer_map) {
364                 dev->dev_private = (void *)dev_priv;
365                 i830_dma_cleanup(dev);
366                 DRM_ERROR("can not find dma buffer map!\n");
367                 return -EINVAL;
368         }
369
370         dev_priv->sarea_priv = (drm_i830_sarea_t *)
371             ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
372
373         dev_priv->ring.Start = init->ring_start;
374         dev_priv->ring.End = init->ring_end;
375         dev_priv->ring.Size = init->ring_size;
376
377         dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
378         dev_priv->ring.map.size = init->ring_size;
379         dev_priv->ring.map.type = _DRM_AGP;
380         dev_priv->ring.map.flags = 0;
381         dev_priv->ring.map.mtrr = 0;
382
383         drm_core_ioremap(&dev_priv->ring.map, dev);
384
385         if (dev_priv->ring.map.handle == NULL) {
386                 dev->dev_private = (void *)dev_priv;
387                 i830_dma_cleanup(dev);
388                 DRM_ERROR("can not ioremap virtual address for"
389                           " ring buffer\n");
390                 return -ENOMEM;
391         }
392
393         dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
394
395         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
396
397         dev_priv->w = init->w;
398         dev_priv->h = init->h;
399         dev_priv->pitch = init->pitch;
400         dev_priv->back_offset = init->back_offset;
401         dev_priv->depth_offset = init->depth_offset;
402         dev_priv->front_offset = init->front_offset;
403
404         dev_priv->front_di1 = init->front_offset | init->pitch_bits;
405         dev_priv->back_di1 = init->back_offset | init->pitch_bits;
406         dev_priv->zi1 = init->depth_offset | init->pitch_bits;
407
408         DRM_DEBUG("front_di1 %x\n", dev_priv->front_di1);
409         DRM_DEBUG("back_offset %x\n", dev_priv->back_offset);
410         DRM_DEBUG("back_di1 %x\n", dev_priv->back_di1);
411         DRM_DEBUG("pitch_bits %x\n", init->pitch_bits);
412
413         dev_priv->cpp = init->cpp;
414         /* We are using separate values as placeholders for mechanisms for
415          * private backbuffer/depthbuffer usage.
416          */
417
418         dev_priv->back_pitch = init->back_pitch;
419         dev_priv->depth_pitch = init->depth_pitch;
420         dev_priv->do_boxes = 0;
421         dev_priv->use_mi_batchbuffer_start = 0;
422
423         /* Program Hardware Status Page */
424         dev_priv->hw_status_page =
425             pci_alloc_consistent(dev->pdev, PAGE_SIZE,
426                                  &dev_priv->dma_status_page);
427         if (!dev_priv->hw_status_page) {
428                 dev->dev_private = (void *)dev_priv;
429                 i830_dma_cleanup(dev);
430                 DRM_ERROR("Can not allocate hardware status page\n");
431                 return -ENOMEM;
432         }
433         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
434         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
435
436         I830_WRITE(0x02080, dev_priv->dma_status_page);
437         DRM_DEBUG("Enabled hardware status page\n");
438
439         /* Now we need to init our freelist */
440         if (i830_freelist_init(dev, dev_priv) != 0) {
441                 dev->dev_private = (void *)dev_priv;
442                 i830_dma_cleanup(dev);
443                 DRM_ERROR("Not enough space in the status page for"
444                           " the freelist\n");
445                 return -ENOMEM;
446         }
447         dev->dev_private = (void *)dev_priv;
448
449         return 0;
450 }
451
452 static int i830_dma_init(struct drm_device *dev, void *data,
453                          struct drm_file *file_priv)
454 {
455         drm_i830_private_t *dev_priv;
456         drm_i830_init_t *init = data;
457         int retcode = 0;
458
459         switch (init->func) {
460         case I830_INIT_DMA:
461                 dev_priv = kmalloc(sizeof(drm_i830_private_t), GFP_KERNEL);
462                 if (dev_priv == NULL)
463                         return -ENOMEM;
464                 retcode = i830_dma_initialize(dev, dev_priv, init);
465                 break;
466         case I830_CLEANUP_DMA:
467                 retcode = i830_dma_cleanup(dev);
468                 break;
469         default:
470                 retcode = -EINVAL;
471                 break;
472         }
473
474         return retcode;
475 }
476
477 #define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
478 #define ST1_ENABLE               (1<<16)
479 #define ST1_MASK                 (0xffff)
480
481 /* Most efficient way to verify state for the i830 is as it is
482  * emitted.  Non-conformant state is silently dropped.
483  */
484 static void i830EmitContextVerified(struct drm_device *dev, unsigned int *code)
485 {
486         drm_i830_private_t *dev_priv = dev->dev_private;
487         int i, j = 0;
488         unsigned int tmp;
489         RING_LOCALS;
490
491         BEGIN_LP_RING(I830_CTX_SETUP_SIZE + 4);
492
493         for (i = 0; i < I830_CTXREG_BLENDCOLR0; i++) {
494                 tmp = code[i];
495                 if ((tmp & (7 << 29)) == CMD_3D &&
496                     (tmp & (0x1f << 24)) < (0x1d << 24)) {
497                         OUT_RING(tmp);
498                         j++;
499                 } else {
500                         DRM_ERROR("Skipping %d\n", i);
501                 }
502         }
503
504         OUT_RING(STATE3D_CONST_BLEND_COLOR_CMD);
505         OUT_RING(code[I830_CTXREG_BLENDCOLR]);
506         j += 2;
507
508         for (i = I830_CTXREG_VF; i < I830_CTXREG_MCSB0; i++) {
509                 tmp = code[i];
510                 if ((tmp & (7 << 29)) == CMD_3D &&
511                     (tmp & (0x1f << 24)) < (0x1d << 24)) {
512                         OUT_RING(tmp);
513                         j++;
514                 } else {
515                         DRM_ERROR("Skipping %d\n", i);
516                 }
517         }
518
519         OUT_RING(STATE3D_MAP_COORD_SETBIND_CMD);
520         OUT_RING(code[I830_CTXREG_MCSB1]);
521         j += 2;
522
523         if (j & 1)
524                 OUT_RING(0);
525
526         ADVANCE_LP_RING();
527 }
528
529 static void i830EmitTexVerified(struct drm_device *dev, unsigned int *code)
530 {
531         drm_i830_private_t *dev_priv = dev->dev_private;
532         int i, j = 0;
533         unsigned int tmp;
534         RING_LOCALS;
535
536         if (code[I830_TEXREG_MI0] == GFX_OP_MAP_INFO ||
537             (code[I830_TEXREG_MI0] & ~(0xf * LOAD_TEXTURE_MAP0)) ==
538             (STATE3D_LOAD_STATE_IMMEDIATE_2 | 4)) {
539
540                 BEGIN_LP_RING(I830_TEX_SETUP_SIZE);
541
542                 OUT_RING(code[I830_TEXREG_MI0]);        /* TM0LI */
543                 OUT_RING(code[I830_TEXREG_MI1]);        /* TM0S0 */
544                 OUT_RING(code[I830_TEXREG_MI2]);        /* TM0S1 */
545                 OUT_RING(code[I830_TEXREG_MI3]);        /* TM0S2 */
546                 OUT_RING(code[I830_TEXREG_MI4]);        /* TM0S3 */
547                 OUT_RING(code[I830_TEXREG_MI5]);        /* TM0S4 */
548
549                 for (i = 6; i < I830_TEX_SETUP_SIZE; i++) {
550                         tmp = code[i];
551                         OUT_RING(tmp);
552                         j++;
553                 }
554
555                 if (j & 1)
556                         OUT_RING(0);
557
558                 ADVANCE_LP_RING();
559         } else
560                 printk("rejected packet %x\n", code[0]);
561 }
562
563 static void i830EmitTexBlendVerified(struct drm_device *dev,
564                                      unsigned int *code, unsigned int num)
565 {
566         drm_i830_private_t *dev_priv = dev->dev_private;
567         int i, j = 0;
568         unsigned int tmp;
569         RING_LOCALS;
570
571         if (!num)
572                 return;
573
574         BEGIN_LP_RING(num + 1);
575
576         for (i = 0; i < num; i++) {
577                 tmp = code[i];
578                 OUT_RING(tmp);
579                 j++;
580         }
581
582         if (j & 1)
583                 OUT_RING(0);
584
585         ADVANCE_LP_RING();
586 }
587
588 static void i830EmitTexPalette(struct drm_device *dev,
589                                unsigned int *palette, int number, int is_shared)
590 {
591         drm_i830_private_t *dev_priv = dev->dev_private;
592         int i;
593         RING_LOCALS;
594
595         return;
596
597         BEGIN_LP_RING(258);
598
599         if (is_shared == 1) {
600                 OUT_RING(CMD_OP_MAP_PALETTE_LOAD |
601                          MAP_PALETTE_NUM(0) | MAP_PALETTE_BOTH);
602         } else {
603                 OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number));
604         }
605         for (i = 0; i < 256; i++)
606                 OUT_RING(palette[i]);
607         OUT_RING(0);
608         /* KW:  WHERE IS THE ADVANCE_LP_RING?  This is effectively a noop!
609          */
610 }
611
612 /* Need to do some additional checking when setting the dest buffer.
613  */
614 static void i830EmitDestVerified(struct drm_device *dev, unsigned int *code)
615 {
616         drm_i830_private_t *dev_priv = dev->dev_private;
617         unsigned int tmp;
618         RING_LOCALS;
619
620         BEGIN_LP_RING(I830_DEST_SETUP_SIZE + 10);
621
622         tmp = code[I830_DESTREG_CBUFADDR];
623         if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
624                 if (((int)outring) & 8) {
625                         OUT_RING(0);
626                         OUT_RING(0);
627                 }
628
629                 OUT_RING(CMD_OP_DESTBUFFER_INFO);
630                 OUT_RING(BUF_3D_ID_COLOR_BACK |
631                          BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) |
632                          BUF_3D_USE_FENCE);
633                 OUT_RING(tmp);
634                 OUT_RING(0);
635
636                 OUT_RING(CMD_OP_DESTBUFFER_INFO);
637                 OUT_RING(BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE |
638                          BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp));
639                 OUT_RING(dev_priv->zi1);
640                 OUT_RING(0);
641         } else {
642                 DRM_ERROR("bad di1 %x (allow %x or %x)\n",
643                           tmp, dev_priv->front_di1, dev_priv->back_di1);
644         }
645
646         /* invarient:
647          */
648
649         OUT_RING(GFX_OP_DESTBUFFER_VARS);
650         OUT_RING(code[I830_DESTREG_DV1]);
651
652         OUT_RING(GFX_OP_DRAWRECT_INFO);
653         OUT_RING(code[I830_DESTREG_DR1]);
654         OUT_RING(code[I830_DESTREG_DR2]);
655         OUT_RING(code[I830_DESTREG_DR3]);
656         OUT_RING(code[I830_DESTREG_DR4]);
657
658         /* Need to verify this */
659         tmp = code[I830_DESTREG_SENABLE];
660         if ((tmp & ~0x3) == GFX_OP_SCISSOR_ENABLE) {
661                 OUT_RING(tmp);
662         } else {
663                 DRM_ERROR("bad scissor enable\n");
664                 OUT_RING(0);
665         }
666
667         OUT_RING(GFX_OP_SCISSOR_RECT);
668         OUT_RING(code[I830_DESTREG_SR1]);
669         OUT_RING(code[I830_DESTREG_SR2]);
670         OUT_RING(0);
671
672         ADVANCE_LP_RING();
673 }
674
675 static void i830EmitStippleVerified(struct drm_device *dev, unsigned int *code)
676 {
677         drm_i830_private_t *dev_priv = dev->dev_private;
678         RING_LOCALS;
679
680         BEGIN_LP_RING(2);
681         OUT_RING(GFX_OP_STIPPLE);
682         OUT_RING(code[1]);
683         ADVANCE_LP_RING();
684 }
685
686 static void i830EmitState(struct drm_device *dev)
687 {
688         drm_i830_private_t *dev_priv = dev->dev_private;
689         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
690         unsigned int dirty = sarea_priv->dirty;
691
692         DRM_DEBUG("%s %x\n", __func__, dirty);
693
694         if (dirty & I830_UPLOAD_BUFFERS) {
695                 i830EmitDestVerified(dev, sarea_priv->BufferState);
696                 sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS;
697         }
698
699         if (dirty & I830_UPLOAD_CTX) {
700                 i830EmitContextVerified(dev, sarea_priv->ContextState);
701                 sarea_priv->dirty &= ~I830_UPLOAD_CTX;
702         }
703
704         if (dirty & I830_UPLOAD_TEX0) {
705                 i830EmitTexVerified(dev, sarea_priv->TexState[0]);
706                 sarea_priv->dirty &= ~I830_UPLOAD_TEX0;
707         }
708
709         if (dirty & I830_UPLOAD_TEX1) {
710                 i830EmitTexVerified(dev, sarea_priv->TexState[1]);
711                 sarea_priv->dirty &= ~I830_UPLOAD_TEX1;
712         }
713
714         if (dirty & I830_UPLOAD_TEXBLEND0) {
715                 i830EmitTexBlendVerified(dev, sarea_priv->TexBlendState[0],
716                                          sarea_priv->TexBlendStateWordsUsed[0]);
717                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND0;
718         }
719
720         if (dirty & I830_UPLOAD_TEXBLEND1) {
721                 i830EmitTexBlendVerified(dev, sarea_priv->TexBlendState[1],
722                                          sarea_priv->TexBlendStateWordsUsed[1]);
723                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND1;
724         }
725
726         if (dirty & I830_UPLOAD_TEX_PALETTE_SHARED) {
727                 i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1);
728         } else {
729                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) {
730                         i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0);
731                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0);
732                 }
733                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) {
734                         i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0);
735                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1);
736                 }
737
738                 /* 1.3:
739                  */
740 #if 0
741                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(2)) {
742                         i830EmitTexPalette(dev, sarea_priv->Palette2[0], 0, 0);
743                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
744                 }
745                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(3)) {
746                         i830EmitTexPalette(dev, sarea_priv->Palette2[1], 1, 0);
747                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
748                 }
749 #endif
750         }
751
752         /* 1.3:
753          */
754         if (dirty & I830_UPLOAD_STIPPLE) {
755                 i830EmitStippleVerified(dev, sarea_priv->StippleState);
756                 sarea_priv->dirty &= ~I830_UPLOAD_STIPPLE;
757         }
758
759         if (dirty & I830_UPLOAD_TEX2) {
760                 i830EmitTexVerified(dev, sarea_priv->TexState2);
761                 sarea_priv->dirty &= ~I830_UPLOAD_TEX2;
762         }
763
764         if (dirty & I830_UPLOAD_TEX3) {
765                 i830EmitTexVerified(dev, sarea_priv->TexState3);
766                 sarea_priv->dirty &= ~I830_UPLOAD_TEX3;
767         }
768
769         if (dirty & I830_UPLOAD_TEXBLEND2) {
770                 i830EmitTexBlendVerified(dev,
771                                          sarea_priv->TexBlendState2,
772                                          sarea_priv->TexBlendStateWordsUsed2);
773
774                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND2;
775         }
776
777         if (dirty & I830_UPLOAD_TEXBLEND3) {
778                 i830EmitTexBlendVerified(dev,
779                                          sarea_priv->TexBlendState3,
780                                          sarea_priv->TexBlendStateWordsUsed3);
781                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND3;
782         }
783 }
784
785 /* ================================================================
786  * Performance monitoring functions
787  */
788
789 static void i830_fill_box(struct drm_device *dev,
790                           int x, int y, int w, int h, int r, int g, int b)
791 {
792         drm_i830_private_t *dev_priv = dev->dev_private;
793         u32 color;
794         unsigned int BR13, CMD;
795         RING_LOCALS;
796
797         BR13 = (0xF0 << 16) | (dev_priv->pitch * dev_priv->cpp) | (1 << 24);
798         CMD = XY_COLOR_BLT_CMD;
799         x += dev_priv->sarea_priv->boxes[0].x1;
800         y += dev_priv->sarea_priv->boxes[0].y1;
801
802         if (dev_priv->cpp == 4) {
803                 BR13 |= (1 << 25);
804                 CMD |= (XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB);
805                 color = (((0xff) << 24) | (r << 16) | (g << 8) | b);
806         } else {
807                 color = (((r & 0xf8) << 8) |
808                          ((g & 0xfc) << 3) | ((b & 0xf8) >> 3));
809         }
810
811         BEGIN_LP_RING(6);
812         OUT_RING(CMD);
813         OUT_RING(BR13);
814         OUT_RING((y << 16) | x);
815         OUT_RING(((y + h) << 16) | (x + w));
816
817         if (dev_priv->current_page == 1)
818                 OUT_RING(dev_priv->front_offset);
819         else
820                 OUT_RING(dev_priv->back_offset);
821
822         OUT_RING(color);
823         ADVANCE_LP_RING();
824 }
825
826 static void i830_cp_performance_boxes(struct drm_device *dev)
827 {
828         drm_i830_private_t *dev_priv = dev->dev_private;
829
830         /* Purple box for page flipping
831          */
832         if (dev_priv->sarea_priv->perf_boxes & I830_BOX_FLIP)
833                 i830_fill_box(dev, 4, 4, 8, 8, 255, 0, 255);
834
835         /* Red box if we have to wait for idle at any point
836          */
837         if (dev_priv->sarea_priv->perf_boxes & I830_BOX_WAIT)
838                 i830_fill_box(dev, 16, 4, 8, 8, 255, 0, 0);
839
840         /* Blue box: lost context?
841          */
842         if (dev_priv->sarea_priv->perf_boxes & I830_BOX_LOST_CONTEXT)
843                 i830_fill_box(dev, 28, 4, 8, 8, 0, 0, 255);
844
845         /* Yellow box for texture swaps
846          */
847         if (dev_priv->sarea_priv->perf_boxes & I830_BOX_TEXTURE_LOAD)
848                 i830_fill_box(dev, 40, 4, 8, 8, 255, 255, 0);
849
850         /* Green box if hardware never idles (as far as we can tell)
851          */
852         if (!(dev_priv->sarea_priv->perf_boxes & I830_BOX_RING_EMPTY))
853                 i830_fill_box(dev, 64, 4, 8, 8, 0, 255, 0);
854
855         /* Draw bars indicating number of buffers allocated
856          * (not a great measure, easily confused)
857          */
858         if (dev_priv->dma_used) {
859                 int bar = dev_priv->dma_used / 10240;
860                 if (bar > 100)
861                         bar = 100;
862                 if (bar < 1)
863                         bar = 1;
864                 i830_fill_box(dev, 4, 16, bar, 4, 196, 128, 128);
865                 dev_priv->dma_used = 0;
866         }
867
868         dev_priv->sarea_priv->perf_boxes = 0;
869 }
870
871 static void i830_dma_dispatch_clear(struct drm_device *dev, int flags,
872                                     unsigned int clear_color,
873                                     unsigned int clear_zval,
874                                     unsigned int clear_depthmask)
875 {
876         drm_i830_private_t *dev_priv = dev->dev_private;
877         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
878         int nbox = sarea_priv->nbox;
879         struct drm_clip_rect *pbox = sarea_priv->boxes;
880         int pitch = dev_priv->pitch;
881         int cpp = dev_priv->cpp;
882         int i;
883         unsigned int BR13, CMD, D_CMD;
884         RING_LOCALS;
885
886         if (dev_priv->current_page == 1) {
887                 unsigned int tmp = flags;
888
889                 flags &= ~(I830_FRONT | I830_BACK);
890                 if (tmp & I830_FRONT)
891                         flags |= I830_BACK;
892                 if (tmp & I830_BACK)
893                         flags |= I830_FRONT;
894         }
895
896         i830_kernel_lost_context(dev);
897
898         switch (cpp) {
899         case 2:
900                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24);
901                 D_CMD = CMD = XY_COLOR_BLT_CMD;
902                 break;
903         case 4:
904                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24) | (1 << 25);
905                 CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA |
906                        XY_COLOR_BLT_WRITE_RGB);
907                 D_CMD = XY_COLOR_BLT_CMD;
908                 if (clear_depthmask & 0x00ffffff)
909                         D_CMD |= XY_COLOR_BLT_WRITE_RGB;
910                 if (clear_depthmask & 0xff000000)
911                         D_CMD |= XY_COLOR_BLT_WRITE_ALPHA;
912                 break;
913         default:
914                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24);
915                 D_CMD = CMD = XY_COLOR_BLT_CMD;
916                 break;
917         }
918
919         if (nbox > I830_NR_SAREA_CLIPRECTS)
920                 nbox = I830_NR_SAREA_CLIPRECTS;
921
922         for (i = 0; i < nbox; i++, pbox++) {
923                 if (pbox->x1 > pbox->x2 ||
924                     pbox->y1 > pbox->y2 ||
925                     pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
926                         continue;
927
928                 if (flags & I830_FRONT) {
929                         DRM_DEBUG("clear front\n");
930                         BEGIN_LP_RING(6);
931                         OUT_RING(CMD);
932                         OUT_RING(BR13);
933                         OUT_RING((pbox->y1 << 16) | pbox->x1);
934                         OUT_RING((pbox->y2 << 16) | pbox->x2);
935                         OUT_RING(dev_priv->front_offset);
936                         OUT_RING(clear_color);
937                         ADVANCE_LP_RING();
938                 }
939
940                 if (flags & I830_BACK) {
941                         DRM_DEBUG("clear back\n");
942                         BEGIN_LP_RING(6);
943                         OUT_RING(CMD);
944                         OUT_RING(BR13);
945                         OUT_RING((pbox->y1 << 16) | pbox->x1);
946                         OUT_RING((pbox->y2 << 16) | pbox->x2);
947                         OUT_RING(dev_priv->back_offset);
948                         OUT_RING(clear_color);
949                         ADVANCE_LP_RING();
950                 }
951
952                 if (flags & I830_DEPTH) {
953                         DRM_DEBUG("clear depth\n");
954                         BEGIN_LP_RING(6);
955                         OUT_RING(D_CMD);
956                         OUT_RING(BR13);
957                         OUT_RING((pbox->y1 << 16) | pbox->x1);
958                         OUT_RING((pbox->y2 << 16) | pbox->x2);
959                         OUT_RING(dev_priv->depth_offset);
960                         OUT_RING(clear_zval);
961                         ADVANCE_LP_RING();
962                 }
963         }
964 }
965
966 static void i830_dma_dispatch_swap(struct drm_device *dev)
967 {
968         drm_i830_private_t *dev_priv = dev->dev_private;
969         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
970         int nbox = sarea_priv->nbox;
971         struct drm_clip_rect *pbox = sarea_priv->boxes;
972         int pitch = dev_priv->pitch;
973         int cpp = dev_priv->cpp;
974         int i;
975         unsigned int CMD, BR13;
976         RING_LOCALS;
977
978         DRM_DEBUG("swapbuffers\n");
979
980         i830_kernel_lost_context(dev);
981
982         if (dev_priv->do_boxes)
983                 i830_cp_performance_boxes(dev);
984
985         switch (cpp) {
986         case 2:
987                 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24);
988                 CMD = XY_SRC_COPY_BLT_CMD;
989                 break;
990         case 4:
991                 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24) | (1 << 25);
992                 CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
993                        XY_SRC_COPY_BLT_WRITE_RGB);
994                 break;
995         default:
996                 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24);
997                 CMD = XY_SRC_COPY_BLT_CMD;
998                 break;
999         }
1000
1001         if (nbox > I830_NR_SAREA_CLIPRECTS)
1002                 nbox = I830_NR_SAREA_CLIPRECTS;
1003
1004         for (i = 0; i < nbox; i++, pbox++) {
1005                 if (pbox->x1 > pbox->x2 ||
1006                     pbox->y1 > pbox->y2 ||
1007                     pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1008                         continue;
1009
1010                 DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
1011                           pbox->x1, pbox->y1, pbox->x2, pbox->y2);
1012
1013                 BEGIN_LP_RING(8);
1014                 OUT_RING(CMD);
1015                 OUT_RING(BR13);
1016                 OUT_RING((pbox->y1 << 16) | pbox->x1);
1017                 OUT_RING((pbox->y2 << 16) | pbox->x2);
1018
1019                 if (dev_priv->current_page == 0)
1020                         OUT_RING(dev_priv->front_offset);
1021                 else
1022                         OUT_RING(dev_priv->back_offset);
1023
1024                 OUT_RING((pbox->y1 << 16) | pbox->x1);
1025                 OUT_RING(BR13 & 0xffff);
1026
1027                 if (dev_priv->current_page == 0)
1028                         OUT_RING(dev_priv->back_offset);
1029                 else
1030                         OUT_RING(dev_priv->front_offset);
1031
1032                 ADVANCE_LP_RING();
1033         }
1034 }
1035
1036 static void i830_dma_dispatch_flip(struct drm_device *dev)
1037 {
1038         drm_i830_private_t *dev_priv = dev->dev_private;
1039         RING_LOCALS;
1040
1041         DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
1042                   __func__,
1043                   dev_priv->current_page,
1044                   dev_priv->sarea_priv->pf_current_page);
1045
1046         i830_kernel_lost_context(dev);
1047
1048         if (dev_priv->do_boxes) {
1049                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_FLIP;
1050                 i830_cp_performance_boxes(dev);
1051         }
1052
1053         BEGIN_LP_RING(2);
1054         OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
1055         OUT_RING(0);
1056         ADVANCE_LP_RING();
1057
1058         BEGIN_LP_RING(6);
1059         OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
1060         OUT_RING(0);
1061         if (dev_priv->current_page == 0) {
1062                 OUT_RING(dev_priv->back_offset);
1063                 dev_priv->current_page = 1;
1064         } else {
1065                 OUT_RING(dev_priv->front_offset);
1066                 dev_priv->current_page = 0;
1067         }
1068         OUT_RING(0);
1069         ADVANCE_LP_RING();
1070
1071         BEGIN_LP_RING(2);
1072         OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
1073         OUT_RING(0);
1074         ADVANCE_LP_RING();
1075
1076         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1077 }
1078
1079 static void i830_dma_dispatch_vertex(struct drm_device *dev,
1080                                      struct drm_buf *buf, int discard, int used)
1081 {
1082         drm_i830_private_t *dev_priv = dev->dev_private;
1083         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1084         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
1085         struct drm_clip_rect *box = sarea_priv->boxes;
1086         int nbox = sarea_priv->nbox;
1087         unsigned long address = (unsigned long)buf->bus_address;
1088         unsigned long start = address - dev->agp->base;
1089         int i = 0, u;
1090         RING_LOCALS;
1091
1092         i830_kernel_lost_context(dev);
1093
1094         if (nbox > I830_NR_SAREA_CLIPRECTS)
1095                 nbox = I830_NR_SAREA_CLIPRECTS;
1096
1097         if (discard) {
1098                 u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1099                             I830_BUF_HARDWARE);
1100                 if (u != I830_BUF_CLIENT)
1101                         DRM_DEBUG("xxxx 2\n");
1102         }
1103
1104         if (used > 4 * 1023)
1105                 used = 0;
1106
1107         if (sarea_priv->dirty)
1108                 i830EmitState(dev);
1109
1110         DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
1111                   address, used, nbox);
1112
1113         dev_priv->counter++;
1114         DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1115         DRM_DEBUG("i830_dma_dispatch\n");
1116         DRM_DEBUG("start : %lx\n", start);
1117         DRM_DEBUG("used : %d\n", used);
1118         DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1119
1120         if (buf_priv->currently_mapped == I830_BUF_MAPPED) {
1121                 u32 *vp = buf_priv->kernel_virtual;
1122
1123                 vp[0] = (GFX_OP_PRIMITIVE |
1124                          sarea_priv->vertex_prim | ((used / 4) - 2));
1125
1126                 if (dev_priv->use_mi_batchbuffer_start) {
1127                         vp[used / 4] = MI_BATCH_BUFFER_END;
1128                         used += 4;
1129                 }
1130
1131                 if (used & 4) {
1132                         vp[used / 4] = 0;
1133                         used += 4;
1134                 }
1135
1136                 i830_unmap_buffer(buf);
1137         }
1138
1139         if (used) {
1140                 do {
1141                         if (i < nbox) {
1142                                 BEGIN_LP_RING(6);
1143                                 OUT_RING(GFX_OP_DRAWRECT_INFO);
1144                                 OUT_RING(sarea_priv->
1145                                          BufferState[I830_DESTREG_DR1]);
1146                                 OUT_RING(box[i].x1 | (box[i].y1 << 16));
1147                                 OUT_RING(box[i].x2 | (box[i].y2 << 16));
1148                                 OUT_RING(sarea_priv->
1149                                          BufferState[I830_DESTREG_DR4]);
1150                                 OUT_RING(0);
1151                                 ADVANCE_LP_RING();
1152                         }
1153
1154                         if (dev_priv->use_mi_batchbuffer_start) {
1155                                 BEGIN_LP_RING(2);
1156                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
1157                                 OUT_RING(start | MI_BATCH_NON_SECURE);
1158                                 ADVANCE_LP_RING();
1159                         } else {
1160                                 BEGIN_LP_RING(4);
1161                                 OUT_RING(MI_BATCH_BUFFER);
1162                                 OUT_RING(start | MI_BATCH_NON_SECURE);
1163                                 OUT_RING(start + used - 4);
1164                                 OUT_RING(0);
1165                                 ADVANCE_LP_RING();
1166                         }
1167
1168                 } while (++i < nbox);
1169         }
1170
1171         if (discard) {
1172                 dev_priv->counter++;
1173
1174                 (void)cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1175                               I830_BUF_HARDWARE);
1176
1177                 BEGIN_LP_RING(8);
1178                 OUT_RING(CMD_STORE_DWORD_IDX);
1179                 OUT_RING(20);
1180                 OUT_RING(dev_priv->counter);
1181                 OUT_RING(CMD_STORE_DWORD_IDX);
1182                 OUT_RING(buf_priv->my_use_idx);
1183                 OUT_RING(I830_BUF_FREE);
1184                 OUT_RING(CMD_REPORT_HEAD);
1185                 OUT_RING(0);
1186                 ADVANCE_LP_RING();
1187         }
1188 }
1189
1190 static void i830_dma_quiescent(struct drm_device *dev)
1191 {
1192         drm_i830_private_t *dev_priv = dev->dev_private;
1193         RING_LOCALS;
1194
1195         i830_kernel_lost_context(dev);
1196
1197         BEGIN_LP_RING(4);
1198         OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
1199         OUT_RING(CMD_REPORT_HEAD);
1200         OUT_RING(0);
1201         OUT_RING(0);
1202         ADVANCE_LP_RING();
1203
1204         i830_wait_ring(dev, dev_priv->ring.Size - 8, __func__);
1205 }
1206
1207 static int i830_flush_queue(struct drm_device *dev)
1208 {
1209         drm_i830_private_t *dev_priv = dev->dev_private;
1210         struct drm_device_dma *dma = dev->dma;
1211         int i, ret = 0;
1212         RING_LOCALS;
1213
1214         i830_kernel_lost_context(dev);
1215
1216         BEGIN_LP_RING(2);
1217         OUT_RING(CMD_REPORT_HEAD);
1218         OUT_RING(0);
1219         ADVANCE_LP_RING();
1220
1221         i830_wait_ring(dev, dev_priv->ring.Size - 8, __func__);
1222
1223         for (i = 0; i < dma->buf_count; i++) {
1224                 struct drm_buf *buf = dma->buflist[i];
1225                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1226
1227                 int used = cmpxchg(buf_priv->in_use, I830_BUF_HARDWARE,
1228                                    I830_BUF_FREE);
1229
1230                 if (used == I830_BUF_HARDWARE)
1231                         DRM_DEBUG("reclaimed from HARDWARE\n");
1232                 if (used == I830_BUF_CLIENT)
1233                         DRM_DEBUG("still on client\n");
1234         }
1235
1236         return ret;
1237 }
1238
1239 /* Must be called with the lock held */
1240 static void i830_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv)
1241 {
1242         struct drm_device_dma *dma = dev->dma;
1243         int i;
1244
1245         if (!dma)
1246                 return;
1247         if (!dev->dev_private)
1248                 return;
1249         if (!dma->buflist)
1250                 return;
1251
1252         i830_flush_queue(dev);
1253
1254         for (i = 0; i < dma->buf_count; i++) {
1255                 struct drm_buf *buf = dma->buflist[i];
1256                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1257
1258                 if (buf->file_priv == file_priv && buf_priv) {
1259                         int used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1260                                            I830_BUF_FREE);
1261
1262                         if (used == I830_BUF_CLIENT)
1263                                 DRM_DEBUG("reclaimed from client\n");
1264                         if (buf_priv->currently_mapped == I830_BUF_MAPPED)
1265                                 buf_priv->currently_mapped = I830_BUF_UNMAPPED;
1266                 }
1267         }
1268 }
1269
1270 static int i830_flush_ioctl(struct drm_device *dev, void *data,
1271                             struct drm_file *file_priv)
1272 {
1273         LOCK_TEST_WITH_RETURN(dev, file_priv);
1274
1275         i830_flush_queue(dev);
1276         return 0;
1277 }
1278
1279 static int i830_dma_vertex(struct drm_device *dev, void *data,
1280                            struct drm_file *file_priv)
1281 {
1282         struct drm_device_dma *dma = dev->dma;
1283         drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
1284         u32 *hw_status = dev_priv->hw_status_page;
1285         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1286             dev_priv->sarea_priv;
1287         drm_i830_vertex_t *vertex = data;
1288
1289         LOCK_TEST_WITH_RETURN(dev, file_priv);
1290
1291         DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n",
1292                   vertex->idx, vertex->used, vertex->discard);
1293
1294         if (vertex->idx < 0 || vertex->idx > dma->buf_count)
1295                 return -EINVAL;
1296
1297         i830_dma_dispatch_vertex(dev,
1298                                  dma->buflist[vertex->idx],
1299                                  vertex->discard, vertex->used);
1300
1301         sarea_priv->last_enqueue = dev_priv->counter - 1;
1302         sarea_priv->last_dispatch = (int)hw_status[5];
1303
1304         return 0;
1305 }
1306
1307 static int i830_clear_bufs(struct drm_device *dev, void *data,
1308                            struct drm_file *file_priv)
1309 {
1310         drm_i830_clear_t *clear = data;
1311
1312         LOCK_TEST_WITH_RETURN(dev, file_priv);
1313
1314         /* GH: Someone's doing nasty things... */
1315         if (!dev->dev_private)
1316                 return -EINVAL;
1317
1318         i830_dma_dispatch_clear(dev, clear->flags,
1319                                 clear->clear_color,
1320                                 clear->clear_depth, clear->clear_depthmask);
1321         return 0;
1322 }
1323
1324 static int i830_swap_bufs(struct drm_device *dev, void *data,
1325                           struct drm_file *file_priv)
1326 {
1327         DRM_DEBUG("i830_swap_bufs\n");
1328
1329         LOCK_TEST_WITH_RETURN(dev, file_priv);
1330
1331         i830_dma_dispatch_swap(dev);
1332         return 0;
1333 }
1334
1335 /* Not sure why this isn't set all the time:
1336  */
1337 static void i830_do_init_pageflip(struct drm_device *dev)
1338 {
1339         drm_i830_private_t *dev_priv = dev->dev_private;
1340
1341         DRM_DEBUG("%s\n", __func__);
1342         dev_priv->page_flipping = 1;
1343         dev_priv->current_page = 0;
1344         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1345 }
1346
1347 static int i830_do_cleanup_pageflip(struct drm_device *dev)
1348 {
1349         drm_i830_private_t *dev_priv = dev->dev_private;
1350
1351         DRM_DEBUG("%s\n", __func__);
1352         if (dev_priv->current_page != 0)
1353                 i830_dma_dispatch_flip(dev);
1354
1355         dev_priv->page_flipping = 0;
1356         return 0;
1357 }
1358
1359 static int i830_flip_bufs(struct drm_device *dev, void *data,
1360                           struct drm_file *file_priv)
1361 {
1362         drm_i830_private_t *dev_priv = dev->dev_private;
1363
1364         DRM_DEBUG("%s\n", __func__);
1365
1366         LOCK_TEST_WITH_RETURN(dev, file_priv);
1367
1368         if (!dev_priv->page_flipping)
1369                 i830_do_init_pageflip(dev);
1370
1371         i830_dma_dispatch_flip(dev);
1372         return 0;
1373 }
1374
1375 static int i830_getage(struct drm_device *dev, void *data,
1376                        struct drm_file *file_priv)
1377 {
1378         drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
1379         u32 *hw_status = dev_priv->hw_status_page;
1380         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1381             dev_priv->sarea_priv;
1382
1383         sarea_priv->last_dispatch = (int)hw_status[5];
1384         return 0;
1385 }
1386
1387 static int i830_getbuf(struct drm_device *dev, void *data,
1388                        struct drm_file *file_priv)
1389 {
1390         int retcode = 0;
1391         drm_i830_dma_t *d = data;
1392         drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
1393         u32 *hw_status = dev_priv->hw_status_page;
1394         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1395             dev_priv->sarea_priv;
1396
1397         DRM_DEBUG("getbuf\n");
1398
1399         LOCK_TEST_WITH_RETURN(dev, file_priv);
1400
1401         d->granted = 0;
1402
1403         retcode = i830_dma_get_buffer(dev, d, file_priv);
1404
1405         DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n",
1406                   task_pid_nr(current), retcode, d->granted);
1407
1408         sarea_priv->last_dispatch = (int)hw_status[5];
1409
1410         return retcode;
1411 }
1412
1413 static int i830_copybuf(struct drm_device *dev, void *data,
1414                         struct drm_file *file_priv)
1415 {
1416         /* Never copy - 2.4.x doesn't need it */
1417         return 0;
1418 }
1419
1420 static int i830_docopy(struct drm_device *dev, void *data,
1421                        struct drm_file *file_priv)
1422 {
1423         return 0;
1424 }
1425
1426 static int i830_getparam(struct drm_device *dev, void *data,
1427                          struct drm_file *file_priv)
1428 {
1429         drm_i830_private_t *dev_priv = dev->dev_private;
1430         drm_i830_getparam_t *param = data;
1431         int value;
1432
1433         if (!dev_priv) {
1434                 DRM_ERROR("%s called with no initialization\n", __func__);
1435                 return -EINVAL;
1436         }
1437
1438         switch (param->param) {
1439         case I830_PARAM_IRQ_ACTIVE:
1440                 value = dev->irq_enabled;
1441                 break;
1442         default:
1443                 return -EINVAL;
1444         }
1445
1446         if (copy_to_user(param->value, &value, sizeof(int))) {
1447                 DRM_ERROR("copy_to_user\n");
1448                 return -EFAULT;
1449         }
1450
1451         return 0;
1452 }
1453
1454 static int i830_setparam(struct drm_device *dev, void *data,
1455                          struct drm_file *file_priv)
1456 {
1457         drm_i830_private_t *dev_priv = dev->dev_private;
1458         drm_i830_setparam_t *param = data;
1459
1460         if (!dev_priv) {
1461                 DRM_ERROR("%s called with no initialization\n", __func__);
1462                 return -EINVAL;
1463         }
1464
1465         switch (param->param) {
1466         case I830_SETPARAM_USE_MI_BATCHBUFFER_START:
1467                 dev_priv->use_mi_batchbuffer_start = param->value;
1468                 break;
1469         default:
1470                 return -EINVAL;
1471         }
1472
1473         return 0;
1474 }
1475
1476 int i830_driver_load(struct drm_device *dev, unsigned long flags)
1477 {
1478         /* i830 has 4 more counters */
1479         dev->counters += 4;
1480         dev->types[6] = _DRM_STAT_IRQ;
1481         dev->types[7] = _DRM_STAT_PRIMARY;
1482         dev->types[8] = _DRM_STAT_SECONDARY;
1483         dev->types[9] = _DRM_STAT_DMA;
1484
1485         return 0;
1486 }
1487
1488 void i830_driver_lastclose(struct drm_device *dev)
1489 {
1490         i830_dma_cleanup(dev);
1491 }
1492
1493 void i830_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1494 {
1495         if (dev->dev_private) {
1496                 drm_i830_private_t *dev_priv = dev->dev_private;
1497                 if (dev_priv->page_flipping)
1498                         i830_do_cleanup_pageflip(dev);
1499         }
1500 }
1501
1502 void i830_driver_reclaim_buffers_locked(struct drm_device *dev, struct drm_file *file_priv)
1503 {
1504         i830_reclaim_buffers(dev, file_priv);
1505 }
1506
1507 int i830_driver_dma_quiescent(struct drm_device *dev)
1508 {
1509         i830_dma_quiescent(dev);
1510         return 0;
1511 }
1512
1513 /*
1514  * call the drm_ioctl under the big kernel lock because
1515  * to lock against the i830_mmap_buffers function.
1516  */
1517 long i830_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1518 {
1519         int ret;
1520         lock_kernel();
1521         ret = drm_ioctl(file, cmd, arg);
1522         unlock_kernel();
1523         return ret;
1524 }
1525
1526 struct drm_ioctl_desc i830_ioctls[] = {
1527         DRM_IOCTL_DEF(DRM_I830_INIT, i830_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1528         DRM_IOCTL_DEF(DRM_I830_VERTEX, i830_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
1529         DRM_IOCTL_DEF(DRM_I830_CLEAR, i830_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
1530         DRM_IOCTL_DEF(DRM_I830_FLUSH, i830_flush_ioctl, DRM_AUTH|DRM_UNLOCKED),
1531         DRM_IOCTL_DEF(DRM_I830_GETAGE, i830_getage, DRM_AUTH|DRM_UNLOCKED),
1532         DRM_IOCTL_DEF(DRM_I830_GETBUF, i830_getbuf, DRM_AUTH|DRM_UNLOCKED),
1533         DRM_IOCTL_DEF(DRM_I830_SWAP, i830_swap_bufs, DRM_AUTH|DRM_UNLOCKED),
1534         DRM_IOCTL_DEF(DRM_I830_COPY, i830_copybuf, DRM_AUTH|DRM_UNLOCKED),
1535         DRM_IOCTL_DEF(DRM_I830_DOCOPY, i830_docopy, DRM_AUTH|DRM_UNLOCKED),
1536         DRM_IOCTL_DEF(DRM_I830_FLIP, i830_flip_bufs, DRM_AUTH|DRM_UNLOCKED),
1537         DRM_IOCTL_DEF(DRM_I830_IRQ_EMIT, i830_irq_emit, DRM_AUTH|DRM_UNLOCKED),
1538         DRM_IOCTL_DEF(DRM_I830_IRQ_WAIT, i830_irq_wait, DRM_AUTH|DRM_UNLOCKED),
1539         DRM_IOCTL_DEF(DRM_I830_GETPARAM, i830_getparam, DRM_AUTH|DRM_UNLOCKED),
1540         DRM_IOCTL_DEF(DRM_I830_SETPARAM, i830_setparam, DRM_AUTH|DRM_UNLOCKED),
1541 };
1542
1543 int i830_max_ioctl = DRM_ARRAY_SIZE(i830_ioctls);
1544
1545 /**
1546  * Determine if the device really is AGP or not.
1547  *
1548  * All Intel graphics chipsets are treated as AGP, even if they are really
1549  * PCI-e.
1550  *
1551  * \param dev   The device to be tested.
1552  *
1553  * \returns
1554  * A value of 1 is always retured to indictate every i8xx is AGP.
1555  */
1556 int i830_driver_device_is_agp(struct drm_device *dev)
1557 {
1558         return 1;
1559 }