Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
[linux-2.6.git] / drivers / gpu / drm / exynos / exynos_drm_fimd.c
1 /* exynos_drm_fimd.c
2  *
3  * Copyright (C) 2011 Samsung Electronics Co.Ltd
4  * Authors:
5  *      Joonyoung Shim <jy0922.shim@samsung.com>
6  *      Inki Dae <inki.dae@samsung.com>
7  *
8  * This program is free software; you can redistribute  it and/or modify it
9  * under  the terms of  the GNU General  Public License as published by the
10  * Free Software Foundation;  either version 2 of the  License, or (at your
11  * option) any later version.
12  *
13  */
14 #include "drmP.h"
15
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/platform_device.h>
19 #include <linux/clk.h>
20 #include <linux/pm_runtime.h>
21
22 #include <drm/exynos_drm.h>
23 #include <plat/regs-fb-v4.h>
24
25 #include "exynos_drm_drv.h"
26 #include "exynos_drm_fbdev.h"
27 #include "exynos_drm_crtc.h"
28
29 /*
30  * FIMD is stand for Fully Interactive Mobile Display and
31  * as a display controller, it transfers contents drawn on memory
32  * to a LCD Panel through Display Interfaces such as RGB or
33  * CPU Interface.
34  */
35
36 /* position control register for hardware window 0, 2 ~ 4.*/
37 #define VIDOSD_A(win)           (VIDOSD_BASE + 0x00 + (win) * 16)
38 #define VIDOSD_B(win)           (VIDOSD_BASE + 0x04 + (win) * 16)
39 /* size control register for hardware window 0. */
40 #define VIDOSD_C_SIZE_W0        (VIDOSD_BASE + 0x08)
41 /* alpha control register for hardware window 1 ~ 4. */
42 #define VIDOSD_C(win)           (VIDOSD_BASE + 0x18 + (win) * 16)
43 /* size control register for hardware window 1 ~ 4. */
44 #define VIDOSD_D(win)           (VIDOSD_BASE + 0x0C + (win) * 16)
45
46 #define VIDWx_BUF_START(win, buf)       (VIDW_BUF_START(buf) + (win) * 8)
47 #define VIDWx_BUF_END(win, buf)         (VIDW_BUF_END(buf) + (win) * 8)
48 #define VIDWx_BUF_SIZE(win, buf)        (VIDW_BUF_SIZE(buf) + (win) * 4)
49
50 /* color key control register for hardware window 1 ~ 4. */
51 #define WKEYCON0_BASE(x)                ((WKEYCON0 + 0x140) + (x * 8))
52 /* color key value register for hardware window 1 ~ 4. */
53 #define WKEYCON1_BASE(x)                ((WKEYCON1 + 0x140) + (x * 8))
54
55 /* FIMD has totally five hardware windows. */
56 #define WINDOWS_NR      5
57
58 #define get_fimd_context(dev)   platform_get_drvdata(to_platform_device(dev))
59
60 struct fimd_win_data {
61         unsigned int            offset_x;
62         unsigned int            offset_y;
63         unsigned int            ovl_width;
64         unsigned int            ovl_height;
65         unsigned int            fb_width;
66         unsigned int            fb_height;
67         unsigned int            bpp;
68         dma_addr_t              dma_addr;
69         void __iomem            *vaddr;
70         unsigned int            buf_offsize;
71         unsigned int            line_size;      /* bytes */
72         bool                    enabled;
73 };
74
75 struct fimd_context {
76         struct exynos_drm_subdrv        subdrv;
77         int                             irq;
78         struct drm_crtc                 *crtc;
79         struct clk                      *bus_clk;
80         struct clk                      *lcd_clk;
81         struct resource                 *regs_res;
82         void __iomem                    *regs;
83         struct fimd_win_data            win_data[WINDOWS_NR];
84         unsigned int                    clkdiv;
85         unsigned int                    default_win;
86         unsigned long                   irq_flags;
87         u32                             vidcon0;
88         u32                             vidcon1;
89         bool                            suspended;
90         struct mutex                    lock;
91
92         struct exynos_drm_panel_info *panel;
93 };
94
95 static bool fimd_display_is_connected(struct device *dev)
96 {
97         DRM_DEBUG_KMS("%s\n", __FILE__);
98
99         /* TODO. */
100
101         return true;
102 }
103
104 static void *fimd_get_panel(struct device *dev)
105 {
106         struct fimd_context *ctx = get_fimd_context(dev);
107
108         DRM_DEBUG_KMS("%s\n", __FILE__);
109
110         return ctx->panel;
111 }
112
113 static int fimd_check_timing(struct device *dev, void *timing)
114 {
115         DRM_DEBUG_KMS("%s\n", __FILE__);
116
117         /* TODO. */
118
119         return 0;
120 }
121
122 static int fimd_display_power_on(struct device *dev, int mode)
123 {
124         DRM_DEBUG_KMS("%s\n", __FILE__);
125
126         /* TODO */
127
128         return 0;
129 }
130
131 static struct exynos_drm_display_ops fimd_display_ops = {
132         .type = EXYNOS_DISPLAY_TYPE_LCD,
133         .is_connected = fimd_display_is_connected,
134         .get_panel = fimd_get_panel,
135         .check_timing = fimd_check_timing,
136         .power_on = fimd_display_power_on,
137 };
138
139 static void fimd_dpms(struct device *subdrv_dev, int mode)
140 {
141         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
142
143         DRM_DEBUG_KMS("%s, %d\n", __FILE__, mode);
144
145         mutex_lock(&ctx->lock);
146
147         switch (mode) {
148         case DRM_MODE_DPMS_ON:
149                 /*
150                  * enable fimd hardware only if suspended status.
151                  *
152                  * P.S. fimd_dpms function would be called at booting time so
153                  * clk_enable could be called double time.
154                  */
155                 if (ctx->suspended)
156                         pm_runtime_get_sync(subdrv_dev);
157                 break;
158         case DRM_MODE_DPMS_STANDBY:
159         case DRM_MODE_DPMS_SUSPEND:
160         case DRM_MODE_DPMS_OFF:
161                 if (!ctx->suspended)
162                         pm_runtime_put_sync(subdrv_dev);
163                 break;
164         default:
165                 DRM_DEBUG_KMS("unspecified mode %d\n", mode);
166                 break;
167         }
168
169         mutex_unlock(&ctx->lock);
170 }
171
172 static void fimd_apply(struct device *subdrv_dev)
173 {
174         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
175         struct exynos_drm_manager *mgr = &ctx->subdrv.manager;
176         struct exynos_drm_manager_ops *mgr_ops = mgr->ops;
177         struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops;
178         struct fimd_win_data *win_data;
179         int i;
180
181         DRM_DEBUG_KMS("%s\n", __FILE__);
182
183         for (i = 0; i < WINDOWS_NR; i++) {
184                 win_data = &ctx->win_data[i];
185                 if (win_data->enabled && (ovl_ops && ovl_ops->commit))
186                         ovl_ops->commit(subdrv_dev, i);
187         }
188
189         if (mgr_ops && mgr_ops->commit)
190                 mgr_ops->commit(subdrv_dev);
191 }
192
193 static void fimd_commit(struct device *dev)
194 {
195         struct fimd_context *ctx = get_fimd_context(dev);
196         struct exynos_drm_panel_info *panel = ctx->panel;
197         struct fb_videomode *timing = &panel->timing;
198         u32 val;
199
200         if (ctx->suspended)
201                 return;
202
203         DRM_DEBUG_KMS("%s\n", __FILE__);
204
205         /* setup polarity values from machine code. */
206         writel(ctx->vidcon1, ctx->regs + VIDCON1);
207
208         /* setup vertical timing values. */
209         val = VIDTCON0_VBPD(timing->upper_margin - 1) |
210                VIDTCON0_VFPD(timing->lower_margin - 1) |
211                VIDTCON0_VSPW(timing->vsync_len - 1);
212         writel(val, ctx->regs + VIDTCON0);
213
214         /* setup horizontal timing values.  */
215         val = VIDTCON1_HBPD(timing->left_margin - 1) |
216                VIDTCON1_HFPD(timing->right_margin - 1) |
217                VIDTCON1_HSPW(timing->hsync_len - 1);
218         writel(val, ctx->regs + VIDTCON1);
219
220         /* setup horizontal and vertical display size. */
221         val = VIDTCON2_LINEVAL(timing->yres - 1) |
222                VIDTCON2_HOZVAL(timing->xres - 1);
223         writel(val, ctx->regs + VIDTCON2);
224
225         /* setup clock source, clock divider, enable dma. */
226         val = ctx->vidcon0;
227         val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
228
229         if (ctx->clkdiv > 1)
230                 val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR;
231         else
232                 val &= ~VIDCON0_CLKDIR; /* 1:1 clock */
233
234         /*
235          * fields of register with prefix '_F' would be updated
236          * at vsync(same as dma start)
237          */
238         val |= VIDCON0_ENVID | VIDCON0_ENVID_F;
239         writel(val, ctx->regs + VIDCON0);
240 }
241
242 static int fimd_enable_vblank(struct device *dev)
243 {
244         struct fimd_context *ctx = get_fimd_context(dev);
245         u32 val;
246
247         DRM_DEBUG_KMS("%s\n", __FILE__);
248
249         if (ctx->suspended)
250                 return -EPERM;
251
252         if (!test_and_set_bit(0, &ctx->irq_flags)) {
253                 val = readl(ctx->regs + VIDINTCON0);
254
255                 val |= VIDINTCON0_INT_ENABLE;
256                 val |= VIDINTCON0_INT_FRAME;
257
258                 val &= ~VIDINTCON0_FRAMESEL0_MASK;
259                 val |= VIDINTCON0_FRAMESEL0_VSYNC;
260                 val &= ~VIDINTCON0_FRAMESEL1_MASK;
261                 val |= VIDINTCON0_FRAMESEL1_NONE;
262
263                 writel(val, ctx->regs + VIDINTCON0);
264         }
265
266         return 0;
267 }
268
269 static void fimd_disable_vblank(struct device *dev)
270 {
271         struct fimd_context *ctx = get_fimd_context(dev);
272         u32 val;
273
274         DRM_DEBUG_KMS("%s\n", __FILE__);
275
276         if (ctx->suspended)
277                 return;
278
279         if (test_and_clear_bit(0, &ctx->irq_flags)) {
280                 val = readl(ctx->regs + VIDINTCON0);
281
282                 val &= ~VIDINTCON0_INT_FRAME;
283                 val &= ~VIDINTCON0_INT_ENABLE;
284
285                 writel(val, ctx->regs + VIDINTCON0);
286         }
287 }
288
289 static struct exynos_drm_manager_ops fimd_manager_ops = {
290         .dpms = fimd_dpms,
291         .apply = fimd_apply,
292         .commit = fimd_commit,
293         .enable_vblank = fimd_enable_vblank,
294         .disable_vblank = fimd_disable_vblank,
295 };
296
297 static void fimd_win_mode_set(struct device *dev,
298                               struct exynos_drm_overlay *overlay)
299 {
300         struct fimd_context *ctx = get_fimd_context(dev);
301         struct fimd_win_data *win_data;
302         int win;
303         unsigned long offset;
304
305         DRM_DEBUG_KMS("%s\n", __FILE__);
306
307         if (!overlay) {
308                 dev_err(dev, "overlay is NULL\n");
309                 return;
310         }
311
312         win = overlay->zpos;
313         if (win == DEFAULT_ZPOS)
314                 win = ctx->default_win;
315
316         if (win < 0 || win > WINDOWS_NR)
317                 return;
318
319         offset = overlay->fb_x * (overlay->bpp >> 3);
320         offset += overlay->fb_y * overlay->pitch;
321
322         DRM_DEBUG_KMS("offset = 0x%lx, pitch = %x\n", offset, overlay->pitch);
323
324         win_data = &ctx->win_data[win];
325
326         win_data->offset_x = overlay->crtc_x;
327         win_data->offset_y = overlay->crtc_y;
328         win_data->ovl_width = overlay->crtc_width;
329         win_data->ovl_height = overlay->crtc_height;
330         win_data->fb_width = overlay->fb_width;
331         win_data->fb_height = overlay->fb_height;
332         win_data->dma_addr = overlay->dma_addr[0] + offset;
333         win_data->vaddr = overlay->vaddr[0] + offset;
334         win_data->bpp = overlay->bpp;
335         win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) *
336                                 (overlay->bpp >> 3);
337         win_data->line_size = overlay->crtc_width * (overlay->bpp >> 3);
338
339         DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n",
340                         win_data->offset_x, win_data->offset_y);
341         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
342                         win_data->ovl_width, win_data->ovl_height);
343         DRM_DEBUG_KMS("paddr = 0x%lx, vaddr = 0x%lx\n",
344                         (unsigned long)win_data->dma_addr,
345                         (unsigned long)win_data->vaddr);
346         DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n",
347                         overlay->fb_width, overlay->crtc_width);
348 }
349
350 static void fimd_win_set_pixfmt(struct device *dev, unsigned int win)
351 {
352         struct fimd_context *ctx = get_fimd_context(dev);
353         struct fimd_win_data *win_data = &ctx->win_data[win];
354         unsigned long val;
355
356         DRM_DEBUG_KMS("%s\n", __FILE__);
357
358         val = WINCONx_ENWIN;
359
360         switch (win_data->bpp) {
361         case 1:
362                 val |= WINCON0_BPPMODE_1BPP;
363                 val |= WINCONx_BITSWP;
364                 val |= WINCONx_BURSTLEN_4WORD;
365                 break;
366         case 2:
367                 val |= WINCON0_BPPMODE_2BPP;
368                 val |= WINCONx_BITSWP;
369                 val |= WINCONx_BURSTLEN_8WORD;
370                 break;
371         case 4:
372                 val |= WINCON0_BPPMODE_4BPP;
373                 val |= WINCONx_BITSWP;
374                 val |= WINCONx_BURSTLEN_8WORD;
375                 break;
376         case 8:
377                 val |= WINCON0_BPPMODE_8BPP_PALETTE;
378                 val |= WINCONx_BURSTLEN_8WORD;
379                 val |= WINCONx_BYTSWP;
380                 break;
381         case 16:
382                 val |= WINCON0_BPPMODE_16BPP_565;
383                 val |= WINCONx_HAWSWP;
384                 val |= WINCONx_BURSTLEN_16WORD;
385                 break;
386         case 24:
387                 val |= WINCON0_BPPMODE_24BPP_888;
388                 val |= WINCONx_WSWP;
389                 val |= WINCONx_BURSTLEN_16WORD;
390                 break;
391         case 32:
392                 val |= WINCON1_BPPMODE_28BPP_A4888
393                         | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
394                 val |= WINCONx_WSWP;
395                 val |= WINCONx_BURSTLEN_16WORD;
396                 break;
397         default:
398                 DRM_DEBUG_KMS("invalid pixel size so using unpacked 24bpp.\n");
399
400                 val |= WINCON0_BPPMODE_24BPP_888;
401                 val |= WINCONx_WSWP;
402                 val |= WINCONx_BURSTLEN_16WORD;
403                 break;
404         }
405
406         DRM_DEBUG_KMS("bpp = %d\n", win_data->bpp);
407
408         writel(val, ctx->regs + WINCON(win));
409 }
410
411 static void fimd_win_set_colkey(struct device *dev, unsigned int win)
412 {
413         struct fimd_context *ctx = get_fimd_context(dev);
414         unsigned int keycon0 = 0, keycon1 = 0;
415
416         DRM_DEBUG_KMS("%s\n", __FILE__);
417
418         keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F |
419                         WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
420
421         keycon1 = WxKEYCON1_COLVAL(0xffffffff);
422
423         writel(keycon0, ctx->regs + WKEYCON0_BASE(win));
424         writel(keycon1, ctx->regs + WKEYCON1_BASE(win));
425 }
426
427 static void fimd_win_commit(struct device *dev, int zpos)
428 {
429         struct fimd_context *ctx = get_fimd_context(dev);
430         struct fimd_win_data *win_data;
431         int win = zpos;
432         unsigned long val, alpha, size;
433
434         DRM_DEBUG_KMS("%s\n", __FILE__);
435
436         if (ctx->suspended)
437                 return;
438
439         if (win == DEFAULT_ZPOS)
440                 win = ctx->default_win;
441
442         if (win < 0 || win > WINDOWS_NR)
443                 return;
444
445         win_data = &ctx->win_data[win];
446
447         /*
448          * SHADOWCON register is used for enabling timing.
449          *
450          * for example, once only width value of a register is set,
451          * if the dma is started then fimd hardware could malfunction so
452          * with protect window setting, the register fields with prefix '_F'
453          * wouldn't be updated at vsync also but updated once unprotect window
454          * is set.
455          */
456
457         /* protect windows */
458         val = readl(ctx->regs + SHADOWCON);
459         val |= SHADOWCON_WINx_PROTECT(win);
460         writel(val, ctx->regs + SHADOWCON);
461
462         /* buffer start address */
463         val = (unsigned long)win_data->dma_addr;
464         writel(val, ctx->regs + VIDWx_BUF_START(win, 0));
465
466         /* buffer end address */
467         size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3);
468         val = (unsigned long)(win_data->dma_addr + size);
469         writel(val, ctx->regs + VIDWx_BUF_END(win, 0));
470
471         DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n",
472                         (unsigned long)win_data->dma_addr, val, size);
473         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
474                         win_data->ovl_width, win_data->ovl_height);
475
476         /* buffer size */
477         val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) |
478                 VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size);
479         writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0));
480
481         /* OSD position */
482         val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) |
483                 VIDOSDxA_TOPLEFT_Y(win_data->offset_y);
484         writel(val, ctx->regs + VIDOSD_A(win));
485
486         val = VIDOSDxB_BOTRIGHT_X(win_data->offset_x +
487                                         win_data->ovl_width - 1) |
488                 VIDOSDxB_BOTRIGHT_Y(win_data->offset_y +
489                                         win_data->ovl_height - 1);
490         writel(val, ctx->regs + VIDOSD_B(win));
491
492         DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n",
493                         win_data->offset_x, win_data->offset_y,
494                         win_data->offset_x + win_data->ovl_width - 1,
495                         win_data->offset_y + win_data->ovl_height - 1);
496
497         /* hardware window 0 doesn't support alpha channel. */
498         if (win != 0) {
499                 /* OSD alpha */
500                 alpha = VIDISD14C_ALPHA1_R(0xf) |
501                         VIDISD14C_ALPHA1_G(0xf) |
502                         VIDISD14C_ALPHA1_B(0xf);
503
504                 writel(alpha, ctx->regs + VIDOSD_C(win));
505         }
506
507         /* OSD size */
508         if (win != 3 && win != 4) {
509                 u32 offset = VIDOSD_D(win);
510                 if (win == 0)
511                         offset = VIDOSD_C_SIZE_W0;
512                 val = win_data->ovl_width * win_data->ovl_height;
513                 writel(val, ctx->regs + offset);
514
515                 DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
516         }
517
518         fimd_win_set_pixfmt(dev, win);
519
520         /* hardware window 0 doesn't support color key. */
521         if (win != 0)
522                 fimd_win_set_colkey(dev, win);
523
524         /* wincon */
525         val = readl(ctx->regs + WINCON(win));
526         val |= WINCONx_ENWIN;
527         writel(val, ctx->regs + WINCON(win));
528
529         /* Enable DMA channel and unprotect windows */
530         val = readl(ctx->regs + SHADOWCON);
531         val |= SHADOWCON_CHx_ENABLE(win);
532         val &= ~SHADOWCON_WINx_PROTECT(win);
533         writel(val, ctx->regs + SHADOWCON);
534
535         win_data->enabled = true;
536 }
537
538 static void fimd_win_disable(struct device *dev, int zpos)
539 {
540         struct fimd_context *ctx = get_fimd_context(dev);
541         struct fimd_win_data *win_data;
542         int win = zpos;
543         u32 val;
544
545         DRM_DEBUG_KMS("%s\n", __FILE__);
546
547         if (win == DEFAULT_ZPOS)
548                 win = ctx->default_win;
549
550         if (win < 0 || win > WINDOWS_NR)
551                 return;
552
553         win_data = &ctx->win_data[win];
554
555         /* protect windows */
556         val = readl(ctx->regs + SHADOWCON);
557         val |= SHADOWCON_WINx_PROTECT(win);
558         writel(val, ctx->regs + SHADOWCON);
559
560         /* wincon */
561         val = readl(ctx->regs + WINCON(win));
562         val &= ~WINCONx_ENWIN;
563         writel(val, ctx->regs + WINCON(win));
564
565         /* unprotect windows */
566         val = readl(ctx->regs + SHADOWCON);
567         val &= ~SHADOWCON_CHx_ENABLE(win);
568         val &= ~SHADOWCON_WINx_PROTECT(win);
569         writel(val, ctx->regs + SHADOWCON);
570
571         win_data->enabled = false;
572 }
573
574 static struct exynos_drm_overlay_ops fimd_overlay_ops = {
575         .mode_set = fimd_win_mode_set,
576         .commit = fimd_win_commit,
577         .disable = fimd_win_disable,
578 };
579
580 static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc)
581 {
582         struct exynos_drm_private *dev_priv = drm_dev->dev_private;
583         struct drm_pending_vblank_event *e, *t;
584         struct timeval now;
585         unsigned long flags;
586         bool is_checked = false;
587
588         spin_lock_irqsave(&drm_dev->event_lock, flags);
589
590         list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list,
591                         base.link) {
592                 /* if event's pipe isn't same as crtc then ignore it. */
593                 if (crtc != e->pipe)
594                         continue;
595
596                 is_checked = true;
597
598                 do_gettimeofday(&now);
599                 e->event.sequence = 0;
600                 e->event.tv_sec = now.tv_sec;
601                 e->event.tv_usec = now.tv_usec;
602
603                 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
604                 wake_up_interruptible(&e->base.file_priv->event_wait);
605         }
606
607         if (is_checked) {
608                 /*
609                  * call drm_vblank_put only in case that drm_vblank_get was
610                  * called.
611                  */
612                 if (atomic_read(&drm_dev->vblank_refcount[crtc]) > 0)
613                         drm_vblank_put(drm_dev, crtc);
614
615                 /*
616                  * don't off vblank if vblank_disable_allowed is 1,
617                  * because vblank would be off by timer handler.
618                  */
619                 if (!drm_dev->vblank_disable_allowed)
620                         drm_vblank_off(drm_dev, crtc);
621         }
622
623         spin_unlock_irqrestore(&drm_dev->event_lock, flags);
624 }
625
626 static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
627 {
628         struct fimd_context *ctx = (struct fimd_context *)dev_id;
629         struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
630         struct drm_device *drm_dev = subdrv->drm_dev;
631         struct exynos_drm_manager *manager = &subdrv->manager;
632         u32 val;
633
634         val = readl(ctx->regs + VIDINTCON1);
635
636         if (val & VIDINTCON1_INT_FRAME)
637                 /* VSYNC interrupt */
638                 writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1);
639
640         /* check the crtc is detached already from encoder */
641         if (manager->pipe < 0)
642                 goto out;
643
644         drm_handle_vblank(drm_dev, manager->pipe);
645         fimd_finish_pageflip(drm_dev, manager->pipe);
646
647 out:
648         return IRQ_HANDLED;
649 }
650
651 static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
652 {
653         DRM_DEBUG_KMS("%s\n", __FILE__);
654
655         /*
656          * enable drm irq mode.
657          * - with irq_enabled = 1, we can use the vblank feature.
658          *
659          * P.S. note that we wouldn't use drm irq handler but
660          *      just specific driver own one instead because
661          *      drm framework supports only one irq handler.
662          */
663         drm_dev->irq_enabled = 1;
664
665         /*
666          * with vblank_disable_allowed = 1, vblank interrupt will be disabled
667          * by drm timer once a current process gives up ownership of
668          * vblank event.(after drm_vblank_put function is called)
669          */
670         drm_dev->vblank_disable_allowed = 1;
671
672         return 0;
673 }
674
675 static void fimd_subdrv_remove(struct drm_device *drm_dev)
676 {
677         DRM_DEBUG_KMS("%s\n", __FILE__);
678
679         /* TODO. */
680 }
681
682 static int fimd_calc_clkdiv(struct fimd_context *ctx,
683                             struct fb_videomode *timing)
684 {
685         unsigned long clk = clk_get_rate(ctx->lcd_clk);
686         u32 retrace;
687         u32 clkdiv;
688         u32 best_framerate = 0;
689         u32 framerate;
690
691         DRM_DEBUG_KMS("%s\n", __FILE__);
692
693         retrace = timing->left_margin + timing->hsync_len +
694                                 timing->right_margin + timing->xres;
695         retrace *= timing->upper_margin + timing->vsync_len +
696                                 timing->lower_margin + timing->yres;
697
698         /* default framerate is 60Hz */
699         if (!timing->refresh)
700                 timing->refresh = 60;
701
702         clk /= retrace;
703
704         for (clkdiv = 1; clkdiv < 0x100; clkdiv++) {
705                 int tmp;
706
707                 /* get best framerate */
708                 framerate = clk / clkdiv;
709                 tmp = timing->refresh - framerate;
710                 if (tmp < 0) {
711                         best_framerate = framerate;
712                         continue;
713                 } else {
714                         if (!best_framerate)
715                                 best_framerate = framerate;
716                         else if (tmp < (best_framerate - framerate))
717                                 best_framerate = framerate;
718                         break;
719                 }
720         }
721
722         return clkdiv;
723 }
724
725 static void fimd_clear_win(struct fimd_context *ctx, int win)
726 {
727         u32 val;
728
729         DRM_DEBUG_KMS("%s\n", __FILE__);
730
731         writel(0, ctx->regs + WINCON(win));
732         writel(0, ctx->regs + VIDOSD_A(win));
733         writel(0, ctx->regs + VIDOSD_B(win));
734         writel(0, ctx->regs + VIDOSD_C(win));
735
736         if (win == 1 || win == 2)
737                 writel(0, ctx->regs + VIDOSD_D(win));
738
739         val = readl(ctx->regs + SHADOWCON);
740         val &= ~SHADOWCON_WINx_PROTECT(win);
741         writel(val, ctx->regs + SHADOWCON);
742 }
743
744 static int fimd_power_on(struct fimd_context *ctx, bool enable)
745 {
746         struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
747         struct device *dev = subdrv->manager.dev;
748
749         DRM_DEBUG_KMS("%s\n", __FILE__);
750
751         if (enable != false && enable != true)
752                 return -EINVAL;
753
754         if (enable) {
755                 int ret;
756
757                 ret = clk_enable(ctx->bus_clk);
758                 if (ret < 0)
759                         return ret;
760
761                 ret = clk_enable(ctx->lcd_clk);
762                 if  (ret < 0) {
763                         clk_disable(ctx->bus_clk);
764                         return ret;
765                 }
766
767                 ctx->suspended = false;
768
769                 /* if vblank was enabled status, enable it again. */
770                 if (test_and_clear_bit(0, &ctx->irq_flags))
771                         fimd_enable_vblank(dev);
772
773                 fimd_apply(dev);
774         } else {
775                 clk_disable(ctx->lcd_clk);
776                 clk_disable(ctx->bus_clk);
777
778                 ctx->suspended = true;
779         }
780
781         return 0;
782 }
783
784 static int __devinit fimd_probe(struct platform_device *pdev)
785 {
786         struct device *dev = &pdev->dev;
787         struct fimd_context *ctx;
788         struct exynos_drm_subdrv *subdrv;
789         struct exynos_drm_fimd_pdata *pdata;
790         struct exynos_drm_panel_info *panel;
791         struct resource *res;
792         int win;
793         int ret = -EINVAL;
794
795         DRM_DEBUG_KMS("%s\n", __FILE__);
796
797         pdata = pdev->dev.platform_data;
798         if (!pdata) {
799                 dev_err(dev, "no platform data specified\n");
800                 return -EINVAL;
801         }
802
803         panel = &pdata->panel;
804         if (!panel) {
805                 dev_err(dev, "panel is null.\n");
806                 return -EINVAL;
807         }
808
809         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
810         if (!ctx)
811                 return -ENOMEM;
812
813         ctx->bus_clk = clk_get(dev, "fimd");
814         if (IS_ERR(ctx->bus_clk)) {
815                 dev_err(dev, "failed to get bus clock\n");
816                 ret = PTR_ERR(ctx->bus_clk);
817                 goto err_clk_get;
818         }
819
820         ctx->lcd_clk = clk_get(dev, "sclk_fimd");
821         if (IS_ERR(ctx->lcd_clk)) {
822                 dev_err(dev, "failed to get lcd clock\n");
823                 ret = PTR_ERR(ctx->lcd_clk);
824                 goto err_bus_clk;
825         }
826
827         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
828         if (!res) {
829                 dev_err(dev, "failed to find registers\n");
830                 ret = -ENOENT;
831                 goto err_clk;
832         }
833
834         ctx->regs_res = request_mem_region(res->start, resource_size(res),
835                                            dev_name(dev));
836         if (!ctx->regs_res) {
837                 dev_err(dev, "failed to claim register region\n");
838                 ret = -ENOENT;
839                 goto err_clk;
840         }
841
842         ctx->regs = ioremap(res->start, resource_size(res));
843         if (!ctx->regs) {
844                 dev_err(dev, "failed to map registers\n");
845                 ret = -ENXIO;
846                 goto err_req_region_io;
847         }
848
849         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
850         if (!res) {
851                 dev_err(dev, "irq request failed.\n");
852                 goto err_req_region_irq;
853         }
854
855         ctx->irq = res->start;
856
857         ret = request_irq(ctx->irq, fimd_irq_handler, 0, "drm_fimd", ctx);
858         if (ret < 0) {
859                 dev_err(dev, "irq request failed.\n");
860                 goto err_req_irq;
861         }
862
863         ctx->vidcon0 = pdata->vidcon0;
864         ctx->vidcon1 = pdata->vidcon1;
865         ctx->default_win = pdata->default_win;
866         ctx->panel = panel;
867
868         subdrv = &ctx->subdrv;
869
870         subdrv->probe = fimd_subdrv_probe;
871         subdrv->remove = fimd_subdrv_remove;
872         subdrv->manager.pipe = -1;
873         subdrv->manager.ops = &fimd_manager_ops;
874         subdrv->manager.overlay_ops = &fimd_overlay_ops;
875         subdrv->manager.display_ops = &fimd_display_ops;
876         subdrv->manager.dev = dev;
877
878         mutex_init(&ctx->lock);
879
880         platform_set_drvdata(pdev, ctx);
881
882         pm_runtime_enable(dev);
883         pm_runtime_get_sync(dev);
884
885         ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing);
886         panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
887
888         DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n",
889                         panel->timing.pixclock, ctx->clkdiv);
890
891         for (win = 0; win < WINDOWS_NR; win++)
892                 fimd_clear_win(ctx, win);
893
894         exynos_drm_subdrv_register(subdrv);
895
896         return 0;
897
898 err_req_irq:
899 err_req_region_irq:
900         iounmap(ctx->regs);
901
902 err_req_region_io:
903         release_resource(ctx->regs_res);
904         kfree(ctx->regs_res);
905
906 err_clk:
907         clk_disable(ctx->lcd_clk);
908         clk_put(ctx->lcd_clk);
909
910 err_bus_clk:
911         clk_disable(ctx->bus_clk);
912         clk_put(ctx->bus_clk);
913
914 err_clk_get:
915         kfree(ctx);
916         return ret;
917 }
918
919 static int __devexit fimd_remove(struct platform_device *pdev)
920 {
921         struct device *dev = &pdev->dev;
922         struct fimd_context *ctx = platform_get_drvdata(pdev);
923
924         DRM_DEBUG_KMS("%s\n", __FILE__);
925
926         exynos_drm_subdrv_unregister(&ctx->subdrv);
927
928         if (ctx->suspended)
929                 goto out;
930
931         clk_disable(ctx->lcd_clk);
932         clk_disable(ctx->bus_clk);
933
934         pm_runtime_set_suspended(dev);
935         pm_runtime_put_sync(dev);
936
937 out:
938         pm_runtime_disable(dev);
939
940         clk_put(ctx->lcd_clk);
941         clk_put(ctx->bus_clk);
942
943         iounmap(ctx->regs);
944         release_resource(ctx->regs_res);
945         kfree(ctx->regs_res);
946         free_irq(ctx->irq, ctx);
947
948         kfree(ctx);
949
950         return 0;
951 }
952
953 #ifdef CONFIG_PM_SLEEP
954 static int fimd_suspend(struct device *dev)
955 {
956         struct fimd_context *ctx = get_fimd_context(dev);
957
958         if (pm_runtime_suspended(dev))
959                 return 0;
960
961         /*
962          * do not use pm_runtime_suspend(). if pm_runtime_suspend() is
963          * called here, an error would be returned by that interface
964          * because the usage_count of pm runtime is more than 1.
965          */
966         return fimd_power_on(ctx, false);
967 }
968
969 static int fimd_resume(struct device *dev)
970 {
971         struct fimd_context *ctx = get_fimd_context(dev);
972
973         /*
974          * if entered to sleep when lcd panel was on, the usage_count
975          * of pm runtime would still be 1 so in this case, fimd driver
976          * should be on directly not drawing on pm runtime interface.
977          */
978         if (!pm_runtime_suspended(dev))
979                 return fimd_power_on(ctx, true);
980
981         return 0;
982 }
983 #endif
984
985 #ifdef CONFIG_PM_RUNTIME
986 static int fimd_runtime_suspend(struct device *dev)
987 {
988         struct fimd_context *ctx = get_fimd_context(dev);
989
990         DRM_DEBUG_KMS("%s\n", __FILE__);
991
992         return fimd_power_on(ctx, false);
993 }
994
995 static int fimd_runtime_resume(struct device *dev)
996 {
997         struct fimd_context *ctx = get_fimd_context(dev);
998
999         DRM_DEBUG_KMS("%s\n", __FILE__);
1000
1001         return fimd_power_on(ctx, true);
1002 }
1003 #endif
1004
1005 static const struct dev_pm_ops fimd_pm_ops = {
1006         SET_SYSTEM_SLEEP_PM_OPS(fimd_suspend, fimd_resume)
1007         SET_RUNTIME_PM_OPS(fimd_runtime_suspend, fimd_runtime_resume, NULL)
1008 };
1009
1010 struct platform_driver fimd_driver = {
1011         .probe          = fimd_probe,
1012         .remove         = __devexit_p(fimd_remove),
1013         .driver         = {
1014                 .name   = "exynos4-fb",
1015                 .owner  = THIS_MODULE,
1016                 .pm     = &fimd_pm_ops,
1017         },
1018 };