[PATCH] const struct tty_operations
[linux-2.6.git] / drivers / char / pcmcia / synclink_cs.c
1 /*
2  * linux/drivers/char/pcmcia/synclink_cs.c
3  *
4  * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5  *
6  * Device driver for Microgate SyncLink PC Card
7  * multiprotocol serial adapter.
8  *
9  * written by Paul Fulghum for Microgate Corporation
10  * paulkf@microgate.com
11  *
12  * Microgate and SyncLink are trademarks of Microgate Corporation
13  *
14  * This code is released under the GNU General Public License (GPL)
15  *
16  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26  * OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 #  define BREAKPOINT() asm("   int $3");
32 #else
33 #  define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/config.h>       
39 #include <linux/module.h>
40 #include <linux/errno.h>
41 #include <linux/signal.h>
42 #include <linux/sched.h>
43 #include <linux/timer.h>
44 #include <linux/time.h>
45 #include <linux/interrupt.h>
46 #include <linux/pci.h>
47 #include <linux/tty.h>
48 #include <linux/tty_flip.h>
49 #include <linux/serial.h>
50 #include <linux/major.h>
51 #include <linux/string.h>
52 #include <linux/fcntl.h>
53 #include <linux/ptrace.h>
54 #include <linux/ioport.h>
55 #include <linux/mm.h>
56 #include <linux/slab.h>
57 #include <linux/netdevice.h>
58 #include <linux/vmalloc.h>
59 #include <linux/init.h>
60 #include <asm/serial.h>
61 #include <linux/delay.h>
62 #include <linux/ioctl.h>
63
64 #include <asm/system.h>
65 #include <asm/io.h>
66 #include <asm/irq.h>
67 #include <asm/dma.h>
68 #include <linux/bitops.h>
69 #include <asm/types.h>
70 #include <linux/termios.h>
71 #include <linux/workqueue.h>
72 #include <linux/hdlc.h>
73
74 #include <pcmcia/cs_types.h>
75 #include <pcmcia/cs.h>
76 #include <pcmcia/cistpl.h>
77 #include <pcmcia/cisreg.h>
78 #include <pcmcia/ds.h>
79
80 #ifdef CONFIG_HDLC_MODULE
81 #define CONFIG_HDLC 1
82 #endif
83
84 #define GET_USER(error,value,addr) error = get_user(value,addr)
85 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
86 #define PUT_USER(error,value,addr) error = put_user(value,addr)
87 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
88
89 #include <asm/uaccess.h>
90
91 #include "linux/synclink.h"
92
93 static MGSL_PARAMS default_params = {
94         MGSL_MODE_HDLC,                 /* unsigned long mode */
95         0,                              /* unsigned char loopback; */
96         HDLC_FLAG_UNDERRUN_ABORT15,     /* unsigned short flags; */
97         HDLC_ENCODING_NRZI_SPACE,       /* unsigned char encoding; */
98         0,                              /* unsigned long clock_speed; */
99         0xff,                           /* unsigned char addr_filter; */
100         HDLC_CRC_16_CCITT,              /* unsigned short crc_type; */
101         HDLC_PREAMBLE_LENGTH_8BITS,     /* unsigned char preamble_length; */
102         HDLC_PREAMBLE_PATTERN_NONE,     /* unsigned char preamble; */
103         9600,                           /* unsigned long data_rate; */
104         8,                              /* unsigned char data_bits; */
105         1,                              /* unsigned char stop_bits; */
106         ASYNC_PARITY_NONE               /* unsigned char parity; */
107 };
108
109 typedef struct
110 {
111         int count;
112         unsigned char status;
113         char data[1];
114 } RXBUF;
115
116 /* The queue of BH actions to be performed */
117
118 #define BH_RECEIVE  1
119 #define BH_TRANSMIT 2
120 #define BH_STATUS   4
121
122 #define IO_PIN_SHUTDOWN_LIMIT 100
123
124 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
125
126 struct _input_signal_events {
127         int     ri_up;  
128         int     ri_down;
129         int     dsr_up;
130         int     dsr_down;
131         int     dcd_up;
132         int     dcd_down;
133         int     cts_up;
134         int     cts_down;
135 };
136
137
138 /*
139  * Device instance data structure
140  */
141  
142 typedef struct _mgslpc_info {
143         void *if_ptr;   /* General purpose pointer (used by SPPP) */
144         int                     magic;
145         int                     flags;
146         int                     count;          /* count of opens */
147         int                     line;
148         unsigned short          close_delay;
149         unsigned short          closing_wait;   /* time to wait before closing */
150         
151         struct mgsl_icount      icount;
152         
153         struct tty_struct       *tty;
154         int                     timeout;
155         int                     x_char;         /* xon/xoff character */
156         int                     blocked_open;   /* # of blocked opens */
157         unsigned char           read_status_mask;
158         unsigned char           ignore_status_mask;     
159
160         unsigned char *tx_buf;
161         int            tx_put;
162         int            tx_get;
163         int            tx_count;
164
165         /* circular list of fixed length rx buffers */
166
167         unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
168         int            rx_buf_total_size; /* size of memory allocated for rx buffers */
169         int            rx_put;         /* index of next empty rx buffer */
170         int            rx_get;         /* index of next full rx buffer */
171         int            rx_buf_size;    /* size in bytes of single rx buffer */
172         int            rx_buf_count;   /* total number of rx buffers */
173         int            rx_frame_count; /* number of full rx buffers */
174         
175         wait_queue_head_t       open_wait;
176         wait_queue_head_t       close_wait;
177         
178         wait_queue_head_t       status_event_wait_q;
179         wait_queue_head_t       event_wait_q;
180         struct timer_list       tx_timer;       /* HDLC transmit timeout timer */
181         struct _mgslpc_info     *next_device;   /* device list link */
182
183         unsigned short imra_value;
184         unsigned short imrb_value;
185         unsigned char  pim_value;
186
187         spinlock_t lock;
188         struct work_struct task;                /* task structure for scheduling bh */
189
190         u32 max_frame_size;
191
192         u32 pending_bh;
193
194         int bh_running;
195         int bh_requested;
196         
197         int dcd_chkcount; /* check counts to prevent */
198         int cts_chkcount; /* too many IRQs if a signal */
199         int dsr_chkcount; /* is floating */
200         int ri_chkcount;
201
202         int rx_enabled;
203         int rx_overflow;
204
205         int tx_enabled;
206         int tx_active;
207         int tx_aborting;
208         u32 idle_mode;
209
210         int if_mode; /* serial interface selection (RS-232, v.35 etc) */
211
212         char device_name[25];           /* device instance name */
213
214         unsigned int io_base;   /* base I/O address of adapter */
215         unsigned int irq_level;
216         
217         MGSL_PARAMS params;             /* communications parameters */
218
219         unsigned char serial_signals;   /* current serial signal states */
220
221         char irq_occurred;              /* for diagnostics use */
222         char testing_irq;
223         unsigned int init_error;        /* startup error (DIAGS)        */
224
225         char flag_buf[MAX_ASYNC_BUFFER_SIZE];
226         BOOLEAN drop_rts_on_tx_done;
227
228         struct  _input_signal_events    input_signal_events;
229
230         /* PCMCIA support */
231         struct pcmcia_device    *p_dev;
232         dev_node_t            node;
233         int                   stop;
234
235         /* SPPP/Cisco HDLC device parts */
236         int netcount;
237         int dosyncppp;
238         spinlock_t netlock;
239
240 #ifdef CONFIG_HDLC
241         struct net_device *netdev;
242 #endif
243
244 } MGSLPC_INFO;
245
246 #define MGSLPC_MAGIC 0x5402
247
248 /*
249  * The size of the serial xmit buffer is 1 page, or 4096 bytes
250  */
251 #define TXBUFSIZE 4096
252
253     
254 #define CHA     0x00   /* channel A offset */
255 #define CHB     0x40   /* channel B offset */
256
257 /*
258  *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
259  */
260 #undef PVR
261
262 #define RXFIFO  0
263 #define TXFIFO  0
264 #define STAR    0x20
265 #define CMDR    0x20
266 #define RSTA    0x21
267 #define PRE     0x21
268 #define MODE    0x22
269 #define TIMR    0x23
270 #define XAD1    0x24
271 #define XAD2    0x25
272 #define RAH1    0x26
273 #define RAH2    0x27
274 #define DAFO    0x27
275 #define RAL1    0x28
276 #define RFC     0x28
277 #define RHCR    0x29
278 #define RAL2    0x29
279 #define RBCL    0x2a
280 #define XBCL    0x2a
281 #define RBCH    0x2b
282 #define XBCH    0x2b
283 #define CCR0    0x2c
284 #define CCR1    0x2d
285 #define CCR2    0x2e
286 #define CCR3    0x2f
287 #define VSTR    0x34
288 #define BGR     0x34
289 #define RLCR    0x35
290 #define AML     0x36
291 #define AMH     0x37
292 #define GIS     0x38
293 #define IVA     0x38
294 #define IPC     0x39
295 #define ISR     0x3a
296 #define IMR     0x3a
297 #define PVR     0x3c
298 #define PIS     0x3d
299 #define PIM     0x3d
300 #define PCR     0x3e
301 #define CCR4    0x3f
302     
303 // IMR/ISR
304     
305 #define IRQ_BREAK_ON    BIT15   // rx break detected
306 #define IRQ_DATAOVERRUN BIT14   // receive data overflow
307 #define IRQ_ALLSENT     BIT13   // all sent
308 #define IRQ_UNDERRUN    BIT12   // transmit data underrun
309 #define IRQ_TIMER       BIT11   // timer interrupt
310 #define IRQ_CTS         BIT10   // CTS status change
311 #define IRQ_TXREPEAT    BIT9    // tx message repeat
312 #define IRQ_TXFIFO      BIT8    // transmit pool ready
313 #define IRQ_RXEOM       BIT7    // receive message end
314 #define IRQ_EXITHUNT    BIT6    // receive frame start
315 #define IRQ_RXTIME      BIT6    // rx char timeout
316 #define IRQ_DCD         BIT2    // carrier detect status change
317 #define IRQ_OVERRUN     BIT1    // receive frame overflow
318 #define IRQ_RXFIFO      BIT0    // receive pool full
319     
320 // STAR
321     
322 #define XFW   BIT6              // transmit FIFO write enable
323 #define CEC   BIT2              // command executing
324 #define CTS   BIT1              // CTS state
325     
326 #define PVR_DTR      BIT0
327 #define PVR_DSR      BIT1
328 #define PVR_RI       BIT2
329 #define PVR_AUTOCTS  BIT3
330 #define PVR_RS232    0x20   /* 0010b */
331 #define PVR_V35      0xe0   /* 1110b */
332 #define PVR_RS422    0x40   /* 0100b */
333     
334 /* Register access functions */ 
335     
336 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
337 #define read_reg(info, reg) inb((info)->io_base + (reg))
338
339 #define read_reg16(info, reg) inw((info)->io_base + (reg))  
340 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
341     
342 #define set_reg_bits(info, reg, mask) \
343     write_reg(info, (reg), \
344                  (unsigned char) (read_reg(info, (reg)) | (mask)))  
345 #define clear_reg_bits(info, reg, mask) \
346     write_reg(info, (reg), \
347                  (unsigned char) (read_reg(info, (reg)) & ~(mask)))  
348 /*
349  * interrupt enable/disable routines
350  */ 
351 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask) 
352 {
353         if (channel == CHA) {
354                 info->imra_value |= mask;
355                 write_reg16(info, CHA + IMR, info->imra_value);
356         } else {
357                 info->imrb_value |= mask;
358                 write_reg16(info, CHB + IMR, info->imrb_value);
359         }
360 }
361 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask) 
362 {
363         if (channel == CHA) {
364                 info->imra_value &= ~mask;
365                 write_reg16(info, CHA + IMR, info->imra_value);
366         } else {
367                 info->imrb_value &= ~mask;
368                 write_reg16(info, CHB + IMR, info->imrb_value);
369         }
370 }
371
372 #define port_irq_disable(info, mask) \
373   { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
374
375 #define port_irq_enable(info, mask) \
376   { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
377
378 static void rx_start(MGSLPC_INFO *info);
379 static void rx_stop(MGSLPC_INFO *info);
380
381 static void tx_start(MGSLPC_INFO *info);
382 static void tx_stop(MGSLPC_INFO *info);
383 static void tx_set_idle(MGSLPC_INFO *info);
384
385 static void get_signals(MGSLPC_INFO *info);
386 static void set_signals(MGSLPC_INFO *info);
387
388 static void reset_device(MGSLPC_INFO *info);
389
390 static void hdlc_mode(MGSLPC_INFO *info);
391 static void async_mode(MGSLPC_INFO *info);
392
393 static void tx_timeout(unsigned long context);
394
395 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
396
397 #ifdef CONFIG_HDLC
398 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
399 static void hdlcdev_tx_done(MGSLPC_INFO *info);
400 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
401 static int  hdlcdev_init(MGSLPC_INFO *info);
402 static void hdlcdev_exit(MGSLPC_INFO *info);
403 #endif
404
405 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
406
407 static BOOLEAN register_test(MGSLPC_INFO *info);
408 static BOOLEAN irq_test(MGSLPC_INFO *info);
409 static int adapter_test(MGSLPC_INFO *info);
410
411 static int claim_resources(MGSLPC_INFO *info);
412 static void release_resources(MGSLPC_INFO *info);
413 static void mgslpc_add_device(MGSLPC_INFO *info);
414 static void mgslpc_remove_device(MGSLPC_INFO *info);
415
416 static int  rx_get_frame(MGSLPC_INFO *info);
417 static void rx_reset_buffers(MGSLPC_INFO *info);
418 static int  rx_alloc_buffers(MGSLPC_INFO *info);
419 static void rx_free_buffers(MGSLPC_INFO *info);
420
421 static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs);
422
423 /*
424  * Bottom half interrupt handlers
425  */
426 static void bh_handler(void* Context);
427 static void bh_transmit(MGSLPC_INFO *info);
428 static void bh_status(MGSLPC_INFO *info);
429
430 /*
431  * ioctl handlers
432  */
433 static int tiocmget(struct tty_struct *tty, struct file *file);
434 static int tiocmset(struct tty_struct *tty, struct file *file,
435                     unsigned int set, unsigned int clear);
436 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
437 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
438 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
439 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
440 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
441 static int set_txenable(MGSLPC_INFO *info, int enable);
442 static int tx_abort(MGSLPC_INFO *info);
443 static int set_rxenable(MGSLPC_INFO *info, int enable);
444 static int wait_events(MGSLPC_INFO *info, int __user *mask);
445
446 static MGSLPC_INFO *mgslpc_device_list = NULL;
447 static int mgslpc_device_count = 0;
448
449 /*
450  * Set this param to non-zero to load eax with the
451  * .text section address and breakpoint on module load.
452  * This is useful for use with gdb and add-symbol-file command.
453  */
454 static int break_on_load=0;
455
456 /*
457  * Driver major number, defaults to zero to get auto
458  * assigned major number. May be forced as module parameter.
459  */
460 static int ttymajor=0;
461
462 static int debug_level = 0;
463 static int maxframe[MAX_DEVICE_COUNT] = {0,};
464 static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
465
466 module_param(break_on_load, bool, 0);
467 module_param(ttymajor, int, 0);
468 module_param(debug_level, int, 0);
469 module_param_array(maxframe, int, NULL, 0);
470 module_param_array(dosyncppp, int, NULL, 0);
471
472 MODULE_LICENSE("GPL");
473
474 static char *driver_name = "SyncLink PC Card driver";
475 static char *driver_version = "$Revision: 4.34 $";
476
477 static struct tty_driver *serial_driver;
478
479 /* number of characters left in xmit buffer before we ask for more */
480 #define WAKEUP_CHARS 256
481
482 static void mgslpc_change_params(MGSLPC_INFO *info);
483 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
484
485 /* PCMCIA prototypes */
486
487 static int mgslpc_config(struct pcmcia_device *link);
488 static void mgslpc_release(u_long arg);
489 static void mgslpc_detach(struct pcmcia_device *p_dev);
490
491 /*
492  * 1st function defined in .text section. Calling this function in
493  * init_module() followed by a breakpoint allows a remote debugger
494  * (gdb) to get the .text address for the add-symbol-file command.
495  * This allows remote debugging of dynamically loadable modules.
496  */
497 static void* mgslpc_get_text_ptr(void)
498 {
499         return mgslpc_get_text_ptr;
500 }
501
502 /**
503  * line discipline callback wrappers
504  *
505  * The wrappers maintain line discipline references
506  * while calling into the line discipline.
507  *
508  * ldisc_flush_buffer - flush line discipline receive buffers
509  * ldisc_receive_buf  - pass receive data to line discipline
510  */
511
512 static void ldisc_flush_buffer(struct tty_struct *tty)
513 {
514         struct tty_ldisc *ld = tty_ldisc_ref(tty);
515         if (ld) {
516                 if (ld->flush_buffer)
517                         ld->flush_buffer(tty);
518                 tty_ldisc_deref(ld);
519         }
520 }
521
522 static void ldisc_receive_buf(struct tty_struct *tty,
523                               const __u8 *data, char *flags, int count)
524 {
525         struct tty_ldisc *ld;
526         if (!tty)
527                 return;
528         ld = tty_ldisc_ref(tty);
529         if (ld) {
530                 if (ld->receive_buf)
531                         ld->receive_buf(tty, data, flags, count);
532                 tty_ldisc_deref(ld);
533         }
534 }
535
536 static int mgslpc_probe(struct pcmcia_device *link)
537 {
538     MGSLPC_INFO *info;
539     int ret;
540
541     if (debug_level >= DEBUG_LEVEL_INFO)
542             printk("mgslpc_attach\n");
543
544     info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
545     if (!info) {
546             printk("Error can't allocate device instance data\n");
547             return -ENOMEM;
548     }
549
550     memset(info, 0, sizeof(MGSLPC_INFO));
551     info->magic = MGSLPC_MAGIC;
552     INIT_WORK(&info->task, bh_handler, info);
553     info->max_frame_size = 4096;
554     info->close_delay = 5*HZ/10;
555     info->closing_wait = 30*HZ;
556     init_waitqueue_head(&info->open_wait);
557     init_waitqueue_head(&info->close_wait);
558     init_waitqueue_head(&info->status_event_wait_q);
559     init_waitqueue_head(&info->event_wait_q);
560     spin_lock_init(&info->lock);
561     spin_lock_init(&info->netlock);
562     memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
563     info->idle_mode = HDLC_TXIDLE_FLAGS;                
564     info->imra_value = 0xffff;
565     info->imrb_value = 0xffff;
566     info->pim_value = 0xff;
567
568     info->p_dev = link;
569     link->priv = info;
570
571     /* Initialize the struct pcmcia_device structure */
572
573     /* Interrupt setup */
574     link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
575     link->irq.IRQInfo1   = IRQ_LEVEL_ID;
576     link->irq.Handler = NULL;
577
578     link->conf.Attributes = 0;
579     link->conf.IntType = INT_MEMORY_AND_IO;
580
581     ret = mgslpc_config(link);
582     if (ret)
583             return ret;
584
585     mgslpc_add_device(info);
586
587     return 0;
588 }
589
590 /* Card has been inserted.
591  */
592
593 #define CS_CHECK(fn, ret) \
594 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
595
596 static int mgslpc_config(struct pcmcia_device *link)
597 {
598     MGSLPC_INFO *info = link->priv;
599     tuple_t tuple;
600     cisparse_t parse;
601     int last_fn, last_ret;
602     u_char buf[64];
603     cistpl_cftable_entry_t dflt = { 0 };
604     cistpl_cftable_entry_t *cfg;
605     
606     if (debug_level >= DEBUG_LEVEL_INFO)
607             printk("mgslpc_config(0x%p)\n", link);
608
609     /* read CONFIG tuple to find its configuration registers */
610     tuple.DesiredTuple = CISTPL_CONFIG;
611     tuple.Attributes = 0;
612     tuple.TupleData = buf;
613     tuple.TupleDataMax = sizeof(buf);
614     tuple.TupleOffset = 0;
615     CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
616     CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
617     CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
618     link->conf.ConfigBase = parse.config.base;
619     link->conf.Present = parse.config.rmask[0];
620
621     /* get CIS configuration entry */
622
623     tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
624     CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
625
626     cfg = &(parse.cftable_entry);
627     CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
628     CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
629
630     if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
631     if (cfg->index == 0)
632             goto cs_failed;
633
634     link->conf.ConfigIndex = cfg->index;
635     link->conf.Attributes |= CONF_ENABLE_IRQ;
636         
637     /* IO window settings */
638     link->io.NumPorts1 = 0;
639     if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
640             cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
641             link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
642             if (!(io->flags & CISTPL_IO_8BIT))
643                     link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
644             if (!(io->flags & CISTPL_IO_16BIT))
645                     link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
646             link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
647             link->io.BasePort1 = io->win[0].base;
648             link->io.NumPorts1 = io->win[0].len;
649             CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
650     }
651
652     link->conf.Attributes = CONF_ENABLE_IRQ;
653     link->conf.IntType = INT_MEMORY_AND_IO;
654     link->conf.ConfigIndex = 8;
655     link->conf.Present = PRESENT_OPTION;
656     
657     link->irq.Attributes |= IRQ_HANDLE_PRESENT;
658     link->irq.Handler     = mgslpc_isr;
659     link->irq.Instance    = info;
660     CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
661
662     CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
663
664     info->io_base = link->io.BasePort1;
665     info->irq_level = link->irq.AssignedIRQ;
666
667     /* add to linked list of devices */
668     sprintf(info->node.dev_name, "mgslpc0");
669     info->node.major = info->node.minor = 0;
670     link->dev_node = &info->node;
671
672     printk(KERN_INFO "%s: index 0x%02x:",
673            info->node.dev_name, link->conf.ConfigIndex);
674     if (link->conf.Attributes & CONF_ENABLE_IRQ)
675             printk(", irq %d", link->irq.AssignedIRQ);
676     if (link->io.NumPorts1)
677             printk(", io 0x%04x-0x%04x", link->io.BasePort1,
678                    link->io.BasePort1+link->io.NumPorts1-1);
679     printk("\n");
680     return 0;
681
682 cs_failed:
683     cs_error(link, last_fn, last_ret);
684     mgslpc_release((u_long)link);
685     return -ENODEV;
686 }
687
688 /* Card has been removed.
689  * Unregister device and release PCMCIA configuration.
690  * If device is open, postpone until it is closed.
691  */
692 static void mgslpc_release(u_long arg)
693 {
694         struct pcmcia_device *link = (struct pcmcia_device *)arg;
695
696         if (debug_level >= DEBUG_LEVEL_INFO)
697                 printk("mgslpc_release(0x%p)\n", link);
698
699         pcmcia_disable_device(link);
700 }
701
702 static void mgslpc_detach(struct pcmcia_device *link)
703 {
704         if (debug_level >= DEBUG_LEVEL_INFO)
705                 printk("mgslpc_detach(0x%p)\n", link);
706
707         ((MGSLPC_INFO *)link->priv)->stop = 1;
708         mgslpc_release((u_long)link);
709
710         mgslpc_remove_device((MGSLPC_INFO *)link->priv);
711 }
712
713 static int mgslpc_suspend(struct pcmcia_device *link)
714 {
715         MGSLPC_INFO *info = link->priv;
716
717         info->stop = 1;
718
719         return 0;
720 }
721
722 static int mgslpc_resume(struct pcmcia_device *link)
723 {
724         MGSLPC_INFO *info = link->priv;
725
726         info->stop = 0;
727
728         return 0;
729 }
730
731
732 static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
733                                         char *name, const char *routine)
734 {
735 #ifdef MGSLPC_PARANOIA_CHECK
736         static const char *badmagic =
737                 "Warning: bad magic number for mgsl struct (%s) in %s\n";
738         static const char *badinfo =
739                 "Warning: null mgslpc_info for (%s) in %s\n";
740
741         if (!info) {
742                 printk(badinfo, name, routine);
743                 return 1;
744         }
745         if (info->magic != MGSLPC_MAGIC) {
746                 printk(badmagic, name, routine);
747                 return 1;
748         }
749 #else
750         if (!info)
751                 return 1;
752 #endif
753         return 0;
754 }
755
756
757 #define CMD_RXFIFO      BIT7    // release current rx FIFO
758 #define CMD_RXRESET     BIT6    // receiver reset
759 #define CMD_RXFIFO_READ BIT5
760 #define CMD_START_TIMER BIT4
761 #define CMD_TXFIFO      BIT3    // release current tx FIFO
762 #define CMD_TXEOM       BIT1    // transmit end message
763 #define CMD_TXRESET     BIT0    // transmit reset
764
765 static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel) 
766 {
767         int i = 0;
768         /* wait for command completion */ 
769         while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
770                 udelay(1);
771                 if (i++ == 1000)
772                         return FALSE;
773         }
774         return TRUE;
775 }
776
777 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd) 
778 {
779         wait_command_complete(info, channel);
780         write_reg(info, (unsigned char) (channel + CMDR), cmd);
781 }
782
783 static void tx_pause(struct tty_struct *tty)
784 {
785         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
786         unsigned long flags;
787         
788         if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
789                 return;
790         if (debug_level >= DEBUG_LEVEL_INFO)
791                 printk("tx_pause(%s)\n",info->device_name);     
792                 
793         spin_lock_irqsave(&info->lock,flags);
794         if (info->tx_enabled)
795                 tx_stop(info);
796         spin_unlock_irqrestore(&info->lock,flags);
797 }
798
799 static void tx_release(struct tty_struct *tty)
800 {
801         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
802         unsigned long flags;
803         
804         if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
805                 return;
806         if (debug_level >= DEBUG_LEVEL_INFO)
807                 printk("tx_release(%s)\n",info->device_name);   
808                 
809         spin_lock_irqsave(&info->lock,flags);
810         if (!info->tx_enabled)
811                 tx_start(info);
812         spin_unlock_irqrestore(&info->lock,flags);
813 }
814
815 /* Return next bottom half action to perform.
816  * or 0 if nothing to do.
817  */
818 static int bh_action(MGSLPC_INFO *info)
819 {
820         unsigned long flags;
821         int rc = 0;
822         
823         spin_lock_irqsave(&info->lock,flags);
824
825         if (info->pending_bh & BH_RECEIVE) {
826                 info->pending_bh &= ~BH_RECEIVE;
827                 rc = BH_RECEIVE;
828         } else if (info->pending_bh & BH_TRANSMIT) {
829                 info->pending_bh &= ~BH_TRANSMIT;
830                 rc = BH_TRANSMIT;
831         } else if (info->pending_bh & BH_STATUS) {
832                 info->pending_bh &= ~BH_STATUS;
833                 rc = BH_STATUS;
834         }
835
836         if (!rc) {
837                 /* Mark BH routine as complete */
838                 info->bh_running   = 0;
839                 info->bh_requested = 0;
840         }
841         
842         spin_unlock_irqrestore(&info->lock,flags);
843         
844         return rc;
845 }
846
847 static void bh_handler(void* Context)
848 {
849         MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
850         int action;
851
852         if (!info)
853                 return;
854                 
855         if (debug_level >= DEBUG_LEVEL_BH)
856                 printk( "%s(%d):bh_handler(%s) entry\n",
857                         __FILE__,__LINE__,info->device_name);
858         
859         info->bh_running = 1;
860
861         while((action = bh_action(info)) != 0) {
862         
863                 /* Process work item */
864                 if ( debug_level >= DEBUG_LEVEL_BH )
865                         printk( "%s(%d):bh_handler() work item action=%d\n",
866                                 __FILE__,__LINE__,action);
867
868                 switch (action) {
869                 
870                 case BH_RECEIVE:
871                         while(rx_get_frame(info));
872                         break;
873                 case BH_TRANSMIT:
874                         bh_transmit(info);
875                         break;
876                 case BH_STATUS:
877                         bh_status(info);
878                         break;
879                 default:
880                         /* unknown work item ID */
881                         printk("Unknown work item ID=%08X!\n", action);
882                         break;
883                 }
884         }
885
886         if (debug_level >= DEBUG_LEVEL_BH)
887                 printk( "%s(%d):bh_handler(%s) exit\n",
888                         __FILE__,__LINE__,info->device_name);
889 }
890
891 static void bh_transmit(MGSLPC_INFO *info)
892 {
893         struct tty_struct *tty = info->tty;
894         if (debug_level >= DEBUG_LEVEL_BH)
895                 printk("bh_transmit() entry on %s\n", info->device_name);
896
897         if (tty) {
898                 tty_wakeup(tty);
899                 wake_up_interruptible(&tty->write_wait);
900         }
901 }
902
903 static void bh_status(MGSLPC_INFO *info)
904 {
905         info->ri_chkcount = 0;
906         info->dsr_chkcount = 0;
907         info->dcd_chkcount = 0;
908         info->cts_chkcount = 0;
909 }
910
911 /* eom: non-zero = end of frame */ 
912 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
913 {
914         unsigned char data[2];
915         unsigned char fifo_count, read_count, i;
916         RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
917
918         if (debug_level >= DEBUG_LEVEL_ISR)
919                 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
920         
921         if (!info->rx_enabled)
922                 return;
923
924         if (info->rx_frame_count >= info->rx_buf_count) {
925                 /* no more free buffers */
926                 issue_command(info, CHA, CMD_RXRESET);
927                 info->pending_bh |= BH_RECEIVE;
928                 info->rx_overflow = 1;
929                 info->icount.buf_overrun++;
930                 return;
931         }
932
933         if (eom) {
934                 /* end of frame, get FIFO count from RBCL register */ 
935                 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
936                         fifo_count = 32;
937         } else
938                 fifo_count = 32;
939         
940         do {
941                 if (fifo_count == 1) {
942                         read_count = 1;
943                         data[0] = read_reg(info, CHA + RXFIFO);
944                 } else {
945                         read_count = 2;
946                         *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
947                 }
948                 fifo_count -= read_count;
949                 if (!fifo_count && eom)
950                         buf->status = data[--read_count];
951
952                 for (i = 0; i < read_count; i++) {
953                         if (buf->count >= info->max_frame_size) {
954                                 /* frame too large, reset receiver and reset current buffer */
955                                 issue_command(info, CHA, CMD_RXRESET);
956                                 buf->count = 0;
957                                 return;
958                         }
959                         *(buf->data + buf->count) = data[i];
960                         buf->count++;
961                 }
962         } while (fifo_count);
963
964         if (eom) {
965                 info->pending_bh |= BH_RECEIVE;
966                 info->rx_frame_count++;
967                 info->rx_put++;
968                 if (info->rx_put >= info->rx_buf_count)
969                         info->rx_put = 0;
970         }
971         issue_command(info, CHA, CMD_RXFIFO);
972 }
973
974 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
975 {
976         unsigned char data, status, flag;
977         int fifo_count;
978         int work = 0;
979         struct tty_struct *tty = info->tty;
980         struct mgsl_icount *icount = &info->icount;
981
982         if (tcd) {
983                 /* early termination, get FIFO count from RBCL register */ 
984                 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
985
986                 /* Zero fifo count could mean 0 or 32 bytes available.
987                  * If BIT5 of STAR is set then at least 1 byte is available.
988                  */
989                 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
990                         fifo_count = 32;
991         } else
992                 fifo_count = 32;
993
994         tty_buffer_request_room(tty, fifo_count);
995         /* Flush received async data to receive data buffer. */ 
996         while (fifo_count) {
997                 data   = read_reg(info, CHA + RXFIFO);
998                 status = read_reg(info, CHA + RXFIFO);
999                 fifo_count -= 2;
1000
1001                 icount->rx++;
1002                 flag = TTY_NORMAL;
1003
1004                 // if no frameing/crc error then save data
1005                 // BIT7:parity error
1006                 // BIT6:framing error
1007
1008                 if (status & (BIT7 + BIT6)) {
1009                         if (status & BIT7) 
1010                                 icount->parity++;
1011                         else
1012                                 icount->frame++;
1013
1014                         /* discard char if tty control flags say so */
1015                         if (status & info->ignore_status_mask)
1016                                 continue;
1017                                 
1018                         status &= info->read_status_mask;
1019
1020                         if (status & BIT7)
1021                                 flag = TTY_PARITY;
1022                         else if (status & BIT6)
1023                                 flag = TTY_FRAME;
1024                 }
1025                 work += tty_insert_flip_char(tty, data, flag);
1026         }
1027         issue_command(info, CHA, CMD_RXFIFO);
1028
1029         if (debug_level >= DEBUG_LEVEL_ISR) {
1030                 printk("%s(%d):rx_ready_async",
1031                         __FILE__,__LINE__);
1032                 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1033                         __FILE__,__LINE__,icount->rx,icount->brk,
1034                         icount->parity,icount->frame,icount->overrun);
1035         }
1036                         
1037         if (work)
1038                 tty_flip_buffer_push(tty);
1039 }
1040
1041
1042 static void tx_done(MGSLPC_INFO *info)
1043 {
1044         if (!info->tx_active)
1045                 return;
1046                         
1047         info->tx_active = 0;
1048         info->tx_aborting = 0;
1049
1050         if (info->params.mode == MGSL_MODE_ASYNC)
1051                 return;
1052
1053         info->tx_count = info->tx_put = info->tx_get = 0;
1054         del_timer(&info->tx_timer);     
1055         
1056         if (info->drop_rts_on_tx_done) {
1057                 get_signals(info);
1058                 if (info->serial_signals & SerialSignal_RTS) {
1059                         info->serial_signals &= ~SerialSignal_RTS;
1060                         set_signals(info);
1061                 }
1062                 info->drop_rts_on_tx_done = 0;
1063         }
1064
1065 #ifdef CONFIG_HDLC
1066         if (info->netcount)
1067                 hdlcdev_tx_done(info);
1068         else 
1069 #endif
1070         {
1071                 if (info->tty->stopped || info->tty->hw_stopped) {
1072                         tx_stop(info);
1073                         return;
1074                 }
1075                 info->pending_bh |= BH_TRANSMIT;
1076         }
1077 }
1078
1079 static void tx_ready(MGSLPC_INFO *info)
1080 {
1081         unsigned char fifo_count = 32;
1082         int c;
1083
1084         if (debug_level >= DEBUG_LEVEL_ISR)
1085                 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1086
1087         if (info->params.mode == MGSL_MODE_HDLC) {
1088                 if (!info->tx_active)
1089                         return;
1090         } else {
1091                 if (info->tty->stopped || info->tty->hw_stopped) {
1092                         tx_stop(info);
1093                         return;
1094                 }
1095                 if (!info->tx_count)
1096                         info->tx_active = 0;
1097         }
1098
1099         if (!info->tx_count)
1100                 return;
1101
1102         while (info->tx_count && fifo_count) {
1103                 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1104                 
1105                 if (c == 1) {
1106                         write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1107                 } else {
1108                         write_reg16(info, CHA + TXFIFO,
1109                                           *((unsigned short*)(info->tx_buf + info->tx_get)));
1110                 }
1111                 info->tx_count -= c;
1112                 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1113                 fifo_count -= c;
1114         }
1115
1116         if (info->params.mode == MGSL_MODE_ASYNC) {
1117                 if (info->tx_count < WAKEUP_CHARS)
1118                         info->pending_bh |= BH_TRANSMIT;
1119                 issue_command(info, CHA, CMD_TXFIFO);
1120         } else {
1121                 if (info->tx_count)
1122                         issue_command(info, CHA, CMD_TXFIFO);
1123                 else
1124                         issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1125         }
1126 }
1127
1128 static void cts_change(MGSLPC_INFO *info)
1129 {
1130         get_signals(info);
1131         if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1132                 irq_disable(info, CHB, IRQ_CTS);
1133         info->icount.cts++;
1134         if (info->serial_signals & SerialSignal_CTS)
1135                 info->input_signal_events.cts_up++;
1136         else
1137                 info->input_signal_events.cts_down++;
1138         wake_up_interruptible(&info->status_event_wait_q);
1139         wake_up_interruptible(&info->event_wait_q);
1140
1141         if (info->flags & ASYNC_CTS_FLOW) {
1142                 if (info->tty->hw_stopped) {
1143                         if (info->serial_signals & SerialSignal_CTS) {
1144                                 if (debug_level >= DEBUG_LEVEL_ISR)
1145                                         printk("CTS tx start...");
1146                                 if (info->tty)
1147                                         info->tty->hw_stopped = 0;
1148                                 tx_start(info);
1149                                 info->pending_bh |= BH_TRANSMIT;
1150                                 return;
1151                         }
1152                 } else {
1153                         if (!(info->serial_signals & SerialSignal_CTS)) {
1154                                 if (debug_level >= DEBUG_LEVEL_ISR)
1155                                         printk("CTS tx stop...");
1156                                 if (info->tty)
1157                                         info->tty->hw_stopped = 1;
1158                                 tx_stop(info);
1159                         }
1160                 }
1161         }
1162         info->pending_bh |= BH_STATUS;
1163 }
1164
1165 static void dcd_change(MGSLPC_INFO *info)
1166 {
1167         get_signals(info);
1168         if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1169                 irq_disable(info, CHB, IRQ_DCD);
1170         info->icount.dcd++;
1171         if (info->serial_signals & SerialSignal_DCD) {
1172                 info->input_signal_events.dcd_up++;
1173         }
1174         else
1175                 info->input_signal_events.dcd_down++;
1176 #ifdef CONFIG_HDLC
1177         if (info->netcount) {
1178                 if (info->serial_signals & SerialSignal_DCD)
1179                         netif_carrier_on(info->netdev);
1180                 else
1181                         netif_carrier_off(info->netdev);
1182         }
1183 #endif
1184         wake_up_interruptible(&info->status_event_wait_q);
1185         wake_up_interruptible(&info->event_wait_q);
1186
1187         if (info->flags & ASYNC_CHECK_CD) {
1188                 if (debug_level >= DEBUG_LEVEL_ISR)
1189                         printk("%s CD now %s...", info->device_name,
1190                                (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1191                 if (info->serial_signals & SerialSignal_DCD)
1192                         wake_up_interruptible(&info->open_wait);
1193                 else {
1194                         if (debug_level >= DEBUG_LEVEL_ISR)
1195                                 printk("doing serial hangup...");
1196                         if (info->tty)
1197                                 tty_hangup(info->tty);
1198                 }
1199         }
1200         info->pending_bh |= BH_STATUS;
1201 }
1202
1203 static void dsr_change(MGSLPC_INFO *info)
1204 {
1205         get_signals(info);
1206         if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1207                 port_irq_disable(info, PVR_DSR);
1208         info->icount.dsr++;
1209         if (info->serial_signals & SerialSignal_DSR)
1210                 info->input_signal_events.dsr_up++;
1211         else
1212                 info->input_signal_events.dsr_down++;
1213         wake_up_interruptible(&info->status_event_wait_q);
1214         wake_up_interruptible(&info->event_wait_q);
1215         info->pending_bh |= BH_STATUS;
1216 }
1217
1218 static void ri_change(MGSLPC_INFO *info)
1219 {
1220         get_signals(info);
1221         if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1222                 port_irq_disable(info, PVR_RI);
1223         info->icount.rng++;
1224         if (info->serial_signals & SerialSignal_RI)
1225                 info->input_signal_events.ri_up++;
1226         else
1227                 info->input_signal_events.ri_down++;
1228         wake_up_interruptible(&info->status_event_wait_q);
1229         wake_up_interruptible(&info->event_wait_q);
1230         info->pending_bh |= BH_STATUS;
1231 }
1232
1233 /* Interrupt service routine entry point.
1234  *      
1235  * Arguments:
1236  * 
1237  * irq     interrupt number that caused interrupt
1238  * dev_id  device ID supplied during interrupt registration
1239  * regs    interrupted processor context
1240  */
1241 static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs)
1242 {
1243         MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
1244         unsigned short isr;
1245         unsigned char gis, pis;
1246         int count=0;
1247
1248         if (debug_level >= DEBUG_LEVEL_ISR)     
1249                 printk("mgslpc_isr(%d) entry.\n", irq);
1250         if (!info)
1251                 return IRQ_NONE;
1252                 
1253         if (!(info->p_dev->_locked))
1254                 return IRQ_HANDLED;
1255
1256         spin_lock(&info->lock);
1257
1258         while ((gis = read_reg(info, CHA + GIS))) {
1259                 if (debug_level >= DEBUG_LEVEL_ISR)     
1260                         printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1261
1262                 if ((gis & 0x70) || count > 1000) {
1263                         printk("synclink_cs:hardware failed or ejected\n");
1264                         break;
1265                 }
1266                 count++;
1267
1268                 if (gis & (BIT1 + BIT0)) {
1269                         isr = read_reg16(info, CHB + ISR);
1270                         if (isr & IRQ_DCD)
1271                                 dcd_change(info);
1272                         if (isr & IRQ_CTS)
1273                                 cts_change(info);
1274                 }
1275                 if (gis & (BIT3 + BIT2))
1276                 {
1277                         isr = read_reg16(info, CHA + ISR);
1278                         if (isr & IRQ_TIMER) {
1279                                 info->irq_occurred = 1;
1280                                 irq_disable(info, CHA, IRQ_TIMER);
1281                         }
1282
1283                         /* receive IRQs */ 
1284                         if (isr & IRQ_EXITHUNT) {
1285                                 info->icount.exithunt++;
1286                                 wake_up_interruptible(&info->event_wait_q);
1287                         }
1288                         if (isr & IRQ_BREAK_ON) {
1289                                 info->icount.brk++;
1290                                 if (info->flags & ASYNC_SAK)
1291                                         do_SAK(info->tty);
1292                         }
1293                         if (isr & IRQ_RXTIME) {
1294                                 issue_command(info, CHA, CMD_RXFIFO_READ);
1295                         }
1296                         if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1297                                 if (info->params.mode == MGSL_MODE_HDLC)
1298                                         rx_ready_hdlc(info, isr & IRQ_RXEOM); 
1299                                 else
1300                                         rx_ready_async(info, isr & IRQ_RXEOM);
1301                         }
1302
1303                         /* transmit IRQs */ 
1304                         if (isr & IRQ_UNDERRUN) {
1305                                 if (info->tx_aborting)
1306                                         info->icount.txabort++;
1307                                 else
1308                                         info->icount.txunder++;
1309                                 tx_done(info);
1310                         }
1311                         else if (isr & IRQ_ALLSENT) {
1312                                 info->icount.txok++;
1313                                 tx_done(info);
1314                         }
1315                         else if (isr & IRQ_TXFIFO)
1316                                 tx_ready(info);
1317                 }
1318                 if (gis & BIT7) {
1319                         pis = read_reg(info, CHA + PIS);
1320                         if (pis & BIT1)
1321                                 dsr_change(info);
1322                         if (pis & BIT2)
1323                                 ri_change(info);
1324                 }
1325         }
1326         
1327         /* Request bottom half processing if there's something 
1328          * for it to do and the bh is not already running
1329          */
1330
1331         if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1332                 if ( debug_level >= DEBUG_LEVEL_ISR )   
1333                         printk("%s(%d):%s queueing bh task.\n",
1334                                 __FILE__,__LINE__,info->device_name);
1335                 schedule_work(&info->task);
1336                 info->bh_requested = 1;
1337         }
1338
1339         spin_unlock(&info->lock);
1340         
1341         if (debug_level >= DEBUG_LEVEL_ISR)     
1342                 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1343                        __FILE__,__LINE__,irq);
1344
1345         return IRQ_HANDLED;
1346 }
1347
1348 /* Initialize and start device.
1349  */
1350 static int startup(MGSLPC_INFO * info)
1351 {
1352         int retval = 0;
1353         
1354         if (debug_level >= DEBUG_LEVEL_INFO)
1355                 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1356                 
1357         if (info->flags & ASYNC_INITIALIZED)
1358                 return 0;
1359         
1360         if (!info->tx_buf) {
1361                 /* allocate a page of memory for a transmit buffer */
1362                 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1363                 if (!info->tx_buf) {
1364                         printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1365                                 __FILE__,__LINE__,info->device_name);
1366                         return -ENOMEM;
1367                 }
1368         }
1369
1370         info->pending_bh = 0;
1371         
1372         memset(&info->icount, 0, sizeof(info->icount));
1373
1374         init_timer(&info->tx_timer);
1375         info->tx_timer.data = (unsigned long)info;
1376         info->tx_timer.function = tx_timeout;
1377
1378         /* Allocate and claim adapter resources */
1379         retval = claim_resources(info);
1380         
1381         /* perform existance check and diagnostics */
1382         if ( !retval )
1383                 retval = adapter_test(info);
1384                 
1385         if ( retval ) {
1386                 if (capable(CAP_SYS_ADMIN) && info->tty)
1387                         set_bit(TTY_IO_ERROR, &info->tty->flags);
1388                 release_resources(info);
1389                 return retval;
1390         }
1391
1392         /* program hardware for current parameters */
1393         mgslpc_change_params(info);
1394         
1395         if (info->tty)
1396                 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1397
1398         info->flags |= ASYNC_INITIALIZED;
1399         
1400         return 0;
1401 }
1402
1403 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1404  */
1405 static void shutdown(MGSLPC_INFO * info)
1406 {
1407         unsigned long flags;
1408         
1409         if (!(info->flags & ASYNC_INITIALIZED))
1410                 return;
1411
1412         if (debug_level >= DEBUG_LEVEL_INFO)
1413                 printk("%s(%d):mgslpc_shutdown(%s)\n",
1414                          __FILE__,__LINE__, info->device_name );
1415
1416         /* clear status wait queue because status changes */
1417         /* can't happen after shutting down the hardware */
1418         wake_up_interruptible(&info->status_event_wait_q);
1419         wake_up_interruptible(&info->event_wait_q);
1420
1421         del_timer(&info->tx_timer);     
1422
1423         if (info->tx_buf) {
1424                 free_page((unsigned long) info->tx_buf);
1425                 info->tx_buf = NULL;
1426         }
1427
1428         spin_lock_irqsave(&info->lock,flags);
1429
1430         rx_stop(info);
1431         tx_stop(info);
1432
1433         /* TODO:disable interrupts instead of reset to preserve signal states */
1434         reset_device(info);
1435         
1436         if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1437                 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1438                 set_signals(info);
1439         }
1440         
1441         spin_unlock_irqrestore(&info->lock,flags);
1442
1443         release_resources(info);        
1444         
1445         if (info->tty)
1446                 set_bit(TTY_IO_ERROR, &info->tty->flags);
1447
1448         info->flags &= ~ASYNC_INITIALIZED;
1449 }
1450
1451 static void mgslpc_program_hw(MGSLPC_INFO *info)
1452 {
1453         unsigned long flags;
1454
1455         spin_lock_irqsave(&info->lock,flags);
1456         
1457         rx_stop(info);
1458         tx_stop(info);
1459         info->tx_count = info->tx_put = info->tx_get = 0;
1460         
1461         if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1462                 hdlc_mode(info);
1463         else
1464                 async_mode(info);
1465                 
1466         set_signals(info);
1467         
1468         info->dcd_chkcount = 0;
1469         info->cts_chkcount = 0;
1470         info->ri_chkcount = 0;
1471         info->dsr_chkcount = 0;
1472
1473         irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1474         port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1475         get_signals(info);
1476                 
1477         if (info->netcount || info->tty->termios->c_cflag & CREAD)
1478                 rx_start(info);
1479                 
1480         spin_unlock_irqrestore(&info->lock,flags);
1481 }
1482
1483 /* Reconfigure adapter based on new parameters
1484  */
1485 static void mgslpc_change_params(MGSLPC_INFO *info)
1486 {
1487         unsigned cflag;
1488         int bits_per_char;
1489
1490         if (!info->tty || !info->tty->termios)
1491                 return;
1492                 
1493         if (debug_level >= DEBUG_LEVEL_INFO)
1494                 printk("%s(%d):mgslpc_change_params(%s)\n",
1495                          __FILE__,__LINE__, info->device_name );
1496                          
1497         cflag = info->tty->termios->c_cflag;
1498
1499         /* if B0 rate (hangup) specified then negate DTR and RTS */
1500         /* otherwise assert DTR and RTS */
1501         if (cflag & CBAUD)
1502                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1503         else
1504                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1505         
1506         /* byte size and parity */
1507         
1508         switch (cflag & CSIZE) {
1509         case CS5: info->params.data_bits = 5; break;
1510         case CS6: info->params.data_bits = 6; break;
1511         case CS7: info->params.data_bits = 7; break;
1512         case CS8: info->params.data_bits = 8; break;
1513         default:  info->params.data_bits = 7; break;
1514         }
1515               
1516         if (cflag & CSTOPB)
1517                 info->params.stop_bits = 2;
1518         else
1519                 info->params.stop_bits = 1;
1520
1521         info->params.parity = ASYNC_PARITY_NONE;
1522         if (cflag & PARENB) {
1523                 if (cflag & PARODD)
1524                         info->params.parity = ASYNC_PARITY_ODD;
1525                 else
1526                         info->params.parity = ASYNC_PARITY_EVEN;
1527 #ifdef CMSPAR
1528                 if (cflag & CMSPAR)
1529                         info->params.parity = ASYNC_PARITY_SPACE;
1530 #endif
1531         }
1532
1533         /* calculate number of jiffies to transmit a full
1534          * FIFO (32 bytes) at specified data rate
1535          */
1536         bits_per_char = info->params.data_bits + 
1537                         info->params.stop_bits + 1;
1538
1539         /* if port data rate is set to 460800 or less then
1540          * allow tty settings to override, otherwise keep the
1541          * current data rate.
1542          */
1543         if (info->params.data_rate <= 460800) {
1544                 info->params.data_rate = tty_get_baud_rate(info->tty);
1545         }
1546         
1547         if ( info->params.data_rate ) {
1548                 info->timeout = (32*HZ*bits_per_char) / 
1549                                 info->params.data_rate;
1550         }
1551         info->timeout += HZ/50;         /* Add .02 seconds of slop */
1552
1553         if (cflag & CRTSCTS)
1554                 info->flags |= ASYNC_CTS_FLOW;
1555         else
1556                 info->flags &= ~ASYNC_CTS_FLOW;
1557                 
1558         if (cflag & CLOCAL)
1559                 info->flags &= ~ASYNC_CHECK_CD;
1560         else
1561                 info->flags |= ASYNC_CHECK_CD;
1562
1563         /* process tty input control flags */
1564         
1565         info->read_status_mask = 0;
1566         if (I_INPCK(info->tty))
1567                 info->read_status_mask |= BIT7 | BIT6;
1568         if (I_IGNPAR(info->tty))
1569                 info->ignore_status_mask |= BIT7 | BIT6;
1570
1571         mgslpc_program_hw(info);
1572 }
1573
1574 /* Add a character to the transmit buffer
1575  */
1576 static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1577 {
1578         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1579         unsigned long flags;
1580
1581         if (debug_level >= DEBUG_LEVEL_INFO) {
1582                 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1583                         __FILE__,__LINE__,ch,info->device_name);
1584         }
1585
1586         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1587                 return;
1588
1589         if (!info->tx_buf)
1590                 return;
1591
1592         spin_lock_irqsave(&info->lock,flags);
1593         
1594         if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1595                 if (info->tx_count < TXBUFSIZE - 1) {
1596                         info->tx_buf[info->tx_put++] = ch;
1597                         info->tx_put &= TXBUFSIZE-1;
1598                         info->tx_count++;
1599                 }
1600         }
1601         
1602         spin_unlock_irqrestore(&info->lock,flags);
1603 }
1604
1605 /* Enable transmitter so remaining characters in the
1606  * transmit buffer are sent.
1607  */
1608 static void mgslpc_flush_chars(struct tty_struct *tty)
1609 {
1610         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1611         unsigned long flags;
1612                                 
1613         if (debug_level >= DEBUG_LEVEL_INFO)
1614                 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1615                         __FILE__,__LINE__,info->device_name,info->tx_count);
1616         
1617         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1618                 return;
1619
1620         if (info->tx_count <= 0 || tty->stopped ||
1621             tty->hw_stopped || !info->tx_buf)
1622                 return;
1623
1624         if (debug_level >= DEBUG_LEVEL_INFO)
1625                 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1626                         __FILE__,__LINE__,info->device_name);
1627
1628         spin_lock_irqsave(&info->lock,flags);
1629         if (!info->tx_active)
1630                 tx_start(info);
1631         spin_unlock_irqrestore(&info->lock,flags);
1632 }
1633
1634 /* Send a block of data
1635  *      
1636  * Arguments:
1637  * 
1638  * tty        pointer to tty information structure
1639  * buf        pointer to buffer containing send data
1640  * count      size of send data in bytes
1641  *      
1642  * Returns: number of characters written
1643  */
1644 static int mgslpc_write(struct tty_struct * tty,
1645                         const unsigned char *buf, int count)
1646 {
1647         int c, ret = 0;
1648         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1649         unsigned long flags;
1650         
1651         if (debug_level >= DEBUG_LEVEL_INFO)
1652                 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1653                         __FILE__,__LINE__,info->device_name,count);
1654         
1655         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1656                 !info->tx_buf)
1657                 goto cleanup;
1658
1659         if (info->params.mode == MGSL_MODE_HDLC) {
1660                 if (count > TXBUFSIZE) {
1661                         ret = -EIO;
1662                         goto cleanup;
1663                 }
1664                 if (info->tx_active)
1665                         goto cleanup;
1666                 else if (info->tx_count)
1667                         goto start;
1668         }
1669
1670         for (;;) {
1671                 c = min(count,
1672                         min(TXBUFSIZE - info->tx_count - 1,
1673                             TXBUFSIZE - info->tx_put));
1674                 if (c <= 0)
1675                         break;
1676                         
1677                 memcpy(info->tx_buf + info->tx_put, buf, c);
1678
1679                 spin_lock_irqsave(&info->lock,flags);
1680                 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1681                 info->tx_count += c;
1682                 spin_unlock_irqrestore(&info->lock,flags);
1683
1684                 buf += c;
1685                 count -= c;
1686                 ret += c;
1687         }
1688 start:
1689         if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1690                 spin_lock_irqsave(&info->lock,flags);
1691                 if (!info->tx_active)
1692                         tx_start(info);
1693                 spin_unlock_irqrestore(&info->lock,flags);
1694         }
1695 cleanup:        
1696         if (debug_level >= DEBUG_LEVEL_INFO)
1697                 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1698                         __FILE__,__LINE__,info->device_name,ret);
1699         return ret;
1700 }
1701
1702 /* Return the count of free bytes in transmit buffer
1703  */
1704 static int mgslpc_write_room(struct tty_struct *tty)
1705 {
1706         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1707         int ret;
1708                                 
1709         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1710                 return 0;
1711
1712         if (info->params.mode == MGSL_MODE_HDLC) {
1713                 /* HDLC (frame oriented) mode */
1714                 if (info->tx_active)
1715                         return 0;
1716                 else
1717                         return HDLC_MAX_FRAME_SIZE;
1718         } else {
1719                 ret = TXBUFSIZE - info->tx_count - 1;
1720                 if (ret < 0)
1721                         ret = 0;
1722         }
1723         
1724         if (debug_level >= DEBUG_LEVEL_INFO)
1725                 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1726                          __FILE__,__LINE__, info->device_name, ret);
1727         return ret;
1728 }
1729
1730 /* Return the count of bytes in transmit buffer
1731  */
1732 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1733 {
1734         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1735         int rc;
1736                  
1737         if (debug_level >= DEBUG_LEVEL_INFO)
1738                 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1739                          __FILE__,__LINE__, info->device_name );
1740                          
1741         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1742                 return 0;
1743                 
1744         if (info->params.mode == MGSL_MODE_HDLC)
1745                 rc = info->tx_active ? info->max_frame_size : 0;
1746         else
1747                 rc = info->tx_count;
1748
1749         if (debug_level >= DEBUG_LEVEL_INFO)
1750                 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1751                          __FILE__,__LINE__, info->device_name, rc);
1752                          
1753         return rc;
1754 }
1755
1756 /* Discard all data in the send buffer
1757  */
1758 static void mgslpc_flush_buffer(struct tty_struct *tty)
1759 {
1760         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1761         unsigned long flags;
1762         
1763         if (debug_level >= DEBUG_LEVEL_INFO)
1764                 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1765                          __FILE__,__LINE__, info->device_name );
1766         
1767         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1768                 return;
1769                 
1770         spin_lock_irqsave(&info->lock,flags); 
1771         info->tx_count = info->tx_put = info->tx_get = 0;
1772         del_timer(&info->tx_timer);     
1773         spin_unlock_irqrestore(&info->lock,flags);
1774
1775         wake_up_interruptible(&tty->write_wait);
1776         tty_wakeup(tty);
1777 }
1778
1779 /* Send a high-priority XON/XOFF character
1780  */
1781 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1782 {
1783         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1784         unsigned long flags;
1785
1786         if (debug_level >= DEBUG_LEVEL_INFO)
1787                 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1788                          __FILE__,__LINE__, info->device_name, ch );
1789                          
1790         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1791                 return;
1792
1793         info->x_char = ch;
1794         if (ch) {
1795                 spin_lock_irqsave(&info->lock,flags);
1796                 if (!info->tx_enabled)
1797                         tx_start(info);
1798                 spin_unlock_irqrestore(&info->lock,flags);
1799         }
1800 }
1801
1802 /* Signal remote device to throttle send data (our receive data)
1803  */
1804 static void mgslpc_throttle(struct tty_struct * tty)
1805 {
1806         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1807         unsigned long flags;
1808         
1809         if (debug_level >= DEBUG_LEVEL_INFO)
1810                 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1811                          __FILE__,__LINE__, info->device_name );
1812
1813         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1814                 return;
1815         
1816         if (I_IXOFF(tty))
1817                 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1818  
1819         if (tty->termios->c_cflag & CRTSCTS) {
1820                 spin_lock_irqsave(&info->lock,flags);
1821                 info->serial_signals &= ~SerialSignal_RTS;
1822                 set_signals(info);
1823                 spin_unlock_irqrestore(&info->lock,flags);
1824         }
1825 }
1826
1827 /* Signal remote device to stop throttling send data (our receive data)
1828  */
1829 static void mgslpc_unthrottle(struct tty_struct * tty)
1830 {
1831         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1832         unsigned long flags;
1833         
1834         if (debug_level >= DEBUG_LEVEL_INFO)
1835                 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1836                          __FILE__,__LINE__, info->device_name );
1837
1838         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1839                 return;
1840         
1841         if (I_IXOFF(tty)) {
1842                 if (info->x_char)
1843                         info->x_char = 0;
1844                 else
1845                         mgslpc_send_xchar(tty, START_CHAR(tty));
1846         }
1847         
1848         if (tty->termios->c_cflag & CRTSCTS) {
1849                 spin_lock_irqsave(&info->lock,flags);
1850                 info->serial_signals |= SerialSignal_RTS;
1851                 set_signals(info);
1852                 spin_unlock_irqrestore(&info->lock,flags);
1853         }
1854 }
1855
1856 /* get the current serial statistics
1857  */
1858 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1859 {
1860         int err;
1861         if (debug_level >= DEBUG_LEVEL_INFO)
1862                 printk("get_params(%s)\n", info->device_name);
1863         if (!user_icount) {
1864                 memset(&info->icount, 0, sizeof(info->icount));
1865         } else {
1866                 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1867                 if (err)
1868                         return -EFAULT;
1869         }
1870         return 0;
1871 }
1872
1873 /* get the current serial parameters
1874  */
1875 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1876 {
1877         int err;
1878         if (debug_level >= DEBUG_LEVEL_INFO)
1879                 printk("get_params(%s)\n", info->device_name);
1880         COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1881         if (err)
1882                 return -EFAULT;
1883         return 0;
1884 }
1885
1886 /* set the serial parameters
1887  *      
1888  * Arguments:
1889  * 
1890  *      info            pointer to device instance data
1891  *      new_params      user buffer containing new serial params
1892  *
1893  * Returns:     0 if success, otherwise error code
1894  */
1895 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1896 {
1897         unsigned long flags;
1898         MGSL_PARAMS tmp_params;
1899         int err;
1900  
1901         if (debug_level >= DEBUG_LEVEL_INFO)
1902                 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1903                         info->device_name );
1904         COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1905         if (err) {
1906                 if ( debug_level >= DEBUG_LEVEL_INFO )
1907                         printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1908                                 __FILE__,__LINE__,info->device_name);
1909                 return -EFAULT;
1910         }
1911         
1912         spin_lock_irqsave(&info->lock,flags);
1913         memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1914         spin_unlock_irqrestore(&info->lock,flags);
1915         
1916         mgslpc_change_params(info);
1917         
1918         return 0;
1919 }
1920
1921 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1922 {
1923         int err;
1924         if (debug_level >= DEBUG_LEVEL_INFO)
1925                 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1926         COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1927         if (err)
1928                 return -EFAULT;
1929         return 0;
1930 }
1931
1932 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1933 {
1934         unsigned long flags;
1935         if (debug_level >= DEBUG_LEVEL_INFO)
1936                 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1937         spin_lock_irqsave(&info->lock,flags);
1938         info->idle_mode = idle_mode;
1939         tx_set_idle(info);
1940         spin_unlock_irqrestore(&info->lock,flags);
1941         return 0;
1942 }
1943
1944 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1945 {
1946         int err;
1947         if (debug_level >= DEBUG_LEVEL_INFO)
1948                 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1949         COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1950         if (err)
1951                 return -EFAULT;
1952         return 0;
1953 }
1954
1955 static int set_interface(MGSLPC_INFO * info, int if_mode)
1956 {
1957         unsigned long flags;
1958         unsigned char val;
1959         if (debug_level >= DEBUG_LEVEL_INFO)
1960                 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1961         spin_lock_irqsave(&info->lock,flags);
1962         info->if_mode = if_mode;
1963
1964         val = read_reg(info, PVR) & 0x0f;
1965         switch (info->if_mode)
1966         {
1967         case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1968         case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1969         case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1970         }
1971         write_reg(info, PVR, val);
1972
1973         spin_unlock_irqrestore(&info->lock,flags);
1974         return 0;
1975 }
1976
1977 static int set_txenable(MGSLPC_INFO * info, int enable)
1978 {
1979         unsigned long flags;
1980  
1981         if (debug_level >= DEBUG_LEVEL_INFO)
1982                 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1983                         
1984         spin_lock_irqsave(&info->lock,flags);
1985         if (enable) {
1986                 if (!info->tx_enabled)
1987                         tx_start(info);
1988         } else {
1989                 if (info->tx_enabled)
1990                         tx_stop(info);
1991         }
1992         spin_unlock_irqrestore(&info->lock,flags);
1993         return 0;
1994 }
1995
1996 static int tx_abort(MGSLPC_INFO * info)
1997 {
1998         unsigned long flags;
1999  
2000         if (debug_level >= DEBUG_LEVEL_INFO)
2001                 printk("tx_abort(%s)\n", info->device_name);
2002                         
2003         spin_lock_irqsave(&info->lock,flags);
2004         if (info->tx_active && info->tx_count &&
2005             info->params.mode == MGSL_MODE_HDLC) {
2006                 /* clear data count so FIFO is not filled on next IRQ.
2007                  * This results in underrun and abort transmission.
2008                  */
2009                 info->tx_count = info->tx_put = info->tx_get = 0;
2010                 info->tx_aborting = TRUE;
2011         }
2012         spin_unlock_irqrestore(&info->lock,flags);
2013         return 0;
2014 }
2015
2016 static int set_rxenable(MGSLPC_INFO * info, int enable)
2017 {
2018         unsigned long flags;
2019  
2020         if (debug_level >= DEBUG_LEVEL_INFO)
2021                 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
2022                         
2023         spin_lock_irqsave(&info->lock,flags);
2024         if (enable) {
2025                 if (!info->rx_enabled)
2026                         rx_start(info);
2027         } else {
2028                 if (info->rx_enabled)
2029                         rx_stop(info);
2030         }
2031         spin_unlock_irqrestore(&info->lock,flags);
2032         return 0;
2033 }
2034
2035 /* wait for specified event to occur
2036  *      
2037  * Arguments:           info    pointer to device instance data
2038  *                      mask    pointer to bitmask of events to wait for
2039  * Return Value:        0       if successful and bit mask updated with
2040  *                              of events triggerred,
2041  *                      otherwise error code
2042  */
2043 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2044 {
2045         unsigned long flags;
2046         int s;
2047         int rc=0;
2048         struct mgsl_icount cprev, cnow;
2049         int events;
2050         int mask;
2051         struct  _input_signal_events oldsigs, newsigs;
2052         DECLARE_WAITQUEUE(wait, current);
2053
2054         COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2055         if (rc)
2056                 return  -EFAULT;
2057                  
2058         if (debug_level >= DEBUG_LEVEL_INFO)
2059                 printk("wait_events(%s,%d)\n", info->device_name, mask);
2060
2061         spin_lock_irqsave(&info->lock,flags);
2062
2063         /* return immediately if state matches requested events */
2064         get_signals(info);
2065         s = info->serial_signals;
2066         events = mask &
2067                 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2068                   ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2069                   ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2070                   ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2071         if (events) {
2072                 spin_unlock_irqrestore(&info->lock,flags);
2073                 goto exit;
2074         }
2075
2076         /* save current irq counts */
2077         cprev = info->icount;
2078         oldsigs = info->input_signal_events;
2079         
2080         if ((info->params.mode == MGSL_MODE_HDLC) &&
2081             (mask & MgslEvent_ExitHuntMode))
2082                 irq_enable(info, CHA, IRQ_EXITHUNT);
2083         
2084         set_current_state(TASK_INTERRUPTIBLE);
2085         add_wait_queue(&info->event_wait_q, &wait);
2086         
2087         spin_unlock_irqrestore(&info->lock,flags);
2088         
2089         
2090         for(;;) {
2091                 schedule();
2092                 if (signal_pending(current)) {
2093                         rc = -ERESTARTSYS;
2094                         break;
2095                 }
2096                         
2097                 /* get current irq counts */
2098                 spin_lock_irqsave(&info->lock,flags);
2099                 cnow = info->icount;
2100                 newsigs = info->input_signal_events;
2101                 set_current_state(TASK_INTERRUPTIBLE);
2102                 spin_unlock_irqrestore(&info->lock,flags);
2103
2104                 /* if no change, wait aborted for some reason */
2105                 if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2106                     newsigs.dsr_down == oldsigs.dsr_down &&
2107                     newsigs.dcd_up   == oldsigs.dcd_up   &&
2108                     newsigs.dcd_down == oldsigs.dcd_down &&
2109                     newsigs.cts_up   == oldsigs.cts_up   &&
2110                     newsigs.cts_down == oldsigs.cts_down &&
2111                     newsigs.ri_up    == oldsigs.ri_up    &&
2112                     newsigs.ri_down  == oldsigs.ri_down  &&
2113                     cnow.exithunt    == cprev.exithunt   &&
2114                     cnow.rxidle      == cprev.rxidle) {
2115                         rc = -EIO;
2116                         break;
2117                 }
2118
2119                 events = mask &
2120                         ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2121                           (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2122                           (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2123                           (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2124                           (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2125                           (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2126                           (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2127                           (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2128                           (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2129                           (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2130                 if (events)
2131                         break;
2132                 
2133                 cprev = cnow;
2134                 oldsigs = newsigs;
2135         }
2136         
2137         remove_wait_queue(&info->event_wait_q, &wait);
2138         set_current_state(TASK_RUNNING);
2139
2140         if (mask & MgslEvent_ExitHuntMode) {
2141                 spin_lock_irqsave(&info->lock,flags);
2142                 if (!waitqueue_active(&info->event_wait_q))
2143                         irq_disable(info, CHA, IRQ_EXITHUNT);
2144                 spin_unlock_irqrestore(&info->lock,flags);
2145         }
2146 exit:
2147         if (rc == 0)
2148                 PUT_USER(rc, events, mask_ptr);
2149         return rc;
2150 }
2151
2152 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2153 {
2154         unsigned long flags;
2155         int rc;
2156         struct mgsl_icount cprev, cnow;
2157         DECLARE_WAITQUEUE(wait, current);
2158
2159         /* save current irq counts */
2160         spin_lock_irqsave(&info->lock,flags);
2161         cprev = info->icount;
2162         add_wait_queue(&info->status_event_wait_q, &wait);
2163         set_current_state(TASK_INTERRUPTIBLE);
2164         spin_unlock_irqrestore(&info->lock,flags);
2165
2166         for(;;) {
2167                 schedule();
2168                 if (signal_pending(current)) {
2169                         rc = -ERESTARTSYS;
2170                         break;
2171                 }
2172
2173                 /* get new irq counts */
2174                 spin_lock_irqsave(&info->lock,flags);
2175                 cnow = info->icount;
2176                 set_current_state(TASK_INTERRUPTIBLE);
2177                 spin_unlock_irqrestore(&info->lock,flags);
2178
2179                 /* if no change, wait aborted for some reason */
2180                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2181                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2182                         rc = -EIO;
2183                         break;
2184                 }
2185
2186                 /* check for change in caller specified modem input */
2187                 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2188                     (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2189                     (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2190                     (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2191                         rc = 0;
2192                         break;
2193                 }
2194
2195                 cprev = cnow;
2196         }
2197         remove_wait_queue(&info->status_event_wait_q, &wait);
2198         set_current_state(TASK_RUNNING);
2199         return rc;
2200 }
2201
2202 /* return the state of the serial control and status signals
2203  */
2204 static int tiocmget(struct tty_struct *tty, struct file *file)
2205 {
2206         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2207         unsigned int result;
2208         unsigned long flags;
2209
2210         spin_lock_irqsave(&info->lock,flags);
2211         get_signals(info);
2212         spin_unlock_irqrestore(&info->lock,flags);
2213
2214         result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2215                 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2216                 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2217                 ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2218                 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2219                 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2220
2221         if (debug_level >= DEBUG_LEVEL_INFO)
2222                 printk("%s(%d):%s tiocmget() value=%08X\n",
2223                          __FILE__,__LINE__, info->device_name, result );
2224         return result;
2225 }
2226
2227 /* set modem control signals (DTR/RTS)
2228  */
2229 static int tiocmset(struct tty_struct *tty, struct file *file,
2230                     unsigned int set, unsigned int clear)
2231 {
2232         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2233         unsigned long flags;
2234
2235         if (debug_level >= DEBUG_LEVEL_INFO)
2236                 printk("%s(%d):%s tiocmset(%x,%x)\n",
2237                         __FILE__,__LINE__,info->device_name, set, clear);
2238
2239         if (set & TIOCM_RTS)
2240                 info->serial_signals |= SerialSignal_RTS;
2241         if (set & TIOCM_DTR)
2242                 info->serial_signals |= SerialSignal_DTR;
2243         if (clear & TIOCM_RTS)
2244                 info->serial_signals &= ~SerialSignal_RTS;
2245         if (clear & TIOCM_DTR)
2246                 info->serial_signals &= ~SerialSignal_DTR;
2247
2248         spin_lock_irqsave(&info->lock,flags);
2249         set_signals(info);
2250         spin_unlock_irqrestore(&info->lock,flags);
2251
2252         return 0;
2253 }
2254
2255 /* Set or clear transmit break condition
2256  *
2257  * Arguments:           tty             pointer to tty instance data
2258  *                      break_state     -1=set break condition, 0=clear
2259  */
2260 static void mgslpc_break(struct tty_struct *tty, int break_state)
2261 {
2262         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2263         unsigned long flags;
2264         
2265         if (debug_level >= DEBUG_LEVEL_INFO)
2266                 printk("%s(%d):mgslpc_break(%s,%d)\n",
2267                          __FILE__,__LINE__, info->device_name, break_state);
2268                          
2269         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2270                 return;
2271
2272         spin_lock_irqsave(&info->lock,flags);
2273         if (break_state == -1)
2274                 set_reg_bits(info, CHA+DAFO, BIT6);
2275         else 
2276                 clear_reg_bits(info, CHA+DAFO, BIT6);
2277         spin_unlock_irqrestore(&info->lock,flags);
2278 }
2279
2280 /* Service an IOCTL request
2281  *      
2282  * Arguments:
2283  * 
2284  *      tty     pointer to tty instance data
2285  *      file    pointer to associated file object for device
2286  *      cmd     IOCTL command code
2287  *      arg     command argument/context
2288  *      
2289  * Return Value:        0 if success, otherwise error code
2290  */
2291 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2292                         unsigned int cmd, unsigned long arg)
2293 {
2294         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2295         
2296         if (debug_level >= DEBUG_LEVEL_INFO)
2297                 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2298                         info->device_name, cmd );
2299         
2300         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2301                 return -ENODEV;
2302
2303         if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2304             (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2305                 if (tty->flags & (1 << TTY_IO_ERROR))
2306                     return -EIO;
2307         }
2308
2309         return ioctl_common(info, cmd, arg);
2310 }
2311
2312 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2313 {
2314         int error;
2315         struct mgsl_icount cnow;        /* kernel counter temps */
2316         struct serial_icounter_struct __user *p_cuser;  /* user space */
2317         void __user *argp = (void __user *)arg;
2318         unsigned long flags;
2319         
2320         switch (cmd) {
2321         case MGSL_IOCGPARAMS:
2322                 return get_params(info, argp);
2323         case MGSL_IOCSPARAMS:
2324                 return set_params(info, argp);
2325         case MGSL_IOCGTXIDLE:
2326                 return get_txidle(info, argp);
2327         case MGSL_IOCSTXIDLE:
2328                 return set_txidle(info, (int)arg);
2329         case MGSL_IOCGIF:
2330                 return get_interface(info, argp);
2331         case MGSL_IOCSIF:
2332                 return set_interface(info,(int)arg);
2333         case MGSL_IOCTXENABLE:
2334                 return set_txenable(info,(int)arg);
2335         case MGSL_IOCRXENABLE:
2336                 return set_rxenable(info,(int)arg);
2337         case MGSL_IOCTXABORT:
2338                 return tx_abort(info);
2339         case MGSL_IOCGSTATS:
2340                 return get_stats(info, argp);
2341         case MGSL_IOCWAITEVENT:
2342                 return wait_events(info, argp);
2343         case TIOCMIWAIT:
2344                 return modem_input_wait(info,(int)arg);
2345         case TIOCGICOUNT:
2346                 spin_lock_irqsave(&info->lock,flags);
2347                 cnow = info->icount;
2348                 spin_unlock_irqrestore(&info->lock,flags);
2349                 p_cuser = argp;
2350                 PUT_USER(error,cnow.cts, &p_cuser->cts);
2351                 if (error) return error;
2352                 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2353                 if (error) return error;
2354                 PUT_USER(error,cnow.rng, &p_cuser->rng);
2355                 if (error) return error;
2356                 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2357                 if (error) return error;
2358                 PUT_USER(error,cnow.rx, &p_cuser->rx);
2359                 if (error) return error;
2360                 PUT_USER(error,cnow.tx, &p_cuser->tx);
2361                 if (error) return error;
2362                 PUT_USER(error,cnow.frame, &p_cuser->frame);
2363                 if (error) return error;
2364                 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2365                 if (error) return error;
2366                 PUT_USER(error,cnow.parity, &p_cuser->parity);
2367                 if (error) return error;
2368                 PUT_USER(error,cnow.brk, &p_cuser->brk);
2369                 if (error) return error;
2370                 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2371                 if (error) return error;
2372                 return 0;
2373         default:
2374                 return -ENOIOCTLCMD;
2375         }
2376         return 0;
2377 }
2378
2379 /* Set new termios settings
2380  *      
2381  * Arguments:
2382  * 
2383  *      tty             pointer to tty structure
2384  *      termios         pointer to buffer to hold returned old termios
2385  */
2386 static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
2387 {
2388         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2389         unsigned long flags;
2390         
2391         if (debug_level >= DEBUG_LEVEL_INFO)
2392                 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2393                         tty->driver->name );
2394         
2395         /* just return if nothing has changed */
2396         if ((tty->termios->c_cflag == old_termios->c_cflag)
2397             && (RELEVANT_IFLAG(tty->termios->c_iflag) 
2398                 == RELEVANT_IFLAG(old_termios->c_iflag)))
2399           return;
2400
2401         mgslpc_change_params(info);
2402
2403         /* Handle transition to B0 status */
2404         if (old_termios->c_cflag & CBAUD &&
2405             !(tty->termios->c_cflag & CBAUD)) {
2406                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2407                 spin_lock_irqsave(&info->lock,flags);
2408                 set_signals(info);
2409                 spin_unlock_irqrestore(&info->lock,flags);
2410         }
2411         
2412         /* Handle transition away from B0 status */
2413         if (!(old_termios->c_cflag & CBAUD) &&
2414             tty->termios->c_cflag & CBAUD) {
2415                 info->serial_signals |= SerialSignal_DTR;
2416                 if (!(tty->termios->c_cflag & CRTSCTS) || 
2417                     !test_bit(TTY_THROTTLED, &tty->flags)) {
2418                         info->serial_signals |= SerialSignal_RTS;
2419                 }
2420                 spin_lock_irqsave(&info->lock,flags);
2421                 set_signals(info);
2422                 spin_unlock_irqrestore(&info->lock,flags);
2423         }
2424         
2425         /* Handle turning off CRTSCTS */
2426         if (old_termios->c_cflag & CRTSCTS &&
2427             !(tty->termios->c_cflag & CRTSCTS)) {
2428                 tty->hw_stopped = 0;
2429                 tx_release(tty);
2430         }
2431 }
2432
2433 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2434 {
2435         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2436
2437         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2438                 return;
2439         
2440         if (debug_level >= DEBUG_LEVEL_INFO)
2441                 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2442                          __FILE__,__LINE__, info->device_name, info->count);
2443                          
2444         if (!info->count)
2445                 return;
2446
2447         if (tty_hung_up_p(filp))
2448                 goto cleanup;
2449                         
2450         if ((tty->count == 1) && (info->count != 1)) {
2451                 /*
2452                  * tty->count is 1 and the tty structure will be freed.
2453                  * info->count should be one in this case.
2454                  * if it's not, correct it so that the port is shutdown.
2455                  */
2456                 printk("mgslpc_close: bad refcount; tty->count is 1, "
2457                        "info->count is %d\n", info->count);
2458                 info->count = 1;
2459         }
2460         
2461         info->count--;
2462         
2463         /* if at least one open remaining, leave hardware active */
2464         if (info->count)
2465                 goto cleanup;
2466         
2467         info->flags |= ASYNC_CLOSING;
2468         
2469         /* set tty->closing to notify line discipline to 
2470          * only process XON/XOFF characters. Only the N_TTY
2471          * discipline appears to use this (ppp does not).
2472          */
2473         tty->closing = 1;
2474         
2475         /* wait for transmit data to clear all layers */
2476         
2477         if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2478                 if (debug_level >= DEBUG_LEVEL_INFO)
2479                         printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2480                                  __FILE__,__LINE__, info->device_name );
2481                 tty_wait_until_sent(tty, info->closing_wait);
2482         }
2483                 
2484         if (info->flags & ASYNC_INITIALIZED)
2485                 mgslpc_wait_until_sent(tty, info->timeout);
2486
2487         if (tty->driver->flush_buffer)
2488                 tty->driver->flush_buffer(tty);
2489
2490         ldisc_flush_buffer(tty);
2491                 
2492         shutdown(info);
2493         
2494         tty->closing = 0;
2495         info->tty = NULL;
2496         
2497         if (info->blocked_open) {
2498                 if (info->close_delay) {
2499                         msleep_interruptible(jiffies_to_msecs(info->close_delay));
2500                 }
2501                 wake_up_interruptible(&info->open_wait);
2502         }
2503         
2504         info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2505                          
2506         wake_up_interruptible(&info->close_wait);
2507         
2508 cleanup:                        
2509         if (debug_level >= DEBUG_LEVEL_INFO)
2510                 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2511                         tty->driver->name, info->count);
2512 }
2513
2514 /* Wait until the transmitter is empty.
2515  */
2516 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2517 {
2518         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2519         unsigned long orig_jiffies, char_time;
2520
2521         if (!info )
2522                 return;
2523
2524         if (debug_level >= DEBUG_LEVEL_INFO)
2525                 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2526                          __FILE__,__LINE__, info->device_name );
2527       
2528         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2529                 return;
2530
2531         if (!(info->flags & ASYNC_INITIALIZED))
2532                 goto exit;
2533          
2534         orig_jiffies = jiffies;
2535       
2536         /* Set check interval to 1/5 of estimated time to
2537          * send a character, and make it at least 1. The check
2538          * interval should also be less than the timeout.
2539          * Note: use tight timings here to satisfy the NIST-PCTS.
2540          */ 
2541        
2542         if ( info->params.data_rate ) {
2543                 char_time = info->timeout/(32 * 5);
2544                 if (!char_time)
2545                         char_time++;
2546         } else
2547                 char_time = 1;
2548                 
2549         if (timeout)
2550                 char_time = min_t(unsigned long, char_time, timeout);
2551                 
2552         if (info->params.mode == MGSL_MODE_HDLC) {
2553                 while (info->tx_active) {
2554                         msleep_interruptible(jiffies_to_msecs(char_time));
2555                         if (signal_pending(current))
2556                                 break;
2557                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2558                                 break;
2559                 }
2560         } else {
2561                 while ((info->tx_count || info->tx_active) &&
2562                         info->tx_enabled) {
2563                         msleep_interruptible(jiffies_to_msecs(char_time));
2564                         if (signal_pending(current))
2565                                 break;
2566                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2567                                 break;
2568                 }
2569         }
2570       
2571 exit:
2572         if (debug_level >= DEBUG_LEVEL_INFO)
2573                 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2574                          __FILE__,__LINE__, info->device_name );
2575 }
2576
2577 /* Called by tty_hangup() when a hangup is signaled.
2578  * This is the same as closing all open files for the port.
2579  */
2580 static void mgslpc_hangup(struct tty_struct *tty)
2581 {
2582         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2583         
2584         if (debug_level >= DEBUG_LEVEL_INFO)
2585                 printk("%s(%d):mgslpc_hangup(%s)\n",
2586                          __FILE__,__LINE__, info->device_name );
2587                          
2588         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2589                 return;
2590
2591         mgslpc_flush_buffer(tty);
2592         shutdown(info);
2593         
2594         info->count = 0;        
2595         info->flags &= ~ASYNC_NORMAL_ACTIVE;
2596         info->tty = NULL;
2597
2598         wake_up_interruptible(&info->open_wait);
2599 }
2600
2601 /* Block the current process until the specified port
2602  * is ready to be opened.
2603  */
2604 static int block_til_ready(struct tty_struct *tty, struct file *filp,
2605                            MGSLPC_INFO *info)
2606 {
2607         DECLARE_WAITQUEUE(wait, current);
2608         int             retval;
2609         int             do_clocal = 0, extra_count = 0;
2610         unsigned long   flags;
2611         
2612         if (debug_level >= DEBUG_LEVEL_INFO)
2613                 printk("%s(%d):block_til_ready on %s\n",
2614                          __FILE__,__LINE__, tty->driver->name );
2615
2616         if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2617                 /* nonblock mode is set or port is not enabled */
2618                 /* just verify that callout device is not active */
2619                 info->flags |= ASYNC_NORMAL_ACTIVE;
2620                 return 0;
2621         }
2622
2623         if (tty->termios->c_cflag & CLOCAL)
2624                 do_clocal = 1;
2625
2626         /* Wait for carrier detect and the line to become
2627          * free (i.e., not in use by the callout).  While we are in
2628          * this loop, info->count is dropped by one, so that
2629          * mgslpc_close() knows when to free things.  We restore it upon
2630          * exit, either normal or abnormal.
2631          */
2632          
2633         retval = 0;
2634         add_wait_queue(&info->open_wait, &wait);
2635         
2636         if (debug_level >= DEBUG_LEVEL_INFO)
2637                 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2638                          __FILE__,__LINE__, tty->driver->name, info->count );
2639
2640         spin_lock_irqsave(&info->lock, flags);
2641         if (!tty_hung_up_p(filp)) {
2642                 extra_count = 1;
2643                 info->count--;
2644         }
2645         spin_unlock_irqrestore(&info->lock, flags);
2646         info->blocked_open++;
2647         
2648         while (1) {
2649                 if ((tty->termios->c_cflag & CBAUD)) {
2650                         spin_lock_irqsave(&info->lock,flags);
2651                         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2652                         set_signals(info);
2653                         spin_unlock_irqrestore(&info->lock,flags);
2654                 }
2655                 
2656                 set_current_state(TASK_INTERRUPTIBLE);
2657                 
2658                 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2659                         retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2660                                         -EAGAIN : -ERESTARTSYS;
2661                         break;
2662                 }
2663                 
2664                 spin_lock_irqsave(&info->lock,flags);
2665                 get_signals(info);
2666                 spin_unlock_irqrestore(&info->lock,flags);
2667                 
2668                 if (!(info->flags & ASYNC_CLOSING) &&
2669                     (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2670                         break;
2671                 }
2672                         
2673                 if (signal_pending(current)) {
2674                         retval = -ERESTARTSYS;
2675                         break;
2676                 }
2677                 
2678                 if (debug_level >= DEBUG_LEVEL_INFO)
2679                         printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2680                                  __FILE__,__LINE__, tty->driver->name, info->count );
2681                                  
2682                 schedule();
2683         }
2684         
2685         set_current_state(TASK_RUNNING);
2686         remove_wait_queue(&info->open_wait, &wait);
2687         
2688         if (extra_count)
2689                 info->count++;
2690         info->blocked_open--;
2691         
2692         if (debug_level >= DEBUG_LEVEL_INFO)
2693                 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2694                          __FILE__,__LINE__, tty->driver->name, info->count );
2695                          
2696         if (!retval)
2697                 info->flags |= ASYNC_NORMAL_ACTIVE;
2698                 
2699         return retval;
2700 }
2701
2702 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2703 {
2704         MGSLPC_INFO     *info;
2705         int                     retval, line;
2706         unsigned long flags;
2707
2708         /* verify range of specified line number */     
2709         line = tty->index;
2710         if ((line < 0) || (line >= mgslpc_device_count)) {
2711                 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2712                         __FILE__,__LINE__,line);
2713                 return -ENODEV;
2714         }
2715
2716         /* find the info structure for the specified line */
2717         info = mgslpc_device_list;
2718         while(info && info->line != line)
2719                 info = info->next_device;
2720         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2721                 return -ENODEV;
2722         
2723         tty->driver_data = info;
2724         info->tty = tty;
2725                 
2726         if (debug_level >= DEBUG_LEVEL_INFO)
2727                 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2728                          __FILE__,__LINE__,tty->driver->name, info->count);
2729
2730         /* If port is closing, signal caller to try again */
2731         if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2732                 if (info->flags & ASYNC_CLOSING)
2733                         interruptible_sleep_on(&info->close_wait);
2734                 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2735                         -EAGAIN : -ERESTARTSYS);
2736                 goto cleanup;
2737         }
2738         
2739         info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2740
2741         spin_lock_irqsave(&info->netlock, flags);
2742         if (info->netcount) {
2743                 retval = -EBUSY;
2744                 spin_unlock_irqrestore(&info->netlock, flags);
2745                 goto cleanup;
2746         }
2747         info->count++;
2748         spin_unlock_irqrestore(&info->netlock, flags);
2749
2750         if (info->count == 1) {
2751                 /* 1st open on this device, init hardware */
2752                 retval = startup(info);
2753                 if (retval < 0)
2754                         goto cleanup;
2755         }
2756
2757         retval = block_til_ready(tty, filp, info);
2758         if (retval) {
2759                 if (debug_level >= DEBUG_LEVEL_INFO)
2760                         printk("%s(%d):block_til_ready(%s) returned %d\n",
2761                                  __FILE__,__LINE__, info->device_name, retval);
2762                 goto cleanup;
2763         }
2764
2765         if (debug_level >= DEBUG_LEVEL_INFO)
2766                 printk("%s(%d):mgslpc_open(%s) success\n",
2767                          __FILE__,__LINE__, info->device_name);
2768         retval = 0;
2769         
2770 cleanup:                        
2771         if (retval) {
2772                 if (tty->count == 1)
2773                         info->tty = NULL; /* tty layer will release tty struct */
2774                 if(info->count)
2775                         info->count--;
2776         }
2777         
2778         return retval;
2779 }
2780
2781 /*
2782  * /proc fs routines....
2783  */
2784
2785 static inline int line_info(char *buf, MGSLPC_INFO *info)
2786 {
2787         char    stat_buf[30];
2788         int     ret;
2789         unsigned long flags;
2790
2791         ret = sprintf(buf, "%s:io:%04X irq:%d",
2792                       info->device_name, info->io_base, info->irq_level);
2793
2794         /* output current serial signal states */
2795         spin_lock_irqsave(&info->lock,flags);
2796         get_signals(info);
2797         spin_unlock_irqrestore(&info->lock,flags);
2798         
2799         stat_buf[0] = 0;
2800         stat_buf[1] = 0;
2801         if (info->serial_signals & SerialSignal_RTS)
2802                 strcat(stat_buf, "|RTS");
2803         if (info->serial_signals & SerialSignal_CTS)
2804                 strcat(stat_buf, "|CTS");
2805         if (info->serial_signals & SerialSignal_DTR)
2806                 strcat(stat_buf, "|DTR");
2807         if (info->serial_signals & SerialSignal_DSR)
2808                 strcat(stat_buf, "|DSR");
2809         if (info->serial_signals & SerialSignal_DCD)
2810                 strcat(stat_buf, "|CD");
2811         if (info->serial_signals & SerialSignal_RI)
2812                 strcat(stat_buf, "|RI");
2813
2814         if (info->params.mode == MGSL_MODE_HDLC) {
2815                 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2816                               info->icount.txok, info->icount.rxok);
2817                 if (info->icount.txunder)
2818                         ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2819                 if (info->icount.txabort)
2820                         ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2821                 if (info->icount.rxshort)
2822                         ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);   
2823                 if (info->icount.rxlong)
2824                         ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2825                 if (info->icount.rxover)
2826                         ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2827                 if (info->icount.rxcrc)
2828                         ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2829         } else {
2830                 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2831                               info->icount.tx, info->icount.rx);
2832                 if (info->icount.frame)
2833                         ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2834                 if (info->icount.parity)
2835                         ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2836                 if (info->icount.brk)
2837                         ret += sprintf(buf+ret, " brk:%d", info->icount.brk);   
2838                 if (info->icount.overrun)
2839                         ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2840         }
2841         
2842         /* Append serial signal status to end */
2843         ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2844         
2845         ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2846                        info->tx_active,info->bh_requested,info->bh_running,
2847                        info->pending_bh);
2848         
2849         return ret;
2850 }
2851
2852 /* Called to print information about devices
2853  */
2854 static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2855                  int *eof, void *data)
2856 {
2857         int len = 0, l;
2858         off_t   begin = 0;
2859         MGSLPC_INFO *info;
2860         
2861         len += sprintf(page, "synclink driver:%s\n", driver_version);
2862         
2863         info = mgslpc_device_list;
2864         while( info ) {
2865                 l = line_info(page + len, info);
2866                 len += l;
2867                 if (len+begin > off+count)
2868                         goto done;
2869                 if (len+begin < off) {
2870                         begin += len;
2871                         len = 0;
2872                 }
2873                 info = info->next_device;
2874         }
2875
2876         *eof = 1;
2877 done:
2878         if (off >= len+begin)
2879                 return 0;
2880         *start = page + (off-begin);
2881         return ((count < begin+len-off) ? count : begin+len-off);
2882 }
2883
2884 static int rx_alloc_buffers(MGSLPC_INFO *info)
2885 {
2886         /* each buffer has header and data */
2887         info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2888
2889         /* calculate total allocation size for 8 buffers */
2890         info->rx_buf_total_size = info->rx_buf_size * 8;
2891
2892         /* limit total allocated memory */
2893         if (info->rx_buf_total_size > 0x10000)
2894                 info->rx_buf_total_size = 0x10000;
2895
2896         /* calculate number of buffers */
2897         info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2898
2899         info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2900         if (info->rx_buf == NULL)
2901                 return -ENOMEM;
2902
2903         rx_reset_buffers(info);
2904         return 0;
2905 }
2906
2907 static void rx_free_buffers(MGSLPC_INFO *info)
2908 {
2909         kfree(info->rx_buf);
2910         info->rx_buf = NULL;
2911 }
2912
2913 static int claim_resources(MGSLPC_INFO *info)
2914 {
2915         if (rx_alloc_buffers(info) < 0 ) {
2916                 printk( "Cant allocate rx buffer %s\n", info->device_name);
2917                 release_resources(info);
2918                 return -ENODEV;
2919         }       
2920         return 0;
2921 }
2922
2923 static void release_resources(MGSLPC_INFO *info)
2924 {
2925         if (debug_level >= DEBUG_LEVEL_INFO)
2926                 printk("release_resources(%s)\n", info->device_name);
2927         rx_free_buffers(info);
2928 }
2929
2930 /* Add the specified device instance data structure to the
2931  * global linked list of devices and increment the device count.
2932  *      
2933  * Arguments:           info    pointer to device instance data
2934  */
2935 static void mgslpc_add_device(MGSLPC_INFO *info)
2936 {
2937         info->next_device = NULL;
2938         info->line = mgslpc_device_count;
2939         sprintf(info->device_name,"ttySLP%d",info->line);
2940         
2941         if (info->line < MAX_DEVICE_COUNT) {
2942                 if (maxframe[info->line])
2943                         info->max_frame_size = maxframe[info->line];
2944                 info->dosyncppp = dosyncppp[info->line];
2945         }
2946
2947         mgslpc_device_count++;
2948         
2949         if (!mgslpc_device_list)
2950                 mgslpc_device_list = info;
2951         else {  
2952                 MGSLPC_INFO *current_dev = mgslpc_device_list;
2953                 while( current_dev->next_device )
2954                         current_dev = current_dev->next_device;
2955                 current_dev->next_device = info;
2956         }
2957         
2958         if (info->max_frame_size < 4096)
2959                 info->max_frame_size = 4096;
2960         else if (info->max_frame_size > 65535)
2961                 info->max_frame_size = 65535;
2962         
2963         printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2964                 info->device_name, info->io_base, info->irq_level);
2965
2966 #ifdef CONFIG_HDLC
2967         hdlcdev_init(info);
2968 #endif
2969 }
2970
2971 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2972 {
2973         MGSLPC_INFO *info = mgslpc_device_list;
2974         MGSLPC_INFO *last = NULL;
2975
2976         while(info) {
2977                 if (info == remove_info) {
2978                         if (last)
2979                                 last->next_device = info->next_device;
2980                         else
2981                                 mgslpc_device_list = info->next_device;
2982 #ifdef CONFIG_HDLC
2983                         hdlcdev_exit(info);
2984 #endif
2985                         release_resources(info);
2986                         kfree(info);
2987                         mgslpc_device_count--;
2988                         return;
2989                 }
2990                 last = info;
2991                 info = info->next_device;
2992         }
2993 }
2994
2995 static struct pcmcia_device_id mgslpc_ids[] = {
2996         PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2997         PCMCIA_DEVICE_NULL
2998 };
2999 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
3000
3001 static struct pcmcia_driver mgslpc_driver = {
3002         .owner          = THIS_MODULE,
3003         .drv            = {
3004                 .name   = "synclink_cs",
3005         },
3006         .probe          = mgslpc_probe,
3007         .remove         = mgslpc_detach,
3008         .id_table       = mgslpc_ids,
3009         .suspend        = mgslpc_suspend,
3010         .resume         = mgslpc_resume,
3011 };
3012
3013 static const struct tty_operations mgslpc_ops = {
3014         .open = mgslpc_open,
3015         .close = mgslpc_close,
3016         .write = mgslpc_write,
3017         .put_char = mgslpc_put_char,
3018         .flush_chars = mgslpc_flush_chars,
3019         .write_room = mgslpc_write_room,
3020         .chars_in_buffer = mgslpc_chars_in_buffer,
3021         .flush_buffer = mgslpc_flush_buffer,
3022         .ioctl = mgslpc_ioctl,
3023         .throttle = mgslpc_throttle,
3024         .unthrottle = mgslpc_unthrottle,
3025         .send_xchar = mgslpc_send_xchar,
3026         .break_ctl = mgslpc_break,
3027         .wait_until_sent = mgslpc_wait_until_sent,
3028         .read_proc = mgslpc_read_proc,
3029         .set_termios = mgslpc_set_termios,
3030         .stop = tx_pause,
3031         .start = tx_release,
3032         .hangup = mgslpc_hangup,
3033         .tiocmget = tiocmget,
3034         .tiocmset = tiocmset,
3035 };
3036
3037 static void synclink_cs_cleanup(void)
3038 {
3039         int rc;
3040
3041         printk("Unloading %s: version %s\n", driver_name, driver_version);
3042
3043         while(mgslpc_device_list)
3044                 mgslpc_remove_device(mgslpc_device_list);
3045
3046         if (serial_driver) {
3047                 if ((rc = tty_unregister_driver(serial_driver)))
3048                         printk("%s(%d) failed to unregister tty driver err=%d\n",
3049                                __FILE__,__LINE__,rc);
3050                 put_tty_driver(serial_driver);
3051         }
3052
3053         pcmcia_unregister_driver(&mgslpc_driver);
3054 }
3055
3056 static int __init synclink_cs_init(void)
3057 {
3058     int rc;
3059
3060     if (break_on_load) {
3061             mgslpc_get_text_ptr();
3062             BREAKPOINT();
3063     }
3064
3065     printk("%s %s\n", driver_name, driver_version);
3066
3067     if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3068             return rc;
3069
3070     serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3071     if (!serial_driver) {
3072             rc = -ENOMEM;
3073             goto error;
3074     }
3075
3076     /* Initialize the tty_driver structure */
3077         
3078     serial_driver->owner = THIS_MODULE;
3079     serial_driver->driver_name = "synclink_cs";
3080     serial_driver->name = "ttySLP";
3081     serial_driver->major = ttymajor;
3082     serial_driver->minor_start = 64;
3083     serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3084     serial_driver->subtype = SERIAL_TYPE_NORMAL;
3085     serial_driver->init_termios = tty_std_termios;
3086     serial_driver->init_termios.c_cflag =
3087             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3088     serial_driver->flags = TTY_DRIVER_REAL_RAW;
3089     tty_set_operations(serial_driver, &mgslpc_ops);
3090
3091     if ((rc = tty_register_driver(serial_driver)) < 0) {
3092             printk("%s(%d):Couldn't register serial driver\n",
3093                    __FILE__,__LINE__);
3094             put_tty_driver(serial_driver);
3095             serial_driver = NULL;
3096             goto error;
3097     }
3098                         
3099     printk("%s %s, tty major#%d\n",
3100            driver_name, driver_version,
3101            serial_driver->major);
3102         
3103     return 0;
3104
3105 error:
3106     synclink_cs_cleanup();
3107     return rc;
3108 }
3109
3110 static void __exit synclink_cs_exit(void) 
3111 {
3112         synclink_cs_cleanup();
3113 }
3114
3115 module_init(synclink_cs_init);
3116 module_exit(synclink_cs_exit);
3117
3118 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3119 {
3120         unsigned int M, N;
3121         unsigned char val;
3122
3123         /* note:standard BRG mode is broken in V3.2 chip 
3124          * so enhanced mode is always used 
3125          */
3126
3127         if (rate) {
3128                 N = 3686400 / rate;
3129                 if (!N)
3130                         N = 1;
3131                 N >>= 1;
3132                 for (M = 1; N > 64 && M < 16; M++)
3133                         N >>= 1;
3134                 N--;
3135
3136                 /* BGR[5..0] = N
3137                  * BGR[9..6] = M
3138                  * BGR[7..0] contained in BGR register
3139                  * BGR[9..8] contained in CCR2[7..6]
3140                  * divisor = (N+1)*2^M
3141                  *
3142                  * Note: M *must* not be zero (causes asymetric duty cycle)
3143                  */ 
3144                 write_reg(info, (unsigned char) (channel + BGR),
3145                                   (unsigned char) ((M << 6) + N));
3146                 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3147                 val |= ((M << 4) & 0xc0);
3148                 write_reg(info, (unsigned char) (channel + CCR2), val);
3149         }
3150 }
3151
3152 /* Enabled the AUX clock output at the specified frequency.
3153  */
3154 static void enable_auxclk(MGSLPC_INFO *info)
3155 {
3156         unsigned char val;
3157         
3158         /* MODE
3159          *
3160          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3161          * 05      ADM Address Mode, 0 = no addr recognition
3162          * 04      TMD Timer Mode, 0 = external
3163          * 03      RAC Receiver Active, 0 = inactive
3164          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3165          * 01      TRS Timer Resolution, 1=512
3166          * 00      TLP Test Loop, 0 = no loop
3167          *
3168          * 1000 0010
3169          */ 
3170         val = 0x82;
3171         
3172         /* channel B RTS is used to enable AUXCLK driver on SP505 */ 
3173         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3174                 val |= BIT2;
3175         write_reg(info, CHB + MODE, val);
3176         
3177         /* CCR0
3178          *
3179          * 07      PU Power Up, 1=active, 0=power down
3180          * 06      MCE Master Clock Enable, 1=enabled
3181          * 05      Reserved, 0
3182          * 04..02  SC[2..0] Encoding
3183          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3184          *
3185          * 11000000
3186          */ 
3187         write_reg(info, CHB + CCR0, 0xc0);
3188         
3189         /* CCR1
3190          *
3191          * 07      SFLG Shared Flag, 0 = disable shared flags
3192          * 06      GALP Go Active On Loop, 0 = not used
3193          * 05      GLP Go On Loop, 0 = not used
3194          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3195          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3196          * 02..00  CM[2..0] Clock Mode
3197          *
3198          * 0001 0111
3199          */ 
3200         write_reg(info, CHB + CCR1, 0x17);
3201         
3202         /* CCR2 (Channel B)
3203          *
3204          * 07..06  BGR[9..8] Baud rate bits 9..8
3205          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3206          * 04      SSEL Clock source select, 1=submode b
3207          * 03      TOE 0=TxCLK is input, 1=TxCLK is output
3208          * 02      RWX Read/Write Exchange 0=disabled
3209          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3210          * 00      DIV, data inversion 0=disabled, 1=enabled
3211          *
3212          * 0011 1000
3213          */ 
3214         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3215                 write_reg(info, CHB + CCR2, 0x38);
3216         else
3217                 write_reg(info, CHB + CCR2, 0x30);
3218         
3219         /* CCR4
3220          *
3221          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3222          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3223          * 05      TST1 Test Pin, 0=normal operation
3224          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3225          * 03..02  Reserved, must be 0
3226          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3227          *
3228          * 0101 0000
3229          */ 
3230         write_reg(info, CHB + CCR4, 0x50);
3231         
3232         /* if auxclk not enabled, set internal BRG so
3233          * CTS transitions can be detected (requires TxC)
3234          */ 
3235         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3236                 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3237         else
3238                 mgslpc_set_rate(info, CHB, 921600);
3239 }
3240
3241 static void loopback_enable(MGSLPC_INFO *info) 
3242 {
3243         unsigned char val;
3244         
3245         /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */ 
3246         val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3247         write_reg(info, CHA + CCR1, val);
3248         
3249         /* CCR2:04 SSEL Clock source select, 1=submode b */ 
3250         val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3251         write_reg(info, CHA + CCR2, val);
3252         
3253         /* set LinkSpeed if available, otherwise default to 2Mbps */ 
3254         if (info->params.clock_speed)
3255                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3256         else
3257                 mgslpc_set_rate(info, CHA, 1843200);
3258         
3259         /* MODE:00 TLP Test Loop, 1=loopback enabled */ 
3260         val = read_reg(info, CHA + MODE) | BIT0;
3261         write_reg(info, CHA + MODE, val);
3262 }
3263
3264 static void hdlc_mode(MGSLPC_INFO *info)
3265 {
3266         unsigned char val;
3267         unsigned char clkmode, clksubmode;
3268
3269         /* disable all interrupts */ 
3270         irq_disable(info, CHA, 0xffff);
3271         irq_disable(info, CHB, 0xffff);
3272         port_irq_disable(info, 0xff);
3273         
3274         /* assume clock mode 0a, rcv=RxC xmt=TxC */ 
3275         clkmode = clksubmode = 0;
3276         if (info->params.flags & HDLC_FLAG_RXC_DPLL
3277             && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3278                 /* clock mode 7a, rcv = DPLL, xmt = DPLL */ 
3279                 clkmode = 7;
3280         } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3281                  && info->params.flags & HDLC_FLAG_TXC_BRG) {
3282                 /* clock mode 7b, rcv = BRG, xmt = BRG */ 
3283                 clkmode = 7;
3284                 clksubmode = 1;
3285         } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3286                 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3287                         /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */ 
3288                         clkmode = 6;
3289                         clksubmode = 1;
3290                 } else {
3291                         /* clock mode 6a, rcv = DPLL, xmt = TxC */ 
3292                         clkmode = 6;
3293                 }
3294         } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3295                 /* clock mode 0b, rcv = RxC, xmt = BRG */ 
3296                 clksubmode = 1;
3297         }
3298         
3299         /* MODE
3300          *
3301          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3302          * 05      ADM Address Mode, 0 = no addr recognition
3303          * 04      TMD Timer Mode, 0 = external
3304          * 03      RAC Receiver Active, 0 = inactive
3305          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3306          * 01      TRS Timer Resolution, 1=512
3307          * 00      TLP Test Loop, 0 = no loop
3308          *
3309          * 1000 0010
3310          */ 
3311         val = 0x82;
3312         if (info->params.loopback)
3313                 val |= BIT0;
3314         
3315         /* preserve RTS state */ 
3316         if (info->serial_signals & SerialSignal_RTS)
3317                 val |= BIT2;
3318         write_reg(info, CHA + MODE, val);
3319         
3320         /* CCR0
3321          *
3322          * 07      PU Power Up, 1=active, 0=power down
3323          * 06      MCE Master Clock Enable, 1=enabled
3324          * 05      Reserved, 0
3325          * 04..02  SC[2..0] Encoding
3326          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3327          *
3328          * 11000000
3329          */ 
3330         val = 0xc0;
3331         switch (info->params.encoding)
3332         {
3333         case HDLC_ENCODING_NRZI:
3334                 val |= BIT3;
3335                 break;
3336         case HDLC_ENCODING_BIPHASE_SPACE:
3337                 val |= BIT4;
3338                 break;          // FM0
3339         case HDLC_ENCODING_BIPHASE_MARK:
3340                 val |= BIT4 + BIT2;
3341                 break;          // FM1
3342         case HDLC_ENCODING_BIPHASE_LEVEL:
3343                 val |= BIT4 + BIT3;
3344                 break;          // Manchester
3345         }
3346         write_reg(info, CHA + CCR0, val);
3347         
3348         /* CCR1
3349          *
3350          * 07      SFLG Shared Flag, 0 = disable shared flags
3351          * 06      GALP Go Active On Loop, 0 = not used
3352          * 05      GLP Go On Loop, 0 = not used
3353          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3354          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3355          * 02..00  CM[2..0] Clock Mode
3356          *
3357          * 0001 0000
3358          */ 
3359         val = 0x10 + clkmode;
3360         write_reg(info, CHA + CCR1, val);
3361         
3362         /* CCR2
3363          *
3364          * 07..06  BGR[9..8] Baud rate bits 9..8
3365          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3366          * 04      SSEL Clock source select, 1=submode b
3367          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3368          * 02      RWX Read/Write Exchange 0=disabled
3369          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3370          * 00      DIV, data inversion 0=disabled, 1=enabled
3371          *
3372          * 0000 0000
3373          */ 
3374         val = 0x00;
3375         if (clkmode == 2 || clkmode == 3 || clkmode == 6
3376             || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3377                 val |= BIT5;
3378         if (clksubmode)
3379                 val |= BIT4;
3380         if (info->params.crc_type == HDLC_CRC_32_CCITT)
3381                 val |= BIT1;
3382         if (info->params.encoding == HDLC_ENCODING_NRZB)
3383                 val |= BIT0;
3384         write_reg(info, CHA + CCR2, val);
3385         
3386         /* CCR3
3387          *
3388          * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3389          * 05      EPT Enable preamble transmission, 1=enabled
3390          * 04      RADD Receive address pushed to FIFO, 0=disabled
3391          * 03      CRL CRC Reset Level, 0=FFFF
3392          * 02      RCRC Rx CRC 0=On 1=Off
3393          * 01      TCRC Tx CRC 0=On 1=Off
3394          * 00      PSD DPLL Phase Shift Disable
3395          *
3396          * 0000 0000
3397          */ 
3398         val = 0x00;
3399         if (info->params.crc_type == HDLC_CRC_NONE)
3400                 val |= BIT2 + BIT1;
3401         if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3402                 val |= BIT5;
3403         switch (info->params.preamble_length)
3404         {
3405         case HDLC_PREAMBLE_LENGTH_16BITS:
3406                 val |= BIT6;
3407                 break;
3408         case HDLC_PREAMBLE_LENGTH_32BITS:
3409                 val |= BIT6;
3410                 break;
3411         case HDLC_PREAMBLE_LENGTH_64BITS:
3412                 val |= BIT7 + BIT6;
3413                 break;
3414         }
3415         write_reg(info, CHA + CCR3, val);
3416         
3417         /* PRE - Preamble pattern */ 
3418         val = 0;
3419         switch (info->params.preamble)
3420         {
3421         case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3422         case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3423         case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3424         case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3425         }
3426         write_reg(info, CHA + PRE, val);
3427         
3428         /* CCR4
3429          *
3430          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3431          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3432          * 05      TST1 Test Pin, 0=normal operation
3433          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3434          * 03..02  Reserved, must be 0
3435          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3436          *
3437          * 0101 0000
3438          */ 
3439         val = 0x50;
3440         write_reg(info, CHA + CCR4, val);
3441         if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3442                 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3443         else
3444                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3445         
3446         /* RLCR Receive length check register
3447          *
3448          * 7     1=enable receive length check
3449          * 6..0  Max frame length = (RL + 1) * 32
3450          */ 
3451         write_reg(info, CHA + RLCR, 0);
3452         
3453         /* XBCH Transmit Byte Count High
3454          *
3455          * 07      DMA mode, 0 = interrupt driven
3456          * 06      NRM, 0=ABM (ignored)
3457          * 05      CAS Carrier Auto Start
3458          * 04      XC Transmit Continuously (ignored)
3459          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3460          *
3461          * 0000 0000
3462          */ 
3463         val = 0x00;
3464         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3465                 val |= BIT5;
3466         write_reg(info, CHA + XBCH, val);
3467         enable_auxclk(info);
3468         if (info->params.loopback || info->testing_irq)
3469                 loopback_enable(info);
3470         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3471         {
3472                 irq_enable(info, CHB, IRQ_CTS);
3473                 /* PVR[3] 1=AUTO CTS active */ 
3474                 set_reg_bits(info, CHA + PVR, BIT3);
3475         } else
3476                 clear_reg_bits(info, CHA + PVR, BIT3);
3477
3478         irq_enable(info, CHA,
3479                          IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3480                          IRQ_UNDERRUN + IRQ_TXFIFO);
3481         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3482         wait_command_complete(info, CHA);
3483         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3484         
3485         /* Master clock mode enabled above to allow reset commands
3486          * to complete even if no data clocks are present.
3487          *
3488          * Disable master clock mode for normal communications because
3489          * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3490          * IRQ when in master clock mode.
3491          *
3492          * Leave master clock mode enabled for IRQ test because the
3493          * timer IRQ used by the test can only happen in master clock mode.
3494          */ 
3495         if (!info->testing_irq)
3496                 clear_reg_bits(info, CHA + CCR0, BIT6);
3497
3498         tx_set_idle(info);
3499
3500         tx_stop(info);
3501         rx_stop(info);
3502 }
3503
3504 static void rx_stop(MGSLPC_INFO *info)
3505 {
3506         if (debug_level >= DEBUG_LEVEL_ISR)
3507                 printk("%s(%d):rx_stop(%s)\n",
3508                          __FILE__,__LINE__, info->device_name );
3509                          
3510         /* MODE:03 RAC Receiver Active, 0=inactive */ 
3511         clear_reg_bits(info, CHA + MODE, BIT3);
3512
3513         info->rx_enabled = 0;
3514         info->rx_overflow = 0;
3515 }
3516
3517 static void rx_start(MGSLPC_INFO *info)
3518 {
3519         if (debug_level >= DEBUG_LEVEL_ISR)
3520                 printk("%s(%d):rx_start(%s)\n",
3521                          __FILE__,__LINE__, info->device_name );
3522
3523         rx_reset_buffers(info);
3524         info->rx_enabled = 0;
3525         info->rx_overflow = 0;
3526
3527         /* MODE:03 RAC Receiver Active, 1=active */ 
3528         set_reg_bits(info, CHA + MODE, BIT3);
3529
3530         info->rx_enabled = 1;
3531 }
3532
3533 static void tx_start(MGSLPC_INFO *info)
3534 {
3535         if (debug_level >= DEBUG_LEVEL_ISR)
3536                 printk("%s(%d):tx_start(%s)\n",
3537                          __FILE__,__LINE__, info->device_name );
3538                          
3539         if (info->tx_count) {
3540                 /* If auto RTS enabled and RTS is inactive, then assert */
3541                 /* RTS and set a flag indicating that the driver should */
3542                 /* negate RTS when the transmission completes. */
3543                 info->drop_rts_on_tx_done = 0;
3544
3545                 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3546                         get_signals(info);
3547                         if (!(info->serial_signals & SerialSignal_RTS)) {
3548                                 info->serial_signals |= SerialSignal_RTS;
3549                                 set_signals(info);
3550                                 info->drop_rts_on_tx_done = 1;
3551                         }
3552                 }
3553
3554                 if (info->params.mode == MGSL_MODE_ASYNC) {
3555                         if (!info->tx_active) {
3556                                 info->tx_active = 1;
3557                                 tx_ready(info);
3558                         }
3559                 } else {
3560                         info->tx_active = 1;
3561                         tx_ready(info);
3562                         info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
3563                         add_timer(&info->tx_timer);     
3564                 }
3565         }
3566
3567         if (!info->tx_enabled)
3568                 info->tx_enabled = 1;
3569 }
3570
3571 static void tx_stop(MGSLPC_INFO *info)
3572 {
3573         if (debug_level >= DEBUG_LEVEL_ISR)
3574                 printk("%s(%d):tx_stop(%s)\n",
3575                          __FILE__,__LINE__, info->device_name );
3576                          
3577         del_timer(&info->tx_timer);     
3578
3579         info->tx_enabled = 0;
3580         info->tx_active  = 0;
3581 }
3582
3583 /* Reset the adapter to a known state and prepare it for further use.
3584  */
3585 static void reset_device(MGSLPC_INFO *info)
3586 {
3587         /* power up both channels (set BIT7) */ 
3588         write_reg(info, CHA + CCR0, 0x80);
3589         write_reg(info, CHB + CCR0, 0x80);
3590         write_reg(info, CHA + MODE, 0);
3591         write_reg(info, CHB + MODE, 0);
3592         
3593         /* disable all interrupts */ 
3594         irq_disable(info, CHA, 0xffff);
3595         irq_disable(info, CHB, 0xffff);
3596         port_irq_disable(info, 0xff);
3597         
3598         /* PCR Port Configuration Register
3599          *
3600          * 07..04  DEC[3..0] Serial I/F select outputs
3601          * 03      output, 1=AUTO CTS control enabled
3602          * 02      RI Ring Indicator input 0=active
3603          * 01      DSR input 0=active
3604          * 00      DTR output 0=active
3605          *
3606          * 0000 0110
3607          */ 
3608         write_reg(info, PCR, 0x06);
3609         
3610         /* PVR Port Value Register
3611          *
3612          * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3613          * 03      AUTO CTS output 1=enabled
3614          * 02      RI Ring Indicator input
3615          * 01      DSR input
3616          * 00      DTR output (1=inactive)
3617          *
3618          * 0000 0001
3619          */
3620 //      write_reg(info, PVR, PVR_DTR);
3621         
3622         /* IPC Interrupt Port Configuration
3623          *
3624          * 07      VIS 1=Masked interrupts visible
3625          * 06..05  Reserved, 0
3626          * 04..03  SLA Slave address, 00 ignored
3627          * 02      CASM Cascading Mode, 1=daisy chain
3628          * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3629          *
3630          * 0000 0101
3631          */ 
3632         write_reg(info, IPC, 0x05);
3633 }
3634
3635 static void async_mode(MGSLPC_INFO *info)
3636 {
3637         unsigned char val;
3638
3639         /* disable all interrupts */ 
3640         irq_disable(info, CHA, 0xffff);
3641         irq_disable(info, CHB, 0xffff);
3642         port_irq_disable(info, 0xff);
3643         
3644         /* MODE
3645          *
3646          * 07      Reserved, 0
3647          * 06      FRTS RTS State, 0=active
3648          * 05      FCTS Flow Control on CTS
3649          * 04      FLON Flow Control Enable
3650          * 03      RAC Receiver Active, 0 = inactive
3651          * 02      RTS 0=Auto RTS, 1=manual RTS
3652          * 01      TRS Timer Resolution, 1=512
3653          * 00      TLP Test Loop, 0 = no loop
3654          *
3655          * 0000 0110
3656          */ 
3657         val = 0x06;
3658         if (info->params.loopback)
3659                 val |= BIT0;
3660         
3661         /* preserve RTS state */ 
3662         if (!(info->serial_signals & SerialSignal_RTS))
3663                 val |= BIT6;
3664         write_reg(info, CHA + MODE, val);
3665         
3666         /* CCR0
3667          *
3668          * 07      PU Power Up, 1=active, 0=power down
3669          * 06      MCE Master Clock Enable, 1=enabled
3670          * 05      Reserved, 0
3671          * 04..02  SC[2..0] Encoding, 000=NRZ
3672          * 01..00  SM[1..0] Serial Mode, 11=Async
3673          *
3674          * 1000 0011
3675          */ 
3676         write_reg(info, CHA + CCR0, 0x83);
3677         
3678         /* CCR1
3679          *
3680          * 07..05  Reserved, 0
3681          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3682          * 03      BCR Bit Clock Rate, 1=16x
3683          * 02..00  CM[2..0] Clock Mode, 111=BRG
3684          *
3685          * 0001 1111
3686          */ 
3687         write_reg(info, CHA + CCR1, 0x1f);
3688         
3689         /* CCR2 (channel A)
3690          *
3691          * 07..06  BGR[9..8] Baud rate bits 9..8
3692          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3693          * 04      SSEL Clock source select, 1=submode b
3694          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3695          * 02      RWX Read/Write Exchange 0=disabled
3696          * 01      Reserved, 0
3697          * 00      DIV, data inversion 0=disabled, 1=enabled
3698          *
3699          * 0001 0000
3700          */ 
3701         write_reg(info, CHA + CCR2, 0x10);
3702         
3703         /* CCR3
3704          *
3705          * 07..01  Reserved, 0
3706          * 00      PSD DPLL Phase Shift Disable
3707          *
3708          * 0000 0000
3709          */ 
3710         write_reg(info, CHA + CCR3, 0);
3711         
3712         /* CCR4
3713          *
3714          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3715          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3716          * 05      TST1 Test Pin, 0=normal operation
3717          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3718          * 03..00  Reserved, must be 0
3719          *
3720          * 0101 0000
3721          */ 
3722         write_reg(info, CHA + CCR4, 0x50);
3723         mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3724         
3725         /* DAFO Data Format
3726          *
3727          * 07      Reserved, 0
3728          * 06      XBRK transmit break, 0=normal operation
3729          * 05      Stop bits (0=1, 1=2)
3730          * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3731          * 02      PAREN Parity Enable
3732          * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3733          *
3734          */ 
3735         val = 0x00;
3736         if (info->params.data_bits != 8)
3737                 val |= BIT0;    /* 7 bits */
3738         if (info->params.stop_bits != 1)
3739                 val |= BIT5;
3740         if (info->params.parity != ASYNC_PARITY_NONE)
3741         {
3742                 val |= BIT2;    /* Parity enable */
3743                 if (info->params.parity == ASYNC_PARITY_ODD)
3744                         val |= BIT3;
3745                 else
3746                         val |= BIT4;
3747         }
3748         write_reg(info, CHA + DAFO, val);
3749         
3750         /* RFC Rx FIFO Control
3751          *
3752          * 07      Reserved, 0
3753          * 06      DPS, 1=parity bit not stored in data byte
3754          * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3755          * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3756          * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3757          * 01      Reserved, 0
3758          * 00      TCDE Terminate Char Detect Enable, 0=disabled
3759          *
3760          * 0101 1100
3761          */ 
3762         write_reg(info, CHA + RFC, 0x5c);
3763         
3764         /* RLCR Receive length check register
3765          *
3766          * Max frame length = (RL + 1) * 32
3767          */ 
3768         write_reg(info, CHA + RLCR, 0);
3769         
3770         /* XBCH Transmit Byte Count High
3771          *
3772          * 07      DMA mode, 0 = interrupt driven
3773          * 06      NRM, 0=ABM (ignored)
3774          * 05      CAS Carrier Auto Start
3775          * 04      XC Transmit Continuously (ignored)
3776          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3777          *
3778          * 0000 0000
3779          */ 
3780         val = 0x00;
3781         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3782                 val |= BIT5;
3783         write_reg(info, CHA + XBCH, val);
3784         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3785                 irq_enable(info, CHA, IRQ_CTS);
3786         
3787         /* MODE:03 RAC Receiver Active, 1=active */ 
3788         set_reg_bits(info, CHA + MODE, BIT3);
3789         enable_auxclk(info);
3790         if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3791                 irq_enable(info, CHB, IRQ_CTS);
3792                 /* PVR[3] 1=AUTO CTS active */ 
3793                 set_reg_bits(info, CHA + PVR, BIT3);
3794         } else
3795                 clear_reg_bits(info, CHA + PVR, BIT3);
3796         irq_enable(info, CHA,
3797                           IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3798                           IRQ_ALLSENT + IRQ_TXFIFO);
3799         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3800         wait_command_complete(info, CHA);
3801         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3802 }
3803
3804 /* Set the HDLC idle mode for the transmitter.
3805  */
3806 static void tx_set_idle(MGSLPC_INFO *info)
3807 {
3808         /* Note: ESCC2 only supports flags and one idle modes */ 
3809         if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3810                 set_reg_bits(info, CHA + CCR1, BIT3);
3811         else
3812                 clear_reg_bits(info, CHA + CCR1, BIT3);
3813 }
3814
3815 /* get state of the V24 status (input) signals.
3816  */
3817 static void get_signals(MGSLPC_INFO *info)
3818 {
3819         unsigned char status = 0;
3820         
3821         /* preserve DTR and RTS */ 
3822         info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3823
3824         if (read_reg(info, CHB + VSTR) & BIT7)
3825                 info->serial_signals |= SerialSignal_DCD;
3826         if (read_reg(info, CHB + STAR) & BIT1)
3827                 info->serial_signals |= SerialSignal_CTS;
3828
3829         status = read_reg(info, CHA + PVR);
3830         if (!(status & PVR_RI))
3831                 info->serial_signals |= SerialSignal_RI;
3832         if (!(status & PVR_DSR))
3833                 info->serial_signals |= SerialSignal_DSR;
3834 }
3835
3836 /* Set the state of DTR and RTS based on contents of
3837  * serial_signals member of device extension.
3838  */
3839 static void set_signals(MGSLPC_INFO *info)
3840 {
3841         unsigned char val;
3842
3843         val = read_reg(info, CHA + MODE);
3844         if (info->params.mode == MGSL_MODE_ASYNC) {
3845                 if (info->serial_signals & SerialSignal_RTS)
3846                         val &= ~BIT6;
3847                 else
3848                         val |= BIT6;
3849         } else {
3850                 if (info->serial_signals & SerialSignal_RTS)
3851                         val |= BIT2;
3852                 else
3853                         val &= ~BIT2;
3854         }
3855         write_reg(info, CHA + MODE, val);
3856
3857         if (info->serial_signals & SerialSignal_DTR)
3858                 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3859         else
3860                 set_reg_bits(info, CHA + PVR, PVR_DTR);
3861 }
3862
3863 static void rx_reset_buffers(MGSLPC_INFO *info)
3864 {
3865         RXBUF *buf;
3866         int i;
3867
3868         info->rx_put = 0;
3869         info->rx_get = 0;
3870         info->rx_frame_count = 0;
3871         for (i=0 ; i < info->rx_buf_count ; i++) {
3872                 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3873                 buf->status = buf->count = 0;
3874         }
3875 }
3876
3877 /* Attempt to return a received HDLC frame
3878  * Only frames received without errors are returned.
3879  *
3880  * Returns 1 if frame returned, otherwise 0
3881  */
3882 static int rx_get_frame(MGSLPC_INFO *info)
3883 {
3884         unsigned short status;
3885         RXBUF *buf;
3886         unsigned int framesize = 0;
3887         unsigned long flags;
3888         struct tty_struct *tty = info->tty;
3889         int return_frame = 0;
3890         
3891         if (info->rx_frame_count == 0)
3892                 return 0;
3893
3894         buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3895
3896         status = buf->status;
3897
3898         /* 07  VFR  1=valid frame
3899          * 06  RDO  1=data overrun
3900          * 05  CRC  1=OK, 0=error
3901          * 04  RAB  1=frame aborted
3902          */
3903         if ((status & 0xf0) != 0xA0) {
3904                 if (!(status & BIT7) || (status & BIT4))
3905                         info->icount.rxabort++;
3906                 else if (status & BIT6)
3907                         info->icount.rxover++;
3908                 else if (!(status & BIT5)) {
3909                         info->icount.rxcrc++;
3910                         if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3911                                 return_frame = 1;
3912                 }
3913                 framesize = 0;
3914 #ifdef CONFIG_HDLC
3915                 {
3916                         struct net_device_stats *stats = hdlc_stats(info->netdev);
3917                         stats->rx_errors++;
3918                         stats->rx_frame_errors++;
3919                 }
3920 #endif
3921         } else
3922                 return_frame = 1;
3923
3924         if (return_frame)
3925                 framesize = buf->count;
3926
3927         if (debug_level >= DEBUG_LEVEL_BH)
3928                 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3929                         __FILE__,__LINE__,info->device_name,status,framesize);
3930                         
3931         if (debug_level >= DEBUG_LEVEL_DATA)
3932                 trace_block(info, buf->data, framesize, 0);     
3933                 
3934         if (framesize) {
3935                 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3936                       framesize+1 > info->max_frame_size) ||
3937                     framesize > info->max_frame_size)
3938                         info->icount.rxlong++;
3939                 else {
3940                         if (status & BIT5)
3941                                 info->icount.rxok++;
3942
3943                         if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3944                                 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3945                                 ++framesize;
3946                         }
3947
3948 #ifdef CONFIG_HDLC
3949                         if (info->netcount)
3950                                 hdlcdev_rx(info, buf->data, framesize);
3951                         else
3952 #endif
3953                                 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3954                 }
3955         }
3956
3957         spin_lock_irqsave(&info->lock,flags);
3958         buf->status = buf->count = 0;
3959         info->rx_frame_count--;
3960         info->rx_get++;
3961         if (info->rx_get >= info->rx_buf_count)
3962                 info->rx_get = 0;
3963         spin_unlock_irqrestore(&info->lock,flags);
3964
3965         return 1;
3966 }
3967
3968 static BOOLEAN register_test(MGSLPC_INFO *info)
3969 {
3970         static unsigned char patterns[] = 
3971             { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3972         static unsigned int count = ARRAY_SIZE(patterns);
3973         unsigned int i;
3974         BOOLEAN rc = TRUE;
3975         unsigned long flags;
3976
3977         spin_lock_irqsave(&info->lock,flags);
3978         reset_device(info);
3979
3980         for (i = 0; i < count; i++) {
3981                 write_reg(info, XAD1, patterns[i]);
3982                 write_reg(info, XAD2, patterns[(i + 1) % count]);
3983                 if ((read_reg(info, XAD1) != patterns[i]) ||
3984                     (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3985                         rc = FALSE;
3986                         break;
3987                 }
3988         }
3989
3990         spin_unlock_irqrestore(&info->lock,flags);
3991         return rc;
3992 }
3993
3994 static BOOLEAN irq_test(MGSLPC_INFO *info)
3995 {
3996         unsigned long end_time;
3997         unsigned long flags;
3998
3999         spin_lock_irqsave(&info->lock,flags);
4000         reset_device(info);
4001
4002         info->testing_irq = TRUE;
4003         hdlc_mode(info);
4004
4005         info->irq_occurred = FALSE;
4006
4007         /* init hdlc mode */
4008
4009         irq_enable(info, CHA, IRQ_TIMER);
4010         write_reg(info, CHA + TIMR, 0); /* 512 cycles */
4011         issue_command(info, CHA, CMD_START_TIMER);
4012
4013         spin_unlock_irqrestore(&info->lock,flags);
4014
4015         end_time=100;
4016         while(end_time-- && !info->irq_occurred) {
4017                 msleep_interruptible(10);
4018         }
4019         
4020         info->testing_irq = FALSE;
4021
4022         spin_lock_irqsave(&info->lock,flags);
4023         reset_device(info);
4024         spin_unlock_irqrestore(&info->lock,flags);
4025         
4026         return info->irq_occurred ? TRUE : FALSE;
4027 }
4028
4029 static int adapter_test(MGSLPC_INFO *info)
4030 {
4031         if (!register_test(info)) {
4032                 info->init_error = DiagStatus_AddressFailure;
4033                 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4034                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4035                 return -ENODEV;
4036         }
4037
4038         if (!irq_test(info)) {
4039                 info->init_error = DiagStatus_IrqFailure;
4040                 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4041                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4042                 return -ENODEV;
4043         }
4044
4045         if (debug_level >= DEBUG_LEVEL_INFO)
4046                 printk("%s(%d):device %s passed diagnostics\n",
4047                         __FILE__,__LINE__,info->device_name);
4048         return 0;
4049 }
4050
4051 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4052 {
4053         int i;
4054         int linecount;
4055         if (xmit)
4056                 printk("%s tx data:\n",info->device_name);
4057         else
4058                 printk("%s rx data:\n",info->device_name);
4059                 
4060         while(count) {
4061                 if (count > 16)
4062                         linecount = 16;
4063                 else
4064                         linecount = count;
4065                         
4066                 for(i=0;i<linecount;i++)
4067                         printk("%02X ",(unsigned char)data[i]);
4068                 for(;i<17;i++)
4069                         printk("   ");
4070                 for(i=0;i<linecount;i++) {
4071                         if (data[i]>=040 && data[i]<=0176)
4072                                 printk("%c",data[i]);
4073                         else
4074                                 printk(".");
4075                 }
4076                 printk("\n");
4077                 
4078                 data  += linecount;
4079                 count -= linecount;
4080         }
4081 }
4082
4083 /* HDLC frame time out
4084  * update stats and do tx completion processing
4085  */
4086 static void tx_timeout(unsigned long context)
4087 {
4088         MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4089         unsigned long flags;
4090         
4091         if ( debug_level >= DEBUG_LEVEL_INFO )
4092                 printk( "%s(%d):tx_timeout(%s)\n",
4093                         __FILE__,__LINE__,info->device_name);
4094         if(info->tx_active &&
4095            info->params.mode == MGSL_MODE_HDLC) {
4096                 info->icount.txtimeout++;
4097         }
4098         spin_lock_irqsave(&info->lock,flags);
4099         info->tx_active = 0;
4100         info->tx_count = info->tx_put = info->tx_get = 0;
4101
4102         spin_unlock_irqrestore(&info->lock,flags);
4103         
4104 #ifdef CONFIG_HDLC
4105         if (info->netcount)
4106                 hdlcdev_tx_done(info);
4107         else
4108 #endif
4109                 bh_transmit(info);
4110 }
4111
4112 #ifdef CONFIG_HDLC
4113
4114 /**
4115  * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4116  * set encoding and frame check sequence (FCS) options
4117  *
4118  * dev       pointer to network device structure
4119  * encoding  serial encoding setting
4120  * parity    FCS setting
4121  *
4122  * returns 0 if success, otherwise error code
4123  */
4124 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4125                           unsigned short parity)
4126 {
4127         MGSLPC_INFO *info = dev_to_port(dev);
4128         unsigned char  new_encoding;
4129         unsigned short new_crctype;
4130
4131         /* return error if TTY interface open */
4132         if (info->count)
4133                 return -EBUSY;
4134
4135         switch (encoding)
4136         {
4137         case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
4138         case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4139         case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4140         case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4141         case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4142         default: return -EINVAL;
4143         }
4144
4145         switch (parity)
4146         {
4147         case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
4148         case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4149         case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4150         default: return -EINVAL;
4151         }
4152
4153         info->params.encoding = new_encoding;
4154         info->params.crc_type = new_crctype;
4155
4156         /* if network interface up, reprogram hardware */
4157         if (info->netcount)
4158                 mgslpc_program_hw(info);
4159
4160         return 0;
4161 }
4162
4163 /**
4164  * called by generic HDLC layer to send frame
4165  *
4166  * skb  socket buffer containing HDLC frame
4167  * dev  pointer to network device structure
4168  *
4169  * returns 0 if success, otherwise error code
4170  */
4171 static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4172 {
4173         MGSLPC_INFO *info = dev_to_port(dev);
4174         struct net_device_stats *stats = hdlc_stats(dev);
4175         unsigned long flags;
4176
4177         if (debug_level >= DEBUG_LEVEL_INFO)
4178                 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4179
4180         /* stop sending until this frame completes */
4181         netif_stop_queue(dev);
4182
4183         /* copy data to device buffers */
4184         memcpy(info->tx_buf, skb->data, skb->len);
4185         info->tx_get = 0;
4186         info->tx_put = info->tx_count = skb->len;
4187
4188         /* update network statistics */
4189         stats->tx_packets++;
4190         stats->tx_bytes += skb->len;
4191
4192         /* done with socket buffer, so free it */
4193         dev_kfree_skb(skb);
4194
4195         /* save start time for transmit timeout detection */
4196         dev->trans_start = jiffies;
4197
4198         /* start hardware transmitter if necessary */
4199         spin_lock_irqsave(&info->lock,flags);
4200         if (!info->tx_active)
4201                 tx_start(info);
4202         spin_unlock_irqrestore(&info->lock,flags);
4203
4204         return 0;
4205 }
4206
4207 /**
4208  * called by network layer when interface enabled
4209  * claim resources and initialize hardware
4210  *
4211  * dev  pointer to network device structure
4212  *
4213  * returns 0 if success, otherwise error code
4214  */
4215 static int hdlcdev_open(struct net_device *dev)
4216 {
4217         MGSLPC_INFO *info = dev_to_port(dev);
4218         int rc;
4219         unsigned long flags;
4220
4221         if (debug_level >= DEBUG_LEVEL_INFO)
4222                 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4223
4224         /* generic HDLC layer open processing */
4225         if ((rc = hdlc_open(dev)))
4226                 return rc;
4227
4228         /* arbitrate between network and tty opens */
4229         spin_lock_irqsave(&info->netlock, flags);
4230         if (info->count != 0 || info->netcount != 0) {
4231                 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4232                 spin_unlock_irqrestore(&info->netlock, flags);
4233                 return -EBUSY;
4234         }
4235         info->netcount=1;
4236         spin_unlock_irqrestore(&info->netlock, flags);
4237
4238         /* claim resources and init adapter */
4239         if ((rc = startup(info)) != 0) {
4240                 spin_lock_irqsave(&info->netlock, flags);
4241                 info->netcount=0;
4242                 spin_unlock_irqrestore(&info->netlock, flags);
4243                 return rc;
4244         }
4245
4246         /* assert DTR and RTS, apply hardware settings */
4247         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4248         mgslpc_program_hw(info);
4249
4250         /* enable network layer transmit */
4251         dev->trans_start = jiffies;
4252         netif_start_queue(dev);
4253
4254         /* inform generic HDLC layer of current DCD status */
4255         spin_lock_irqsave(&info->lock, flags);
4256         get_signals(info);
4257         spin_unlock_irqrestore(&info->lock, flags);
4258         if (info->serial_signals & SerialSignal_DCD)
4259                 netif_carrier_on(dev);
4260         else
4261                 netif_carrier_off(dev);
4262         return 0;
4263 }
4264
4265 /**
4266  * called by network layer when interface is disabled
4267  * shutdown hardware and release resources
4268  *
4269  * dev  pointer to network device structure
4270  *
4271  * returns 0 if success, otherwise error code
4272  */
4273 static int hdlcdev_close(struct net_device *dev)
4274 {
4275         MGSLPC_INFO *info = dev_to_port(dev);
4276         unsigned long flags;
4277
4278         if (debug_level >= DEBUG_LEVEL_INFO)
4279                 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4280
4281         netif_stop_queue(dev);
4282
4283         /* shutdown adapter and release resources */
4284         shutdown(info);
4285
4286         hdlc_close(dev);
4287
4288         spin_lock_irqsave(&info->netlock, flags);
4289         info->netcount=0;
4290         spin_unlock_irqrestore(&info->netlock, flags);
4291
4292         return 0;
4293 }
4294
4295 /**
4296  * called by network layer to process IOCTL call to network device
4297  *
4298  * dev  pointer to network device structure
4299  * ifr  pointer to network interface request structure
4300  * cmd  IOCTL command code
4301  *
4302  * returns 0 if success, otherwise error code
4303  */
4304 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4305 {
4306         const size_t size = sizeof(sync_serial_settings);
4307         sync_serial_settings new_line;
4308         sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4309         MGSLPC_INFO *info = dev_to_port(dev);
4310         unsigned int flags;
4311
4312         if (debug_level >= DEBUG_LEVEL_INFO)
4313                 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4314
4315         /* return error if TTY interface open */
4316         if (info->count)
4317                 return -EBUSY;
4318
4319         if (cmd != SIOCWANDEV)
4320                 return hdlc_ioctl(dev, ifr, cmd);
4321
4322         switch(ifr->ifr_settings.type) {
4323         case IF_GET_IFACE: /* return current sync_serial_settings */
4324
4325                 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4326                 if (ifr->ifr_settings.size < size) {
4327                         ifr->ifr_settings.size = size; /* data size wanted */
4328                         return -ENOBUFS;
4329                 }
4330
4331                 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4332                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4333                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4334                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4335
4336                 switch (flags){
4337                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4338                 case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4339                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4340                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4341                 default: new_line.clock_type = CLOCK_DEFAULT;
4342                 }
4343
4344                 new_line.clock_rate = info->params.clock_speed;
4345                 new_line.loopback   = info->params.loopback ? 1:0;
4346
4347                 if (copy_to_user(line, &new_line, size))
4348                         return -EFAULT;
4349                 return 0;
4350
4351         case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4352
4353                 if(!capable(CAP_NET_ADMIN))
4354                         return -EPERM;
4355                 if (copy_from_user(&new_line, line, size))
4356                         return -EFAULT;
4357
4358                 switch (new_line.clock_type)
4359                 {
4360                 case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4361                 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4362                 case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4363                 case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4364                 case CLOCK_DEFAULT:  flags = info->params.flags &
4365                                              (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4366                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4367                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4368                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4369                 default: return -EINVAL;
4370                 }
4371
4372                 if (new_line.loopback != 0 && new_line.loopback != 1)
4373                         return -EINVAL;
4374
4375                 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4376                                         HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4377                                         HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4378                                         HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4379                 info->params.flags |= flags;
4380
4381                 info->params.loopback = new_line.loopback;
4382
4383                 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4384                         info->params.clock_speed = new_line.clock_rate;
4385                 else
4386                         info->params.clock_speed = 0;
4387
4388                 /* if network interface up, reprogram hardware */
4389                 if (info->netcount)
4390                         mgslpc_program_hw(info);
4391                 return 0;
4392
4393         default:
4394                 return hdlc_ioctl(dev, ifr, cmd);
4395         }
4396 }
4397
4398 /**
4399  * called by network layer when transmit timeout is detected
4400  *
4401  * dev  pointer to network device structure
4402  */
4403 static void hdlcdev_tx_timeout(struct net_device *dev)
4404 {
4405         MGSLPC_INFO *info = dev_to_port(dev);
4406         struct net_device_stats *stats = hdlc_stats(dev);
4407         unsigned long flags;
4408
4409         if (debug_level >= DEBUG_LEVEL_INFO)
4410                 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4411
4412         stats->tx_errors++;
4413         stats->tx_aborted_errors++;
4414
4415         spin_lock_irqsave(&info->lock,flags);
4416         tx_stop(info);
4417         spin_unlock_irqrestore(&info->lock,flags);
4418
4419         netif_wake_queue(dev);
4420 }
4421
4422 /**
4423  * called by device driver when transmit completes
4424  * reenable network layer transmit if stopped
4425  *
4426  * info  pointer to device instance information
4427  */
4428 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4429 {
4430         if (netif_queue_stopped(info->netdev))
4431                 netif_wake_queue(info->netdev);
4432 }
4433
4434 /**
4435  * called by device driver when frame received
4436  * pass frame to network layer
4437  *
4438  * info  pointer to device instance information
4439  * buf   pointer to buffer contianing frame data
4440  * size  count of data bytes in buf
4441  */
4442 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4443 {
4444         struct sk_buff *skb = dev_alloc_skb(size);
4445         struct net_device *dev = info->netdev;
4446         struct net_device_stats *stats = hdlc_stats(dev);
4447
4448         if (debug_level >= DEBUG_LEVEL_INFO)
4449                 printk("hdlcdev_rx(%s)\n",dev->name);
4450
4451         if (skb == NULL) {
4452                 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4453                 stats->rx_dropped++;
4454                 return;
4455         }
4456
4457         memcpy(skb_put(skb, size),buf,size);
4458
4459         skb->protocol = hdlc_type_trans(skb, info->netdev);
4460
4461         stats->rx_packets++;
4462         stats->rx_bytes += size;
4463
4464         netif_rx(skb);
4465
4466         info->netdev->last_rx = jiffies;
4467 }
4468
4469 /**
4470  * called by device driver when adding device instance
4471  * do generic HDLC initialization
4472  *
4473  * info  pointer to device instance information
4474  *
4475  * returns 0 if success, otherwise error code
4476  */
4477 static int hdlcdev_init(MGSLPC_INFO *info)
4478 {
4479         int rc;
4480         struct net_device *dev;
4481         hdlc_device *hdlc;
4482
4483         /* allocate and initialize network and HDLC layer objects */
4484
4485         if (!(dev = alloc_hdlcdev(info))) {
4486                 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4487                 return -ENOMEM;
4488         }
4489
4490         /* for network layer reporting purposes only */
4491         dev->base_addr = info->io_base;
4492         dev->irq       = info->irq_level;
4493
4494         /* network layer callbacks and settings */
4495         dev->do_ioctl       = hdlcdev_ioctl;
4496         dev->open           = hdlcdev_open;
4497         dev->stop           = hdlcdev_close;
4498         dev->tx_timeout     = hdlcdev_tx_timeout;
4499         dev->watchdog_timeo = 10*HZ;
4500         dev->tx_queue_len   = 50;
4501
4502         /* generic HDLC layer callbacks and settings */
4503         hdlc         = dev_to_hdlc(dev);
4504         hdlc->attach = hdlcdev_attach;
4505         hdlc->xmit   = hdlcdev_xmit;
4506
4507         /* register objects with HDLC layer */
4508         if ((rc = register_hdlc_device(dev))) {
4509                 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4510                 free_netdev(dev);
4511                 return rc;
4512         }
4513
4514         info->netdev = dev;
4515         return 0;
4516 }
4517
4518 /**
4519  * called by device driver when removing device instance
4520  * do generic HDLC cleanup
4521  *
4522  * info  pointer to device instance information
4523  */
4524 static void hdlcdev_exit(MGSLPC_INFO *info)
4525 {
4526         unregister_hdlc_device(info->netdev);
4527         free_netdev(info->netdev);
4528         info->netdev = NULL;
4529 }
4530
4531 #endif /* CONFIG_HDLC */
4532