TTY: remove re-assignments to tty_driver members
[linux-2.6.git] / drivers / char / pcmcia / synclink_cs.c
1 /*
2  * linux/drivers/char/pcmcia/synclink_cs.c
3  *
4  * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5  *
6  * Device driver for Microgate SyncLink PC Card
7  * multiprotocol serial adapter.
8  *
9  * written by Paul Fulghum for Microgate Corporation
10  * paulkf@microgate.com
11  *
12  * Microgate and SyncLink are trademarks of Microgate Corporation
13  *
14  * This code is released under the GNU General Public License (GPL)
15  *
16  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26  * OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 #  define BREAKPOINT() asm("   int $3");
32 #else
33 #  define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/signal.h>
41 #include <linux/sched.h>
42 #include <linux/timer.h>
43 #include <linux/time.h>
44 #include <linux/interrupt.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial.h>
48 #include <linux/major.h>
49 #include <linux/string.h>
50 #include <linux/fcntl.h>
51 #include <linux/ptrace.h>
52 #include <linux/ioport.h>
53 #include <linux/mm.h>
54 #include <linux/seq_file.h>
55 #include <linux/slab.h>
56 #include <linux/netdevice.h>
57 #include <linux/vmalloc.h>
58 #include <linux/init.h>
59 #include <linux/delay.h>
60 #include <linux/ioctl.h>
61 #include <linux/synclink.h>
62
63 #include <asm/system.h>
64 #include <asm/io.h>
65 #include <asm/irq.h>
66 #include <asm/dma.h>
67 #include <linux/bitops.h>
68 #include <asm/types.h>
69 #include <linux/termios.h>
70 #include <linux/workqueue.h>
71 #include <linux/hdlc.h>
72
73 #include <pcmcia/cistpl.h>
74 #include <pcmcia/cisreg.h>
75 #include <pcmcia/ds.h>
76
77 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
78 #define SYNCLINK_GENERIC_HDLC 1
79 #else
80 #define SYNCLINK_GENERIC_HDLC 0
81 #endif
82
83 #define GET_USER(error,value,addr) error = get_user(value,addr)
84 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
85 #define PUT_USER(error,value,addr) error = put_user(value,addr)
86 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
87
88 #include <asm/uaccess.h>
89
90 static MGSL_PARAMS default_params = {
91         MGSL_MODE_HDLC,                 /* unsigned long mode */
92         0,                              /* unsigned char loopback; */
93         HDLC_FLAG_UNDERRUN_ABORT15,     /* unsigned short flags; */
94         HDLC_ENCODING_NRZI_SPACE,       /* unsigned char encoding; */
95         0,                              /* unsigned long clock_speed; */
96         0xff,                           /* unsigned char addr_filter; */
97         HDLC_CRC_16_CCITT,              /* unsigned short crc_type; */
98         HDLC_PREAMBLE_LENGTH_8BITS,     /* unsigned char preamble_length; */
99         HDLC_PREAMBLE_PATTERN_NONE,     /* unsigned char preamble; */
100         9600,                           /* unsigned long data_rate; */
101         8,                              /* unsigned char data_bits; */
102         1,                              /* unsigned char stop_bits; */
103         ASYNC_PARITY_NONE               /* unsigned char parity; */
104 };
105
106 typedef struct
107 {
108         int count;
109         unsigned char status;
110         char data[1];
111 } RXBUF;
112
113 /* The queue of BH actions to be performed */
114
115 #define BH_RECEIVE  1
116 #define BH_TRANSMIT 2
117 #define BH_STATUS   4
118
119 #define IO_PIN_SHUTDOWN_LIMIT 100
120
121 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
122
123 struct _input_signal_events {
124         int     ri_up;
125         int     ri_down;
126         int     dsr_up;
127         int     dsr_down;
128         int     dcd_up;
129         int     dcd_down;
130         int     cts_up;
131         int     cts_down;
132 };
133
134
135 /*
136  * Device instance data structure
137  */
138
139 typedef struct _mgslpc_info {
140         struct tty_port         port;
141         void *if_ptr;   /* General purpose pointer (used by SPPP) */
142         int                     magic;
143         int                     line;
144
145         struct mgsl_icount      icount;
146
147         int                     timeout;
148         int                     x_char;         /* xon/xoff character */
149         unsigned char           read_status_mask;
150         unsigned char           ignore_status_mask;
151
152         unsigned char *tx_buf;
153         int            tx_put;
154         int            tx_get;
155         int            tx_count;
156
157         /* circular list of fixed length rx buffers */
158
159         unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
160         int            rx_buf_total_size; /* size of memory allocated for rx buffers */
161         int            rx_put;         /* index of next empty rx buffer */
162         int            rx_get;         /* index of next full rx buffer */
163         int            rx_buf_size;    /* size in bytes of single rx buffer */
164         int            rx_buf_count;   /* total number of rx buffers */
165         int            rx_frame_count; /* number of full rx buffers */
166
167         wait_queue_head_t       status_event_wait_q;
168         wait_queue_head_t       event_wait_q;
169         struct timer_list       tx_timer;       /* HDLC transmit timeout timer */
170         struct _mgslpc_info     *next_device;   /* device list link */
171
172         unsigned short imra_value;
173         unsigned short imrb_value;
174         unsigned char  pim_value;
175
176         spinlock_t lock;
177         struct work_struct task;                /* task structure for scheduling bh */
178
179         u32 max_frame_size;
180
181         u32 pending_bh;
182
183         bool bh_running;
184         bool bh_requested;
185
186         int dcd_chkcount; /* check counts to prevent */
187         int cts_chkcount; /* too many IRQs if a signal */
188         int dsr_chkcount; /* is floating */
189         int ri_chkcount;
190
191         bool rx_enabled;
192         bool rx_overflow;
193
194         bool tx_enabled;
195         bool tx_active;
196         bool tx_aborting;
197         u32 idle_mode;
198
199         int if_mode; /* serial interface selection (RS-232, v.35 etc) */
200
201         char device_name[25];           /* device instance name */
202
203         unsigned int io_base;   /* base I/O address of adapter */
204         unsigned int irq_level;
205
206         MGSL_PARAMS params;             /* communications parameters */
207
208         unsigned char serial_signals;   /* current serial signal states */
209
210         bool irq_occurred;              /* for diagnostics use */
211         char testing_irq;
212         unsigned int init_error;        /* startup error (DIAGS)        */
213
214         char flag_buf[MAX_ASYNC_BUFFER_SIZE];
215         bool drop_rts_on_tx_done;
216
217         struct  _input_signal_events    input_signal_events;
218
219         /* PCMCIA support */
220         struct pcmcia_device    *p_dev;
221         int                   stop;
222
223         /* SPPP/Cisco HDLC device parts */
224         int netcount;
225         spinlock_t netlock;
226
227 #if SYNCLINK_GENERIC_HDLC
228         struct net_device *netdev;
229 #endif
230
231 } MGSLPC_INFO;
232
233 #define MGSLPC_MAGIC 0x5402
234
235 /*
236  * The size of the serial xmit buffer is 1 page, or 4096 bytes
237  */
238 #define TXBUFSIZE 4096
239
240
241 #define CHA     0x00   /* channel A offset */
242 #define CHB     0x40   /* channel B offset */
243
244 /*
245  *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
246  */
247 #undef PVR
248
249 #define RXFIFO  0
250 #define TXFIFO  0
251 #define STAR    0x20
252 #define CMDR    0x20
253 #define RSTA    0x21
254 #define PRE     0x21
255 #define MODE    0x22
256 #define TIMR    0x23
257 #define XAD1    0x24
258 #define XAD2    0x25
259 #define RAH1    0x26
260 #define RAH2    0x27
261 #define DAFO    0x27
262 #define RAL1    0x28
263 #define RFC     0x28
264 #define RHCR    0x29
265 #define RAL2    0x29
266 #define RBCL    0x2a
267 #define XBCL    0x2a
268 #define RBCH    0x2b
269 #define XBCH    0x2b
270 #define CCR0    0x2c
271 #define CCR1    0x2d
272 #define CCR2    0x2e
273 #define CCR3    0x2f
274 #define VSTR    0x34
275 #define BGR     0x34
276 #define RLCR    0x35
277 #define AML     0x36
278 #define AMH     0x37
279 #define GIS     0x38
280 #define IVA     0x38
281 #define IPC     0x39
282 #define ISR     0x3a
283 #define IMR     0x3a
284 #define PVR     0x3c
285 #define PIS     0x3d
286 #define PIM     0x3d
287 #define PCR     0x3e
288 #define CCR4    0x3f
289
290 // IMR/ISR
291
292 #define IRQ_BREAK_ON    BIT15   // rx break detected
293 #define IRQ_DATAOVERRUN BIT14   // receive data overflow
294 #define IRQ_ALLSENT     BIT13   // all sent
295 #define IRQ_UNDERRUN    BIT12   // transmit data underrun
296 #define IRQ_TIMER       BIT11   // timer interrupt
297 #define IRQ_CTS         BIT10   // CTS status change
298 #define IRQ_TXREPEAT    BIT9    // tx message repeat
299 #define IRQ_TXFIFO      BIT8    // transmit pool ready
300 #define IRQ_RXEOM       BIT7    // receive message end
301 #define IRQ_EXITHUNT    BIT6    // receive frame start
302 #define IRQ_RXTIME      BIT6    // rx char timeout
303 #define IRQ_DCD         BIT2    // carrier detect status change
304 #define IRQ_OVERRUN     BIT1    // receive frame overflow
305 #define IRQ_RXFIFO      BIT0    // receive pool full
306
307 // STAR
308
309 #define XFW   BIT6              // transmit FIFO write enable
310 #define CEC   BIT2              // command executing
311 #define CTS   BIT1              // CTS state
312
313 #define PVR_DTR      BIT0
314 #define PVR_DSR      BIT1
315 #define PVR_RI       BIT2
316 #define PVR_AUTOCTS  BIT3
317 #define PVR_RS232    0x20   /* 0010b */
318 #define PVR_V35      0xe0   /* 1110b */
319 #define PVR_RS422    0x40   /* 0100b */
320
321 /* Register access functions */
322
323 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
324 #define read_reg(info, reg) inb((info)->io_base + (reg))
325
326 #define read_reg16(info, reg) inw((info)->io_base + (reg))
327 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
328
329 #define set_reg_bits(info, reg, mask) \
330     write_reg(info, (reg), \
331                  (unsigned char) (read_reg(info, (reg)) | (mask)))
332 #define clear_reg_bits(info, reg, mask) \
333     write_reg(info, (reg), \
334                  (unsigned char) (read_reg(info, (reg)) & ~(mask)))
335 /*
336  * interrupt enable/disable routines
337  */
338 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
339 {
340         if (channel == CHA) {
341                 info->imra_value |= mask;
342                 write_reg16(info, CHA + IMR, info->imra_value);
343         } else {
344                 info->imrb_value |= mask;
345                 write_reg16(info, CHB + IMR, info->imrb_value);
346         }
347 }
348 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
349 {
350         if (channel == CHA) {
351                 info->imra_value &= ~mask;
352                 write_reg16(info, CHA + IMR, info->imra_value);
353         } else {
354                 info->imrb_value &= ~mask;
355                 write_reg16(info, CHB + IMR, info->imrb_value);
356         }
357 }
358
359 #define port_irq_disable(info, mask) \
360   { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
361
362 #define port_irq_enable(info, mask) \
363   { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
364
365 static void rx_start(MGSLPC_INFO *info);
366 static void rx_stop(MGSLPC_INFO *info);
367
368 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
369 static void tx_stop(MGSLPC_INFO *info);
370 static void tx_set_idle(MGSLPC_INFO *info);
371
372 static void get_signals(MGSLPC_INFO *info);
373 static void set_signals(MGSLPC_INFO *info);
374
375 static void reset_device(MGSLPC_INFO *info);
376
377 static void hdlc_mode(MGSLPC_INFO *info);
378 static void async_mode(MGSLPC_INFO *info);
379
380 static void tx_timeout(unsigned long context);
381
382 static int carrier_raised(struct tty_port *port);
383 static void dtr_rts(struct tty_port *port, int onoff);
384
385 #if SYNCLINK_GENERIC_HDLC
386 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
387 static void hdlcdev_tx_done(MGSLPC_INFO *info);
388 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
389 static int  hdlcdev_init(MGSLPC_INFO *info);
390 static void hdlcdev_exit(MGSLPC_INFO *info);
391 #endif
392
393 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
394
395 static bool register_test(MGSLPC_INFO *info);
396 static bool irq_test(MGSLPC_INFO *info);
397 static int adapter_test(MGSLPC_INFO *info);
398
399 static int claim_resources(MGSLPC_INFO *info);
400 static void release_resources(MGSLPC_INFO *info);
401 static void mgslpc_add_device(MGSLPC_INFO *info);
402 static void mgslpc_remove_device(MGSLPC_INFO *info);
403
404 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
405 static void rx_reset_buffers(MGSLPC_INFO *info);
406 static int  rx_alloc_buffers(MGSLPC_INFO *info);
407 static void rx_free_buffers(MGSLPC_INFO *info);
408
409 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
410
411 /*
412  * Bottom half interrupt handlers
413  */
414 static void bh_handler(struct work_struct *work);
415 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
416 static void bh_status(MGSLPC_INFO *info);
417
418 /*
419  * ioctl handlers
420  */
421 static int tiocmget(struct tty_struct *tty);
422 static int tiocmset(struct tty_struct *tty,
423                                         unsigned int set, unsigned int clear);
424 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
425 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
426 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
427 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
428 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
429 static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
430 static int tx_abort(MGSLPC_INFO *info);
431 static int set_rxenable(MGSLPC_INFO *info, int enable);
432 static int wait_events(MGSLPC_INFO *info, int __user *mask);
433
434 static MGSLPC_INFO *mgslpc_device_list = NULL;
435 static int mgslpc_device_count = 0;
436
437 /*
438  * Set this param to non-zero to load eax with the
439  * .text section address and breakpoint on module load.
440  * This is useful for use with gdb and add-symbol-file command.
441  */
442 static bool break_on_load=0;
443
444 /*
445  * Driver major number, defaults to zero to get auto
446  * assigned major number. May be forced as module parameter.
447  */
448 static int ttymajor=0;
449
450 static int debug_level = 0;
451 static int maxframe[MAX_DEVICE_COUNT] = {0,};
452
453 module_param(break_on_load, bool, 0);
454 module_param(ttymajor, int, 0);
455 module_param(debug_level, int, 0);
456 module_param_array(maxframe, int, NULL, 0);
457
458 MODULE_LICENSE("GPL");
459
460 static char *driver_name = "SyncLink PC Card driver";
461 static char *driver_version = "$Revision: 4.34 $";
462
463 static struct tty_driver *serial_driver;
464
465 /* number of characters left in xmit buffer before we ask for more */
466 #define WAKEUP_CHARS 256
467
468 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
469 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
470
471 /* PCMCIA prototypes */
472
473 static int mgslpc_config(struct pcmcia_device *link);
474 static void mgslpc_release(u_long arg);
475 static void mgslpc_detach(struct pcmcia_device *p_dev);
476
477 /*
478  * 1st function defined in .text section. Calling this function in
479  * init_module() followed by a breakpoint allows a remote debugger
480  * (gdb) to get the .text address for the add-symbol-file command.
481  * This allows remote debugging of dynamically loadable modules.
482  */
483 static void* mgslpc_get_text_ptr(void)
484 {
485         return mgslpc_get_text_ptr;
486 }
487
488 /**
489  * line discipline callback wrappers
490  *
491  * The wrappers maintain line discipline references
492  * while calling into the line discipline.
493  *
494  * ldisc_receive_buf  - pass receive data to line discipline
495  */
496
497 static void ldisc_receive_buf(struct tty_struct *tty,
498                               const __u8 *data, char *flags, int count)
499 {
500         struct tty_ldisc *ld;
501         if (!tty)
502                 return;
503         ld = tty_ldisc_ref(tty);
504         if (ld) {
505                 if (ld->ops->receive_buf)
506                         ld->ops->receive_buf(tty, data, flags, count);
507                 tty_ldisc_deref(ld);
508         }
509 }
510
511 static const struct tty_port_operations mgslpc_port_ops = {
512         .carrier_raised = carrier_raised,
513         .dtr_rts = dtr_rts
514 };
515
516 static int mgslpc_probe(struct pcmcia_device *link)
517 {
518     MGSLPC_INFO *info;
519     int ret;
520
521     if (debug_level >= DEBUG_LEVEL_INFO)
522             printk("mgslpc_attach\n");
523
524     info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
525     if (!info) {
526             printk("Error can't allocate device instance data\n");
527             return -ENOMEM;
528     }
529
530     info->magic = MGSLPC_MAGIC;
531     tty_port_init(&info->port);
532     info->port.ops = &mgslpc_port_ops;
533     INIT_WORK(&info->task, bh_handler);
534     info->max_frame_size = 4096;
535     info->port.close_delay = 5*HZ/10;
536     info->port.closing_wait = 30*HZ;
537     init_waitqueue_head(&info->status_event_wait_q);
538     init_waitqueue_head(&info->event_wait_q);
539     spin_lock_init(&info->lock);
540     spin_lock_init(&info->netlock);
541     memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
542     info->idle_mode = HDLC_TXIDLE_FLAGS;
543     info->imra_value = 0xffff;
544     info->imrb_value = 0xffff;
545     info->pim_value = 0xff;
546
547     info->p_dev = link;
548     link->priv = info;
549
550     /* Initialize the struct pcmcia_device structure */
551
552     ret = mgslpc_config(link);
553     if (ret)
554             return ret;
555
556     mgslpc_add_device(info);
557
558     return 0;
559 }
560
561 /* Card has been inserted.
562  */
563
564 static int mgslpc_ioprobe(struct pcmcia_device *p_dev, void *priv_data)
565 {
566         return pcmcia_request_io(p_dev);
567 }
568
569 static int mgslpc_config(struct pcmcia_device *link)
570 {
571     MGSLPC_INFO *info = link->priv;
572     int ret;
573
574     if (debug_level >= DEBUG_LEVEL_INFO)
575             printk("mgslpc_config(0x%p)\n", link);
576
577     link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
578
579     ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
580     if (ret != 0)
581             goto failed;
582
583     link->config_index = 8;
584     link->config_regs = PRESENT_OPTION;
585
586     ret = pcmcia_request_irq(link, mgslpc_isr);
587     if (ret)
588             goto failed;
589     ret = pcmcia_enable_device(link);
590     if (ret)
591             goto failed;
592
593     info->io_base = link->resource[0]->start;
594     info->irq_level = link->irq;
595     return 0;
596
597 failed:
598     mgslpc_release((u_long)link);
599     return -ENODEV;
600 }
601
602 /* Card has been removed.
603  * Unregister device and release PCMCIA configuration.
604  * If device is open, postpone until it is closed.
605  */
606 static void mgslpc_release(u_long arg)
607 {
608         struct pcmcia_device *link = (struct pcmcia_device *)arg;
609
610         if (debug_level >= DEBUG_LEVEL_INFO)
611                 printk("mgslpc_release(0x%p)\n", link);
612
613         pcmcia_disable_device(link);
614 }
615
616 static void mgslpc_detach(struct pcmcia_device *link)
617 {
618         if (debug_level >= DEBUG_LEVEL_INFO)
619                 printk("mgslpc_detach(0x%p)\n", link);
620
621         ((MGSLPC_INFO *)link->priv)->stop = 1;
622         mgslpc_release((u_long)link);
623
624         mgslpc_remove_device((MGSLPC_INFO *)link->priv);
625 }
626
627 static int mgslpc_suspend(struct pcmcia_device *link)
628 {
629         MGSLPC_INFO *info = link->priv;
630
631         info->stop = 1;
632
633         return 0;
634 }
635
636 static int mgslpc_resume(struct pcmcia_device *link)
637 {
638         MGSLPC_INFO *info = link->priv;
639
640         info->stop = 0;
641
642         return 0;
643 }
644
645
646 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
647                                         char *name, const char *routine)
648 {
649 #ifdef MGSLPC_PARANOIA_CHECK
650         static const char *badmagic =
651                 "Warning: bad magic number for mgsl struct (%s) in %s\n";
652         static const char *badinfo =
653                 "Warning: null mgslpc_info for (%s) in %s\n";
654
655         if (!info) {
656                 printk(badinfo, name, routine);
657                 return true;
658         }
659         if (info->magic != MGSLPC_MAGIC) {
660                 printk(badmagic, name, routine);
661                 return true;
662         }
663 #else
664         if (!info)
665                 return true;
666 #endif
667         return false;
668 }
669
670
671 #define CMD_RXFIFO      BIT7    // release current rx FIFO
672 #define CMD_RXRESET     BIT6    // receiver reset
673 #define CMD_RXFIFO_READ BIT5
674 #define CMD_START_TIMER BIT4
675 #define CMD_TXFIFO      BIT3    // release current tx FIFO
676 #define CMD_TXEOM       BIT1    // transmit end message
677 #define CMD_TXRESET     BIT0    // transmit reset
678
679 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
680 {
681         int i = 0;
682         /* wait for command completion */
683         while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
684                 udelay(1);
685                 if (i++ == 1000)
686                         return false;
687         }
688         return true;
689 }
690
691 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
692 {
693         wait_command_complete(info, channel);
694         write_reg(info, (unsigned char) (channel + CMDR), cmd);
695 }
696
697 static void tx_pause(struct tty_struct *tty)
698 {
699         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
700         unsigned long flags;
701
702         if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
703                 return;
704         if (debug_level >= DEBUG_LEVEL_INFO)
705                 printk("tx_pause(%s)\n",info->device_name);
706
707         spin_lock_irqsave(&info->lock,flags);
708         if (info->tx_enabled)
709                 tx_stop(info);
710         spin_unlock_irqrestore(&info->lock,flags);
711 }
712
713 static void tx_release(struct tty_struct *tty)
714 {
715         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
716         unsigned long flags;
717
718         if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
719                 return;
720         if (debug_level >= DEBUG_LEVEL_INFO)
721                 printk("tx_release(%s)\n",info->device_name);
722
723         spin_lock_irqsave(&info->lock,flags);
724         if (!info->tx_enabled)
725                 tx_start(info, tty);
726         spin_unlock_irqrestore(&info->lock,flags);
727 }
728
729 /* Return next bottom half action to perform.
730  * or 0 if nothing to do.
731  */
732 static int bh_action(MGSLPC_INFO *info)
733 {
734         unsigned long flags;
735         int rc = 0;
736
737         spin_lock_irqsave(&info->lock,flags);
738
739         if (info->pending_bh & BH_RECEIVE) {
740                 info->pending_bh &= ~BH_RECEIVE;
741                 rc = BH_RECEIVE;
742         } else if (info->pending_bh & BH_TRANSMIT) {
743                 info->pending_bh &= ~BH_TRANSMIT;
744                 rc = BH_TRANSMIT;
745         } else if (info->pending_bh & BH_STATUS) {
746                 info->pending_bh &= ~BH_STATUS;
747                 rc = BH_STATUS;
748         }
749
750         if (!rc) {
751                 /* Mark BH routine as complete */
752                 info->bh_running = false;
753                 info->bh_requested = false;
754         }
755
756         spin_unlock_irqrestore(&info->lock,flags);
757
758         return rc;
759 }
760
761 static void bh_handler(struct work_struct *work)
762 {
763         MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
764         struct tty_struct *tty;
765         int action;
766
767         if (!info)
768                 return;
769
770         if (debug_level >= DEBUG_LEVEL_BH)
771                 printk( "%s(%d):bh_handler(%s) entry\n",
772                         __FILE__,__LINE__,info->device_name);
773
774         info->bh_running = true;
775         tty = tty_port_tty_get(&info->port);
776
777         while((action = bh_action(info)) != 0) {
778
779                 /* Process work item */
780                 if ( debug_level >= DEBUG_LEVEL_BH )
781                         printk( "%s(%d):bh_handler() work item action=%d\n",
782                                 __FILE__,__LINE__,action);
783
784                 switch (action) {
785
786                 case BH_RECEIVE:
787                         while(rx_get_frame(info, tty));
788                         break;
789                 case BH_TRANSMIT:
790                         bh_transmit(info, tty);
791                         break;
792                 case BH_STATUS:
793                         bh_status(info);
794                         break;
795                 default:
796                         /* unknown work item ID */
797                         printk("Unknown work item ID=%08X!\n", action);
798                         break;
799                 }
800         }
801
802         tty_kref_put(tty);
803         if (debug_level >= DEBUG_LEVEL_BH)
804                 printk( "%s(%d):bh_handler(%s) exit\n",
805                         __FILE__,__LINE__,info->device_name);
806 }
807
808 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
809 {
810         if (debug_level >= DEBUG_LEVEL_BH)
811                 printk("bh_transmit() entry on %s\n", info->device_name);
812
813         if (tty)
814                 tty_wakeup(tty);
815 }
816
817 static void bh_status(MGSLPC_INFO *info)
818 {
819         info->ri_chkcount = 0;
820         info->dsr_chkcount = 0;
821         info->dcd_chkcount = 0;
822         info->cts_chkcount = 0;
823 }
824
825 /* eom: non-zero = end of frame */
826 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
827 {
828         unsigned char data[2];
829         unsigned char fifo_count, read_count, i;
830         RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
831
832         if (debug_level >= DEBUG_LEVEL_ISR)
833                 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
834
835         if (!info->rx_enabled)
836                 return;
837
838         if (info->rx_frame_count >= info->rx_buf_count) {
839                 /* no more free buffers */
840                 issue_command(info, CHA, CMD_RXRESET);
841                 info->pending_bh |= BH_RECEIVE;
842                 info->rx_overflow = true;
843                 info->icount.buf_overrun++;
844                 return;
845         }
846
847         if (eom) {
848                 /* end of frame, get FIFO count from RBCL register */
849                 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
850                         fifo_count = 32;
851         } else
852                 fifo_count = 32;
853
854         do {
855                 if (fifo_count == 1) {
856                         read_count = 1;
857                         data[0] = read_reg(info, CHA + RXFIFO);
858                 } else {
859                         read_count = 2;
860                         *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
861                 }
862                 fifo_count -= read_count;
863                 if (!fifo_count && eom)
864                         buf->status = data[--read_count];
865
866                 for (i = 0; i < read_count; i++) {
867                         if (buf->count >= info->max_frame_size) {
868                                 /* frame too large, reset receiver and reset current buffer */
869                                 issue_command(info, CHA, CMD_RXRESET);
870                                 buf->count = 0;
871                                 return;
872                         }
873                         *(buf->data + buf->count) = data[i];
874                         buf->count++;
875                 }
876         } while (fifo_count);
877
878         if (eom) {
879                 info->pending_bh |= BH_RECEIVE;
880                 info->rx_frame_count++;
881                 info->rx_put++;
882                 if (info->rx_put >= info->rx_buf_count)
883                         info->rx_put = 0;
884         }
885         issue_command(info, CHA, CMD_RXFIFO);
886 }
887
888 static void rx_ready_async(MGSLPC_INFO *info, int tcd, struct tty_struct *tty)
889 {
890         unsigned char data, status, flag;
891         int fifo_count;
892         int work = 0;
893         struct mgsl_icount *icount = &info->icount;
894
895         if (tcd) {
896                 /* early termination, get FIFO count from RBCL register */
897                 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
898
899                 /* Zero fifo count could mean 0 or 32 bytes available.
900                  * If BIT5 of STAR is set then at least 1 byte is available.
901                  */
902                 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
903                         fifo_count = 32;
904         } else
905                 fifo_count = 32;
906
907         tty_buffer_request_room(tty, fifo_count);
908         /* Flush received async data to receive data buffer. */
909         while (fifo_count) {
910                 data   = read_reg(info, CHA + RXFIFO);
911                 status = read_reg(info, CHA + RXFIFO);
912                 fifo_count -= 2;
913
914                 icount->rx++;
915                 flag = TTY_NORMAL;
916
917                 // if no frameing/crc error then save data
918                 // BIT7:parity error
919                 // BIT6:framing error
920
921                 if (status & (BIT7 + BIT6)) {
922                         if (status & BIT7)
923                                 icount->parity++;
924                         else
925                                 icount->frame++;
926
927                         /* discard char if tty control flags say so */
928                         if (status & info->ignore_status_mask)
929                                 continue;
930
931                         status &= info->read_status_mask;
932
933                         if (status & BIT7)
934                                 flag = TTY_PARITY;
935                         else if (status & BIT6)
936                                 flag = TTY_FRAME;
937                 }
938                 work += tty_insert_flip_char(tty, data, flag);
939         }
940         issue_command(info, CHA, CMD_RXFIFO);
941
942         if (debug_level >= DEBUG_LEVEL_ISR) {
943                 printk("%s(%d):rx_ready_async",
944                         __FILE__,__LINE__);
945                 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
946                         __FILE__,__LINE__,icount->rx,icount->brk,
947                         icount->parity,icount->frame,icount->overrun);
948         }
949
950         if (work)
951                 tty_flip_buffer_push(tty);
952 }
953
954
955 static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
956 {
957         if (!info->tx_active)
958                 return;
959
960         info->tx_active = false;
961         info->tx_aborting = false;
962
963         if (info->params.mode == MGSL_MODE_ASYNC)
964                 return;
965
966         info->tx_count = info->tx_put = info->tx_get = 0;
967         del_timer(&info->tx_timer);
968
969         if (info->drop_rts_on_tx_done) {
970                 get_signals(info);
971                 if (info->serial_signals & SerialSignal_RTS) {
972                         info->serial_signals &= ~SerialSignal_RTS;
973                         set_signals(info);
974                 }
975                 info->drop_rts_on_tx_done = false;
976         }
977
978 #if SYNCLINK_GENERIC_HDLC
979         if (info->netcount)
980                 hdlcdev_tx_done(info);
981         else
982 #endif
983         {
984                 if (tty->stopped || tty->hw_stopped) {
985                         tx_stop(info);
986                         return;
987                 }
988                 info->pending_bh |= BH_TRANSMIT;
989         }
990 }
991
992 static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
993 {
994         unsigned char fifo_count = 32;
995         int c;
996
997         if (debug_level >= DEBUG_LEVEL_ISR)
998                 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
999
1000         if (info->params.mode == MGSL_MODE_HDLC) {
1001                 if (!info->tx_active)
1002                         return;
1003         } else {
1004                 if (tty->stopped || tty->hw_stopped) {
1005                         tx_stop(info);
1006                         return;
1007                 }
1008                 if (!info->tx_count)
1009                         info->tx_active = false;
1010         }
1011
1012         if (!info->tx_count)
1013                 return;
1014
1015         while (info->tx_count && fifo_count) {
1016                 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1017
1018                 if (c == 1) {
1019                         write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1020                 } else {
1021                         write_reg16(info, CHA + TXFIFO,
1022                                           *((unsigned short*)(info->tx_buf + info->tx_get)));
1023                 }
1024                 info->tx_count -= c;
1025                 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1026                 fifo_count -= c;
1027         }
1028
1029         if (info->params.mode == MGSL_MODE_ASYNC) {
1030                 if (info->tx_count < WAKEUP_CHARS)
1031                         info->pending_bh |= BH_TRANSMIT;
1032                 issue_command(info, CHA, CMD_TXFIFO);
1033         } else {
1034                 if (info->tx_count)
1035                         issue_command(info, CHA, CMD_TXFIFO);
1036                 else
1037                         issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1038         }
1039 }
1040
1041 static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1042 {
1043         get_signals(info);
1044         if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1045                 irq_disable(info, CHB, IRQ_CTS);
1046         info->icount.cts++;
1047         if (info->serial_signals & SerialSignal_CTS)
1048                 info->input_signal_events.cts_up++;
1049         else
1050                 info->input_signal_events.cts_down++;
1051         wake_up_interruptible(&info->status_event_wait_q);
1052         wake_up_interruptible(&info->event_wait_q);
1053
1054         if (info->port.flags & ASYNC_CTS_FLOW) {
1055                 if (tty->hw_stopped) {
1056                         if (info->serial_signals & SerialSignal_CTS) {
1057                                 if (debug_level >= DEBUG_LEVEL_ISR)
1058                                         printk("CTS tx start...");
1059                                 if (tty)
1060                                         tty->hw_stopped = 0;
1061                                 tx_start(info, tty);
1062                                 info->pending_bh |= BH_TRANSMIT;
1063                                 return;
1064                         }
1065                 } else {
1066                         if (!(info->serial_signals & SerialSignal_CTS)) {
1067                                 if (debug_level >= DEBUG_LEVEL_ISR)
1068                                         printk("CTS tx stop...");
1069                                 if (tty)
1070                                         tty->hw_stopped = 1;
1071                                 tx_stop(info);
1072                         }
1073                 }
1074         }
1075         info->pending_bh |= BH_STATUS;
1076 }
1077
1078 static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1079 {
1080         get_signals(info);
1081         if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1082                 irq_disable(info, CHB, IRQ_DCD);
1083         info->icount.dcd++;
1084         if (info->serial_signals & SerialSignal_DCD) {
1085                 info->input_signal_events.dcd_up++;
1086         }
1087         else
1088                 info->input_signal_events.dcd_down++;
1089 #if SYNCLINK_GENERIC_HDLC
1090         if (info->netcount) {
1091                 if (info->serial_signals & SerialSignal_DCD)
1092                         netif_carrier_on(info->netdev);
1093                 else
1094                         netif_carrier_off(info->netdev);
1095         }
1096 #endif
1097         wake_up_interruptible(&info->status_event_wait_q);
1098         wake_up_interruptible(&info->event_wait_q);
1099
1100         if (info->port.flags & ASYNC_CHECK_CD) {
1101                 if (debug_level >= DEBUG_LEVEL_ISR)
1102                         printk("%s CD now %s...", info->device_name,
1103                                (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1104                 if (info->serial_signals & SerialSignal_DCD)
1105                         wake_up_interruptible(&info->port.open_wait);
1106                 else {
1107                         if (debug_level >= DEBUG_LEVEL_ISR)
1108                                 printk("doing serial hangup...");
1109                         if (tty)
1110                                 tty_hangup(tty);
1111                 }
1112         }
1113         info->pending_bh |= BH_STATUS;
1114 }
1115
1116 static void dsr_change(MGSLPC_INFO *info)
1117 {
1118         get_signals(info);
1119         if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1120                 port_irq_disable(info, PVR_DSR);
1121         info->icount.dsr++;
1122         if (info->serial_signals & SerialSignal_DSR)
1123                 info->input_signal_events.dsr_up++;
1124         else
1125                 info->input_signal_events.dsr_down++;
1126         wake_up_interruptible(&info->status_event_wait_q);
1127         wake_up_interruptible(&info->event_wait_q);
1128         info->pending_bh |= BH_STATUS;
1129 }
1130
1131 static void ri_change(MGSLPC_INFO *info)
1132 {
1133         get_signals(info);
1134         if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1135                 port_irq_disable(info, PVR_RI);
1136         info->icount.rng++;
1137         if (info->serial_signals & SerialSignal_RI)
1138                 info->input_signal_events.ri_up++;
1139         else
1140                 info->input_signal_events.ri_down++;
1141         wake_up_interruptible(&info->status_event_wait_q);
1142         wake_up_interruptible(&info->event_wait_q);
1143         info->pending_bh |= BH_STATUS;
1144 }
1145
1146 /* Interrupt service routine entry point.
1147  *
1148  * Arguments:
1149  *
1150  * irq     interrupt number that caused interrupt
1151  * dev_id  device ID supplied during interrupt registration
1152  */
1153 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1154 {
1155         MGSLPC_INFO *info = dev_id;
1156         struct tty_struct *tty;
1157         unsigned short isr;
1158         unsigned char gis, pis;
1159         int count=0;
1160
1161         if (debug_level >= DEBUG_LEVEL_ISR)
1162                 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1163
1164         if (!(info->p_dev->_locked))
1165                 return IRQ_HANDLED;
1166
1167         tty = tty_port_tty_get(&info->port);
1168
1169         spin_lock(&info->lock);
1170
1171         while ((gis = read_reg(info, CHA + GIS))) {
1172                 if (debug_level >= DEBUG_LEVEL_ISR)
1173                         printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1174
1175                 if ((gis & 0x70) || count > 1000) {
1176                         printk("synclink_cs:hardware failed or ejected\n");
1177                         break;
1178                 }
1179                 count++;
1180
1181                 if (gis & (BIT1 + BIT0)) {
1182                         isr = read_reg16(info, CHB + ISR);
1183                         if (isr & IRQ_DCD)
1184                                 dcd_change(info, tty);
1185                         if (isr & IRQ_CTS)
1186                                 cts_change(info, tty);
1187                 }
1188                 if (gis & (BIT3 + BIT2))
1189                 {
1190                         isr = read_reg16(info, CHA + ISR);
1191                         if (isr & IRQ_TIMER) {
1192                                 info->irq_occurred = true;
1193                                 irq_disable(info, CHA, IRQ_TIMER);
1194                         }
1195
1196                         /* receive IRQs */
1197                         if (isr & IRQ_EXITHUNT) {
1198                                 info->icount.exithunt++;
1199                                 wake_up_interruptible(&info->event_wait_q);
1200                         }
1201                         if (isr & IRQ_BREAK_ON) {
1202                                 info->icount.brk++;
1203                                 if (info->port.flags & ASYNC_SAK)
1204                                         do_SAK(tty);
1205                         }
1206                         if (isr & IRQ_RXTIME) {
1207                                 issue_command(info, CHA, CMD_RXFIFO_READ);
1208                         }
1209                         if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1210                                 if (info->params.mode == MGSL_MODE_HDLC)
1211                                         rx_ready_hdlc(info, isr & IRQ_RXEOM);
1212                                 else
1213                                         rx_ready_async(info, isr & IRQ_RXEOM, tty);
1214                         }
1215
1216                         /* transmit IRQs */
1217                         if (isr & IRQ_UNDERRUN) {
1218                                 if (info->tx_aborting)
1219                                         info->icount.txabort++;
1220                                 else
1221                                         info->icount.txunder++;
1222                                 tx_done(info, tty);
1223                         }
1224                         else if (isr & IRQ_ALLSENT) {
1225                                 info->icount.txok++;
1226                                 tx_done(info, tty);
1227                         }
1228                         else if (isr & IRQ_TXFIFO)
1229                                 tx_ready(info, tty);
1230                 }
1231                 if (gis & BIT7) {
1232                         pis = read_reg(info, CHA + PIS);
1233                         if (pis & BIT1)
1234                                 dsr_change(info);
1235                         if (pis & BIT2)
1236                                 ri_change(info);
1237                 }
1238         }
1239
1240         /* Request bottom half processing if there's something
1241          * for it to do and the bh is not already running
1242          */
1243
1244         if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1245                 if ( debug_level >= DEBUG_LEVEL_ISR )
1246                         printk("%s(%d):%s queueing bh task.\n",
1247                                 __FILE__,__LINE__,info->device_name);
1248                 schedule_work(&info->task);
1249                 info->bh_requested = true;
1250         }
1251
1252         spin_unlock(&info->lock);
1253         tty_kref_put(tty);
1254
1255         if (debug_level >= DEBUG_LEVEL_ISR)
1256                 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1257                        __FILE__, __LINE__, info->irq_level);
1258
1259         return IRQ_HANDLED;
1260 }
1261
1262 /* Initialize and start device.
1263  */
1264 static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1265 {
1266         int retval = 0;
1267
1268         if (debug_level >= DEBUG_LEVEL_INFO)
1269                 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1270
1271         if (info->port.flags & ASYNC_INITIALIZED)
1272                 return 0;
1273
1274         if (!info->tx_buf) {
1275                 /* allocate a page of memory for a transmit buffer */
1276                 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1277                 if (!info->tx_buf) {
1278                         printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1279                                 __FILE__,__LINE__,info->device_name);
1280                         return -ENOMEM;
1281                 }
1282         }
1283
1284         info->pending_bh = 0;
1285
1286         memset(&info->icount, 0, sizeof(info->icount));
1287
1288         setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1289
1290         /* Allocate and claim adapter resources */
1291         retval = claim_resources(info);
1292
1293         /* perform existence check and diagnostics */
1294         if ( !retval )
1295                 retval = adapter_test(info);
1296
1297         if ( retval ) {
1298                 if (capable(CAP_SYS_ADMIN) && tty)
1299                         set_bit(TTY_IO_ERROR, &tty->flags);
1300                 release_resources(info);
1301                 return retval;
1302         }
1303
1304         /* program hardware for current parameters */
1305         mgslpc_change_params(info, tty);
1306
1307         if (tty)
1308                 clear_bit(TTY_IO_ERROR, &tty->flags);
1309
1310         info->port.flags |= ASYNC_INITIALIZED;
1311
1312         return 0;
1313 }
1314
1315 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1316  */
1317 static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1318 {
1319         unsigned long flags;
1320
1321         if (!(info->port.flags & ASYNC_INITIALIZED))
1322                 return;
1323
1324         if (debug_level >= DEBUG_LEVEL_INFO)
1325                 printk("%s(%d):mgslpc_shutdown(%s)\n",
1326                          __FILE__,__LINE__, info->device_name );
1327
1328         /* clear status wait queue because status changes */
1329         /* can't happen after shutting down the hardware */
1330         wake_up_interruptible(&info->status_event_wait_q);
1331         wake_up_interruptible(&info->event_wait_q);
1332
1333         del_timer_sync(&info->tx_timer);
1334
1335         if (info->tx_buf) {
1336                 free_page((unsigned long) info->tx_buf);
1337                 info->tx_buf = NULL;
1338         }
1339
1340         spin_lock_irqsave(&info->lock,flags);
1341
1342         rx_stop(info);
1343         tx_stop(info);
1344
1345         /* TODO:disable interrupts instead of reset to preserve signal states */
1346         reset_device(info);
1347
1348         if (!tty || tty->termios->c_cflag & HUPCL) {
1349                 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1350                 set_signals(info);
1351         }
1352
1353         spin_unlock_irqrestore(&info->lock,flags);
1354
1355         release_resources(info);
1356
1357         if (tty)
1358                 set_bit(TTY_IO_ERROR, &tty->flags);
1359
1360         info->port.flags &= ~ASYNC_INITIALIZED;
1361 }
1362
1363 static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1364 {
1365         unsigned long flags;
1366
1367         spin_lock_irqsave(&info->lock,flags);
1368
1369         rx_stop(info);
1370         tx_stop(info);
1371         info->tx_count = info->tx_put = info->tx_get = 0;
1372
1373         if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1374                 hdlc_mode(info);
1375         else
1376                 async_mode(info);
1377
1378         set_signals(info);
1379
1380         info->dcd_chkcount = 0;
1381         info->cts_chkcount = 0;
1382         info->ri_chkcount = 0;
1383         info->dsr_chkcount = 0;
1384
1385         irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1386         port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1387         get_signals(info);
1388
1389         if (info->netcount || (tty && (tty->termios->c_cflag & CREAD)))
1390                 rx_start(info);
1391
1392         spin_unlock_irqrestore(&info->lock,flags);
1393 }
1394
1395 /* Reconfigure adapter based on new parameters
1396  */
1397 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1398 {
1399         unsigned cflag;
1400         int bits_per_char;
1401
1402         if (!tty || !tty->termios)
1403                 return;
1404
1405         if (debug_level >= DEBUG_LEVEL_INFO)
1406                 printk("%s(%d):mgslpc_change_params(%s)\n",
1407                          __FILE__,__LINE__, info->device_name );
1408
1409         cflag = tty->termios->c_cflag;
1410
1411         /* if B0 rate (hangup) specified then negate DTR and RTS */
1412         /* otherwise assert DTR and RTS */
1413         if (cflag & CBAUD)
1414                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1415         else
1416                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1417
1418         /* byte size and parity */
1419
1420         switch (cflag & CSIZE) {
1421         case CS5: info->params.data_bits = 5; break;
1422         case CS6: info->params.data_bits = 6; break;
1423         case CS7: info->params.data_bits = 7; break;
1424         case CS8: info->params.data_bits = 8; break;
1425         default:  info->params.data_bits = 7; break;
1426         }
1427
1428         if (cflag & CSTOPB)
1429                 info->params.stop_bits = 2;
1430         else
1431                 info->params.stop_bits = 1;
1432
1433         info->params.parity = ASYNC_PARITY_NONE;
1434         if (cflag & PARENB) {
1435                 if (cflag & PARODD)
1436                         info->params.parity = ASYNC_PARITY_ODD;
1437                 else
1438                         info->params.parity = ASYNC_PARITY_EVEN;
1439 #ifdef CMSPAR
1440                 if (cflag & CMSPAR)
1441                         info->params.parity = ASYNC_PARITY_SPACE;
1442 #endif
1443         }
1444
1445         /* calculate number of jiffies to transmit a full
1446          * FIFO (32 bytes) at specified data rate
1447          */
1448         bits_per_char = info->params.data_bits +
1449                         info->params.stop_bits + 1;
1450
1451         /* if port data rate is set to 460800 or less then
1452          * allow tty settings to override, otherwise keep the
1453          * current data rate.
1454          */
1455         if (info->params.data_rate <= 460800) {
1456                 info->params.data_rate = tty_get_baud_rate(tty);
1457         }
1458
1459         if ( info->params.data_rate ) {
1460                 info->timeout = (32*HZ*bits_per_char) /
1461                                 info->params.data_rate;
1462         }
1463         info->timeout += HZ/50;         /* Add .02 seconds of slop */
1464
1465         if (cflag & CRTSCTS)
1466                 info->port.flags |= ASYNC_CTS_FLOW;
1467         else
1468                 info->port.flags &= ~ASYNC_CTS_FLOW;
1469
1470         if (cflag & CLOCAL)
1471                 info->port.flags &= ~ASYNC_CHECK_CD;
1472         else
1473                 info->port.flags |= ASYNC_CHECK_CD;
1474
1475         /* process tty input control flags */
1476
1477         info->read_status_mask = 0;
1478         if (I_INPCK(tty))
1479                 info->read_status_mask |= BIT7 | BIT6;
1480         if (I_IGNPAR(tty))
1481                 info->ignore_status_mask |= BIT7 | BIT6;
1482
1483         mgslpc_program_hw(info, tty);
1484 }
1485
1486 /* Add a character to the transmit buffer
1487  */
1488 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1489 {
1490         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1491         unsigned long flags;
1492
1493         if (debug_level >= DEBUG_LEVEL_INFO) {
1494                 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1495                         __FILE__,__LINE__,ch,info->device_name);
1496         }
1497
1498         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1499                 return 0;
1500
1501         if (!info->tx_buf)
1502                 return 0;
1503
1504         spin_lock_irqsave(&info->lock,flags);
1505
1506         if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1507                 if (info->tx_count < TXBUFSIZE - 1) {
1508                         info->tx_buf[info->tx_put++] = ch;
1509                         info->tx_put &= TXBUFSIZE-1;
1510                         info->tx_count++;
1511                 }
1512         }
1513
1514         spin_unlock_irqrestore(&info->lock,flags);
1515         return 1;
1516 }
1517
1518 /* Enable transmitter so remaining characters in the
1519  * transmit buffer are sent.
1520  */
1521 static void mgslpc_flush_chars(struct tty_struct *tty)
1522 {
1523         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1524         unsigned long flags;
1525
1526         if (debug_level >= DEBUG_LEVEL_INFO)
1527                 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1528                         __FILE__,__LINE__,info->device_name,info->tx_count);
1529
1530         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1531                 return;
1532
1533         if (info->tx_count <= 0 || tty->stopped ||
1534             tty->hw_stopped || !info->tx_buf)
1535                 return;
1536
1537         if (debug_level >= DEBUG_LEVEL_INFO)
1538                 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1539                         __FILE__,__LINE__,info->device_name);
1540
1541         spin_lock_irqsave(&info->lock,flags);
1542         if (!info->tx_active)
1543                 tx_start(info, tty);
1544         spin_unlock_irqrestore(&info->lock,flags);
1545 }
1546
1547 /* Send a block of data
1548  *
1549  * Arguments:
1550  *
1551  * tty        pointer to tty information structure
1552  * buf        pointer to buffer containing send data
1553  * count      size of send data in bytes
1554  *
1555  * Returns: number of characters written
1556  */
1557 static int mgslpc_write(struct tty_struct * tty,
1558                         const unsigned char *buf, int count)
1559 {
1560         int c, ret = 0;
1561         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1562         unsigned long flags;
1563
1564         if (debug_level >= DEBUG_LEVEL_INFO)
1565                 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1566                         __FILE__,__LINE__,info->device_name,count);
1567
1568         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1569                 !info->tx_buf)
1570                 goto cleanup;
1571
1572         if (info->params.mode == MGSL_MODE_HDLC) {
1573                 if (count > TXBUFSIZE) {
1574                         ret = -EIO;
1575                         goto cleanup;
1576                 }
1577                 if (info->tx_active)
1578                         goto cleanup;
1579                 else if (info->tx_count)
1580                         goto start;
1581         }
1582
1583         for (;;) {
1584                 c = min(count,
1585                         min(TXBUFSIZE - info->tx_count - 1,
1586                             TXBUFSIZE - info->tx_put));
1587                 if (c <= 0)
1588                         break;
1589
1590                 memcpy(info->tx_buf + info->tx_put, buf, c);
1591
1592                 spin_lock_irqsave(&info->lock,flags);
1593                 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1594                 info->tx_count += c;
1595                 spin_unlock_irqrestore(&info->lock,flags);
1596
1597                 buf += c;
1598                 count -= c;
1599                 ret += c;
1600         }
1601 start:
1602         if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1603                 spin_lock_irqsave(&info->lock,flags);
1604                 if (!info->tx_active)
1605                         tx_start(info, tty);
1606                 spin_unlock_irqrestore(&info->lock,flags);
1607         }
1608 cleanup:
1609         if (debug_level >= DEBUG_LEVEL_INFO)
1610                 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1611                         __FILE__,__LINE__,info->device_name,ret);
1612         return ret;
1613 }
1614
1615 /* Return the count of free bytes in transmit buffer
1616  */
1617 static int mgslpc_write_room(struct tty_struct *tty)
1618 {
1619         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1620         int ret;
1621
1622         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1623                 return 0;
1624
1625         if (info->params.mode == MGSL_MODE_HDLC) {
1626                 /* HDLC (frame oriented) mode */
1627                 if (info->tx_active)
1628                         return 0;
1629                 else
1630                         return HDLC_MAX_FRAME_SIZE;
1631         } else {
1632                 ret = TXBUFSIZE - info->tx_count - 1;
1633                 if (ret < 0)
1634                         ret = 0;
1635         }
1636
1637         if (debug_level >= DEBUG_LEVEL_INFO)
1638                 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1639                          __FILE__,__LINE__, info->device_name, ret);
1640         return ret;
1641 }
1642
1643 /* Return the count of bytes in transmit buffer
1644  */
1645 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1646 {
1647         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1648         int rc;
1649
1650         if (debug_level >= DEBUG_LEVEL_INFO)
1651                 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1652                          __FILE__,__LINE__, info->device_name );
1653
1654         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1655                 return 0;
1656
1657         if (info->params.mode == MGSL_MODE_HDLC)
1658                 rc = info->tx_active ? info->max_frame_size : 0;
1659         else
1660                 rc = info->tx_count;
1661
1662         if (debug_level >= DEBUG_LEVEL_INFO)
1663                 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1664                          __FILE__,__LINE__, info->device_name, rc);
1665
1666         return rc;
1667 }
1668
1669 /* Discard all data in the send buffer
1670  */
1671 static void mgslpc_flush_buffer(struct tty_struct *tty)
1672 {
1673         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1674         unsigned long flags;
1675
1676         if (debug_level >= DEBUG_LEVEL_INFO)
1677                 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1678                          __FILE__,__LINE__, info->device_name );
1679
1680         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1681                 return;
1682
1683         spin_lock_irqsave(&info->lock,flags);
1684         info->tx_count = info->tx_put = info->tx_get = 0;
1685         del_timer(&info->tx_timer);
1686         spin_unlock_irqrestore(&info->lock,flags);
1687
1688         wake_up_interruptible(&tty->write_wait);
1689         tty_wakeup(tty);
1690 }
1691
1692 /* Send a high-priority XON/XOFF character
1693  */
1694 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1695 {
1696         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1697         unsigned long flags;
1698
1699         if (debug_level >= DEBUG_LEVEL_INFO)
1700                 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1701                          __FILE__,__LINE__, info->device_name, ch );
1702
1703         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1704                 return;
1705
1706         info->x_char = ch;
1707         if (ch) {
1708                 spin_lock_irqsave(&info->lock,flags);
1709                 if (!info->tx_enabled)
1710                         tx_start(info, tty);
1711                 spin_unlock_irqrestore(&info->lock,flags);
1712         }
1713 }
1714
1715 /* Signal remote device to throttle send data (our receive data)
1716  */
1717 static void mgslpc_throttle(struct tty_struct * tty)
1718 {
1719         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1720         unsigned long flags;
1721
1722         if (debug_level >= DEBUG_LEVEL_INFO)
1723                 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1724                          __FILE__,__LINE__, info->device_name );
1725
1726         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1727                 return;
1728
1729         if (I_IXOFF(tty))
1730                 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1731
1732         if (tty->termios->c_cflag & CRTSCTS) {
1733                 spin_lock_irqsave(&info->lock,flags);
1734                 info->serial_signals &= ~SerialSignal_RTS;
1735                 set_signals(info);
1736                 spin_unlock_irqrestore(&info->lock,flags);
1737         }
1738 }
1739
1740 /* Signal remote device to stop throttling send data (our receive data)
1741  */
1742 static void mgslpc_unthrottle(struct tty_struct * tty)
1743 {
1744         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1745         unsigned long flags;
1746
1747         if (debug_level >= DEBUG_LEVEL_INFO)
1748                 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1749                          __FILE__,__LINE__, info->device_name );
1750
1751         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1752                 return;
1753
1754         if (I_IXOFF(tty)) {
1755                 if (info->x_char)
1756                         info->x_char = 0;
1757                 else
1758                         mgslpc_send_xchar(tty, START_CHAR(tty));
1759         }
1760
1761         if (tty->termios->c_cflag & CRTSCTS) {
1762                 spin_lock_irqsave(&info->lock,flags);
1763                 info->serial_signals |= SerialSignal_RTS;
1764                 set_signals(info);
1765                 spin_unlock_irqrestore(&info->lock,flags);
1766         }
1767 }
1768
1769 /* get the current serial statistics
1770  */
1771 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1772 {
1773         int err;
1774         if (debug_level >= DEBUG_LEVEL_INFO)
1775                 printk("get_params(%s)\n", info->device_name);
1776         if (!user_icount) {
1777                 memset(&info->icount, 0, sizeof(info->icount));
1778         } else {
1779                 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1780                 if (err)
1781                         return -EFAULT;
1782         }
1783         return 0;
1784 }
1785
1786 /* get the current serial parameters
1787  */
1788 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1789 {
1790         int err;
1791         if (debug_level >= DEBUG_LEVEL_INFO)
1792                 printk("get_params(%s)\n", info->device_name);
1793         COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1794         if (err)
1795                 return -EFAULT;
1796         return 0;
1797 }
1798
1799 /* set the serial parameters
1800  *
1801  * Arguments:
1802  *
1803  *      info            pointer to device instance data
1804  *      new_params      user buffer containing new serial params
1805  *
1806  * Returns:     0 if success, otherwise error code
1807  */
1808 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1809 {
1810         unsigned long flags;
1811         MGSL_PARAMS tmp_params;
1812         int err;
1813
1814         if (debug_level >= DEBUG_LEVEL_INFO)
1815                 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1816                         info->device_name );
1817         COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1818         if (err) {
1819                 if ( debug_level >= DEBUG_LEVEL_INFO )
1820                         printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1821                                 __FILE__,__LINE__,info->device_name);
1822                 return -EFAULT;
1823         }
1824
1825         spin_lock_irqsave(&info->lock,flags);
1826         memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1827         spin_unlock_irqrestore(&info->lock,flags);
1828
1829         mgslpc_change_params(info, tty);
1830
1831         return 0;
1832 }
1833
1834 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1835 {
1836         int err;
1837         if (debug_level >= DEBUG_LEVEL_INFO)
1838                 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1839         COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1840         if (err)
1841                 return -EFAULT;
1842         return 0;
1843 }
1844
1845 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1846 {
1847         unsigned long flags;
1848         if (debug_level >= DEBUG_LEVEL_INFO)
1849                 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1850         spin_lock_irqsave(&info->lock,flags);
1851         info->idle_mode = idle_mode;
1852         tx_set_idle(info);
1853         spin_unlock_irqrestore(&info->lock,flags);
1854         return 0;
1855 }
1856
1857 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1858 {
1859         int err;
1860         if (debug_level >= DEBUG_LEVEL_INFO)
1861                 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1862         COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1863         if (err)
1864                 return -EFAULT;
1865         return 0;
1866 }
1867
1868 static int set_interface(MGSLPC_INFO * info, int if_mode)
1869 {
1870         unsigned long flags;
1871         unsigned char val;
1872         if (debug_level >= DEBUG_LEVEL_INFO)
1873                 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1874         spin_lock_irqsave(&info->lock,flags);
1875         info->if_mode = if_mode;
1876
1877         val = read_reg(info, PVR) & 0x0f;
1878         switch (info->if_mode)
1879         {
1880         case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1881         case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1882         case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1883         }
1884         write_reg(info, PVR, val);
1885
1886         spin_unlock_irqrestore(&info->lock,flags);
1887         return 0;
1888 }
1889
1890 static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1891 {
1892         unsigned long flags;
1893
1894         if (debug_level >= DEBUG_LEVEL_INFO)
1895                 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1896
1897         spin_lock_irqsave(&info->lock,flags);
1898         if (enable) {
1899                 if (!info->tx_enabled)
1900                         tx_start(info, tty);
1901         } else {
1902                 if (info->tx_enabled)
1903                         tx_stop(info);
1904         }
1905         spin_unlock_irqrestore(&info->lock,flags);
1906         return 0;
1907 }
1908
1909 static int tx_abort(MGSLPC_INFO * info)
1910 {
1911         unsigned long flags;
1912
1913         if (debug_level >= DEBUG_LEVEL_INFO)
1914                 printk("tx_abort(%s)\n", info->device_name);
1915
1916         spin_lock_irqsave(&info->lock,flags);
1917         if (info->tx_active && info->tx_count &&
1918             info->params.mode == MGSL_MODE_HDLC) {
1919                 /* clear data count so FIFO is not filled on next IRQ.
1920                  * This results in underrun and abort transmission.
1921                  */
1922                 info->tx_count = info->tx_put = info->tx_get = 0;
1923                 info->tx_aborting = true;
1924         }
1925         spin_unlock_irqrestore(&info->lock,flags);
1926         return 0;
1927 }
1928
1929 static int set_rxenable(MGSLPC_INFO * info, int enable)
1930 {
1931         unsigned long flags;
1932
1933         if (debug_level >= DEBUG_LEVEL_INFO)
1934                 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1935
1936         spin_lock_irqsave(&info->lock,flags);
1937         if (enable) {
1938                 if (!info->rx_enabled)
1939                         rx_start(info);
1940         } else {
1941                 if (info->rx_enabled)
1942                         rx_stop(info);
1943         }
1944         spin_unlock_irqrestore(&info->lock,flags);
1945         return 0;
1946 }
1947
1948 /* wait for specified event to occur
1949  *
1950  * Arguments:           info    pointer to device instance data
1951  *                      mask    pointer to bitmask of events to wait for
1952  * Return Value:        0       if successful and bit mask updated with
1953  *                              of events triggerred,
1954  *                      otherwise error code
1955  */
1956 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
1957 {
1958         unsigned long flags;
1959         int s;
1960         int rc=0;
1961         struct mgsl_icount cprev, cnow;
1962         int events;
1963         int mask;
1964         struct  _input_signal_events oldsigs, newsigs;
1965         DECLARE_WAITQUEUE(wait, current);
1966
1967         COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
1968         if (rc)
1969                 return  -EFAULT;
1970
1971         if (debug_level >= DEBUG_LEVEL_INFO)
1972                 printk("wait_events(%s,%d)\n", info->device_name, mask);
1973
1974         spin_lock_irqsave(&info->lock,flags);
1975
1976         /* return immediately if state matches requested events */
1977         get_signals(info);
1978         s = info->serial_signals;
1979         events = mask &
1980                 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
1981                   ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
1982                   ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
1983                   ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
1984         if (events) {
1985                 spin_unlock_irqrestore(&info->lock,flags);
1986                 goto exit;
1987         }
1988
1989         /* save current irq counts */
1990         cprev = info->icount;
1991         oldsigs = info->input_signal_events;
1992
1993         if ((info->params.mode == MGSL_MODE_HDLC) &&
1994             (mask & MgslEvent_ExitHuntMode))
1995                 irq_enable(info, CHA, IRQ_EXITHUNT);
1996
1997         set_current_state(TASK_INTERRUPTIBLE);
1998         add_wait_queue(&info->event_wait_q, &wait);
1999
2000         spin_unlock_irqrestore(&info->lock,flags);
2001
2002
2003         for(;;) {
2004                 schedule();
2005                 if (signal_pending(current)) {
2006                         rc = -ERESTARTSYS;
2007                         break;
2008                 }
2009
2010                 /* get current irq counts */
2011                 spin_lock_irqsave(&info->lock,flags);
2012                 cnow = info->icount;
2013                 newsigs = info->input_signal_events;
2014                 set_current_state(TASK_INTERRUPTIBLE);
2015                 spin_unlock_irqrestore(&info->lock,flags);
2016
2017                 /* if no change, wait aborted for some reason */
2018                 if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2019                     newsigs.dsr_down == oldsigs.dsr_down &&
2020                     newsigs.dcd_up   == oldsigs.dcd_up   &&
2021                     newsigs.dcd_down == oldsigs.dcd_down &&
2022                     newsigs.cts_up   == oldsigs.cts_up   &&
2023                     newsigs.cts_down == oldsigs.cts_down &&
2024                     newsigs.ri_up    == oldsigs.ri_up    &&
2025                     newsigs.ri_down  == oldsigs.ri_down  &&
2026                     cnow.exithunt    == cprev.exithunt   &&
2027                     cnow.rxidle      == cprev.rxidle) {
2028                         rc = -EIO;
2029                         break;
2030                 }
2031
2032                 events = mask &
2033                         ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2034                           (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2035                           (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2036                           (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2037                           (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2038                           (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2039                           (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2040                           (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2041                           (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2042                           (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2043                 if (events)
2044                         break;
2045
2046                 cprev = cnow;
2047                 oldsigs = newsigs;
2048         }
2049
2050         remove_wait_queue(&info->event_wait_q, &wait);
2051         set_current_state(TASK_RUNNING);
2052
2053         if (mask & MgslEvent_ExitHuntMode) {
2054                 spin_lock_irqsave(&info->lock,flags);
2055                 if (!waitqueue_active(&info->event_wait_q))
2056                         irq_disable(info, CHA, IRQ_EXITHUNT);
2057                 spin_unlock_irqrestore(&info->lock,flags);
2058         }
2059 exit:
2060         if (rc == 0)
2061                 PUT_USER(rc, events, mask_ptr);
2062         return rc;
2063 }
2064
2065 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2066 {
2067         unsigned long flags;
2068         int rc;
2069         struct mgsl_icount cprev, cnow;
2070         DECLARE_WAITQUEUE(wait, current);
2071
2072         /* save current irq counts */
2073         spin_lock_irqsave(&info->lock,flags);
2074         cprev = info->icount;
2075         add_wait_queue(&info->status_event_wait_q, &wait);
2076         set_current_state(TASK_INTERRUPTIBLE);
2077         spin_unlock_irqrestore(&info->lock,flags);
2078
2079         for(;;) {
2080                 schedule();
2081                 if (signal_pending(current)) {
2082                         rc = -ERESTARTSYS;
2083                         break;
2084                 }
2085
2086                 /* get new irq counts */
2087                 spin_lock_irqsave(&info->lock,flags);
2088                 cnow = info->icount;
2089                 set_current_state(TASK_INTERRUPTIBLE);
2090                 spin_unlock_irqrestore(&info->lock,flags);
2091
2092                 /* if no change, wait aborted for some reason */
2093                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2094                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2095                         rc = -EIO;
2096                         break;
2097                 }
2098
2099                 /* check for change in caller specified modem input */
2100                 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2101                     (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2102                     (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2103                     (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2104                         rc = 0;
2105                         break;
2106                 }
2107
2108                 cprev = cnow;
2109         }
2110         remove_wait_queue(&info->status_event_wait_q, &wait);
2111         set_current_state(TASK_RUNNING);
2112         return rc;
2113 }
2114
2115 /* return the state of the serial control and status signals
2116  */
2117 static int tiocmget(struct tty_struct *tty)
2118 {
2119         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2120         unsigned int result;
2121         unsigned long flags;
2122
2123         spin_lock_irqsave(&info->lock,flags);
2124         get_signals(info);
2125         spin_unlock_irqrestore(&info->lock,flags);
2126
2127         result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2128                 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2129                 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2130                 ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2131                 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2132                 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2133
2134         if (debug_level >= DEBUG_LEVEL_INFO)
2135                 printk("%s(%d):%s tiocmget() value=%08X\n",
2136                          __FILE__,__LINE__, info->device_name, result );
2137         return result;
2138 }
2139
2140 /* set modem control signals (DTR/RTS)
2141  */
2142 static int tiocmset(struct tty_struct *tty,
2143                     unsigned int set, unsigned int clear)
2144 {
2145         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2146         unsigned long flags;
2147
2148         if (debug_level >= DEBUG_LEVEL_INFO)
2149                 printk("%s(%d):%s tiocmset(%x,%x)\n",
2150                         __FILE__,__LINE__,info->device_name, set, clear);
2151
2152         if (set & TIOCM_RTS)
2153                 info->serial_signals |= SerialSignal_RTS;
2154         if (set & TIOCM_DTR)
2155                 info->serial_signals |= SerialSignal_DTR;
2156         if (clear & TIOCM_RTS)
2157                 info->serial_signals &= ~SerialSignal_RTS;
2158         if (clear & TIOCM_DTR)
2159                 info->serial_signals &= ~SerialSignal_DTR;
2160
2161         spin_lock_irqsave(&info->lock,flags);
2162         set_signals(info);
2163         spin_unlock_irqrestore(&info->lock,flags);
2164
2165         return 0;
2166 }
2167
2168 /* Set or clear transmit break condition
2169  *
2170  * Arguments:           tty             pointer to tty instance data
2171  *                      break_state     -1=set break condition, 0=clear
2172  */
2173 static int mgslpc_break(struct tty_struct *tty, int break_state)
2174 {
2175         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2176         unsigned long flags;
2177
2178         if (debug_level >= DEBUG_LEVEL_INFO)
2179                 printk("%s(%d):mgslpc_break(%s,%d)\n",
2180                          __FILE__,__LINE__, info->device_name, break_state);
2181
2182         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2183                 return -EINVAL;
2184
2185         spin_lock_irqsave(&info->lock,flags);
2186         if (break_state == -1)
2187                 set_reg_bits(info, CHA+DAFO, BIT6);
2188         else
2189                 clear_reg_bits(info, CHA+DAFO, BIT6);
2190         spin_unlock_irqrestore(&info->lock,flags);
2191         return 0;
2192 }
2193
2194 static int mgslpc_get_icount(struct tty_struct *tty,
2195                                 struct serial_icounter_struct *icount)
2196 {
2197         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2198         struct mgsl_icount cnow;        /* kernel counter temps */
2199         unsigned long flags;
2200
2201         spin_lock_irqsave(&info->lock,flags);
2202         cnow = info->icount;
2203         spin_unlock_irqrestore(&info->lock,flags);
2204
2205         icount->cts = cnow.cts;
2206         icount->dsr = cnow.dsr;
2207         icount->rng = cnow.rng;
2208         icount->dcd = cnow.dcd;
2209         icount->rx = cnow.rx;
2210         icount->tx = cnow.tx;
2211         icount->frame = cnow.frame;
2212         icount->overrun = cnow.overrun;
2213         icount->parity = cnow.parity;
2214         icount->brk = cnow.brk;
2215         icount->buf_overrun = cnow.buf_overrun;
2216
2217         return 0;
2218 }
2219
2220 /* Service an IOCTL request
2221  *
2222  * Arguments:
2223  *
2224  *      tty     pointer to tty instance data
2225  *      cmd     IOCTL command code
2226  *      arg     command argument/context
2227  *
2228  * Return Value:        0 if success, otherwise error code
2229  */
2230 static int mgslpc_ioctl(struct tty_struct *tty,
2231                         unsigned int cmd, unsigned long arg)
2232 {
2233         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2234         void __user *argp = (void __user *)arg;
2235
2236         if (debug_level >= DEBUG_LEVEL_INFO)
2237                 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2238                         info->device_name, cmd );
2239
2240         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2241                 return -ENODEV;
2242
2243         if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2244             (cmd != TIOCMIWAIT)) {
2245                 if (tty->flags & (1 << TTY_IO_ERROR))
2246                     return -EIO;
2247         }
2248
2249         switch (cmd) {
2250         case MGSL_IOCGPARAMS:
2251                 return get_params(info, argp);
2252         case MGSL_IOCSPARAMS:
2253                 return set_params(info, argp, tty);
2254         case MGSL_IOCGTXIDLE:
2255                 return get_txidle(info, argp);
2256         case MGSL_IOCSTXIDLE:
2257                 return set_txidle(info, (int)arg);
2258         case MGSL_IOCGIF:
2259                 return get_interface(info, argp);
2260         case MGSL_IOCSIF:
2261                 return set_interface(info,(int)arg);
2262         case MGSL_IOCTXENABLE:
2263                 return set_txenable(info,(int)arg, tty);
2264         case MGSL_IOCRXENABLE:
2265                 return set_rxenable(info,(int)arg);
2266         case MGSL_IOCTXABORT:
2267                 return tx_abort(info);
2268         case MGSL_IOCGSTATS:
2269                 return get_stats(info, argp);
2270         case MGSL_IOCWAITEVENT:
2271                 return wait_events(info, argp);
2272         case TIOCMIWAIT:
2273                 return modem_input_wait(info,(int)arg);
2274         default:
2275                 return -ENOIOCTLCMD;
2276         }
2277         return 0;
2278 }
2279
2280 /* Set new termios settings
2281  *
2282  * Arguments:
2283  *
2284  *      tty             pointer to tty structure
2285  *      termios         pointer to buffer to hold returned old termios
2286  */
2287 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2288 {
2289         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2290         unsigned long flags;
2291
2292         if (debug_level >= DEBUG_LEVEL_INFO)
2293                 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2294                         tty->driver->name );
2295
2296         /* just return if nothing has changed */
2297         if ((tty->termios->c_cflag == old_termios->c_cflag)
2298             && (RELEVANT_IFLAG(tty->termios->c_iflag)
2299                 == RELEVANT_IFLAG(old_termios->c_iflag)))
2300           return;
2301
2302         mgslpc_change_params(info, tty);
2303
2304         /* Handle transition to B0 status */
2305         if (old_termios->c_cflag & CBAUD &&
2306             !(tty->termios->c_cflag & CBAUD)) {
2307                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2308                 spin_lock_irqsave(&info->lock,flags);
2309                 set_signals(info);
2310                 spin_unlock_irqrestore(&info->lock,flags);
2311         }
2312
2313         /* Handle transition away from B0 status */
2314         if (!(old_termios->c_cflag & CBAUD) &&
2315             tty->termios->c_cflag & CBAUD) {
2316                 info->serial_signals |= SerialSignal_DTR;
2317                 if (!(tty->termios->c_cflag & CRTSCTS) ||
2318                     !test_bit(TTY_THROTTLED, &tty->flags)) {
2319                         info->serial_signals |= SerialSignal_RTS;
2320                 }
2321                 spin_lock_irqsave(&info->lock,flags);
2322                 set_signals(info);
2323                 spin_unlock_irqrestore(&info->lock,flags);
2324         }
2325
2326         /* Handle turning off CRTSCTS */
2327         if (old_termios->c_cflag & CRTSCTS &&
2328             !(tty->termios->c_cflag & CRTSCTS)) {
2329                 tty->hw_stopped = 0;
2330                 tx_release(tty);
2331         }
2332 }
2333
2334 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2335 {
2336         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2337         struct tty_port *port = &info->port;
2338
2339         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2340                 return;
2341
2342         if (debug_level >= DEBUG_LEVEL_INFO)
2343                 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2344                          __FILE__,__LINE__, info->device_name, port->count);
2345
2346         WARN_ON(!port->count);
2347
2348         if (tty_port_close_start(port, tty, filp) == 0)
2349                 goto cleanup;
2350
2351         if (port->flags & ASYNC_INITIALIZED)
2352                 mgslpc_wait_until_sent(tty, info->timeout);
2353
2354         mgslpc_flush_buffer(tty);
2355
2356         tty_ldisc_flush(tty);
2357         shutdown(info, tty);
2358         
2359         tty_port_close_end(port, tty);
2360         tty_port_tty_set(port, NULL);
2361 cleanup:
2362         if (debug_level >= DEBUG_LEVEL_INFO)
2363                 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2364                         tty->driver->name, port->count);
2365 }
2366
2367 /* Wait until the transmitter is empty.
2368  */
2369 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2370 {
2371         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2372         unsigned long orig_jiffies, char_time;
2373
2374         if (!info )
2375                 return;
2376
2377         if (debug_level >= DEBUG_LEVEL_INFO)
2378                 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2379                          __FILE__,__LINE__, info->device_name );
2380
2381         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2382                 return;
2383
2384         if (!(info->port.flags & ASYNC_INITIALIZED))
2385                 goto exit;
2386
2387         orig_jiffies = jiffies;
2388
2389         /* Set check interval to 1/5 of estimated time to
2390          * send a character, and make it at least 1. The check
2391          * interval should also be less than the timeout.
2392          * Note: use tight timings here to satisfy the NIST-PCTS.
2393          */
2394
2395         if ( info->params.data_rate ) {
2396                 char_time = info->timeout/(32 * 5);
2397                 if (!char_time)
2398                         char_time++;
2399         } else
2400                 char_time = 1;
2401
2402         if (timeout)
2403                 char_time = min_t(unsigned long, char_time, timeout);
2404
2405         if (info->params.mode == MGSL_MODE_HDLC) {
2406                 while (info->tx_active) {
2407                         msleep_interruptible(jiffies_to_msecs(char_time));
2408                         if (signal_pending(current))
2409                                 break;
2410                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2411                                 break;
2412                 }
2413         } else {
2414                 while ((info->tx_count || info->tx_active) &&
2415                         info->tx_enabled) {
2416                         msleep_interruptible(jiffies_to_msecs(char_time));
2417                         if (signal_pending(current))
2418                                 break;
2419                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2420                                 break;
2421                 }
2422         }
2423
2424 exit:
2425         if (debug_level >= DEBUG_LEVEL_INFO)
2426                 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2427                          __FILE__,__LINE__, info->device_name );
2428 }
2429
2430 /* Called by tty_hangup() when a hangup is signaled.
2431  * This is the same as closing all open files for the port.
2432  */
2433 static void mgslpc_hangup(struct tty_struct *tty)
2434 {
2435         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2436
2437         if (debug_level >= DEBUG_LEVEL_INFO)
2438                 printk("%s(%d):mgslpc_hangup(%s)\n",
2439                          __FILE__,__LINE__, info->device_name );
2440
2441         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2442                 return;
2443
2444         mgslpc_flush_buffer(tty);
2445         shutdown(info, tty);
2446         tty_port_hangup(&info->port);
2447 }
2448
2449 static int carrier_raised(struct tty_port *port)
2450 {
2451         MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2452         unsigned long flags;
2453
2454         spin_lock_irqsave(&info->lock,flags);
2455         get_signals(info);
2456         spin_unlock_irqrestore(&info->lock,flags);
2457
2458         if (info->serial_signals & SerialSignal_DCD)
2459                 return 1;
2460         return 0;
2461 }
2462
2463 static void dtr_rts(struct tty_port *port, int onoff)
2464 {
2465         MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2466         unsigned long flags;
2467
2468         spin_lock_irqsave(&info->lock,flags);
2469         if (onoff)
2470                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2471         else
2472                 info->serial_signals &= ~SerialSignal_RTS + SerialSignal_DTR;
2473         set_signals(info);
2474         spin_unlock_irqrestore(&info->lock,flags);
2475 }
2476
2477
2478 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2479 {
2480         MGSLPC_INFO     *info;
2481         struct tty_port *port;
2482         int                     retval, line;
2483         unsigned long flags;
2484
2485         /* verify range of specified line number */
2486         line = tty->index;
2487         if ((line < 0) || (line >= mgslpc_device_count)) {
2488                 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2489                         __FILE__,__LINE__,line);
2490                 return -ENODEV;
2491         }
2492
2493         /* find the info structure for the specified line */
2494         info = mgslpc_device_list;
2495         while(info && info->line != line)
2496                 info = info->next_device;
2497         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2498                 return -ENODEV;
2499
2500         port = &info->port;
2501         tty->driver_data = info;
2502         tty_port_tty_set(port, tty);
2503
2504         if (debug_level >= DEBUG_LEVEL_INFO)
2505                 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2506                          __FILE__,__LINE__,tty->driver->name, port->count);
2507
2508         /* If port is closing, signal caller to try again */
2509         if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING){
2510                 if (port->flags & ASYNC_CLOSING)
2511                         interruptible_sleep_on(&port->close_wait);
2512                 retval = ((port->flags & ASYNC_HUP_NOTIFY) ?
2513                         -EAGAIN : -ERESTARTSYS);
2514                 goto cleanup;
2515         }
2516
2517         tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2518
2519         spin_lock_irqsave(&info->netlock, flags);
2520         if (info->netcount) {
2521                 retval = -EBUSY;
2522                 spin_unlock_irqrestore(&info->netlock, flags);
2523                 goto cleanup;
2524         }
2525         spin_lock(&port->lock);
2526         port->count++;
2527         spin_unlock(&port->lock);
2528         spin_unlock_irqrestore(&info->netlock, flags);
2529
2530         if (port->count == 1) {
2531                 /* 1st open on this device, init hardware */
2532                 retval = startup(info, tty);
2533                 if (retval < 0)
2534                         goto cleanup;
2535         }
2536
2537         retval = tty_port_block_til_ready(&info->port, tty, filp);
2538         if (retval) {
2539                 if (debug_level >= DEBUG_LEVEL_INFO)
2540                         printk("%s(%d):block_til_ready(%s) returned %d\n",
2541                                  __FILE__,__LINE__, info->device_name, retval);
2542                 goto cleanup;
2543         }
2544
2545         if (debug_level >= DEBUG_LEVEL_INFO)
2546                 printk("%s(%d):mgslpc_open(%s) success\n",
2547                          __FILE__,__LINE__, info->device_name);
2548         retval = 0;
2549
2550 cleanup:
2551         return retval;
2552 }
2553
2554 /*
2555  * /proc fs routines....
2556  */
2557
2558 static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2559 {
2560         char    stat_buf[30];
2561         unsigned long flags;
2562
2563         seq_printf(m, "%s:io:%04X irq:%d",
2564                       info->device_name, info->io_base, info->irq_level);
2565
2566         /* output current serial signal states */
2567         spin_lock_irqsave(&info->lock,flags);
2568         get_signals(info);
2569         spin_unlock_irqrestore(&info->lock,flags);
2570
2571         stat_buf[0] = 0;
2572         stat_buf[1] = 0;
2573         if (info->serial_signals & SerialSignal_RTS)
2574                 strcat(stat_buf, "|RTS");
2575         if (info->serial_signals & SerialSignal_CTS)
2576                 strcat(stat_buf, "|CTS");
2577         if (info->serial_signals & SerialSignal_DTR)
2578                 strcat(stat_buf, "|DTR");
2579         if (info->serial_signals & SerialSignal_DSR)
2580                 strcat(stat_buf, "|DSR");
2581         if (info->serial_signals & SerialSignal_DCD)
2582                 strcat(stat_buf, "|CD");
2583         if (info->serial_signals & SerialSignal_RI)
2584                 strcat(stat_buf, "|RI");
2585
2586         if (info->params.mode == MGSL_MODE_HDLC) {
2587                 seq_printf(m, " HDLC txok:%d rxok:%d",
2588                               info->icount.txok, info->icount.rxok);
2589                 if (info->icount.txunder)
2590                         seq_printf(m, " txunder:%d", info->icount.txunder);
2591                 if (info->icount.txabort)
2592                         seq_printf(m, " txabort:%d", info->icount.txabort);
2593                 if (info->icount.rxshort)
2594                         seq_printf(m, " rxshort:%d", info->icount.rxshort);
2595                 if (info->icount.rxlong)
2596                         seq_printf(m, " rxlong:%d", info->icount.rxlong);
2597                 if (info->icount.rxover)
2598                         seq_printf(m, " rxover:%d", info->icount.rxover);
2599                 if (info->icount.rxcrc)
2600                         seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2601         } else {
2602                 seq_printf(m, " ASYNC tx:%d rx:%d",
2603                               info->icount.tx, info->icount.rx);
2604                 if (info->icount.frame)
2605                         seq_printf(m, " fe:%d", info->icount.frame);
2606                 if (info->icount.parity)
2607                         seq_printf(m, " pe:%d", info->icount.parity);
2608                 if (info->icount.brk)
2609                         seq_printf(m, " brk:%d", info->icount.brk);
2610                 if (info->icount.overrun)
2611                         seq_printf(m, " oe:%d", info->icount.overrun);
2612         }
2613
2614         /* Append serial signal status to end */
2615         seq_printf(m, " %s\n", stat_buf+1);
2616
2617         seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2618                        info->tx_active,info->bh_requested,info->bh_running,
2619                        info->pending_bh);
2620 }
2621
2622 /* Called to print information about devices
2623  */
2624 static int mgslpc_proc_show(struct seq_file *m, void *v)
2625 {
2626         MGSLPC_INFO *info;
2627
2628         seq_printf(m, "synclink driver:%s\n", driver_version);
2629
2630         info = mgslpc_device_list;
2631         while( info ) {
2632                 line_info(m, info);
2633                 info = info->next_device;
2634         }
2635         return 0;
2636 }
2637
2638 static int mgslpc_proc_open(struct inode *inode, struct file *file)
2639 {
2640         return single_open(file, mgslpc_proc_show, NULL);
2641 }
2642
2643 static const struct file_operations mgslpc_proc_fops = {
2644         .owner          = THIS_MODULE,
2645         .open           = mgslpc_proc_open,
2646         .read           = seq_read,
2647         .llseek         = seq_lseek,
2648         .release        = single_release,
2649 };
2650
2651 static int rx_alloc_buffers(MGSLPC_INFO *info)
2652 {
2653         /* each buffer has header and data */
2654         info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2655
2656         /* calculate total allocation size for 8 buffers */
2657         info->rx_buf_total_size = info->rx_buf_size * 8;
2658
2659         /* limit total allocated memory */
2660         if (info->rx_buf_total_size > 0x10000)
2661                 info->rx_buf_total_size = 0x10000;
2662
2663         /* calculate number of buffers */
2664         info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2665
2666         info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2667         if (info->rx_buf == NULL)
2668                 return -ENOMEM;
2669
2670         rx_reset_buffers(info);
2671         return 0;
2672 }
2673
2674 static void rx_free_buffers(MGSLPC_INFO *info)
2675 {
2676         kfree(info->rx_buf);
2677         info->rx_buf = NULL;
2678 }
2679
2680 static int claim_resources(MGSLPC_INFO *info)
2681 {
2682         if (rx_alloc_buffers(info) < 0 ) {
2683                 printk( "Can't allocate rx buffer %s\n", info->device_name);
2684                 release_resources(info);
2685                 return -ENODEV;
2686         }
2687         return 0;
2688 }
2689
2690 static void release_resources(MGSLPC_INFO *info)
2691 {
2692         if (debug_level >= DEBUG_LEVEL_INFO)
2693                 printk("release_resources(%s)\n", info->device_name);
2694         rx_free_buffers(info);
2695 }
2696
2697 /* Add the specified device instance data structure to the
2698  * global linked list of devices and increment the device count.
2699  *
2700  * Arguments:           info    pointer to device instance data
2701  */
2702 static void mgslpc_add_device(MGSLPC_INFO *info)
2703 {
2704         info->next_device = NULL;
2705         info->line = mgslpc_device_count;
2706         sprintf(info->device_name,"ttySLP%d",info->line);
2707
2708         if (info->line < MAX_DEVICE_COUNT) {
2709                 if (maxframe[info->line])
2710                         info->max_frame_size = maxframe[info->line];
2711         }
2712
2713         mgslpc_device_count++;
2714
2715         if (!mgslpc_device_list)
2716                 mgslpc_device_list = info;
2717         else {
2718                 MGSLPC_INFO *current_dev = mgslpc_device_list;
2719                 while( current_dev->next_device )
2720                         current_dev = current_dev->next_device;
2721                 current_dev->next_device = info;
2722         }
2723
2724         if (info->max_frame_size < 4096)
2725                 info->max_frame_size = 4096;
2726         else if (info->max_frame_size > 65535)
2727                 info->max_frame_size = 65535;
2728
2729         printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2730                 info->device_name, info->io_base, info->irq_level);
2731
2732 #if SYNCLINK_GENERIC_HDLC
2733         hdlcdev_init(info);
2734 #endif
2735 }
2736
2737 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2738 {
2739         MGSLPC_INFO *info = mgslpc_device_list;
2740         MGSLPC_INFO *last = NULL;
2741
2742         while(info) {
2743                 if (info == remove_info) {
2744                         if (last)
2745                                 last->next_device = info->next_device;
2746                         else
2747                                 mgslpc_device_list = info->next_device;
2748 #if SYNCLINK_GENERIC_HDLC
2749                         hdlcdev_exit(info);
2750 #endif
2751                         release_resources(info);
2752                         kfree(info);
2753                         mgslpc_device_count--;
2754                         return;
2755                 }
2756                 last = info;
2757                 info = info->next_device;
2758         }
2759 }
2760
2761 static const struct pcmcia_device_id mgslpc_ids[] = {
2762         PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2763         PCMCIA_DEVICE_NULL
2764 };
2765 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2766
2767 static struct pcmcia_driver mgslpc_driver = {
2768         .owner          = THIS_MODULE,
2769         .name           = "synclink_cs",
2770         .probe          = mgslpc_probe,
2771         .remove         = mgslpc_detach,
2772         .id_table       = mgslpc_ids,
2773         .suspend        = mgslpc_suspend,
2774         .resume         = mgslpc_resume,
2775 };
2776
2777 static const struct tty_operations mgslpc_ops = {
2778         .open = mgslpc_open,
2779         .close = mgslpc_close,
2780         .write = mgslpc_write,
2781         .put_char = mgslpc_put_char,
2782         .flush_chars = mgslpc_flush_chars,
2783         .write_room = mgslpc_write_room,
2784         .chars_in_buffer = mgslpc_chars_in_buffer,
2785         .flush_buffer = mgslpc_flush_buffer,
2786         .ioctl = mgslpc_ioctl,
2787         .throttle = mgslpc_throttle,
2788         .unthrottle = mgslpc_unthrottle,
2789         .send_xchar = mgslpc_send_xchar,
2790         .break_ctl = mgslpc_break,
2791         .wait_until_sent = mgslpc_wait_until_sent,
2792         .set_termios = mgslpc_set_termios,
2793         .stop = tx_pause,
2794         .start = tx_release,
2795         .hangup = mgslpc_hangup,
2796         .tiocmget = tiocmget,
2797         .tiocmset = tiocmset,
2798         .get_icount = mgslpc_get_icount,
2799         .proc_fops = &mgslpc_proc_fops,
2800 };
2801
2802 static void synclink_cs_cleanup(void)
2803 {
2804         int rc;
2805
2806         while(mgslpc_device_list)
2807                 mgslpc_remove_device(mgslpc_device_list);
2808
2809         if (serial_driver) {
2810                 if ((rc = tty_unregister_driver(serial_driver)))
2811                         printk("%s(%d) failed to unregister tty driver err=%d\n",
2812                                __FILE__,__LINE__,rc);
2813                 put_tty_driver(serial_driver);
2814         }
2815
2816         pcmcia_unregister_driver(&mgslpc_driver);
2817 }
2818
2819 static int __init synclink_cs_init(void)
2820 {
2821     int rc;
2822
2823     if (break_on_load) {
2824             mgslpc_get_text_ptr();
2825             BREAKPOINT();
2826     }
2827
2828     if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
2829             return rc;
2830
2831     serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
2832     if (!serial_driver) {
2833             rc = -ENOMEM;
2834             goto error;
2835     }
2836
2837     /* Initialize the tty_driver structure */
2838
2839     serial_driver->driver_name = "synclink_cs";
2840     serial_driver->name = "ttySLP";
2841     serial_driver->major = ttymajor;
2842     serial_driver->minor_start = 64;
2843     serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2844     serial_driver->subtype = SERIAL_TYPE_NORMAL;
2845     serial_driver->init_termios = tty_std_termios;
2846     serial_driver->init_termios.c_cflag =
2847             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2848     serial_driver->flags = TTY_DRIVER_REAL_RAW;
2849     tty_set_operations(serial_driver, &mgslpc_ops);
2850
2851     if ((rc = tty_register_driver(serial_driver)) < 0) {
2852             printk("%s(%d):Couldn't register serial driver\n",
2853                    __FILE__,__LINE__);
2854             put_tty_driver(serial_driver);
2855             serial_driver = NULL;
2856             goto error;
2857     }
2858
2859     printk("%s %s, tty major#%d\n",
2860            driver_name, driver_version,
2861            serial_driver->major);
2862
2863     return 0;
2864
2865 error:
2866     synclink_cs_cleanup();
2867     return rc;
2868 }
2869
2870 static void __exit synclink_cs_exit(void)
2871 {
2872         synclink_cs_cleanup();
2873 }
2874
2875 module_init(synclink_cs_init);
2876 module_exit(synclink_cs_exit);
2877
2878 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2879 {
2880         unsigned int M, N;
2881         unsigned char val;
2882
2883         /* note:standard BRG mode is broken in V3.2 chip
2884          * so enhanced mode is always used
2885          */
2886
2887         if (rate) {
2888                 N = 3686400 / rate;
2889                 if (!N)
2890                         N = 1;
2891                 N >>= 1;
2892                 for (M = 1; N > 64 && M < 16; M++)
2893                         N >>= 1;
2894                 N--;
2895
2896                 /* BGR[5..0] = N
2897                  * BGR[9..6] = M
2898                  * BGR[7..0] contained in BGR register
2899                  * BGR[9..8] contained in CCR2[7..6]
2900                  * divisor = (N+1)*2^M
2901                  *
2902                  * Note: M *must* not be zero (causes asymetric duty cycle)
2903                  */
2904                 write_reg(info, (unsigned char) (channel + BGR),
2905                                   (unsigned char) ((M << 6) + N));
2906                 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2907                 val |= ((M << 4) & 0xc0);
2908                 write_reg(info, (unsigned char) (channel + CCR2), val);
2909         }
2910 }
2911
2912 /* Enabled the AUX clock output at the specified frequency.
2913  */
2914 static void enable_auxclk(MGSLPC_INFO *info)
2915 {
2916         unsigned char val;
2917
2918         /* MODE
2919          *
2920          * 07..06  MDS[1..0] 10 = transparent HDLC mode
2921          * 05      ADM Address Mode, 0 = no addr recognition
2922          * 04      TMD Timer Mode, 0 = external
2923          * 03      RAC Receiver Active, 0 = inactive
2924          * 02      RTS 0=RTS active during xmit, 1=RTS always active
2925          * 01      TRS Timer Resolution, 1=512
2926          * 00      TLP Test Loop, 0 = no loop
2927          *
2928          * 1000 0010
2929          */
2930         val = 0x82;
2931
2932         /* channel B RTS is used to enable AUXCLK driver on SP505 */
2933         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2934                 val |= BIT2;
2935         write_reg(info, CHB + MODE, val);
2936
2937         /* CCR0
2938          *
2939          * 07      PU Power Up, 1=active, 0=power down
2940          * 06      MCE Master Clock Enable, 1=enabled
2941          * 05      Reserved, 0
2942          * 04..02  SC[2..0] Encoding
2943          * 01..00  SM[1..0] Serial Mode, 00=HDLC
2944          *
2945          * 11000000
2946          */
2947         write_reg(info, CHB + CCR0, 0xc0);
2948
2949         /* CCR1
2950          *
2951          * 07      SFLG Shared Flag, 0 = disable shared flags
2952          * 06      GALP Go Active On Loop, 0 = not used
2953          * 05      GLP Go On Loop, 0 = not used
2954          * 04      ODS Output Driver Select, 1=TxD is push-pull output
2955          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
2956          * 02..00  CM[2..0] Clock Mode
2957          *
2958          * 0001 0111
2959          */
2960         write_reg(info, CHB + CCR1, 0x17);
2961
2962         /* CCR2 (Channel B)
2963          *
2964          * 07..06  BGR[9..8] Baud rate bits 9..8
2965          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
2966          * 04      SSEL Clock source select, 1=submode b
2967          * 03      TOE 0=TxCLK is input, 1=TxCLK is output
2968          * 02      RWX Read/Write Exchange 0=disabled
2969          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
2970          * 00      DIV, data inversion 0=disabled, 1=enabled
2971          *
2972          * 0011 1000
2973          */
2974         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2975                 write_reg(info, CHB + CCR2, 0x38);
2976         else
2977                 write_reg(info, CHB + CCR2, 0x30);
2978
2979         /* CCR4
2980          *
2981          * 07      MCK4 Master Clock Divide by 4, 1=enabled
2982          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
2983          * 05      TST1 Test Pin, 0=normal operation
2984          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
2985          * 03..02  Reserved, must be 0
2986          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
2987          *
2988          * 0101 0000
2989          */
2990         write_reg(info, CHB + CCR4, 0x50);
2991
2992         /* if auxclk not enabled, set internal BRG so
2993          * CTS transitions can be detected (requires TxC)
2994          */
2995         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2996                 mgslpc_set_rate(info, CHB, info->params.clock_speed);
2997         else
2998                 mgslpc_set_rate(info, CHB, 921600);
2999 }
3000
3001 static void loopback_enable(MGSLPC_INFO *info)
3002 {
3003         unsigned char val;
3004
3005         /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */
3006         val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3007         write_reg(info, CHA + CCR1, val);
3008
3009         /* CCR2:04 SSEL Clock source select, 1=submode b */
3010         val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3011         write_reg(info, CHA + CCR2, val);
3012
3013         /* set LinkSpeed if available, otherwise default to 2Mbps */
3014         if (info->params.clock_speed)
3015                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3016         else
3017                 mgslpc_set_rate(info, CHA, 1843200);
3018
3019         /* MODE:00 TLP Test Loop, 1=loopback enabled */
3020         val = read_reg(info, CHA + MODE) | BIT0;
3021         write_reg(info, CHA + MODE, val);
3022 }
3023
3024 static void hdlc_mode(MGSLPC_INFO *info)
3025 {
3026         unsigned char val;
3027         unsigned char clkmode, clksubmode;
3028
3029         /* disable all interrupts */
3030         irq_disable(info, CHA, 0xffff);
3031         irq_disable(info, CHB, 0xffff);
3032         port_irq_disable(info, 0xff);
3033
3034         /* assume clock mode 0a, rcv=RxC xmt=TxC */
3035         clkmode = clksubmode = 0;
3036         if (info->params.flags & HDLC_FLAG_RXC_DPLL
3037             && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3038                 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3039                 clkmode = 7;
3040         } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3041                  && info->params.flags & HDLC_FLAG_TXC_BRG) {
3042                 /* clock mode 7b, rcv = BRG, xmt = BRG */
3043                 clkmode = 7;
3044                 clksubmode = 1;
3045         } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3046                 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3047                         /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3048                         clkmode = 6;
3049                         clksubmode = 1;
3050                 } else {
3051                         /* clock mode 6a, rcv = DPLL, xmt = TxC */
3052                         clkmode = 6;
3053                 }
3054         } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3055                 /* clock mode 0b, rcv = RxC, xmt = BRG */
3056                 clksubmode = 1;
3057         }
3058
3059         /* MODE
3060          *
3061          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3062          * 05      ADM Address Mode, 0 = no addr recognition
3063          * 04      TMD Timer Mode, 0 = external
3064          * 03      RAC Receiver Active, 0 = inactive
3065          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3066          * 01      TRS Timer Resolution, 1=512
3067          * 00      TLP Test Loop, 0 = no loop
3068          *
3069          * 1000 0010
3070          */
3071         val = 0x82;
3072         if (info->params.loopback)
3073                 val |= BIT0;
3074
3075         /* preserve RTS state */
3076         if (info->serial_signals & SerialSignal_RTS)
3077                 val |= BIT2;
3078         write_reg(info, CHA + MODE, val);
3079
3080         /* CCR0
3081          *
3082          * 07      PU Power Up, 1=active, 0=power down
3083          * 06      MCE Master Clock Enable, 1=enabled
3084          * 05      Reserved, 0
3085          * 04..02  SC[2..0] Encoding
3086          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3087          *
3088          * 11000000
3089          */
3090         val = 0xc0;
3091         switch (info->params.encoding)
3092         {
3093         case HDLC_ENCODING_NRZI:
3094                 val |= BIT3;
3095                 break;
3096         case HDLC_ENCODING_BIPHASE_SPACE:
3097                 val |= BIT4;
3098                 break;          // FM0
3099         case HDLC_ENCODING_BIPHASE_MARK:
3100                 val |= BIT4 + BIT2;
3101                 break;          // FM1
3102         case HDLC_ENCODING_BIPHASE_LEVEL:
3103                 val |= BIT4 + BIT3;
3104                 break;          // Manchester
3105         }
3106         write_reg(info, CHA + CCR0, val);
3107
3108         /* CCR1
3109          *
3110          * 07      SFLG Shared Flag, 0 = disable shared flags
3111          * 06      GALP Go Active On Loop, 0 = not used
3112          * 05      GLP Go On Loop, 0 = not used
3113          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3114          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3115          * 02..00  CM[2..0] Clock Mode
3116          *
3117          * 0001 0000
3118          */
3119         val = 0x10 + clkmode;
3120         write_reg(info, CHA + CCR1, val);
3121
3122         /* CCR2
3123          *
3124          * 07..06  BGR[9..8] Baud rate bits 9..8
3125          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3126          * 04      SSEL Clock source select, 1=submode b
3127          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3128          * 02      RWX Read/Write Exchange 0=disabled
3129          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3130          * 00      DIV, data inversion 0=disabled, 1=enabled
3131          *
3132          * 0000 0000
3133          */
3134         val = 0x00;
3135         if (clkmode == 2 || clkmode == 3 || clkmode == 6
3136             || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3137                 val |= BIT5;
3138         if (clksubmode)
3139                 val |= BIT4;
3140         if (info->params.crc_type == HDLC_CRC_32_CCITT)
3141                 val |= BIT1;
3142         if (info->params.encoding == HDLC_ENCODING_NRZB)
3143                 val |= BIT0;
3144         write_reg(info, CHA + CCR2, val);
3145
3146         /* CCR3
3147          *
3148          * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3149          * 05      EPT Enable preamble transmission, 1=enabled
3150          * 04      RADD Receive address pushed to FIFO, 0=disabled
3151          * 03      CRL CRC Reset Level, 0=FFFF
3152          * 02      RCRC Rx CRC 0=On 1=Off
3153          * 01      TCRC Tx CRC 0=On 1=Off
3154          * 00      PSD DPLL Phase Shift Disable
3155          *
3156          * 0000 0000
3157          */
3158         val = 0x00;
3159         if (info->params.crc_type == HDLC_CRC_NONE)
3160                 val |= BIT2 + BIT1;
3161         if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3162                 val |= BIT5;
3163         switch (info->params.preamble_length)
3164         {
3165         case HDLC_PREAMBLE_LENGTH_16BITS:
3166                 val |= BIT6;
3167                 break;
3168         case HDLC_PREAMBLE_LENGTH_32BITS:
3169                 val |= BIT6;
3170                 break;
3171         case HDLC_PREAMBLE_LENGTH_64BITS:
3172                 val |= BIT7 + BIT6;
3173                 break;
3174         }
3175         write_reg(info, CHA + CCR3, val);
3176
3177         /* PRE - Preamble pattern */
3178         val = 0;
3179         switch (info->params.preamble)
3180         {
3181         case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3182         case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3183         case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3184         case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3185         }
3186         write_reg(info, CHA + PRE, val);
3187
3188         /* CCR4
3189          *
3190          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3191          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3192          * 05      TST1 Test Pin, 0=normal operation
3193          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3194          * 03..02  Reserved, must be 0
3195          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3196          *
3197          * 0101 0000
3198          */
3199         val = 0x50;
3200         write_reg(info, CHA + CCR4, val);
3201         if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3202                 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3203         else
3204                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3205
3206         /* RLCR Receive length check register
3207          *
3208          * 7     1=enable receive length check
3209          * 6..0  Max frame length = (RL + 1) * 32
3210          */
3211         write_reg(info, CHA + RLCR, 0);
3212
3213         /* XBCH Transmit Byte Count High
3214          *
3215          * 07      DMA mode, 0 = interrupt driven
3216          * 06      NRM, 0=ABM (ignored)
3217          * 05      CAS Carrier Auto Start
3218          * 04      XC Transmit Continuously (ignored)
3219          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3220          *
3221          * 0000 0000
3222          */
3223         val = 0x00;
3224         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3225                 val |= BIT5;
3226         write_reg(info, CHA + XBCH, val);
3227         enable_auxclk(info);
3228         if (info->params.loopback || info->testing_irq)
3229                 loopback_enable(info);
3230         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3231         {
3232                 irq_enable(info, CHB, IRQ_CTS);
3233                 /* PVR[3] 1=AUTO CTS active */
3234                 set_reg_bits(info, CHA + PVR, BIT3);
3235         } else
3236                 clear_reg_bits(info, CHA + PVR, BIT3);
3237
3238         irq_enable(info, CHA,
3239                          IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3240                          IRQ_UNDERRUN + IRQ_TXFIFO);
3241         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3242         wait_command_complete(info, CHA);
3243         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3244
3245         /* Master clock mode enabled above to allow reset commands
3246          * to complete even if no data clocks are present.
3247          *
3248          * Disable master clock mode for normal communications because
3249          * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3250          * IRQ when in master clock mode.
3251          *
3252          * Leave master clock mode enabled for IRQ test because the
3253          * timer IRQ used by the test can only happen in master clock mode.
3254          */
3255         if (!info->testing_irq)
3256                 clear_reg_bits(info, CHA + CCR0, BIT6);
3257
3258         tx_set_idle(info);
3259
3260         tx_stop(info);
3261         rx_stop(info);
3262 }
3263
3264 static void rx_stop(MGSLPC_INFO *info)
3265 {
3266         if (debug_level >= DEBUG_LEVEL_ISR)
3267                 printk("%s(%d):rx_stop(%s)\n",
3268                          __FILE__,__LINE__, info->device_name );
3269
3270         /* MODE:03 RAC Receiver Active, 0=inactive */
3271         clear_reg_bits(info, CHA + MODE, BIT3);
3272
3273         info->rx_enabled = false;
3274         info->rx_overflow = false;
3275 }
3276
3277 static void rx_start(MGSLPC_INFO *info)
3278 {
3279         if (debug_level >= DEBUG_LEVEL_ISR)
3280                 printk("%s(%d):rx_start(%s)\n",
3281                          __FILE__,__LINE__, info->device_name );
3282
3283         rx_reset_buffers(info);
3284         info->rx_enabled = false;
3285         info->rx_overflow = false;
3286
3287         /* MODE:03 RAC Receiver Active, 1=active */
3288         set_reg_bits(info, CHA + MODE, BIT3);
3289
3290         info->rx_enabled = true;
3291 }
3292
3293 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3294 {
3295         if (debug_level >= DEBUG_LEVEL_ISR)
3296                 printk("%s(%d):tx_start(%s)\n",
3297                          __FILE__,__LINE__, info->device_name );
3298
3299         if (info->tx_count) {
3300                 /* If auto RTS enabled and RTS is inactive, then assert */
3301                 /* RTS and set a flag indicating that the driver should */
3302                 /* negate RTS when the transmission completes. */
3303                 info->drop_rts_on_tx_done = false;
3304
3305                 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3306                         get_signals(info);
3307                         if (!(info->serial_signals & SerialSignal_RTS)) {
3308                                 info->serial_signals |= SerialSignal_RTS;
3309                                 set_signals(info);
3310                                 info->drop_rts_on_tx_done = true;
3311                         }
3312                 }
3313
3314                 if (info->params.mode == MGSL_MODE_ASYNC) {
3315                         if (!info->tx_active) {
3316                                 info->tx_active = true;
3317                                 tx_ready(info, tty);
3318                         }
3319                 } else {
3320                         info->tx_active = true;
3321                         tx_ready(info, tty);
3322                         mod_timer(&info->tx_timer, jiffies +
3323                                         msecs_to_jiffies(5000));
3324                 }
3325         }
3326
3327         if (!info->tx_enabled)
3328                 info->tx_enabled = true;
3329 }
3330
3331 static void tx_stop(MGSLPC_INFO *info)
3332 {
3333         if (debug_level >= DEBUG_LEVEL_ISR)
3334                 printk("%s(%d):tx_stop(%s)\n",
3335                          __FILE__,__LINE__, info->device_name );
3336
3337         del_timer(&info->tx_timer);
3338
3339         info->tx_enabled = false;
3340         info->tx_active = false;
3341 }
3342
3343 /* Reset the adapter to a known state and prepare it for further use.
3344  */
3345 static void reset_device(MGSLPC_INFO *info)
3346 {
3347         /* power up both channels (set BIT7) */
3348         write_reg(info, CHA + CCR0, 0x80);
3349         write_reg(info, CHB + CCR0, 0x80);
3350         write_reg(info, CHA + MODE, 0);
3351         write_reg(info, CHB + MODE, 0);
3352
3353         /* disable all interrupts */
3354         irq_disable(info, CHA, 0xffff);
3355         irq_disable(info, CHB, 0xffff);
3356         port_irq_disable(info, 0xff);
3357
3358         /* PCR Port Configuration Register
3359          *
3360          * 07..04  DEC[3..0] Serial I/F select outputs
3361          * 03      output, 1=AUTO CTS control enabled
3362          * 02      RI Ring Indicator input 0=active
3363          * 01      DSR input 0=active
3364          * 00      DTR output 0=active
3365          *
3366          * 0000 0110
3367          */
3368         write_reg(info, PCR, 0x06);
3369
3370         /* PVR Port Value Register
3371          *
3372          * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3373          * 03      AUTO CTS output 1=enabled
3374          * 02      RI Ring Indicator input
3375          * 01      DSR input
3376          * 00      DTR output (1=inactive)
3377          *
3378          * 0000 0001
3379          */
3380 //      write_reg(info, PVR, PVR_DTR);
3381
3382         /* IPC Interrupt Port Configuration
3383          *
3384          * 07      VIS 1=Masked interrupts visible
3385          * 06..05  Reserved, 0
3386          * 04..03  SLA Slave address, 00 ignored
3387          * 02      CASM Cascading Mode, 1=daisy chain
3388          * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3389          *
3390          * 0000 0101
3391          */
3392         write_reg(info, IPC, 0x05);
3393 }
3394
3395 static void async_mode(MGSLPC_INFO *info)
3396 {
3397         unsigned char val;
3398
3399         /* disable all interrupts */
3400         irq_disable(info, CHA, 0xffff);
3401         irq_disable(info, CHB, 0xffff);
3402         port_irq_disable(info, 0xff);
3403
3404         /* MODE
3405          *
3406          * 07      Reserved, 0
3407          * 06      FRTS RTS State, 0=active
3408          * 05      FCTS Flow Control on CTS
3409          * 04      FLON Flow Control Enable
3410          * 03      RAC Receiver Active, 0 = inactive
3411          * 02      RTS 0=Auto RTS, 1=manual RTS
3412          * 01      TRS Timer Resolution, 1=512
3413          * 00      TLP Test Loop, 0 = no loop
3414          *
3415          * 0000 0110
3416          */
3417         val = 0x06;
3418         if (info->params.loopback)
3419                 val |= BIT0;
3420
3421         /* preserve RTS state */
3422         if (!(info->serial_signals & SerialSignal_RTS))
3423                 val |= BIT6;
3424         write_reg(info, CHA + MODE, val);
3425
3426         /* CCR0
3427          *
3428          * 07      PU Power Up, 1=active, 0=power down
3429          * 06      MCE Master Clock Enable, 1=enabled
3430          * 05      Reserved, 0
3431          * 04..02  SC[2..0] Encoding, 000=NRZ
3432          * 01..00  SM[1..0] Serial Mode, 11=Async
3433          *
3434          * 1000 0011
3435          */
3436         write_reg(info, CHA + CCR0, 0x83);
3437
3438         /* CCR1
3439          *
3440          * 07..05  Reserved, 0
3441          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3442          * 03      BCR Bit Clock Rate, 1=16x
3443          * 02..00  CM[2..0] Clock Mode, 111=BRG
3444          *
3445          * 0001 1111
3446          */
3447         write_reg(info, CHA + CCR1, 0x1f);
3448
3449         /* CCR2 (channel A)
3450          *
3451          * 07..06  BGR[9..8] Baud rate bits 9..8
3452          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3453          * 04      SSEL Clock source select, 1=submode b
3454          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3455          * 02      RWX Read/Write Exchange 0=disabled
3456          * 01      Reserved, 0
3457          * 00      DIV, data inversion 0=disabled, 1=enabled
3458          *
3459          * 0001 0000
3460          */
3461         write_reg(info, CHA + CCR2, 0x10);
3462
3463         /* CCR3
3464          *
3465          * 07..01  Reserved, 0
3466          * 00      PSD DPLL Phase Shift Disable
3467          *
3468          * 0000 0000
3469          */
3470         write_reg(info, CHA + CCR3, 0);
3471
3472         /* CCR4
3473          *
3474          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3475          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3476          * 05      TST1 Test Pin, 0=normal operation
3477          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3478          * 03..00  Reserved, must be 0
3479          *
3480          * 0101 0000
3481          */
3482         write_reg(info, CHA + CCR4, 0x50);
3483         mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3484
3485         /* DAFO Data Format
3486          *
3487          * 07      Reserved, 0
3488          * 06      XBRK transmit break, 0=normal operation
3489          * 05      Stop bits (0=1, 1=2)
3490          * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3491          * 02      PAREN Parity Enable
3492          * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3493          *
3494          */
3495         val = 0x00;
3496         if (info->params.data_bits != 8)
3497                 val |= BIT0;    /* 7 bits */
3498         if (info->params.stop_bits != 1)
3499                 val |= BIT5;
3500         if (info->params.parity != ASYNC_PARITY_NONE)
3501         {
3502                 val |= BIT2;    /* Parity enable */
3503                 if (info->params.parity == ASYNC_PARITY_ODD)
3504                         val |= BIT3;
3505                 else
3506                         val |= BIT4;
3507         }
3508         write_reg(info, CHA + DAFO, val);
3509
3510         /* RFC Rx FIFO Control
3511          *
3512          * 07      Reserved, 0
3513          * 06      DPS, 1=parity bit not stored in data byte
3514          * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3515          * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3516          * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3517          * 01      Reserved, 0
3518          * 00      TCDE Terminate Char Detect Enable, 0=disabled
3519          *
3520          * 0101 1100
3521          */
3522         write_reg(info, CHA + RFC, 0x5c);
3523
3524         /* RLCR Receive length check register
3525          *
3526          * Max frame length = (RL + 1) * 32
3527          */
3528         write_reg(info, CHA + RLCR, 0);
3529
3530         /* XBCH Transmit Byte Count High
3531          *
3532          * 07      DMA mode, 0 = interrupt driven
3533          * 06      NRM, 0=ABM (ignored)
3534          * 05      CAS Carrier Auto Start
3535          * 04      XC Transmit Continuously (ignored)
3536          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3537          *
3538          * 0000 0000
3539          */
3540         val = 0x00;
3541         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3542                 val |= BIT5;
3543         write_reg(info, CHA + XBCH, val);
3544         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3545                 irq_enable(info, CHA, IRQ_CTS);
3546
3547         /* MODE:03 RAC Receiver Active, 1=active */
3548         set_reg_bits(info, CHA + MODE, BIT3);
3549         enable_auxclk(info);
3550         if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3551                 irq_enable(info, CHB, IRQ_CTS);
3552                 /* PVR[3] 1=AUTO CTS active */
3553                 set_reg_bits(info, CHA + PVR, BIT3);
3554         } else
3555                 clear_reg_bits(info, CHA + PVR, BIT3);
3556         irq_enable(info, CHA,
3557                           IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3558                           IRQ_ALLSENT + IRQ_TXFIFO);
3559         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3560         wait_command_complete(info, CHA);
3561         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3562 }
3563
3564 /* Set the HDLC idle mode for the transmitter.
3565  */
3566 static void tx_set_idle(MGSLPC_INFO *info)
3567 {
3568         /* Note: ESCC2 only supports flags and one idle modes */
3569         if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3570                 set_reg_bits(info, CHA + CCR1, BIT3);
3571         else
3572                 clear_reg_bits(info, CHA + CCR1, BIT3);
3573 }
3574
3575 /* get state of the V24 status (input) signals.
3576  */
3577 static void get_signals(MGSLPC_INFO *info)
3578 {
3579         unsigned char status = 0;
3580
3581         /* preserve DTR and RTS */
3582         info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3583
3584         if (read_reg(info, CHB + VSTR) & BIT7)
3585                 info->serial_signals |= SerialSignal_DCD;
3586         if (read_reg(info, CHB + STAR) & BIT1)
3587                 info->serial_signals |= SerialSignal_CTS;
3588
3589         status = read_reg(info, CHA + PVR);
3590         if (!(status & PVR_RI))
3591                 info->serial_signals |= SerialSignal_RI;
3592         if (!(status & PVR_DSR))
3593                 info->serial_signals |= SerialSignal_DSR;
3594 }
3595
3596 /* Set the state of DTR and RTS based on contents of
3597  * serial_signals member of device extension.
3598  */
3599 static void set_signals(MGSLPC_INFO *info)
3600 {
3601         unsigned char val;
3602
3603         val = read_reg(info, CHA + MODE);
3604         if (info->params.mode == MGSL_MODE_ASYNC) {
3605                 if (info->serial_signals & SerialSignal_RTS)
3606                         val &= ~BIT6;
3607                 else
3608                         val |= BIT6;
3609         } else {
3610                 if (info->serial_signals & SerialSignal_RTS)
3611                         val |= BIT2;
3612                 else
3613                         val &= ~BIT2;
3614         }
3615         write_reg(info, CHA + MODE, val);
3616
3617         if (info->serial_signals & SerialSignal_DTR)
3618                 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3619         else
3620                 set_reg_bits(info, CHA + PVR, PVR_DTR);
3621 }
3622
3623 static void rx_reset_buffers(MGSLPC_INFO *info)
3624 {
3625         RXBUF *buf;
3626         int i;
3627
3628         info->rx_put = 0;
3629         info->rx_get = 0;
3630         info->rx_frame_count = 0;
3631         for (i=0 ; i < info->rx_buf_count ; i++) {
3632                 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3633                 buf->status = buf->count = 0;
3634         }
3635 }
3636
3637 /* Attempt to return a received HDLC frame
3638  * Only frames received without errors are returned.
3639  *
3640  * Returns true if frame returned, otherwise false
3641  */
3642 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3643 {
3644         unsigned short status;
3645         RXBUF *buf;
3646         unsigned int framesize = 0;
3647         unsigned long flags;
3648         bool return_frame = false;
3649
3650         if (info->rx_frame_count == 0)
3651                 return false;
3652
3653         buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3654
3655         status = buf->status;
3656
3657         /* 07  VFR  1=valid frame
3658          * 06  RDO  1=data overrun
3659          * 05  CRC  1=OK, 0=error
3660          * 04  RAB  1=frame aborted
3661          */
3662         if ((status & 0xf0) != 0xA0) {
3663                 if (!(status & BIT7) || (status & BIT4))
3664                         info->icount.rxabort++;
3665                 else if (status & BIT6)
3666                         info->icount.rxover++;
3667                 else if (!(status & BIT5)) {
3668                         info->icount.rxcrc++;
3669                         if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3670                                 return_frame = true;
3671                 }
3672                 framesize = 0;
3673 #if SYNCLINK_GENERIC_HDLC
3674                 {
3675                         info->netdev->stats.rx_errors++;
3676                         info->netdev->stats.rx_frame_errors++;
3677                 }
3678 #endif
3679         } else
3680                 return_frame = true;
3681
3682         if (return_frame)
3683                 framesize = buf->count;
3684
3685         if (debug_level >= DEBUG_LEVEL_BH)
3686                 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3687                         __FILE__,__LINE__,info->device_name,status,framesize);
3688
3689         if (debug_level >= DEBUG_LEVEL_DATA)
3690                 trace_block(info, buf->data, framesize, 0);
3691
3692         if (framesize) {
3693                 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3694                       framesize+1 > info->max_frame_size) ||
3695                     framesize > info->max_frame_size)
3696                         info->icount.rxlong++;
3697                 else {
3698                         if (status & BIT5)
3699                                 info->icount.rxok++;
3700
3701                         if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3702                                 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3703                                 ++framesize;
3704                         }
3705
3706 #if SYNCLINK_GENERIC_HDLC
3707                         if (info->netcount)
3708                                 hdlcdev_rx(info, buf->data, framesize);
3709                         else
3710 #endif
3711                                 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3712                 }
3713         }
3714
3715         spin_lock_irqsave(&info->lock,flags);
3716         buf->status = buf->count = 0;
3717         info->rx_frame_count--;
3718         info->rx_get++;
3719         if (info->rx_get >= info->rx_buf_count)
3720                 info->rx_get = 0;
3721         spin_unlock_irqrestore(&info->lock,flags);
3722
3723         return true;
3724 }
3725
3726 static bool register_test(MGSLPC_INFO *info)
3727 {
3728         static unsigned char patterns[] =
3729             { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3730         static unsigned int count = ARRAY_SIZE(patterns);
3731         unsigned int i;
3732         bool rc = true;
3733         unsigned long flags;
3734
3735         spin_lock_irqsave(&info->lock,flags);
3736         reset_device(info);
3737
3738         for (i = 0; i < count; i++) {
3739                 write_reg(info, XAD1, patterns[i]);
3740                 write_reg(info, XAD2, patterns[(i + 1) % count]);
3741                 if ((read_reg(info, XAD1) != patterns[i]) ||
3742                     (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3743                         rc = false;
3744                         break;
3745                 }
3746         }
3747
3748         spin_unlock_irqrestore(&info->lock,flags);
3749         return rc;
3750 }
3751
3752 static bool irq_test(MGSLPC_INFO *info)
3753 {
3754         unsigned long end_time;
3755         unsigned long flags;
3756
3757         spin_lock_irqsave(&info->lock,flags);
3758         reset_device(info);
3759
3760         info->testing_irq = true;
3761         hdlc_mode(info);
3762
3763         info->irq_occurred = false;
3764
3765         /* init hdlc mode */
3766
3767         irq_enable(info, CHA, IRQ_TIMER);
3768         write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3769         issue_command(info, CHA, CMD_START_TIMER);
3770
3771         spin_unlock_irqrestore(&info->lock,flags);
3772
3773         end_time=100;
3774         while(end_time-- && !info->irq_occurred) {
3775                 msleep_interruptible(10);
3776         }
3777
3778         info->testing_irq = false;
3779
3780         spin_lock_irqsave(&info->lock,flags);
3781         reset_device(info);
3782         spin_unlock_irqrestore(&info->lock,flags);
3783
3784         return info->irq_occurred;
3785 }
3786
3787 static int adapter_test(MGSLPC_INFO *info)
3788 {
3789         if (!register_test(info)) {
3790                 info->init_error = DiagStatus_AddressFailure;
3791                 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
3792                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
3793                 return -ENODEV;
3794         }
3795
3796         if (!irq_test(info)) {
3797                 info->init_error = DiagStatus_IrqFailure;
3798                 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3799                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
3800                 return -ENODEV;
3801         }
3802
3803         if (debug_level >= DEBUG_LEVEL_INFO)
3804                 printk("%s(%d):device %s passed diagnostics\n",
3805                         __FILE__,__LINE__,info->device_name);
3806         return 0;
3807 }
3808
3809 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3810 {
3811         int i;
3812         int linecount;
3813         if (xmit)
3814                 printk("%s tx data:\n",info->device_name);
3815         else
3816                 printk("%s rx data:\n",info->device_name);
3817
3818         while(count) {
3819                 if (count > 16)
3820                         linecount = 16;
3821                 else
3822                         linecount = count;
3823
3824                 for(i=0;i<linecount;i++)
3825                         printk("%02X ",(unsigned char)data[i]);
3826                 for(;i<17;i++)
3827                         printk("   ");
3828                 for(i=0;i<linecount;i++) {
3829                         if (data[i]>=040 && data[i]<=0176)
3830                                 printk("%c",data[i]);
3831                         else
3832                                 printk(".");
3833                 }
3834                 printk("\n");
3835
3836                 data  += linecount;
3837                 count -= linecount;
3838         }
3839 }
3840
3841 /* HDLC frame time out
3842  * update stats and do tx completion processing
3843  */
3844 static void tx_timeout(unsigned long context)
3845 {
3846         MGSLPC_INFO *info = (MGSLPC_INFO*)context;
3847         unsigned long flags;
3848
3849         if ( debug_level >= DEBUG_LEVEL_INFO )
3850                 printk( "%s(%d):tx_timeout(%s)\n",
3851                         __FILE__,__LINE__,info->device_name);
3852         if(info->tx_active &&
3853            info->params.mode == MGSL_MODE_HDLC) {
3854                 info->icount.txtimeout++;
3855         }
3856         spin_lock_irqsave(&info->lock,flags);
3857         info->tx_active = false;
3858         info->tx_count = info->tx_put = info->tx_get = 0;
3859
3860         spin_unlock_irqrestore(&info->lock,flags);
3861
3862 #if SYNCLINK_GENERIC_HDLC
3863         if (info->netcount)
3864                 hdlcdev_tx_done(info);
3865         else
3866 #endif
3867         {
3868                 struct tty_struct *tty = tty_port_tty_get(&info->port);
3869                 bh_transmit(info, tty);
3870                 tty_kref_put(tty);
3871         }
3872 }
3873
3874 #if SYNCLINK_GENERIC_HDLC
3875
3876 /**
3877  * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3878  * set encoding and frame check sequence (FCS) options
3879  *
3880  * dev       pointer to network device structure
3881  * encoding  serial encoding setting
3882  * parity    FCS setting
3883  *
3884  * returns 0 if success, otherwise error code
3885  */
3886 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3887                           unsigned short parity)
3888 {
3889         MGSLPC_INFO *info = dev_to_port(dev);
3890         struct tty_struct *tty;
3891         unsigned char  new_encoding;
3892         unsigned short new_crctype;
3893
3894         /* return error if TTY interface open */
3895         if (info->port.count)
3896                 return -EBUSY;
3897
3898         switch (encoding)
3899         {
3900         case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
3901         case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3902         case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3903         case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3904         case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3905         default: return -EINVAL;
3906         }
3907
3908         switch (parity)
3909         {
3910         case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
3911         case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3912         case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3913         default: return -EINVAL;
3914         }
3915
3916         info->params.encoding = new_encoding;
3917         info->params.crc_type = new_crctype;
3918
3919         /* if network interface up, reprogram hardware */
3920         if (info->netcount) {
3921                 tty = tty_port_tty_get(&info->port);
3922                 mgslpc_program_hw(info, tty);
3923                 tty_kref_put(tty);
3924         }
3925
3926         return 0;
3927 }
3928
3929 /**
3930  * called by generic HDLC layer to send frame
3931  *
3932  * skb  socket buffer containing HDLC frame
3933  * dev  pointer to network device structure
3934  */
3935 static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
3936                                       struct net_device *dev)
3937 {
3938         MGSLPC_INFO *info = dev_to_port(dev);
3939         unsigned long flags;
3940
3941         if (debug_level >= DEBUG_LEVEL_INFO)
3942                 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
3943
3944         /* stop sending until this frame completes */
3945         netif_stop_queue(dev);
3946
3947         /* copy data to device buffers */
3948         skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
3949         info->tx_get = 0;
3950         info->tx_put = info->tx_count = skb->len;
3951
3952         /* update network statistics */
3953         dev->stats.tx_packets++;
3954         dev->stats.tx_bytes += skb->len;
3955
3956         /* done with socket buffer, so free it */
3957         dev_kfree_skb(skb);
3958
3959         /* save start time for transmit timeout detection */
3960         dev->trans_start = jiffies;
3961
3962         /* start hardware transmitter if necessary */
3963         spin_lock_irqsave(&info->lock,flags);
3964         if (!info->tx_active) {
3965                 struct tty_struct *tty = tty_port_tty_get(&info->port);
3966                 tx_start(info, tty);
3967                 tty_kref_put(tty);
3968         }
3969         spin_unlock_irqrestore(&info->lock,flags);
3970
3971         return NETDEV_TX_OK;
3972 }
3973
3974 /**
3975  * called by network layer when interface enabled
3976  * claim resources and initialize hardware
3977  *
3978  * dev  pointer to network device structure
3979  *
3980  * returns 0 if success, otherwise error code
3981  */
3982 static int hdlcdev_open(struct net_device *dev)
3983 {
3984         MGSLPC_INFO *info = dev_to_port(dev);
3985         struct tty_struct *tty;
3986         int rc;
3987         unsigned long flags;
3988
3989         if (debug_level >= DEBUG_LEVEL_INFO)
3990                 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
3991
3992         /* generic HDLC layer open processing */
3993         if ((rc = hdlc_open(dev)))
3994                 return rc;
3995
3996         /* arbitrate between network and tty opens */
3997         spin_lock_irqsave(&info->netlock, flags);
3998         if (info->port.count != 0 || info->netcount != 0) {
3999                 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4000                 spin_unlock_irqrestore(&info->netlock, flags);
4001                 return -EBUSY;
4002         }
4003         info->netcount=1;
4004         spin_unlock_irqrestore(&info->netlock, flags);
4005
4006         tty = tty_port_tty_get(&info->port);
4007         /* claim resources and init adapter */
4008         if ((rc = startup(info, tty)) != 0) {
4009                 tty_kref_put(tty);
4010                 spin_lock_irqsave(&info->netlock, flags);
4011                 info->netcount=0;
4012                 spin_unlock_irqrestore(&info->netlock, flags);
4013                 return rc;
4014         }
4015         /* assert DTR and RTS, apply hardware settings */
4016         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4017         mgslpc_program_hw(info, tty);
4018         tty_kref_put(tty);
4019
4020         /* enable network layer transmit */
4021         dev->trans_start = jiffies;
4022         netif_start_queue(dev);
4023
4024         /* inform generic HDLC layer of current DCD status */
4025         spin_lock_irqsave(&info->lock, flags);
4026         get_signals(info);
4027         spin_unlock_irqrestore(&info->lock, flags);
4028         if (info->serial_signals & SerialSignal_DCD)
4029                 netif_carrier_on(dev);
4030         else
4031                 netif_carrier_off(dev);
4032         return 0;
4033 }
4034
4035 /**
4036  * called by network layer when interface is disabled
4037  * shutdown hardware and release resources
4038  *
4039  * dev  pointer to network device structure
4040  *
4041  * returns 0 if success, otherwise error code
4042  */
4043 static int hdlcdev_close(struct net_device *dev)
4044 {
4045         MGSLPC_INFO *info = dev_to_port(dev);
4046         struct tty_struct *tty = tty_port_tty_get(&info->port);
4047         unsigned long flags;
4048
4049         if (debug_level >= DEBUG_LEVEL_INFO)
4050                 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4051
4052         netif_stop_queue(dev);
4053
4054         /* shutdown adapter and release resources */
4055         shutdown(info, tty);
4056         tty_kref_put(tty);
4057         hdlc_close(dev);
4058
4059         spin_lock_irqsave(&info->netlock, flags);
4060         info->netcount=0;
4061         spin_unlock_irqrestore(&info->netlock, flags);
4062
4063         return 0;
4064 }
4065
4066 /**
4067  * called by network layer to process IOCTL call to network device
4068  *
4069  * dev  pointer to network device structure
4070  * ifr  pointer to network interface request structure
4071  * cmd  IOCTL command code
4072  *
4073  * returns 0 if success, otherwise error code
4074  */
4075 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4076 {
4077         const size_t size = sizeof(sync_serial_settings);
4078         sync_serial_settings new_line;
4079         sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4080         MGSLPC_INFO *info = dev_to_port(dev);
4081         unsigned int flags;
4082
4083         if (debug_level >= DEBUG_LEVEL_INFO)
4084                 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4085
4086         /* return error if TTY interface open */
4087         if (info->port.count)
4088                 return -EBUSY;
4089
4090         if (cmd != SIOCWANDEV)
4091                 return hdlc_ioctl(dev, ifr, cmd);
4092
4093         memset(&new_line, 0, size);
4094
4095         switch(ifr->ifr_settings.type) {
4096         case IF_GET_IFACE: /* return current sync_serial_settings */
4097
4098                 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4099                 if (ifr->ifr_settings.size < size) {
4100                         ifr->ifr_settings.size = size; /* data size wanted */
4101                         return -ENOBUFS;
4102                 }
4103
4104                 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4105                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4106                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4107                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4108
4109                 switch (flags){
4110                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4111                 case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4112                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4113                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4114                 default: new_line.clock_type = CLOCK_DEFAULT;
4115                 }
4116
4117                 new_line.clock_rate = info->params.clock_speed;
4118                 new_line.loopback   = info->params.loopback ? 1:0;
4119
4120                 if (copy_to_user(line, &new_line, size))
4121                         return -EFAULT;
4122                 return 0;
4123
4124         case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4125
4126                 if(!capable(CAP_NET_ADMIN))
4127                         return -EPERM;
4128                 if (copy_from_user(&new_line, line, size))
4129                         return -EFAULT;
4130
4131                 switch (new_line.clock_type)
4132                 {
4133                 case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4134                 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4135                 case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4136                 case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4137                 case CLOCK_DEFAULT:  flags = info->params.flags &
4138                                              (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4139                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4140                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4141                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4142                 default: return -EINVAL;
4143                 }
4144
4145                 if (new_line.loopback != 0 && new_line.loopback != 1)
4146                         return -EINVAL;
4147
4148                 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4149                                         HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4150                                         HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4151                                         HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4152                 info->params.flags |= flags;
4153
4154                 info->params.loopback = new_line.loopback;
4155
4156                 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4157                         info->params.clock_speed = new_line.clock_rate;
4158                 else
4159                         info->params.clock_speed = 0;
4160
4161                 /* if network interface up, reprogram hardware */
4162                 if (info->netcount) {
4163                         struct tty_struct *tty = tty_port_tty_get(&info->port);
4164                         mgslpc_program_hw(info, tty);
4165                         tty_kref_put(tty);
4166                 }
4167                 return 0;
4168
4169         default:
4170                 return hdlc_ioctl(dev, ifr, cmd);
4171         }
4172 }
4173
4174 /**
4175  * called by network layer when transmit timeout is detected
4176  *
4177  * dev  pointer to network device structure
4178  */
4179 static void hdlcdev_tx_timeout(struct net_device *dev)
4180 {
4181         MGSLPC_INFO *info = dev_to_port(dev);
4182         unsigned long flags;
4183
4184         if (debug_level >= DEBUG_LEVEL_INFO)
4185                 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4186
4187         dev->stats.tx_errors++;
4188         dev->stats.tx_aborted_errors++;
4189
4190         spin_lock_irqsave(&info->lock,flags);
4191         tx_stop(info);
4192         spin_unlock_irqrestore(&info->lock,flags);
4193
4194         netif_wake_queue(dev);
4195 }
4196
4197 /**
4198  * called by device driver when transmit completes
4199  * reenable network layer transmit if stopped
4200  *
4201  * info  pointer to device instance information
4202  */
4203 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4204 {
4205         if (netif_queue_stopped(info->netdev))
4206                 netif_wake_queue(info->netdev);
4207 }
4208
4209 /**
4210  * called by device driver when frame received
4211  * pass frame to network layer
4212  *
4213  * info  pointer to device instance information
4214  * buf   pointer to buffer contianing frame data
4215  * size  count of data bytes in buf
4216  */
4217 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4218 {
4219         struct sk_buff *skb = dev_alloc_skb(size);
4220         struct net_device *dev = info->netdev;
4221
4222         if (debug_level >= DEBUG_LEVEL_INFO)
4223                 printk("hdlcdev_rx(%s)\n",dev->name);
4224
4225         if (skb == NULL) {
4226                 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4227                 dev->stats.rx_dropped++;
4228                 return;
4229         }
4230
4231         memcpy(skb_put(skb, size), buf, size);
4232
4233         skb->protocol = hdlc_type_trans(skb, dev);
4234
4235         dev->stats.rx_packets++;
4236         dev->stats.rx_bytes += size;
4237
4238         netif_rx(skb);
4239 }
4240
4241 static const struct net_device_ops hdlcdev_ops = {
4242         .ndo_open       = hdlcdev_open,
4243         .ndo_stop       = hdlcdev_close,
4244         .ndo_change_mtu = hdlc_change_mtu,
4245         .ndo_start_xmit = hdlc_start_xmit,
4246         .ndo_do_ioctl   = hdlcdev_ioctl,
4247         .ndo_tx_timeout = hdlcdev_tx_timeout,
4248 };
4249
4250 /**
4251  * called by device driver when adding device instance
4252  * do generic HDLC initialization
4253  *
4254  * info  pointer to device instance information
4255  *
4256  * returns 0 if success, otherwise error code
4257  */
4258 static int hdlcdev_init(MGSLPC_INFO *info)
4259 {
4260         int rc;
4261         struct net_device *dev;
4262         hdlc_device *hdlc;
4263
4264         /* allocate and initialize network and HDLC layer objects */
4265
4266         if (!(dev = alloc_hdlcdev(info))) {
4267                 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4268                 return -ENOMEM;
4269         }
4270
4271         /* for network layer reporting purposes only */
4272         dev->base_addr = info->io_base;
4273         dev->irq       = info->irq_level;
4274
4275         /* network layer callbacks and settings */
4276         dev->netdev_ops     = &hdlcdev_ops;
4277         dev->watchdog_timeo = 10 * HZ;
4278         dev->tx_queue_len   = 50;
4279
4280         /* generic HDLC layer callbacks and settings */
4281         hdlc         = dev_to_hdlc(dev);
4282         hdlc->attach = hdlcdev_attach;
4283         hdlc->xmit   = hdlcdev_xmit;
4284
4285         /* register objects with HDLC layer */
4286         if ((rc = register_hdlc_device(dev))) {
4287                 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4288                 free_netdev(dev);
4289                 return rc;
4290         }
4291
4292         info->netdev = dev;
4293         return 0;
4294 }
4295
4296 /**
4297  * called by device driver when removing device instance
4298  * do generic HDLC cleanup
4299  *
4300  * info  pointer to device instance information
4301  */
4302 static void hdlcdev_exit(MGSLPC_INFO *info)
4303 {
4304         unregister_hdlc_device(info->netdev);
4305         free_netdev(info->netdev);
4306         info->netdev = NULL;
4307 }
4308
4309 #endif /* CONFIG_HDLC */
4310