Revert "ARM: tegra: tegratab: dummy change"
[linux-2.6.git] / drivers / acpi / processor_idle.c
1 /*
2  * processor_idle - idle state submodule to the ACPI processor driver
3  *
4  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6  *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7  *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8  *                      - Added processor hotplug support
9  *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10  *                      - Added support for C3 on SMP
11  *
12  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13  *
14  *  This program is free software; you can redistribute it and/or modify
15  *  it under the terms of the GNU General Public License as published by
16  *  the Free Software Foundation; either version 2 of the License, or (at
17  *  your option) any later version.
18  *
19  *  This program is distributed in the hope that it will be useful, but
20  *  WITHOUT ANY WARRANTY; without even the implied warranty of
21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
22  *  General Public License for more details.
23  *
24  *  You should have received a copy of the GNU General Public License along
25  *  with this program; if not, write to the Free Software Foundation, Inc.,
26  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27  *
28  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29  */
30
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/slab.h>
36 #include <linux/acpi.h>
37 #include <linux/dmi.h>
38 #include <linux/moduleparam.h>
39 #include <linux/sched.h>        /* need_resched() */
40 #include <linux/pm_qos.h>
41 #include <linux/clockchips.h>
42 #include <linux/cpuidle.h>
43 #include <linux/irqflags.h>
44
45 /*
46  * Include the apic definitions for x86 to have the APIC timer related defines
47  * available also for UP (on SMP it gets magically included via linux/smp.h).
48  * asm/acpi.h is not an option, as it would require more include magic. Also
49  * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
50  */
51 #ifdef CONFIG_X86
52 #include <asm/apic.h>
53 #endif
54
55 #include <asm/io.h>
56 #include <asm/uaccess.h>
57
58 #include <acpi/acpi_bus.h>
59 #include <acpi/processor.h>
60 #include <asm/processor.h>
61
62 #define PREFIX "ACPI: "
63
64 #define ACPI_PROCESSOR_CLASS            "processor"
65 #define _COMPONENT              ACPI_PROCESSOR_COMPONENT
66 ACPI_MODULE_NAME("processor_idle");
67 #define PM_TIMER_TICK_NS                (1000000000ULL/PM_TIMER_FREQUENCY)
68 #define C2_OVERHEAD                     1       /* 1us */
69 #define C3_OVERHEAD                     1       /* 1us */
70 #define PM_TIMER_TICKS_TO_US(p)         (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
71
72 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
73 module_param(max_cstate, uint, 0000);
74 static unsigned int nocst __read_mostly;
75 module_param(nocst, uint, 0000);
76 static int bm_check_disable __read_mostly;
77 module_param(bm_check_disable, uint, 0000);
78
79 static unsigned int latency_factor __read_mostly = 2;
80 module_param(latency_factor, uint, 0644);
81
82 static int disabled_by_idle_boot_param(void)
83 {
84         return boot_option_idle_override == IDLE_POLL ||
85                 boot_option_idle_override == IDLE_FORCE_MWAIT ||
86                 boot_option_idle_override == IDLE_HALT;
87 }
88
89 /*
90  * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91  * For now disable this. Probably a bug somewhere else.
92  *
93  * To skip this limit, boot/load with a large max_cstate limit.
94  */
95 static int set_max_cstate(const struct dmi_system_id *id)
96 {
97         if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
98                 return 0;
99
100         printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
101                " Override with \"processor.max_cstate=%d\"\n", id->ident,
102                (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
103
104         max_cstate = (long)id->driver_data;
105
106         return 0;
107 }
108
109 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
110    callers to only run once -AK */
111 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
112         { set_max_cstate, "Clevo 5600D", {
113           DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
114           DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
115          (void *)2},
116         { set_max_cstate, "Pavilion zv5000", {
117           DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
118           DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
119          (void *)1},
120         { set_max_cstate, "Asus L8400B", {
121           DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
122           DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
123          (void *)1},
124         {},
125 };
126
127
128 /*
129  * Callers should disable interrupts before the call and enable
130  * interrupts after return.
131  */
132 static void acpi_safe_halt(void)
133 {
134         current_thread_info()->status &= ~TS_POLLING;
135         /*
136          * TS_POLLING-cleared state must be visible before we
137          * test NEED_RESCHED:
138          */
139         smp_mb();
140         if (!need_resched()) {
141                 safe_halt();
142                 local_irq_disable();
143         }
144         current_thread_info()->status |= TS_POLLING;
145 }
146
147 #ifdef ARCH_APICTIMER_STOPS_ON_C3
148
149 /*
150  * Some BIOS implementations switch to C3 in the published C2 state.
151  * This seems to be a common problem on AMD boxen, but other vendors
152  * are affected too. We pick the most conservative approach: we assume
153  * that the local APIC stops in both C2 and C3.
154  */
155 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
156                                    struct acpi_processor_cx *cx)
157 {
158         struct acpi_processor_power *pwr = &pr->power;
159         u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
160
161         if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
162                 return;
163
164         if (amd_e400_c1e_detected)
165                 type = ACPI_STATE_C1;
166
167         /*
168          * Check, if one of the previous states already marked the lapic
169          * unstable
170          */
171         if (pwr->timer_broadcast_on_state < state)
172                 return;
173
174         if (cx->type >= type)
175                 pr->power.timer_broadcast_on_state = state;
176 }
177
178 static void __lapic_timer_propagate_broadcast(void *arg)
179 {
180         struct acpi_processor *pr = (struct acpi_processor *) arg;
181         unsigned long reason;
182
183         reason = pr->power.timer_broadcast_on_state < INT_MAX ?
184                 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
185
186         clockevents_notify(reason, &pr->id);
187 }
188
189 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
190 {
191         smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
192                                  (void *)pr, 1);
193 }
194
195 /* Power(C) State timer broadcast control */
196 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
197                                        struct acpi_processor_cx *cx,
198                                        int broadcast)
199 {
200         int state = cx - pr->power.states;
201
202         if (state >= pr->power.timer_broadcast_on_state) {
203                 unsigned long reason;
204
205                 reason = broadcast ?  CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
206                         CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
207                 clockevents_notify(reason, &pr->id);
208         }
209 }
210
211 #else
212
213 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
214                                    struct acpi_processor_cx *cstate) { }
215 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
216 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
217                                        struct acpi_processor_cx *cx,
218                                        int broadcast)
219 {
220 }
221
222 #endif
223
224 /*
225  * Suspend / resume control
226  */
227 static u32 saved_bm_rld;
228
229 static void acpi_idle_bm_rld_save(void)
230 {
231         acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
232 }
233 static void acpi_idle_bm_rld_restore(void)
234 {
235         u32 resumed_bm_rld;
236
237         acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
238
239         if (resumed_bm_rld != saved_bm_rld)
240                 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
241 }
242
243 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
244 {
245         acpi_idle_bm_rld_save();
246         return 0;
247 }
248
249 int acpi_processor_resume(struct acpi_device * device)
250 {
251         acpi_idle_bm_rld_restore();
252         return 0;
253 }
254
255 #if defined(CONFIG_X86)
256 static void tsc_check_state(int state)
257 {
258         switch (boot_cpu_data.x86_vendor) {
259         case X86_VENDOR_AMD:
260         case X86_VENDOR_INTEL:
261                 /*
262                  * AMD Fam10h TSC will tick in all
263                  * C/P/S0/S1 states when this bit is set.
264                  */
265                 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
266                         return;
267
268                 /*FALL THROUGH*/
269         default:
270                 /* TSC could halt in idle, so notify users */
271                 if (state > ACPI_STATE_C1)
272                         mark_tsc_unstable("TSC halts in idle");
273         }
274 }
275 #else
276 static void tsc_check_state(int state) { return; }
277 #endif
278
279 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
280 {
281
282         if (!pr)
283                 return -EINVAL;
284
285         if (!pr->pblk)
286                 return -ENODEV;
287
288         /* if info is obtained from pblk/fadt, type equals state */
289         pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
290         pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
291
292 #ifndef CONFIG_HOTPLUG_CPU
293         /*
294          * Check for P_LVL2_UP flag before entering C2 and above on
295          * an SMP system.
296          */
297         if ((num_online_cpus() > 1) &&
298             !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
299                 return -ENODEV;
300 #endif
301
302         /* determine C2 and C3 address from pblk */
303         pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
304         pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
305
306         /* determine latencies from FADT */
307         pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
308         pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
309
310         /*
311          * FADT specified C2 latency must be less than or equal to
312          * 100 microseconds.
313          */
314         if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
315                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
316                         "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
317                 /* invalidate C2 */
318                 pr->power.states[ACPI_STATE_C2].address = 0;
319         }
320
321         /*
322          * FADT supplied C3 latency must be less than or equal to
323          * 1000 microseconds.
324          */
325         if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
326                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
327                         "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
328                 /* invalidate C3 */
329                 pr->power.states[ACPI_STATE_C3].address = 0;
330         }
331
332         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
333                           "lvl2[0x%08x] lvl3[0x%08x]\n",
334                           pr->power.states[ACPI_STATE_C2].address,
335                           pr->power.states[ACPI_STATE_C3].address));
336
337         return 0;
338 }
339
340 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
341 {
342         if (!pr->power.states[ACPI_STATE_C1].valid) {
343                 /* set the first C-State to C1 */
344                 /* all processors need to support C1 */
345                 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
346                 pr->power.states[ACPI_STATE_C1].valid = 1;
347                 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
348         }
349         /* the C0 state only exists as a filler in our array */
350         pr->power.states[ACPI_STATE_C0].valid = 1;
351         return 0;
352 }
353
354 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
355 {
356         acpi_status status = 0;
357         u64 count;
358         int current_count;
359         int i;
360         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
361         union acpi_object *cst;
362
363
364         if (nocst)
365                 return -ENODEV;
366
367         current_count = 0;
368
369         status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
370         if (ACPI_FAILURE(status)) {
371                 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
372                 return -ENODEV;
373         }
374
375         cst = buffer.pointer;
376
377         /* There must be at least 2 elements */
378         if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
379                 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
380                 status = -EFAULT;
381                 goto end;
382         }
383
384         count = cst->package.elements[0].integer.value;
385
386         /* Validate number of power states. */
387         if (count < 1 || count != cst->package.count - 1) {
388                 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
389                 status = -EFAULT;
390                 goto end;
391         }
392
393         /* Tell driver that at least _CST is supported. */
394         pr->flags.has_cst = 1;
395
396         for (i = 1; i <= count; i++) {
397                 union acpi_object *element;
398                 union acpi_object *obj;
399                 struct acpi_power_register *reg;
400                 struct acpi_processor_cx cx;
401
402                 memset(&cx, 0, sizeof(cx));
403
404                 element = &(cst->package.elements[i]);
405                 if (element->type != ACPI_TYPE_PACKAGE)
406                         continue;
407
408                 if (element->package.count != 4)
409                         continue;
410
411                 obj = &(element->package.elements[0]);
412
413                 if (obj->type != ACPI_TYPE_BUFFER)
414                         continue;
415
416                 reg = (struct acpi_power_register *)obj->buffer.pointer;
417
418                 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
419                     (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
420                         continue;
421
422                 /* There should be an easy way to extract an integer... */
423                 obj = &(element->package.elements[1]);
424                 if (obj->type != ACPI_TYPE_INTEGER)
425                         continue;
426
427                 cx.type = obj->integer.value;
428                 /*
429                  * Some buggy BIOSes won't list C1 in _CST -
430                  * Let acpi_processor_get_power_info_default() handle them later
431                  */
432                 if (i == 1 && cx.type != ACPI_STATE_C1)
433                         current_count++;
434
435                 cx.address = reg->address;
436                 cx.index = current_count + 1;
437
438                 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
439                 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
440                         if (acpi_processor_ffh_cstate_probe
441                                         (pr->id, &cx, reg) == 0) {
442                                 cx.entry_method = ACPI_CSTATE_FFH;
443                         } else if (cx.type == ACPI_STATE_C1) {
444                                 /*
445                                  * C1 is a special case where FIXED_HARDWARE
446                                  * can be handled in non-MWAIT way as well.
447                                  * In that case, save this _CST entry info.
448                                  * Otherwise, ignore this info and continue.
449                                  */
450                                 cx.entry_method = ACPI_CSTATE_HALT;
451                                 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
452                         } else {
453                                 continue;
454                         }
455                         if (cx.type == ACPI_STATE_C1 &&
456                             (boot_option_idle_override == IDLE_NOMWAIT)) {
457                                 /*
458                                  * In most cases the C1 space_id obtained from
459                                  * _CST object is FIXED_HARDWARE access mode.
460                                  * But when the option of idle=halt is added,
461                                  * the entry_method type should be changed from
462                                  * CSTATE_FFH to CSTATE_HALT.
463                                  * When the option of idle=nomwait is added,
464                                  * the C1 entry_method type should be
465                                  * CSTATE_HALT.
466                                  */
467                                 cx.entry_method = ACPI_CSTATE_HALT;
468                                 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
469                         }
470                 } else {
471                         snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
472                                  cx.address);
473                 }
474
475                 if (cx.type == ACPI_STATE_C1) {
476                         cx.valid = 1;
477                 }
478
479                 obj = &(element->package.elements[2]);
480                 if (obj->type != ACPI_TYPE_INTEGER)
481                         continue;
482
483                 cx.latency = obj->integer.value;
484
485                 obj = &(element->package.elements[3]);
486                 if (obj->type != ACPI_TYPE_INTEGER)
487                         continue;
488
489                 cx.power = obj->integer.value;
490
491                 current_count++;
492                 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
493
494                 /*
495                  * We support total ACPI_PROCESSOR_MAX_POWER - 1
496                  * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
497                  */
498                 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
499                         printk(KERN_WARNING
500                                "Limiting number of power states to max (%d)\n",
501                                ACPI_PROCESSOR_MAX_POWER);
502                         printk(KERN_WARNING
503                                "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
504                         break;
505                 }
506         }
507
508         ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
509                           current_count));
510
511         /* Validate number of power states discovered */
512         if (current_count < 2)
513                 status = -EFAULT;
514
515       end:
516         kfree(buffer.pointer);
517
518         return status;
519 }
520
521 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
522                                            struct acpi_processor_cx *cx)
523 {
524         static int bm_check_flag = -1;
525         static int bm_control_flag = -1;
526
527
528         if (!cx->address)
529                 return;
530
531         /*
532          * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
533          * DMA transfers are used by any ISA device to avoid livelock.
534          * Note that we could disable Type-F DMA (as recommended by
535          * the erratum), but this is known to disrupt certain ISA
536          * devices thus we take the conservative approach.
537          */
538         else if (errata.piix4.fdma) {
539                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
540                                   "C3 not supported on PIIX4 with Type-F DMA\n"));
541                 return;
542         }
543
544         /* All the logic here assumes flags.bm_check is same across all CPUs */
545         if (bm_check_flag == -1) {
546                 /* Determine whether bm_check is needed based on CPU  */
547                 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
548                 bm_check_flag = pr->flags.bm_check;
549                 bm_control_flag = pr->flags.bm_control;
550         } else {
551                 pr->flags.bm_check = bm_check_flag;
552                 pr->flags.bm_control = bm_control_flag;
553         }
554
555         if (pr->flags.bm_check) {
556                 if (!pr->flags.bm_control) {
557                         if (pr->flags.has_cst != 1) {
558                                 /* bus mastering control is necessary */
559                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
560                                         "C3 support requires BM control\n"));
561                                 return;
562                         } else {
563                                 /* Here we enter C3 without bus mastering */
564                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
565                                         "C3 support without BM control\n"));
566                         }
567                 }
568         } else {
569                 /*
570                  * WBINVD should be set in fadt, for C3 state to be
571                  * supported on when bm_check is not required.
572                  */
573                 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
574                         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
575                                           "Cache invalidation should work properly"
576                                           " for C3 to be enabled on SMP systems\n"));
577                         return;
578                 }
579         }
580
581         /*
582          * Otherwise we've met all of our C3 requirements.
583          * Normalize the C3 latency to expidite policy.  Enable
584          * checking of bus mastering status (bm_check) so we can
585          * use this in our C3 policy
586          */
587         cx->valid = 1;
588
589         cx->latency_ticks = cx->latency;
590         /*
591          * On older chipsets, BM_RLD needs to be set
592          * in order for Bus Master activity to wake the
593          * system from C3.  Newer chipsets handle DMA
594          * during C3 automatically and BM_RLD is a NOP.
595          * In either case, the proper way to
596          * handle BM_RLD is to set it and leave it set.
597          */
598         acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
599
600         return;
601 }
602
603 static int acpi_processor_power_verify(struct acpi_processor *pr)
604 {
605         unsigned int i;
606         unsigned int working = 0;
607
608         pr->power.timer_broadcast_on_state = INT_MAX;
609
610         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
611                 struct acpi_processor_cx *cx = &pr->power.states[i];
612
613                 switch (cx->type) {
614                 case ACPI_STATE_C1:
615                         cx->valid = 1;
616                         break;
617
618                 case ACPI_STATE_C2:
619                         if (!cx->address)
620                                 break;
621                         cx->valid = 1;
622                         cx->latency_ticks = cx->latency; /* Normalize latency */
623                         break;
624
625                 case ACPI_STATE_C3:
626                         acpi_processor_power_verify_c3(pr, cx);
627                         break;
628                 }
629                 if (!cx->valid)
630                         continue;
631
632                 lapic_timer_check_state(i, pr, cx);
633                 tsc_check_state(cx->type);
634                 working++;
635         }
636
637         lapic_timer_propagate_broadcast(pr);
638
639         return (working);
640 }
641
642 static int acpi_processor_get_power_info(struct acpi_processor *pr)
643 {
644         unsigned int i;
645         int result;
646
647
648         /* NOTE: the idle thread may not be running while calling
649          * this function */
650
651         /* Zero initialize all the C-states info. */
652         memset(pr->power.states, 0, sizeof(pr->power.states));
653
654         result = acpi_processor_get_power_info_cst(pr);
655         if (result == -ENODEV)
656                 result = acpi_processor_get_power_info_fadt(pr);
657
658         if (result)
659                 return result;
660
661         acpi_processor_get_power_info_default(pr);
662
663         pr->power.count = acpi_processor_power_verify(pr);
664
665         /*
666          * if one state of type C2 or C3 is available, mark this
667          * CPU as being "idle manageable"
668          */
669         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
670                 if (pr->power.states[i].valid) {
671                         pr->power.count = i;
672                         if (pr->power.states[i].type >= ACPI_STATE_C2)
673                                 pr->flags.power = 1;
674                 }
675         }
676
677         return 0;
678 }
679
680 /**
681  * acpi_idle_bm_check - checks if bus master activity was detected
682  */
683 static int acpi_idle_bm_check(void)
684 {
685         u32 bm_status = 0;
686
687         if (bm_check_disable)
688                 return 0;
689
690         acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
691         if (bm_status)
692                 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
693         /*
694          * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
695          * the true state of bus mastering activity; forcing us to
696          * manually check the BMIDEA bit of each IDE channel.
697          */
698         else if (errata.piix4.bmisx) {
699                 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
700                     || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
701                         bm_status = 1;
702         }
703         return bm_status;
704 }
705
706 /**
707  * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
708  * @cx: cstate data
709  *
710  * Caller disables interrupt before call and enables interrupt after return.
711  */
712 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
713 {
714         /* Don't trace irqs off for idle */
715         stop_critical_timings();
716         if (cx->entry_method == ACPI_CSTATE_FFH) {
717                 /* Call into architectural FFH based C-state */
718                 acpi_processor_ffh_cstate_enter(cx);
719         } else if (cx->entry_method == ACPI_CSTATE_HALT) {
720                 acpi_safe_halt();
721         } else {
722                 /* IO port based C-state */
723                 inb(cx->address);
724                 /* Dummy wait op - must do something useless after P_LVL2 read
725                    because chipsets cannot guarantee that STPCLK# signal
726                    gets asserted in time to freeze execution properly. */
727                 inl(acpi_gbl_FADT.xpm_timer_block.address);
728         }
729         start_critical_timings();
730 }
731
732 /**
733  * acpi_idle_enter_c1 - enters an ACPI C1 state-type
734  * @dev: the target CPU
735  * @index: index of target state
736  *
737  * This is equivalent to the HALT instruction.
738  */
739 static int acpi_idle_enter_c1(struct cpuidle_device *dev, int index)
740 {
741         ktime_t  kt1, kt2;
742         s64 idle_time;
743         struct acpi_processor *pr;
744         struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
745         struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
746
747         pr = __this_cpu_read(processors);
748         dev->last_residency = 0;
749
750         if (unlikely(!pr))
751                 return -EINVAL;
752
753         local_irq_disable();
754
755         lapic_timer_state_broadcast(pr, cx, 1);
756         kt1 = ktime_get_real();
757         acpi_idle_do_entry(cx);
758         kt2 = ktime_get_real();
759         idle_time =  ktime_to_us(ktime_sub(kt2, kt1));
760
761         /* Update device last_residency*/
762         dev->last_residency = (int)idle_time;
763
764         local_irq_enable();
765         cx->usage++;
766         lapic_timer_state_broadcast(pr, cx, 0);
767
768         return index;
769 }
770
771
772 /**
773  * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
774  * @dev: the target CPU
775  * @index: the index of suggested state
776  */
777 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
778 {
779         struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
780         struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
781
782         ACPI_FLUSH_CPU_CACHE();
783
784         while (1) {
785
786                 if (cx->entry_method == ACPI_CSTATE_HALT)
787                         safe_halt();
788                 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
789                         inb(cx->address);
790                         /* See comment in acpi_idle_do_entry() */
791                         inl(acpi_gbl_FADT.xpm_timer_block.address);
792                 } else
793                         return -ENODEV;
794         }
795
796         /* Never reached */
797         return 0;
798 }
799
800 /**
801  * acpi_idle_enter_simple - enters an ACPI state without BM handling
802  * @dev: the target CPU
803  * @index: the index of suggested state
804  */
805 static int acpi_idle_enter_simple(struct cpuidle_device *dev, int index)
806 {
807         struct acpi_processor *pr;
808         struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
809         struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
810         ktime_t  kt1, kt2;
811         s64 idle_time_ns;
812         s64 idle_time;
813
814         pr = __this_cpu_read(processors);
815         dev->last_residency = 0;
816
817         if (unlikely(!pr))
818                 return -EINVAL;
819
820         local_irq_disable();
821
822         if (cx->entry_method != ACPI_CSTATE_FFH) {
823                 current_thread_info()->status &= ~TS_POLLING;
824                 /*
825                  * TS_POLLING-cleared state must be visible before we test
826                  * NEED_RESCHED:
827                  */
828                 smp_mb();
829
830                 if (unlikely(need_resched())) {
831                         current_thread_info()->status |= TS_POLLING;
832                         local_irq_enable();
833                         return -EINVAL;
834                 }
835         }
836
837         /*
838          * Must be done before busmaster disable as we might need to
839          * access HPET !
840          */
841         lapic_timer_state_broadcast(pr, cx, 1);
842
843         if (cx->type == ACPI_STATE_C3)
844                 ACPI_FLUSH_CPU_CACHE();
845
846         kt1 = ktime_get_real();
847         /* Tell the scheduler that we are going deep-idle: */
848         sched_clock_idle_sleep_event();
849         acpi_idle_do_entry(cx);
850         kt2 = ktime_get_real();
851         idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
852         idle_time = idle_time_ns;
853         do_div(idle_time, NSEC_PER_USEC);
854
855         /* Update device last_residency*/
856         dev->last_residency = (int)idle_time;
857
858         /* Tell the scheduler how much we idled: */
859         sched_clock_idle_wakeup_event(idle_time_ns);
860
861         local_irq_enable();
862         if (cx->entry_method != ACPI_CSTATE_FFH)
863                 current_thread_info()->status |= TS_POLLING;
864
865         cx->usage++;
866
867         lapic_timer_state_broadcast(pr, cx, 0);
868         cx->time += idle_time;
869         return index;
870 }
871
872 static int c3_cpu_count;
873 static DEFINE_RAW_SPINLOCK(c3_lock);
874
875 /**
876  * acpi_idle_enter_bm - enters C3 with proper BM handling
877  * @dev: the target CPU
878  * @index: the index of suggested state
879  *
880  * If BM is detected, the deepest non-C3 idle state is entered instead.
881  */
882 static int acpi_idle_enter_bm(struct cpuidle_device *dev, int index)
883 {
884         struct acpi_processor *pr;
885         struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
886         struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
887         ktime_t  kt1, kt2;
888         s64 idle_time_ns;
889         s64 idle_time;
890
891
892         pr = __this_cpu_read(processors);
893         dev->last_residency = 0;
894
895         if (unlikely(!pr))
896                 return -EINVAL;
897
898         if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
899                 if (dev->safe_state_index >= 0) {
900                         return dev->states[dev->safe_state_index].enter(dev,
901                                                 dev->safe_state_index);
902                 } else {
903                         local_irq_disable();
904                         acpi_safe_halt();
905                         local_irq_enable();
906                         return -EINVAL;
907                 }
908         }
909
910         local_irq_disable();
911
912         if (cx->entry_method != ACPI_CSTATE_FFH) {
913                 current_thread_info()->status &= ~TS_POLLING;
914                 /*
915                  * TS_POLLING-cleared state must be visible before we test
916                  * NEED_RESCHED:
917                  */
918                 smp_mb();
919
920                 if (unlikely(need_resched())) {
921                         current_thread_info()->status |= TS_POLLING;
922                         local_irq_enable();
923                         return -EINVAL;
924                 }
925         }
926
927         acpi_unlazy_tlb(smp_processor_id());
928
929         /* Tell the scheduler that we are going deep-idle: */
930         sched_clock_idle_sleep_event();
931         /*
932          * Must be done before busmaster disable as we might need to
933          * access HPET !
934          */
935         lapic_timer_state_broadcast(pr, cx, 1);
936
937         kt1 = ktime_get_real();
938         /*
939          * disable bus master
940          * bm_check implies we need ARB_DIS
941          * !bm_check implies we need cache flush
942          * bm_control implies whether we can do ARB_DIS
943          *
944          * That leaves a case where bm_check is set and bm_control is
945          * not set. In that case we cannot do much, we enter C3
946          * without doing anything.
947          */
948         if (pr->flags.bm_check && pr->flags.bm_control) {
949                 raw_spin_lock(&c3_lock);
950                 c3_cpu_count++;
951                 /* Disable bus master arbitration when all CPUs are in C3 */
952                 if (c3_cpu_count == num_online_cpus())
953                         acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
954                 raw_spin_unlock(&c3_lock);
955         } else if (!pr->flags.bm_check) {
956                 ACPI_FLUSH_CPU_CACHE();
957         }
958
959         acpi_idle_do_entry(cx);
960
961         /* Re-enable bus master arbitration */
962         if (pr->flags.bm_check && pr->flags.bm_control) {
963                 raw_spin_lock(&c3_lock);
964                 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
965                 c3_cpu_count--;
966                 raw_spin_unlock(&c3_lock);
967         }
968         kt2 = ktime_get_real();
969         idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
970         idle_time = idle_time_ns;
971         do_div(idle_time, NSEC_PER_USEC);
972
973         /* Update device last_residency*/
974         dev->last_residency = (int)idle_time;
975
976         /* Tell the scheduler how much we idled: */
977         sched_clock_idle_wakeup_event(idle_time_ns);
978
979         local_irq_enable();
980         if (cx->entry_method != ACPI_CSTATE_FFH)
981                 current_thread_info()->status |= TS_POLLING;
982
983         cx->usage++;
984
985         lapic_timer_state_broadcast(pr, cx, 0);
986         cx->time += idle_time;
987         return index;
988 }
989
990 struct cpuidle_driver acpi_idle_driver = {
991         .name =         "acpi_idle",
992         .owner =        THIS_MODULE,
993 };
994
995 /**
996  * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
997  * @pr: the ACPI processor
998  */
999 static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
1000 {
1001         int i, count = CPUIDLE_DRIVER_STATE_START;
1002         struct acpi_processor_cx *cx;
1003         struct cpuidle_state *state;
1004         struct cpuidle_state_usage *state_usage;
1005         struct cpuidle_device *dev = &pr->power.dev;
1006
1007         if (!pr->flags.power_setup_done)
1008                 return -EINVAL;
1009
1010         if (pr->flags.power == 0) {
1011                 return -EINVAL;
1012         }
1013
1014         if (!dev)
1015                 return -EINVAL;
1016
1017         dev->cpu = pr->id;
1018         dev->safe_state_index = -1;
1019         for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1020                 dev->states[i].name[0] = '\0';
1021                 dev->states[i].desc[0] = '\0';
1022         }
1023
1024         if (max_cstate == 0)
1025                 max_cstate = 1;
1026
1027         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1028                 cx = &pr->power.states[i];
1029                 state = &dev->states[count];
1030                 state_usage = &dev->states_usage[count];
1031
1032                 if (!cx->valid)
1033                         continue;
1034
1035 #ifdef CONFIG_HOTPLUG_CPU
1036                 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1037                     !pr->flags.has_cst &&
1038                     !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1039                         continue;
1040 #endif
1041                 cpuidle_set_statedata(state_usage, cx);
1042
1043                 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1044                 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1045                 state->exit_latency = cx->latency;
1046                 state->target_residency = cx->latency * latency_factor;
1047
1048                 state->flags = 0;
1049                 switch (cx->type) {
1050                         case ACPI_STATE_C1:
1051                         if (cx->entry_method == ACPI_CSTATE_FFH)
1052                                 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1053
1054                         state->enter = acpi_idle_enter_c1;
1055                         state->enter_dead = acpi_idle_play_dead;
1056                         dev->safe_state_index = count;
1057                         break;
1058
1059                         case ACPI_STATE_C2:
1060                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1061                         state->enter = acpi_idle_enter_simple;
1062                         state->enter_dead = acpi_idle_play_dead;
1063                         dev->safe_state_index = count;
1064                         break;
1065
1066                         case ACPI_STATE_C3:
1067                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1068                         state->enter = pr->flags.bm_check ?
1069                                         acpi_idle_enter_bm :
1070                                         acpi_idle_enter_simple;
1071                         break;
1072                 }
1073
1074                 count++;
1075                 if (count == CPUIDLE_STATE_MAX)
1076                         break;
1077         }
1078
1079         dev->state_count = count;
1080
1081         if (!count)
1082                 return -EINVAL;
1083
1084         return 0;
1085 }
1086
1087 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1088 {
1089         int ret = 0;
1090
1091         if (disabled_by_idle_boot_param())
1092                 return 0;
1093
1094         if (!pr)
1095                 return -EINVAL;
1096
1097         if (nocst) {
1098                 return -ENODEV;
1099         }
1100
1101         if (!pr->flags.power_setup_done)
1102                 return -ENODEV;
1103
1104         cpuidle_pause_and_lock();
1105         cpuidle_disable_device(&pr->power.dev);
1106         acpi_processor_get_power_info(pr);
1107         if (pr->flags.power) {
1108                 acpi_processor_setup_cpuidle(pr);
1109                 ret = cpuidle_enable_device(&pr->power.dev);
1110         }
1111         cpuidle_resume_and_unlock();
1112
1113         return ret;
1114 }
1115
1116 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1117 {
1118         int cpu;
1119         struct acpi_processor *_pr;
1120
1121         if (disabled_by_idle_boot_param())
1122                 return 0;
1123
1124         if (!pr)
1125                 return -EINVAL;
1126
1127         if (nocst)
1128                 return -ENODEV;
1129
1130         if (!pr->flags.power_setup_done)
1131                 return -ENODEV;
1132
1133         /*
1134          * FIXME:  Design the ACPI notification to make it once per
1135          * system instead of once per-cpu.  This condition is a hack
1136          * to make the code that updates C-States be called once.
1137          */
1138
1139         if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1140
1141                 cpuidle_pause_and_lock();
1142                 /* Protect against cpu-hotplug */
1143                 get_online_cpus();
1144
1145                 /* Disable all cpuidle devices */
1146                 for_each_online_cpu(cpu) {
1147                         _pr = per_cpu(processors, cpu);
1148                         if (!_pr || !_pr->flags.power_setup_done)
1149                                 continue;
1150                         cpuidle_disable_device(&_pr->power.dev);
1151                 }
1152
1153                 /* Populate Updated C-state information */
1154                 acpi_processor_get_power_info(pr);
1155                 acpi_processor_setup_cpuidle_states(pr);
1156
1157                 /* Enable all cpuidle devices */
1158                 for_each_online_cpu(cpu) {
1159                         _pr = per_cpu(processors, cpu);
1160                         if (!_pr || !_pr->flags.power_setup_done)
1161                                 continue;
1162                         acpi_processor_get_power_info(_pr);
1163                         if (_pr->flags.power) {
1164                                 acpi_processor_setup_cpuidle_cx(_pr);
1165                                 cpuidle_enable_device(&_pr->power.dev);
1166                         }
1167                 }
1168                 put_online_cpus();
1169                 cpuidle_resume_and_unlock();
1170         }
1171
1172         return 0;
1173 }
1174
1175 static int acpi_processor_registered;
1176
1177 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1178                               struct acpi_device *device)
1179 {
1180         acpi_status status = 0;
1181         static int first_run;
1182
1183         if (disabled_by_idle_boot_param())
1184                 return 0;
1185
1186         if (!first_run) {
1187                 dmi_check_system(processor_power_dmi_table);
1188                 max_cstate = acpi_processor_cstate_check(max_cstate);
1189                 if (max_cstate < ACPI_C_STATES_MAX)
1190                         printk(KERN_NOTICE
1191                                "ACPI: processor limited to max C-state %d\n",
1192                                max_cstate);
1193                 first_run++;
1194         }
1195
1196         if (!pr)
1197                 return -EINVAL;
1198
1199         if (acpi_gbl_FADT.cst_control && !nocst) {
1200                 status =
1201                     acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1202                 if (ACPI_FAILURE(status)) {
1203                         ACPI_EXCEPTION((AE_INFO, status,
1204                                         "Notifying BIOS of _CST ability failed"));
1205                 }
1206         }
1207
1208         acpi_processor_get_power_info(pr);
1209         pr->flags.power_setup_done = 1;
1210
1211         /*
1212          * Install the idle handler if processor power management is supported.
1213          * Note that we use previously set idle handler will be used on
1214          * platforms that only support C1.
1215          */
1216         if (pr->flags.power) {
1217                 acpi_processor_setup_cpuidle(pr);
1218                 if (cpuidle_register_device(&pr->power.dev))
1219                         return -EIO;
1220         }
1221         return 0;
1222 }
1223
1224 int acpi_processor_power_exit(struct acpi_processor *pr,
1225                               struct acpi_device *device)
1226 {
1227         if (disabled_by_idle_boot_param())
1228                 return 0;
1229
1230         cpuidle_unregister_device(&pr->power.dev);
1231         pr->flags.power_setup_done = 0;
1232
1233         return 0;
1234 }