Merge commit 'origin/master' into for-linus/xen/master
[linux-2.6.git] / arch / x86 / mm / pageattr.c
1 /*
2  * Copyright 2002 Andi Kleen, SuSE Labs.
3  * Thanks to Ben LaHaise for precious feedback.
4  */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
10 #include <linux/mm.h>
11 #include <linux/interrupt.h>
12 #include <linux/seq_file.h>
13 #include <linux/debugfs.h>
14
15 #include <asm/e820.h>
16 #include <asm/processor.h>
17 #include <asm/tlbflush.h>
18 #include <asm/sections.h>
19 #include <asm/setup.h>
20 #include <asm/uaccess.h>
21 #include <asm/pgalloc.h>
22 #include <asm/proto.h>
23 #include <asm/pat.h>
24
25 /*
26  * The current flushing context - we pass it instead of 5 arguments:
27  */
28 struct cpa_data {
29         unsigned long   *vaddr;
30         pgprot_t        mask_set;
31         pgprot_t        mask_clr;
32         int             numpages;
33         int             flags;
34         unsigned long   pfn;
35         unsigned        force_split : 1;
36         int             curpage;
37         struct page     **pages;
38 };
39
40 /*
41  * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
42  * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
43  * entries change the page attribute in parallel to some other cpu
44  * splitting a large page entry along with changing the attribute.
45  */
46 static DEFINE_SPINLOCK(cpa_lock);
47
48 #define CPA_FLUSHTLB 1
49 #define CPA_ARRAY 2
50 #define CPA_PAGES_ARRAY 4
51
52 #ifdef CONFIG_PROC_FS
53 static unsigned long direct_pages_count[PG_LEVEL_NUM];
54
55 void update_page_count(int level, unsigned long pages)
56 {
57         unsigned long flags;
58
59         /* Protect against CPA */
60         spin_lock_irqsave(&pgd_lock, flags);
61         direct_pages_count[level] += pages;
62         spin_unlock_irqrestore(&pgd_lock, flags);
63 }
64
65 static void split_page_count(int level)
66 {
67         direct_pages_count[level]--;
68         direct_pages_count[level - 1] += PTRS_PER_PTE;
69 }
70
71 void arch_report_meminfo(struct seq_file *m)
72 {
73         seq_printf(m, "DirectMap4k:    %8lu kB\n",
74                         direct_pages_count[PG_LEVEL_4K] << 2);
75 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
76         seq_printf(m, "DirectMap2M:    %8lu kB\n",
77                         direct_pages_count[PG_LEVEL_2M] << 11);
78 #else
79         seq_printf(m, "DirectMap4M:    %8lu kB\n",
80                         direct_pages_count[PG_LEVEL_2M] << 12);
81 #endif
82 #ifdef CONFIG_X86_64
83         if (direct_gbpages)
84                 seq_printf(m, "DirectMap1G:    %8lu kB\n",
85                         direct_pages_count[PG_LEVEL_1G] << 20);
86 #endif
87 }
88 #else
89 static inline void split_page_count(int level) { }
90 #endif
91
92 #ifdef CONFIG_X86_64
93
94 static inline unsigned long highmap_start_pfn(void)
95 {
96         return __pa(_text) >> PAGE_SHIFT;
97 }
98
99 static inline unsigned long highmap_end_pfn(void)
100 {
101         return __pa(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
102 }
103
104 #endif
105
106 #ifdef CONFIG_DEBUG_PAGEALLOC
107 # define debug_pagealloc 1
108 #else
109 # define debug_pagealloc 0
110 #endif
111
112 static inline int
113 within(unsigned long addr, unsigned long start, unsigned long end)
114 {
115         return addr >= start && addr < end;
116 }
117
118 /*
119  * Flushing functions
120  */
121
122 /**
123  * clflush_cache_range - flush a cache range with clflush
124  * @addr:       virtual start address
125  * @size:       number of bytes to flush
126  *
127  * clflush is an unordered instruction which needs fencing with mfence
128  * to avoid ordering issues.
129  */
130 void clflush_cache_range(void *vaddr, unsigned int size)
131 {
132         void *vend = vaddr + size - 1;
133
134         mb();
135
136         for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
137                 clflush(vaddr);
138         /*
139          * Flush any possible final partial cacheline:
140          */
141         clflush(vend);
142
143         mb();
144 }
145
146 static void __cpa_flush_all(void *arg)
147 {
148         unsigned long cache = (unsigned long)arg;
149
150         /*
151          * Flush all to work around Errata in early athlons regarding
152          * large page flushing.
153          */
154         __flush_tlb_all();
155
156         if (cache && boot_cpu_data.x86_model >= 4)
157                 wbinvd();
158 }
159
160 static void cpa_flush_all(unsigned long cache)
161 {
162         BUG_ON(irqs_disabled());
163
164         on_each_cpu(__cpa_flush_all, (void *) cache, 1);
165 }
166
167 static void __cpa_flush_range(void *arg)
168 {
169         /*
170          * We could optimize that further and do individual per page
171          * tlb invalidates for a low number of pages. Caveat: we must
172          * flush the high aliases on 64bit as well.
173          */
174         __flush_tlb_all();
175 }
176
177 static void cpa_flush_range(unsigned long start, int numpages, int cache)
178 {
179         unsigned int i, level;
180         unsigned long addr;
181
182         BUG_ON(irqs_disabled());
183         WARN_ON(PAGE_ALIGN(start) != start);
184
185         on_each_cpu(__cpa_flush_range, NULL, 1);
186
187         if (!cache)
188                 return;
189
190         /*
191          * We only need to flush on one CPU,
192          * clflush is a MESI-coherent instruction that
193          * will cause all other CPUs to flush the same
194          * cachelines:
195          */
196         for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
197                 pte_t *pte = lookup_address(addr, &level);
198
199                 /*
200                  * Only flush present addresses:
201                  */
202                 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
203                         clflush_cache_range((void *) addr, PAGE_SIZE);
204         }
205 }
206
207 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
208                             int in_flags, struct page **pages)
209 {
210         unsigned int i, level;
211
212         BUG_ON(irqs_disabled());
213
214         on_each_cpu(__cpa_flush_range, NULL, 1);
215
216         if (!cache)
217                 return;
218
219         /* 4M threshold */
220         if (numpages >= 1024) {
221                 if (boot_cpu_data.x86_model >= 4)
222                         wbinvd();
223                 return;
224         }
225         /*
226          * We only need to flush on one CPU,
227          * clflush is a MESI-coherent instruction that
228          * will cause all other CPUs to flush the same
229          * cachelines:
230          */
231         for (i = 0; i < numpages; i++) {
232                 unsigned long addr;
233                 pte_t *pte;
234
235                 if (in_flags & CPA_PAGES_ARRAY)
236                         addr = (unsigned long)page_address(pages[i]);
237                 else
238                         addr = start[i];
239
240                 pte = lookup_address(addr, &level);
241
242                 /*
243                  * Only flush present addresses:
244                  */
245                 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
246                         clflush_cache_range((void *)addr, PAGE_SIZE);
247         }
248 }
249
250 /*
251  * Certain areas of memory on x86 require very specific protection flags,
252  * for example the BIOS area or kernel text. Callers don't always get this
253  * right (again, ioremap() on BIOS memory is not uncommon) so this function
254  * checks and fixes these known static required protection bits.
255  */
256 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
257                                    unsigned long pfn)
258 {
259         pgprot_t forbidden = __pgprot(0);
260
261         /*
262          * The BIOS area between 640k and 1Mb needs to be executable for
263          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
264          */
265         if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
266                 pgprot_val(forbidden) |= _PAGE_NX;
267
268         /*
269          * The kernel text needs to be executable for obvious reasons
270          * Does not cover __inittext since that is gone later on. On
271          * 64bit we do not enforce !NX on the low mapping
272          */
273         if (within(address, (unsigned long)_text, (unsigned long)_etext))
274                 pgprot_val(forbidden) |= _PAGE_NX;
275
276         /*
277          * The .rodata section needs to be read-only. Using the pfn
278          * catches all aliases.
279          */
280         if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
281                    __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
282                 pgprot_val(forbidden) |= _PAGE_RW;
283
284         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
285
286         return prot;
287 }
288
289 /*
290  * Lookup the page table entry for a virtual address. Return a pointer
291  * to the entry and the level of the mapping.
292  *
293  * Note: We return pud and pmd either when the entry is marked large
294  * or when the present bit is not set. Otherwise we would return a
295  * pointer to a nonexisting mapping.
296  */
297 pte_t *lookup_address(unsigned long address, unsigned int *level)
298 {
299         pgd_t *pgd = pgd_offset_k(address);
300         pud_t *pud;
301         pmd_t *pmd;
302
303         *level = PG_LEVEL_NONE;
304
305         if (pgd_none(*pgd))
306                 return NULL;
307
308         pud = pud_offset(pgd, address);
309         if (pud_none(*pud))
310                 return NULL;
311
312         *level = PG_LEVEL_1G;
313         if (pud_large(*pud) || !pud_present(*pud))
314                 return (pte_t *)pud;
315
316         pmd = pmd_offset(pud, address);
317         if (pmd_none(*pmd))
318                 return NULL;
319
320         *level = PG_LEVEL_2M;
321         if (pmd_large(*pmd) || !pmd_present(*pmd))
322                 return (pte_t *)pmd;
323
324         *level = PG_LEVEL_4K;
325
326         return pte_offset_kernel(pmd, address);
327 }
328 EXPORT_SYMBOL_GPL(lookup_address);
329
330 /*
331  * Set the new pmd in all the pgds we know about:
332  */
333 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
334 {
335         /* change init_mm */
336         set_pte_atomic(kpte, pte);
337 #ifdef CONFIG_X86_32
338         if (!SHARED_KERNEL_PMD) {
339                 struct page *page;
340
341                 list_for_each_entry(page, &pgd_list, lru) {
342                         pgd_t *pgd;
343                         pud_t *pud;
344                         pmd_t *pmd;
345
346                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
347                         pud = pud_offset(pgd, address);
348                         pmd = pmd_offset(pud, address);
349                         set_pte_atomic((pte_t *)pmd, pte);
350                 }
351         }
352 #endif
353 }
354
355 static int
356 try_preserve_large_page(pte_t *kpte, unsigned long address,
357                         struct cpa_data *cpa)
358 {
359         unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
360         pte_t new_pte, old_pte, *tmp;
361         pgprot_t old_prot, new_prot;
362         int i, do_split = 1;
363         unsigned int level;
364
365         if (cpa->force_split)
366                 return 1;
367
368         spin_lock_irqsave(&pgd_lock, flags);
369         /*
370          * Check for races, another CPU might have split this page
371          * up already:
372          */
373         tmp = lookup_address(address, &level);
374         if (tmp != kpte)
375                 goto out_unlock;
376
377         switch (level) {
378         case PG_LEVEL_2M:
379                 psize = PMD_PAGE_SIZE;
380                 pmask = PMD_PAGE_MASK;
381                 break;
382 #ifdef CONFIG_X86_64
383         case PG_LEVEL_1G:
384                 psize = PUD_PAGE_SIZE;
385                 pmask = PUD_PAGE_MASK;
386                 break;
387 #endif
388         default:
389                 do_split = -EINVAL;
390                 goto out_unlock;
391         }
392
393         /*
394          * Calculate the number of pages, which fit into this large
395          * page starting at address:
396          */
397         nextpage_addr = (address + psize) & pmask;
398         numpages = (nextpage_addr - address) >> PAGE_SHIFT;
399         if (numpages < cpa->numpages)
400                 cpa->numpages = numpages;
401
402         /*
403          * We are safe now. Check whether the new pgprot is the same:
404          */
405         old_pte = *kpte;
406         old_prot = new_prot = pte_pgprot(old_pte);
407
408         pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
409         pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
410
411         /*
412          * old_pte points to the large page base address. So we need
413          * to add the offset of the virtual address:
414          */
415         pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
416         cpa->pfn = pfn;
417
418         new_prot = static_protections(new_prot, address, pfn);
419
420         /*
421          * We need to check the full range, whether
422          * static_protection() requires a different pgprot for one of
423          * the pages in the range we try to preserve:
424          */
425         addr = address + PAGE_SIZE;
426         pfn++;
427         for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) {
428                 pgprot_t chk_prot = static_protections(new_prot, addr, pfn);
429
430                 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
431                         goto out_unlock;
432         }
433
434         /*
435          * If there are no changes, return. maxpages has been updated
436          * above:
437          */
438         if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
439                 do_split = 0;
440                 goto out_unlock;
441         }
442
443         /*
444          * We need to change the attributes. Check, whether we can
445          * change the large page in one go. We request a split, when
446          * the address is not aligned and the number of pages is
447          * smaller than the number of pages in the large page. Note
448          * that we limited the number of possible pages already to
449          * the number of pages in the large page.
450          */
451         if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
452                 /*
453                  * The address is aligned and the number of pages
454                  * covers the full page.
455                  */
456                 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
457                 __set_pmd_pte(kpte, address, new_pte);
458                 cpa->flags |= CPA_FLUSHTLB;
459                 do_split = 0;
460         }
461
462 out_unlock:
463         spin_unlock_irqrestore(&pgd_lock, flags);
464
465         return do_split;
466 }
467
468 static int split_large_page(pte_t *kpte, unsigned long address)
469 {
470         unsigned long flags, pfn, pfninc = 1;
471         unsigned int i, level;
472         pte_t *pbase, *tmp;
473         pgprot_t ref_prot;
474         struct page *base;
475
476         if (!debug_pagealloc)
477                 spin_unlock(&cpa_lock);
478         base = alloc_pages(GFP_KERNEL, 0);
479         if (!debug_pagealloc)
480                 spin_lock(&cpa_lock);
481         if (!base)
482                 return -ENOMEM;
483
484         spin_lock_irqsave(&pgd_lock, flags);
485         /*
486          * Check for races, another CPU might have split this page
487          * up for us already:
488          */
489         tmp = lookup_address(address, &level);
490         if (tmp != kpte)
491                 goto out_unlock;
492
493         pbase = (pte_t *)page_address(base);
494         paravirt_alloc_pte(&init_mm, page_to_pfn(base));
495         ref_prot = pte_pgprot(pte_clrhuge(*kpte));
496         /*
497          * If we ever want to utilize the PAT bit, we need to
498          * update this function to make sure it's converted from
499          * bit 12 to bit 7 when we cross from the 2MB level to
500          * the 4K level:
501          */
502         WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
503
504 #ifdef CONFIG_X86_64
505         if (level == PG_LEVEL_1G) {
506                 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
507                 pgprot_val(ref_prot) |= _PAGE_PSE;
508         }
509 #endif
510
511         /*
512          * Get the target pfn from the original entry:
513          */
514         pfn = pte_pfn(*kpte);
515         for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
516                 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
517
518         if (address >= (unsigned long)__va(0) &&
519                 address < (unsigned long)__va(max_low_pfn_mapped << PAGE_SHIFT))
520                 split_page_count(level);
521
522 #ifdef CONFIG_X86_64
523         if (address >= (unsigned long)__va(1UL<<32) &&
524                 address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT))
525                 split_page_count(level);
526 #endif
527
528         /*
529          * Install the new, split up pagetable.
530          *
531          * We use the standard kernel pagetable protections for the new
532          * pagetable protections, the actual ptes set above control the
533          * primary protection behavior:
534          */
535         __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
536
537         /*
538          * Intel Atom errata AAH41 workaround.
539          *
540          * The real fix should be in hw or in a microcode update, but
541          * we also probabilistically try to reduce the window of having
542          * a large TLB mixed with 4K TLBs while instruction fetches are
543          * going on.
544          */
545         __flush_tlb_all();
546
547         base = NULL;
548
549 out_unlock:
550         /*
551          * If we dropped out via the lookup_address check under
552          * pgd_lock then stick the page back into the pool:
553          */
554         if (base)
555                 __free_page(base);
556         spin_unlock_irqrestore(&pgd_lock, flags);
557
558         return 0;
559 }
560
561 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
562                                int primary)
563 {
564         /*
565          * Ignore all non primary paths.
566          */
567         if (!primary)
568                 return 0;
569
570         /*
571          * Ignore the NULL PTE for kernel identity mapping, as it is expected
572          * to have holes.
573          * Also set numpages to '1' indicating that we processed cpa req for
574          * one virtual address page and its pfn. TBD: numpages can be set based
575          * on the initial value and the level returned by lookup_address().
576          */
577         if (within(vaddr, PAGE_OFFSET,
578                    PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
579                 cpa->numpages = 1;
580                 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
581                 return 0;
582         } else {
583                 WARN(1, KERN_WARNING "CPA: called for zero pte. "
584                         "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
585                         *cpa->vaddr);
586
587                 return -EFAULT;
588         }
589 }
590
591 static int __change_page_attr(struct cpa_data *cpa, int primary)
592 {
593         unsigned long address;
594         int do_split, err;
595         unsigned int level;
596         pte_t *kpte, old_pte;
597
598         if (cpa->flags & CPA_PAGES_ARRAY)
599                 address = (unsigned long)page_address(cpa->pages[cpa->curpage]);
600         else if (cpa->flags & CPA_ARRAY)
601                 address = cpa->vaddr[cpa->curpage];
602         else
603                 address = *cpa->vaddr;
604 repeat:
605         kpte = lookup_address(address, &level);
606         if (!kpte)
607                 return __cpa_process_fault(cpa, address, primary);
608
609         old_pte = *kpte;
610         if (!pte_val(old_pte))
611                 return __cpa_process_fault(cpa, address, primary);
612
613         if (level == PG_LEVEL_4K) {
614                 pte_t new_pte;
615                 pgprot_t new_prot = pte_pgprot(old_pte);
616                 unsigned long pfn = pte_pfn(old_pte);
617
618                 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
619                 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
620
621                 new_prot = static_protections(new_prot, address, pfn);
622
623                 /*
624                  * We need to keep the pfn from the existing PTE,
625                  * after all we're only going to change it's attributes
626                  * not the memory it points to
627                  */
628                 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
629                 cpa->pfn = pfn;
630                 /*
631                  * Do we really change anything ?
632                  */
633                 if (pte_val(old_pte) != pte_val(new_pte)) {
634                         set_pte_atomic(kpte, new_pte);
635                         cpa->flags |= CPA_FLUSHTLB;
636                 }
637                 cpa->numpages = 1;
638                 return 0;
639         }
640
641         /*
642          * Check, whether we can keep the large page intact
643          * and just change the pte:
644          */
645         do_split = try_preserve_large_page(kpte, address, cpa);
646         /*
647          * When the range fits into the existing large page,
648          * return. cp->numpages and cpa->tlbflush have been updated in
649          * try_large_page:
650          */
651         if (do_split <= 0)
652                 return do_split;
653
654         /*
655          * We have to split the large page:
656          */
657         err = split_large_page(kpte, address);
658         if (!err) {
659                 /*
660                  * Do a global flush tlb after splitting the large page
661                  * and before we do the actual change page attribute in the PTE.
662                  *
663                  * With out this, we violate the TLB application note, that says
664                  * "The TLBs may contain both ordinary and large-page
665                  *  translations for a 4-KByte range of linear addresses. This
666                  *  may occur if software modifies the paging structures so that
667                  *  the page size used for the address range changes. If the two
668                  *  translations differ with respect to page frame or attributes
669                  *  (e.g., permissions), processor behavior is undefined and may
670                  *  be implementation-specific."
671                  *
672                  * We do this global tlb flush inside the cpa_lock, so that we
673                  * don't allow any other cpu, with stale tlb entries change the
674                  * page attribute in parallel, that also falls into the
675                  * just split large page entry.
676                  */
677                 flush_tlb_all();
678                 goto repeat;
679         }
680
681         return err;
682 }
683
684 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
685
686 static int cpa_process_alias(struct cpa_data *cpa)
687 {
688         struct cpa_data alias_cpa;
689         int ret = 0;
690         unsigned long temp_cpa_vaddr, vaddr;
691
692         if (cpa->pfn >= max_pfn_mapped)
693                 return 0;
694
695 #ifdef CONFIG_X86_64
696         if (cpa->pfn >= max_low_pfn_mapped && cpa->pfn < (1UL<<(32-PAGE_SHIFT)))
697                 return 0;
698 #endif
699         /*
700          * No need to redo, when the primary call touched the direct
701          * mapping already:
702          */
703         if (cpa->flags & CPA_PAGES_ARRAY)
704                 vaddr = (unsigned long)page_address(cpa->pages[cpa->curpage]);
705         else if (cpa->flags & CPA_ARRAY)
706                 vaddr = cpa->vaddr[cpa->curpage];
707         else
708                 vaddr = *cpa->vaddr;
709
710         if (!(within(vaddr, PAGE_OFFSET,
711                     PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
712
713                 alias_cpa = *cpa;
714                 temp_cpa_vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT);
715                 alias_cpa.vaddr = &temp_cpa_vaddr;
716                 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
717
718
719                 ret = __change_page_attr_set_clr(&alias_cpa, 0);
720         }
721
722 #ifdef CONFIG_X86_64
723         if (ret)
724                 return ret;
725         /*
726          * No need to redo, when the primary call touched the high
727          * mapping already:
728          */
729         if (within(vaddr, (unsigned long) _text, _brk_end))
730                 return 0;
731
732         /*
733          * If the physical address is inside the kernel map, we need
734          * to touch the high mapped kernel as well:
735          */
736         if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn()))
737                 return 0;
738
739         alias_cpa = *cpa;
740         temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base;
741         alias_cpa.vaddr = &temp_cpa_vaddr;
742         alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
743
744         /*
745          * The high mapping range is imprecise, so ignore the return value.
746          */
747         __change_page_attr_set_clr(&alias_cpa, 0);
748 #endif
749         return ret;
750 }
751
752 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
753 {
754         int ret, numpages = cpa->numpages;
755
756         while (numpages) {
757                 /*
758                  * Store the remaining nr of pages for the large page
759                  * preservation check.
760                  */
761                 cpa->numpages = numpages;
762                 /* for array changes, we can't use large page */
763                 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
764                         cpa->numpages = 1;
765
766                 if (!debug_pagealloc)
767                         spin_lock(&cpa_lock);
768                 ret = __change_page_attr(cpa, checkalias);
769                 if (!debug_pagealloc)
770                         spin_unlock(&cpa_lock);
771                 if (ret)
772                         return ret;
773
774                 if (checkalias) {
775                         ret = cpa_process_alias(cpa);
776                         if (ret)
777                                 return ret;
778                 }
779
780                 /*
781                  * Adjust the number of pages with the result of the
782                  * CPA operation. Either a large page has been
783                  * preserved or a single page update happened.
784                  */
785                 BUG_ON(cpa->numpages > numpages);
786                 numpages -= cpa->numpages;
787                 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
788                         cpa->curpage++;
789                 else
790                         *cpa->vaddr += cpa->numpages * PAGE_SIZE;
791
792         }
793         return 0;
794 }
795
796 static inline int cache_attr(pgprot_t attr)
797 {
798         return pgprot_val(attr) &
799                 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
800 }
801
802 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
803                                     pgprot_t mask_set, pgprot_t mask_clr,
804                                     int force_split, int in_flag,
805                                     struct page **pages)
806 {
807         struct cpa_data cpa;
808         int ret, cache, checkalias;
809
810         /*
811          * Check, if we are requested to change a not supported
812          * feature:
813          */
814         mask_set = canon_pgprot(mask_set);
815         mask_clr = canon_pgprot(mask_clr);
816         if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
817                 return 0;
818
819         /* Ensure we are PAGE_SIZE aligned */
820         if (in_flag & CPA_ARRAY) {
821                 int i;
822                 for (i = 0; i < numpages; i++) {
823                         if (addr[i] & ~PAGE_MASK) {
824                                 addr[i] &= PAGE_MASK;
825                                 WARN_ON_ONCE(1);
826                         }
827                 }
828         } else if (!(in_flag & CPA_PAGES_ARRAY)) {
829                 /*
830                  * in_flag of CPA_PAGES_ARRAY implies it is aligned.
831                  * No need to cehck in that case
832                  */
833                 if (*addr & ~PAGE_MASK) {
834                         *addr &= PAGE_MASK;
835                         /*
836                          * People should not be passing in unaligned addresses:
837                          */
838                         WARN_ON_ONCE(1);
839                 }
840         }
841
842         /* Must avoid aliasing mappings in the highmem code */
843         kmap_flush_unused();
844
845         vm_unmap_aliases();
846
847         cpa.vaddr = addr;
848         cpa.pages = pages;
849         cpa.numpages = numpages;
850         cpa.mask_set = mask_set;
851         cpa.mask_clr = mask_clr;
852         cpa.flags = 0;
853         cpa.curpage = 0;
854         cpa.force_split = force_split;
855
856         if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
857                 cpa.flags |= in_flag;
858
859         /* No alias checking for _NX bit modifications */
860         checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
861
862         ret = __change_page_attr_set_clr(&cpa, checkalias);
863
864         /*
865          * Check whether we really changed something:
866          */
867         if (!(cpa.flags & CPA_FLUSHTLB))
868                 goto out;
869
870         /*
871          * No need to flush, when we did not set any of the caching
872          * attributes:
873          */
874         cache = cache_attr(mask_set);
875
876         /*
877          * On success we use clflush, when the CPU supports it to
878          * avoid the wbindv. If the CPU does not support it and in the
879          * error case we fall back to cpa_flush_all (which uses
880          * wbindv):
881          */
882         if (!ret && cpu_has_clflush) {
883                 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
884                         cpa_flush_array(addr, numpages, cache,
885                                         cpa.flags, pages);
886                 } else
887                         cpa_flush_range(*addr, numpages, cache);
888         } else
889                 cpa_flush_all(cache);
890
891 out:
892         return ret;
893 }
894
895 static inline int change_page_attr_set(unsigned long *addr, int numpages,
896                                        pgprot_t mask, int array)
897 {
898         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
899                 (array ? CPA_ARRAY : 0), NULL);
900 }
901
902 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
903                                          pgprot_t mask, int array)
904 {
905         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
906                 (array ? CPA_ARRAY : 0), NULL);
907 }
908
909 static inline int cpa_set_pages_array(struct page **pages, int numpages,
910                                        pgprot_t mask)
911 {
912         return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
913                 CPA_PAGES_ARRAY, pages);
914 }
915
916 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
917                                          pgprot_t mask)
918 {
919         return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
920                 CPA_PAGES_ARRAY, pages);
921 }
922
923 int _set_memory_uc(unsigned long addr, int numpages)
924 {
925         /*
926          * for now UC MINUS. see comments in ioremap_nocache()
927          */
928         return change_page_attr_set(&addr, numpages,
929                                     __pgprot(_PAGE_CACHE_UC_MINUS), 0);
930 }
931
932 int set_memory_uc(unsigned long addr, int numpages)
933 {
934         /*
935          * for now UC MINUS. see comments in ioremap_nocache()
936          */
937         if (reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
938                             _PAGE_CACHE_UC_MINUS, NULL))
939                 return -EINVAL;
940
941         return _set_memory_uc(addr, numpages);
942 }
943 EXPORT_SYMBOL(set_memory_uc);
944
945 int set_memory_array_uc(unsigned long *addr, int addrinarray)
946 {
947         unsigned long start;
948         unsigned long end;
949         int i;
950         /*
951          * for now UC MINUS. see comments in ioremap_nocache()
952          */
953         for (i = 0; i < addrinarray; i++) {
954                 start = __pa(addr[i]);
955                 for (end = start + PAGE_SIZE; i < addrinarray - 1; end += PAGE_SIZE) {
956                         if (end != __pa(addr[i + 1]))
957                                 break;
958                         i++;
959                 }
960                 if (reserve_memtype(start, end, _PAGE_CACHE_UC_MINUS, NULL))
961                         goto out;
962         }
963
964         return change_page_attr_set(addr, addrinarray,
965                                     __pgprot(_PAGE_CACHE_UC_MINUS), 1);
966 out:
967         for (i = 0; i < addrinarray; i++) {
968                 unsigned long tmp = __pa(addr[i]);
969
970                 if (tmp == start)
971                         break;
972                 for (end = tmp + PAGE_SIZE; i < addrinarray - 1; end += PAGE_SIZE) {
973                         if (end != __pa(addr[i + 1]))
974                                 break;
975                         i++;
976                 }
977                 free_memtype(tmp, end);
978         }
979         return -EINVAL;
980 }
981 EXPORT_SYMBOL(set_memory_array_uc);
982
983 int _set_memory_wc(unsigned long addr, int numpages)
984 {
985         return change_page_attr_set(&addr, numpages,
986                                     __pgprot(_PAGE_CACHE_WC), 0);
987 }
988
989 int set_memory_wc(unsigned long addr, int numpages)
990 {
991         if (!pat_enabled)
992                 return set_memory_uc(addr, numpages);
993
994         if (reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
995                 _PAGE_CACHE_WC, NULL))
996                 return -EINVAL;
997
998         return _set_memory_wc(addr, numpages);
999 }
1000 EXPORT_SYMBOL(set_memory_wc);
1001
1002 int _set_memory_wb(unsigned long addr, int numpages)
1003 {
1004         return change_page_attr_clear(&addr, numpages,
1005                                       __pgprot(_PAGE_CACHE_MASK), 0);
1006 }
1007
1008 int set_memory_wb(unsigned long addr, int numpages)
1009 {
1010         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1011
1012         return _set_memory_wb(addr, numpages);
1013 }
1014 EXPORT_SYMBOL(set_memory_wb);
1015
1016 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1017 {
1018         int i;
1019
1020         for (i = 0; i < addrinarray; i++) {
1021                 unsigned long start = __pa(addr[i]);
1022                 unsigned long end;
1023
1024                 for (end = start + PAGE_SIZE; i < addrinarray - 1; end += PAGE_SIZE) {
1025                         if (end != __pa(addr[i + 1]))
1026                                 break;
1027                         i++;
1028                 }
1029                 free_memtype(start, end);
1030         }
1031         return change_page_attr_clear(addr, addrinarray,
1032                                       __pgprot(_PAGE_CACHE_MASK), 1);
1033 }
1034 EXPORT_SYMBOL(set_memory_array_wb);
1035
1036 int set_memory_x(unsigned long addr, int numpages)
1037 {
1038         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1039 }
1040 EXPORT_SYMBOL(set_memory_x);
1041
1042 int set_memory_nx(unsigned long addr, int numpages)
1043 {
1044         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1045 }
1046 EXPORT_SYMBOL(set_memory_nx);
1047
1048 int set_memory_ro(unsigned long addr, int numpages)
1049 {
1050         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1051 }
1052 EXPORT_SYMBOL_GPL(set_memory_ro);
1053
1054 int set_memory_rw(unsigned long addr, int numpages)
1055 {
1056         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1057 }
1058 EXPORT_SYMBOL_GPL(set_memory_rw);
1059
1060 int set_memory_np(unsigned long addr, int numpages)
1061 {
1062         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1063 }
1064
1065 int set_memory_4k(unsigned long addr, int numpages)
1066 {
1067         return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1068                                         __pgprot(0), 1, 0, NULL);
1069 }
1070
1071 int set_pages_uc(struct page *page, int numpages)
1072 {
1073         unsigned long addr = (unsigned long)page_address(page);
1074
1075         return set_memory_uc(addr, numpages);
1076 }
1077 EXPORT_SYMBOL(set_pages_uc);
1078
1079 int set_pages_array_uc(struct page **pages, int addrinarray)
1080 {
1081         unsigned long start;
1082         unsigned long end;
1083         int i;
1084         int free_idx;
1085
1086         for (i = 0; i < addrinarray; i++) {
1087                 start = (unsigned long)page_address(pages[i]);
1088                 end = start + PAGE_SIZE;
1089                 if (reserve_memtype(start, end, _PAGE_CACHE_UC_MINUS, NULL))
1090                         goto err_out;
1091         }
1092
1093         if (cpa_set_pages_array(pages, addrinarray,
1094                         __pgprot(_PAGE_CACHE_UC_MINUS)) == 0) {
1095                 return 0; /* Success */
1096         }
1097 err_out:
1098         free_idx = i;
1099         for (i = 0; i < free_idx; i++) {
1100                 start = (unsigned long)page_address(pages[i]);
1101                 end = start + PAGE_SIZE;
1102                 free_memtype(start, end);
1103         }
1104         return -EINVAL;
1105 }
1106 EXPORT_SYMBOL(set_pages_array_uc);
1107
1108 int set_pages_wb(struct page *page, int numpages)
1109 {
1110         unsigned long addr = (unsigned long)page_address(page);
1111
1112         return set_memory_wb(addr, numpages);
1113 }
1114 EXPORT_SYMBOL(set_pages_wb);
1115
1116 int set_pages_array_wb(struct page **pages, int addrinarray)
1117 {
1118         int retval;
1119         unsigned long start;
1120         unsigned long end;
1121         int i;
1122
1123         retval = cpa_clear_pages_array(pages, addrinarray,
1124                         __pgprot(_PAGE_CACHE_MASK));
1125
1126         for (i = 0; i < addrinarray; i++) {
1127                 start = (unsigned long)page_address(pages[i]);
1128                 end = start + PAGE_SIZE;
1129                 free_memtype(start, end);
1130         }
1131
1132         return retval;
1133 }
1134 EXPORT_SYMBOL(set_pages_array_wb);
1135
1136 int set_pages_x(struct page *page, int numpages)
1137 {
1138         unsigned long addr = (unsigned long)page_address(page);
1139
1140         return set_memory_x(addr, numpages);
1141 }
1142 EXPORT_SYMBOL(set_pages_x);
1143
1144 int set_pages_nx(struct page *page, int numpages)
1145 {
1146         unsigned long addr = (unsigned long)page_address(page);
1147
1148         return set_memory_nx(addr, numpages);
1149 }
1150 EXPORT_SYMBOL(set_pages_nx);
1151
1152 int set_pages_ro(struct page *page, int numpages)
1153 {
1154         unsigned long addr = (unsigned long)page_address(page);
1155
1156         return set_memory_ro(addr, numpages);
1157 }
1158
1159 int set_pages_rw(struct page *page, int numpages)
1160 {
1161         unsigned long addr = (unsigned long)page_address(page);
1162
1163         return set_memory_rw(addr, numpages);
1164 }
1165
1166 #ifdef CONFIG_DEBUG_PAGEALLOC
1167
1168 static int __set_pages_p(struct page *page, int numpages)
1169 {
1170         unsigned long tempaddr = (unsigned long) page_address(page);
1171         struct cpa_data cpa = { .vaddr = &tempaddr,
1172                                 .numpages = numpages,
1173                                 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1174                                 .mask_clr = __pgprot(0),
1175                                 .flags = 0};
1176
1177         /*
1178          * No alias checking needed for setting present flag. otherwise,
1179          * we may need to break large pages for 64-bit kernel text
1180          * mappings (this adds to complexity if we want to do this from
1181          * atomic context especially). Let's keep it simple!
1182          */
1183         return __change_page_attr_set_clr(&cpa, 0);
1184 }
1185
1186 static int __set_pages_np(struct page *page, int numpages)
1187 {
1188         unsigned long tempaddr = (unsigned long) page_address(page);
1189         struct cpa_data cpa = { .vaddr = &tempaddr,
1190                                 .numpages = numpages,
1191                                 .mask_set = __pgprot(0),
1192                                 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1193                                 .flags = 0};
1194
1195         /*
1196          * No alias checking needed for setting not present flag. otherwise,
1197          * we may need to break large pages for 64-bit kernel text
1198          * mappings (this adds to complexity if we want to do this from
1199          * atomic context especially). Let's keep it simple!
1200          */
1201         return __change_page_attr_set_clr(&cpa, 0);
1202 }
1203
1204 void kernel_map_pages(struct page *page, int numpages, int enable)
1205 {
1206         if (PageHighMem(page))
1207                 return;
1208         if (!enable) {
1209                 debug_check_no_locks_freed(page_address(page),
1210                                            numpages * PAGE_SIZE);
1211         }
1212
1213         /*
1214          * If page allocator is not up yet then do not call c_p_a():
1215          */
1216         if (!debug_pagealloc_enabled)
1217                 return;
1218
1219         /*
1220          * The return value is ignored as the calls cannot fail.
1221          * Large pages for identity mappings are not used at boot time
1222          * and hence no memory allocations during large page split.
1223          */
1224         if (enable)
1225                 __set_pages_p(page, numpages);
1226         else
1227                 __set_pages_np(page, numpages);
1228
1229         /*
1230          * We should perform an IPI and flush all tlbs,
1231          * but that can deadlock->flush only current cpu:
1232          */
1233         __flush_tlb_all();
1234 }
1235
1236 #ifdef CONFIG_HIBERNATION
1237
1238 bool kernel_page_present(struct page *page)
1239 {
1240         unsigned int level;
1241         pte_t *pte;
1242
1243         if (PageHighMem(page))
1244                 return false;
1245
1246         pte = lookup_address((unsigned long)page_address(page), &level);
1247         return (pte_val(*pte) & _PAGE_PRESENT);
1248 }
1249
1250 #endif /* CONFIG_HIBERNATION */
1251
1252 #endif /* CONFIG_DEBUG_PAGEALLOC */
1253
1254 /*
1255  * The testcases use internal knowledge of the implementation that shouldn't
1256  * be exposed to the rest of the kernel. Include these directly here.
1257  */
1258 #ifdef CONFIG_CPA_DEBUG
1259 #include "pageattr-test.c"
1260 #endif