5beb4c16caab155b5fde925f1b9859abf6cd7ceb
[linux-2.6.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  *
10  * Authors:
11  *   Avi Kivity   <avi@qumranet.com>
12  *   Yaniv Kamay  <yaniv@qumranet.com>
13  *   Amit Shah    <amit.shah@qumranet.com>
14  *   Ben-Ami Yassour <benami@il.ibm.com>
15  *
16  * This work is licensed under the terms of the GNU GPL, version 2.  See
17  * the COPYING file in the top-level directory.
18  *
19  */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <trace/events/kvm.h>
41 #undef TRACE_INCLUDE_FILE
42 #define CREATE_TRACE_POINTS
43 #include "trace.h"
44
45 #include <asm/uaccess.h>
46 #include <asm/msr.h>
47 #include <asm/desc.h>
48 #include <asm/mtrr.h>
49 #include <asm/mce.h>
50
51 #define MAX_IO_MSRS 256
52 #define CR0_RESERVED_BITS                                               \
53         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
54                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
55                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
56 #define CR4_RESERVED_BITS                                               \
57         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
58                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
59                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
60                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
61
62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
63
64 #define KVM_MAX_MCE_BANKS 32
65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
66
67 /* EFER defaults:
68  * - enable syscall per default because its emulated by KVM
69  * - enable LME and LMA per default on 64 bit KVM
70  */
71 #ifdef CONFIG_X86_64
72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
73 #else
74 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
75 #endif
76
77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
79
80 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
81 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
82                                     struct kvm_cpuid_entry2 __user *entries);
83
84 struct kvm_x86_ops *kvm_x86_ops;
85 EXPORT_SYMBOL_GPL(kvm_x86_ops);
86
87 int ignore_msrs = 0;
88 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
89
90 struct kvm_stats_debugfs_item debugfs_entries[] = {
91         { "pf_fixed", VCPU_STAT(pf_fixed) },
92         { "pf_guest", VCPU_STAT(pf_guest) },
93         { "tlb_flush", VCPU_STAT(tlb_flush) },
94         { "invlpg", VCPU_STAT(invlpg) },
95         { "exits", VCPU_STAT(exits) },
96         { "io_exits", VCPU_STAT(io_exits) },
97         { "mmio_exits", VCPU_STAT(mmio_exits) },
98         { "signal_exits", VCPU_STAT(signal_exits) },
99         { "irq_window", VCPU_STAT(irq_window_exits) },
100         { "nmi_window", VCPU_STAT(nmi_window_exits) },
101         { "halt_exits", VCPU_STAT(halt_exits) },
102         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
103         { "hypercalls", VCPU_STAT(hypercalls) },
104         { "request_irq", VCPU_STAT(request_irq_exits) },
105         { "irq_exits", VCPU_STAT(irq_exits) },
106         { "host_state_reload", VCPU_STAT(host_state_reload) },
107         { "efer_reload", VCPU_STAT(efer_reload) },
108         { "fpu_reload", VCPU_STAT(fpu_reload) },
109         { "insn_emulation", VCPU_STAT(insn_emulation) },
110         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
111         { "irq_injections", VCPU_STAT(irq_injections) },
112         { "nmi_injections", VCPU_STAT(nmi_injections) },
113         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
114         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
115         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
116         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
117         { "mmu_flooded", VM_STAT(mmu_flooded) },
118         { "mmu_recycled", VM_STAT(mmu_recycled) },
119         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
120         { "mmu_unsync", VM_STAT(mmu_unsync) },
121         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
122         { "largepages", VM_STAT(lpages) },
123         { NULL }
124 };
125
126 unsigned long segment_base(u16 selector)
127 {
128         struct descriptor_table gdt;
129         struct desc_struct *d;
130         unsigned long table_base;
131         unsigned long v;
132
133         if (selector == 0)
134                 return 0;
135
136         kvm_get_gdt(&gdt);
137         table_base = gdt.base;
138
139         if (selector & 4) {           /* from ldt */
140                 u16 ldt_selector = kvm_read_ldt();
141
142                 table_base = segment_base(ldt_selector);
143         }
144         d = (struct desc_struct *)(table_base + (selector & ~7));
145         v = get_desc_base(d);
146 #ifdef CONFIG_X86_64
147         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
148                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
149 #endif
150         return v;
151 }
152 EXPORT_SYMBOL_GPL(segment_base);
153
154 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
155 {
156         if (irqchip_in_kernel(vcpu->kvm))
157                 return vcpu->arch.apic_base;
158         else
159                 return vcpu->arch.apic_base;
160 }
161 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
162
163 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
164 {
165         /* TODO: reserve bits check */
166         if (irqchip_in_kernel(vcpu->kvm))
167                 kvm_lapic_set_base(vcpu, data);
168         else
169                 vcpu->arch.apic_base = data;
170 }
171 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
172
173 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
174 {
175         WARN_ON(vcpu->arch.exception.pending);
176         vcpu->arch.exception.pending = true;
177         vcpu->arch.exception.has_error_code = false;
178         vcpu->arch.exception.nr = nr;
179 }
180 EXPORT_SYMBOL_GPL(kvm_queue_exception);
181
182 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
183                            u32 error_code)
184 {
185         ++vcpu->stat.pf_guest;
186
187         if (vcpu->arch.exception.pending) {
188                 switch(vcpu->arch.exception.nr) {
189                 case DF_VECTOR:
190                         /* triple fault -> shutdown */
191                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
192                         return;
193                 case PF_VECTOR:
194                         vcpu->arch.exception.nr = DF_VECTOR;
195                         vcpu->arch.exception.error_code = 0;
196                         return;
197                 default:
198                         /* replace previous exception with a new one in a hope
199                            that instruction re-execution will regenerate lost
200                            exception */
201                         vcpu->arch.exception.pending = false;
202                         break;
203                 }
204         }
205         vcpu->arch.cr2 = addr;
206         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
207 }
208
209 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
210 {
211         vcpu->arch.nmi_pending = 1;
212 }
213 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
214
215 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
216 {
217         WARN_ON(vcpu->arch.exception.pending);
218         vcpu->arch.exception.pending = true;
219         vcpu->arch.exception.has_error_code = true;
220         vcpu->arch.exception.nr = nr;
221         vcpu->arch.exception.error_code = error_code;
222 }
223 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
224
225 /*
226  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
227  * a #GP and return false.
228  */
229 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
230 {
231         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
232                 return true;
233         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
234         return false;
235 }
236 EXPORT_SYMBOL_GPL(kvm_require_cpl);
237
238 /*
239  * Load the pae pdptrs.  Return true is they are all valid.
240  */
241 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
242 {
243         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
244         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
245         int i;
246         int ret;
247         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
248
249         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
250                                   offset * sizeof(u64), sizeof(pdpte));
251         if (ret < 0) {
252                 ret = 0;
253                 goto out;
254         }
255         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
256                 if (is_present_gpte(pdpte[i]) &&
257                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
258                         ret = 0;
259                         goto out;
260                 }
261         }
262         ret = 1;
263
264         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
265         __set_bit(VCPU_EXREG_PDPTR,
266                   (unsigned long *)&vcpu->arch.regs_avail);
267         __set_bit(VCPU_EXREG_PDPTR,
268                   (unsigned long *)&vcpu->arch.regs_dirty);
269 out:
270
271         return ret;
272 }
273 EXPORT_SYMBOL_GPL(load_pdptrs);
274
275 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
276 {
277         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
278         bool changed = true;
279         int r;
280
281         if (is_long_mode(vcpu) || !is_pae(vcpu))
282                 return false;
283
284         if (!test_bit(VCPU_EXREG_PDPTR,
285                       (unsigned long *)&vcpu->arch.regs_avail))
286                 return true;
287
288         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
289         if (r < 0)
290                 goto out;
291         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
292 out:
293
294         return changed;
295 }
296
297 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
298 {
299         if (cr0 & CR0_RESERVED_BITS) {
300                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
301                        cr0, vcpu->arch.cr0);
302                 kvm_inject_gp(vcpu, 0);
303                 return;
304         }
305
306         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
307                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
308                 kvm_inject_gp(vcpu, 0);
309                 return;
310         }
311
312         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
313                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
314                        "and a clear PE flag\n");
315                 kvm_inject_gp(vcpu, 0);
316                 return;
317         }
318
319         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
320 #ifdef CONFIG_X86_64
321                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
322                         int cs_db, cs_l;
323
324                         if (!is_pae(vcpu)) {
325                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
326                                        "in long mode while PAE is disabled\n");
327                                 kvm_inject_gp(vcpu, 0);
328                                 return;
329                         }
330                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
331                         if (cs_l) {
332                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
333                                        "in long mode while CS.L == 1\n");
334                                 kvm_inject_gp(vcpu, 0);
335                                 return;
336
337                         }
338                 } else
339 #endif
340                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
341                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
342                                "reserved bits\n");
343                         kvm_inject_gp(vcpu, 0);
344                         return;
345                 }
346
347         }
348
349         kvm_x86_ops->set_cr0(vcpu, cr0);
350         vcpu->arch.cr0 = cr0;
351
352         kvm_mmu_reset_context(vcpu);
353         return;
354 }
355 EXPORT_SYMBOL_GPL(kvm_set_cr0);
356
357 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
358 {
359         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
360 }
361 EXPORT_SYMBOL_GPL(kvm_lmsw);
362
363 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
364 {
365         unsigned long old_cr4 = vcpu->arch.cr4;
366         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
367
368         if (cr4 & CR4_RESERVED_BITS) {
369                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
370                 kvm_inject_gp(vcpu, 0);
371                 return;
372         }
373
374         if (is_long_mode(vcpu)) {
375                 if (!(cr4 & X86_CR4_PAE)) {
376                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
377                                "in long mode\n");
378                         kvm_inject_gp(vcpu, 0);
379                         return;
380                 }
381         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
382                    && ((cr4 ^ old_cr4) & pdptr_bits)
383                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
384                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
385                 kvm_inject_gp(vcpu, 0);
386                 return;
387         }
388
389         if (cr4 & X86_CR4_VMXE) {
390                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
391                 kvm_inject_gp(vcpu, 0);
392                 return;
393         }
394         kvm_x86_ops->set_cr4(vcpu, cr4);
395         vcpu->arch.cr4 = cr4;
396         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
397         kvm_mmu_reset_context(vcpu);
398 }
399 EXPORT_SYMBOL_GPL(kvm_set_cr4);
400
401 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
402 {
403         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
404                 kvm_mmu_sync_roots(vcpu);
405                 kvm_mmu_flush_tlb(vcpu);
406                 return;
407         }
408
409         if (is_long_mode(vcpu)) {
410                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
411                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
412                         kvm_inject_gp(vcpu, 0);
413                         return;
414                 }
415         } else {
416                 if (is_pae(vcpu)) {
417                         if (cr3 & CR3_PAE_RESERVED_BITS) {
418                                 printk(KERN_DEBUG
419                                        "set_cr3: #GP, reserved bits\n");
420                                 kvm_inject_gp(vcpu, 0);
421                                 return;
422                         }
423                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
424                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
425                                        "reserved bits\n");
426                                 kvm_inject_gp(vcpu, 0);
427                                 return;
428                         }
429                 }
430                 /*
431                  * We don't check reserved bits in nonpae mode, because
432                  * this isn't enforced, and VMware depends on this.
433                  */
434         }
435
436         /*
437          * Does the new cr3 value map to physical memory? (Note, we
438          * catch an invalid cr3 even in real-mode, because it would
439          * cause trouble later on when we turn on paging anyway.)
440          *
441          * A real CPU would silently accept an invalid cr3 and would
442          * attempt to use it - with largely undefined (and often hard
443          * to debug) behavior on the guest side.
444          */
445         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
446                 kvm_inject_gp(vcpu, 0);
447         else {
448                 vcpu->arch.cr3 = cr3;
449                 vcpu->arch.mmu.new_cr3(vcpu);
450         }
451 }
452 EXPORT_SYMBOL_GPL(kvm_set_cr3);
453
454 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
455 {
456         if (cr8 & CR8_RESERVED_BITS) {
457                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
458                 kvm_inject_gp(vcpu, 0);
459                 return;
460         }
461         if (irqchip_in_kernel(vcpu->kvm))
462                 kvm_lapic_set_tpr(vcpu, cr8);
463         else
464                 vcpu->arch.cr8 = cr8;
465 }
466 EXPORT_SYMBOL_GPL(kvm_set_cr8);
467
468 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
469 {
470         if (irqchip_in_kernel(vcpu->kvm))
471                 return kvm_lapic_get_cr8(vcpu);
472         else
473                 return vcpu->arch.cr8;
474 }
475 EXPORT_SYMBOL_GPL(kvm_get_cr8);
476
477 static inline u32 bit(int bitno)
478 {
479         return 1 << (bitno & 31);
480 }
481
482 /*
483  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
484  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
485  *
486  * This list is modified at module load time to reflect the
487  * capabilities of the host cpu.
488  */
489 static u32 msrs_to_save[] = {
490         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
491         MSR_K6_STAR,
492 #ifdef CONFIG_X86_64
493         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
494 #endif
495         MSR_IA32_TSC, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
496         MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
497 };
498
499 static unsigned num_msrs_to_save;
500
501 static u32 emulated_msrs[] = {
502         MSR_IA32_MISC_ENABLE,
503 };
504
505 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
506 {
507         if (efer & efer_reserved_bits) {
508                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
509                        efer);
510                 kvm_inject_gp(vcpu, 0);
511                 return;
512         }
513
514         if (is_paging(vcpu)
515             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
516                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
517                 kvm_inject_gp(vcpu, 0);
518                 return;
519         }
520
521         if (efer & EFER_FFXSR) {
522                 struct kvm_cpuid_entry2 *feat;
523
524                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
525                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
526                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
527                         kvm_inject_gp(vcpu, 0);
528                         return;
529                 }
530         }
531
532         if (efer & EFER_SVME) {
533                 struct kvm_cpuid_entry2 *feat;
534
535                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
536                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
537                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
538                         kvm_inject_gp(vcpu, 0);
539                         return;
540                 }
541         }
542
543         kvm_x86_ops->set_efer(vcpu, efer);
544
545         efer &= ~EFER_LMA;
546         efer |= vcpu->arch.shadow_efer & EFER_LMA;
547
548         vcpu->arch.shadow_efer = efer;
549
550         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
551         kvm_mmu_reset_context(vcpu);
552 }
553
554 void kvm_enable_efer_bits(u64 mask)
555 {
556        efer_reserved_bits &= ~mask;
557 }
558 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
559
560
561 /*
562  * Writes msr value into into the appropriate "register".
563  * Returns 0 on success, non-0 otherwise.
564  * Assumes vcpu_load() was already called.
565  */
566 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
567 {
568         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
569 }
570
571 /*
572  * Adapt set_msr() to msr_io()'s calling convention
573  */
574 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
575 {
576         return kvm_set_msr(vcpu, index, *data);
577 }
578
579 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
580 {
581         static int version;
582         struct pvclock_wall_clock wc;
583         struct timespec now, sys, boot;
584
585         if (!wall_clock)
586                 return;
587
588         version++;
589
590         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
591
592         /*
593          * The guest calculates current wall clock time by adding
594          * system time (updated by kvm_write_guest_time below) to the
595          * wall clock specified here.  guest system time equals host
596          * system time for us, thus we must fill in host boot time here.
597          */
598         now = current_kernel_time();
599         ktime_get_ts(&sys);
600         boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
601
602         wc.sec = boot.tv_sec;
603         wc.nsec = boot.tv_nsec;
604         wc.version = version;
605
606         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
607
608         version++;
609         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
610 }
611
612 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
613 {
614         uint32_t quotient, remainder;
615
616         /* Don't try to replace with do_div(), this one calculates
617          * "(dividend << 32) / divisor" */
618         __asm__ ( "divl %4"
619                   : "=a" (quotient), "=d" (remainder)
620                   : "0" (0), "1" (dividend), "r" (divisor) );
621         return quotient;
622 }
623
624 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
625 {
626         uint64_t nsecs = 1000000000LL;
627         int32_t  shift = 0;
628         uint64_t tps64;
629         uint32_t tps32;
630
631         tps64 = tsc_khz * 1000LL;
632         while (tps64 > nsecs*2) {
633                 tps64 >>= 1;
634                 shift--;
635         }
636
637         tps32 = (uint32_t)tps64;
638         while (tps32 <= (uint32_t)nsecs) {
639                 tps32 <<= 1;
640                 shift++;
641         }
642
643         hv_clock->tsc_shift = shift;
644         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
645
646         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
647                  __func__, tsc_khz, hv_clock->tsc_shift,
648                  hv_clock->tsc_to_system_mul);
649 }
650
651 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
652
653 static void kvm_write_guest_time(struct kvm_vcpu *v)
654 {
655         struct timespec ts;
656         unsigned long flags;
657         struct kvm_vcpu_arch *vcpu = &v->arch;
658         void *shared_kaddr;
659         unsigned long this_tsc_khz;
660
661         if ((!vcpu->time_page))
662                 return;
663
664         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
665         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
666                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
667                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
668         }
669         put_cpu_var(cpu_tsc_khz);
670
671         /* Keep irq disabled to prevent changes to the clock */
672         local_irq_save(flags);
673         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
674         ktime_get_ts(&ts);
675         local_irq_restore(flags);
676
677         /* With all the info we got, fill in the values */
678
679         vcpu->hv_clock.system_time = ts.tv_nsec +
680                                      (NSEC_PER_SEC * (u64)ts.tv_sec);
681         /*
682          * The interface expects us to write an even number signaling that the
683          * update is finished. Since the guest won't see the intermediate
684          * state, we just increase by 2 at the end.
685          */
686         vcpu->hv_clock.version += 2;
687
688         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
689
690         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
691                sizeof(vcpu->hv_clock));
692
693         kunmap_atomic(shared_kaddr, KM_USER0);
694
695         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
696 }
697
698 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
699 {
700         struct kvm_vcpu_arch *vcpu = &v->arch;
701
702         if (!vcpu->time_page)
703                 return 0;
704         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
705         return 1;
706 }
707
708 static bool msr_mtrr_valid(unsigned msr)
709 {
710         switch (msr) {
711         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
712         case MSR_MTRRfix64K_00000:
713         case MSR_MTRRfix16K_80000:
714         case MSR_MTRRfix16K_A0000:
715         case MSR_MTRRfix4K_C0000:
716         case MSR_MTRRfix4K_C8000:
717         case MSR_MTRRfix4K_D0000:
718         case MSR_MTRRfix4K_D8000:
719         case MSR_MTRRfix4K_E0000:
720         case MSR_MTRRfix4K_E8000:
721         case MSR_MTRRfix4K_F0000:
722         case MSR_MTRRfix4K_F8000:
723         case MSR_MTRRdefType:
724         case MSR_IA32_CR_PAT:
725                 return true;
726         case 0x2f8:
727                 return true;
728         }
729         return false;
730 }
731
732 static bool valid_pat_type(unsigned t)
733 {
734         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
735 }
736
737 static bool valid_mtrr_type(unsigned t)
738 {
739         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
740 }
741
742 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
743 {
744         int i;
745
746         if (!msr_mtrr_valid(msr))
747                 return false;
748
749         if (msr == MSR_IA32_CR_PAT) {
750                 for (i = 0; i < 8; i++)
751                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
752                                 return false;
753                 return true;
754         } else if (msr == MSR_MTRRdefType) {
755                 if (data & ~0xcff)
756                         return false;
757                 return valid_mtrr_type(data & 0xff);
758         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
759                 for (i = 0; i < 8 ; i++)
760                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
761                                 return false;
762                 return true;
763         }
764
765         /* variable MTRRs */
766         return valid_mtrr_type(data & 0xff);
767 }
768
769 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
770 {
771         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
772
773         if (!mtrr_valid(vcpu, msr, data))
774                 return 1;
775
776         if (msr == MSR_MTRRdefType) {
777                 vcpu->arch.mtrr_state.def_type = data;
778                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
779         } else if (msr == MSR_MTRRfix64K_00000)
780                 p[0] = data;
781         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
782                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
783         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
784                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
785         else if (msr == MSR_IA32_CR_PAT)
786                 vcpu->arch.pat = data;
787         else {  /* Variable MTRRs */
788                 int idx, is_mtrr_mask;
789                 u64 *pt;
790
791                 idx = (msr - 0x200) / 2;
792                 is_mtrr_mask = msr - 0x200 - 2 * idx;
793                 if (!is_mtrr_mask)
794                         pt =
795                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
796                 else
797                         pt =
798                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
799                 *pt = data;
800         }
801
802         kvm_mmu_reset_context(vcpu);
803         return 0;
804 }
805
806 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
807 {
808         u64 mcg_cap = vcpu->arch.mcg_cap;
809         unsigned bank_num = mcg_cap & 0xff;
810
811         switch (msr) {
812         case MSR_IA32_MCG_STATUS:
813                 vcpu->arch.mcg_status = data;
814                 break;
815         case MSR_IA32_MCG_CTL:
816                 if (!(mcg_cap & MCG_CTL_P))
817                         return 1;
818                 if (data != 0 && data != ~(u64)0)
819                         return -1;
820                 vcpu->arch.mcg_ctl = data;
821                 break;
822         default:
823                 if (msr >= MSR_IA32_MC0_CTL &&
824                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
825                         u32 offset = msr - MSR_IA32_MC0_CTL;
826                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
827                         if ((offset & 0x3) == 0 &&
828                             data != 0 && data != ~(u64)0)
829                                 return -1;
830                         vcpu->arch.mce_banks[offset] = data;
831                         break;
832                 }
833                 return 1;
834         }
835         return 0;
836 }
837
838 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
839 {
840         switch (msr) {
841         case MSR_EFER:
842                 set_efer(vcpu, data);
843                 break;
844         case MSR_K7_HWCR:
845                 data &= ~(u64)0x40;     /* ignore flush filter disable */
846                 if (data != 0) {
847                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
848                                 data);
849                         return 1;
850                 }
851                 break;
852         case MSR_FAM10H_MMIO_CONF_BASE:
853                 if (data != 0) {
854                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
855                                 "0x%llx\n", data);
856                         return 1;
857                 }
858                 break;
859         case MSR_AMD64_NB_CFG:
860                 break;
861         case MSR_IA32_DEBUGCTLMSR:
862                 if (!data) {
863                         /* We support the non-activated case already */
864                         break;
865                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
866                         /* Values other than LBR and BTF are vendor-specific,
867                            thus reserved and should throw a #GP */
868                         return 1;
869                 }
870                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
871                         __func__, data);
872                 break;
873         case MSR_IA32_UCODE_REV:
874         case MSR_IA32_UCODE_WRITE:
875         case MSR_VM_HSAVE_PA:
876         case MSR_AMD64_PATCH_LOADER:
877                 break;
878         case 0x200 ... 0x2ff:
879                 return set_msr_mtrr(vcpu, msr, data);
880         case MSR_IA32_APICBASE:
881                 kvm_set_apic_base(vcpu, data);
882                 break;
883         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
884                 return kvm_x2apic_msr_write(vcpu, msr, data);
885         case MSR_IA32_MISC_ENABLE:
886                 vcpu->arch.ia32_misc_enable_msr = data;
887                 break;
888         case MSR_KVM_WALL_CLOCK:
889                 vcpu->kvm->arch.wall_clock = data;
890                 kvm_write_wall_clock(vcpu->kvm, data);
891                 break;
892         case MSR_KVM_SYSTEM_TIME: {
893                 if (vcpu->arch.time_page) {
894                         kvm_release_page_dirty(vcpu->arch.time_page);
895                         vcpu->arch.time_page = NULL;
896                 }
897
898                 vcpu->arch.time = data;
899
900                 /* we verify if the enable bit is set... */
901                 if (!(data & 1))
902                         break;
903
904                 /* ...but clean it before doing the actual write */
905                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
906
907                 vcpu->arch.time_page =
908                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
909
910                 if (is_error_page(vcpu->arch.time_page)) {
911                         kvm_release_page_clean(vcpu->arch.time_page);
912                         vcpu->arch.time_page = NULL;
913                 }
914
915                 kvm_request_guest_time_update(vcpu);
916                 break;
917         }
918         case MSR_IA32_MCG_CTL:
919         case MSR_IA32_MCG_STATUS:
920         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
921                 return set_msr_mce(vcpu, msr, data);
922
923         /* Performance counters are not protected by a CPUID bit,
924          * so we should check all of them in the generic path for the sake of
925          * cross vendor migration.
926          * Writing a zero into the event select MSRs disables them,
927          * which we perfectly emulate ;-). Any other value should be at least
928          * reported, some guests depend on them.
929          */
930         case MSR_P6_EVNTSEL0:
931         case MSR_P6_EVNTSEL1:
932         case MSR_K7_EVNTSEL0:
933         case MSR_K7_EVNTSEL1:
934         case MSR_K7_EVNTSEL2:
935         case MSR_K7_EVNTSEL3:
936                 if (data != 0)
937                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
938                                 "0x%x data 0x%llx\n", msr, data);
939                 break;
940         /* at least RHEL 4 unconditionally writes to the perfctr registers,
941          * so we ignore writes to make it happy.
942          */
943         case MSR_P6_PERFCTR0:
944         case MSR_P6_PERFCTR1:
945         case MSR_K7_PERFCTR0:
946         case MSR_K7_PERFCTR1:
947         case MSR_K7_PERFCTR2:
948         case MSR_K7_PERFCTR3:
949                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
950                         "0x%x data 0x%llx\n", msr, data);
951                 break;
952         default:
953                 if (!ignore_msrs) {
954                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
955                                 msr, data);
956                         return 1;
957                 } else {
958                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
959                                 msr, data);
960                         break;
961                 }
962         }
963         return 0;
964 }
965 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
966
967
968 /*
969  * Reads an msr value (of 'msr_index') into 'pdata'.
970  * Returns 0 on success, non-0 otherwise.
971  * Assumes vcpu_load() was already called.
972  */
973 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
974 {
975         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
976 }
977
978 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
979 {
980         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
981
982         if (!msr_mtrr_valid(msr))
983                 return 1;
984
985         if (msr == MSR_MTRRdefType)
986                 *pdata = vcpu->arch.mtrr_state.def_type +
987                          (vcpu->arch.mtrr_state.enabled << 10);
988         else if (msr == MSR_MTRRfix64K_00000)
989                 *pdata = p[0];
990         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
991                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
992         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
993                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
994         else if (msr == MSR_IA32_CR_PAT)
995                 *pdata = vcpu->arch.pat;
996         else {  /* Variable MTRRs */
997                 int idx, is_mtrr_mask;
998                 u64 *pt;
999
1000                 idx = (msr - 0x200) / 2;
1001                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1002                 if (!is_mtrr_mask)
1003                         pt =
1004                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1005                 else
1006                         pt =
1007                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1008                 *pdata = *pt;
1009         }
1010
1011         return 0;
1012 }
1013
1014 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1015 {
1016         u64 data;
1017         u64 mcg_cap = vcpu->arch.mcg_cap;
1018         unsigned bank_num = mcg_cap & 0xff;
1019
1020         switch (msr) {
1021         case MSR_IA32_P5_MC_ADDR:
1022         case MSR_IA32_P5_MC_TYPE:
1023                 data = 0;
1024                 break;
1025         case MSR_IA32_MCG_CAP:
1026                 data = vcpu->arch.mcg_cap;
1027                 break;
1028         case MSR_IA32_MCG_CTL:
1029                 if (!(mcg_cap & MCG_CTL_P))
1030                         return 1;
1031                 data = vcpu->arch.mcg_ctl;
1032                 break;
1033         case MSR_IA32_MCG_STATUS:
1034                 data = vcpu->arch.mcg_status;
1035                 break;
1036         default:
1037                 if (msr >= MSR_IA32_MC0_CTL &&
1038                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1039                         u32 offset = msr - MSR_IA32_MC0_CTL;
1040                         data = vcpu->arch.mce_banks[offset];
1041                         break;
1042                 }
1043                 return 1;
1044         }
1045         *pdata = data;
1046         return 0;
1047 }
1048
1049 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1050 {
1051         u64 data;
1052
1053         switch (msr) {
1054         case MSR_IA32_PLATFORM_ID:
1055         case MSR_IA32_UCODE_REV:
1056         case MSR_IA32_EBL_CR_POWERON:
1057         case MSR_IA32_DEBUGCTLMSR:
1058         case MSR_IA32_LASTBRANCHFROMIP:
1059         case MSR_IA32_LASTBRANCHTOIP:
1060         case MSR_IA32_LASTINTFROMIP:
1061         case MSR_IA32_LASTINTTOIP:
1062         case MSR_K8_SYSCFG:
1063         case MSR_K7_HWCR:
1064         case MSR_VM_HSAVE_PA:
1065         case MSR_P6_PERFCTR0:
1066         case MSR_P6_PERFCTR1:
1067         case MSR_P6_EVNTSEL0:
1068         case MSR_P6_EVNTSEL1:
1069         case MSR_K7_EVNTSEL0:
1070         case MSR_K7_PERFCTR0:
1071         case MSR_K8_INT_PENDING_MSG:
1072         case MSR_AMD64_NB_CFG:
1073         case MSR_FAM10H_MMIO_CONF_BASE:
1074                 data = 0;
1075                 break;
1076         case MSR_MTRRcap:
1077                 data = 0x500 | KVM_NR_VAR_MTRR;
1078                 break;
1079         case 0x200 ... 0x2ff:
1080                 return get_msr_mtrr(vcpu, msr, pdata);
1081         case 0xcd: /* fsb frequency */
1082                 data = 3;
1083                 break;
1084         case MSR_IA32_APICBASE:
1085                 data = kvm_get_apic_base(vcpu);
1086                 break;
1087         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1088                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1089                 break;
1090         case MSR_IA32_MISC_ENABLE:
1091                 data = vcpu->arch.ia32_misc_enable_msr;
1092                 break;
1093         case MSR_IA32_PERF_STATUS:
1094                 /* TSC increment by tick */
1095                 data = 1000ULL;
1096                 /* CPU multiplier */
1097                 data |= (((uint64_t)4ULL) << 40);
1098                 break;
1099         case MSR_EFER:
1100                 data = vcpu->arch.shadow_efer;
1101                 break;
1102         case MSR_KVM_WALL_CLOCK:
1103                 data = vcpu->kvm->arch.wall_clock;
1104                 break;
1105         case MSR_KVM_SYSTEM_TIME:
1106                 data = vcpu->arch.time;
1107                 break;
1108         case MSR_IA32_P5_MC_ADDR:
1109         case MSR_IA32_P5_MC_TYPE:
1110         case MSR_IA32_MCG_CAP:
1111         case MSR_IA32_MCG_CTL:
1112         case MSR_IA32_MCG_STATUS:
1113         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1114                 return get_msr_mce(vcpu, msr, pdata);
1115         default:
1116                 if (!ignore_msrs) {
1117                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1118                         return 1;
1119                 } else {
1120                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1121                         data = 0;
1122                 }
1123                 break;
1124         }
1125         *pdata = data;
1126         return 0;
1127 }
1128 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1129
1130 /*
1131  * Read or write a bunch of msrs. All parameters are kernel addresses.
1132  *
1133  * @return number of msrs set successfully.
1134  */
1135 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1136                     struct kvm_msr_entry *entries,
1137                     int (*do_msr)(struct kvm_vcpu *vcpu,
1138                                   unsigned index, u64 *data))
1139 {
1140         int i;
1141
1142         vcpu_load(vcpu);
1143
1144         down_read(&vcpu->kvm->slots_lock);
1145         for (i = 0; i < msrs->nmsrs; ++i)
1146                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1147                         break;
1148         up_read(&vcpu->kvm->slots_lock);
1149
1150         vcpu_put(vcpu);
1151
1152         return i;
1153 }
1154
1155 /*
1156  * Read or write a bunch of msrs. Parameters are user addresses.
1157  *
1158  * @return number of msrs set successfully.
1159  */
1160 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1161                   int (*do_msr)(struct kvm_vcpu *vcpu,
1162                                 unsigned index, u64 *data),
1163                   int writeback)
1164 {
1165         struct kvm_msrs msrs;
1166         struct kvm_msr_entry *entries;
1167         int r, n;
1168         unsigned size;
1169
1170         r = -EFAULT;
1171         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1172                 goto out;
1173
1174         r = -E2BIG;
1175         if (msrs.nmsrs >= MAX_IO_MSRS)
1176                 goto out;
1177
1178         r = -ENOMEM;
1179         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1180         entries = vmalloc(size);
1181         if (!entries)
1182                 goto out;
1183
1184         r = -EFAULT;
1185         if (copy_from_user(entries, user_msrs->entries, size))
1186                 goto out_free;
1187
1188         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1189         if (r < 0)
1190                 goto out_free;
1191
1192         r = -EFAULT;
1193         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1194                 goto out_free;
1195
1196         r = n;
1197
1198 out_free:
1199         vfree(entries);
1200 out:
1201         return r;
1202 }
1203
1204 int kvm_dev_ioctl_check_extension(long ext)
1205 {
1206         int r;
1207
1208         switch (ext) {
1209         case KVM_CAP_IRQCHIP:
1210         case KVM_CAP_HLT:
1211         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1212         case KVM_CAP_SET_TSS_ADDR:
1213         case KVM_CAP_EXT_CPUID:
1214         case KVM_CAP_CLOCKSOURCE:
1215         case KVM_CAP_PIT:
1216         case KVM_CAP_NOP_IO_DELAY:
1217         case KVM_CAP_MP_STATE:
1218         case KVM_CAP_SYNC_MMU:
1219         case KVM_CAP_REINJECT_CONTROL:
1220         case KVM_CAP_IRQ_INJECT_STATUS:
1221         case KVM_CAP_ASSIGN_DEV_IRQ:
1222         case KVM_CAP_IRQFD:
1223         case KVM_CAP_IOEVENTFD:
1224         case KVM_CAP_PIT2:
1225         case KVM_CAP_PIT_STATE2:
1226         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1227                 r = 1;
1228                 break;
1229         case KVM_CAP_COALESCED_MMIO:
1230                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1231                 break;
1232         case KVM_CAP_VAPIC:
1233                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1234                 break;
1235         case KVM_CAP_NR_VCPUS:
1236                 r = KVM_MAX_VCPUS;
1237                 break;
1238         case KVM_CAP_NR_MEMSLOTS:
1239                 r = KVM_MEMORY_SLOTS;
1240                 break;
1241         case KVM_CAP_PV_MMU:
1242                 r = !tdp_enabled;
1243                 break;
1244         case KVM_CAP_IOMMU:
1245                 r = iommu_found();
1246                 break;
1247         case KVM_CAP_MCE:
1248                 r = KVM_MAX_MCE_BANKS;
1249                 break;
1250         default:
1251                 r = 0;
1252                 break;
1253         }
1254         return r;
1255
1256 }
1257
1258 long kvm_arch_dev_ioctl(struct file *filp,
1259                         unsigned int ioctl, unsigned long arg)
1260 {
1261         void __user *argp = (void __user *)arg;
1262         long r;
1263
1264         switch (ioctl) {
1265         case KVM_GET_MSR_INDEX_LIST: {
1266                 struct kvm_msr_list __user *user_msr_list = argp;
1267                 struct kvm_msr_list msr_list;
1268                 unsigned n;
1269
1270                 r = -EFAULT;
1271                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1272                         goto out;
1273                 n = msr_list.nmsrs;
1274                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1275                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1276                         goto out;
1277                 r = -E2BIG;
1278                 if (n < msr_list.nmsrs)
1279                         goto out;
1280                 r = -EFAULT;
1281                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1282                                  num_msrs_to_save * sizeof(u32)))
1283                         goto out;
1284                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1285                                  &emulated_msrs,
1286                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1287                         goto out;
1288                 r = 0;
1289                 break;
1290         }
1291         case KVM_GET_SUPPORTED_CPUID: {
1292                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1293                 struct kvm_cpuid2 cpuid;
1294
1295                 r = -EFAULT;
1296                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1297                         goto out;
1298                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1299                                                       cpuid_arg->entries);
1300                 if (r)
1301                         goto out;
1302
1303                 r = -EFAULT;
1304                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1305                         goto out;
1306                 r = 0;
1307                 break;
1308         }
1309         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1310                 u64 mce_cap;
1311
1312                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1313                 r = -EFAULT;
1314                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1315                         goto out;
1316                 r = 0;
1317                 break;
1318         }
1319         default:
1320                 r = -EINVAL;
1321         }
1322 out:
1323         return r;
1324 }
1325
1326 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1327 {
1328         kvm_x86_ops->vcpu_load(vcpu, cpu);
1329         kvm_request_guest_time_update(vcpu);
1330 }
1331
1332 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1333 {
1334         kvm_x86_ops->vcpu_put(vcpu);
1335         kvm_put_guest_fpu(vcpu);
1336 }
1337
1338 static int is_efer_nx(void)
1339 {
1340         unsigned long long efer = 0;
1341
1342         rdmsrl_safe(MSR_EFER, &efer);
1343         return efer & EFER_NX;
1344 }
1345
1346 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1347 {
1348         int i;
1349         struct kvm_cpuid_entry2 *e, *entry;
1350
1351         entry = NULL;
1352         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1353                 e = &vcpu->arch.cpuid_entries[i];
1354                 if (e->function == 0x80000001) {
1355                         entry = e;
1356                         break;
1357                 }
1358         }
1359         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1360                 entry->edx &= ~(1 << 20);
1361                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1362         }
1363 }
1364
1365 /* when an old userspace process fills a new kernel module */
1366 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1367                                     struct kvm_cpuid *cpuid,
1368                                     struct kvm_cpuid_entry __user *entries)
1369 {
1370         int r, i;
1371         struct kvm_cpuid_entry *cpuid_entries;
1372
1373         r = -E2BIG;
1374         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1375                 goto out;
1376         r = -ENOMEM;
1377         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1378         if (!cpuid_entries)
1379                 goto out;
1380         r = -EFAULT;
1381         if (copy_from_user(cpuid_entries, entries,
1382                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1383                 goto out_free;
1384         for (i = 0; i < cpuid->nent; i++) {
1385                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1386                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1387                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1388                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1389                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1390                 vcpu->arch.cpuid_entries[i].index = 0;
1391                 vcpu->arch.cpuid_entries[i].flags = 0;
1392                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1393                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1394                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1395         }
1396         vcpu->arch.cpuid_nent = cpuid->nent;
1397         cpuid_fix_nx_cap(vcpu);
1398         r = 0;
1399         kvm_apic_set_version(vcpu);
1400
1401 out_free:
1402         vfree(cpuid_entries);
1403 out:
1404         return r;
1405 }
1406
1407 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1408                                      struct kvm_cpuid2 *cpuid,
1409                                      struct kvm_cpuid_entry2 __user *entries)
1410 {
1411         int r;
1412
1413         r = -E2BIG;
1414         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1415                 goto out;
1416         r = -EFAULT;
1417         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1418                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1419                 goto out;
1420         vcpu->arch.cpuid_nent = cpuid->nent;
1421         kvm_apic_set_version(vcpu);
1422         return 0;
1423
1424 out:
1425         return r;
1426 }
1427
1428 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1429                                      struct kvm_cpuid2 *cpuid,
1430                                      struct kvm_cpuid_entry2 __user *entries)
1431 {
1432         int r;
1433
1434         r = -E2BIG;
1435         if (cpuid->nent < vcpu->arch.cpuid_nent)
1436                 goto out;
1437         r = -EFAULT;
1438         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1439                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1440                 goto out;
1441         return 0;
1442
1443 out:
1444         cpuid->nent = vcpu->arch.cpuid_nent;
1445         return r;
1446 }
1447
1448 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1449                            u32 index)
1450 {
1451         entry->function = function;
1452         entry->index = index;
1453         cpuid_count(entry->function, entry->index,
1454                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1455         entry->flags = 0;
1456 }
1457
1458 #define F(x) bit(X86_FEATURE_##x)
1459
1460 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1461                          u32 index, int *nent, int maxnent)
1462 {
1463         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1464         unsigned f_gbpages = kvm_x86_ops->gb_page_enable() ? F(GBPAGES) : 0;
1465 #ifdef CONFIG_X86_64
1466         unsigned f_lm = F(LM);
1467 #else
1468         unsigned f_lm = 0;
1469 #endif
1470
1471         /* cpuid 1.edx */
1472         const u32 kvm_supported_word0_x86_features =
1473                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1474                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1475                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1476                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1477                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1478                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1479                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1480                 0 /* HTT, TM, Reserved, PBE */;
1481         /* cpuid 0x80000001.edx */
1482         const u32 kvm_supported_word1_x86_features =
1483                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1484                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1485                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1486                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1487                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1488                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1489                 F(FXSR) | F(FXSR_OPT) | f_gbpages | 0 /* RDTSCP */ |
1490                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1491         /* cpuid 1.ecx */
1492         const u32 kvm_supported_word4_x86_features =
1493                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1494                 0 /* DS-CPL, VMX, SMX, EST */ |
1495                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1496                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1497                 0 /* Reserved, DCA */ | F(XMM4_1) |
1498                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1499                 0 /* Reserved, XSAVE, OSXSAVE */;
1500         /* cpuid 0x80000001.ecx */
1501         const u32 kvm_supported_word6_x86_features =
1502                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1503                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1504                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1505                 0 /* SKINIT */ | 0 /* WDT */;
1506
1507         /* all calls to cpuid_count() should be made on the same cpu */
1508         get_cpu();
1509         do_cpuid_1_ent(entry, function, index);
1510         ++*nent;
1511
1512         switch (function) {
1513         case 0:
1514                 entry->eax = min(entry->eax, (u32)0xb);
1515                 break;
1516         case 1:
1517                 entry->edx &= kvm_supported_word0_x86_features;
1518                 entry->ecx &= kvm_supported_word4_x86_features;
1519                 /* we support x2apic emulation even if host does not support
1520                  * it since we emulate x2apic in software */
1521                 entry->ecx |= F(X2APIC);
1522                 break;
1523         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1524          * may return different values. This forces us to get_cpu() before
1525          * issuing the first command, and also to emulate this annoying behavior
1526          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1527         case 2: {
1528                 int t, times = entry->eax & 0xff;
1529
1530                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1531                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1532                 for (t = 1; t < times && *nent < maxnent; ++t) {
1533                         do_cpuid_1_ent(&entry[t], function, 0);
1534                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1535                         ++*nent;
1536                 }
1537                 break;
1538         }
1539         /* function 4 and 0xb have additional index. */
1540         case 4: {
1541                 int i, cache_type;
1542
1543                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1544                 /* read more entries until cache_type is zero */
1545                 for (i = 1; *nent < maxnent; ++i) {
1546                         cache_type = entry[i - 1].eax & 0x1f;
1547                         if (!cache_type)
1548                                 break;
1549                         do_cpuid_1_ent(&entry[i], function, i);
1550                         entry[i].flags |=
1551                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1552                         ++*nent;
1553                 }
1554                 break;
1555         }
1556         case 0xb: {
1557                 int i, level_type;
1558
1559                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1560                 /* read more entries until level_type is zero */
1561                 for (i = 1; *nent < maxnent; ++i) {
1562                         level_type = entry[i - 1].ecx & 0xff00;
1563                         if (!level_type)
1564                                 break;
1565                         do_cpuid_1_ent(&entry[i], function, i);
1566                         entry[i].flags |=
1567                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1568                         ++*nent;
1569                 }
1570                 break;
1571         }
1572         case 0x80000000:
1573                 entry->eax = min(entry->eax, 0x8000001a);
1574                 break;
1575         case 0x80000001:
1576                 entry->edx &= kvm_supported_word1_x86_features;
1577                 entry->ecx &= kvm_supported_word6_x86_features;
1578                 break;
1579         }
1580         put_cpu();
1581 }
1582
1583 #undef F
1584
1585 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1586                                      struct kvm_cpuid_entry2 __user *entries)
1587 {
1588         struct kvm_cpuid_entry2 *cpuid_entries;
1589         int limit, nent = 0, r = -E2BIG;
1590         u32 func;
1591
1592         if (cpuid->nent < 1)
1593                 goto out;
1594         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1595                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1596         r = -ENOMEM;
1597         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1598         if (!cpuid_entries)
1599                 goto out;
1600
1601         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1602         limit = cpuid_entries[0].eax;
1603         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1604                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1605                              &nent, cpuid->nent);
1606         r = -E2BIG;
1607         if (nent >= cpuid->nent)
1608                 goto out_free;
1609
1610         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1611         limit = cpuid_entries[nent - 1].eax;
1612         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1613                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1614                              &nent, cpuid->nent);
1615         r = -E2BIG;
1616         if (nent >= cpuid->nent)
1617                 goto out_free;
1618
1619         r = -EFAULT;
1620         if (copy_to_user(entries, cpuid_entries,
1621                          nent * sizeof(struct kvm_cpuid_entry2)))
1622                 goto out_free;
1623         cpuid->nent = nent;
1624         r = 0;
1625
1626 out_free:
1627         vfree(cpuid_entries);
1628 out:
1629         return r;
1630 }
1631
1632 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1633                                     struct kvm_lapic_state *s)
1634 {
1635         vcpu_load(vcpu);
1636         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1637         vcpu_put(vcpu);
1638
1639         return 0;
1640 }
1641
1642 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1643                                     struct kvm_lapic_state *s)
1644 {
1645         vcpu_load(vcpu);
1646         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1647         kvm_apic_post_state_restore(vcpu);
1648         update_cr8_intercept(vcpu);
1649         vcpu_put(vcpu);
1650
1651         return 0;
1652 }
1653
1654 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1655                                     struct kvm_interrupt *irq)
1656 {
1657         if (irq->irq < 0 || irq->irq >= 256)
1658                 return -EINVAL;
1659         if (irqchip_in_kernel(vcpu->kvm))
1660                 return -ENXIO;
1661         vcpu_load(vcpu);
1662
1663         kvm_queue_interrupt(vcpu, irq->irq, false);
1664
1665         vcpu_put(vcpu);
1666
1667         return 0;
1668 }
1669
1670 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1671 {
1672         vcpu_load(vcpu);
1673         kvm_inject_nmi(vcpu);
1674         vcpu_put(vcpu);
1675
1676         return 0;
1677 }
1678
1679 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1680                                            struct kvm_tpr_access_ctl *tac)
1681 {
1682         if (tac->flags)
1683                 return -EINVAL;
1684         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1685         return 0;
1686 }
1687
1688 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1689                                         u64 mcg_cap)
1690 {
1691         int r;
1692         unsigned bank_num = mcg_cap & 0xff, bank;
1693
1694         r = -EINVAL;
1695         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
1696                 goto out;
1697         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1698                 goto out;
1699         r = 0;
1700         vcpu->arch.mcg_cap = mcg_cap;
1701         /* Init IA32_MCG_CTL to all 1s */
1702         if (mcg_cap & MCG_CTL_P)
1703                 vcpu->arch.mcg_ctl = ~(u64)0;
1704         /* Init IA32_MCi_CTL to all 1s */
1705         for (bank = 0; bank < bank_num; bank++)
1706                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1707 out:
1708         return r;
1709 }
1710
1711 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1712                                       struct kvm_x86_mce *mce)
1713 {
1714         u64 mcg_cap = vcpu->arch.mcg_cap;
1715         unsigned bank_num = mcg_cap & 0xff;
1716         u64 *banks = vcpu->arch.mce_banks;
1717
1718         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1719                 return -EINVAL;
1720         /*
1721          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1722          * reporting is disabled
1723          */
1724         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1725             vcpu->arch.mcg_ctl != ~(u64)0)
1726                 return 0;
1727         banks += 4 * mce->bank;
1728         /*
1729          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1730          * reporting is disabled for the bank
1731          */
1732         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1733                 return 0;
1734         if (mce->status & MCI_STATUS_UC) {
1735                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1736                     !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1737                         printk(KERN_DEBUG "kvm: set_mce: "
1738                                "injects mce exception while "
1739                                "previous one is in progress!\n");
1740                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1741                         return 0;
1742                 }
1743                 if (banks[1] & MCI_STATUS_VAL)
1744                         mce->status |= MCI_STATUS_OVER;
1745                 banks[2] = mce->addr;
1746                 banks[3] = mce->misc;
1747                 vcpu->arch.mcg_status = mce->mcg_status;
1748                 banks[1] = mce->status;
1749                 kvm_queue_exception(vcpu, MC_VECTOR);
1750         } else if (!(banks[1] & MCI_STATUS_VAL)
1751                    || !(banks[1] & MCI_STATUS_UC)) {
1752                 if (banks[1] & MCI_STATUS_VAL)
1753                         mce->status |= MCI_STATUS_OVER;
1754                 banks[2] = mce->addr;
1755                 banks[3] = mce->misc;
1756                 banks[1] = mce->status;
1757         } else
1758                 banks[1] |= MCI_STATUS_OVER;
1759         return 0;
1760 }
1761
1762 long kvm_arch_vcpu_ioctl(struct file *filp,
1763                          unsigned int ioctl, unsigned long arg)
1764 {
1765         struct kvm_vcpu *vcpu = filp->private_data;
1766         void __user *argp = (void __user *)arg;
1767         int r;
1768         struct kvm_lapic_state *lapic = NULL;
1769
1770         switch (ioctl) {
1771         case KVM_GET_LAPIC: {
1772                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1773
1774                 r = -ENOMEM;
1775                 if (!lapic)
1776                         goto out;
1777                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1778                 if (r)
1779                         goto out;
1780                 r = -EFAULT;
1781                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1782                         goto out;
1783                 r = 0;
1784                 break;
1785         }
1786         case KVM_SET_LAPIC: {
1787                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1788                 r = -ENOMEM;
1789                 if (!lapic)
1790                         goto out;
1791                 r = -EFAULT;
1792                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1793                         goto out;
1794                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1795                 if (r)
1796                         goto out;
1797                 r = 0;
1798                 break;
1799         }
1800         case KVM_INTERRUPT: {
1801                 struct kvm_interrupt irq;
1802
1803                 r = -EFAULT;
1804                 if (copy_from_user(&irq, argp, sizeof irq))
1805                         goto out;
1806                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1807                 if (r)
1808                         goto out;
1809                 r = 0;
1810                 break;
1811         }
1812         case KVM_NMI: {
1813                 r = kvm_vcpu_ioctl_nmi(vcpu);
1814                 if (r)
1815                         goto out;
1816                 r = 0;
1817                 break;
1818         }
1819         case KVM_SET_CPUID: {
1820                 struct kvm_cpuid __user *cpuid_arg = argp;
1821                 struct kvm_cpuid cpuid;
1822
1823                 r = -EFAULT;
1824                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1825                         goto out;
1826                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1827                 if (r)
1828                         goto out;
1829                 break;
1830         }
1831         case KVM_SET_CPUID2: {
1832                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1833                 struct kvm_cpuid2 cpuid;
1834
1835                 r = -EFAULT;
1836                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1837                         goto out;
1838                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1839                                               cpuid_arg->entries);
1840                 if (r)
1841                         goto out;
1842                 break;
1843         }
1844         case KVM_GET_CPUID2: {
1845                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1846                 struct kvm_cpuid2 cpuid;
1847
1848                 r = -EFAULT;
1849                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1850                         goto out;
1851                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1852                                               cpuid_arg->entries);
1853                 if (r)
1854                         goto out;
1855                 r = -EFAULT;
1856                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1857                         goto out;
1858                 r = 0;
1859                 break;
1860         }
1861         case KVM_GET_MSRS:
1862                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1863                 break;
1864         case KVM_SET_MSRS:
1865                 r = msr_io(vcpu, argp, do_set_msr, 0);
1866                 break;
1867         case KVM_TPR_ACCESS_REPORTING: {
1868                 struct kvm_tpr_access_ctl tac;
1869
1870                 r = -EFAULT;
1871                 if (copy_from_user(&tac, argp, sizeof tac))
1872                         goto out;
1873                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1874                 if (r)
1875                         goto out;
1876                 r = -EFAULT;
1877                 if (copy_to_user(argp, &tac, sizeof tac))
1878                         goto out;
1879                 r = 0;
1880                 break;
1881         };
1882         case KVM_SET_VAPIC_ADDR: {
1883                 struct kvm_vapic_addr va;
1884
1885                 r = -EINVAL;
1886                 if (!irqchip_in_kernel(vcpu->kvm))
1887                         goto out;
1888                 r = -EFAULT;
1889                 if (copy_from_user(&va, argp, sizeof va))
1890                         goto out;
1891                 r = 0;
1892                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1893                 break;
1894         }
1895         case KVM_X86_SETUP_MCE: {
1896                 u64 mcg_cap;
1897
1898                 r = -EFAULT;
1899                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1900                         goto out;
1901                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1902                 break;
1903         }
1904         case KVM_X86_SET_MCE: {
1905                 struct kvm_x86_mce mce;
1906
1907                 r = -EFAULT;
1908                 if (copy_from_user(&mce, argp, sizeof mce))
1909                         goto out;
1910                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1911                 break;
1912         }
1913         default:
1914                 r = -EINVAL;
1915         }
1916 out:
1917         kfree(lapic);
1918         return r;
1919 }
1920
1921 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1922 {
1923         int ret;
1924
1925         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1926                 return -1;
1927         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1928         return ret;
1929 }
1930
1931 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
1932                                               u64 ident_addr)
1933 {
1934         kvm->arch.ept_identity_map_addr = ident_addr;
1935         return 0;
1936 }
1937
1938 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1939                                           u32 kvm_nr_mmu_pages)
1940 {
1941         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1942                 return -EINVAL;
1943
1944         down_write(&kvm->slots_lock);
1945         spin_lock(&kvm->mmu_lock);
1946
1947         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1948         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1949
1950         spin_unlock(&kvm->mmu_lock);
1951         up_write(&kvm->slots_lock);
1952         return 0;
1953 }
1954
1955 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1956 {
1957         return kvm->arch.n_alloc_mmu_pages;
1958 }
1959
1960 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1961 {
1962         int i;
1963         struct kvm_mem_alias *alias;
1964
1965         for (i = 0; i < kvm->arch.naliases; ++i) {
1966                 alias = &kvm->arch.aliases[i];
1967                 if (gfn >= alias->base_gfn
1968                     && gfn < alias->base_gfn + alias->npages)
1969                         return alias->target_gfn + gfn - alias->base_gfn;
1970         }
1971         return gfn;
1972 }
1973
1974 /*
1975  * Set a new alias region.  Aliases map a portion of physical memory into
1976  * another portion.  This is useful for memory windows, for example the PC
1977  * VGA region.
1978  */
1979 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1980                                          struct kvm_memory_alias *alias)
1981 {
1982         int r, n;
1983         struct kvm_mem_alias *p;
1984
1985         r = -EINVAL;
1986         /* General sanity checks */
1987         if (alias->memory_size & (PAGE_SIZE - 1))
1988                 goto out;
1989         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1990                 goto out;
1991         if (alias->slot >= KVM_ALIAS_SLOTS)
1992                 goto out;
1993         if (alias->guest_phys_addr + alias->memory_size
1994             < alias->guest_phys_addr)
1995                 goto out;
1996         if (alias->target_phys_addr + alias->memory_size
1997             < alias->target_phys_addr)
1998                 goto out;
1999
2000         down_write(&kvm->slots_lock);
2001         spin_lock(&kvm->mmu_lock);
2002
2003         p = &kvm->arch.aliases[alias->slot];
2004         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2005         p->npages = alias->memory_size >> PAGE_SHIFT;
2006         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2007
2008         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2009                 if (kvm->arch.aliases[n - 1].npages)
2010                         break;
2011         kvm->arch.naliases = n;
2012
2013         spin_unlock(&kvm->mmu_lock);
2014         kvm_mmu_zap_all(kvm);
2015
2016         up_write(&kvm->slots_lock);
2017
2018         return 0;
2019
2020 out:
2021         return r;
2022 }
2023
2024 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2025 {
2026         int r;
2027
2028         r = 0;
2029         switch (chip->chip_id) {
2030         case KVM_IRQCHIP_PIC_MASTER:
2031                 memcpy(&chip->chip.pic,
2032                         &pic_irqchip(kvm)->pics[0],
2033                         sizeof(struct kvm_pic_state));
2034                 break;
2035         case KVM_IRQCHIP_PIC_SLAVE:
2036                 memcpy(&chip->chip.pic,
2037                         &pic_irqchip(kvm)->pics[1],
2038                         sizeof(struct kvm_pic_state));
2039                 break;
2040         case KVM_IRQCHIP_IOAPIC:
2041                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2042                 break;
2043         default:
2044                 r = -EINVAL;
2045                 break;
2046         }
2047         return r;
2048 }
2049
2050 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2051 {
2052         int r;
2053
2054         r = 0;
2055         switch (chip->chip_id) {
2056         case KVM_IRQCHIP_PIC_MASTER:
2057                 spin_lock(&pic_irqchip(kvm)->lock);
2058                 memcpy(&pic_irqchip(kvm)->pics[0],
2059                         &chip->chip.pic,
2060                         sizeof(struct kvm_pic_state));
2061                 spin_unlock(&pic_irqchip(kvm)->lock);
2062                 break;
2063         case KVM_IRQCHIP_PIC_SLAVE:
2064                 spin_lock(&pic_irqchip(kvm)->lock);
2065                 memcpy(&pic_irqchip(kvm)->pics[1],
2066                         &chip->chip.pic,
2067                         sizeof(struct kvm_pic_state));
2068                 spin_unlock(&pic_irqchip(kvm)->lock);
2069                 break;
2070         case KVM_IRQCHIP_IOAPIC:
2071                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2072                 break;
2073         default:
2074                 r = -EINVAL;
2075                 break;
2076         }
2077         kvm_pic_update_irq(pic_irqchip(kvm));
2078         return r;
2079 }
2080
2081 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2082 {
2083         int r = 0;
2084
2085         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2086         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2087         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2088         return r;
2089 }
2090
2091 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2092 {
2093         int r = 0;
2094
2095         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2096         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2097         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2098         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2099         return r;
2100 }
2101
2102 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2103 {
2104         int r = 0;
2105
2106         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2107         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2108                 sizeof(ps->channels));
2109         ps->flags = kvm->arch.vpit->pit_state.flags;
2110         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2111         return r;
2112 }
2113
2114 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2115 {
2116         int r = 0, start = 0;
2117         u32 prev_legacy, cur_legacy;
2118         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2119         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2120         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2121         if (!prev_legacy && cur_legacy)
2122                 start = 1;
2123         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2124                sizeof(kvm->arch.vpit->pit_state.channels));
2125         kvm->arch.vpit->pit_state.flags = ps->flags;
2126         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2127         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2128         return r;
2129 }
2130
2131 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2132                                  struct kvm_reinject_control *control)
2133 {
2134         if (!kvm->arch.vpit)
2135                 return -ENXIO;
2136         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2137         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2138         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2139         return 0;
2140 }
2141
2142 /*
2143  * Get (and clear) the dirty memory log for a memory slot.
2144  */
2145 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2146                                       struct kvm_dirty_log *log)
2147 {
2148         int r;
2149         int n;
2150         struct kvm_memory_slot *memslot;
2151         int is_dirty = 0;
2152
2153         down_write(&kvm->slots_lock);
2154
2155         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2156         if (r)
2157                 goto out;
2158
2159         /* If nothing is dirty, don't bother messing with page tables. */
2160         if (is_dirty) {
2161                 spin_lock(&kvm->mmu_lock);
2162                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2163                 spin_unlock(&kvm->mmu_lock);
2164                 memslot = &kvm->memslots[log->slot];
2165                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2166                 memset(memslot->dirty_bitmap, 0, n);
2167         }
2168         r = 0;
2169 out:
2170         up_write(&kvm->slots_lock);
2171         return r;
2172 }
2173
2174 long kvm_arch_vm_ioctl(struct file *filp,
2175                        unsigned int ioctl, unsigned long arg)
2176 {
2177         struct kvm *kvm = filp->private_data;
2178         void __user *argp = (void __user *)arg;
2179         int r = -EINVAL;
2180         /*
2181          * This union makes it completely explicit to gcc-3.x
2182          * that these two variables' stack usage should be
2183          * combined, not added together.
2184          */
2185         union {
2186                 struct kvm_pit_state ps;
2187                 struct kvm_pit_state2 ps2;
2188                 struct kvm_memory_alias alias;
2189                 struct kvm_pit_config pit_config;
2190         } u;
2191
2192         switch (ioctl) {
2193         case KVM_SET_TSS_ADDR:
2194                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2195                 if (r < 0)
2196                         goto out;
2197                 break;
2198         case KVM_SET_IDENTITY_MAP_ADDR: {
2199                 u64 ident_addr;
2200
2201                 r = -EFAULT;
2202                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2203                         goto out;
2204                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2205                 if (r < 0)
2206                         goto out;
2207                 break;
2208         }
2209         case KVM_SET_MEMORY_REGION: {
2210                 struct kvm_memory_region kvm_mem;
2211                 struct kvm_userspace_memory_region kvm_userspace_mem;
2212
2213                 r = -EFAULT;
2214                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2215                         goto out;
2216                 kvm_userspace_mem.slot = kvm_mem.slot;
2217                 kvm_userspace_mem.flags = kvm_mem.flags;
2218                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2219                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2220                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2221                 if (r)
2222                         goto out;
2223                 break;
2224         }
2225         case KVM_SET_NR_MMU_PAGES:
2226                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2227                 if (r)
2228                         goto out;
2229                 break;
2230         case KVM_GET_NR_MMU_PAGES:
2231                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2232                 break;
2233         case KVM_SET_MEMORY_ALIAS:
2234                 r = -EFAULT;
2235                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2236                         goto out;
2237                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2238                 if (r)
2239                         goto out;
2240                 break;
2241         case KVM_CREATE_IRQCHIP:
2242                 r = -ENOMEM;
2243                 kvm->arch.vpic = kvm_create_pic(kvm);
2244                 if (kvm->arch.vpic) {
2245                         r = kvm_ioapic_init(kvm);
2246                         if (r) {
2247                                 kfree(kvm->arch.vpic);
2248                                 kvm->arch.vpic = NULL;
2249                                 goto out;
2250                         }
2251                 } else
2252                         goto out;
2253                 r = kvm_setup_default_irq_routing(kvm);
2254                 if (r) {
2255                         kfree(kvm->arch.vpic);
2256                         kfree(kvm->arch.vioapic);
2257                         goto out;
2258                 }
2259                 break;
2260         case KVM_CREATE_PIT:
2261                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2262                 goto create_pit;
2263         case KVM_CREATE_PIT2:
2264                 r = -EFAULT;
2265                 if (copy_from_user(&u.pit_config, argp,
2266                                    sizeof(struct kvm_pit_config)))
2267                         goto out;
2268         create_pit:
2269                 down_write(&kvm->slots_lock);
2270                 r = -EEXIST;
2271                 if (kvm->arch.vpit)
2272                         goto create_pit_unlock;
2273                 r = -ENOMEM;
2274                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2275                 if (kvm->arch.vpit)
2276                         r = 0;
2277         create_pit_unlock:
2278                 up_write(&kvm->slots_lock);
2279                 break;
2280         case KVM_IRQ_LINE_STATUS:
2281         case KVM_IRQ_LINE: {
2282                 struct kvm_irq_level irq_event;
2283
2284                 r = -EFAULT;
2285                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2286                         goto out;
2287                 if (irqchip_in_kernel(kvm)) {
2288                         __s32 status;
2289                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2290                                         irq_event.irq, irq_event.level);
2291                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2292                                 irq_event.status = status;
2293                                 if (copy_to_user(argp, &irq_event,
2294                                                         sizeof irq_event))
2295                                         goto out;
2296                         }
2297                         r = 0;
2298                 }
2299                 break;
2300         }
2301         case KVM_GET_IRQCHIP: {
2302                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2303                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2304
2305                 r = -ENOMEM;
2306                 if (!chip)
2307                         goto out;
2308                 r = -EFAULT;
2309                 if (copy_from_user(chip, argp, sizeof *chip))
2310                         goto get_irqchip_out;
2311                 r = -ENXIO;
2312                 if (!irqchip_in_kernel(kvm))
2313                         goto get_irqchip_out;
2314                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2315                 if (r)
2316                         goto get_irqchip_out;
2317                 r = -EFAULT;
2318                 if (copy_to_user(argp, chip, sizeof *chip))
2319                         goto get_irqchip_out;
2320                 r = 0;
2321         get_irqchip_out:
2322                 kfree(chip);
2323                 if (r)
2324                         goto out;
2325                 break;
2326         }
2327         case KVM_SET_IRQCHIP: {
2328                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2329                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2330
2331                 r = -ENOMEM;
2332                 if (!chip)
2333                         goto out;
2334                 r = -EFAULT;
2335                 if (copy_from_user(chip, argp, sizeof *chip))
2336                         goto set_irqchip_out;
2337                 r = -ENXIO;
2338                 if (!irqchip_in_kernel(kvm))
2339                         goto set_irqchip_out;
2340                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2341                 if (r)
2342                         goto set_irqchip_out;
2343                 r = 0;
2344         set_irqchip_out:
2345                 kfree(chip);
2346                 if (r)
2347                         goto out;
2348                 break;
2349         }
2350         case KVM_GET_PIT: {
2351                 r = -EFAULT;
2352                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2353                         goto out;
2354                 r = -ENXIO;
2355                 if (!kvm->arch.vpit)
2356                         goto out;
2357                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2358                 if (r)
2359                         goto out;
2360                 r = -EFAULT;
2361                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2362                         goto out;
2363                 r = 0;
2364                 break;
2365         }
2366         case KVM_SET_PIT: {
2367                 r = -EFAULT;
2368                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2369                         goto out;
2370                 r = -ENXIO;
2371                 if (!kvm->arch.vpit)
2372                         goto out;
2373                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2374                 if (r)
2375                         goto out;
2376                 r = 0;
2377                 break;
2378         }
2379         case KVM_GET_PIT2: {
2380                 r = -ENXIO;
2381                 if (!kvm->arch.vpit)
2382                         goto out;
2383                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2384                 if (r)
2385                         goto out;
2386                 r = -EFAULT;
2387                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2388                         goto out;
2389                 r = 0;
2390                 break;
2391         }
2392         case KVM_SET_PIT2: {
2393                 r = -EFAULT;
2394                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2395                         goto out;
2396                 r = -ENXIO;
2397                 if (!kvm->arch.vpit)
2398                         goto out;
2399                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2400                 if (r)
2401                         goto out;
2402                 r = 0;
2403                 break;
2404         }
2405         case KVM_REINJECT_CONTROL: {
2406                 struct kvm_reinject_control control;
2407                 r =  -EFAULT;
2408                 if (copy_from_user(&control, argp, sizeof(control)))
2409                         goto out;
2410                 r = kvm_vm_ioctl_reinject(kvm, &control);
2411                 if (r)
2412                         goto out;
2413                 r = 0;
2414                 break;
2415         }
2416         default:
2417                 ;
2418         }
2419 out:
2420         return r;
2421 }
2422
2423 static void kvm_init_msr_list(void)
2424 {
2425         u32 dummy[2];
2426         unsigned i, j;
2427
2428         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2429                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2430                         continue;
2431                 if (j < i)
2432                         msrs_to_save[j] = msrs_to_save[i];
2433                 j++;
2434         }
2435         num_msrs_to_save = j;
2436 }
2437
2438 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2439                            const void *v)
2440 {
2441         if (vcpu->arch.apic &&
2442             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2443                 return 0;
2444
2445         return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2446 }
2447
2448 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2449 {
2450         if (vcpu->arch.apic &&
2451             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2452                 return 0;
2453
2454         return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2455 }
2456
2457 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2458                                struct kvm_vcpu *vcpu)
2459 {
2460         void *data = val;
2461         int r = X86EMUL_CONTINUE;
2462
2463         while (bytes) {
2464                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2465                 unsigned offset = addr & (PAGE_SIZE-1);
2466                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2467                 int ret;
2468
2469                 if (gpa == UNMAPPED_GVA) {
2470                         r = X86EMUL_PROPAGATE_FAULT;
2471                         goto out;
2472                 }
2473                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2474                 if (ret < 0) {
2475                         r = X86EMUL_UNHANDLEABLE;
2476                         goto out;
2477                 }
2478
2479                 bytes -= toread;
2480                 data += toread;
2481                 addr += toread;
2482         }
2483 out:
2484         return r;
2485 }
2486
2487 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2488                                 struct kvm_vcpu *vcpu)
2489 {
2490         void *data = val;
2491         int r = X86EMUL_CONTINUE;
2492
2493         while (bytes) {
2494                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2495                 unsigned offset = addr & (PAGE_SIZE-1);
2496                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2497                 int ret;
2498
2499                 if (gpa == UNMAPPED_GVA) {
2500                         r = X86EMUL_PROPAGATE_FAULT;
2501                         goto out;
2502                 }
2503                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2504                 if (ret < 0) {
2505                         r = X86EMUL_UNHANDLEABLE;
2506                         goto out;
2507                 }
2508
2509                 bytes -= towrite;
2510                 data += towrite;
2511                 addr += towrite;
2512         }
2513 out:
2514         return r;
2515 }
2516
2517
2518 static int emulator_read_emulated(unsigned long addr,
2519                                   void *val,
2520                                   unsigned int bytes,
2521                                   struct kvm_vcpu *vcpu)
2522 {
2523         gpa_t                 gpa;
2524
2525         if (vcpu->mmio_read_completed) {
2526                 memcpy(val, vcpu->mmio_data, bytes);
2527                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2528                                vcpu->mmio_phys_addr, *(u64 *)val);
2529                 vcpu->mmio_read_completed = 0;
2530                 return X86EMUL_CONTINUE;
2531         }
2532
2533         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2534
2535         /* For APIC access vmexit */
2536         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2537                 goto mmio;
2538
2539         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2540                                 == X86EMUL_CONTINUE)
2541                 return X86EMUL_CONTINUE;
2542         if (gpa == UNMAPPED_GVA)
2543                 return X86EMUL_PROPAGATE_FAULT;
2544
2545 mmio:
2546         /*
2547          * Is this MMIO handled locally?
2548          */
2549         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2550                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2551                 return X86EMUL_CONTINUE;
2552         }
2553
2554         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2555
2556         vcpu->mmio_needed = 1;
2557         vcpu->mmio_phys_addr = gpa;
2558         vcpu->mmio_size = bytes;
2559         vcpu->mmio_is_write = 0;
2560
2561         return X86EMUL_UNHANDLEABLE;
2562 }
2563
2564 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2565                           const void *val, int bytes)
2566 {
2567         int ret;
2568
2569         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2570         if (ret < 0)
2571                 return 0;
2572         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2573         return 1;
2574 }
2575
2576 static int emulator_write_emulated_onepage(unsigned long addr,
2577                                            const void *val,
2578                                            unsigned int bytes,
2579                                            struct kvm_vcpu *vcpu)
2580 {
2581         gpa_t                 gpa;
2582
2583         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2584
2585         if (gpa == UNMAPPED_GVA) {
2586                 kvm_inject_page_fault(vcpu, addr, 2);
2587                 return X86EMUL_PROPAGATE_FAULT;
2588         }
2589
2590         /* For APIC access vmexit */
2591         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2592                 goto mmio;
2593
2594         if (emulator_write_phys(vcpu, gpa, val, bytes))
2595                 return X86EMUL_CONTINUE;
2596
2597 mmio:
2598         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2599         /*
2600          * Is this MMIO handled locally?
2601          */
2602         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2603                 return X86EMUL_CONTINUE;
2604
2605         vcpu->mmio_needed = 1;
2606         vcpu->mmio_phys_addr = gpa;
2607         vcpu->mmio_size = bytes;
2608         vcpu->mmio_is_write = 1;
2609         memcpy(vcpu->mmio_data, val, bytes);
2610
2611         return X86EMUL_CONTINUE;
2612 }
2613
2614 int emulator_write_emulated(unsigned long addr,
2615                                    const void *val,
2616                                    unsigned int bytes,
2617                                    struct kvm_vcpu *vcpu)
2618 {
2619         /* Crossing a page boundary? */
2620         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2621                 int rc, now;
2622
2623                 now = -addr & ~PAGE_MASK;
2624                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2625                 if (rc != X86EMUL_CONTINUE)
2626                         return rc;
2627                 addr += now;
2628                 val += now;
2629                 bytes -= now;
2630         }
2631         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2632 }
2633 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2634
2635 static int emulator_cmpxchg_emulated(unsigned long addr,
2636                                      const void *old,
2637                                      const void *new,
2638                                      unsigned int bytes,
2639                                      struct kvm_vcpu *vcpu)
2640 {
2641         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
2642 #ifndef CONFIG_X86_64
2643         /* guests cmpxchg8b have to be emulated atomically */
2644         if (bytes == 8) {
2645                 gpa_t gpa;
2646                 struct page *page;
2647                 char *kaddr;
2648                 u64 val;
2649
2650                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2651
2652                 if (gpa == UNMAPPED_GVA ||
2653                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2654                         goto emul_write;
2655
2656                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2657                         goto emul_write;
2658
2659                 val = *(u64 *)new;
2660
2661                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2662
2663                 kaddr = kmap_atomic(page, KM_USER0);
2664                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2665                 kunmap_atomic(kaddr, KM_USER0);
2666                 kvm_release_page_dirty(page);
2667         }
2668 emul_write:
2669 #endif
2670
2671         return emulator_write_emulated(addr, new, bytes, vcpu);
2672 }
2673
2674 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2675 {
2676         return kvm_x86_ops->get_segment_base(vcpu, seg);
2677 }
2678
2679 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2680 {
2681         kvm_mmu_invlpg(vcpu, address);
2682         return X86EMUL_CONTINUE;
2683 }
2684
2685 int emulate_clts(struct kvm_vcpu *vcpu)
2686 {
2687         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2688         return X86EMUL_CONTINUE;
2689 }
2690
2691 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2692 {
2693         struct kvm_vcpu *vcpu = ctxt->vcpu;
2694
2695         switch (dr) {
2696         case 0 ... 3:
2697                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2698                 return X86EMUL_CONTINUE;
2699         default:
2700                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2701                 return X86EMUL_UNHANDLEABLE;
2702         }
2703 }
2704
2705 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2706 {
2707         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2708         int exception;
2709
2710         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2711         if (exception) {
2712                 /* FIXME: better handling */
2713                 return X86EMUL_UNHANDLEABLE;
2714         }
2715         return X86EMUL_CONTINUE;
2716 }
2717
2718 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2719 {
2720         u8 opcodes[4];
2721         unsigned long rip = kvm_rip_read(vcpu);
2722         unsigned long rip_linear;
2723
2724         if (!printk_ratelimit())
2725                 return;
2726
2727         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2728
2729         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2730
2731         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2732                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2733 }
2734 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2735
2736 static struct x86_emulate_ops emulate_ops = {
2737         .read_std            = kvm_read_guest_virt,
2738         .read_emulated       = emulator_read_emulated,
2739         .write_emulated      = emulator_write_emulated,
2740         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2741 };
2742
2743 static void cache_all_regs(struct kvm_vcpu *vcpu)
2744 {
2745         kvm_register_read(vcpu, VCPU_REGS_RAX);
2746         kvm_register_read(vcpu, VCPU_REGS_RSP);
2747         kvm_register_read(vcpu, VCPU_REGS_RIP);
2748         vcpu->arch.regs_dirty = ~0;
2749 }
2750
2751 int emulate_instruction(struct kvm_vcpu *vcpu,
2752                         unsigned long cr2,
2753                         u16 error_code,
2754                         int emulation_type)
2755 {
2756         int r, shadow_mask;
2757         struct decode_cache *c;
2758         struct kvm_run *run = vcpu->run;
2759
2760         kvm_clear_exception_queue(vcpu);
2761         vcpu->arch.mmio_fault_cr2 = cr2;
2762         /*
2763          * TODO: fix emulate.c to use guest_read/write_register
2764          * instead of direct ->regs accesses, can save hundred cycles
2765          * on Intel for instructions that don't read/change RSP, for
2766          * for example.
2767          */
2768         cache_all_regs(vcpu);
2769
2770         vcpu->mmio_is_write = 0;
2771         vcpu->arch.pio.string = 0;
2772
2773         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2774                 int cs_db, cs_l;
2775                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2776
2777                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2778                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2779                 vcpu->arch.emulate_ctxt.mode =
2780                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2781                         ? X86EMUL_MODE_REAL : cs_l
2782                         ? X86EMUL_MODE_PROT64 : cs_db
2783                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2784
2785                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2786
2787                 /* Only allow emulation of specific instructions on #UD
2788                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
2789                 c = &vcpu->arch.emulate_ctxt.decode;
2790                 if (emulation_type & EMULTYPE_TRAP_UD) {
2791                         if (!c->twobyte)
2792                                 return EMULATE_FAIL;
2793                         switch (c->b) {
2794                         case 0x01: /* VMMCALL */
2795                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
2796                                         return EMULATE_FAIL;
2797                                 break;
2798                         case 0x34: /* sysenter */
2799                         case 0x35: /* sysexit */
2800                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2801                                         return EMULATE_FAIL;
2802                                 break;
2803                         case 0x05: /* syscall */
2804                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2805                                         return EMULATE_FAIL;
2806                                 break;
2807                         default:
2808                                 return EMULATE_FAIL;
2809                         }
2810
2811                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
2812                                 return EMULATE_FAIL;
2813                 }
2814
2815                 ++vcpu->stat.insn_emulation;
2816                 if (r)  {
2817                         ++vcpu->stat.insn_emulation_fail;
2818                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2819                                 return EMULATE_DONE;
2820                         return EMULATE_FAIL;
2821                 }
2822         }
2823
2824         if (emulation_type & EMULTYPE_SKIP) {
2825                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2826                 return EMULATE_DONE;
2827         }
2828
2829         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2830         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2831
2832         if (r == 0)
2833                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2834
2835         if (vcpu->arch.pio.string)
2836                 return EMULATE_DO_MMIO;
2837
2838         if ((r || vcpu->mmio_is_write) && run) {
2839                 run->exit_reason = KVM_EXIT_MMIO;
2840                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2841                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2842                 run->mmio.len = vcpu->mmio_size;
2843                 run->mmio.is_write = vcpu->mmio_is_write;
2844         }
2845
2846         if (r) {
2847                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2848                         return EMULATE_DONE;
2849                 if (!vcpu->mmio_needed) {
2850                         kvm_report_emulation_failure(vcpu, "mmio");
2851                         return EMULATE_FAIL;
2852                 }
2853                 return EMULATE_DO_MMIO;
2854         }
2855
2856         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2857
2858         if (vcpu->mmio_is_write) {
2859                 vcpu->mmio_needed = 0;
2860                 return EMULATE_DO_MMIO;
2861         }
2862
2863         return EMULATE_DONE;
2864 }
2865 EXPORT_SYMBOL_GPL(emulate_instruction);
2866
2867 static int pio_copy_data(struct kvm_vcpu *vcpu)
2868 {
2869         void *p = vcpu->arch.pio_data;
2870         gva_t q = vcpu->arch.pio.guest_gva;
2871         unsigned bytes;
2872         int ret;
2873
2874         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2875         if (vcpu->arch.pio.in)
2876                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2877         else
2878                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2879         return ret;
2880 }
2881
2882 int complete_pio(struct kvm_vcpu *vcpu)
2883 {
2884         struct kvm_pio_request *io = &vcpu->arch.pio;
2885         long delta;
2886         int r;
2887         unsigned long val;
2888
2889         if (!io->string) {
2890                 if (io->in) {
2891                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2892                         memcpy(&val, vcpu->arch.pio_data, io->size);
2893                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2894                 }
2895         } else {
2896                 if (io->in) {
2897                         r = pio_copy_data(vcpu);
2898                         if (r)
2899                                 return r;
2900                 }
2901
2902                 delta = 1;
2903                 if (io->rep) {
2904                         delta *= io->cur_count;
2905                         /*
2906                          * The size of the register should really depend on
2907                          * current address size.
2908                          */
2909                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2910                         val -= delta;
2911                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2912                 }
2913                 if (io->down)
2914                         delta = -delta;
2915                 delta *= io->size;
2916                 if (io->in) {
2917                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2918                         val += delta;
2919                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2920                 } else {
2921                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2922                         val += delta;
2923                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2924                 }
2925         }
2926
2927         io->count -= io->cur_count;
2928         io->cur_count = 0;
2929
2930         return 0;
2931 }
2932
2933 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
2934 {
2935         /* TODO: String I/O for in kernel device */
2936         int r;
2937
2938         if (vcpu->arch.pio.in)
2939                 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2940                                     vcpu->arch.pio.size, pd);
2941         else
2942                 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2943                                      vcpu->arch.pio.size, pd);
2944         return r;
2945 }
2946
2947 static int pio_string_write(struct kvm_vcpu *vcpu)
2948 {
2949         struct kvm_pio_request *io = &vcpu->arch.pio;
2950         void *pd = vcpu->arch.pio_data;
2951         int i, r = 0;
2952
2953         for (i = 0; i < io->cur_count; i++) {
2954                 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
2955                                      io->port, io->size, pd)) {
2956                         r = -EOPNOTSUPP;
2957                         break;
2958                 }
2959                 pd += io->size;
2960         }
2961         return r;
2962 }
2963
2964 int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
2965 {
2966         unsigned long val;
2967
2968         vcpu->run->exit_reason = KVM_EXIT_IO;
2969         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2970         vcpu->run->io.size = vcpu->arch.pio.size = size;
2971         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2972         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2973         vcpu->run->io.port = vcpu->arch.pio.port = port;
2974         vcpu->arch.pio.in = in;
2975         vcpu->arch.pio.string = 0;
2976         vcpu->arch.pio.down = 0;
2977         vcpu->arch.pio.rep = 0;
2978
2979         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2980                       size, 1);
2981
2982         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2983         memcpy(vcpu->arch.pio_data, &val, 4);
2984
2985         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
2986                 complete_pio(vcpu);
2987                 return 1;
2988         }
2989         return 0;
2990 }
2991 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2992
2993 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
2994                   int size, unsigned long count, int down,
2995                   gva_t address, int rep, unsigned port)
2996 {
2997         unsigned now, in_page;
2998         int ret = 0;
2999
3000         vcpu->run->exit_reason = KVM_EXIT_IO;
3001         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3002         vcpu->run->io.size = vcpu->arch.pio.size = size;
3003         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3004         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3005         vcpu->run->io.port = vcpu->arch.pio.port = port;
3006         vcpu->arch.pio.in = in;
3007         vcpu->arch.pio.string = 1;
3008         vcpu->arch.pio.down = down;
3009         vcpu->arch.pio.rep = rep;
3010
3011         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3012                       size, count);
3013
3014         if (!count) {
3015                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3016                 return 1;
3017         }
3018
3019         if (!down)
3020                 in_page = PAGE_SIZE - offset_in_page(address);
3021         else
3022                 in_page = offset_in_page(address) + size;
3023         now = min(count, (unsigned long)in_page / size);
3024         if (!now)
3025                 now = 1;
3026         if (down) {
3027                 /*
3028                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
3029                  */
3030                 pr_unimpl(vcpu, "guest string pio down\n");
3031                 kvm_inject_gp(vcpu, 0);
3032                 return 1;
3033         }
3034         vcpu->run->io.count = now;
3035         vcpu->arch.pio.cur_count = now;
3036
3037         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3038                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3039
3040         vcpu->arch.pio.guest_gva = address;
3041
3042         if (!vcpu->arch.pio.in) {
3043                 /* string PIO write */
3044                 ret = pio_copy_data(vcpu);
3045                 if (ret == X86EMUL_PROPAGATE_FAULT) {
3046                         kvm_inject_gp(vcpu, 0);
3047                         return 1;
3048                 }
3049                 if (ret == 0 && !pio_string_write(vcpu)) {
3050                         complete_pio(vcpu);
3051                         if (vcpu->arch.pio.count == 0)
3052                                 ret = 1;
3053                 }
3054         }
3055         /* no string PIO read support yet */
3056
3057         return ret;
3058 }
3059 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3060
3061 static void bounce_off(void *info)
3062 {
3063         /* nothing */
3064 }
3065
3066 static unsigned int  ref_freq;
3067 static unsigned long tsc_khz_ref;
3068
3069 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3070                                      void *data)
3071 {
3072         struct cpufreq_freqs *freq = data;
3073         struct kvm *kvm;
3074         struct kvm_vcpu *vcpu;
3075         int i, send_ipi = 0;
3076
3077         if (!ref_freq)
3078                 ref_freq = freq->old;
3079
3080         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3081                 return 0;
3082         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3083                 return 0;
3084         per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
3085
3086         spin_lock(&kvm_lock);
3087         list_for_each_entry(kvm, &vm_list, vm_list) {
3088                 kvm_for_each_vcpu(i, vcpu, kvm) {
3089                         if (vcpu->cpu != freq->cpu)
3090                                 continue;
3091                         if (!kvm_request_guest_time_update(vcpu))
3092                                 continue;
3093                         if (vcpu->cpu != smp_processor_id())
3094                                 send_ipi++;
3095                 }
3096         }
3097         spin_unlock(&kvm_lock);
3098
3099         if (freq->old < freq->new && send_ipi) {
3100                 /*
3101                  * We upscale the frequency.  Must make the guest
3102                  * doesn't see old kvmclock values while running with
3103                  * the new frequency, otherwise we risk the guest sees
3104                  * time go backwards.
3105                  *
3106                  * In case we update the frequency for another cpu
3107                  * (which might be in guest context) send an interrupt
3108                  * to kick the cpu out of guest context.  Next time
3109                  * guest context is entered kvmclock will be updated,
3110                  * so the guest will not see stale values.
3111                  */
3112                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3113         }
3114         return 0;
3115 }
3116
3117 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3118         .notifier_call  = kvmclock_cpufreq_notifier
3119 };
3120
3121 int kvm_arch_init(void *opaque)
3122 {
3123         int r, cpu;
3124         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3125
3126         if (kvm_x86_ops) {
3127                 printk(KERN_ERR "kvm: already loaded the other module\n");
3128                 r = -EEXIST;
3129                 goto out;
3130         }
3131
3132         if (!ops->cpu_has_kvm_support()) {
3133                 printk(KERN_ERR "kvm: no hardware support\n");
3134                 r = -EOPNOTSUPP;
3135                 goto out;
3136         }
3137         if (ops->disabled_by_bios()) {
3138                 printk(KERN_ERR "kvm: disabled by bios\n");
3139                 r = -EOPNOTSUPP;
3140                 goto out;
3141         }
3142
3143         r = kvm_mmu_module_init();
3144         if (r)
3145                 goto out;
3146
3147         kvm_init_msr_list();
3148
3149         kvm_x86_ops = ops;
3150         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3151         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3152         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3153                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3154
3155         for_each_possible_cpu(cpu)
3156                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3157         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3158                 tsc_khz_ref = tsc_khz;
3159                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3160                                           CPUFREQ_TRANSITION_NOTIFIER);
3161         }
3162
3163         return 0;
3164
3165 out:
3166         return r;
3167 }
3168
3169 void kvm_arch_exit(void)
3170 {
3171         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3172                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3173                                             CPUFREQ_TRANSITION_NOTIFIER);
3174         kvm_x86_ops = NULL;
3175         kvm_mmu_module_exit();
3176 }
3177
3178 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3179 {
3180         ++vcpu->stat.halt_exits;
3181         if (irqchip_in_kernel(vcpu->kvm)) {
3182                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3183                 return 1;
3184         } else {
3185                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3186                 return 0;
3187         }
3188 }
3189 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3190
3191 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3192                            unsigned long a1)
3193 {
3194         if (is_long_mode(vcpu))
3195                 return a0;
3196         else
3197                 return a0 | ((gpa_t)a1 << 32);
3198 }
3199
3200 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3201 {
3202         unsigned long nr, a0, a1, a2, a3, ret;
3203         int r = 1;
3204
3205         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3206         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3207         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3208         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3209         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3210
3211         trace_kvm_hypercall(nr, a0, a1, a2, a3);
3212
3213         if (!is_long_mode(vcpu)) {
3214                 nr &= 0xFFFFFFFF;
3215                 a0 &= 0xFFFFFFFF;
3216                 a1 &= 0xFFFFFFFF;
3217                 a2 &= 0xFFFFFFFF;
3218                 a3 &= 0xFFFFFFFF;
3219         }
3220
3221         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3222                 ret = -KVM_EPERM;
3223                 goto out;
3224         }
3225
3226         switch (nr) {
3227         case KVM_HC_VAPIC_POLL_IRQ:
3228                 ret = 0;
3229                 break;
3230         case KVM_HC_MMU_OP:
3231                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3232                 break;
3233         default:
3234                 ret = -KVM_ENOSYS;
3235                 break;
3236         }
3237 out:
3238         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3239         ++vcpu->stat.hypercalls;
3240         return r;
3241 }
3242 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3243
3244 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3245 {
3246         char instruction[3];
3247         int ret = 0;
3248         unsigned long rip = kvm_rip_read(vcpu);
3249
3250
3251         /*
3252          * Blow out the MMU to ensure that no other VCPU has an active mapping
3253          * to ensure that the updated hypercall appears atomically across all
3254          * VCPUs.
3255          */
3256         kvm_mmu_zap_all(vcpu->kvm);
3257
3258         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3259         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3260             != X86EMUL_CONTINUE)
3261                 ret = -EFAULT;
3262
3263         return ret;
3264 }
3265
3266 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3267 {
3268         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3269 }
3270
3271 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3272 {
3273         struct descriptor_table dt = { limit, base };
3274
3275         kvm_x86_ops->set_gdt(vcpu, &dt);
3276 }
3277
3278 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3279 {
3280         struct descriptor_table dt = { limit, base };
3281
3282         kvm_x86_ops->set_idt(vcpu, &dt);
3283 }
3284
3285 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3286                    unsigned long *rflags)
3287 {
3288         kvm_lmsw(vcpu, msw);
3289         *rflags = kvm_x86_ops->get_rflags(vcpu);
3290 }
3291
3292 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3293 {
3294         unsigned long value;
3295
3296         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3297         switch (cr) {
3298         case 0:
3299                 value = vcpu->arch.cr0;
3300                 break;
3301         case 2:
3302                 value = vcpu->arch.cr2;
3303                 break;
3304         case 3:
3305                 value = vcpu->arch.cr3;
3306                 break;
3307         case 4:
3308                 value = vcpu->arch.cr4;
3309                 break;
3310         case 8:
3311                 value = kvm_get_cr8(vcpu);
3312                 break;
3313         default:
3314                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3315                 return 0;
3316         }
3317
3318         return value;
3319 }
3320
3321 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3322                      unsigned long *rflags)
3323 {
3324         switch (cr) {
3325         case 0:
3326                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3327                 *rflags = kvm_x86_ops->get_rflags(vcpu);
3328                 break;
3329         case 2:
3330                 vcpu->arch.cr2 = val;
3331                 break;
3332         case 3:
3333                 kvm_set_cr3(vcpu, val);
3334                 break;
3335         case 4:
3336                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3337                 break;
3338         case 8:
3339                 kvm_set_cr8(vcpu, val & 0xfUL);
3340                 break;
3341         default:
3342                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3343         }
3344 }
3345
3346 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3347 {
3348         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3349         int j, nent = vcpu->arch.cpuid_nent;
3350
3351         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3352         /* when no next entry is found, the current entry[i] is reselected */
3353         for (j = i + 1; ; j = (j + 1) % nent) {
3354                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3355                 if (ej->function == e->function) {
3356                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3357                         return j;
3358                 }
3359         }
3360         return 0; /* silence gcc, even though control never reaches here */
3361 }
3362
3363 /* find an entry with matching function, matching index (if needed), and that
3364  * should be read next (if it's stateful) */
3365 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3366         u32 function, u32 index)
3367 {
3368         if (e->function != function)
3369                 return 0;
3370         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3371                 return 0;
3372         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3373             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3374                 return 0;
3375         return 1;
3376 }
3377
3378 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3379                                               u32 function, u32 index)
3380 {
3381         int i;
3382         struct kvm_cpuid_entry2 *best = NULL;
3383
3384         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3385                 struct kvm_cpuid_entry2 *e;
3386
3387                 e = &vcpu->arch.cpuid_entries[i];
3388                 if (is_matching_cpuid_entry(e, function, index)) {
3389                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3390                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3391                         best = e;
3392                         break;
3393                 }
3394                 /*
3395                  * Both basic or both extended?
3396                  */
3397                 if (((e->function ^ function) & 0x80000000) == 0)
3398                         if (!best || e->function > best->function)
3399                                 best = e;
3400         }
3401         return best;
3402 }
3403
3404 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3405 {
3406         struct kvm_cpuid_entry2 *best;
3407
3408         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3409         if (best)
3410                 return best->eax & 0xff;
3411         return 36;
3412 }
3413
3414 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3415 {
3416         u32 function, index;
3417         struct kvm_cpuid_entry2 *best;
3418
3419         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3420         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3421         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3422         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3423         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3424         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3425         best = kvm_find_cpuid_entry(vcpu, function, index);
3426         if (best) {
3427                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3428                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3429                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3430                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3431         }
3432         kvm_x86_ops->skip_emulated_instruction(vcpu);
3433         trace_kvm_cpuid(function,
3434                         kvm_register_read(vcpu, VCPU_REGS_RAX),
3435                         kvm_register_read(vcpu, VCPU_REGS_RBX),
3436                         kvm_register_read(vcpu, VCPU_REGS_RCX),
3437                         kvm_register_read(vcpu, VCPU_REGS_RDX));
3438 }
3439 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3440
3441 /*
3442  * Check if userspace requested an interrupt window, and that the
3443  * interrupt window is open.
3444  *
3445  * No need to exit to userspace if we already have an interrupt queued.
3446  */
3447 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
3448 {
3449         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3450                 vcpu->run->request_interrupt_window &&
3451                 kvm_arch_interrupt_allowed(vcpu));
3452 }
3453
3454 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
3455 {
3456         struct kvm_run *kvm_run = vcpu->run;
3457
3458         kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3459         kvm_run->cr8 = kvm_get_cr8(vcpu);
3460         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3461         if (irqchip_in_kernel(vcpu->kvm))
3462                 kvm_run->ready_for_interrupt_injection = 1;
3463         else
3464                 kvm_run->ready_for_interrupt_injection =
3465                         kvm_arch_interrupt_allowed(vcpu) &&
3466                         !kvm_cpu_has_interrupt(vcpu) &&
3467                         !kvm_event_needs_reinjection(vcpu);
3468 }
3469
3470 static void vapic_enter(struct kvm_vcpu *vcpu)
3471 {
3472         struct kvm_lapic *apic = vcpu->arch.apic;
3473         struct page *page;
3474
3475         if (!apic || !apic->vapic_addr)
3476                 return;
3477
3478         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3479
3480         vcpu->arch.apic->vapic_page = page;
3481 }
3482
3483 static void vapic_exit(struct kvm_vcpu *vcpu)
3484 {
3485         struct kvm_lapic *apic = vcpu->arch.apic;
3486
3487         if (!apic || !apic->vapic_addr)
3488                 return;
3489
3490         down_read(&vcpu->kvm->slots_lock);
3491         kvm_release_page_dirty(apic->vapic_page);
3492         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3493         up_read(&vcpu->kvm->slots_lock);
3494 }
3495
3496 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3497 {
3498         int max_irr, tpr;
3499
3500         if (!kvm_x86_ops->update_cr8_intercept)
3501                 return;
3502
3503         if (!vcpu->arch.apic)
3504                 return;
3505
3506         if (!vcpu->arch.apic->vapic_addr)
3507                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3508         else
3509                 max_irr = -1;
3510
3511         if (max_irr != -1)
3512                 max_irr >>= 4;
3513
3514         tpr = kvm_lapic_get_cr8(vcpu);
3515
3516         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3517 }
3518
3519 static void inject_pending_event(struct kvm_vcpu *vcpu)
3520 {
3521         /* try to reinject previous events if any */
3522         if (vcpu->arch.exception.pending) {
3523                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
3524                                           vcpu->arch.exception.has_error_code,
3525                                           vcpu->arch.exception.error_code);
3526                 return;
3527         }
3528
3529         if (vcpu->arch.nmi_injected) {
3530                 kvm_x86_ops->set_nmi(vcpu);
3531                 return;
3532         }
3533
3534         if (vcpu->arch.interrupt.pending) {
3535                 kvm_x86_ops->set_irq(vcpu);
3536                 return;
3537         }
3538
3539         /* try to inject new event if pending */
3540         if (vcpu->arch.nmi_pending) {
3541                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3542                         vcpu->arch.nmi_pending = false;
3543                         vcpu->arch.nmi_injected = true;
3544                         kvm_x86_ops->set_nmi(vcpu);
3545                 }
3546         } else if (kvm_cpu_has_interrupt(vcpu)) {
3547                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3548                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3549                                             false);
3550                         kvm_x86_ops->set_irq(vcpu);
3551                 }
3552         }
3553 }
3554
3555 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
3556 {
3557         int r;
3558         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3559                 vcpu->run->request_interrupt_window;
3560
3561         if (vcpu->requests)
3562                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3563                         kvm_mmu_unload(vcpu);
3564
3565         r = kvm_mmu_reload(vcpu);
3566         if (unlikely(r))
3567                 goto out;
3568
3569         if (vcpu->requests) {
3570                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3571                         __kvm_migrate_timers(vcpu);
3572                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3573                         kvm_write_guest_time(vcpu);
3574                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3575                         kvm_mmu_sync_roots(vcpu);
3576                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3577                         kvm_x86_ops->tlb_flush(vcpu);
3578                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3579                                        &vcpu->requests)) {
3580                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
3581                         r = 0;
3582                         goto out;
3583                 }
3584                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3585                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
3586                         r = 0;
3587                         goto out;
3588                 }
3589         }
3590
3591         preempt_disable();
3592
3593         kvm_x86_ops->prepare_guest_switch(vcpu);
3594         kvm_load_guest_fpu(vcpu);
3595
3596         local_irq_disable();
3597
3598         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3599         smp_mb__after_clear_bit();
3600
3601         if (vcpu->requests || need_resched() || signal_pending(current)) {
3602                 set_bit(KVM_REQ_KICK, &vcpu->requests);
3603                 local_irq_enable();
3604                 preempt_enable();
3605                 r = 1;
3606                 goto out;
3607         }
3608
3609         inject_pending_event(vcpu);
3610
3611         /* enable NMI/IRQ window open exits if needed */
3612         if (vcpu->arch.nmi_pending)
3613                 kvm_x86_ops->enable_nmi_window(vcpu);
3614         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3615                 kvm_x86_ops->enable_irq_window(vcpu);
3616
3617         if (kvm_lapic_enabled(vcpu)) {
3618                 update_cr8_intercept(vcpu);
3619                 kvm_lapic_sync_to_vapic(vcpu);
3620         }
3621
3622         up_read(&vcpu->kvm->slots_lock);
3623
3624         kvm_guest_enter();
3625
3626         if (unlikely(vcpu->arch.switch_db_regs)) {
3627                 set_debugreg(0, 7);
3628                 set_debugreg(vcpu->arch.eff_db[0], 0);
3629                 set_debugreg(vcpu->arch.eff_db[1], 1);
3630                 set_debugreg(vcpu->arch.eff_db[2], 2);
3631                 set_debugreg(vcpu->arch.eff_db[3], 3);
3632         }
3633
3634         trace_kvm_entry(vcpu->vcpu_id);
3635         kvm_x86_ops->run(vcpu);
3636
3637         if (unlikely(vcpu->arch.switch_db_regs || test_thread_flag(TIF_DEBUG))) {
3638                 set_debugreg(current->thread.debugreg0, 0);
3639                 set_debugreg(current->thread.debugreg1, 1);
3640                 set_debugreg(current->thread.debugreg2, 2);
3641                 set_debugreg(current->thread.debugreg3, 3);
3642                 set_debugreg(current->thread.debugreg6, 6);
3643                 set_debugreg(current->thread.debugreg7, 7);
3644         }
3645
3646         set_bit(KVM_REQ_KICK, &vcpu->requests);
3647         local_irq_enable();
3648
3649         ++vcpu->stat.exits;
3650
3651         /*
3652          * We must have an instruction between local_irq_enable() and
3653          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3654          * the interrupt shadow.  The stat.exits increment will do nicely.
3655          * But we need to prevent reordering, hence this barrier():
3656          */
3657         barrier();
3658
3659         kvm_guest_exit();
3660
3661         preempt_enable();
3662
3663         down_read(&vcpu->kvm->slots_lock);
3664
3665         /*
3666          * Profile KVM exit RIPs:
3667          */
3668         if (unlikely(prof_on == KVM_PROFILING)) {
3669                 unsigned long rip = kvm_rip_read(vcpu);
3670                 profile_hit(KVM_PROFILING, (void *)rip);
3671         }
3672
3673
3674         kvm_lapic_sync_from_vapic(vcpu);
3675
3676         r = kvm_x86_ops->handle_exit(vcpu);
3677 out:
3678         return r;
3679 }
3680
3681
3682 static int __vcpu_run(struct kvm_vcpu *vcpu)
3683 {
3684         int r;
3685
3686         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3687                 pr_debug("vcpu %d received sipi with vector # %x\n",
3688                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3689                 kvm_lapic_reset(vcpu);
3690                 r = kvm_arch_vcpu_reset(vcpu);
3691                 if (r)
3692                         return r;
3693                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3694         }
3695
3696         down_read(&vcpu->kvm->slots_lock);
3697         vapic_enter(vcpu);
3698
3699         r = 1;
3700         while (r > 0) {
3701                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3702                         r = vcpu_enter_guest(vcpu);
3703                 else {
3704                         up_read(&vcpu->kvm->slots_lock);
3705                         kvm_vcpu_block(vcpu);
3706                         down_read(&vcpu->kvm->slots_lock);
3707                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3708                         {
3709                                 switch(vcpu->arch.mp_state) {
3710                                 case KVM_MP_STATE_HALTED:
3711                                         vcpu->arch.mp_state =
3712                                                 KVM_MP_STATE_RUNNABLE;
3713                                 case KVM_MP_STATE_RUNNABLE:
3714                                         break;
3715                                 case KVM_MP_STATE_SIPI_RECEIVED:
3716                                 default:
3717                                         r = -EINTR;
3718                                         break;
3719                                 }
3720                         }
3721                 }
3722
3723                 if (r <= 0)
3724                         break;
3725
3726                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3727                 if (kvm_cpu_has_pending_timer(vcpu))
3728                         kvm_inject_pending_timer_irqs(vcpu);
3729
3730                 if (dm_request_for_irq_injection(vcpu)) {
3731                         r = -EINTR;
3732                         vcpu->run->exit_reason = KVM_EXIT_INTR;
3733                         ++vcpu->stat.request_irq_exits;
3734                 }
3735                 if (signal_pending(current)) {
3736                         r = -EINTR;
3737                         vcpu->run->exit_reason = KVM_EXIT_INTR;
3738                         ++vcpu->stat.signal_exits;
3739                 }
3740                 if (need_resched()) {
3741                         up_read(&vcpu->kvm->slots_lock);
3742                         kvm_resched(vcpu);
3743                         down_read(&vcpu->kvm->slots_lock);
3744                 }
3745         }
3746
3747         up_read(&vcpu->kvm->slots_lock);
3748         post_kvm_run_save(vcpu);
3749
3750         vapic_exit(vcpu);
3751
3752         return r;
3753 }
3754
3755 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3756 {
3757         int r;
3758         sigset_t sigsaved;
3759
3760         vcpu_load(vcpu);
3761
3762         if (vcpu->sigset_active)
3763                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3764
3765         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3766                 kvm_vcpu_block(vcpu);
3767                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3768                 r = -EAGAIN;
3769                 goto out;
3770         }
3771
3772         /* re-sync apic's tpr */
3773         if (!irqchip_in_kernel(vcpu->kvm))
3774                 kvm_set_cr8(vcpu, kvm_run->cr8);
3775
3776         if (vcpu->arch.pio.cur_count) {
3777                 r = complete_pio(vcpu);
3778                 if (r)
3779                         goto out;
3780         }
3781 #if CONFIG_HAS_IOMEM
3782         if (vcpu->mmio_needed) {
3783                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3784                 vcpu->mmio_read_completed = 1;
3785                 vcpu->mmio_needed = 0;
3786
3787                 down_read(&vcpu->kvm->slots_lock);
3788                 r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0,
3789                                         EMULTYPE_NO_DECODE);
3790                 up_read(&vcpu->kvm->slots_lock);
3791                 if (r == EMULATE_DO_MMIO) {
3792                         /*
3793                          * Read-modify-write.  Back to userspace.
3794                          */
3795                         r = 0;
3796                         goto out;
3797                 }
3798         }
3799 #endif
3800         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3801                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3802                                      kvm_run->hypercall.ret);
3803
3804         r = __vcpu_run(vcpu);
3805
3806 out:
3807         if (vcpu->sigset_active)
3808                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3809
3810         vcpu_put(vcpu);
3811         return r;
3812 }
3813
3814 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3815 {
3816         vcpu_load(vcpu);
3817
3818         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3819         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3820         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3821         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3822         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3823         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3824         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3825         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3826 #ifdef CONFIG_X86_64
3827         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3828         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3829         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3830         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3831         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3832         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3833         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3834         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3835 #endif
3836
3837         regs->rip = kvm_rip_read(vcpu);
3838         regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3839
3840         /*
3841          * Don't leak debug flags in case they were set for guest debugging
3842          */
3843         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3844                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3845
3846         vcpu_put(vcpu);
3847
3848         return 0;
3849 }
3850
3851 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3852 {
3853         vcpu_load(vcpu);
3854
3855         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3856         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3857         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3858         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3859         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3860         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3861         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3862         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3863 #ifdef CONFIG_X86_64
3864         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3865         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3866         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3867         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3868         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3869         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3870         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3871         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3872
3873 #endif
3874
3875         kvm_rip_write(vcpu, regs->rip);
3876         kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3877
3878
3879         vcpu->arch.exception.pending = false;
3880
3881         vcpu_put(vcpu);
3882
3883         return 0;
3884 }
3885
3886 void kvm_get_segment(struct kvm_vcpu *vcpu,
3887                      struct kvm_segment *var, int seg)
3888 {
3889         kvm_x86_ops->get_segment(vcpu, var, seg);
3890 }
3891
3892 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3893 {
3894         struct kvm_segment cs;
3895
3896         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3897         *db = cs.db;
3898         *l = cs.l;
3899 }
3900 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3901
3902 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3903                                   struct kvm_sregs *sregs)
3904 {
3905         struct descriptor_table dt;
3906
3907         vcpu_load(vcpu);
3908
3909         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3910         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3911         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3912         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3913         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3914         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3915
3916         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3917         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3918
3919         kvm_x86_ops->get_idt(vcpu, &dt);
3920         sregs->idt.limit = dt.limit;
3921         sregs->idt.base = dt.base;
3922         kvm_x86_ops->get_gdt(vcpu, &dt);
3923         sregs->gdt.limit = dt.limit;
3924         sregs->gdt.base = dt.base;
3925
3926         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3927         sregs->cr0 = vcpu->arch.cr0;
3928         sregs->cr2 = vcpu->arch.cr2;
3929         sregs->cr3 = vcpu->arch.cr3;
3930         sregs->cr4 = vcpu->arch.cr4;
3931         sregs->cr8 = kvm_get_cr8(vcpu);
3932         sregs->efer = vcpu->arch.shadow_efer;
3933         sregs->apic_base = kvm_get_apic_base(vcpu);
3934
3935         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3936
3937         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3938                 set_bit(vcpu->arch.interrupt.nr,
3939                         (unsigned long *)sregs->interrupt_bitmap);
3940
3941         vcpu_put(vcpu);
3942
3943         return 0;
3944 }
3945
3946 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3947                                     struct kvm_mp_state *mp_state)
3948 {
3949         vcpu_load(vcpu);
3950         mp_state->mp_state = vcpu->arch.mp_state;
3951         vcpu_put(vcpu);
3952         return 0;
3953 }
3954
3955 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3956                                     struct kvm_mp_state *mp_state)
3957 {
3958         vcpu_load(vcpu);
3959         vcpu->arch.mp_state = mp_state->mp_state;
3960         vcpu_put(vcpu);
3961         return 0;
3962 }
3963
3964 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3965                         struct kvm_segment *var, int seg)
3966 {
3967         kvm_x86_ops->set_segment(vcpu, var, seg);
3968 }
3969
3970 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3971                                    struct kvm_segment *kvm_desct)
3972 {
3973         kvm_desct->base = get_desc_base(seg_desc);
3974         kvm_desct->limit = get_desc_limit(seg_desc);
3975         if (seg_desc->g) {
3976                 kvm_desct->limit <<= 12;
3977                 kvm_desct->limit |= 0xfff;
3978         }
3979         kvm_desct->selector = selector;
3980         kvm_desct->type = seg_desc->type;
3981         kvm_desct->present = seg_desc->p;
3982         kvm_desct->dpl = seg_desc->dpl;
3983         kvm_desct->db = seg_desc->d;
3984         kvm_desct->s = seg_desc->s;
3985         kvm_desct->l = seg_desc->l;
3986         kvm_desct->g = seg_desc->g;
3987         kvm_desct->avl = seg_desc->avl;
3988         if (!selector)
3989                 kvm_desct->unusable = 1;
3990         else
3991                 kvm_desct->unusable = 0;
3992         kvm_desct->padding = 0;
3993 }
3994
3995 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3996                                           u16 selector,
3997                                           struct descriptor_table *dtable)
3998 {
3999         if (selector & 1 << 2) {
4000                 struct kvm_segment kvm_seg;
4001
4002                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4003
4004                 if (kvm_seg.unusable)
4005                         dtable->limit = 0;
4006                 else
4007                         dtable->limit = kvm_seg.limit;
4008                 dtable->base = kvm_seg.base;
4009         }
4010         else
4011                 kvm_x86_ops->get_gdt(vcpu, dtable);
4012 }
4013
4014 /* allowed just for 8 bytes segments */
4015 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4016                                          struct desc_struct *seg_desc)
4017 {
4018         struct descriptor_table dtable;
4019         u16 index = selector >> 3;
4020
4021         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4022
4023         if (dtable.limit < index * 8 + 7) {
4024                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4025                 return 1;
4026         }
4027         return kvm_read_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4028 }
4029
4030 /* allowed just for 8 bytes segments */
4031 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4032                                          struct desc_struct *seg_desc)
4033 {
4034         struct descriptor_table dtable;
4035         u16 index = selector >> 3;
4036
4037         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4038
4039         if (dtable.limit < index * 8 + 7)
4040                 return 1;
4041         return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4042 }
4043
4044 static gpa_t get_tss_base_addr(struct kvm_vcpu *vcpu,
4045                              struct desc_struct *seg_desc)
4046 {
4047         u32 base_addr = get_desc_base(seg_desc);
4048
4049         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4050 }
4051
4052 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4053 {
4054         struct kvm_segment kvm_seg;
4055
4056         kvm_get_segment(vcpu, &kvm_seg, seg);
4057         return kvm_seg.selector;
4058 }
4059
4060 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4061                                                 u16 selector,
4062                                                 struct kvm_segment *kvm_seg)
4063 {
4064         struct desc_struct seg_desc;
4065
4066         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4067                 return 1;
4068         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4069         return 0;
4070 }
4071
4072 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4073 {
4074         struct kvm_segment segvar = {
4075                 .base = selector << 4,
4076                 .limit = 0xffff,
4077                 .selector = selector,
4078                 .type = 3,
4079                 .present = 1,
4080                 .dpl = 3,
4081                 .db = 0,
4082                 .s = 1,
4083                 .l = 0,
4084                 .g = 0,
4085                 .avl = 0,
4086                 .unusable = 0,
4087         };
4088         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4089         return 0;
4090 }
4091
4092 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4093 {
4094         return (seg != VCPU_SREG_LDTR) &&
4095                 (seg != VCPU_SREG_TR) &&
4096                 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_VM);
4097 }
4098
4099 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4100                                 int type_bits, int seg)
4101 {
4102         struct kvm_segment kvm_seg;
4103
4104         if (is_vm86_segment(vcpu, seg) || !(vcpu->arch.cr0 & X86_CR0_PE))
4105                 return kvm_load_realmode_segment(vcpu, selector, seg);
4106         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4107                 return 1;
4108         kvm_seg.type |= type_bits;
4109
4110         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4111             seg != VCPU_SREG_LDTR)
4112                 if (!kvm_seg.s)
4113                         kvm_seg.unusable = 1;
4114
4115         kvm_set_segment(vcpu, &kvm_seg, seg);
4116         return 0;
4117 }
4118
4119 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4120                                 struct tss_segment_32 *tss)
4121 {
4122         tss->cr3 = vcpu->arch.cr3;
4123         tss->eip = kvm_rip_read(vcpu);
4124         tss->eflags = kvm_x86_ops->get_rflags(vcpu);
4125         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4126         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4127         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4128         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4129         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4130         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4131         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4132         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4133         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4134         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4135         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4136         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4137         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4138         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4139         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4140 }
4141
4142 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4143                                   struct tss_segment_32 *tss)
4144 {
4145         kvm_set_cr3(vcpu, tss->cr3);
4146
4147         kvm_rip_write(vcpu, tss->eip);
4148         kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
4149
4150         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4151         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4152         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4153         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4154         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4155         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4156         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4157         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4158
4159         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4160                 return 1;
4161
4162         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4163                 return 1;
4164
4165         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4166                 return 1;
4167
4168         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4169                 return 1;
4170
4171         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4172                 return 1;
4173
4174         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4175                 return 1;
4176
4177         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4178                 return 1;
4179         return 0;
4180 }
4181
4182 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4183                                 struct tss_segment_16 *tss)
4184 {
4185         tss->ip = kvm_rip_read(vcpu);
4186         tss->flag = kvm_x86_ops->get_rflags(vcpu);
4187         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4188         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4189         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4190         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4191         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4192         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4193         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4194         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4195
4196         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4197         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4198         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4199         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4200         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4201         tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
4202 }
4203
4204 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4205                                  struct tss_segment_16 *tss)
4206 {
4207         kvm_rip_write(vcpu, tss->ip);
4208         kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
4209         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4210         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4211         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4212         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4213         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4214         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4215         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4216         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4217
4218         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4219                 return 1;
4220
4221         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4222                 return 1;
4223
4224         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4225                 return 1;
4226
4227         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4228                 return 1;
4229
4230         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4231                 return 1;
4232         return 0;
4233 }
4234
4235 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4236                               u16 old_tss_sel, u32 old_tss_base,
4237                               struct desc_struct *nseg_desc)
4238 {
4239         struct tss_segment_16 tss_segment_16;
4240         int ret = 0;
4241
4242         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4243                            sizeof tss_segment_16))
4244                 goto out;
4245
4246         save_state_to_tss16(vcpu, &tss_segment_16);
4247
4248         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4249                             sizeof tss_segment_16))
4250                 goto out;
4251
4252         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4253                            &tss_segment_16, sizeof tss_segment_16))
4254                 goto out;
4255
4256         if (old_tss_sel != 0xffff) {
4257                 tss_segment_16.prev_task_link = old_tss_sel;
4258
4259                 if (kvm_write_guest(vcpu->kvm,
4260                                     get_tss_base_addr(vcpu, nseg_desc),
4261                                     &tss_segment_16.prev_task_link,
4262                                     sizeof tss_segment_16.prev_task_link))
4263                         goto out;
4264         }
4265
4266         if (load_state_from_tss16(vcpu, &tss_segment_16))
4267                 goto out;
4268
4269         ret = 1;
4270 out:
4271         return ret;
4272 }
4273
4274 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4275                        u16 old_tss_sel, u32 old_tss_base,
4276                        struct desc_struct *nseg_desc)
4277 {
4278         struct tss_segment_32 tss_segment_32;
4279         int ret = 0;
4280
4281         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4282                            sizeof tss_segment_32))
4283                 goto out;
4284
4285         save_state_to_tss32(vcpu, &tss_segment_32);
4286
4287         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4288                             sizeof tss_segment_32))
4289                 goto out;
4290
4291         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4292                            &tss_segment_32, sizeof tss_segment_32))
4293                 goto out;
4294
4295         if (old_tss_sel != 0xffff) {
4296                 tss_segment_32.prev_task_link = old_tss_sel;
4297
4298                 if (kvm_write_guest(vcpu->kvm,
4299                                     get_tss_base_addr(vcpu, nseg_desc),
4300                                     &tss_segment_32.prev_task_link,
4301                                     sizeof tss_segment_32.prev_task_link))
4302                         goto out;
4303         }
4304
4305         if (load_state_from_tss32(vcpu, &tss_segment_32))
4306                 goto out;
4307
4308         ret = 1;
4309 out:
4310         return ret;
4311 }
4312
4313 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4314 {
4315         struct kvm_segment tr_seg;
4316         struct desc_struct cseg_desc;
4317         struct desc_struct nseg_desc;
4318         int ret = 0;
4319         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4320         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4321
4322         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4323
4324         /* FIXME: Handle errors. Failure to read either TSS or their
4325          * descriptors should generate a pagefault.
4326          */
4327         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4328                 goto out;
4329
4330         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4331                 goto out;
4332
4333         if (reason != TASK_SWITCH_IRET) {
4334                 int cpl;
4335
4336                 cpl = kvm_x86_ops->get_cpl(vcpu);
4337                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4338                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4339                         return 1;
4340                 }
4341         }
4342
4343         if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
4344                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4345                 return 1;
4346         }
4347
4348         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4349                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4350                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4351         }
4352
4353         if (reason == TASK_SWITCH_IRET) {
4354                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4355                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4356         }
4357
4358         /* set back link to prev task only if NT bit is set in eflags
4359            note that old_tss_sel is not used afetr this point */
4360         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4361                 old_tss_sel = 0xffff;
4362
4363         /* set back link to prev task only if NT bit is set in eflags
4364            note that old_tss_sel is not used afetr this point */
4365         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4366                 old_tss_sel = 0xffff;
4367
4368         if (nseg_desc.type & 8)
4369                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4370                                          old_tss_base, &nseg_desc);
4371         else
4372                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4373                                          old_tss_base, &nseg_desc);
4374
4375         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4376                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4377                 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4378         }
4379
4380         if (reason != TASK_SWITCH_IRET) {
4381                 nseg_desc.type |= (1 << 1);
4382                 save_guest_segment_descriptor(vcpu, tss_selector,
4383                                               &nseg_desc);
4384         }
4385
4386         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4387         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4388         tr_seg.type = 11;
4389         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4390 out:
4391         return ret;
4392 }
4393 EXPORT_SYMBOL_GPL(kvm_task_switch);
4394
4395 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4396                                   struct kvm_sregs *sregs)
4397 {
4398         int mmu_reset_needed = 0;
4399         int pending_vec, max_bits;
4400         struct descriptor_table dt;
4401
4402         vcpu_load(vcpu);
4403
4404         dt.limit = sregs->idt.limit;
4405         dt.base = sregs->idt.base;
4406         kvm_x86_ops->set_idt(vcpu, &dt);
4407         dt.limit = sregs->gdt.limit;
4408         dt.base = sregs->gdt.base;
4409         kvm_x86_ops->set_gdt(vcpu, &dt);
4410
4411         vcpu->arch.cr2 = sregs->cr2;
4412         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4413         vcpu->arch.cr3 = sregs->cr3;
4414
4415         kvm_set_cr8(vcpu, sregs->cr8);
4416
4417         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4418         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4419         kvm_set_apic_base(vcpu, sregs->apic_base);
4420
4421         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4422
4423         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4424         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4425         vcpu->arch.cr0 = sregs->cr0;
4426
4427         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4428         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4429         if (!is_long_mode(vcpu) && is_pae(vcpu))
4430                 load_pdptrs(vcpu, vcpu->arch.cr3);
4431
4432         if (mmu_reset_needed)
4433                 kvm_mmu_reset_context(vcpu);
4434
4435         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4436         pending_vec = find_first_bit(
4437                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4438         if (pending_vec < max_bits) {
4439                 kvm_queue_interrupt(vcpu, pending_vec, false);
4440                 pr_debug("Set back pending irq %d\n", pending_vec);
4441                 if (irqchip_in_kernel(vcpu->kvm))
4442                         kvm_pic_clear_isr_ack(vcpu->kvm);
4443         }
4444
4445         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4446         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4447         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4448         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4449         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4450         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4451
4452         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4453         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4454
4455         update_cr8_intercept(vcpu);
4456
4457         /* Older userspace won't unhalt the vcpu on reset. */
4458         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4459             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4460             !(vcpu->arch.cr0 & X86_CR0_PE))
4461                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4462
4463         vcpu_put(vcpu);
4464
4465         return 0;
4466 }
4467
4468 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4469                                         struct kvm_guest_debug *dbg)
4470 {
4471         int i, r;
4472
4473         vcpu_load(vcpu);
4474
4475         if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4476             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4477                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4478                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4479                 vcpu->arch.switch_db_regs =
4480                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4481         } else {
4482                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4483                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4484                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4485         }
4486
4487         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4488
4489         if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4490                 kvm_queue_exception(vcpu, DB_VECTOR);
4491         else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4492                 kvm_queue_exception(vcpu, BP_VECTOR);
4493
4494         vcpu_put(vcpu);
4495
4496         return r;
4497 }
4498
4499 /*
4500  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4501  * we have asm/x86/processor.h
4502  */
4503 struct fxsave {
4504         u16     cwd;
4505         u16     swd;
4506         u16     twd;
4507         u16     fop;
4508         u64     rip;
4509         u64     rdp;
4510         u32     mxcsr;
4511         u32     mxcsr_mask;
4512         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4513 #ifdef CONFIG_X86_64
4514         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4515 #else
4516         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4517 #endif
4518 };
4519
4520 /*
4521  * Translate a guest virtual address to a guest physical address.
4522  */
4523 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4524                                     struct kvm_translation *tr)
4525 {
4526         unsigned long vaddr = tr->linear_address;
4527         gpa_t gpa;
4528
4529         vcpu_load(vcpu);
4530         down_read(&vcpu->kvm->slots_lock);
4531         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4532         up_read(&vcpu->kvm->slots_lock);
4533         tr->physical_address = gpa;
4534         tr->valid = gpa != UNMAPPED_GVA;
4535         tr->writeable = 1;
4536         tr->usermode = 0;
4537         vcpu_put(vcpu);
4538
4539         return 0;
4540 }
4541
4542 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4543 {
4544         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4545
4546         vcpu_load(vcpu);
4547
4548         memcpy(fpu->fpr, fxsave->st_space, 128);
4549         fpu->fcw = fxsave->cwd;
4550         fpu->fsw = fxsave->swd;
4551         fpu->ftwx = fxsave->twd;
4552         fpu->last_opcode = fxsave->fop;
4553         fpu->last_ip = fxsave->rip;
4554         fpu->last_dp = fxsave->rdp;
4555         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4556
4557         vcpu_put(vcpu);
4558
4559         return 0;
4560 }
4561
4562 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4563 {
4564         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4565
4566         vcpu_load(vcpu);
4567
4568         memcpy(fxsave->st_space, fpu->fpr, 128);
4569         fxsave->cwd = fpu->fcw;
4570         fxsave->swd = fpu->fsw;
4571         fxsave->twd = fpu->ftwx;
4572         fxsave->fop = fpu->last_opcode;
4573         fxsave->rip = fpu->last_ip;
4574         fxsave->rdp = fpu->last_dp;
4575         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4576
4577         vcpu_put(vcpu);
4578
4579         return 0;
4580 }
4581
4582 void fx_init(struct kvm_vcpu *vcpu)
4583 {
4584         unsigned after_mxcsr_mask;
4585
4586         /*
4587          * Touch the fpu the first time in non atomic context as if
4588          * this is the first fpu instruction the exception handler
4589          * will fire before the instruction returns and it'll have to
4590          * allocate ram with GFP_KERNEL.
4591          */
4592         if (!used_math())
4593                 kvm_fx_save(&vcpu->arch.host_fx_image);
4594
4595         /* Initialize guest FPU by resetting ours and saving into guest's */
4596         preempt_disable();
4597         kvm_fx_save(&vcpu->arch.host_fx_image);
4598         kvm_fx_finit();
4599         kvm_fx_save(&vcpu->arch.guest_fx_image);
4600         kvm_fx_restore(&vcpu->arch.host_fx_image);
4601         preempt_enable();
4602
4603         vcpu->arch.cr0 |= X86_CR0_ET;
4604         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4605         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4606         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4607                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4608 }
4609 EXPORT_SYMBOL_GPL(fx_init);
4610
4611 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4612 {
4613         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4614                 return;
4615
4616         vcpu->guest_fpu_loaded = 1;
4617         kvm_fx_save(&vcpu->arch.host_fx_image);
4618         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4619 }
4620 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4621
4622 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4623 {
4624         if (!vcpu->guest_fpu_loaded)
4625                 return;
4626
4627         vcpu->guest_fpu_loaded = 0;
4628         kvm_fx_save(&vcpu->arch.guest_fx_image);
4629         kvm_fx_restore(&vcpu->arch.host_fx_image);
4630         ++vcpu->stat.fpu_reload;
4631 }
4632 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4633
4634 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4635 {
4636         if (vcpu->arch.time_page) {
4637                 kvm_release_page_dirty(vcpu->arch.time_page);
4638                 vcpu->arch.time_page = NULL;
4639         }
4640
4641         kvm_x86_ops->vcpu_free(vcpu);
4642 }
4643
4644 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4645                                                 unsigned int id)
4646 {
4647         return kvm_x86_ops->vcpu_create(kvm, id);
4648 }
4649
4650 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4651 {
4652         int r;
4653
4654         /* We do fxsave: this must be aligned. */
4655         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4656
4657         vcpu->arch.mtrr_state.have_fixed = 1;
4658         vcpu_load(vcpu);
4659         r = kvm_arch_vcpu_reset(vcpu);
4660         if (r == 0)
4661                 r = kvm_mmu_setup(vcpu);
4662         vcpu_put(vcpu);
4663         if (r < 0)
4664                 goto free_vcpu;
4665
4666         return 0;
4667 free_vcpu:
4668         kvm_x86_ops->vcpu_free(vcpu);
4669         return r;
4670 }
4671
4672 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4673 {
4674         vcpu_load(vcpu);
4675         kvm_mmu_unload(vcpu);
4676         vcpu_put(vcpu);
4677
4678         kvm_x86_ops->vcpu_free(vcpu);
4679 }
4680
4681 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4682 {
4683         vcpu->arch.nmi_pending = false;
4684         vcpu->arch.nmi_injected = false;
4685
4686         vcpu->arch.switch_db_regs = 0;
4687         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4688         vcpu->arch.dr6 = DR6_FIXED_1;
4689         vcpu->arch.dr7 = DR7_FIXED_1;
4690
4691         return kvm_x86_ops->vcpu_reset(vcpu);
4692 }
4693
4694 void kvm_arch_hardware_enable(void *garbage)
4695 {
4696         kvm_x86_ops->hardware_enable(garbage);
4697 }
4698
4699 void kvm_arch_hardware_disable(void *garbage)
4700 {
4701         kvm_x86_ops->hardware_disable(garbage);
4702 }
4703
4704 int kvm_arch_hardware_setup(void)
4705 {
4706         return kvm_x86_ops->hardware_setup();
4707 }
4708
4709 void kvm_arch_hardware_unsetup(void)
4710 {
4711         kvm_x86_ops->hardware_unsetup();
4712 }
4713
4714 void kvm_arch_check_processor_compat(void *rtn)
4715 {
4716         kvm_x86_ops->check_processor_compatibility(rtn);
4717 }
4718
4719 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4720 {
4721         struct page *page;
4722         struct kvm *kvm;
4723         int r;
4724
4725         BUG_ON(vcpu->kvm == NULL);
4726         kvm = vcpu->kvm;
4727
4728         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4729         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4730                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4731         else
4732                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4733
4734         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4735         if (!page) {
4736                 r = -ENOMEM;
4737                 goto fail;
4738         }
4739         vcpu->arch.pio_data = page_address(page);
4740
4741         r = kvm_mmu_create(vcpu);
4742         if (r < 0)
4743                 goto fail_free_pio_data;
4744
4745         if (irqchip_in_kernel(kvm)) {
4746                 r = kvm_create_lapic(vcpu);
4747                 if (r < 0)
4748                         goto fail_mmu_destroy;
4749         }
4750
4751         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4752                                        GFP_KERNEL);
4753         if (!vcpu->arch.mce_banks) {
4754                 r = -ENOMEM;
4755                 goto fail_mmu_destroy;
4756         }
4757         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4758
4759         return 0;
4760
4761 fail_mmu_destroy:
4762         kvm_mmu_destroy(vcpu);
4763 fail_free_pio_data:
4764         free_page((unsigned long)vcpu->arch.pio_data);
4765 fail:
4766         return r;
4767 }
4768
4769 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4770 {
4771         kvm_free_lapic(vcpu);
4772         down_read(&vcpu->kvm->slots_lock);
4773         kvm_mmu_destroy(vcpu);
4774         up_read(&vcpu->kvm->slots_lock);
4775         free_page((unsigned long)vcpu->arch.pio_data);
4776 }
4777
4778 struct  kvm *kvm_arch_create_vm(void)
4779 {
4780         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4781
4782         if (!kvm)
4783                 return ERR_PTR(-ENOMEM);
4784
4785         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4786         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4787
4788         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4789         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4790
4791         rdtscll(kvm->arch.vm_init_tsc);
4792
4793         return kvm;
4794 }
4795
4796 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4797 {
4798         vcpu_load(vcpu);
4799         kvm_mmu_unload(vcpu);
4800         vcpu_put(vcpu);
4801 }
4802
4803 static void kvm_free_vcpus(struct kvm *kvm)
4804 {
4805         unsigned int i;
4806         struct kvm_vcpu *vcpu;
4807
4808         /*
4809          * Unpin any mmu pages first.
4810          */
4811         kvm_for_each_vcpu(i, vcpu, kvm)
4812                 kvm_unload_vcpu_mmu(vcpu);
4813         kvm_for_each_vcpu(i, vcpu, kvm)
4814                 kvm_arch_vcpu_free(vcpu);
4815
4816         mutex_lock(&kvm->lock);
4817         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4818                 kvm->vcpus[i] = NULL;
4819
4820         atomic_set(&kvm->online_vcpus, 0);
4821         mutex_unlock(&kvm->lock);
4822 }
4823
4824 void kvm_arch_sync_events(struct kvm *kvm)
4825 {
4826         kvm_free_all_assigned_devices(kvm);
4827 }
4828
4829 void kvm_arch_destroy_vm(struct kvm *kvm)
4830 {
4831         kvm_iommu_unmap_guest(kvm);
4832         kvm_free_pit(kvm);
4833         kfree(kvm->arch.vpic);
4834         kfree(kvm->arch.vioapic);
4835         kvm_free_vcpus(kvm);
4836         kvm_free_physmem(kvm);
4837         if (kvm->arch.apic_access_page)
4838                 put_page(kvm->arch.apic_access_page);
4839         if (kvm->arch.ept_identity_pagetable)
4840                 put_page(kvm->arch.ept_identity_pagetable);
4841         kfree(kvm);
4842 }
4843
4844 int kvm_arch_set_memory_region(struct kvm *kvm,
4845                                 struct kvm_userspace_memory_region *mem,
4846                                 struct kvm_memory_slot old,
4847                                 int user_alloc)
4848 {
4849         int npages = mem->memory_size >> PAGE_SHIFT;
4850         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4851
4852         /*To keep backward compatibility with older userspace,
4853          *x86 needs to hanlde !user_alloc case.
4854          */
4855         if (!user_alloc) {
4856                 if (npages && !old.rmap) {
4857                         unsigned long userspace_addr;
4858
4859                         down_write(&current->mm->mmap_sem);
4860                         userspace_addr = do_mmap(NULL, 0,
4861                                                  npages * PAGE_SIZE,
4862                                                  PROT_READ | PROT_WRITE,
4863                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4864                                                  0);
4865                         up_write(&current->mm->mmap_sem);
4866
4867                         if (IS_ERR((void *)userspace_addr))
4868                                 return PTR_ERR((void *)userspace_addr);
4869
4870                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4871                         spin_lock(&kvm->mmu_lock);
4872                         memslot->userspace_addr = userspace_addr;
4873                         spin_unlock(&kvm->mmu_lock);
4874                 } else {
4875                         if (!old.user_alloc && old.rmap) {
4876                                 int ret;
4877
4878                                 down_write(&current->mm->mmap_sem);
4879                                 ret = do_munmap(current->mm, old.userspace_addr,
4880                                                 old.npages * PAGE_SIZE);
4881                                 up_write(&current->mm->mmap_sem);
4882                                 if (ret < 0)
4883                                         printk(KERN_WARNING
4884                                        "kvm_vm_ioctl_set_memory_region: "
4885                                        "failed to munmap memory\n");
4886                         }
4887                 }
4888         }
4889
4890         spin_lock(&kvm->mmu_lock);
4891         if (!kvm->arch.n_requested_mmu_pages) {
4892                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4893                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4894         }
4895
4896         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4897         spin_unlock(&kvm->mmu_lock);
4898
4899         return 0;
4900 }
4901
4902 void kvm_arch_flush_shadow(struct kvm *kvm)
4903 {
4904         kvm_mmu_zap_all(kvm);
4905         kvm_reload_remote_mmus(kvm);
4906 }
4907
4908 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4909 {
4910         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4911                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4912                 || vcpu->arch.nmi_pending ||
4913                 (kvm_arch_interrupt_allowed(vcpu) &&
4914                  kvm_cpu_has_interrupt(vcpu));
4915 }
4916
4917 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4918 {
4919         int me;
4920         int cpu = vcpu->cpu;
4921
4922         if (waitqueue_active(&vcpu->wq)) {
4923                 wake_up_interruptible(&vcpu->wq);
4924                 ++vcpu->stat.halt_wakeup;
4925         }
4926
4927         me = get_cpu();
4928         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4929                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4930                         smp_send_reschedule(cpu);
4931         put_cpu();
4932 }
4933
4934 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4935 {
4936         return kvm_x86_ops->interrupt_allowed(vcpu);
4937 }
4938
4939 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4940 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4941 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4942 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4943 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);