2214384ff610fe03be80d234e3b443a18fce4557
[linux-2.6.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  *
10  * Authors:
11  *   Avi Kivity   <avi@qumranet.com>
12  *   Yaniv Kamay  <yaniv@qumranet.com>
13  *   Amit Shah    <amit.shah@qumranet.com>
14  *   Ben-Ami Yassour <benami@il.ibm.com>
15  *
16  * This work is licensed under the terms of the GNU GPL, version 2.  See
17  * the COPYING file in the top-level directory.
18  *
19  */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <trace/events/kvm.h>
41 #undef TRACE_INCLUDE_FILE
42 #define CREATE_TRACE_POINTS
43 #include "trace.h"
44
45 #include <asm/uaccess.h>
46 #include <asm/msr.h>
47 #include <asm/desc.h>
48 #include <asm/mtrr.h>
49 #include <asm/mce.h>
50
51 #define MAX_IO_MSRS 256
52 #define CR0_RESERVED_BITS                                               \
53         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
54                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
55                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
56 #define CR4_RESERVED_BITS                                               \
57         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
58                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
59                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
60                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
61
62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
63
64 #define KVM_MAX_MCE_BANKS 32
65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
66
67 /* EFER defaults:
68  * - enable syscall per default because its emulated by KVM
69  * - enable LME and LMA per default on 64 bit KVM
70  */
71 #ifdef CONFIG_X86_64
72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
73 #else
74 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
75 #endif
76
77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
79
80 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
81                                     struct kvm_cpuid_entry2 __user *entries);
82
83 struct kvm_x86_ops *kvm_x86_ops;
84 EXPORT_SYMBOL_GPL(kvm_x86_ops);
85
86 int ignore_msrs = 0;
87 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
88
89 struct kvm_stats_debugfs_item debugfs_entries[] = {
90         { "pf_fixed", VCPU_STAT(pf_fixed) },
91         { "pf_guest", VCPU_STAT(pf_guest) },
92         { "tlb_flush", VCPU_STAT(tlb_flush) },
93         { "invlpg", VCPU_STAT(invlpg) },
94         { "exits", VCPU_STAT(exits) },
95         { "io_exits", VCPU_STAT(io_exits) },
96         { "mmio_exits", VCPU_STAT(mmio_exits) },
97         { "signal_exits", VCPU_STAT(signal_exits) },
98         { "irq_window", VCPU_STAT(irq_window_exits) },
99         { "nmi_window", VCPU_STAT(nmi_window_exits) },
100         { "halt_exits", VCPU_STAT(halt_exits) },
101         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
102         { "hypercalls", VCPU_STAT(hypercalls) },
103         { "request_irq", VCPU_STAT(request_irq_exits) },
104         { "irq_exits", VCPU_STAT(irq_exits) },
105         { "host_state_reload", VCPU_STAT(host_state_reload) },
106         { "efer_reload", VCPU_STAT(efer_reload) },
107         { "fpu_reload", VCPU_STAT(fpu_reload) },
108         { "insn_emulation", VCPU_STAT(insn_emulation) },
109         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
110         { "irq_injections", VCPU_STAT(irq_injections) },
111         { "nmi_injections", VCPU_STAT(nmi_injections) },
112         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
113         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
114         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
115         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
116         { "mmu_flooded", VM_STAT(mmu_flooded) },
117         { "mmu_recycled", VM_STAT(mmu_recycled) },
118         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
119         { "mmu_unsync", VM_STAT(mmu_unsync) },
120         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
121         { "largepages", VM_STAT(lpages) },
122         { NULL }
123 };
124
125 unsigned long segment_base(u16 selector)
126 {
127         struct descriptor_table gdt;
128         struct desc_struct *d;
129         unsigned long table_base;
130         unsigned long v;
131
132         if (selector == 0)
133                 return 0;
134
135         asm("sgdt %0" : "=m"(gdt));
136         table_base = gdt.base;
137
138         if (selector & 4) {           /* from ldt */
139                 u16 ldt_selector;
140
141                 asm("sldt %0" : "=g"(ldt_selector));
142                 table_base = segment_base(ldt_selector);
143         }
144         d = (struct desc_struct *)(table_base + (selector & ~7));
145         v = d->base0 | ((unsigned long)d->base1 << 16) |
146                 ((unsigned long)d->base2 << 24);
147 #ifdef CONFIG_X86_64
148         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
149                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
150 #endif
151         return v;
152 }
153 EXPORT_SYMBOL_GPL(segment_base);
154
155 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
156 {
157         if (irqchip_in_kernel(vcpu->kvm))
158                 return vcpu->arch.apic_base;
159         else
160                 return vcpu->arch.apic_base;
161 }
162 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
163
164 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
165 {
166         /* TODO: reserve bits check */
167         if (irqchip_in_kernel(vcpu->kvm))
168                 kvm_lapic_set_base(vcpu, data);
169         else
170                 vcpu->arch.apic_base = data;
171 }
172 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
173
174 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
175 {
176         WARN_ON(vcpu->arch.exception.pending);
177         vcpu->arch.exception.pending = true;
178         vcpu->arch.exception.has_error_code = false;
179         vcpu->arch.exception.nr = nr;
180 }
181 EXPORT_SYMBOL_GPL(kvm_queue_exception);
182
183 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
184                            u32 error_code)
185 {
186         ++vcpu->stat.pf_guest;
187
188         if (vcpu->arch.exception.pending) {
189                 switch(vcpu->arch.exception.nr) {
190                 case DF_VECTOR:
191                         /* triple fault -> shutdown */
192                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
193                         return;
194                 case PF_VECTOR:
195                         vcpu->arch.exception.nr = DF_VECTOR;
196                         vcpu->arch.exception.error_code = 0;
197                         return;
198                 default:
199                         /* replace previous exception with a new one in a hope
200                            that instruction re-execution will regenerate lost
201                            exception */
202                         vcpu->arch.exception.pending = false;
203                         break;
204                 }
205         }
206         vcpu->arch.cr2 = addr;
207         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
208 }
209
210 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
211 {
212         vcpu->arch.nmi_pending = 1;
213 }
214 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
215
216 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
217 {
218         WARN_ON(vcpu->arch.exception.pending);
219         vcpu->arch.exception.pending = true;
220         vcpu->arch.exception.has_error_code = true;
221         vcpu->arch.exception.nr = nr;
222         vcpu->arch.exception.error_code = error_code;
223 }
224 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
225
226 static void __queue_exception(struct kvm_vcpu *vcpu)
227 {
228         kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
229                                      vcpu->arch.exception.has_error_code,
230                                      vcpu->arch.exception.error_code);
231 }
232
233 /*
234  * Load the pae pdptrs.  Return true is they are all valid.
235  */
236 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
237 {
238         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
239         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
240         int i;
241         int ret;
242         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
243
244         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
245                                   offset * sizeof(u64), sizeof(pdpte));
246         if (ret < 0) {
247                 ret = 0;
248                 goto out;
249         }
250         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
251                 if (is_present_gpte(pdpte[i]) &&
252                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
253                         ret = 0;
254                         goto out;
255                 }
256         }
257         ret = 1;
258
259         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
260         __set_bit(VCPU_EXREG_PDPTR,
261                   (unsigned long *)&vcpu->arch.regs_avail);
262         __set_bit(VCPU_EXREG_PDPTR,
263                   (unsigned long *)&vcpu->arch.regs_dirty);
264 out:
265
266         return ret;
267 }
268 EXPORT_SYMBOL_GPL(load_pdptrs);
269
270 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
271 {
272         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
273         bool changed = true;
274         int r;
275
276         if (is_long_mode(vcpu) || !is_pae(vcpu))
277                 return false;
278
279         if (!test_bit(VCPU_EXREG_PDPTR,
280                       (unsigned long *)&vcpu->arch.regs_avail))
281                 return true;
282
283         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
284         if (r < 0)
285                 goto out;
286         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
287 out:
288
289         return changed;
290 }
291
292 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
293 {
294         if (cr0 & CR0_RESERVED_BITS) {
295                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
296                        cr0, vcpu->arch.cr0);
297                 kvm_inject_gp(vcpu, 0);
298                 return;
299         }
300
301         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
302                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
303                 kvm_inject_gp(vcpu, 0);
304                 return;
305         }
306
307         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
308                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
309                        "and a clear PE flag\n");
310                 kvm_inject_gp(vcpu, 0);
311                 return;
312         }
313
314         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
315 #ifdef CONFIG_X86_64
316                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
317                         int cs_db, cs_l;
318
319                         if (!is_pae(vcpu)) {
320                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
321                                        "in long mode while PAE is disabled\n");
322                                 kvm_inject_gp(vcpu, 0);
323                                 return;
324                         }
325                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
326                         if (cs_l) {
327                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
328                                        "in long mode while CS.L == 1\n");
329                                 kvm_inject_gp(vcpu, 0);
330                                 return;
331
332                         }
333                 } else
334 #endif
335                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
336                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
337                                "reserved bits\n");
338                         kvm_inject_gp(vcpu, 0);
339                         return;
340                 }
341
342         }
343
344         kvm_x86_ops->set_cr0(vcpu, cr0);
345         vcpu->arch.cr0 = cr0;
346
347         kvm_mmu_reset_context(vcpu);
348         return;
349 }
350 EXPORT_SYMBOL_GPL(kvm_set_cr0);
351
352 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
353 {
354         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
355 }
356 EXPORT_SYMBOL_GPL(kvm_lmsw);
357
358 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
359 {
360         unsigned long old_cr4 = vcpu->arch.cr4;
361         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
362
363         if (cr4 & CR4_RESERVED_BITS) {
364                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
365                 kvm_inject_gp(vcpu, 0);
366                 return;
367         }
368
369         if (is_long_mode(vcpu)) {
370                 if (!(cr4 & X86_CR4_PAE)) {
371                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
372                                "in long mode\n");
373                         kvm_inject_gp(vcpu, 0);
374                         return;
375                 }
376         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
377                    && ((cr4 ^ old_cr4) & pdptr_bits)
378                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
379                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
380                 kvm_inject_gp(vcpu, 0);
381                 return;
382         }
383
384         if (cr4 & X86_CR4_VMXE) {
385                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
386                 kvm_inject_gp(vcpu, 0);
387                 return;
388         }
389         kvm_x86_ops->set_cr4(vcpu, cr4);
390         vcpu->arch.cr4 = cr4;
391         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
392         kvm_mmu_reset_context(vcpu);
393 }
394 EXPORT_SYMBOL_GPL(kvm_set_cr4);
395
396 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
397 {
398         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
399                 kvm_mmu_sync_roots(vcpu);
400                 kvm_mmu_flush_tlb(vcpu);
401                 return;
402         }
403
404         if (is_long_mode(vcpu)) {
405                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
406                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
407                         kvm_inject_gp(vcpu, 0);
408                         return;
409                 }
410         } else {
411                 if (is_pae(vcpu)) {
412                         if (cr3 & CR3_PAE_RESERVED_BITS) {
413                                 printk(KERN_DEBUG
414                                        "set_cr3: #GP, reserved bits\n");
415                                 kvm_inject_gp(vcpu, 0);
416                                 return;
417                         }
418                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
419                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
420                                        "reserved bits\n");
421                                 kvm_inject_gp(vcpu, 0);
422                                 return;
423                         }
424                 }
425                 /*
426                  * We don't check reserved bits in nonpae mode, because
427                  * this isn't enforced, and VMware depends on this.
428                  */
429         }
430
431         /*
432          * Does the new cr3 value map to physical memory? (Note, we
433          * catch an invalid cr3 even in real-mode, because it would
434          * cause trouble later on when we turn on paging anyway.)
435          *
436          * A real CPU would silently accept an invalid cr3 and would
437          * attempt to use it - with largely undefined (and often hard
438          * to debug) behavior on the guest side.
439          */
440         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
441                 kvm_inject_gp(vcpu, 0);
442         else {
443                 vcpu->arch.cr3 = cr3;
444                 vcpu->arch.mmu.new_cr3(vcpu);
445         }
446 }
447 EXPORT_SYMBOL_GPL(kvm_set_cr3);
448
449 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
450 {
451         if (cr8 & CR8_RESERVED_BITS) {
452                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
453                 kvm_inject_gp(vcpu, 0);
454                 return;
455         }
456         if (irqchip_in_kernel(vcpu->kvm))
457                 kvm_lapic_set_tpr(vcpu, cr8);
458         else
459                 vcpu->arch.cr8 = cr8;
460 }
461 EXPORT_SYMBOL_GPL(kvm_set_cr8);
462
463 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
464 {
465         if (irqchip_in_kernel(vcpu->kvm))
466                 return kvm_lapic_get_cr8(vcpu);
467         else
468                 return vcpu->arch.cr8;
469 }
470 EXPORT_SYMBOL_GPL(kvm_get_cr8);
471
472 static inline u32 bit(int bitno)
473 {
474         return 1 << (bitno & 31);
475 }
476
477 /*
478  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
479  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
480  *
481  * This list is modified at module load time to reflect the
482  * capabilities of the host cpu.
483  */
484 static u32 msrs_to_save[] = {
485         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
486         MSR_K6_STAR,
487 #ifdef CONFIG_X86_64
488         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
489 #endif
490         MSR_IA32_TSC, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
491         MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
492 };
493
494 static unsigned num_msrs_to_save;
495
496 static u32 emulated_msrs[] = {
497         MSR_IA32_MISC_ENABLE,
498 };
499
500 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
501 {
502         if (efer & efer_reserved_bits) {
503                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
504                        efer);
505                 kvm_inject_gp(vcpu, 0);
506                 return;
507         }
508
509         if (is_paging(vcpu)
510             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
511                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
512                 kvm_inject_gp(vcpu, 0);
513                 return;
514         }
515
516         if (efer & EFER_FFXSR) {
517                 struct kvm_cpuid_entry2 *feat;
518
519                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
520                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
521                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
522                         kvm_inject_gp(vcpu, 0);
523                         return;
524                 }
525         }
526
527         if (efer & EFER_SVME) {
528                 struct kvm_cpuid_entry2 *feat;
529
530                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
531                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
532                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
533                         kvm_inject_gp(vcpu, 0);
534                         return;
535                 }
536         }
537
538         kvm_x86_ops->set_efer(vcpu, efer);
539
540         efer &= ~EFER_LMA;
541         efer |= vcpu->arch.shadow_efer & EFER_LMA;
542
543         vcpu->arch.shadow_efer = efer;
544
545         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
546         kvm_mmu_reset_context(vcpu);
547 }
548
549 void kvm_enable_efer_bits(u64 mask)
550 {
551        efer_reserved_bits &= ~mask;
552 }
553 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
554
555
556 /*
557  * Writes msr value into into the appropriate "register".
558  * Returns 0 on success, non-0 otherwise.
559  * Assumes vcpu_load() was already called.
560  */
561 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
562 {
563         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
564 }
565
566 /*
567  * Adapt set_msr() to msr_io()'s calling convention
568  */
569 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
570 {
571         return kvm_set_msr(vcpu, index, *data);
572 }
573
574 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
575 {
576         static int version;
577         struct pvclock_wall_clock wc;
578         struct timespec now, sys, boot;
579
580         if (!wall_clock)
581                 return;
582
583         version++;
584
585         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
586
587         /*
588          * The guest calculates current wall clock time by adding
589          * system time (updated by kvm_write_guest_time below) to the
590          * wall clock specified here.  guest system time equals host
591          * system time for us, thus we must fill in host boot time here.
592          */
593         now = current_kernel_time();
594         ktime_get_ts(&sys);
595         boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
596
597         wc.sec = boot.tv_sec;
598         wc.nsec = boot.tv_nsec;
599         wc.version = version;
600
601         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
602
603         version++;
604         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
605 }
606
607 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
608 {
609         uint32_t quotient, remainder;
610
611         /* Don't try to replace with do_div(), this one calculates
612          * "(dividend << 32) / divisor" */
613         __asm__ ( "divl %4"
614                   : "=a" (quotient), "=d" (remainder)
615                   : "0" (0), "1" (dividend), "r" (divisor) );
616         return quotient;
617 }
618
619 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
620 {
621         uint64_t nsecs = 1000000000LL;
622         int32_t  shift = 0;
623         uint64_t tps64;
624         uint32_t tps32;
625
626         tps64 = tsc_khz * 1000LL;
627         while (tps64 > nsecs*2) {
628                 tps64 >>= 1;
629                 shift--;
630         }
631
632         tps32 = (uint32_t)tps64;
633         while (tps32 <= (uint32_t)nsecs) {
634                 tps32 <<= 1;
635                 shift++;
636         }
637
638         hv_clock->tsc_shift = shift;
639         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
640
641         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
642                  __func__, tsc_khz, hv_clock->tsc_shift,
643                  hv_clock->tsc_to_system_mul);
644 }
645
646 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
647
648 static void kvm_write_guest_time(struct kvm_vcpu *v)
649 {
650         struct timespec ts;
651         unsigned long flags;
652         struct kvm_vcpu_arch *vcpu = &v->arch;
653         void *shared_kaddr;
654         unsigned long this_tsc_khz;
655
656         if ((!vcpu->time_page))
657                 return;
658
659         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
660         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
661                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
662                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
663         }
664         put_cpu_var(cpu_tsc_khz);
665
666         /* Keep irq disabled to prevent changes to the clock */
667         local_irq_save(flags);
668         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
669         ktime_get_ts(&ts);
670         local_irq_restore(flags);
671
672         /* With all the info we got, fill in the values */
673
674         vcpu->hv_clock.system_time = ts.tv_nsec +
675                                      (NSEC_PER_SEC * (u64)ts.tv_sec);
676         /*
677          * The interface expects us to write an even number signaling that the
678          * update is finished. Since the guest won't see the intermediate
679          * state, we just increase by 2 at the end.
680          */
681         vcpu->hv_clock.version += 2;
682
683         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
684
685         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
686                sizeof(vcpu->hv_clock));
687
688         kunmap_atomic(shared_kaddr, KM_USER0);
689
690         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
691 }
692
693 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
694 {
695         struct kvm_vcpu_arch *vcpu = &v->arch;
696
697         if (!vcpu->time_page)
698                 return 0;
699         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
700         return 1;
701 }
702
703 static bool msr_mtrr_valid(unsigned msr)
704 {
705         switch (msr) {
706         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
707         case MSR_MTRRfix64K_00000:
708         case MSR_MTRRfix16K_80000:
709         case MSR_MTRRfix16K_A0000:
710         case MSR_MTRRfix4K_C0000:
711         case MSR_MTRRfix4K_C8000:
712         case MSR_MTRRfix4K_D0000:
713         case MSR_MTRRfix4K_D8000:
714         case MSR_MTRRfix4K_E0000:
715         case MSR_MTRRfix4K_E8000:
716         case MSR_MTRRfix4K_F0000:
717         case MSR_MTRRfix4K_F8000:
718         case MSR_MTRRdefType:
719         case MSR_IA32_CR_PAT:
720                 return true;
721         case 0x2f8:
722                 return true;
723         }
724         return false;
725 }
726
727 static bool valid_pat_type(unsigned t)
728 {
729         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
730 }
731
732 static bool valid_mtrr_type(unsigned t)
733 {
734         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
735 }
736
737 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
738 {
739         int i;
740
741         if (!msr_mtrr_valid(msr))
742                 return false;
743
744         if (msr == MSR_IA32_CR_PAT) {
745                 for (i = 0; i < 8; i++)
746                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
747                                 return false;
748                 return true;
749         } else if (msr == MSR_MTRRdefType) {
750                 if (data & ~0xcff)
751                         return false;
752                 return valid_mtrr_type(data & 0xff);
753         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
754                 for (i = 0; i < 8 ; i++)
755                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
756                                 return false;
757                 return true;
758         }
759
760         /* variable MTRRs */
761         return valid_mtrr_type(data & 0xff);
762 }
763
764 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
765 {
766         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
767
768         if (!mtrr_valid(vcpu, msr, data))
769                 return 1;
770
771         if (msr == MSR_MTRRdefType) {
772                 vcpu->arch.mtrr_state.def_type = data;
773                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
774         } else if (msr == MSR_MTRRfix64K_00000)
775                 p[0] = data;
776         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
777                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
778         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
779                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
780         else if (msr == MSR_IA32_CR_PAT)
781                 vcpu->arch.pat = data;
782         else {  /* Variable MTRRs */
783                 int idx, is_mtrr_mask;
784                 u64 *pt;
785
786                 idx = (msr - 0x200) / 2;
787                 is_mtrr_mask = msr - 0x200 - 2 * idx;
788                 if (!is_mtrr_mask)
789                         pt =
790                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
791                 else
792                         pt =
793                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
794                 *pt = data;
795         }
796
797         kvm_mmu_reset_context(vcpu);
798         return 0;
799 }
800
801 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
802 {
803         u64 mcg_cap = vcpu->arch.mcg_cap;
804         unsigned bank_num = mcg_cap & 0xff;
805
806         switch (msr) {
807         case MSR_IA32_MCG_STATUS:
808                 vcpu->arch.mcg_status = data;
809                 break;
810         case MSR_IA32_MCG_CTL:
811                 if (!(mcg_cap & MCG_CTL_P))
812                         return 1;
813                 if (data != 0 && data != ~(u64)0)
814                         return -1;
815                 vcpu->arch.mcg_ctl = data;
816                 break;
817         default:
818                 if (msr >= MSR_IA32_MC0_CTL &&
819                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
820                         u32 offset = msr - MSR_IA32_MC0_CTL;
821                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
822                         if ((offset & 0x3) == 0 &&
823                             data != 0 && data != ~(u64)0)
824                                 return -1;
825                         vcpu->arch.mce_banks[offset] = data;
826                         break;
827                 }
828                 return 1;
829         }
830         return 0;
831 }
832
833 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
834 {
835         switch (msr) {
836         case MSR_EFER:
837                 set_efer(vcpu, data);
838                 break;
839         case MSR_K7_HWCR:
840                 data &= ~(u64)0x40;     /* ignore flush filter disable */
841                 if (data != 0) {
842                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
843                                 data);
844                         return 1;
845                 }
846                 break;
847         case MSR_FAM10H_MMIO_CONF_BASE:
848                 if (data != 0) {
849                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
850                                 "0x%llx\n", data);
851                         return 1;
852                 }
853                 break;
854         case MSR_AMD64_NB_CFG:
855                 break;
856         case MSR_IA32_DEBUGCTLMSR:
857                 if (!data) {
858                         /* We support the non-activated case already */
859                         break;
860                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
861                         /* Values other than LBR and BTF are vendor-specific,
862                            thus reserved and should throw a #GP */
863                         return 1;
864                 }
865                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
866                         __func__, data);
867                 break;
868         case MSR_IA32_UCODE_REV:
869         case MSR_IA32_UCODE_WRITE:
870         case MSR_VM_HSAVE_PA:
871         case MSR_AMD64_PATCH_LOADER:
872                 break;
873         case 0x200 ... 0x2ff:
874                 return set_msr_mtrr(vcpu, msr, data);
875         case MSR_IA32_APICBASE:
876                 kvm_set_apic_base(vcpu, data);
877                 break;
878         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
879                 return kvm_x2apic_msr_write(vcpu, msr, data);
880         case MSR_IA32_MISC_ENABLE:
881                 vcpu->arch.ia32_misc_enable_msr = data;
882                 break;
883         case MSR_KVM_WALL_CLOCK:
884                 vcpu->kvm->arch.wall_clock = data;
885                 kvm_write_wall_clock(vcpu->kvm, data);
886                 break;
887         case MSR_KVM_SYSTEM_TIME: {
888                 if (vcpu->arch.time_page) {
889                         kvm_release_page_dirty(vcpu->arch.time_page);
890                         vcpu->arch.time_page = NULL;
891                 }
892
893                 vcpu->arch.time = data;
894
895                 /* we verify if the enable bit is set... */
896                 if (!(data & 1))
897                         break;
898
899                 /* ...but clean it before doing the actual write */
900                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
901
902                 vcpu->arch.time_page =
903                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
904
905                 if (is_error_page(vcpu->arch.time_page)) {
906                         kvm_release_page_clean(vcpu->arch.time_page);
907                         vcpu->arch.time_page = NULL;
908                 }
909
910                 kvm_request_guest_time_update(vcpu);
911                 break;
912         }
913         case MSR_IA32_MCG_CTL:
914         case MSR_IA32_MCG_STATUS:
915         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
916                 return set_msr_mce(vcpu, msr, data);
917
918         /* Performance counters are not protected by a CPUID bit,
919          * so we should check all of them in the generic path for the sake of
920          * cross vendor migration.
921          * Writing a zero into the event select MSRs disables them,
922          * which we perfectly emulate ;-). Any other value should be at least
923          * reported, some guests depend on them.
924          */
925         case MSR_P6_EVNTSEL0:
926         case MSR_P6_EVNTSEL1:
927         case MSR_K7_EVNTSEL0:
928         case MSR_K7_EVNTSEL1:
929         case MSR_K7_EVNTSEL2:
930         case MSR_K7_EVNTSEL3:
931                 if (data != 0)
932                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
933                                 "0x%x data 0x%llx\n", msr, data);
934                 break;
935         /* at least RHEL 4 unconditionally writes to the perfctr registers,
936          * so we ignore writes to make it happy.
937          */
938         case MSR_P6_PERFCTR0:
939         case MSR_P6_PERFCTR1:
940         case MSR_K7_PERFCTR0:
941         case MSR_K7_PERFCTR1:
942         case MSR_K7_PERFCTR2:
943         case MSR_K7_PERFCTR3:
944                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
945                         "0x%x data 0x%llx\n", msr, data);
946                 break;
947         default:
948                 if (!ignore_msrs) {
949                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
950                                 msr, data);
951                         return 1;
952                 } else {
953                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
954                                 msr, data);
955                         break;
956                 }
957         }
958         return 0;
959 }
960 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
961
962
963 /*
964  * Reads an msr value (of 'msr_index') into 'pdata'.
965  * Returns 0 on success, non-0 otherwise.
966  * Assumes vcpu_load() was already called.
967  */
968 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
969 {
970         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
971 }
972
973 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
974 {
975         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
976
977         if (!msr_mtrr_valid(msr))
978                 return 1;
979
980         if (msr == MSR_MTRRdefType)
981                 *pdata = vcpu->arch.mtrr_state.def_type +
982                          (vcpu->arch.mtrr_state.enabled << 10);
983         else if (msr == MSR_MTRRfix64K_00000)
984                 *pdata = p[0];
985         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
986                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
987         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
988                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
989         else if (msr == MSR_IA32_CR_PAT)
990                 *pdata = vcpu->arch.pat;
991         else {  /* Variable MTRRs */
992                 int idx, is_mtrr_mask;
993                 u64 *pt;
994
995                 idx = (msr - 0x200) / 2;
996                 is_mtrr_mask = msr - 0x200 - 2 * idx;
997                 if (!is_mtrr_mask)
998                         pt =
999                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1000                 else
1001                         pt =
1002                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1003                 *pdata = *pt;
1004         }
1005
1006         return 0;
1007 }
1008
1009 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1010 {
1011         u64 data;
1012         u64 mcg_cap = vcpu->arch.mcg_cap;
1013         unsigned bank_num = mcg_cap & 0xff;
1014
1015         switch (msr) {
1016         case MSR_IA32_P5_MC_ADDR:
1017         case MSR_IA32_P5_MC_TYPE:
1018                 data = 0;
1019                 break;
1020         case MSR_IA32_MCG_CAP:
1021                 data = vcpu->arch.mcg_cap;
1022                 break;
1023         case MSR_IA32_MCG_CTL:
1024                 if (!(mcg_cap & MCG_CTL_P))
1025                         return 1;
1026                 data = vcpu->arch.mcg_ctl;
1027                 break;
1028         case MSR_IA32_MCG_STATUS:
1029                 data = vcpu->arch.mcg_status;
1030                 break;
1031         default:
1032                 if (msr >= MSR_IA32_MC0_CTL &&
1033                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1034                         u32 offset = msr - MSR_IA32_MC0_CTL;
1035                         data = vcpu->arch.mce_banks[offset];
1036                         break;
1037                 }
1038                 return 1;
1039         }
1040         *pdata = data;
1041         return 0;
1042 }
1043
1044 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1045 {
1046         u64 data;
1047
1048         switch (msr) {
1049         case MSR_IA32_PLATFORM_ID:
1050         case MSR_IA32_UCODE_REV:
1051         case MSR_IA32_EBL_CR_POWERON:
1052         case MSR_IA32_DEBUGCTLMSR:
1053         case MSR_IA32_LASTBRANCHFROMIP:
1054         case MSR_IA32_LASTBRANCHTOIP:
1055         case MSR_IA32_LASTINTFROMIP:
1056         case MSR_IA32_LASTINTTOIP:
1057         case MSR_K8_SYSCFG:
1058         case MSR_K7_HWCR:
1059         case MSR_VM_HSAVE_PA:
1060         case MSR_P6_EVNTSEL0:
1061         case MSR_P6_EVNTSEL1:
1062         case MSR_K7_EVNTSEL0:
1063         case MSR_K8_INT_PENDING_MSG:
1064         case MSR_AMD64_NB_CFG:
1065         case MSR_FAM10H_MMIO_CONF_BASE:
1066                 data = 0;
1067                 break;
1068         case MSR_MTRRcap:
1069                 data = 0x500 | KVM_NR_VAR_MTRR;
1070                 break;
1071         case 0x200 ... 0x2ff:
1072                 return get_msr_mtrr(vcpu, msr, pdata);
1073         case 0xcd: /* fsb frequency */
1074                 data = 3;
1075                 break;
1076         case MSR_IA32_APICBASE:
1077                 data = kvm_get_apic_base(vcpu);
1078                 break;
1079         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1080                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1081                 break;
1082         case MSR_IA32_MISC_ENABLE:
1083                 data = vcpu->arch.ia32_misc_enable_msr;
1084                 break;
1085         case MSR_IA32_PERF_STATUS:
1086                 /* TSC increment by tick */
1087                 data = 1000ULL;
1088                 /* CPU multiplier */
1089                 data |= (((uint64_t)4ULL) << 40);
1090                 break;
1091         case MSR_EFER:
1092                 data = vcpu->arch.shadow_efer;
1093                 break;
1094         case MSR_KVM_WALL_CLOCK:
1095                 data = vcpu->kvm->arch.wall_clock;
1096                 break;
1097         case MSR_KVM_SYSTEM_TIME:
1098                 data = vcpu->arch.time;
1099                 break;
1100         case MSR_IA32_P5_MC_ADDR:
1101         case MSR_IA32_P5_MC_TYPE:
1102         case MSR_IA32_MCG_CAP:
1103         case MSR_IA32_MCG_CTL:
1104         case MSR_IA32_MCG_STATUS:
1105         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1106                 return get_msr_mce(vcpu, msr, pdata);
1107         default:
1108                 if (!ignore_msrs) {
1109                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1110                         return 1;
1111                 } else {
1112                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1113                         data = 0;
1114                 }
1115                 break;
1116         }
1117         *pdata = data;
1118         return 0;
1119 }
1120 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1121
1122 /*
1123  * Read or write a bunch of msrs. All parameters are kernel addresses.
1124  *
1125  * @return number of msrs set successfully.
1126  */
1127 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1128                     struct kvm_msr_entry *entries,
1129                     int (*do_msr)(struct kvm_vcpu *vcpu,
1130                                   unsigned index, u64 *data))
1131 {
1132         int i;
1133
1134         vcpu_load(vcpu);
1135
1136         down_read(&vcpu->kvm->slots_lock);
1137         for (i = 0; i < msrs->nmsrs; ++i)
1138                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1139                         break;
1140         up_read(&vcpu->kvm->slots_lock);
1141
1142         vcpu_put(vcpu);
1143
1144         return i;
1145 }
1146
1147 /*
1148  * Read or write a bunch of msrs. Parameters are user addresses.
1149  *
1150  * @return number of msrs set successfully.
1151  */
1152 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1153                   int (*do_msr)(struct kvm_vcpu *vcpu,
1154                                 unsigned index, u64 *data),
1155                   int writeback)
1156 {
1157         struct kvm_msrs msrs;
1158         struct kvm_msr_entry *entries;
1159         int r, n;
1160         unsigned size;
1161
1162         r = -EFAULT;
1163         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1164                 goto out;
1165
1166         r = -E2BIG;
1167         if (msrs.nmsrs >= MAX_IO_MSRS)
1168                 goto out;
1169
1170         r = -ENOMEM;
1171         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1172         entries = vmalloc(size);
1173         if (!entries)
1174                 goto out;
1175
1176         r = -EFAULT;
1177         if (copy_from_user(entries, user_msrs->entries, size))
1178                 goto out_free;
1179
1180         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1181         if (r < 0)
1182                 goto out_free;
1183
1184         r = -EFAULT;
1185         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1186                 goto out_free;
1187
1188         r = n;
1189
1190 out_free:
1191         vfree(entries);
1192 out:
1193         return r;
1194 }
1195
1196 int kvm_dev_ioctl_check_extension(long ext)
1197 {
1198         int r;
1199
1200         switch (ext) {
1201         case KVM_CAP_IRQCHIP:
1202         case KVM_CAP_HLT:
1203         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1204         case KVM_CAP_SET_TSS_ADDR:
1205         case KVM_CAP_EXT_CPUID:
1206         case KVM_CAP_CLOCKSOURCE:
1207         case KVM_CAP_PIT:
1208         case KVM_CAP_NOP_IO_DELAY:
1209         case KVM_CAP_MP_STATE:
1210         case KVM_CAP_SYNC_MMU:
1211         case KVM_CAP_REINJECT_CONTROL:
1212         case KVM_CAP_IRQ_INJECT_STATUS:
1213         case KVM_CAP_ASSIGN_DEV_IRQ:
1214         case KVM_CAP_IRQFD:
1215         case KVM_CAP_PIT2:
1216         case KVM_CAP_PIT_STATE2:
1217                 r = 1;
1218                 break;
1219         case KVM_CAP_COALESCED_MMIO:
1220                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1221                 break;
1222         case KVM_CAP_VAPIC:
1223                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1224                 break;
1225         case KVM_CAP_NR_VCPUS:
1226                 r = KVM_MAX_VCPUS;
1227                 break;
1228         case KVM_CAP_NR_MEMSLOTS:
1229                 r = KVM_MEMORY_SLOTS;
1230                 break;
1231         case KVM_CAP_PV_MMU:
1232                 r = !tdp_enabled;
1233                 break;
1234         case KVM_CAP_IOMMU:
1235                 r = iommu_found();
1236                 break;
1237         case KVM_CAP_MCE:
1238                 r = KVM_MAX_MCE_BANKS;
1239                 break;
1240         default:
1241                 r = 0;
1242                 break;
1243         }
1244         return r;
1245
1246 }
1247
1248 long kvm_arch_dev_ioctl(struct file *filp,
1249                         unsigned int ioctl, unsigned long arg)
1250 {
1251         void __user *argp = (void __user *)arg;
1252         long r;
1253
1254         switch (ioctl) {
1255         case KVM_GET_MSR_INDEX_LIST: {
1256                 struct kvm_msr_list __user *user_msr_list = argp;
1257                 struct kvm_msr_list msr_list;
1258                 unsigned n;
1259
1260                 r = -EFAULT;
1261                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1262                         goto out;
1263                 n = msr_list.nmsrs;
1264                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1265                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1266                         goto out;
1267                 r = -E2BIG;
1268                 if (n < msr_list.nmsrs)
1269                         goto out;
1270                 r = -EFAULT;
1271                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1272                                  num_msrs_to_save * sizeof(u32)))
1273                         goto out;
1274                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1275                                  &emulated_msrs,
1276                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1277                         goto out;
1278                 r = 0;
1279                 break;
1280         }
1281         case KVM_GET_SUPPORTED_CPUID: {
1282                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1283                 struct kvm_cpuid2 cpuid;
1284
1285                 r = -EFAULT;
1286                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1287                         goto out;
1288                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1289                                                       cpuid_arg->entries);
1290                 if (r)
1291                         goto out;
1292
1293                 r = -EFAULT;
1294                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1295                         goto out;
1296                 r = 0;
1297                 break;
1298         }
1299         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1300                 u64 mce_cap;
1301
1302                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1303                 r = -EFAULT;
1304                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1305                         goto out;
1306                 r = 0;
1307                 break;
1308         }
1309         default:
1310                 r = -EINVAL;
1311         }
1312 out:
1313         return r;
1314 }
1315
1316 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1317 {
1318         kvm_x86_ops->vcpu_load(vcpu, cpu);
1319         kvm_request_guest_time_update(vcpu);
1320 }
1321
1322 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1323 {
1324         kvm_x86_ops->vcpu_put(vcpu);
1325         kvm_put_guest_fpu(vcpu);
1326 }
1327
1328 static int is_efer_nx(void)
1329 {
1330         unsigned long long efer = 0;
1331
1332         rdmsrl_safe(MSR_EFER, &efer);
1333         return efer & EFER_NX;
1334 }
1335
1336 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1337 {
1338         int i;
1339         struct kvm_cpuid_entry2 *e, *entry;
1340
1341         entry = NULL;
1342         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1343                 e = &vcpu->arch.cpuid_entries[i];
1344                 if (e->function == 0x80000001) {
1345                         entry = e;
1346                         break;
1347                 }
1348         }
1349         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1350                 entry->edx &= ~(1 << 20);
1351                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1352         }
1353 }
1354
1355 /* when an old userspace process fills a new kernel module */
1356 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1357                                     struct kvm_cpuid *cpuid,
1358                                     struct kvm_cpuid_entry __user *entries)
1359 {
1360         int r, i;
1361         struct kvm_cpuid_entry *cpuid_entries;
1362
1363         r = -E2BIG;
1364         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1365                 goto out;
1366         r = -ENOMEM;
1367         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1368         if (!cpuid_entries)
1369                 goto out;
1370         r = -EFAULT;
1371         if (copy_from_user(cpuid_entries, entries,
1372                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1373                 goto out_free;
1374         for (i = 0; i < cpuid->nent; i++) {
1375                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1376                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1377                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1378                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1379                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1380                 vcpu->arch.cpuid_entries[i].index = 0;
1381                 vcpu->arch.cpuid_entries[i].flags = 0;
1382                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1383                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1384                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1385         }
1386         vcpu->arch.cpuid_nent = cpuid->nent;
1387         cpuid_fix_nx_cap(vcpu);
1388         r = 0;
1389         kvm_apic_set_version(vcpu);
1390
1391 out_free:
1392         vfree(cpuid_entries);
1393 out:
1394         return r;
1395 }
1396
1397 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1398                                      struct kvm_cpuid2 *cpuid,
1399                                      struct kvm_cpuid_entry2 __user *entries)
1400 {
1401         int r;
1402
1403         r = -E2BIG;
1404         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1405                 goto out;
1406         r = -EFAULT;
1407         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1408                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1409                 goto out;
1410         vcpu->arch.cpuid_nent = cpuid->nent;
1411         kvm_apic_set_version(vcpu);
1412         return 0;
1413
1414 out:
1415         return r;
1416 }
1417
1418 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1419                                      struct kvm_cpuid2 *cpuid,
1420                                      struct kvm_cpuid_entry2 __user *entries)
1421 {
1422         int r;
1423
1424         r = -E2BIG;
1425         if (cpuid->nent < vcpu->arch.cpuid_nent)
1426                 goto out;
1427         r = -EFAULT;
1428         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1429                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1430                 goto out;
1431         return 0;
1432
1433 out:
1434         cpuid->nent = vcpu->arch.cpuid_nent;
1435         return r;
1436 }
1437
1438 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1439                            u32 index)
1440 {
1441         entry->function = function;
1442         entry->index = index;
1443         cpuid_count(entry->function, entry->index,
1444                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1445         entry->flags = 0;
1446 }
1447
1448 #define F(x) bit(X86_FEATURE_##x)
1449
1450 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1451                          u32 index, int *nent, int maxnent)
1452 {
1453         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1454 #ifdef CONFIG_X86_64
1455         unsigned f_lm = F(LM);
1456 #else
1457         unsigned f_lm = 0;
1458 #endif
1459
1460         /* cpuid 1.edx */
1461         const u32 kvm_supported_word0_x86_features =
1462                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1463                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1464                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1465                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1466                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1467                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1468                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1469                 0 /* HTT, TM, Reserved, PBE */;
1470         /* cpuid 0x80000001.edx */
1471         const u32 kvm_supported_word1_x86_features =
1472                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1473                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1474                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1475                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1476                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1477                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1478                 F(FXSR) | F(FXSR_OPT) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
1479                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1480         /* cpuid 1.ecx */
1481         const u32 kvm_supported_word4_x86_features =
1482                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1483                 0 /* DS-CPL, VMX, SMX, EST */ |
1484                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1485                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1486                 0 /* Reserved, DCA */ | F(XMM4_1) |
1487                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1488                 0 /* Reserved, XSAVE, OSXSAVE */;
1489         /* cpuid 0x80000001.ecx */
1490         const u32 kvm_supported_word6_x86_features =
1491                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1492                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1493                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1494                 0 /* SKINIT */ | 0 /* WDT */;
1495
1496         /* all calls to cpuid_count() should be made on the same cpu */
1497         get_cpu();
1498         do_cpuid_1_ent(entry, function, index);
1499         ++*nent;
1500
1501         switch (function) {
1502         case 0:
1503                 entry->eax = min(entry->eax, (u32)0xb);
1504                 break;
1505         case 1:
1506                 entry->edx &= kvm_supported_word0_x86_features;
1507                 entry->ecx &= kvm_supported_word4_x86_features;
1508                 /* we support x2apic emulation even if host does not support
1509                  * it since we emulate x2apic in software */
1510                 entry->ecx |= F(X2APIC);
1511                 break;
1512         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1513          * may return different values. This forces us to get_cpu() before
1514          * issuing the first command, and also to emulate this annoying behavior
1515          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1516         case 2: {
1517                 int t, times = entry->eax & 0xff;
1518
1519                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1520                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1521                 for (t = 1; t < times && *nent < maxnent; ++t) {
1522                         do_cpuid_1_ent(&entry[t], function, 0);
1523                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1524                         ++*nent;
1525                 }
1526                 break;
1527         }
1528         /* function 4 and 0xb have additional index. */
1529         case 4: {
1530                 int i, cache_type;
1531
1532                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1533                 /* read more entries until cache_type is zero */
1534                 for (i = 1; *nent < maxnent; ++i) {
1535                         cache_type = entry[i - 1].eax & 0x1f;
1536                         if (!cache_type)
1537                                 break;
1538                         do_cpuid_1_ent(&entry[i], function, i);
1539                         entry[i].flags |=
1540                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1541                         ++*nent;
1542                 }
1543                 break;
1544         }
1545         case 0xb: {
1546                 int i, level_type;
1547
1548                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1549                 /* read more entries until level_type is zero */
1550                 for (i = 1; *nent < maxnent; ++i) {
1551                         level_type = entry[i - 1].ecx & 0xff00;
1552                         if (!level_type)
1553                                 break;
1554                         do_cpuid_1_ent(&entry[i], function, i);
1555                         entry[i].flags |=
1556                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1557                         ++*nent;
1558                 }
1559                 break;
1560         }
1561         case 0x80000000:
1562                 entry->eax = min(entry->eax, 0x8000001a);
1563                 break;
1564         case 0x80000001:
1565                 entry->edx &= kvm_supported_word1_x86_features;
1566                 entry->ecx &= kvm_supported_word6_x86_features;
1567                 break;
1568         }
1569         put_cpu();
1570 }
1571
1572 #undef F
1573
1574 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1575                                      struct kvm_cpuid_entry2 __user *entries)
1576 {
1577         struct kvm_cpuid_entry2 *cpuid_entries;
1578         int limit, nent = 0, r = -E2BIG;
1579         u32 func;
1580
1581         if (cpuid->nent < 1)
1582                 goto out;
1583         r = -ENOMEM;
1584         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1585         if (!cpuid_entries)
1586                 goto out;
1587
1588         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1589         limit = cpuid_entries[0].eax;
1590         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1591                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1592                              &nent, cpuid->nent);
1593         r = -E2BIG;
1594         if (nent >= cpuid->nent)
1595                 goto out_free;
1596
1597         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1598         limit = cpuid_entries[nent - 1].eax;
1599         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1600                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1601                              &nent, cpuid->nent);
1602         r = -E2BIG;
1603         if (nent >= cpuid->nent)
1604                 goto out_free;
1605
1606         r = -EFAULT;
1607         if (copy_to_user(entries, cpuid_entries,
1608                          nent * sizeof(struct kvm_cpuid_entry2)))
1609                 goto out_free;
1610         cpuid->nent = nent;
1611         r = 0;
1612
1613 out_free:
1614         vfree(cpuid_entries);
1615 out:
1616         return r;
1617 }
1618
1619 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1620                                     struct kvm_lapic_state *s)
1621 {
1622         vcpu_load(vcpu);
1623         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1624         vcpu_put(vcpu);
1625
1626         return 0;
1627 }
1628
1629 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1630                                     struct kvm_lapic_state *s)
1631 {
1632         vcpu_load(vcpu);
1633         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1634         kvm_apic_post_state_restore(vcpu);
1635         vcpu_put(vcpu);
1636
1637         return 0;
1638 }
1639
1640 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1641                                     struct kvm_interrupt *irq)
1642 {
1643         if (irq->irq < 0 || irq->irq >= 256)
1644                 return -EINVAL;
1645         if (irqchip_in_kernel(vcpu->kvm))
1646                 return -ENXIO;
1647         vcpu_load(vcpu);
1648
1649         kvm_queue_interrupt(vcpu, irq->irq, false);
1650
1651         vcpu_put(vcpu);
1652
1653         return 0;
1654 }
1655
1656 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1657 {
1658         vcpu_load(vcpu);
1659         kvm_inject_nmi(vcpu);
1660         vcpu_put(vcpu);
1661
1662         return 0;
1663 }
1664
1665 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1666                                            struct kvm_tpr_access_ctl *tac)
1667 {
1668         if (tac->flags)
1669                 return -EINVAL;
1670         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1671         return 0;
1672 }
1673
1674 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1675                                         u64 mcg_cap)
1676 {
1677         int r;
1678         unsigned bank_num = mcg_cap & 0xff, bank;
1679
1680         r = -EINVAL;
1681         if (!bank_num)
1682                 goto out;
1683         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1684                 goto out;
1685         r = 0;
1686         vcpu->arch.mcg_cap = mcg_cap;
1687         /* Init IA32_MCG_CTL to all 1s */
1688         if (mcg_cap & MCG_CTL_P)
1689                 vcpu->arch.mcg_ctl = ~(u64)0;
1690         /* Init IA32_MCi_CTL to all 1s */
1691         for (bank = 0; bank < bank_num; bank++)
1692                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1693 out:
1694         return r;
1695 }
1696
1697 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1698                                       struct kvm_x86_mce *mce)
1699 {
1700         u64 mcg_cap = vcpu->arch.mcg_cap;
1701         unsigned bank_num = mcg_cap & 0xff;
1702         u64 *banks = vcpu->arch.mce_banks;
1703
1704         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1705                 return -EINVAL;
1706         /*
1707          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1708          * reporting is disabled
1709          */
1710         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1711             vcpu->arch.mcg_ctl != ~(u64)0)
1712                 return 0;
1713         banks += 4 * mce->bank;
1714         /*
1715          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1716          * reporting is disabled for the bank
1717          */
1718         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1719                 return 0;
1720         if (mce->status & MCI_STATUS_UC) {
1721                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1722                     !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1723                         printk(KERN_DEBUG "kvm: set_mce: "
1724                                "injects mce exception while "
1725                                "previous one is in progress!\n");
1726                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1727                         return 0;
1728                 }
1729                 if (banks[1] & MCI_STATUS_VAL)
1730                         mce->status |= MCI_STATUS_OVER;
1731                 banks[2] = mce->addr;
1732                 banks[3] = mce->misc;
1733                 vcpu->arch.mcg_status = mce->mcg_status;
1734                 banks[1] = mce->status;
1735                 kvm_queue_exception(vcpu, MC_VECTOR);
1736         } else if (!(banks[1] & MCI_STATUS_VAL)
1737                    || !(banks[1] & MCI_STATUS_UC)) {
1738                 if (banks[1] & MCI_STATUS_VAL)
1739                         mce->status |= MCI_STATUS_OVER;
1740                 banks[2] = mce->addr;
1741                 banks[3] = mce->misc;
1742                 banks[1] = mce->status;
1743         } else
1744                 banks[1] |= MCI_STATUS_OVER;
1745         return 0;
1746 }
1747
1748 long kvm_arch_vcpu_ioctl(struct file *filp,
1749                          unsigned int ioctl, unsigned long arg)
1750 {
1751         struct kvm_vcpu *vcpu = filp->private_data;
1752         void __user *argp = (void __user *)arg;
1753         int r;
1754         struct kvm_lapic_state *lapic = NULL;
1755
1756         switch (ioctl) {
1757         case KVM_GET_LAPIC: {
1758                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1759
1760                 r = -ENOMEM;
1761                 if (!lapic)
1762                         goto out;
1763                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1764                 if (r)
1765                         goto out;
1766                 r = -EFAULT;
1767                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1768                         goto out;
1769                 r = 0;
1770                 break;
1771         }
1772         case KVM_SET_LAPIC: {
1773                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1774                 r = -ENOMEM;
1775                 if (!lapic)
1776                         goto out;
1777                 r = -EFAULT;
1778                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1779                         goto out;
1780                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1781                 if (r)
1782                         goto out;
1783                 r = 0;
1784                 break;
1785         }
1786         case KVM_INTERRUPT: {
1787                 struct kvm_interrupt irq;
1788
1789                 r = -EFAULT;
1790                 if (copy_from_user(&irq, argp, sizeof irq))
1791                         goto out;
1792                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1793                 if (r)
1794                         goto out;
1795                 r = 0;
1796                 break;
1797         }
1798         case KVM_NMI: {
1799                 r = kvm_vcpu_ioctl_nmi(vcpu);
1800                 if (r)
1801                         goto out;
1802                 r = 0;
1803                 break;
1804         }
1805         case KVM_SET_CPUID: {
1806                 struct kvm_cpuid __user *cpuid_arg = argp;
1807                 struct kvm_cpuid cpuid;
1808
1809                 r = -EFAULT;
1810                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1811                         goto out;
1812                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1813                 if (r)
1814                         goto out;
1815                 break;
1816         }
1817         case KVM_SET_CPUID2: {
1818                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1819                 struct kvm_cpuid2 cpuid;
1820
1821                 r = -EFAULT;
1822                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1823                         goto out;
1824                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1825                                               cpuid_arg->entries);
1826                 if (r)
1827                         goto out;
1828                 break;
1829         }
1830         case KVM_GET_CPUID2: {
1831                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1832                 struct kvm_cpuid2 cpuid;
1833
1834                 r = -EFAULT;
1835                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1836                         goto out;
1837                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1838                                               cpuid_arg->entries);
1839                 if (r)
1840                         goto out;
1841                 r = -EFAULT;
1842                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1843                         goto out;
1844                 r = 0;
1845                 break;
1846         }
1847         case KVM_GET_MSRS:
1848                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1849                 break;
1850         case KVM_SET_MSRS:
1851                 r = msr_io(vcpu, argp, do_set_msr, 0);
1852                 break;
1853         case KVM_TPR_ACCESS_REPORTING: {
1854                 struct kvm_tpr_access_ctl tac;
1855
1856                 r = -EFAULT;
1857                 if (copy_from_user(&tac, argp, sizeof tac))
1858                         goto out;
1859                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1860                 if (r)
1861                         goto out;
1862                 r = -EFAULT;
1863                 if (copy_to_user(argp, &tac, sizeof tac))
1864                         goto out;
1865                 r = 0;
1866                 break;
1867         };
1868         case KVM_SET_VAPIC_ADDR: {
1869                 struct kvm_vapic_addr va;
1870
1871                 r = -EINVAL;
1872                 if (!irqchip_in_kernel(vcpu->kvm))
1873                         goto out;
1874                 r = -EFAULT;
1875                 if (copy_from_user(&va, argp, sizeof va))
1876                         goto out;
1877                 r = 0;
1878                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1879                 break;
1880         }
1881         case KVM_X86_SETUP_MCE: {
1882                 u64 mcg_cap;
1883
1884                 r = -EFAULT;
1885                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1886                         goto out;
1887                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1888                 break;
1889         }
1890         case KVM_X86_SET_MCE: {
1891                 struct kvm_x86_mce mce;
1892
1893                 r = -EFAULT;
1894                 if (copy_from_user(&mce, argp, sizeof mce))
1895                         goto out;
1896                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1897                 break;
1898         }
1899         default:
1900                 r = -EINVAL;
1901         }
1902 out:
1903         kfree(lapic);
1904         return r;
1905 }
1906
1907 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1908 {
1909         int ret;
1910
1911         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1912                 return -1;
1913         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1914         return ret;
1915 }
1916
1917 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1918                                           u32 kvm_nr_mmu_pages)
1919 {
1920         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1921                 return -EINVAL;
1922
1923         down_write(&kvm->slots_lock);
1924         spin_lock(&kvm->mmu_lock);
1925
1926         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1927         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1928
1929         spin_unlock(&kvm->mmu_lock);
1930         up_write(&kvm->slots_lock);
1931         return 0;
1932 }
1933
1934 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1935 {
1936         return kvm->arch.n_alloc_mmu_pages;
1937 }
1938
1939 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1940 {
1941         int i;
1942         struct kvm_mem_alias *alias;
1943
1944         for (i = 0; i < kvm->arch.naliases; ++i) {
1945                 alias = &kvm->arch.aliases[i];
1946                 if (gfn >= alias->base_gfn
1947                     && gfn < alias->base_gfn + alias->npages)
1948                         return alias->target_gfn + gfn - alias->base_gfn;
1949         }
1950         return gfn;
1951 }
1952
1953 /*
1954  * Set a new alias region.  Aliases map a portion of physical memory into
1955  * another portion.  This is useful for memory windows, for example the PC
1956  * VGA region.
1957  */
1958 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1959                                          struct kvm_memory_alias *alias)
1960 {
1961         int r, n;
1962         struct kvm_mem_alias *p;
1963
1964         r = -EINVAL;
1965         /* General sanity checks */
1966         if (alias->memory_size & (PAGE_SIZE - 1))
1967                 goto out;
1968         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1969                 goto out;
1970         if (alias->slot >= KVM_ALIAS_SLOTS)
1971                 goto out;
1972         if (alias->guest_phys_addr + alias->memory_size
1973             < alias->guest_phys_addr)
1974                 goto out;
1975         if (alias->target_phys_addr + alias->memory_size
1976             < alias->target_phys_addr)
1977                 goto out;
1978
1979         down_write(&kvm->slots_lock);
1980         spin_lock(&kvm->mmu_lock);
1981
1982         p = &kvm->arch.aliases[alias->slot];
1983         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1984         p->npages = alias->memory_size >> PAGE_SHIFT;
1985         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1986
1987         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1988                 if (kvm->arch.aliases[n - 1].npages)
1989                         break;
1990         kvm->arch.naliases = n;
1991
1992         spin_unlock(&kvm->mmu_lock);
1993         kvm_mmu_zap_all(kvm);
1994
1995         up_write(&kvm->slots_lock);
1996
1997         return 0;
1998
1999 out:
2000         return r;
2001 }
2002
2003 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2004 {
2005         int r;
2006
2007         r = 0;
2008         switch (chip->chip_id) {
2009         case KVM_IRQCHIP_PIC_MASTER:
2010                 memcpy(&chip->chip.pic,
2011                         &pic_irqchip(kvm)->pics[0],
2012                         sizeof(struct kvm_pic_state));
2013                 break;
2014         case KVM_IRQCHIP_PIC_SLAVE:
2015                 memcpy(&chip->chip.pic,
2016                         &pic_irqchip(kvm)->pics[1],
2017                         sizeof(struct kvm_pic_state));
2018                 break;
2019         case KVM_IRQCHIP_IOAPIC:
2020                 memcpy(&chip->chip.ioapic,
2021                         ioapic_irqchip(kvm),
2022                         sizeof(struct kvm_ioapic_state));
2023                 break;
2024         default:
2025                 r = -EINVAL;
2026                 break;
2027         }
2028         return r;
2029 }
2030
2031 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2032 {
2033         int r;
2034
2035         r = 0;
2036         switch (chip->chip_id) {
2037         case KVM_IRQCHIP_PIC_MASTER:
2038                 spin_lock(&pic_irqchip(kvm)->lock);
2039                 memcpy(&pic_irqchip(kvm)->pics[0],
2040                         &chip->chip.pic,
2041                         sizeof(struct kvm_pic_state));
2042                 spin_unlock(&pic_irqchip(kvm)->lock);
2043                 break;
2044         case KVM_IRQCHIP_PIC_SLAVE:
2045                 spin_lock(&pic_irqchip(kvm)->lock);
2046                 memcpy(&pic_irqchip(kvm)->pics[1],
2047                         &chip->chip.pic,
2048                         sizeof(struct kvm_pic_state));
2049                 spin_unlock(&pic_irqchip(kvm)->lock);
2050                 break;
2051         case KVM_IRQCHIP_IOAPIC:
2052                 mutex_lock(&kvm->irq_lock);
2053                 memcpy(ioapic_irqchip(kvm),
2054                         &chip->chip.ioapic,
2055                         sizeof(struct kvm_ioapic_state));
2056                 mutex_unlock(&kvm->irq_lock);
2057                 break;
2058         default:
2059                 r = -EINVAL;
2060                 break;
2061         }
2062         kvm_pic_update_irq(pic_irqchip(kvm));
2063         return r;
2064 }
2065
2066 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2067 {
2068         int r = 0;
2069
2070         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2071         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2072         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2073         return r;
2074 }
2075
2076 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2077 {
2078         int r = 0;
2079
2080         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2081         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2082         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2083         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2084         return r;
2085 }
2086
2087 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2088 {
2089         int r = 0;
2090
2091         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2092         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2093                 sizeof(ps->channels));
2094         ps->flags = kvm->arch.vpit->pit_state.flags;
2095         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2096         return r;
2097 }
2098
2099 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2100 {
2101         int r = 0, start = 0;
2102         u32 prev_legacy, cur_legacy;
2103         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2104         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2105         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2106         if (!prev_legacy && cur_legacy)
2107                 start = 1;
2108         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2109                sizeof(kvm->arch.vpit->pit_state.channels));
2110         kvm->arch.vpit->pit_state.flags = ps->flags;
2111         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2112         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2113         return r;
2114 }
2115
2116 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2117                                  struct kvm_reinject_control *control)
2118 {
2119         if (!kvm->arch.vpit)
2120                 return -ENXIO;
2121         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2122         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2123         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2124         return 0;
2125 }
2126
2127 /*
2128  * Get (and clear) the dirty memory log for a memory slot.
2129  */
2130 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2131                                       struct kvm_dirty_log *log)
2132 {
2133         int r;
2134         int n;
2135         struct kvm_memory_slot *memslot;
2136         int is_dirty = 0;
2137
2138         down_write(&kvm->slots_lock);
2139
2140         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2141         if (r)
2142                 goto out;
2143
2144         /* If nothing is dirty, don't bother messing with page tables. */
2145         if (is_dirty) {
2146                 spin_lock(&kvm->mmu_lock);
2147                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2148                 spin_unlock(&kvm->mmu_lock);
2149                 kvm_flush_remote_tlbs(kvm);
2150                 memslot = &kvm->memslots[log->slot];
2151                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2152                 memset(memslot->dirty_bitmap, 0, n);
2153         }
2154         r = 0;
2155 out:
2156         up_write(&kvm->slots_lock);
2157         return r;
2158 }
2159
2160 long kvm_arch_vm_ioctl(struct file *filp,
2161                        unsigned int ioctl, unsigned long arg)
2162 {
2163         struct kvm *kvm = filp->private_data;
2164         void __user *argp = (void __user *)arg;
2165         int r = -EINVAL;
2166         /*
2167          * This union makes it completely explicit to gcc-3.x
2168          * that these two variables' stack usage should be
2169          * combined, not added together.
2170          */
2171         union {
2172                 struct kvm_pit_state ps;
2173                 struct kvm_pit_state2 ps2;
2174                 struct kvm_memory_alias alias;
2175                 struct kvm_pit_config pit_config;
2176         } u;
2177
2178         switch (ioctl) {
2179         case KVM_SET_TSS_ADDR:
2180                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2181                 if (r < 0)
2182                         goto out;
2183                 break;
2184         case KVM_SET_MEMORY_REGION: {
2185                 struct kvm_memory_region kvm_mem;
2186                 struct kvm_userspace_memory_region kvm_userspace_mem;
2187
2188                 r = -EFAULT;
2189                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2190                         goto out;
2191                 kvm_userspace_mem.slot = kvm_mem.slot;
2192                 kvm_userspace_mem.flags = kvm_mem.flags;
2193                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2194                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2195                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2196                 if (r)
2197                         goto out;
2198                 break;
2199         }
2200         case KVM_SET_NR_MMU_PAGES:
2201                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2202                 if (r)
2203                         goto out;
2204                 break;
2205         case KVM_GET_NR_MMU_PAGES:
2206                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2207                 break;
2208         case KVM_SET_MEMORY_ALIAS:
2209                 r = -EFAULT;
2210                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2211                         goto out;
2212                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2213                 if (r)
2214                         goto out;
2215                 break;
2216         case KVM_CREATE_IRQCHIP:
2217                 r = -ENOMEM;
2218                 kvm->arch.vpic = kvm_create_pic(kvm);
2219                 if (kvm->arch.vpic) {
2220                         r = kvm_ioapic_init(kvm);
2221                         if (r) {
2222                                 kfree(kvm->arch.vpic);
2223                                 kvm->arch.vpic = NULL;
2224                                 goto out;
2225                         }
2226                 } else
2227                         goto out;
2228                 r = kvm_setup_default_irq_routing(kvm);
2229                 if (r) {
2230                         kfree(kvm->arch.vpic);
2231                         kfree(kvm->arch.vioapic);
2232                         goto out;
2233                 }
2234                 break;
2235         case KVM_CREATE_PIT:
2236                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2237                 goto create_pit;
2238         case KVM_CREATE_PIT2:
2239                 r = -EFAULT;
2240                 if (copy_from_user(&u.pit_config, argp,
2241                                    sizeof(struct kvm_pit_config)))
2242                         goto out;
2243         create_pit:
2244                 down_write(&kvm->slots_lock);
2245                 r = -EEXIST;
2246                 if (kvm->arch.vpit)
2247                         goto create_pit_unlock;
2248                 r = -ENOMEM;
2249                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2250                 if (kvm->arch.vpit)
2251                         r = 0;
2252         create_pit_unlock:
2253                 up_write(&kvm->slots_lock);
2254                 break;
2255         case KVM_IRQ_LINE_STATUS:
2256         case KVM_IRQ_LINE: {
2257                 struct kvm_irq_level irq_event;
2258
2259                 r = -EFAULT;
2260                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2261                         goto out;
2262                 if (irqchip_in_kernel(kvm)) {
2263                         __s32 status;
2264                         mutex_lock(&kvm->irq_lock);
2265                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2266                                         irq_event.irq, irq_event.level);
2267                         mutex_unlock(&kvm->irq_lock);
2268                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2269                                 irq_event.status = status;
2270                                 if (copy_to_user(argp, &irq_event,
2271                                                         sizeof irq_event))
2272                                         goto out;
2273                         }
2274                         r = 0;
2275                 }
2276                 break;
2277         }
2278         case KVM_GET_IRQCHIP: {
2279                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2280                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2281
2282                 r = -ENOMEM;
2283                 if (!chip)
2284                         goto out;
2285                 r = -EFAULT;
2286                 if (copy_from_user(chip, argp, sizeof *chip))
2287                         goto get_irqchip_out;
2288                 r = -ENXIO;
2289                 if (!irqchip_in_kernel(kvm))
2290                         goto get_irqchip_out;
2291                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2292                 if (r)
2293                         goto get_irqchip_out;
2294                 r = -EFAULT;
2295                 if (copy_to_user(argp, chip, sizeof *chip))
2296                         goto get_irqchip_out;
2297                 r = 0;
2298         get_irqchip_out:
2299                 kfree(chip);
2300                 if (r)
2301                         goto out;
2302                 break;
2303         }
2304         case KVM_SET_IRQCHIP: {
2305                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2306                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2307
2308                 r = -ENOMEM;
2309                 if (!chip)
2310                         goto out;
2311                 r = -EFAULT;
2312                 if (copy_from_user(chip, argp, sizeof *chip))
2313                         goto set_irqchip_out;
2314                 r = -ENXIO;
2315                 if (!irqchip_in_kernel(kvm))
2316                         goto set_irqchip_out;
2317                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2318                 if (r)
2319                         goto set_irqchip_out;
2320                 r = 0;
2321         set_irqchip_out:
2322                 kfree(chip);
2323                 if (r)
2324                         goto out;
2325                 break;
2326         }
2327         case KVM_GET_PIT: {
2328                 r = -EFAULT;
2329                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2330                         goto out;
2331                 r = -ENXIO;
2332                 if (!kvm->arch.vpit)
2333                         goto out;
2334                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2335                 if (r)
2336                         goto out;
2337                 r = -EFAULT;
2338                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2339                         goto out;
2340                 r = 0;
2341                 break;
2342         }
2343         case KVM_SET_PIT: {
2344                 r = -EFAULT;
2345                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2346                         goto out;
2347                 r = -ENXIO;
2348                 if (!kvm->arch.vpit)
2349                         goto out;
2350                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2351                 if (r)
2352                         goto out;
2353                 r = 0;
2354                 break;
2355         }
2356         case KVM_GET_PIT2: {
2357                 r = -ENXIO;
2358                 if (!kvm->arch.vpit)
2359                         goto out;
2360                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2361                 if (r)
2362                         goto out;
2363                 r = -EFAULT;
2364                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2365                         goto out;
2366                 r = 0;
2367                 break;
2368         }
2369         case KVM_SET_PIT2: {
2370                 r = -EFAULT;
2371                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2372                         goto out;
2373                 r = -ENXIO;
2374                 if (!kvm->arch.vpit)
2375                         goto out;
2376                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2377                 if (r)
2378                         goto out;
2379                 r = 0;
2380                 break;
2381         }
2382         case KVM_REINJECT_CONTROL: {
2383                 struct kvm_reinject_control control;
2384                 r =  -EFAULT;
2385                 if (copy_from_user(&control, argp, sizeof(control)))
2386                         goto out;
2387                 r = kvm_vm_ioctl_reinject(kvm, &control);
2388                 if (r)
2389                         goto out;
2390                 r = 0;
2391                 break;
2392         }
2393         default:
2394                 ;
2395         }
2396 out:
2397         return r;
2398 }
2399
2400 static void kvm_init_msr_list(void)
2401 {
2402         u32 dummy[2];
2403         unsigned i, j;
2404
2405         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2406                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2407                         continue;
2408                 if (j < i)
2409                         msrs_to_save[j] = msrs_to_save[i];
2410                 j++;
2411         }
2412         num_msrs_to_save = j;
2413 }
2414
2415 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2416                            const void *v)
2417 {
2418         if (vcpu->arch.apic &&
2419             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2420                 return 0;
2421
2422         return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2423 }
2424
2425 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2426 {
2427         if (vcpu->arch.apic &&
2428             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2429                 return 0;
2430
2431         return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2432 }
2433
2434 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2435                                struct kvm_vcpu *vcpu)
2436 {
2437         void *data = val;
2438         int r = X86EMUL_CONTINUE;
2439
2440         while (bytes) {
2441                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2442                 unsigned offset = addr & (PAGE_SIZE-1);
2443                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2444                 int ret;
2445
2446                 if (gpa == UNMAPPED_GVA) {
2447                         r = X86EMUL_PROPAGATE_FAULT;
2448                         goto out;
2449                 }
2450                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2451                 if (ret < 0) {
2452                         r = X86EMUL_UNHANDLEABLE;
2453                         goto out;
2454                 }
2455
2456                 bytes -= toread;
2457                 data += toread;
2458                 addr += toread;
2459         }
2460 out:
2461         return r;
2462 }
2463
2464 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2465                                 struct kvm_vcpu *vcpu)
2466 {
2467         void *data = val;
2468         int r = X86EMUL_CONTINUE;
2469
2470         while (bytes) {
2471                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2472                 unsigned offset = addr & (PAGE_SIZE-1);
2473                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2474                 int ret;
2475
2476                 if (gpa == UNMAPPED_GVA) {
2477                         r = X86EMUL_PROPAGATE_FAULT;
2478                         goto out;
2479                 }
2480                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2481                 if (ret < 0) {
2482                         r = X86EMUL_UNHANDLEABLE;
2483                         goto out;
2484                 }
2485
2486                 bytes -= towrite;
2487                 data += towrite;
2488                 addr += towrite;
2489         }
2490 out:
2491         return r;
2492 }
2493
2494
2495 static int emulator_read_emulated(unsigned long addr,
2496                                   void *val,
2497                                   unsigned int bytes,
2498                                   struct kvm_vcpu *vcpu)
2499 {
2500         gpa_t                 gpa;
2501
2502         if (vcpu->mmio_read_completed) {
2503                 memcpy(val, vcpu->mmio_data, bytes);
2504                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2505                                vcpu->mmio_phys_addr, *(u64 *)val);
2506                 vcpu->mmio_read_completed = 0;
2507                 return X86EMUL_CONTINUE;
2508         }
2509
2510         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2511
2512         /* For APIC access vmexit */
2513         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2514                 goto mmio;
2515
2516         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2517                                 == X86EMUL_CONTINUE)
2518                 return X86EMUL_CONTINUE;
2519         if (gpa == UNMAPPED_GVA)
2520                 return X86EMUL_PROPAGATE_FAULT;
2521
2522 mmio:
2523         /*
2524          * Is this MMIO handled locally?
2525          */
2526         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2527                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2528                 return X86EMUL_CONTINUE;
2529         }
2530
2531         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2532
2533         vcpu->mmio_needed = 1;
2534         vcpu->mmio_phys_addr = gpa;
2535         vcpu->mmio_size = bytes;
2536         vcpu->mmio_is_write = 0;
2537
2538         return X86EMUL_UNHANDLEABLE;
2539 }
2540
2541 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2542                           const void *val, int bytes)
2543 {
2544         int ret;
2545
2546         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2547         if (ret < 0)
2548                 return 0;
2549         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2550         return 1;
2551 }
2552
2553 static int emulator_write_emulated_onepage(unsigned long addr,
2554                                            const void *val,
2555                                            unsigned int bytes,
2556                                            struct kvm_vcpu *vcpu)
2557 {
2558         gpa_t                 gpa;
2559
2560         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2561
2562         if (gpa == UNMAPPED_GVA) {
2563                 kvm_inject_page_fault(vcpu, addr, 2);
2564                 return X86EMUL_PROPAGATE_FAULT;
2565         }
2566
2567         /* For APIC access vmexit */
2568         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2569                 goto mmio;
2570
2571         if (emulator_write_phys(vcpu, gpa, val, bytes))
2572                 return X86EMUL_CONTINUE;
2573
2574 mmio:
2575         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2576         /*
2577          * Is this MMIO handled locally?
2578          */
2579         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2580                 return X86EMUL_CONTINUE;
2581
2582         vcpu->mmio_needed = 1;
2583         vcpu->mmio_phys_addr = gpa;
2584         vcpu->mmio_size = bytes;
2585         vcpu->mmio_is_write = 1;
2586         memcpy(vcpu->mmio_data, val, bytes);
2587
2588         return X86EMUL_CONTINUE;
2589 }
2590
2591 int emulator_write_emulated(unsigned long addr,
2592                                    const void *val,
2593                                    unsigned int bytes,
2594                                    struct kvm_vcpu *vcpu)
2595 {
2596         /* Crossing a page boundary? */
2597         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2598                 int rc, now;
2599
2600                 now = -addr & ~PAGE_MASK;
2601                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2602                 if (rc != X86EMUL_CONTINUE)
2603                         return rc;
2604                 addr += now;
2605                 val += now;
2606                 bytes -= now;
2607         }
2608         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2609 }
2610 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2611
2612 static int emulator_cmpxchg_emulated(unsigned long addr,
2613                                      const void *old,
2614                                      const void *new,
2615                                      unsigned int bytes,
2616                                      struct kvm_vcpu *vcpu)
2617 {
2618         static int reported;
2619
2620         if (!reported) {
2621                 reported = 1;
2622                 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2623         }
2624 #ifndef CONFIG_X86_64
2625         /* guests cmpxchg8b have to be emulated atomically */
2626         if (bytes == 8) {
2627                 gpa_t gpa;
2628                 struct page *page;
2629                 char *kaddr;
2630                 u64 val;
2631
2632                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2633
2634                 if (gpa == UNMAPPED_GVA ||
2635                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2636                         goto emul_write;
2637
2638                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2639                         goto emul_write;
2640
2641                 val = *(u64 *)new;
2642
2643                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2644
2645                 kaddr = kmap_atomic(page, KM_USER0);
2646                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2647                 kunmap_atomic(kaddr, KM_USER0);
2648                 kvm_release_page_dirty(page);
2649         }
2650 emul_write:
2651 #endif
2652
2653         return emulator_write_emulated(addr, new, bytes, vcpu);
2654 }
2655
2656 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2657 {
2658         return kvm_x86_ops->get_segment_base(vcpu, seg);
2659 }
2660
2661 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2662 {
2663         kvm_mmu_invlpg(vcpu, address);
2664         return X86EMUL_CONTINUE;
2665 }
2666
2667 int emulate_clts(struct kvm_vcpu *vcpu)
2668 {
2669         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2670         return X86EMUL_CONTINUE;
2671 }
2672
2673 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2674 {
2675         struct kvm_vcpu *vcpu = ctxt->vcpu;
2676
2677         switch (dr) {
2678         case 0 ... 3:
2679                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2680                 return X86EMUL_CONTINUE;
2681         default:
2682                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2683                 return X86EMUL_UNHANDLEABLE;
2684         }
2685 }
2686
2687 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2688 {
2689         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2690         int exception;
2691
2692         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2693         if (exception) {
2694                 /* FIXME: better handling */
2695                 return X86EMUL_UNHANDLEABLE;
2696         }
2697         return X86EMUL_CONTINUE;
2698 }
2699
2700 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2701 {
2702         u8 opcodes[4];
2703         unsigned long rip = kvm_rip_read(vcpu);
2704         unsigned long rip_linear;
2705
2706         if (!printk_ratelimit())
2707                 return;
2708
2709         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2710
2711         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2712
2713         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2714                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2715 }
2716 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2717
2718 static struct x86_emulate_ops emulate_ops = {
2719         .read_std            = kvm_read_guest_virt,
2720         .read_emulated       = emulator_read_emulated,
2721         .write_emulated      = emulator_write_emulated,
2722         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2723 };
2724
2725 static void cache_all_regs(struct kvm_vcpu *vcpu)
2726 {
2727         kvm_register_read(vcpu, VCPU_REGS_RAX);
2728         kvm_register_read(vcpu, VCPU_REGS_RSP);
2729         kvm_register_read(vcpu, VCPU_REGS_RIP);
2730         vcpu->arch.regs_dirty = ~0;
2731 }
2732
2733 int emulate_instruction(struct kvm_vcpu *vcpu,
2734                         struct kvm_run *run,
2735                         unsigned long cr2,
2736                         u16 error_code,
2737                         int emulation_type)
2738 {
2739         int r, shadow_mask;
2740         struct decode_cache *c;
2741
2742         kvm_clear_exception_queue(vcpu);
2743         vcpu->arch.mmio_fault_cr2 = cr2;
2744         /*
2745          * TODO: fix x86_emulate.c to use guest_read/write_register
2746          * instead of direct ->regs accesses, can save hundred cycles
2747          * on Intel for instructions that don't read/change RSP, for
2748          * for example.
2749          */
2750         cache_all_regs(vcpu);
2751
2752         vcpu->mmio_is_write = 0;
2753         vcpu->arch.pio.string = 0;
2754
2755         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2756                 int cs_db, cs_l;
2757                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2758
2759                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2760                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2761                 vcpu->arch.emulate_ctxt.mode =
2762                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2763                         ? X86EMUL_MODE_REAL : cs_l
2764                         ? X86EMUL_MODE_PROT64 : cs_db
2765                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2766
2767                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2768
2769                 /* Only allow emulation of specific instructions on #UD
2770                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
2771                 c = &vcpu->arch.emulate_ctxt.decode;
2772                 if (emulation_type & EMULTYPE_TRAP_UD) {
2773                         if (!c->twobyte)
2774                                 return EMULATE_FAIL;
2775                         switch (c->b) {
2776                         case 0x01: /* VMMCALL */
2777                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
2778                                         return EMULATE_FAIL;
2779                                 break;
2780                         case 0x34: /* sysenter */
2781                         case 0x35: /* sysexit */
2782                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2783                                         return EMULATE_FAIL;
2784                                 break;
2785                         case 0x05: /* syscall */
2786                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2787                                         return EMULATE_FAIL;
2788                                 break;
2789                         default:
2790                                 return EMULATE_FAIL;
2791                         }
2792
2793                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
2794                                 return EMULATE_FAIL;
2795                 }
2796
2797                 ++vcpu->stat.insn_emulation;
2798                 if (r)  {
2799                         ++vcpu->stat.insn_emulation_fail;
2800                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2801                                 return EMULATE_DONE;
2802                         return EMULATE_FAIL;
2803                 }
2804         }
2805
2806         if (emulation_type & EMULTYPE_SKIP) {
2807                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2808                 return EMULATE_DONE;
2809         }
2810
2811         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2812         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2813
2814         if (r == 0)
2815                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2816
2817         if (vcpu->arch.pio.string)
2818                 return EMULATE_DO_MMIO;
2819
2820         if ((r || vcpu->mmio_is_write) && run) {
2821                 run->exit_reason = KVM_EXIT_MMIO;
2822                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2823                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2824                 run->mmio.len = vcpu->mmio_size;
2825                 run->mmio.is_write = vcpu->mmio_is_write;
2826         }
2827
2828         if (r) {
2829                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2830                         return EMULATE_DONE;
2831                 if (!vcpu->mmio_needed) {
2832                         kvm_report_emulation_failure(vcpu, "mmio");
2833                         return EMULATE_FAIL;
2834                 }
2835                 return EMULATE_DO_MMIO;
2836         }
2837
2838         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2839
2840         if (vcpu->mmio_is_write) {
2841                 vcpu->mmio_needed = 0;
2842                 return EMULATE_DO_MMIO;
2843         }
2844
2845         return EMULATE_DONE;
2846 }
2847 EXPORT_SYMBOL_GPL(emulate_instruction);
2848
2849 static int pio_copy_data(struct kvm_vcpu *vcpu)
2850 {
2851         void *p = vcpu->arch.pio_data;
2852         gva_t q = vcpu->arch.pio.guest_gva;
2853         unsigned bytes;
2854         int ret;
2855
2856         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2857         if (vcpu->arch.pio.in)
2858                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2859         else
2860                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2861         return ret;
2862 }
2863
2864 int complete_pio(struct kvm_vcpu *vcpu)
2865 {
2866         struct kvm_pio_request *io = &vcpu->arch.pio;
2867         long delta;
2868         int r;
2869         unsigned long val;
2870
2871         if (!io->string) {
2872                 if (io->in) {
2873                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2874                         memcpy(&val, vcpu->arch.pio_data, io->size);
2875                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2876                 }
2877         } else {
2878                 if (io->in) {
2879                         r = pio_copy_data(vcpu);
2880                         if (r)
2881                                 return r;
2882                 }
2883
2884                 delta = 1;
2885                 if (io->rep) {
2886                         delta *= io->cur_count;
2887                         /*
2888                          * The size of the register should really depend on
2889                          * current address size.
2890                          */
2891                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2892                         val -= delta;
2893                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2894                 }
2895                 if (io->down)
2896                         delta = -delta;
2897                 delta *= io->size;
2898                 if (io->in) {
2899                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2900                         val += delta;
2901                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2902                 } else {
2903                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2904                         val += delta;
2905                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2906                 }
2907         }
2908
2909         io->count -= io->cur_count;
2910         io->cur_count = 0;
2911
2912         return 0;
2913 }
2914
2915 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
2916 {
2917         /* TODO: String I/O for in kernel device */
2918         int r;
2919
2920         if (vcpu->arch.pio.in)
2921                 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2922                                     vcpu->arch.pio.size, pd);
2923         else
2924                 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2925                                      vcpu->arch.pio.size, pd);
2926         return r;
2927 }
2928
2929 static int pio_string_write(struct kvm_vcpu *vcpu)
2930 {
2931         struct kvm_pio_request *io = &vcpu->arch.pio;
2932         void *pd = vcpu->arch.pio_data;
2933         int i, r = 0;
2934
2935         for (i = 0; i < io->cur_count; i++) {
2936                 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
2937                                      io->port, io->size, pd)) {
2938                         r = -EOPNOTSUPP;
2939                         break;
2940                 }
2941                 pd += io->size;
2942         }
2943         return r;
2944 }
2945
2946 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2947                   int size, unsigned port)
2948 {
2949         unsigned long val;
2950
2951         vcpu->run->exit_reason = KVM_EXIT_IO;
2952         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2953         vcpu->run->io.size = vcpu->arch.pio.size = size;
2954         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2955         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2956         vcpu->run->io.port = vcpu->arch.pio.port = port;
2957         vcpu->arch.pio.in = in;
2958         vcpu->arch.pio.string = 0;
2959         vcpu->arch.pio.down = 0;
2960         vcpu->arch.pio.rep = 0;
2961
2962         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2963                       size, 1);
2964
2965         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2966         memcpy(vcpu->arch.pio_data, &val, 4);
2967
2968         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
2969                 complete_pio(vcpu);
2970                 return 1;
2971         }
2972         return 0;
2973 }
2974 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2975
2976 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2977                   int size, unsigned long count, int down,
2978                   gva_t address, int rep, unsigned port)
2979 {
2980         unsigned now, in_page;
2981         int ret = 0;
2982
2983         vcpu->run->exit_reason = KVM_EXIT_IO;
2984         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2985         vcpu->run->io.size = vcpu->arch.pio.size = size;
2986         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2987         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2988         vcpu->run->io.port = vcpu->arch.pio.port = port;
2989         vcpu->arch.pio.in = in;
2990         vcpu->arch.pio.string = 1;
2991         vcpu->arch.pio.down = down;
2992         vcpu->arch.pio.rep = rep;
2993
2994         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2995                       size, count);
2996
2997         if (!count) {
2998                 kvm_x86_ops->skip_emulated_instruction(vcpu);
2999                 return 1;
3000         }
3001
3002         if (!down)
3003                 in_page = PAGE_SIZE - offset_in_page(address);
3004         else
3005                 in_page = offset_in_page(address) + size;
3006         now = min(count, (unsigned long)in_page / size);
3007         if (!now)
3008                 now = 1;
3009         if (down) {
3010                 /*
3011                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
3012                  */
3013                 pr_unimpl(vcpu, "guest string pio down\n");
3014                 kvm_inject_gp(vcpu, 0);
3015                 return 1;
3016         }
3017         vcpu->run->io.count = now;
3018         vcpu->arch.pio.cur_count = now;
3019
3020         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3021                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3022
3023         vcpu->arch.pio.guest_gva = address;
3024
3025         if (!vcpu->arch.pio.in) {
3026                 /* string PIO write */
3027                 ret = pio_copy_data(vcpu);
3028                 if (ret == X86EMUL_PROPAGATE_FAULT) {
3029                         kvm_inject_gp(vcpu, 0);
3030                         return 1;
3031                 }
3032                 if (ret == 0 && !pio_string_write(vcpu)) {
3033                         complete_pio(vcpu);
3034                         if (vcpu->arch.pio.count == 0)
3035                                 ret = 1;
3036                 }
3037         }
3038         /* no string PIO read support yet */
3039
3040         return ret;
3041 }
3042 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3043
3044 static void bounce_off(void *info)
3045 {
3046         /* nothing */
3047 }
3048
3049 static unsigned int  ref_freq;
3050 static unsigned long tsc_khz_ref;
3051
3052 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3053                                      void *data)
3054 {
3055         struct cpufreq_freqs *freq = data;
3056         struct kvm *kvm;
3057         struct kvm_vcpu *vcpu;
3058         int i, send_ipi = 0;
3059
3060         if (!ref_freq)
3061                 ref_freq = freq->old;
3062
3063         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3064                 return 0;
3065         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3066                 return 0;
3067         per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
3068
3069         spin_lock(&kvm_lock);
3070         list_for_each_entry(kvm, &vm_list, vm_list) {
3071                 kvm_for_each_vcpu(i, vcpu, kvm) {
3072                         if (vcpu->cpu != freq->cpu)
3073                                 continue;
3074                         if (!kvm_request_guest_time_update(vcpu))
3075                                 continue;
3076                         if (vcpu->cpu != smp_processor_id())
3077                                 send_ipi++;
3078                 }
3079         }
3080         spin_unlock(&kvm_lock);
3081
3082         if (freq->old < freq->new && send_ipi) {
3083                 /*
3084                  * We upscale the frequency.  Must make the guest
3085                  * doesn't see old kvmclock values while running with
3086                  * the new frequency, otherwise we risk the guest sees
3087                  * time go backwards.
3088                  *
3089                  * In case we update the frequency for another cpu
3090                  * (which might be in guest context) send an interrupt
3091                  * to kick the cpu out of guest context.  Next time
3092                  * guest context is entered kvmclock will be updated,
3093                  * so the guest will not see stale values.
3094                  */
3095                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3096         }
3097         return 0;
3098 }
3099
3100 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3101         .notifier_call  = kvmclock_cpufreq_notifier
3102 };
3103
3104 int kvm_arch_init(void *opaque)
3105 {
3106         int r, cpu;
3107         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3108
3109         if (kvm_x86_ops) {
3110                 printk(KERN_ERR "kvm: already loaded the other module\n");
3111                 r = -EEXIST;
3112                 goto out;
3113         }
3114
3115         if (!ops->cpu_has_kvm_support()) {
3116                 printk(KERN_ERR "kvm: no hardware support\n");
3117                 r = -EOPNOTSUPP;
3118                 goto out;
3119         }
3120         if (ops->disabled_by_bios()) {
3121                 printk(KERN_ERR "kvm: disabled by bios\n");
3122                 r = -EOPNOTSUPP;
3123                 goto out;
3124         }
3125
3126         r = kvm_mmu_module_init();
3127         if (r)
3128                 goto out;
3129
3130         kvm_init_msr_list();
3131
3132         kvm_x86_ops = ops;
3133         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3134         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3135         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3136                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3137
3138         for_each_possible_cpu(cpu)
3139                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3140         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3141                 tsc_khz_ref = tsc_khz;
3142                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3143                                           CPUFREQ_TRANSITION_NOTIFIER);
3144         }
3145
3146         return 0;
3147
3148 out:
3149         return r;
3150 }
3151
3152 void kvm_arch_exit(void)
3153 {
3154         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3155                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3156                                             CPUFREQ_TRANSITION_NOTIFIER);
3157         kvm_x86_ops = NULL;
3158         kvm_mmu_module_exit();
3159 }
3160
3161 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3162 {
3163         ++vcpu->stat.halt_exits;
3164         if (irqchip_in_kernel(vcpu->kvm)) {
3165                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3166                 return 1;
3167         } else {
3168                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3169                 return 0;
3170         }
3171 }
3172 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3173
3174 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3175                            unsigned long a1)
3176 {
3177         if (is_long_mode(vcpu))
3178                 return a0;
3179         else
3180                 return a0 | ((gpa_t)a1 << 32);
3181 }
3182
3183 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3184 {
3185         unsigned long nr, a0, a1, a2, a3, ret;
3186         int r = 1;
3187
3188         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3189         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3190         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3191         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3192         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3193
3194         trace_kvm_hypercall(nr, a0, a1, a2, a3);
3195
3196         if (!is_long_mode(vcpu)) {
3197                 nr &= 0xFFFFFFFF;
3198                 a0 &= 0xFFFFFFFF;
3199                 a1 &= 0xFFFFFFFF;
3200                 a2 &= 0xFFFFFFFF;
3201                 a3 &= 0xFFFFFFFF;
3202         }
3203
3204         switch (nr) {
3205         case KVM_HC_VAPIC_POLL_IRQ:
3206                 ret = 0;
3207                 break;
3208         case KVM_HC_MMU_OP:
3209                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3210                 break;
3211         default:
3212                 ret = -KVM_ENOSYS;
3213                 break;
3214         }
3215         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3216         ++vcpu->stat.hypercalls;
3217         return r;
3218 }
3219 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3220
3221 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3222 {
3223         char instruction[3];
3224         int ret = 0;
3225         unsigned long rip = kvm_rip_read(vcpu);
3226
3227
3228         /*
3229          * Blow out the MMU to ensure that no other VCPU has an active mapping
3230          * to ensure that the updated hypercall appears atomically across all
3231          * VCPUs.
3232          */
3233         kvm_mmu_zap_all(vcpu->kvm);
3234
3235         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3236         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3237             != X86EMUL_CONTINUE)
3238                 ret = -EFAULT;
3239
3240         return ret;
3241 }
3242
3243 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3244 {
3245         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3246 }
3247
3248 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3249 {
3250         struct descriptor_table dt = { limit, base };
3251
3252         kvm_x86_ops->set_gdt(vcpu, &dt);
3253 }
3254
3255 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3256 {
3257         struct descriptor_table dt = { limit, base };
3258
3259         kvm_x86_ops->set_idt(vcpu, &dt);
3260 }
3261
3262 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3263                    unsigned long *rflags)
3264 {
3265         kvm_lmsw(vcpu, msw);
3266         *rflags = kvm_x86_ops->get_rflags(vcpu);
3267 }
3268
3269 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3270 {
3271         unsigned long value;
3272
3273         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3274         switch (cr) {
3275         case 0:
3276                 value = vcpu->arch.cr0;
3277                 break;
3278         case 2:
3279                 value = vcpu->arch.cr2;
3280                 break;
3281         case 3:
3282                 value = vcpu->arch.cr3;
3283                 break;
3284         case 4:
3285                 value = vcpu->arch.cr4;
3286                 break;
3287         case 8:
3288                 value = kvm_get_cr8(vcpu);
3289                 break;
3290         default:
3291                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3292                 return 0;
3293         }
3294
3295         return value;
3296 }
3297
3298 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3299                      unsigned long *rflags)
3300 {
3301         switch (cr) {
3302         case 0:
3303                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3304                 *rflags = kvm_x86_ops->get_rflags(vcpu);
3305                 break;
3306         case 2:
3307                 vcpu->arch.cr2 = val;
3308                 break;
3309         case 3:
3310                 kvm_set_cr3(vcpu, val);
3311                 break;
3312         case 4:
3313                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3314                 break;
3315         case 8:
3316                 kvm_set_cr8(vcpu, val & 0xfUL);
3317                 break;
3318         default:
3319                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3320         }
3321 }
3322
3323 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3324 {
3325         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3326         int j, nent = vcpu->arch.cpuid_nent;
3327
3328         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3329         /* when no next entry is found, the current entry[i] is reselected */
3330         for (j = i + 1; ; j = (j + 1) % nent) {
3331                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3332                 if (ej->function == e->function) {
3333                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3334                         return j;
3335                 }
3336         }
3337         return 0; /* silence gcc, even though control never reaches here */
3338 }
3339
3340 /* find an entry with matching function, matching index (if needed), and that
3341  * should be read next (if it's stateful) */
3342 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3343         u32 function, u32 index)
3344 {
3345         if (e->function != function)
3346                 return 0;
3347         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3348                 return 0;
3349         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3350             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3351                 return 0;
3352         return 1;
3353 }
3354
3355 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3356                                               u32 function, u32 index)
3357 {
3358         int i;
3359         struct kvm_cpuid_entry2 *best = NULL;
3360
3361         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3362                 struct kvm_cpuid_entry2 *e;
3363
3364                 e = &vcpu->arch.cpuid_entries[i];
3365                 if (is_matching_cpuid_entry(e, function, index)) {
3366                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3367                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3368                         best = e;
3369                         break;
3370                 }
3371                 /*
3372                  * Both basic or both extended?
3373                  */
3374                 if (((e->function ^ function) & 0x80000000) == 0)
3375                         if (!best || e->function > best->function)
3376                                 best = e;
3377         }
3378         return best;
3379 }
3380
3381 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3382 {
3383         struct kvm_cpuid_entry2 *best;
3384
3385         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3386         if (best)
3387                 return best->eax & 0xff;
3388         return 36;
3389 }
3390
3391 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3392 {
3393         u32 function, index;
3394         struct kvm_cpuid_entry2 *best;
3395
3396         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3397         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3398         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3399         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3400         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3401         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3402         best = kvm_find_cpuid_entry(vcpu, function, index);
3403         if (best) {
3404                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3405                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3406                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3407                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3408         }
3409         kvm_x86_ops->skip_emulated_instruction(vcpu);
3410         trace_kvm_cpuid(function,
3411                         kvm_register_read(vcpu, VCPU_REGS_RAX),
3412                         kvm_register_read(vcpu, VCPU_REGS_RBX),
3413                         kvm_register_read(vcpu, VCPU_REGS_RCX),
3414                         kvm_register_read(vcpu, VCPU_REGS_RDX));
3415 }
3416 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3417
3418 /*
3419  * Check if userspace requested an interrupt window, and that the
3420  * interrupt window is open.
3421  *
3422  * No need to exit to userspace if we already have an interrupt queued.
3423  */
3424 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3425                                           struct kvm_run *kvm_run)
3426 {
3427         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3428                 kvm_run->request_interrupt_window &&
3429                 kvm_arch_interrupt_allowed(vcpu));
3430 }
3431
3432 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3433                               struct kvm_run *kvm_run)
3434 {
3435         kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3436         kvm_run->cr8 = kvm_get_cr8(vcpu);
3437         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3438         if (irqchip_in_kernel(vcpu->kvm))
3439                 kvm_run->ready_for_interrupt_injection = 1;
3440         else
3441                 kvm_run->ready_for_interrupt_injection =
3442                         kvm_arch_interrupt_allowed(vcpu) &&
3443                         !kvm_cpu_has_interrupt(vcpu) &&
3444                         !kvm_event_needs_reinjection(vcpu);
3445 }
3446
3447 static void vapic_enter(struct kvm_vcpu *vcpu)
3448 {
3449         struct kvm_lapic *apic = vcpu->arch.apic;
3450         struct page *page;
3451
3452         if (!apic || !apic->vapic_addr)
3453                 return;
3454
3455         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3456
3457         vcpu->arch.apic->vapic_page = page;
3458 }
3459
3460 static void vapic_exit(struct kvm_vcpu *vcpu)
3461 {
3462         struct kvm_lapic *apic = vcpu->arch.apic;
3463
3464         if (!apic || !apic->vapic_addr)
3465                 return;
3466
3467         down_read(&vcpu->kvm->slots_lock);
3468         kvm_release_page_dirty(apic->vapic_page);
3469         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3470         up_read(&vcpu->kvm->slots_lock);
3471 }
3472
3473 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3474 {
3475         int max_irr, tpr;
3476
3477         if (!kvm_x86_ops->update_cr8_intercept)
3478                 return;
3479
3480         if (!vcpu->arch.apic->vapic_addr)
3481                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3482         else
3483                 max_irr = -1;
3484
3485         if (max_irr != -1)
3486                 max_irr >>= 4;
3487
3488         tpr = kvm_lapic_get_cr8(vcpu);
3489
3490         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3491 }
3492
3493 static void inject_pending_irq(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3494 {
3495         /* try to reinject previous events if any */
3496         if (vcpu->arch.nmi_injected) {
3497                 kvm_x86_ops->set_nmi(vcpu);
3498                 return;
3499         }
3500
3501         if (vcpu->arch.interrupt.pending) {
3502                 kvm_x86_ops->set_irq(vcpu);
3503                 return;
3504         }
3505
3506         /* try to inject new event if pending */
3507         if (vcpu->arch.nmi_pending) {
3508                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3509                         vcpu->arch.nmi_pending = false;
3510                         vcpu->arch.nmi_injected = true;
3511                         kvm_x86_ops->set_nmi(vcpu);
3512                 }
3513         } else if (kvm_cpu_has_interrupt(vcpu)) {
3514                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3515                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3516                                             false);
3517                         kvm_x86_ops->set_irq(vcpu);
3518                 }
3519         }
3520 }
3521
3522 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3523 {
3524         int r;
3525         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3526                 kvm_run->request_interrupt_window;
3527
3528         if (vcpu->requests)
3529                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3530                         kvm_mmu_unload(vcpu);
3531
3532         r = kvm_mmu_reload(vcpu);
3533         if (unlikely(r))
3534                 goto out;
3535
3536         if (vcpu->requests) {
3537                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3538                         __kvm_migrate_timers(vcpu);
3539                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3540                         kvm_write_guest_time(vcpu);
3541                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3542                         kvm_mmu_sync_roots(vcpu);
3543                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3544                         kvm_x86_ops->tlb_flush(vcpu);
3545                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3546                                        &vcpu->requests)) {
3547                         kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3548                         r = 0;
3549                         goto out;
3550                 }
3551                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3552                         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3553                         r = 0;
3554                         goto out;
3555                 }
3556         }
3557
3558         preempt_disable();
3559
3560         kvm_x86_ops->prepare_guest_switch(vcpu);
3561         kvm_load_guest_fpu(vcpu);
3562
3563         local_irq_disable();
3564
3565         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3566         smp_mb__after_clear_bit();
3567
3568         if (vcpu->requests || need_resched() || signal_pending(current)) {
3569                 set_bit(KVM_REQ_KICK, &vcpu->requests);
3570                 local_irq_enable();
3571                 preempt_enable();
3572                 r = 1;
3573                 goto out;
3574         }
3575
3576         if (vcpu->arch.exception.pending)
3577                 __queue_exception(vcpu);
3578         else
3579                 inject_pending_irq(vcpu, kvm_run);
3580
3581         /* enable NMI/IRQ window open exits if needed */
3582         if (vcpu->arch.nmi_pending)
3583                 kvm_x86_ops->enable_nmi_window(vcpu);
3584         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3585                 kvm_x86_ops->enable_irq_window(vcpu);
3586
3587         if (kvm_lapic_enabled(vcpu)) {
3588                 update_cr8_intercept(vcpu);
3589                 kvm_lapic_sync_to_vapic(vcpu);
3590         }
3591
3592         up_read(&vcpu->kvm->slots_lock);
3593
3594         kvm_guest_enter();
3595
3596         get_debugreg(vcpu->arch.host_dr6, 6);
3597         get_debugreg(vcpu->arch.host_dr7, 7);
3598         if (unlikely(vcpu->arch.switch_db_regs)) {
3599                 get_debugreg(vcpu->arch.host_db[0], 0);
3600                 get_debugreg(vcpu->arch.host_db[1], 1);
3601                 get_debugreg(vcpu->arch.host_db[2], 2);
3602                 get_debugreg(vcpu->arch.host_db[3], 3);
3603
3604                 set_debugreg(0, 7);
3605                 set_debugreg(vcpu->arch.eff_db[0], 0);
3606                 set_debugreg(vcpu->arch.eff_db[1], 1);
3607                 set_debugreg(vcpu->arch.eff_db[2], 2);
3608                 set_debugreg(vcpu->arch.eff_db[3], 3);
3609         }
3610
3611         trace_kvm_entry(vcpu->vcpu_id);
3612         kvm_x86_ops->run(vcpu, kvm_run);
3613
3614         if (unlikely(vcpu->arch.switch_db_regs)) {
3615                 set_debugreg(0, 7);
3616                 set_debugreg(vcpu->arch.host_db[0], 0);
3617                 set_debugreg(vcpu->arch.host_db[1], 1);
3618                 set_debugreg(vcpu->arch.host_db[2], 2);
3619                 set_debugreg(vcpu->arch.host_db[3], 3);
3620         }
3621         set_debugreg(vcpu->arch.host_dr6, 6);
3622         set_debugreg(vcpu->arch.host_dr7, 7);
3623
3624         set_bit(KVM_REQ_KICK, &vcpu->requests);
3625         local_irq_enable();
3626
3627         ++vcpu->stat.exits;
3628
3629         /*
3630          * We must have an instruction between local_irq_enable() and
3631          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3632          * the interrupt shadow.  The stat.exits increment will do nicely.
3633          * But we need to prevent reordering, hence this barrier():
3634          */
3635         barrier();
3636
3637         kvm_guest_exit();
3638
3639         preempt_enable();
3640
3641         down_read(&vcpu->kvm->slots_lock);
3642
3643         /*
3644          * Profile KVM exit RIPs:
3645          */
3646         if (unlikely(prof_on == KVM_PROFILING)) {
3647                 unsigned long rip = kvm_rip_read(vcpu);
3648                 profile_hit(KVM_PROFILING, (void *)rip);
3649         }
3650
3651
3652         kvm_lapic_sync_from_vapic(vcpu);
3653
3654         r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3655 out:
3656         return r;
3657 }
3658
3659
3660 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3661 {
3662         int r;
3663
3664         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3665                 pr_debug("vcpu %d received sipi with vector # %x\n",
3666                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3667                 kvm_lapic_reset(vcpu);
3668                 r = kvm_arch_vcpu_reset(vcpu);
3669                 if (r)
3670                         return r;
3671                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3672         }
3673
3674         down_read(&vcpu->kvm->slots_lock);
3675         vapic_enter(vcpu);
3676
3677         r = 1;
3678         while (r > 0) {
3679                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3680                         r = vcpu_enter_guest(vcpu, kvm_run);
3681                 else {
3682                         up_read(&vcpu->kvm->slots_lock);
3683                         kvm_vcpu_block(vcpu);
3684                         down_read(&vcpu->kvm->slots_lock);
3685                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3686                         {
3687                                 switch(vcpu->arch.mp_state) {
3688                                 case KVM_MP_STATE_HALTED:
3689                                         vcpu->arch.mp_state =
3690                                                 KVM_MP_STATE_RUNNABLE;
3691                                 case KVM_MP_STATE_RUNNABLE:
3692                                         break;
3693                                 case KVM_MP_STATE_SIPI_RECEIVED:
3694                                 default:
3695                                         r = -EINTR;
3696                                         break;
3697                                 }
3698                         }
3699                 }
3700
3701                 if (r <= 0)
3702                         break;
3703
3704                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3705                 if (kvm_cpu_has_pending_timer(vcpu))
3706                         kvm_inject_pending_timer_irqs(vcpu);
3707
3708                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3709                         r = -EINTR;
3710                         kvm_run->exit_reason = KVM_EXIT_INTR;
3711                         ++vcpu->stat.request_irq_exits;
3712                 }
3713                 if (signal_pending(current)) {
3714                         r = -EINTR;
3715                         kvm_run->exit_reason = KVM_EXIT_INTR;
3716                         ++vcpu->stat.signal_exits;
3717                 }
3718                 if (need_resched()) {
3719                         up_read(&vcpu->kvm->slots_lock);
3720                         kvm_resched(vcpu);
3721                         down_read(&vcpu->kvm->slots_lock);
3722                 }
3723         }
3724
3725         up_read(&vcpu->kvm->slots_lock);
3726         post_kvm_run_save(vcpu, kvm_run);
3727
3728         vapic_exit(vcpu);
3729
3730         return r;
3731 }
3732
3733 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3734 {
3735         int r;
3736         sigset_t sigsaved;
3737
3738         vcpu_load(vcpu);
3739
3740         if (vcpu->sigset_active)
3741                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3742
3743         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3744                 kvm_vcpu_block(vcpu);
3745                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3746                 r = -EAGAIN;
3747                 goto out;
3748         }
3749
3750         /* re-sync apic's tpr */
3751         if (!irqchip_in_kernel(vcpu->kvm))
3752                 kvm_set_cr8(vcpu, kvm_run->cr8);
3753
3754         if (vcpu->arch.pio.cur_count) {
3755                 r = complete_pio(vcpu);
3756                 if (r)
3757                         goto out;
3758         }
3759 #if CONFIG_HAS_IOMEM
3760         if (vcpu->mmio_needed) {
3761                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3762                 vcpu->mmio_read_completed = 1;
3763                 vcpu->mmio_needed = 0;
3764
3765                 down_read(&vcpu->kvm->slots_lock);
3766                 r = emulate_instruction(vcpu, kvm_run,
3767                                         vcpu->arch.mmio_fault_cr2, 0,
3768                                         EMULTYPE_NO_DECODE);
3769                 up_read(&vcpu->kvm->slots_lock);
3770                 if (r == EMULATE_DO_MMIO) {
3771                         /*
3772                          * Read-modify-write.  Back to userspace.
3773                          */
3774                         r = 0;
3775                         goto out;
3776                 }
3777         }
3778 #endif
3779         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3780                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3781                                      kvm_run->hypercall.ret);
3782
3783         r = __vcpu_run(vcpu, kvm_run);
3784
3785 out:
3786         if (vcpu->sigset_active)
3787                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3788
3789         vcpu_put(vcpu);
3790         return r;
3791 }
3792
3793 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3794 {
3795         vcpu_load(vcpu);
3796
3797         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3798         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3799         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3800         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3801         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3802         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3803         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3804         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3805 #ifdef CONFIG_X86_64
3806         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3807         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3808         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3809         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3810         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3811         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3812         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3813         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3814 #endif
3815
3816         regs->rip = kvm_rip_read(vcpu);
3817         regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3818
3819         /*
3820          * Don't leak debug flags in case they were set for guest debugging
3821          */
3822         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3823                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3824
3825         vcpu_put(vcpu);
3826
3827         return 0;
3828 }
3829
3830 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3831 {
3832         vcpu_load(vcpu);
3833
3834         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3835         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3836         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3837         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3838         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3839         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3840         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3841         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3842 #ifdef CONFIG_X86_64
3843         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3844         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3845         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3846         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3847         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3848         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3849         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3850         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3851
3852 #endif
3853
3854         kvm_rip_write(vcpu, regs->rip);
3855         kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3856
3857
3858         vcpu->arch.exception.pending = false;
3859
3860         vcpu_put(vcpu);
3861
3862         return 0;
3863 }
3864
3865 void kvm_get_segment(struct kvm_vcpu *vcpu,
3866                      struct kvm_segment *var, int seg)
3867 {
3868         kvm_x86_ops->get_segment(vcpu, var, seg);
3869 }
3870
3871 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3872 {
3873         struct kvm_segment cs;
3874
3875         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3876         *db = cs.db;
3877         *l = cs.l;
3878 }
3879 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3880
3881 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3882                                   struct kvm_sregs *sregs)
3883 {
3884         struct descriptor_table dt;
3885
3886         vcpu_load(vcpu);
3887
3888         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3889         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3890         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3891         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3892         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3893         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3894
3895         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3896         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3897
3898         kvm_x86_ops->get_idt(vcpu, &dt);
3899         sregs->idt.limit = dt.limit;
3900         sregs->idt.base = dt.base;
3901         kvm_x86_ops->get_gdt(vcpu, &dt);
3902         sregs->gdt.limit = dt.limit;
3903         sregs->gdt.base = dt.base;
3904
3905         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3906         sregs->cr0 = vcpu->arch.cr0;
3907         sregs->cr2 = vcpu->arch.cr2;
3908         sregs->cr3 = vcpu->arch.cr3;
3909         sregs->cr4 = vcpu->arch.cr4;
3910         sregs->cr8 = kvm_get_cr8(vcpu);
3911         sregs->efer = vcpu->arch.shadow_efer;
3912         sregs->apic_base = kvm_get_apic_base(vcpu);
3913
3914         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3915
3916         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3917                 set_bit(vcpu->arch.interrupt.nr,
3918                         (unsigned long *)sregs->interrupt_bitmap);
3919
3920         vcpu_put(vcpu);
3921
3922         return 0;
3923 }
3924
3925 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3926                                     struct kvm_mp_state *mp_state)
3927 {
3928         vcpu_load(vcpu);
3929         mp_state->mp_state = vcpu->arch.mp_state;
3930         vcpu_put(vcpu);
3931         return 0;
3932 }
3933
3934 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3935                                     struct kvm_mp_state *mp_state)
3936 {
3937         vcpu_load(vcpu);
3938         vcpu->arch.mp_state = mp_state->mp_state;
3939         vcpu_put(vcpu);
3940         return 0;
3941 }
3942
3943 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3944                         struct kvm_segment *var, int seg)
3945 {
3946         kvm_x86_ops->set_segment(vcpu, var, seg);
3947 }
3948
3949 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3950                                    struct kvm_segment *kvm_desct)
3951 {
3952         kvm_desct->base = seg_desc->base0;
3953         kvm_desct->base |= seg_desc->base1 << 16;
3954         kvm_desct->base |= seg_desc->base2 << 24;
3955         kvm_desct->limit = seg_desc->limit0;
3956         kvm_desct->limit |= seg_desc->limit << 16;
3957         if (seg_desc->g) {
3958                 kvm_desct->limit <<= 12;
3959                 kvm_desct->limit |= 0xfff;
3960         }
3961         kvm_desct->selector = selector;
3962         kvm_desct->type = seg_desc->type;
3963         kvm_desct->present = seg_desc->p;
3964         kvm_desct->dpl = seg_desc->dpl;
3965         kvm_desct->db = seg_desc->d;
3966         kvm_desct->s = seg_desc->s;
3967         kvm_desct->l = seg_desc->l;
3968         kvm_desct->g = seg_desc->g;
3969         kvm_desct->avl = seg_desc->avl;
3970         if (!selector)
3971                 kvm_desct->unusable = 1;
3972         else
3973                 kvm_desct->unusable = 0;
3974         kvm_desct->padding = 0;
3975 }
3976
3977 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3978                                           u16 selector,
3979                                           struct descriptor_table *dtable)
3980 {
3981         if (selector & 1 << 2) {
3982                 struct kvm_segment kvm_seg;
3983
3984                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3985
3986                 if (kvm_seg.unusable)
3987                         dtable->limit = 0;
3988                 else
3989                         dtable->limit = kvm_seg.limit;
3990                 dtable->base = kvm_seg.base;
3991         }
3992         else
3993                 kvm_x86_ops->get_gdt(vcpu, dtable);
3994 }
3995
3996 /* allowed just for 8 bytes segments */
3997 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3998                                          struct desc_struct *seg_desc)
3999 {
4000         gpa_t gpa;
4001         struct descriptor_table dtable;
4002         u16 index = selector >> 3;
4003
4004         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4005
4006         if (dtable.limit < index * 8 + 7) {
4007                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4008                 return 1;
4009         }
4010         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
4011         gpa += index * 8;
4012         return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
4013 }
4014
4015 /* allowed just for 8 bytes segments */
4016 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4017                                          struct desc_struct *seg_desc)
4018 {
4019         gpa_t gpa;
4020         struct descriptor_table dtable;
4021         u16 index = selector >> 3;
4022
4023         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4024
4025         if (dtable.limit < index * 8 + 7)
4026                 return 1;
4027         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
4028         gpa += index * 8;
4029         return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
4030 }
4031
4032 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
4033                              struct desc_struct *seg_desc)
4034 {
4035         u32 base_addr;
4036
4037         base_addr = seg_desc->base0;
4038         base_addr |= (seg_desc->base1 << 16);
4039         base_addr |= (seg_desc->base2 << 24);
4040
4041         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4042 }
4043
4044 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4045 {
4046         struct kvm_segment kvm_seg;
4047
4048         kvm_get_segment(vcpu, &kvm_seg, seg);
4049         return kvm_seg.selector;
4050 }
4051
4052 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4053                                                 u16 selector,
4054                                                 struct kvm_segment *kvm_seg)
4055 {
4056         struct desc_struct seg_desc;
4057
4058         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4059                 return 1;
4060         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4061         return 0;
4062 }
4063
4064 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4065 {
4066         struct kvm_segment segvar = {
4067                 .base = selector << 4,
4068                 .limit = 0xffff,
4069                 .selector = selector,
4070                 .type = 3,
4071                 .present = 1,
4072                 .dpl = 3,
4073                 .db = 0,
4074                 .s = 1,
4075                 .l = 0,
4076                 .g = 0,
4077                 .avl = 0,
4078                 .unusable = 0,
4079         };
4080         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4081         return 0;
4082 }
4083
4084 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4085                                 int type_bits, int seg)
4086 {
4087         struct kvm_segment kvm_seg;
4088
4089         if (!(vcpu->arch.cr0 & X86_CR0_PE))
4090                 return kvm_load_realmode_segment(vcpu, selector, seg);
4091         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4092                 return 1;
4093         kvm_seg.type |= type_bits;
4094
4095         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4096             seg != VCPU_SREG_LDTR)
4097                 if (!kvm_seg.s)
4098                         kvm_seg.unusable = 1;
4099
4100         kvm_set_segment(vcpu, &kvm_seg, seg);
4101         return 0;
4102 }
4103
4104 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4105                                 struct tss_segment_32 *tss)
4106 {
4107         tss->cr3 = vcpu->arch.cr3;
4108         tss->eip = kvm_rip_read(vcpu);
4109         tss->eflags = kvm_x86_ops->get_rflags(vcpu);
4110         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4111         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4112         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4113         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4114         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4115         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4116         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4117         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4118         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4119         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4120         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4121         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4122         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4123         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4124         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4125 }
4126
4127 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4128                                   struct tss_segment_32 *tss)
4129 {
4130         kvm_set_cr3(vcpu, tss->cr3);
4131
4132         kvm_rip_write(vcpu, tss->eip);
4133         kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
4134
4135         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4136         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4137         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4138         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4139         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4140         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4141         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4142         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4143
4144         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4145                 return 1;
4146
4147         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4148                 return 1;
4149
4150         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4151                 return 1;
4152
4153         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4154                 return 1;
4155
4156         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4157                 return 1;
4158
4159         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4160                 return 1;
4161
4162         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4163                 return 1;
4164         return 0;
4165 }
4166
4167 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4168                                 struct tss_segment_16 *tss)
4169 {
4170         tss->ip = kvm_rip_read(vcpu);
4171         tss->flag = kvm_x86_ops->get_rflags(vcpu);
4172         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4173         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4174         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4175         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4176         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4177         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4178         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4179         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4180
4181         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4182         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4183         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4184         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4185         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4186         tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
4187 }
4188
4189 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4190                                  struct tss_segment_16 *tss)
4191 {
4192         kvm_rip_write(vcpu, tss->ip);
4193         kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
4194         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4195         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4196         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4197         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4198         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4199         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4200         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4201         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4202
4203         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4204                 return 1;
4205
4206         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4207                 return 1;
4208
4209         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4210                 return 1;
4211
4212         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4213                 return 1;
4214
4215         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4216                 return 1;
4217         return 0;
4218 }
4219
4220 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4221                               u16 old_tss_sel, u32 old_tss_base,
4222                               struct desc_struct *nseg_desc)
4223 {
4224         struct tss_segment_16 tss_segment_16;
4225         int ret = 0;
4226
4227         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4228                            sizeof tss_segment_16))
4229                 goto out;
4230
4231         save_state_to_tss16(vcpu, &tss_segment_16);
4232
4233         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4234                             sizeof tss_segment_16))
4235                 goto out;
4236
4237         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4238                            &tss_segment_16, sizeof tss_segment_16))
4239                 goto out;
4240
4241         if (old_tss_sel != 0xffff) {
4242                 tss_segment_16.prev_task_link = old_tss_sel;
4243
4244                 if (kvm_write_guest(vcpu->kvm,
4245                                     get_tss_base_addr(vcpu, nseg_desc),
4246                                     &tss_segment_16.prev_task_link,
4247                                     sizeof tss_segment_16.prev_task_link))
4248                         goto out;
4249         }
4250
4251         if (load_state_from_tss16(vcpu, &tss_segment_16))
4252                 goto out;
4253
4254         ret = 1;
4255 out:
4256         return ret;
4257 }
4258
4259 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4260                        u16 old_tss_sel, u32 old_tss_base,
4261                        struct desc_struct *nseg_desc)
4262 {
4263         struct tss_segment_32 tss_segment_32;
4264         int ret = 0;
4265
4266         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4267                            sizeof tss_segment_32))
4268                 goto out;
4269
4270         save_state_to_tss32(vcpu, &tss_segment_32);
4271
4272         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4273                             sizeof tss_segment_32))
4274                 goto out;
4275
4276         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4277                            &tss_segment_32, sizeof tss_segment_32))
4278                 goto out;
4279
4280         if (old_tss_sel != 0xffff) {
4281                 tss_segment_32.prev_task_link = old_tss_sel;
4282
4283                 if (kvm_write_guest(vcpu->kvm,
4284                                     get_tss_base_addr(vcpu, nseg_desc),
4285                                     &tss_segment_32.prev_task_link,
4286                                     sizeof tss_segment_32.prev_task_link))
4287                         goto out;
4288         }
4289
4290         if (load_state_from_tss32(vcpu, &tss_segment_32))
4291                 goto out;
4292
4293         ret = 1;
4294 out:
4295         return ret;
4296 }
4297
4298 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4299 {
4300         struct kvm_segment tr_seg;
4301         struct desc_struct cseg_desc;
4302         struct desc_struct nseg_desc;
4303         int ret = 0;
4304         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4305         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4306
4307         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4308
4309         /* FIXME: Handle errors. Failure to read either TSS or their
4310          * descriptors should generate a pagefault.
4311          */
4312         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4313                 goto out;
4314
4315         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4316                 goto out;
4317
4318         if (reason != TASK_SWITCH_IRET) {
4319                 int cpl;
4320
4321                 cpl = kvm_x86_ops->get_cpl(vcpu);
4322                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4323                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4324                         return 1;
4325                 }
4326         }
4327
4328         if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
4329                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4330                 return 1;
4331         }
4332
4333         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4334                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4335                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4336         }
4337
4338         if (reason == TASK_SWITCH_IRET) {
4339                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4340                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4341         }
4342
4343         /* set back link to prev task only if NT bit is set in eflags
4344            note that old_tss_sel is not used afetr this point */
4345         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4346                 old_tss_sel = 0xffff;
4347
4348         /* set back link to prev task only if NT bit is set in eflags
4349            note that old_tss_sel is not used afetr this point */
4350         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4351                 old_tss_sel = 0xffff;
4352
4353         if (nseg_desc.type & 8)
4354                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4355                                          old_tss_base, &nseg_desc);
4356         else
4357                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4358                                          old_tss_base, &nseg_desc);
4359
4360         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4361                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4362                 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4363         }
4364
4365         if (reason != TASK_SWITCH_IRET) {
4366                 nseg_desc.type |= (1 << 1);
4367                 save_guest_segment_descriptor(vcpu, tss_selector,
4368                                               &nseg_desc);
4369         }
4370
4371         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4372         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4373         tr_seg.type = 11;
4374         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4375 out:
4376         return ret;
4377 }
4378 EXPORT_SYMBOL_GPL(kvm_task_switch);
4379
4380 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4381                                   struct kvm_sregs *sregs)
4382 {
4383         int mmu_reset_needed = 0;
4384         int pending_vec, max_bits;
4385         struct descriptor_table dt;
4386
4387         vcpu_load(vcpu);
4388
4389         dt.limit = sregs->idt.limit;
4390         dt.base = sregs->idt.base;
4391         kvm_x86_ops->set_idt(vcpu, &dt);
4392         dt.limit = sregs->gdt.limit;
4393         dt.base = sregs->gdt.base;
4394         kvm_x86_ops->set_gdt(vcpu, &dt);
4395
4396         vcpu->arch.cr2 = sregs->cr2;
4397         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4398         vcpu->arch.cr3 = sregs->cr3;
4399
4400         kvm_set_cr8(vcpu, sregs->cr8);
4401
4402         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4403         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4404         kvm_set_apic_base(vcpu, sregs->apic_base);
4405
4406         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4407
4408         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4409         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4410         vcpu->arch.cr0 = sregs->cr0;
4411
4412         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4413         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4414         if (!is_long_mode(vcpu) && is_pae(vcpu))
4415                 load_pdptrs(vcpu, vcpu->arch.cr3);
4416
4417         if (mmu_reset_needed)
4418                 kvm_mmu_reset_context(vcpu);
4419
4420         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4421         pending_vec = find_first_bit(
4422                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4423         if (pending_vec < max_bits) {
4424                 kvm_queue_interrupt(vcpu, pending_vec, false);
4425                 pr_debug("Set back pending irq %d\n", pending_vec);
4426                 if (irqchip_in_kernel(vcpu->kvm))
4427                         kvm_pic_clear_isr_ack(vcpu->kvm);
4428         }
4429
4430         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4431         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4432         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4433         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4434         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4435         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4436
4437         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4438         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4439
4440         /* Older userspace won't unhalt the vcpu on reset. */
4441         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4442             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4443             !(vcpu->arch.cr0 & X86_CR0_PE))
4444                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4445
4446         vcpu_put(vcpu);
4447
4448         return 0;
4449 }
4450
4451 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4452                                         struct kvm_guest_debug *dbg)
4453 {
4454         int i, r;
4455
4456         vcpu_load(vcpu);
4457
4458         if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4459             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4460                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4461                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4462                 vcpu->arch.switch_db_regs =
4463                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4464         } else {
4465                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4466                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4467                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4468         }
4469
4470         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4471
4472         if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4473                 kvm_queue_exception(vcpu, DB_VECTOR);
4474         else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4475                 kvm_queue_exception(vcpu, BP_VECTOR);
4476
4477         vcpu_put(vcpu);
4478
4479         return r;
4480 }
4481
4482 /*
4483  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4484  * we have asm/x86/processor.h
4485  */
4486 struct fxsave {
4487         u16     cwd;
4488         u16     swd;
4489         u16     twd;
4490         u16     fop;
4491         u64     rip;
4492         u64     rdp;
4493         u32     mxcsr;
4494         u32     mxcsr_mask;
4495         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4496 #ifdef CONFIG_X86_64
4497         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4498 #else
4499         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4500 #endif
4501 };
4502
4503 /*
4504  * Translate a guest virtual address to a guest physical address.
4505  */
4506 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4507                                     struct kvm_translation *tr)
4508 {
4509         unsigned long vaddr = tr->linear_address;
4510         gpa_t gpa;
4511
4512         vcpu_load(vcpu);
4513         down_read(&vcpu->kvm->slots_lock);
4514         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4515         up_read(&vcpu->kvm->slots_lock);
4516         tr->physical_address = gpa;
4517         tr->valid = gpa != UNMAPPED_GVA;
4518         tr->writeable = 1;
4519         tr->usermode = 0;
4520         vcpu_put(vcpu);
4521
4522         return 0;
4523 }
4524
4525 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4526 {
4527         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4528
4529         vcpu_load(vcpu);
4530
4531         memcpy(fpu->fpr, fxsave->st_space, 128);
4532         fpu->fcw = fxsave->cwd;
4533         fpu->fsw = fxsave->swd;
4534         fpu->ftwx = fxsave->twd;
4535         fpu->last_opcode = fxsave->fop;
4536         fpu->last_ip = fxsave->rip;
4537         fpu->last_dp = fxsave->rdp;
4538         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4539
4540         vcpu_put(vcpu);
4541
4542         return 0;
4543 }
4544
4545 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4546 {
4547         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4548
4549         vcpu_load(vcpu);
4550
4551         memcpy(fxsave->st_space, fpu->fpr, 128);
4552         fxsave->cwd = fpu->fcw;
4553         fxsave->swd = fpu->fsw;
4554         fxsave->twd = fpu->ftwx;
4555         fxsave->fop = fpu->last_opcode;
4556         fxsave->rip = fpu->last_ip;
4557         fxsave->rdp = fpu->last_dp;
4558         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4559
4560         vcpu_put(vcpu);
4561
4562         return 0;
4563 }
4564
4565 void fx_init(struct kvm_vcpu *vcpu)
4566 {
4567         unsigned after_mxcsr_mask;
4568
4569         /*
4570          * Touch the fpu the first time in non atomic context as if
4571          * this is the first fpu instruction the exception handler
4572          * will fire before the instruction returns and it'll have to
4573          * allocate ram with GFP_KERNEL.
4574          */
4575         if (!used_math())
4576                 kvm_fx_save(&vcpu->arch.host_fx_image);
4577
4578         /* Initialize guest FPU by resetting ours and saving into guest's */
4579         preempt_disable();
4580         kvm_fx_save(&vcpu->arch.host_fx_image);
4581         kvm_fx_finit();
4582         kvm_fx_save(&vcpu->arch.guest_fx_image);
4583         kvm_fx_restore(&vcpu->arch.host_fx_image);
4584         preempt_enable();
4585
4586         vcpu->arch.cr0 |= X86_CR0_ET;
4587         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4588         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4589         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4590                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4591 }
4592 EXPORT_SYMBOL_GPL(fx_init);
4593
4594 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4595 {
4596         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4597                 return;
4598
4599         vcpu->guest_fpu_loaded = 1;
4600         kvm_fx_save(&vcpu->arch.host_fx_image);
4601         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4602 }
4603 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4604
4605 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4606 {
4607         if (!vcpu->guest_fpu_loaded)
4608                 return;
4609
4610         vcpu->guest_fpu_loaded = 0;
4611         kvm_fx_save(&vcpu->arch.guest_fx_image);
4612         kvm_fx_restore(&vcpu->arch.host_fx_image);
4613         ++vcpu->stat.fpu_reload;
4614 }
4615 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4616
4617 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4618 {
4619         if (vcpu->arch.time_page) {
4620                 kvm_release_page_dirty(vcpu->arch.time_page);
4621                 vcpu->arch.time_page = NULL;
4622         }
4623
4624         kvm_x86_ops->vcpu_free(vcpu);
4625 }
4626
4627 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4628                                                 unsigned int id)
4629 {
4630         return kvm_x86_ops->vcpu_create(kvm, id);
4631 }
4632
4633 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4634 {
4635         int r;
4636
4637         /* We do fxsave: this must be aligned. */
4638         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4639
4640         vcpu->arch.mtrr_state.have_fixed = 1;
4641         vcpu_load(vcpu);
4642         r = kvm_arch_vcpu_reset(vcpu);
4643         if (r == 0)
4644                 r = kvm_mmu_setup(vcpu);
4645         vcpu_put(vcpu);
4646         if (r < 0)
4647                 goto free_vcpu;
4648
4649         return 0;
4650 free_vcpu:
4651         kvm_x86_ops->vcpu_free(vcpu);
4652         return r;
4653 }
4654
4655 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4656 {
4657         vcpu_load(vcpu);
4658         kvm_mmu_unload(vcpu);
4659         vcpu_put(vcpu);
4660
4661         kvm_x86_ops->vcpu_free(vcpu);
4662 }
4663
4664 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4665 {
4666         vcpu->arch.nmi_pending = false;
4667         vcpu->arch.nmi_injected = false;
4668
4669         vcpu->arch.switch_db_regs = 0;
4670         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4671         vcpu->arch.dr6 = DR6_FIXED_1;
4672         vcpu->arch.dr7 = DR7_FIXED_1;
4673
4674         return kvm_x86_ops->vcpu_reset(vcpu);
4675 }
4676
4677 void kvm_arch_hardware_enable(void *garbage)
4678 {
4679         kvm_x86_ops->hardware_enable(garbage);
4680 }
4681
4682 void kvm_arch_hardware_disable(void *garbage)
4683 {
4684         kvm_x86_ops->hardware_disable(garbage);
4685 }
4686
4687 int kvm_arch_hardware_setup(void)
4688 {
4689         return kvm_x86_ops->hardware_setup();
4690 }
4691
4692 void kvm_arch_hardware_unsetup(void)
4693 {
4694         kvm_x86_ops->hardware_unsetup();
4695 }
4696
4697 void kvm_arch_check_processor_compat(void *rtn)
4698 {
4699         kvm_x86_ops->check_processor_compatibility(rtn);
4700 }
4701
4702 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4703 {
4704         struct page *page;
4705         struct kvm *kvm;
4706         int r;
4707
4708         BUG_ON(vcpu->kvm == NULL);
4709         kvm = vcpu->kvm;
4710
4711         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4712         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4713                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4714         else
4715                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4716
4717         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4718         if (!page) {
4719                 r = -ENOMEM;
4720                 goto fail;
4721         }
4722         vcpu->arch.pio_data = page_address(page);
4723
4724         r = kvm_mmu_create(vcpu);
4725         if (r < 0)
4726                 goto fail_free_pio_data;
4727
4728         if (irqchip_in_kernel(kvm)) {
4729                 r = kvm_create_lapic(vcpu);
4730                 if (r < 0)
4731                         goto fail_mmu_destroy;
4732         }
4733
4734         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4735                                        GFP_KERNEL);
4736         if (!vcpu->arch.mce_banks) {
4737                 r = -ENOMEM;
4738                 goto fail_mmu_destroy;
4739         }
4740         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4741
4742         return 0;
4743
4744 fail_mmu_destroy:
4745         kvm_mmu_destroy(vcpu);
4746 fail_free_pio_data:
4747         free_page((unsigned long)vcpu->arch.pio_data);
4748 fail:
4749         return r;
4750 }
4751
4752 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4753 {
4754         kvm_free_lapic(vcpu);
4755         down_read(&vcpu->kvm->slots_lock);
4756         kvm_mmu_destroy(vcpu);
4757         up_read(&vcpu->kvm->slots_lock);
4758         free_page((unsigned long)vcpu->arch.pio_data);
4759 }
4760
4761 struct  kvm *kvm_arch_create_vm(void)
4762 {
4763         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4764
4765         if (!kvm)
4766                 return ERR_PTR(-ENOMEM);
4767
4768         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4769         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4770
4771         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4772         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4773
4774         rdtscll(kvm->arch.vm_init_tsc);
4775
4776         return kvm;
4777 }
4778
4779 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4780 {
4781         vcpu_load(vcpu);
4782         kvm_mmu_unload(vcpu);
4783         vcpu_put(vcpu);
4784 }
4785
4786 static void kvm_free_vcpus(struct kvm *kvm)
4787 {
4788         unsigned int i;
4789         struct kvm_vcpu *vcpu;
4790
4791         /*
4792          * Unpin any mmu pages first.
4793          */
4794         kvm_for_each_vcpu(i, vcpu, kvm)
4795                 kvm_unload_vcpu_mmu(vcpu);
4796         kvm_for_each_vcpu(i, vcpu, kvm)
4797                 kvm_arch_vcpu_free(vcpu);
4798
4799         mutex_lock(&kvm->lock);
4800         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4801                 kvm->vcpus[i] = NULL;
4802
4803         atomic_set(&kvm->online_vcpus, 0);
4804         mutex_unlock(&kvm->lock);
4805 }
4806
4807 void kvm_arch_sync_events(struct kvm *kvm)
4808 {
4809         kvm_free_all_assigned_devices(kvm);
4810 }
4811
4812 void kvm_arch_destroy_vm(struct kvm *kvm)
4813 {
4814         kvm_iommu_unmap_guest(kvm);
4815         kvm_free_pit(kvm);
4816         kfree(kvm->arch.vpic);
4817         kfree(kvm->arch.vioapic);
4818         kvm_free_vcpus(kvm);
4819         kvm_free_physmem(kvm);
4820         if (kvm->arch.apic_access_page)
4821                 put_page(kvm->arch.apic_access_page);
4822         if (kvm->arch.ept_identity_pagetable)
4823                 put_page(kvm->arch.ept_identity_pagetable);
4824         kfree(kvm);
4825 }
4826
4827 int kvm_arch_set_memory_region(struct kvm *kvm,
4828                                 struct kvm_userspace_memory_region *mem,
4829                                 struct kvm_memory_slot old,
4830                                 int user_alloc)
4831 {
4832         int npages = mem->memory_size >> PAGE_SHIFT;
4833         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4834
4835         /*To keep backward compatibility with older userspace,
4836          *x86 needs to hanlde !user_alloc case.
4837          */
4838         if (!user_alloc) {
4839                 if (npages && !old.rmap) {
4840                         unsigned long userspace_addr;
4841
4842                         down_write(&current->mm->mmap_sem);
4843                         userspace_addr = do_mmap(NULL, 0,
4844                                                  npages * PAGE_SIZE,
4845                                                  PROT_READ | PROT_WRITE,
4846                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4847                                                  0);
4848                         up_write(&current->mm->mmap_sem);
4849
4850                         if (IS_ERR((void *)userspace_addr))
4851                                 return PTR_ERR((void *)userspace_addr);
4852
4853                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4854                         spin_lock(&kvm->mmu_lock);
4855                         memslot->userspace_addr = userspace_addr;
4856                         spin_unlock(&kvm->mmu_lock);
4857                 } else {
4858                         if (!old.user_alloc && old.rmap) {
4859                                 int ret;
4860
4861                                 down_write(&current->mm->mmap_sem);
4862                                 ret = do_munmap(current->mm, old.userspace_addr,
4863                                                 old.npages * PAGE_SIZE);
4864                                 up_write(&current->mm->mmap_sem);
4865                                 if (ret < 0)
4866                                         printk(KERN_WARNING
4867                                        "kvm_vm_ioctl_set_memory_region: "
4868                                        "failed to munmap memory\n");
4869                         }
4870                 }
4871         }
4872
4873         spin_lock(&kvm->mmu_lock);
4874         if (!kvm->arch.n_requested_mmu_pages) {
4875                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4876                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4877         }
4878
4879         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4880         spin_unlock(&kvm->mmu_lock);
4881         kvm_flush_remote_tlbs(kvm);
4882
4883         return 0;
4884 }
4885
4886 void kvm_arch_flush_shadow(struct kvm *kvm)
4887 {
4888         kvm_mmu_zap_all(kvm);
4889         kvm_reload_remote_mmus(kvm);
4890 }
4891
4892 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4893 {
4894         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4895                || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4896                || vcpu->arch.nmi_pending;
4897 }
4898
4899 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4900 {
4901         int me;
4902         int cpu = vcpu->cpu;
4903
4904         if (waitqueue_active(&vcpu->wq)) {
4905                 wake_up_interruptible(&vcpu->wq);
4906                 ++vcpu->stat.halt_wakeup;
4907         }
4908
4909         me = get_cpu();
4910         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4911                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4912                         smp_send_reschedule(cpu);
4913         put_cpu();
4914 }
4915
4916 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4917 {
4918         return kvm_x86_ops->interrupt_allowed(vcpu);
4919 }
4920
4921 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4922 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4923 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4924 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4925 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);