028a0f25e8a05b2537d66465e9b40e1232e8b53b
[linux-2.6.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10  *
11  * Authors:
12  *   Avi Kivity   <avi@qumranet.com>
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Amit Shah    <amit.shah@qumranet.com>
15  *   Ben-Ami Yassour <benami@il.ibm.com>
16  *
17  * This work is licensed under the terms of the GNU GPL, version 2.  See
18  * the COPYING file in the top-level directory.
19  *
20  */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
48
49 #define CREATE_TRACE_POINTS
50 #include "trace.h"
51
52 #include <asm/debugreg.h>
53 #include <asm/msr.h>
54 #include <asm/desc.h>
55 #include <asm/mtrr.h>
56 #include <asm/mce.h>
57 #include <asm/i387.h>
58 #include <asm/xcr.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
61
62 #define MAX_IO_MSRS 256
63 #define KVM_MAX_MCE_BANKS 32
64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
65
66 #define emul_to_vcpu(ctxt) \
67         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
68
69 /* EFER defaults:
70  * - enable syscall per default because its emulated by KVM
71  * - enable LME and LMA per default on 64 bit KVM
72  */
73 #ifdef CONFIG_X86_64
74 static
75 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
76 #else
77 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
78 #endif
79
80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
82
83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
85                                     struct kvm_cpuid_entry2 __user *entries);
86
87 struct kvm_x86_ops *kvm_x86_ops;
88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
89
90 int ignore_msrs = 0;
91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
92
93 bool kvm_has_tsc_control;
94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
95 u32  kvm_max_guest_tsc_khz;
96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
97
98 #define KVM_NR_SHARED_MSRS 16
99
100 struct kvm_shared_msrs_global {
101         int nr;
102         u32 msrs[KVM_NR_SHARED_MSRS];
103 };
104
105 struct kvm_shared_msrs {
106         struct user_return_notifier urn;
107         bool registered;
108         struct kvm_shared_msr_values {
109                 u64 host;
110                 u64 curr;
111         } values[KVM_NR_SHARED_MSRS];
112 };
113
114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
115 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
116
117 struct kvm_stats_debugfs_item debugfs_entries[] = {
118         { "pf_fixed", VCPU_STAT(pf_fixed) },
119         { "pf_guest", VCPU_STAT(pf_guest) },
120         { "tlb_flush", VCPU_STAT(tlb_flush) },
121         { "invlpg", VCPU_STAT(invlpg) },
122         { "exits", VCPU_STAT(exits) },
123         { "io_exits", VCPU_STAT(io_exits) },
124         { "mmio_exits", VCPU_STAT(mmio_exits) },
125         { "signal_exits", VCPU_STAT(signal_exits) },
126         { "irq_window", VCPU_STAT(irq_window_exits) },
127         { "nmi_window", VCPU_STAT(nmi_window_exits) },
128         { "halt_exits", VCPU_STAT(halt_exits) },
129         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
130         { "hypercalls", VCPU_STAT(hypercalls) },
131         { "request_irq", VCPU_STAT(request_irq_exits) },
132         { "irq_exits", VCPU_STAT(irq_exits) },
133         { "host_state_reload", VCPU_STAT(host_state_reload) },
134         { "efer_reload", VCPU_STAT(efer_reload) },
135         { "fpu_reload", VCPU_STAT(fpu_reload) },
136         { "insn_emulation", VCPU_STAT(insn_emulation) },
137         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
138         { "irq_injections", VCPU_STAT(irq_injections) },
139         { "nmi_injections", VCPU_STAT(nmi_injections) },
140         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
141         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
142         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
143         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
144         { "mmu_flooded", VM_STAT(mmu_flooded) },
145         { "mmu_recycled", VM_STAT(mmu_recycled) },
146         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
147         { "mmu_unsync", VM_STAT(mmu_unsync) },
148         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
149         { "largepages", VM_STAT(lpages) },
150         { NULL }
151 };
152
153 u64 __read_mostly host_xcr0;
154
155 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
156
157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
158 {
159         int i;
160         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
161                 vcpu->arch.apf.gfns[i] = ~0;
162 }
163
164 static void kvm_on_user_return(struct user_return_notifier *urn)
165 {
166         unsigned slot;
167         struct kvm_shared_msrs *locals
168                 = container_of(urn, struct kvm_shared_msrs, urn);
169         struct kvm_shared_msr_values *values;
170
171         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
172                 values = &locals->values[slot];
173                 if (values->host != values->curr) {
174                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
175                         values->curr = values->host;
176                 }
177         }
178         locals->registered = false;
179         user_return_notifier_unregister(urn);
180 }
181
182 static void shared_msr_update(unsigned slot, u32 msr)
183 {
184         struct kvm_shared_msrs *smsr;
185         u64 value;
186
187         smsr = &__get_cpu_var(shared_msrs);
188         /* only read, and nobody should modify it at this time,
189          * so don't need lock */
190         if (slot >= shared_msrs_global.nr) {
191                 printk(KERN_ERR "kvm: invalid MSR slot!");
192                 return;
193         }
194         rdmsrl_safe(msr, &value);
195         smsr->values[slot].host = value;
196         smsr->values[slot].curr = value;
197 }
198
199 void kvm_define_shared_msr(unsigned slot, u32 msr)
200 {
201         if (slot >= shared_msrs_global.nr)
202                 shared_msrs_global.nr = slot + 1;
203         shared_msrs_global.msrs[slot] = msr;
204         /* we need ensured the shared_msr_global have been updated */
205         smp_wmb();
206 }
207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
208
209 static void kvm_shared_msr_cpu_online(void)
210 {
211         unsigned i;
212
213         for (i = 0; i < shared_msrs_global.nr; ++i)
214                 shared_msr_update(i, shared_msrs_global.msrs[i]);
215 }
216
217 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
218 {
219         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
220
221         if (((value ^ smsr->values[slot].curr) & mask) == 0)
222                 return;
223         smsr->values[slot].curr = value;
224         wrmsrl(shared_msrs_global.msrs[slot], value);
225         if (!smsr->registered) {
226                 smsr->urn.on_user_return = kvm_on_user_return;
227                 user_return_notifier_register(&smsr->urn);
228                 smsr->registered = true;
229         }
230 }
231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
232
233 static void drop_user_return_notifiers(void *ignore)
234 {
235         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
236
237         if (smsr->registered)
238                 kvm_on_user_return(&smsr->urn);
239 }
240
241 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
242 {
243         if (irqchip_in_kernel(vcpu->kvm))
244                 return vcpu->arch.apic_base;
245         else
246                 return vcpu->arch.apic_base;
247 }
248 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
249
250 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
251 {
252         /* TODO: reserve bits check */
253         if (irqchip_in_kernel(vcpu->kvm))
254                 kvm_lapic_set_base(vcpu, data);
255         else
256                 vcpu->arch.apic_base = data;
257 }
258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
259
260 #define EXCPT_BENIGN            0
261 #define EXCPT_CONTRIBUTORY      1
262 #define EXCPT_PF                2
263
264 static int exception_class(int vector)
265 {
266         switch (vector) {
267         case PF_VECTOR:
268                 return EXCPT_PF;
269         case DE_VECTOR:
270         case TS_VECTOR:
271         case NP_VECTOR:
272         case SS_VECTOR:
273         case GP_VECTOR:
274                 return EXCPT_CONTRIBUTORY;
275         default:
276                 break;
277         }
278         return EXCPT_BENIGN;
279 }
280
281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
282                 unsigned nr, bool has_error, u32 error_code,
283                 bool reinject)
284 {
285         u32 prev_nr;
286         int class1, class2;
287
288         kvm_make_request(KVM_REQ_EVENT, vcpu);
289
290         if (!vcpu->arch.exception.pending) {
291         queue:
292                 vcpu->arch.exception.pending = true;
293                 vcpu->arch.exception.has_error_code = has_error;
294                 vcpu->arch.exception.nr = nr;
295                 vcpu->arch.exception.error_code = error_code;
296                 vcpu->arch.exception.reinject = reinject;
297                 return;
298         }
299
300         /* to check exception */
301         prev_nr = vcpu->arch.exception.nr;
302         if (prev_nr == DF_VECTOR) {
303                 /* triple fault -> shutdown */
304                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
305                 return;
306         }
307         class1 = exception_class(prev_nr);
308         class2 = exception_class(nr);
309         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
310                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
311                 /* generate double fault per SDM Table 5-5 */
312                 vcpu->arch.exception.pending = true;
313                 vcpu->arch.exception.has_error_code = true;
314                 vcpu->arch.exception.nr = DF_VECTOR;
315                 vcpu->arch.exception.error_code = 0;
316         } else
317                 /* replace previous exception with a new one in a hope
318                    that instruction re-execution will regenerate lost
319                    exception */
320                 goto queue;
321 }
322
323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
324 {
325         kvm_multiple_exception(vcpu, nr, false, 0, false);
326 }
327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
328
329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
330 {
331         kvm_multiple_exception(vcpu, nr, false, 0, true);
332 }
333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
334
335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
336 {
337         if (err)
338                 kvm_inject_gp(vcpu, 0);
339         else
340                 kvm_x86_ops->skip_emulated_instruction(vcpu);
341 }
342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
343
344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
345 {
346         ++vcpu->stat.pf_guest;
347         vcpu->arch.cr2 = fault->address;
348         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
349 }
350 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
351
352 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
353 {
354         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
355                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
356         else
357                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
358 }
359
360 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
361 {
362         kvm_make_request(KVM_REQ_EVENT, vcpu);
363         vcpu->arch.nmi_pending = 1;
364 }
365 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
366
367 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
368 {
369         kvm_multiple_exception(vcpu, nr, true, error_code, false);
370 }
371 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
372
373 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
374 {
375         kvm_multiple_exception(vcpu, nr, true, error_code, true);
376 }
377 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
378
379 /*
380  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
381  * a #GP and return false.
382  */
383 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
384 {
385         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
386                 return true;
387         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
388         return false;
389 }
390 EXPORT_SYMBOL_GPL(kvm_require_cpl);
391
392 /*
393  * This function will be used to read from the physical memory of the currently
394  * running guest. The difference to kvm_read_guest_page is that this function
395  * can read from guest physical or from the guest's guest physical memory.
396  */
397 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
398                             gfn_t ngfn, void *data, int offset, int len,
399                             u32 access)
400 {
401         gfn_t real_gfn;
402         gpa_t ngpa;
403
404         ngpa     = gfn_to_gpa(ngfn);
405         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
406         if (real_gfn == UNMAPPED_GVA)
407                 return -EFAULT;
408
409         real_gfn = gpa_to_gfn(real_gfn);
410
411         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
412 }
413 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
414
415 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
416                                void *data, int offset, int len, u32 access)
417 {
418         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
419                                        data, offset, len, access);
420 }
421
422 /*
423  * Load the pae pdptrs.  Return true is they are all valid.
424  */
425 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
426 {
427         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
428         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
429         int i;
430         int ret;
431         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
432
433         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
434                                       offset * sizeof(u64), sizeof(pdpte),
435                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
436         if (ret < 0) {
437                 ret = 0;
438                 goto out;
439         }
440         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
441                 if (is_present_gpte(pdpte[i]) &&
442                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
443                         ret = 0;
444                         goto out;
445                 }
446         }
447         ret = 1;
448
449         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
450         __set_bit(VCPU_EXREG_PDPTR,
451                   (unsigned long *)&vcpu->arch.regs_avail);
452         __set_bit(VCPU_EXREG_PDPTR,
453                   (unsigned long *)&vcpu->arch.regs_dirty);
454 out:
455
456         return ret;
457 }
458 EXPORT_SYMBOL_GPL(load_pdptrs);
459
460 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
461 {
462         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
463         bool changed = true;
464         int offset;
465         gfn_t gfn;
466         int r;
467
468         if (is_long_mode(vcpu) || !is_pae(vcpu))
469                 return false;
470
471         if (!test_bit(VCPU_EXREG_PDPTR,
472                       (unsigned long *)&vcpu->arch.regs_avail))
473                 return true;
474
475         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
476         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
477         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
478                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
479         if (r < 0)
480                 goto out;
481         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
482 out:
483
484         return changed;
485 }
486
487 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
488 {
489         unsigned long old_cr0 = kvm_read_cr0(vcpu);
490         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
491                                     X86_CR0_CD | X86_CR0_NW;
492
493         cr0 |= X86_CR0_ET;
494
495 #ifdef CONFIG_X86_64
496         if (cr0 & 0xffffffff00000000UL)
497                 return 1;
498 #endif
499
500         cr0 &= ~CR0_RESERVED_BITS;
501
502         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
503                 return 1;
504
505         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
506                 return 1;
507
508         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
509 #ifdef CONFIG_X86_64
510                 if ((vcpu->arch.efer & EFER_LME)) {
511                         int cs_db, cs_l;
512
513                         if (!is_pae(vcpu))
514                                 return 1;
515                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
516                         if (cs_l)
517                                 return 1;
518                 } else
519 #endif
520                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
521                                                  kvm_read_cr3(vcpu)))
522                         return 1;
523         }
524
525         kvm_x86_ops->set_cr0(vcpu, cr0);
526
527         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
528                 kvm_clear_async_pf_completion_queue(vcpu);
529                 kvm_async_pf_hash_reset(vcpu);
530         }
531
532         if ((cr0 ^ old_cr0) & update_bits)
533                 kvm_mmu_reset_context(vcpu);
534         return 0;
535 }
536 EXPORT_SYMBOL_GPL(kvm_set_cr0);
537
538 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
539 {
540         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
541 }
542 EXPORT_SYMBOL_GPL(kvm_lmsw);
543
544 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
545 {
546         u64 xcr0;
547
548         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
549         if (index != XCR_XFEATURE_ENABLED_MASK)
550                 return 1;
551         xcr0 = xcr;
552         if (kvm_x86_ops->get_cpl(vcpu) != 0)
553                 return 1;
554         if (!(xcr0 & XSTATE_FP))
555                 return 1;
556         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
557                 return 1;
558         if (xcr0 & ~host_xcr0)
559                 return 1;
560         vcpu->arch.xcr0 = xcr0;
561         vcpu->guest_xcr0_loaded = 0;
562         return 0;
563 }
564
565 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
566 {
567         if (__kvm_set_xcr(vcpu, index, xcr)) {
568                 kvm_inject_gp(vcpu, 0);
569                 return 1;
570         }
571         return 0;
572 }
573 EXPORT_SYMBOL_GPL(kvm_set_xcr);
574
575 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
576 {
577         struct kvm_cpuid_entry2 *best;
578
579         best = kvm_find_cpuid_entry(vcpu, 1, 0);
580         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
581 }
582
583 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
584 {
585         struct kvm_cpuid_entry2 *best;
586
587         best = kvm_find_cpuid_entry(vcpu, 7, 0);
588         return best && (best->ebx & bit(X86_FEATURE_SMEP));
589 }
590
591 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
592 {
593         struct kvm_cpuid_entry2 *best;
594
595         best = kvm_find_cpuid_entry(vcpu, 7, 0);
596         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
597 }
598
599 static void update_cpuid(struct kvm_vcpu *vcpu)
600 {
601         struct kvm_cpuid_entry2 *best;
602
603         best = kvm_find_cpuid_entry(vcpu, 1, 0);
604         if (!best)
605                 return;
606
607         /* Update OSXSAVE bit */
608         if (cpu_has_xsave && best->function == 0x1) {
609                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
610                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
611                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
612         }
613 }
614
615 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
616 {
617         unsigned long old_cr4 = kvm_read_cr4(vcpu);
618         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
619                                    X86_CR4_PAE | X86_CR4_SMEP;
620         if (cr4 & CR4_RESERVED_BITS)
621                 return 1;
622
623         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
624                 return 1;
625
626         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
627                 return 1;
628
629         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
630                 return 1;
631
632         if (is_long_mode(vcpu)) {
633                 if (!(cr4 & X86_CR4_PAE))
634                         return 1;
635         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
636                    && ((cr4 ^ old_cr4) & pdptr_bits)
637                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
638                                    kvm_read_cr3(vcpu)))
639                 return 1;
640
641         if (kvm_x86_ops->set_cr4(vcpu, cr4))
642                 return 1;
643
644         if ((cr4 ^ old_cr4) & pdptr_bits)
645                 kvm_mmu_reset_context(vcpu);
646
647         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
648                 update_cpuid(vcpu);
649
650         return 0;
651 }
652 EXPORT_SYMBOL_GPL(kvm_set_cr4);
653
654 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
655 {
656         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
657                 kvm_mmu_sync_roots(vcpu);
658                 kvm_mmu_flush_tlb(vcpu);
659                 return 0;
660         }
661
662         if (is_long_mode(vcpu)) {
663                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
664                         return 1;
665         } else {
666                 if (is_pae(vcpu)) {
667                         if (cr3 & CR3_PAE_RESERVED_BITS)
668                                 return 1;
669                         if (is_paging(vcpu) &&
670                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
671                                 return 1;
672                 }
673                 /*
674                  * We don't check reserved bits in nonpae mode, because
675                  * this isn't enforced, and VMware depends on this.
676                  */
677         }
678
679         /*
680          * Does the new cr3 value map to physical memory? (Note, we
681          * catch an invalid cr3 even in real-mode, because it would
682          * cause trouble later on when we turn on paging anyway.)
683          *
684          * A real CPU would silently accept an invalid cr3 and would
685          * attempt to use it - with largely undefined (and often hard
686          * to debug) behavior on the guest side.
687          */
688         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
689                 return 1;
690         vcpu->arch.cr3 = cr3;
691         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
692         vcpu->arch.mmu.new_cr3(vcpu);
693         return 0;
694 }
695 EXPORT_SYMBOL_GPL(kvm_set_cr3);
696
697 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
698 {
699         if (cr8 & CR8_RESERVED_BITS)
700                 return 1;
701         if (irqchip_in_kernel(vcpu->kvm))
702                 kvm_lapic_set_tpr(vcpu, cr8);
703         else
704                 vcpu->arch.cr8 = cr8;
705         return 0;
706 }
707 EXPORT_SYMBOL_GPL(kvm_set_cr8);
708
709 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
710 {
711         if (irqchip_in_kernel(vcpu->kvm))
712                 return kvm_lapic_get_cr8(vcpu);
713         else
714                 return vcpu->arch.cr8;
715 }
716 EXPORT_SYMBOL_GPL(kvm_get_cr8);
717
718 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
719 {
720         switch (dr) {
721         case 0 ... 3:
722                 vcpu->arch.db[dr] = val;
723                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
724                         vcpu->arch.eff_db[dr] = val;
725                 break;
726         case 4:
727                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
728                         return 1; /* #UD */
729                 /* fall through */
730         case 6:
731                 if (val & 0xffffffff00000000ULL)
732                         return -1; /* #GP */
733                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
734                 break;
735         case 5:
736                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
737                         return 1; /* #UD */
738                 /* fall through */
739         default: /* 7 */
740                 if (val & 0xffffffff00000000ULL)
741                         return -1; /* #GP */
742                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
743                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
744                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
745                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
746                 }
747                 break;
748         }
749
750         return 0;
751 }
752
753 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
754 {
755         int res;
756
757         res = __kvm_set_dr(vcpu, dr, val);
758         if (res > 0)
759                 kvm_queue_exception(vcpu, UD_VECTOR);
760         else if (res < 0)
761                 kvm_inject_gp(vcpu, 0);
762
763         return res;
764 }
765 EXPORT_SYMBOL_GPL(kvm_set_dr);
766
767 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
768 {
769         switch (dr) {
770         case 0 ... 3:
771                 *val = vcpu->arch.db[dr];
772                 break;
773         case 4:
774                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
775                         return 1;
776                 /* fall through */
777         case 6:
778                 *val = vcpu->arch.dr6;
779                 break;
780         case 5:
781                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
782                         return 1;
783                 /* fall through */
784         default: /* 7 */
785                 *val = vcpu->arch.dr7;
786                 break;
787         }
788
789         return 0;
790 }
791
792 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
793 {
794         if (_kvm_get_dr(vcpu, dr, val)) {
795                 kvm_queue_exception(vcpu, UD_VECTOR);
796                 return 1;
797         }
798         return 0;
799 }
800 EXPORT_SYMBOL_GPL(kvm_get_dr);
801
802 /*
803  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
804  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
805  *
806  * This list is modified at module load time to reflect the
807  * capabilities of the host cpu. This capabilities test skips MSRs that are
808  * kvm-specific. Those are put in the beginning of the list.
809  */
810
811 #define KVM_SAVE_MSRS_BEGIN     9
812 static u32 msrs_to_save[] = {
813         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
814         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
815         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
816         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
817         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
818         MSR_STAR,
819 #ifdef CONFIG_X86_64
820         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
821 #endif
822         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
823 };
824
825 static unsigned num_msrs_to_save;
826
827 static u32 emulated_msrs[] = {
828         MSR_IA32_MISC_ENABLE,
829         MSR_IA32_MCG_STATUS,
830         MSR_IA32_MCG_CTL,
831 };
832
833 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
834 {
835         u64 old_efer = vcpu->arch.efer;
836
837         if (efer & efer_reserved_bits)
838                 return 1;
839
840         if (is_paging(vcpu)
841             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
842                 return 1;
843
844         if (efer & EFER_FFXSR) {
845                 struct kvm_cpuid_entry2 *feat;
846
847                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
848                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
849                         return 1;
850         }
851
852         if (efer & EFER_SVME) {
853                 struct kvm_cpuid_entry2 *feat;
854
855                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
856                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
857                         return 1;
858         }
859
860         efer &= ~EFER_LMA;
861         efer |= vcpu->arch.efer & EFER_LMA;
862
863         kvm_x86_ops->set_efer(vcpu, efer);
864
865         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
866
867         /* Update reserved bits */
868         if ((efer ^ old_efer) & EFER_NX)
869                 kvm_mmu_reset_context(vcpu);
870
871         return 0;
872 }
873
874 void kvm_enable_efer_bits(u64 mask)
875 {
876        efer_reserved_bits &= ~mask;
877 }
878 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
879
880
881 /*
882  * Writes msr value into into the appropriate "register".
883  * Returns 0 on success, non-0 otherwise.
884  * Assumes vcpu_load() was already called.
885  */
886 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
887 {
888         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
889 }
890
891 /*
892  * Adapt set_msr() to msr_io()'s calling convention
893  */
894 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
895 {
896         return kvm_set_msr(vcpu, index, *data);
897 }
898
899 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
900 {
901         int version;
902         int r;
903         struct pvclock_wall_clock wc;
904         struct timespec boot;
905
906         if (!wall_clock)
907                 return;
908
909         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
910         if (r)
911                 return;
912
913         if (version & 1)
914                 ++version;  /* first time write, random junk */
915
916         ++version;
917
918         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
919
920         /*
921          * The guest calculates current wall clock time by adding
922          * system time (updated by kvm_guest_time_update below) to the
923          * wall clock specified here.  guest system time equals host
924          * system time for us, thus we must fill in host boot time here.
925          */
926         getboottime(&boot);
927
928         wc.sec = boot.tv_sec;
929         wc.nsec = boot.tv_nsec;
930         wc.version = version;
931
932         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
933
934         version++;
935         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
936 }
937
938 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
939 {
940         uint32_t quotient, remainder;
941
942         /* Don't try to replace with do_div(), this one calculates
943          * "(dividend << 32) / divisor" */
944         __asm__ ( "divl %4"
945                   : "=a" (quotient), "=d" (remainder)
946                   : "0" (0), "1" (dividend), "r" (divisor) );
947         return quotient;
948 }
949
950 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
951                                s8 *pshift, u32 *pmultiplier)
952 {
953         uint64_t scaled64;
954         int32_t  shift = 0;
955         uint64_t tps64;
956         uint32_t tps32;
957
958         tps64 = base_khz * 1000LL;
959         scaled64 = scaled_khz * 1000LL;
960         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
961                 tps64 >>= 1;
962                 shift--;
963         }
964
965         tps32 = (uint32_t)tps64;
966         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
967                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
968                         scaled64 >>= 1;
969                 else
970                         tps32 <<= 1;
971                 shift++;
972         }
973
974         *pshift = shift;
975         *pmultiplier = div_frac(scaled64, tps32);
976
977         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
978                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
979 }
980
981 static inline u64 get_kernel_ns(void)
982 {
983         struct timespec ts;
984
985         WARN_ON(preemptible());
986         ktime_get_ts(&ts);
987         monotonic_to_bootbased(&ts);
988         return timespec_to_ns(&ts);
989 }
990
991 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
992 unsigned long max_tsc_khz;
993
994 static inline int kvm_tsc_changes_freq(void)
995 {
996         int cpu = get_cpu();
997         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
998                   cpufreq_quick_get(cpu) != 0;
999         put_cpu();
1000         return ret;
1001 }
1002
1003 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1004 {
1005         if (vcpu->arch.virtual_tsc_khz)
1006                 return vcpu->arch.virtual_tsc_khz;
1007         else
1008                 return __this_cpu_read(cpu_tsc_khz);
1009 }
1010
1011 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1012 {
1013         u64 ret;
1014
1015         WARN_ON(preemptible());
1016         if (kvm_tsc_changes_freq())
1017                 printk_once(KERN_WARNING
1018                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1019         ret = nsec * vcpu_tsc_khz(vcpu);
1020         do_div(ret, USEC_PER_SEC);
1021         return ret;
1022 }
1023
1024 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1025 {
1026         /* Compute a scale to convert nanoseconds in TSC cycles */
1027         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1028                            &vcpu->arch.tsc_catchup_shift,
1029                            &vcpu->arch.tsc_catchup_mult);
1030 }
1031
1032 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1033 {
1034         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1035                                       vcpu->arch.tsc_catchup_mult,
1036                                       vcpu->arch.tsc_catchup_shift);
1037         tsc += vcpu->arch.last_tsc_write;
1038         return tsc;
1039 }
1040
1041 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1042 {
1043         struct kvm *kvm = vcpu->kvm;
1044         u64 offset, ns, elapsed;
1045         unsigned long flags;
1046         s64 sdiff;
1047
1048         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1049         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1050         ns = get_kernel_ns();
1051         elapsed = ns - kvm->arch.last_tsc_nsec;
1052         sdiff = data - kvm->arch.last_tsc_write;
1053         if (sdiff < 0)
1054                 sdiff = -sdiff;
1055
1056         /*
1057          * Special case: close write to TSC within 5 seconds of
1058          * another CPU is interpreted as an attempt to synchronize
1059          * The 5 seconds is to accommodate host load / swapping as
1060          * well as any reset of TSC during the boot process.
1061          *
1062          * In that case, for a reliable TSC, we can match TSC offsets,
1063          * or make a best guest using elapsed value.
1064          */
1065         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1066             elapsed < 5ULL * NSEC_PER_SEC) {
1067                 if (!check_tsc_unstable()) {
1068                         offset = kvm->arch.last_tsc_offset;
1069                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1070                 } else {
1071                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1072                         offset += delta;
1073                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1074                 }
1075                 ns = kvm->arch.last_tsc_nsec;
1076         }
1077         kvm->arch.last_tsc_nsec = ns;
1078         kvm->arch.last_tsc_write = data;
1079         kvm->arch.last_tsc_offset = offset;
1080         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1081         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1082
1083         /* Reset of TSC must disable overshoot protection below */
1084         vcpu->arch.hv_clock.tsc_timestamp = 0;
1085         vcpu->arch.last_tsc_write = data;
1086         vcpu->arch.last_tsc_nsec = ns;
1087 }
1088 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1089
1090 static int kvm_guest_time_update(struct kvm_vcpu *v)
1091 {
1092         unsigned long flags;
1093         struct kvm_vcpu_arch *vcpu = &v->arch;
1094         void *shared_kaddr;
1095         unsigned long this_tsc_khz;
1096         s64 kernel_ns, max_kernel_ns;
1097         u64 tsc_timestamp;
1098
1099         /* Keep irq disabled to prevent changes to the clock */
1100         local_irq_save(flags);
1101         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1102         kernel_ns = get_kernel_ns();
1103         this_tsc_khz = vcpu_tsc_khz(v);
1104         if (unlikely(this_tsc_khz == 0)) {
1105                 local_irq_restore(flags);
1106                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1107                 return 1;
1108         }
1109
1110         /*
1111          * We may have to catch up the TSC to match elapsed wall clock
1112          * time for two reasons, even if kvmclock is used.
1113          *   1) CPU could have been running below the maximum TSC rate
1114          *   2) Broken TSC compensation resets the base at each VCPU
1115          *      entry to avoid unknown leaps of TSC even when running
1116          *      again on the same CPU.  This may cause apparent elapsed
1117          *      time to disappear, and the guest to stand still or run
1118          *      very slowly.
1119          */
1120         if (vcpu->tsc_catchup) {
1121                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1122                 if (tsc > tsc_timestamp) {
1123                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1124                         tsc_timestamp = tsc;
1125                 }
1126         }
1127
1128         local_irq_restore(flags);
1129
1130         if (!vcpu->time_page)
1131                 return 0;
1132
1133         /*
1134          * Time as measured by the TSC may go backwards when resetting the base
1135          * tsc_timestamp.  The reason for this is that the TSC resolution is
1136          * higher than the resolution of the other clock scales.  Thus, many
1137          * possible measurments of the TSC correspond to one measurement of any
1138          * other clock, and so a spread of values is possible.  This is not a
1139          * problem for the computation of the nanosecond clock; with TSC rates
1140          * around 1GHZ, there can only be a few cycles which correspond to one
1141          * nanosecond value, and any path through this code will inevitably
1142          * take longer than that.  However, with the kernel_ns value itself,
1143          * the precision may be much lower, down to HZ granularity.  If the
1144          * first sampling of TSC against kernel_ns ends in the low part of the
1145          * range, and the second in the high end of the range, we can get:
1146          *
1147          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1148          *
1149          * As the sampling errors potentially range in the thousands of cycles,
1150          * it is possible such a time value has already been observed by the
1151          * guest.  To protect against this, we must compute the system time as
1152          * observed by the guest and ensure the new system time is greater.
1153          */
1154         max_kernel_ns = 0;
1155         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1156                 max_kernel_ns = vcpu->last_guest_tsc -
1157                                 vcpu->hv_clock.tsc_timestamp;
1158                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1159                                     vcpu->hv_clock.tsc_to_system_mul,
1160                                     vcpu->hv_clock.tsc_shift);
1161                 max_kernel_ns += vcpu->last_kernel_ns;
1162         }
1163
1164         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1165                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1166                                    &vcpu->hv_clock.tsc_shift,
1167                                    &vcpu->hv_clock.tsc_to_system_mul);
1168                 vcpu->hw_tsc_khz = this_tsc_khz;
1169         }
1170
1171         if (max_kernel_ns > kernel_ns)
1172                 kernel_ns = max_kernel_ns;
1173
1174         /* With all the info we got, fill in the values */
1175         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1176         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1177         vcpu->last_kernel_ns = kernel_ns;
1178         vcpu->last_guest_tsc = tsc_timestamp;
1179         vcpu->hv_clock.flags = 0;
1180
1181         /*
1182          * The interface expects us to write an even number signaling that the
1183          * update is finished. Since the guest won't see the intermediate
1184          * state, we just increase by 2 at the end.
1185          */
1186         vcpu->hv_clock.version += 2;
1187
1188         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1189
1190         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1191                sizeof(vcpu->hv_clock));
1192
1193         kunmap_atomic(shared_kaddr, KM_USER0);
1194
1195         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1196         return 0;
1197 }
1198
1199 static bool msr_mtrr_valid(unsigned msr)
1200 {
1201         switch (msr) {
1202         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1203         case MSR_MTRRfix64K_00000:
1204         case MSR_MTRRfix16K_80000:
1205         case MSR_MTRRfix16K_A0000:
1206         case MSR_MTRRfix4K_C0000:
1207         case MSR_MTRRfix4K_C8000:
1208         case MSR_MTRRfix4K_D0000:
1209         case MSR_MTRRfix4K_D8000:
1210         case MSR_MTRRfix4K_E0000:
1211         case MSR_MTRRfix4K_E8000:
1212         case MSR_MTRRfix4K_F0000:
1213         case MSR_MTRRfix4K_F8000:
1214         case MSR_MTRRdefType:
1215         case MSR_IA32_CR_PAT:
1216                 return true;
1217         case 0x2f8:
1218                 return true;
1219         }
1220         return false;
1221 }
1222
1223 static bool valid_pat_type(unsigned t)
1224 {
1225         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1226 }
1227
1228 static bool valid_mtrr_type(unsigned t)
1229 {
1230         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1231 }
1232
1233 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1234 {
1235         int i;
1236
1237         if (!msr_mtrr_valid(msr))
1238                 return false;
1239
1240         if (msr == MSR_IA32_CR_PAT) {
1241                 for (i = 0; i < 8; i++)
1242                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1243                                 return false;
1244                 return true;
1245         } else if (msr == MSR_MTRRdefType) {
1246                 if (data & ~0xcff)
1247                         return false;
1248                 return valid_mtrr_type(data & 0xff);
1249         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1250                 for (i = 0; i < 8 ; i++)
1251                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1252                                 return false;
1253                 return true;
1254         }
1255
1256         /* variable MTRRs */
1257         return valid_mtrr_type(data & 0xff);
1258 }
1259
1260 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1261 {
1262         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1263
1264         if (!mtrr_valid(vcpu, msr, data))
1265                 return 1;
1266
1267         if (msr == MSR_MTRRdefType) {
1268                 vcpu->arch.mtrr_state.def_type = data;
1269                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1270         } else if (msr == MSR_MTRRfix64K_00000)
1271                 p[0] = data;
1272         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1273                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1274         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1275                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1276         else if (msr == MSR_IA32_CR_PAT)
1277                 vcpu->arch.pat = data;
1278         else {  /* Variable MTRRs */
1279                 int idx, is_mtrr_mask;
1280                 u64 *pt;
1281
1282                 idx = (msr - 0x200) / 2;
1283                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1284                 if (!is_mtrr_mask)
1285                         pt =
1286                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1287                 else
1288                         pt =
1289                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1290                 *pt = data;
1291         }
1292
1293         kvm_mmu_reset_context(vcpu);
1294         return 0;
1295 }
1296
1297 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1298 {
1299         u64 mcg_cap = vcpu->arch.mcg_cap;
1300         unsigned bank_num = mcg_cap & 0xff;
1301
1302         switch (msr) {
1303         case MSR_IA32_MCG_STATUS:
1304                 vcpu->arch.mcg_status = data;
1305                 break;
1306         case MSR_IA32_MCG_CTL:
1307                 if (!(mcg_cap & MCG_CTL_P))
1308                         return 1;
1309                 if (data != 0 && data != ~(u64)0)
1310                         return -1;
1311                 vcpu->arch.mcg_ctl = data;
1312                 break;
1313         default:
1314                 if (msr >= MSR_IA32_MC0_CTL &&
1315                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1316                         u32 offset = msr - MSR_IA32_MC0_CTL;
1317                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1318                          * some Linux kernels though clear bit 10 in bank 4 to
1319                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1320                          * this to avoid an uncatched #GP in the guest
1321                          */
1322                         if ((offset & 0x3) == 0 &&
1323                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1324                                 return -1;
1325                         vcpu->arch.mce_banks[offset] = data;
1326                         break;
1327                 }
1328                 return 1;
1329         }
1330         return 0;
1331 }
1332
1333 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1334 {
1335         struct kvm *kvm = vcpu->kvm;
1336         int lm = is_long_mode(vcpu);
1337         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1338                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1339         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1340                 : kvm->arch.xen_hvm_config.blob_size_32;
1341         u32 page_num = data & ~PAGE_MASK;
1342         u64 page_addr = data & PAGE_MASK;
1343         u8 *page;
1344         int r;
1345
1346         r = -E2BIG;
1347         if (page_num >= blob_size)
1348                 goto out;
1349         r = -ENOMEM;
1350         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1351         if (!page)
1352                 goto out;
1353         r = -EFAULT;
1354         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1355                 goto out_free;
1356         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1357                 goto out_free;
1358         r = 0;
1359 out_free:
1360         kfree(page);
1361 out:
1362         return r;
1363 }
1364
1365 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1366 {
1367         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1368 }
1369
1370 static bool kvm_hv_msr_partition_wide(u32 msr)
1371 {
1372         bool r = false;
1373         switch (msr) {
1374         case HV_X64_MSR_GUEST_OS_ID:
1375         case HV_X64_MSR_HYPERCALL:
1376                 r = true;
1377                 break;
1378         }
1379
1380         return r;
1381 }
1382
1383 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1384 {
1385         struct kvm *kvm = vcpu->kvm;
1386
1387         switch (msr) {
1388         case HV_X64_MSR_GUEST_OS_ID:
1389                 kvm->arch.hv_guest_os_id = data;
1390                 /* setting guest os id to zero disables hypercall page */
1391                 if (!kvm->arch.hv_guest_os_id)
1392                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1393                 break;
1394         case HV_X64_MSR_HYPERCALL: {
1395                 u64 gfn;
1396                 unsigned long addr;
1397                 u8 instructions[4];
1398
1399                 /* if guest os id is not set hypercall should remain disabled */
1400                 if (!kvm->arch.hv_guest_os_id)
1401                         break;
1402                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1403                         kvm->arch.hv_hypercall = data;
1404                         break;
1405                 }
1406                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1407                 addr = gfn_to_hva(kvm, gfn);
1408                 if (kvm_is_error_hva(addr))
1409                         return 1;
1410                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1411                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1412                 if (__copy_to_user((void __user *)addr, instructions, 4))
1413                         return 1;
1414                 kvm->arch.hv_hypercall = data;
1415                 break;
1416         }
1417         default:
1418                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1419                           "data 0x%llx\n", msr, data);
1420                 return 1;
1421         }
1422         return 0;
1423 }
1424
1425 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1426 {
1427         switch (msr) {
1428         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1429                 unsigned long addr;
1430
1431                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1432                         vcpu->arch.hv_vapic = data;
1433                         break;
1434                 }
1435                 addr = gfn_to_hva(vcpu->kvm, data >>
1436                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1437                 if (kvm_is_error_hva(addr))
1438                         return 1;
1439                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1440                         return 1;
1441                 vcpu->arch.hv_vapic = data;
1442                 break;
1443         }
1444         case HV_X64_MSR_EOI:
1445                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1446         case HV_X64_MSR_ICR:
1447                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1448         case HV_X64_MSR_TPR:
1449                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1450         default:
1451                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1452                           "data 0x%llx\n", msr, data);
1453                 return 1;
1454         }
1455
1456         return 0;
1457 }
1458
1459 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1460 {
1461         gpa_t gpa = data & ~0x3f;
1462
1463         /* Bits 2:5 are resrved, Should be zero */
1464         if (data & 0x3c)
1465                 return 1;
1466
1467         vcpu->arch.apf.msr_val = data;
1468
1469         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1470                 kvm_clear_async_pf_completion_queue(vcpu);
1471                 kvm_async_pf_hash_reset(vcpu);
1472                 return 0;
1473         }
1474
1475         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1476                 return 1;
1477
1478         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1479         kvm_async_pf_wakeup_all(vcpu);
1480         return 0;
1481 }
1482
1483 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1484 {
1485         if (vcpu->arch.time_page) {
1486                 kvm_release_page_dirty(vcpu->arch.time_page);
1487                 vcpu->arch.time_page = NULL;
1488         }
1489 }
1490
1491 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1492 {
1493         u64 delta;
1494
1495         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1496                 return;
1497
1498         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1499         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1500         vcpu->arch.st.accum_steal = delta;
1501 }
1502
1503 static void record_steal_time(struct kvm_vcpu *vcpu)
1504 {
1505         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1506                 return;
1507
1508         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1509                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1510                 return;
1511
1512         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1513         vcpu->arch.st.steal.version += 2;
1514         vcpu->arch.st.accum_steal = 0;
1515
1516         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1517                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1518 }
1519
1520 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1521 {
1522         switch (msr) {
1523         case MSR_EFER:
1524                 return set_efer(vcpu, data);
1525         case MSR_K7_HWCR:
1526                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1527                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1528                 if (data != 0) {
1529                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1530                                 data);
1531                         return 1;
1532                 }
1533                 break;
1534         case MSR_FAM10H_MMIO_CONF_BASE:
1535                 if (data != 0) {
1536                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1537                                 "0x%llx\n", data);
1538                         return 1;
1539                 }
1540                 break;
1541         case MSR_AMD64_NB_CFG:
1542                 break;
1543         case MSR_IA32_DEBUGCTLMSR:
1544                 if (!data) {
1545                         /* We support the non-activated case already */
1546                         break;
1547                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1548                         /* Values other than LBR and BTF are vendor-specific,
1549                            thus reserved and should throw a #GP */
1550                         return 1;
1551                 }
1552                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1553                         __func__, data);
1554                 break;
1555         case MSR_IA32_UCODE_REV:
1556         case MSR_IA32_UCODE_WRITE:
1557         case MSR_VM_HSAVE_PA:
1558         case MSR_AMD64_PATCH_LOADER:
1559                 break;
1560         case 0x200 ... 0x2ff:
1561                 return set_msr_mtrr(vcpu, msr, data);
1562         case MSR_IA32_APICBASE:
1563                 kvm_set_apic_base(vcpu, data);
1564                 break;
1565         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1566                 return kvm_x2apic_msr_write(vcpu, msr, data);
1567         case MSR_IA32_MISC_ENABLE:
1568                 vcpu->arch.ia32_misc_enable_msr = data;
1569                 break;
1570         case MSR_KVM_WALL_CLOCK_NEW:
1571         case MSR_KVM_WALL_CLOCK:
1572                 vcpu->kvm->arch.wall_clock = data;
1573                 kvm_write_wall_clock(vcpu->kvm, data);
1574                 break;
1575         case MSR_KVM_SYSTEM_TIME_NEW:
1576         case MSR_KVM_SYSTEM_TIME: {
1577                 kvmclock_reset(vcpu);
1578
1579                 vcpu->arch.time = data;
1580                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1581
1582                 /* we verify if the enable bit is set... */
1583                 if (!(data & 1))
1584                         break;
1585
1586                 /* ...but clean it before doing the actual write */
1587                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1588
1589                 vcpu->arch.time_page =
1590                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1591
1592                 if (is_error_page(vcpu->arch.time_page)) {
1593                         kvm_release_page_clean(vcpu->arch.time_page);
1594                         vcpu->arch.time_page = NULL;
1595                 }
1596                 break;
1597         }
1598         case MSR_KVM_ASYNC_PF_EN:
1599                 if (kvm_pv_enable_async_pf(vcpu, data))
1600                         return 1;
1601                 break;
1602         case MSR_KVM_STEAL_TIME:
1603
1604                 if (unlikely(!sched_info_on()))
1605                         return 1;
1606
1607                 if (data & KVM_STEAL_RESERVED_MASK)
1608                         return 1;
1609
1610                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1611                                                         data & KVM_STEAL_VALID_BITS))
1612                         return 1;
1613
1614                 vcpu->arch.st.msr_val = data;
1615
1616                 if (!(data & KVM_MSR_ENABLED))
1617                         break;
1618
1619                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1620
1621                 preempt_disable();
1622                 accumulate_steal_time(vcpu);
1623                 preempt_enable();
1624
1625                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1626
1627                 break;
1628
1629         case MSR_IA32_MCG_CTL:
1630         case MSR_IA32_MCG_STATUS:
1631         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1632                 return set_msr_mce(vcpu, msr, data);
1633
1634         /* Performance counters are not protected by a CPUID bit,
1635          * so we should check all of them in the generic path for the sake of
1636          * cross vendor migration.
1637          * Writing a zero into the event select MSRs disables them,
1638          * which we perfectly emulate ;-). Any other value should be at least
1639          * reported, some guests depend on them.
1640          */
1641         case MSR_P6_EVNTSEL0:
1642         case MSR_P6_EVNTSEL1:
1643         case MSR_K7_EVNTSEL0:
1644         case MSR_K7_EVNTSEL1:
1645         case MSR_K7_EVNTSEL2:
1646         case MSR_K7_EVNTSEL3:
1647                 if (data != 0)
1648                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1649                                 "0x%x data 0x%llx\n", msr, data);
1650                 break;
1651         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1652          * so we ignore writes to make it happy.
1653          */
1654         case MSR_P6_PERFCTR0:
1655         case MSR_P6_PERFCTR1:
1656         case MSR_K7_PERFCTR0:
1657         case MSR_K7_PERFCTR1:
1658         case MSR_K7_PERFCTR2:
1659         case MSR_K7_PERFCTR3:
1660                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1661                         "0x%x data 0x%llx\n", msr, data);
1662                 break;
1663         case MSR_K7_CLK_CTL:
1664                 /*
1665                  * Ignore all writes to this no longer documented MSR.
1666                  * Writes are only relevant for old K7 processors,
1667                  * all pre-dating SVM, but a recommended workaround from
1668                  * AMD for these chips. It is possible to speicify the
1669                  * affected processor models on the command line, hence
1670                  * the need to ignore the workaround.
1671                  */
1672                 break;
1673         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1674                 if (kvm_hv_msr_partition_wide(msr)) {
1675                         int r;
1676                         mutex_lock(&vcpu->kvm->lock);
1677                         r = set_msr_hyperv_pw(vcpu, msr, data);
1678                         mutex_unlock(&vcpu->kvm->lock);
1679                         return r;
1680                 } else
1681                         return set_msr_hyperv(vcpu, msr, data);
1682                 break;
1683         case MSR_IA32_BBL_CR_CTL3:
1684                 /* Drop writes to this legacy MSR -- see rdmsr
1685                  * counterpart for further detail.
1686                  */
1687                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1688                 break;
1689         default:
1690                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1691                         return xen_hvm_config(vcpu, data);
1692                 if (!ignore_msrs) {
1693                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1694                                 msr, data);
1695                         return 1;
1696                 } else {
1697                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1698                                 msr, data);
1699                         break;
1700                 }
1701         }
1702         return 0;
1703 }
1704 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1705
1706
1707 /*
1708  * Reads an msr value (of 'msr_index') into 'pdata'.
1709  * Returns 0 on success, non-0 otherwise.
1710  * Assumes vcpu_load() was already called.
1711  */
1712 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1713 {
1714         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1715 }
1716
1717 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1718 {
1719         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1720
1721         if (!msr_mtrr_valid(msr))
1722                 return 1;
1723
1724         if (msr == MSR_MTRRdefType)
1725                 *pdata = vcpu->arch.mtrr_state.def_type +
1726                          (vcpu->arch.mtrr_state.enabled << 10);
1727         else if (msr == MSR_MTRRfix64K_00000)
1728                 *pdata = p[0];
1729         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1730                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1731         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1732                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1733         else if (msr == MSR_IA32_CR_PAT)
1734                 *pdata = vcpu->arch.pat;
1735         else {  /* Variable MTRRs */
1736                 int idx, is_mtrr_mask;
1737                 u64 *pt;
1738
1739                 idx = (msr - 0x200) / 2;
1740                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1741                 if (!is_mtrr_mask)
1742                         pt =
1743                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1744                 else
1745                         pt =
1746                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1747                 *pdata = *pt;
1748         }
1749
1750         return 0;
1751 }
1752
1753 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1754 {
1755         u64 data;
1756         u64 mcg_cap = vcpu->arch.mcg_cap;
1757         unsigned bank_num = mcg_cap & 0xff;
1758
1759         switch (msr) {
1760         case MSR_IA32_P5_MC_ADDR:
1761         case MSR_IA32_P5_MC_TYPE:
1762                 data = 0;
1763                 break;
1764         case MSR_IA32_MCG_CAP:
1765                 data = vcpu->arch.mcg_cap;
1766                 break;
1767         case MSR_IA32_MCG_CTL:
1768                 if (!(mcg_cap & MCG_CTL_P))
1769                         return 1;
1770                 data = vcpu->arch.mcg_ctl;
1771                 break;
1772         case MSR_IA32_MCG_STATUS:
1773                 data = vcpu->arch.mcg_status;
1774                 break;
1775         default:
1776                 if (msr >= MSR_IA32_MC0_CTL &&
1777                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1778                         u32 offset = msr - MSR_IA32_MC0_CTL;
1779                         data = vcpu->arch.mce_banks[offset];
1780                         break;
1781                 }
1782                 return 1;
1783         }
1784         *pdata = data;
1785         return 0;
1786 }
1787
1788 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1789 {
1790         u64 data = 0;
1791         struct kvm *kvm = vcpu->kvm;
1792
1793         switch (msr) {
1794         case HV_X64_MSR_GUEST_OS_ID:
1795                 data = kvm->arch.hv_guest_os_id;
1796                 break;
1797         case HV_X64_MSR_HYPERCALL:
1798                 data = kvm->arch.hv_hypercall;
1799                 break;
1800         default:
1801                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1802                 return 1;
1803         }
1804
1805         *pdata = data;
1806         return 0;
1807 }
1808
1809 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1810 {
1811         u64 data = 0;
1812
1813         switch (msr) {
1814         case HV_X64_MSR_VP_INDEX: {
1815                 int r;
1816                 struct kvm_vcpu *v;
1817                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1818                         if (v == vcpu)
1819                                 data = r;
1820                 break;
1821         }
1822         case HV_X64_MSR_EOI:
1823                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1824         case HV_X64_MSR_ICR:
1825                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1826         case HV_X64_MSR_TPR:
1827                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1828         default:
1829                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1830                 return 1;
1831         }
1832         *pdata = data;
1833         return 0;
1834 }
1835
1836 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1837 {
1838         u64 data;
1839
1840         switch (msr) {
1841         case MSR_IA32_PLATFORM_ID:
1842         case MSR_IA32_UCODE_REV:
1843         case MSR_IA32_EBL_CR_POWERON:
1844         case MSR_IA32_DEBUGCTLMSR:
1845         case MSR_IA32_LASTBRANCHFROMIP:
1846         case MSR_IA32_LASTBRANCHTOIP:
1847         case MSR_IA32_LASTINTFROMIP:
1848         case MSR_IA32_LASTINTTOIP:
1849         case MSR_K8_SYSCFG:
1850         case MSR_K7_HWCR:
1851         case MSR_VM_HSAVE_PA:
1852         case MSR_P6_PERFCTR0:
1853         case MSR_P6_PERFCTR1:
1854         case MSR_P6_EVNTSEL0:
1855         case MSR_P6_EVNTSEL1:
1856         case MSR_K7_EVNTSEL0:
1857         case MSR_K7_PERFCTR0:
1858         case MSR_K8_INT_PENDING_MSG:
1859         case MSR_AMD64_NB_CFG:
1860         case MSR_FAM10H_MMIO_CONF_BASE:
1861                 data = 0;
1862                 break;
1863         case MSR_MTRRcap:
1864                 data = 0x500 | KVM_NR_VAR_MTRR;
1865                 break;
1866         case 0x200 ... 0x2ff:
1867                 return get_msr_mtrr(vcpu, msr, pdata);
1868         case 0xcd: /* fsb frequency */
1869                 data = 3;
1870                 break;
1871                 /*
1872                  * MSR_EBC_FREQUENCY_ID
1873                  * Conservative value valid for even the basic CPU models.
1874                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1875                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1876                  * and 266MHz for model 3, or 4. Set Core Clock
1877                  * Frequency to System Bus Frequency Ratio to 1 (bits
1878                  * 31:24) even though these are only valid for CPU
1879                  * models > 2, however guests may end up dividing or
1880                  * multiplying by zero otherwise.
1881                  */
1882         case MSR_EBC_FREQUENCY_ID:
1883                 data = 1 << 24;
1884                 break;
1885         case MSR_IA32_APICBASE:
1886                 data = kvm_get_apic_base(vcpu);
1887                 break;
1888         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1889                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1890                 break;
1891         case MSR_IA32_MISC_ENABLE:
1892                 data = vcpu->arch.ia32_misc_enable_msr;
1893                 break;
1894         case MSR_IA32_PERF_STATUS:
1895                 /* TSC increment by tick */
1896                 data = 1000ULL;
1897                 /* CPU multiplier */
1898                 data |= (((uint64_t)4ULL) << 40);
1899                 break;
1900         case MSR_EFER:
1901                 data = vcpu->arch.efer;
1902                 break;
1903         case MSR_KVM_WALL_CLOCK:
1904         case MSR_KVM_WALL_CLOCK_NEW:
1905                 data = vcpu->kvm->arch.wall_clock;
1906                 break;
1907         case MSR_KVM_SYSTEM_TIME:
1908         case MSR_KVM_SYSTEM_TIME_NEW:
1909                 data = vcpu->arch.time;
1910                 break;
1911         case MSR_KVM_ASYNC_PF_EN:
1912                 data = vcpu->arch.apf.msr_val;
1913                 break;
1914         case MSR_KVM_STEAL_TIME:
1915                 data = vcpu->arch.st.msr_val;
1916                 break;
1917         case MSR_IA32_P5_MC_ADDR:
1918         case MSR_IA32_P5_MC_TYPE:
1919         case MSR_IA32_MCG_CAP:
1920         case MSR_IA32_MCG_CTL:
1921         case MSR_IA32_MCG_STATUS:
1922         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1923                 return get_msr_mce(vcpu, msr, pdata);
1924         case MSR_K7_CLK_CTL:
1925                 /*
1926                  * Provide expected ramp-up count for K7. All other
1927                  * are set to zero, indicating minimum divisors for
1928                  * every field.
1929                  *
1930                  * This prevents guest kernels on AMD host with CPU
1931                  * type 6, model 8 and higher from exploding due to
1932                  * the rdmsr failing.
1933                  */
1934                 data = 0x20000000;
1935                 break;
1936         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1937                 if (kvm_hv_msr_partition_wide(msr)) {
1938                         int r;
1939                         mutex_lock(&vcpu->kvm->lock);
1940                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1941                         mutex_unlock(&vcpu->kvm->lock);
1942                         return r;
1943                 } else
1944                         return get_msr_hyperv(vcpu, msr, pdata);
1945                 break;
1946         case MSR_IA32_BBL_CR_CTL3:
1947                 /* This legacy MSR exists but isn't fully documented in current
1948                  * silicon.  It is however accessed by winxp in very narrow
1949                  * scenarios where it sets bit #19, itself documented as
1950                  * a "reserved" bit.  Best effort attempt to source coherent
1951                  * read data here should the balance of the register be
1952                  * interpreted by the guest:
1953                  *
1954                  * L2 cache control register 3: 64GB range, 256KB size,
1955                  * enabled, latency 0x1, configured
1956                  */
1957                 data = 0xbe702111;
1958                 break;
1959         default:
1960                 if (!ignore_msrs) {
1961                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1962                         return 1;
1963                 } else {
1964                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1965                         data = 0;
1966                 }
1967                 break;
1968         }
1969         *pdata = data;
1970         return 0;
1971 }
1972 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1973
1974 /*
1975  * Read or write a bunch of msrs. All parameters are kernel addresses.
1976  *
1977  * @return number of msrs set successfully.
1978  */
1979 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1980                     struct kvm_msr_entry *entries,
1981                     int (*do_msr)(struct kvm_vcpu *vcpu,
1982                                   unsigned index, u64 *data))
1983 {
1984         int i, idx;
1985
1986         idx = srcu_read_lock(&vcpu->kvm->srcu);
1987         for (i = 0; i < msrs->nmsrs; ++i)
1988                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1989                         break;
1990         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1991
1992         return i;
1993 }
1994
1995 /*
1996  * Read or write a bunch of msrs. Parameters are user addresses.
1997  *
1998  * @return number of msrs set successfully.
1999  */
2000 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2001                   int (*do_msr)(struct kvm_vcpu *vcpu,
2002                                 unsigned index, u64 *data),
2003                   int writeback)
2004 {
2005         struct kvm_msrs msrs;
2006         struct kvm_msr_entry *entries;
2007         int r, n;
2008         unsigned size;
2009
2010         r = -EFAULT;
2011         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2012                 goto out;
2013
2014         r = -E2BIG;
2015         if (msrs.nmsrs >= MAX_IO_MSRS)
2016                 goto out;
2017
2018         r = -ENOMEM;
2019         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2020         entries = kmalloc(size, GFP_KERNEL);
2021         if (!entries)
2022                 goto out;
2023
2024         r = -EFAULT;
2025         if (copy_from_user(entries, user_msrs->entries, size))
2026                 goto out_free;
2027
2028         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2029         if (r < 0)
2030                 goto out_free;
2031
2032         r = -EFAULT;
2033         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2034                 goto out_free;
2035
2036         r = n;
2037
2038 out_free:
2039         kfree(entries);
2040 out:
2041         return r;
2042 }
2043
2044 int kvm_dev_ioctl_check_extension(long ext)
2045 {
2046         int r;
2047
2048         switch (ext) {
2049         case KVM_CAP_IRQCHIP:
2050         case KVM_CAP_HLT:
2051         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2052         case KVM_CAP_SET_TSS_ADDR:
2053         case KVM_CAP_EXT_CPUID:
2054         case KVM_CAP_CLOCKSOURCE:
2055         case KVM_CAP_PIT:
2056         case KVM_CAP_NOP_IO_DELAY:
2057         case KVM_CAP_MP_STATE:
2058         case KVM_CAP_SYNC_MMU:
2059         case KVM_CAP_USER_NMI:
2060         case KVM_CAP_REINJECT_CONTROL:
2061         case KVM_CAP_IRQ_INJECT_STATUS:
2062         case KVM_CAP_ASSIGN_DEV_IRQ:
2063         case KVM_CAP_IRQFD:
2064         case KVM_CAP_IOEVENTFD:
2065         case KVM_CAP_PIT2:
2066         case KVM_CAP_PIT_STATE2:
2067         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2068         case KVM_CAP_XEN_HVM:
2069         case KVM_CAP_ADJUST_CLOCK:
2070         case KVM_CAP_VCPU_EVENTS:
2071         case KVM_CAP_HYPERV:
2072         case KVM_CAP_HYPERV_VAPIC:
2073         case KVM_CAP_HYPERV_SPIN:
2074         case KVM_CAP_PCI_SEGMENT:
2075         case KVM_CAP_DEBUGREGS:
2076         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2077         case KVM_CAP_XSAVE:
2078         case KVM_CAP_ASYNC_PF:
2079         case KVM_CAP_GET_TSC_KHZ:
2080                 r = 1;
2081                 break;
2082         case KVM_CAP_COALESCED_MMIO:
2083                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2084                 break;
2085         case KVM_CAP_VAPIC:
2086                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2087                 break;
2088         case KVM_CAP_NR_VCPUS:
2089                 r = KVM_MAX_VCPUS;
2090                 break;
2091         case KVM_CAP_NR_MEMSLOTS:
2092                 r = KVM_MEMORY_SLOTS;
2093                 break;
2094         case KVM_CAP_PV_MMU:    /* obsolete */
2095                 r = 0;
2096                 break;
2097         case KVM_CAP_IOMMU:
2098                 r = iommu_found();
2099                 break;
2100         case KVM_CAP_MCE:
2101                 r = KVM_MAX_MCE_BANKS;
2102                 break;
2103         case KVM_CAP_XCRS:
2104                 r = cpu_has_xsave;
2105                 break;
2106         case KVM_CAP_TSC_CONTROL:
2107                 r = kvm_has_tsc_control;
2108                 break;
2109         default:
2110                 r = 0;
2111                 break;
2112         }
2113         return r;
2114
2115 }
2116
2117 long kvm_arch_dev_ioctl(struct file *filp,
2118                         unsigned int ioctl, unsigned long arg)
2119 {
2120         void __user *argp = (void __user *)arg;
2121         long r;
2122
2123         switch (ioctl) {
2124         case KVM_GET_MSR_INDEX_LIST: {
2125                 struct kvm_msr_list __user *user_msr_list = argp;
2126                 struct kvm_msr_list msr_list;
2127                 unsigned n;
2128
2129                 r = -EFAULT;
2130                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2131                         goto out;
2132                 n = msr_list.nmsrs;
2133                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2134                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2135                         goto out;
2136                 r = -E2BIG;
2137                 if (n < msr_list.nmsrs)
2138                         goto out;
2139                 r = -EFAULT;
2140                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2141                                  num_msrs_to_save * sizeof(u32)))
2142                         goto out;
2143                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2144                                  &emulated_msrs,
2145                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2146                         goto out;
2147                 r = 0;
2148                 break;
2149         }
2150         case KVM_GET_SUPPORTED_CPUID: {
2151                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2152                 struct kvm_cpuid2 cpuid;
2153
2154                 r = -EFAULT;
2155                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2156                         goto out;
2157                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2158                                                       cpuid_arg->entries);
2159                 if (r)
2160                         goto out;
2161
2162                 r = -EFAULT;
2163                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2164                         goto out;
2165                 r = 0;
2166                 break;
2167         }
2168         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2169                 u64 mce_cap;
2170
2171                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2172                 r = -EFAULT;
2173                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2174                         goto out;
2175                 r = 0;
2176                 break;
2177         }
2178         default:
2179                 r = -EINVAL;
2180         }
2181 out:
2182         return r;
2183 }
2184
2185 static void wbinvd_ipi(void *garbage)
2186 {
2187         wbinvd();
2188 }
2189
2190 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2191 {
2192         return vcpu->kvm->arch.iommu_domain &&
2193                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2194 }
2195
2196 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2197 {
2198         /* Address WBINVD may be executed by guest */
2199         if (need_emulate_wbinvd(vcpu)) {
2200                 if (kvm_x86_ops->has_wbinvd_exit())
2201                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2202                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2203                         smp_call_function_single(vcpu->cpu,
2204                                         wbinvd_ipi, NULL, 1);
2205         }
2206
2207         kvm_x86_ops->vcpu_load(vcpu, cpu);
2208         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2209                 /* Make sure TSC doesn't go backwards */
2210                 s64 tsc_delta;
2211                 u64 tsc;
2212
2213                 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2214                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2215                              tsc - vcpu->arch.last_guest_tsc;
2216
2217                 if (tsc_delta < 0)
2218                         mark_tsc_unstable("KVM discovered backwards TSC");
2219                 if (check_tsc_unstable()) {
2220                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2221                         vcpu->arch.tsc_catchup = 1;
2222                 }
2223                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2224                 if (vcpu->cpu != cpu)
2225                         kvm_migrate_timers(vcpu);
2226                 vcpu->cpu = cpu;
2227         }
2228
2229         accumulate_steal_time(vcpu);
2230         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2231 }
2232
2233 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2234 {
2235         kvm_x86_ops->vcpu_put(vcpu);
2236         kvm_put_guest_fpu(vcpu);
2237         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
2238 }
2239
2240 static int is_efer_nx(void)
2241 {
2242         unsigned long long efer = 0;
2243
2244         rdmsrl_safe(MSR_EFER, &efer);
2245         return efer & EFER_NX;
2246 }
2247
2248 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2249 {
2250         int i;
2251         struct kvm_cpuid_entry2 *e, *entry;
2252
2253         entry = NULL;
2254         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2255                 e = &vcpu->arch.cpuid_entries[i];
2256                 if (e->function == 0x80000001) {
2257                         entry = e;
2258                         break;
2259                 }
2260         }
2261         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2262                 entry->edx &= ~(1 << 20);
2263                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2264         }
2265 }
2266
2267 /* when an old userspace process fills a new kernel module */
2268 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2269                                     struct kvm_cpuid *cpuid,
2270                                     struct kvm_cpuid_entry __user *entries)
2271 {
2272         int r, i;
2273         struct kvm_cpuid_entry *cpuid_entries;
2274
2275         r = -E2BIG;
2276         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2277                 goto out;
2278         r = -ENOMEM;
2279         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2280         if (!cpuid_entries)
2281                 goto out;
2282         r = -EFAULT;
2283         if (copy_from_user(cpuid_entries, entries,
2284                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2285                 goto out_free;
2286         for (i = 0; i < cpuid->nent; i++) {
2287                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2288                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2289                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2290                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2291                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2292                 vcpu->arch.cpuid_entries[i].index = 0;
2293                 vcpu->arch.cpuid_entries[i].flags = 0;
2294                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2295                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2296                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2297         }
2298         vcpu->arch.cpuid_nent = cpuid->nent;
2299         cpuid_fix_nx_cap(vcpu);
2300         r = 0;
2301         kvm_apic_set_version(vcpu);
2302         kvm_x86_ops->cpuid_update(vcpu);
2303         update_cpuid(vcpu);
2304
2305 out_free:
2306         vfree(cpuid_entries);
2307 out:
2308         return r;
2309 }
2310
2311 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2312                                      struct kvm_cpuid2 *cpuid,
2313                                      struct kvm_cpuid_entry2 __user *entries)
2314 {
2315         int r;
2316
2317         r = -E2BIG;
2318         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2319                 goto out;
2320         r = -EFAULT;
2321         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2322                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2323                 goto out;
2324         vcpu->arch.cpuid_nent = cpuid->nent;
2325         kvm_apic_set_version(vcpu);
2326         kvm_x86_ops->cpuid_update(vcpu);
2327         update_cpuid(vcpu);
2328         return 0;
2329
2330 out:
2331         return r;
2332 }
2333
2334 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2335                                      struct kvm_cpuid2 *cpuid,
2336                                      struct kvm_cpuid_entry2 __user *entries)
2337 {
2338         int r;
2339
2340         r = -E2BIG;
2341         if (cpuid->nent < vcpu->arch.cpuid_nent)
2342                 goto out;
2343         r = -EFAULT;
2344         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2345                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2346                 goto out;
2347         return 0;
2348
2349 out:
2350         cpuid->nent = vcpu->arch.cpuid_nent;
2351         return r;
2352 }
2353
2354 static void cpuid_mask(u32 *word, int wordnum)
2355 {
2356         *word &= boot_cpu_data.x86_capability[wordnum];
2357 }
2358
2359 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2360                            u32 index)
2361 {
2362         entry->function = function;
2363         entry->index = index;
2364         cpuid_count(entry->function, entry->index,
2365                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2366         entry->flags = 0;
2367 }
2368
2369 static bool supported_xcr0_bit(unsigned bit)
2370 {
2371         u64 mask = ((u64)1 << bit);
2372
2373         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2374 }
2375
2376 #define F(x) bit(X86_FEATURE_##x)
2377
2378 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2379                          u32 index, int *nent, int maxnent)
2380 {
2381         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2382 #ifdef CONFIG_X86_64
2383         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2384                                 ? F(GBPAGES) : 0;
2385         unsigned f_lm = F(LM);
2386 #else
2387         unsigned f_gbpages = 0;
2388         unsigned f_lm = 0;
2389 #endif
2390         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2391
2392         /* cpuid 1.edx */
2393         const u32 kvm_supported_word0_x86_features =
2394                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2395                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2396                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2397                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2398                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2399                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2400                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2401                 0 /* HTT, TM, Reserved, PBE */;
2402         /* cpuid 0x80000001.edx */
2403         const u32 kvm_supported_word1_x86_features =
2404                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2405                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2406                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2407                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2408                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2409                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2410                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2411                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2412         /* cpuid 1.ecx */
2413         const u32 kvm_supported_word4_x86_features =
2414                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2415                 0 /* DS-CPL, VMX, SMX, EST */ |
2416                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2417                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2418                 0 /* Reserved, DCA */ | F(XMM4_1) |
2419                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2420                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2421                 F(F16C) | F(RDRAND);
2422         /* cpuid 0x80000001.ecx */
2423         const u32 kvm_supported_word6_x86_features =
2424                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2425                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2426                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2427                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2428
2429         /* cpuid 0xC0000001.edx */
2430         const u32 kvm_supported_word5_x86_features =
2431                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2432                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2433                 F(PMM) | F(PMM_EN);
2434
2435         /* cpuid 7.0.ebx */
2436         const u32 kvm_supported_word9_x86_features =
2437                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2438
2439         /* all calls to cpuid_count() should be made on the same cpu */
2440         get_cpu();
2441         do_cpuid_1_ent(entry, function, index);
2442         ++*nent;
2443
2444         switch (function) {
2445         case 0:
2446                 entry->eax = min(entry->eax, (u32)0xd);
2447                 break;
2448         case 1:
2449                 entry->edx &= kvm_supported_word0_x86_features;
2450                 cpuid_mask(&entry->edx, 0);
2451                 entry->ecx &= kvm_supported_word4_x86_features;
2452                 cpuid_mask(&entry->ecx, 4);
2453                 /* we support x2apic emulation even if host does not support
2454                  * it since we emulate x2apic in software */
2455                 entry->ecx |= F(X2APIC);
2456                 break;
2457         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2458          * may return different values. This forces us to get_cpu() before
2459          * issuing the first command, and also to emulate this annoying behavior
2460          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2461         case 2: {
2462                 int t, times = entry->eax & 0xff;
2463
2464                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2465                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2466                 for (t = 1; t < times && *nent < maxnent; ++t) {
2467                         do_cpuid_1_ent(&entry[t], function, 0);
2468                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2469                         ++*nent;
2470                 }
2471                 break;
2472         }
2473         /* function 4 has additional index. */
2474         case 4: {
2475                 int i, cache_type;
2476
2477                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2478                 /* read more entries until cache_type is zero */
2479                 for (i = 1; *nent < maxnent; ++i) {
2480                         cache_type = entry[i - 1].eax & 0x1f;
2481                         if (!cache_type)
2482                                 break;
2483                         do_cpuid_1_ent(&entry[i], function, i);
2484                         entry[i].flags |=
2485                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2486                         ++*nent;
2487                 }
2488                 break;
2489         }
2490         case 7: {
2491                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2492                 /* Mask ebx against host capbability word 9 */
2493                 if (index == 0) {
2494                         entry->ebx &= kvm_supported_word9_x86_features;
2495                         cpuid_mask(&entry->ebx, 9);
2496                 } else
2497                         entry->ebx = 0;
2498                 entry->eax = 0;
2499                 entry->ecx = 0;
2500                 entry->edx = 0;
2501                 break;
2502         }
2503         case 9:
2504                 break;
2505         /* function 0xb has additional index. */
2506         case 0xb: {
2507                 int i, level_type;
2508
2509                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2510                 /* read more entries until level_type is zero */
2511                 for (i = 1; *nent < maxnent; ++i) {
2512                         level_type = entry[i - 1].ecx & 0xff00;
2513                         if (!level_type)
2514                                 break;
2515                         do_cpuid_1_ent(&entry[i], function, i);
2516                         entry[i].flags |=
2517                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2518                         ++*nent;
2519                 }
2520                 break;
2521         }
2522         case 0xd: {
2523                 int idx, i;
2524
2525                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2526                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2527                         do_cpuid_1_ent(&entry[i], function, idx);
2528                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2529                                 continue;
2530                         entry[i].flags |=
2531                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2532                         ++*nent;
2533                         ++i;
2534                 }
2535                 break;
2536         }
2537         case KVM_CPUID_SIGNATURE: {
2538                 char signature[12] = "KVMKVMKVM\0\0";
2539                 u32 *sigptr = (u32 *)signature;
2540                 entry->eax = 0;
2541                 entry->ebx = sigptr[0];
2542                 entry->ecx = sigptr[1];
2543                 entry->edx = sigptr[2];
2544                 break;
2545         }
2546         case KVM_CPUID_FEATURES:
2547                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2548                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2549                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2550                              (1 << KVM_FEATURE_ASYNC_PF) |
2551                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2552
2553                 if (sched_info_on())
2554                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2555
2556                 entry->ebx = 0;
2557                 entry->ecx = 0;
2558                 entry->edx = 0;
2559                 break;
2560         case 0x80000000:
2561                 entry->eax = min(entry->eax, 0x8000001a);
2562                 break;
2563         case 0x80000001:
2564                 entry->edx &= kvm_supported_word1_x86_features;
2565                 cpuid_mask(&entry->edx, 1);
2566                 entry->ecx &= kvm_supported_word6_x86_features;
2567                 cpuid_mask(&entry->ecx, 6);
2568                 break;
2569         case 0x80000008: {
2570                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2571                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2572                 unsigned phys_as = entry->eax & 0xff;
2573
2574                 if (!g_phys_as)
2575                         g_phys_as = phys_as;
2576                 entry->eax = g_phys_as | (virt_as << 8);
2577                 entry->ebx = entry->edx = 0;
2578                 break;
2579         }
2580         case 0x80000019:
2581                 entry->ecx = entry->edx = 0;
2582                 break;
2583         case 0x8000001a:
2584                 break;
2585         case 0x8000001d:
2586                 break;
2587         /*Add support for Centaur's CPUID instruction*/
2588         case 0xC0000000:
2589                 /*Just support up to 0xC0000004 now*/
2590                 entry->eax = min(entry->eax, 0xC0000004);
2591                 break;
2592         case 0xC0000001:
2593                 entry->edx &= kvm_supported_word5_x86_features;
2594                 cpuid_mask(&entry->edx, 5);
2595                 break;
2596         case 3: /* Processor serial number */
2597         case 5: /* MONITOR/MWAIT */
2598         case 6: /* Thermal management */
2599         case 0xA: /* Architectural Performance Monitoring */
2600         case 0x80000007: /* Advanced power management */
2601         case 0xC0000002:
2602         case 0xC0000003:
2603         case 0xC0000004:
2604         default:
2605                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2606                 break;
2607         }
2608
2609         kvm_x86_ops->set_supported_cpuid(function, entry);
2610
2611         put_cpu();
2612 }
2613
2614 #undef F
2615
2616 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2617                                      struct kvm_cpuid_entry2 __user *entries)
2618 {
2619         struct kvm_cpuid_entry2 *cpuid_entries;
2620         int limit, nent = 0, r = -E2BIG;
2621         u32 func;
2622
2623         if (cpuid->nent < 1)
2624                 goto out;
2625         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2626                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2627         r = -ENOMEM;
2628         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2629         if (!cpuid_entries)
2630                 goto out;
2631
2632         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2633         limit = cpuid_entries[0].eax;
2634         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2635                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2636                              &nent, cpuid->nent);
2637         r = -E2BIG;
2638         if (nent >= cpuid->nent)
2639                 goto out_free;
2640
2641         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2642         limit = cpuid_entries[nent - 1].eax;
2643         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2644                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2645                              &nent, cpuid->nent);
2646
2647
2648
2649         r = -E2BIG;
2650         if (nent >= cpuid->nent)
2651                 goto out_free;
2652
2653         /* Add support for Centaur's CPUID instruction. */
2654         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2655                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2656                                 &nent, cpuid->nent);
2657
2658                 r = -E2BIG;
2659                 if (nent >= cpuid->nent)
2660                         goto out_free;
2661
2662                 limit = cpuid_entries[nent - 1].eax;
2663                 for (func = 0xC0000001;
2664                         func <= limit && nent < cpuid->nent; ++func)
2665                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2666                                         &nent, cpuid->nent);
2667
2668                 r = -E2BIG;
2669                 if (nent >= cpuid->nent)
2670                         goto out_free;
2671         }
2672
2673         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2674                      cpuid->nent);
2675
2676         r = -E2BIG;
2677         if (nent >= cpuid->nent)
2678                 goto out_free;
2679
2680         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2681                      cpuid->nent);
2682
2683         r = -E2BIG;
2684         if (nent >= cpuid->nent)
2685                 goto out_free;
2686
2687         r = -EFAULT;
2688         if (copy_to_user(entries, cpuid_entries,
2689                          nent * sizeof(struct kvm_cpuid_entry2)))
2690                 goto out_free;
2691         cpuid->nent = nent;
2692         r = 0;
2693
2694 out_free:
2695         vfree(cpuid_entries);
2696 out:
2697         return r;
2698 }
2699
2700 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2701                                     struct kvm_lapic_state *s)
2702 {
2703         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2704
2705         return 0;
2706 }
2707
2708 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2709                                     struct kvm_lapic_state *s)
2710 {
2711         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2712         kvm_apic_post_state_restore(vcpu);
2713         update_cr8_intercept(vcpu);
2714
2715         return 0;
2716 }
2717
2718 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2719                                     struct kvm_interrupt *irq)
2720 {
2721         if (irq->irq < 0 || irq->irq >= 256)
2722                 return -EINVAL;
2723         if (irqchip_in_kernel(vcpu->kvm))
2724                 return -ENXIO;
2725
2726         kvm_queue_interrupt(vcpu, irq->irq, false);
2727         kvm_make_request(KVM_REQ_EVENT, vcpu);
2728
2729         return 0;
2730 }
2731
2732 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2733 {
2734         kvm_inject_nmi(vcpu);
2735
2736         return 0;
2737 }
2738
2739 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2740                                            struct kvm_tpr_access_ctl *tac)
2741 {
2742         if (tac->flags)
2743                 return -EINVAL;
2744         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2745         return 0;
2746 }
2747
2748 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2749                                         u64 mcg_cap)
2750 {
2751         int r;
2752         unsigned bank_num = mcg_cap & 0xff, bank;
2753
2754         r = -EINVAL;
2755         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2756                 goto out;
2757         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2758                 goto out;
2759         r = 0;
2760         vcpu->arch.mcg_cap = mcg_cap;
2761         /* Init IA32_MCG_CTL to all 1s */
2762         if (mcg_cap & MCG_CTL_P)
2763                 vcpu->arch.mcg_ctl = ~(u64)0;
2764         /* Init IA32_MCi_CTL to all 1s */
2765         for (bank = 0; bank < bank_num; bank++)
2766                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2767 out:
2768         return r;
2769 }
2770
2771 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2772                                       struct kvm_x86_mce *mce)
2773 {
2774         u64 mcg_cap = vcpu->arch.mcg_cap;
2775         unsigned bank_num = mcg_cap & 0xff;
2776         u64 *banks = vcpu->arch.mce_banks;
2777
2778         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2779                 return -EINVAL;
2780         /*
2781          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2782          * reporting is disabled
2783          */
2784         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2785             vcpu->arch.mcg_ctl != ~(u64)0)
2786                 return 0;
2787         banks += 4 * mce->bank;
2788         /*
2789          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2790          * reporting is disabled for the bank
2791          */
2792         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2793                 return 0;
2794         if (mce->status & MCI_STATUS_UC) {
2795                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2796                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2797                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2798                         return 0;
2799                 }
2800                 if (banks[1] & MCI_STATUS_VAL)
2801                         mce->status |= MCI_STATUS_OVER;
2802                 banks[2] = mce->addr;
2803                 banks[3] = mce->misc;
2804                 vcpu->arch.mcg_status = mce->mcg_status;
2805                 banks[1] = mce->status;
2806                 kvm_queue_exception(vcpu, MC_VECTOR);
2807         } else if (!(banks[1] & MCI_STATUS_VAL)
2808                    || !(banks[1] & MCI_STATUS_UC)) {
2809                 if (banks[1] & MCI_STATUS_VAL)
2810                         mce->status |= MCI_STATUS_OVER;
2811                 banks[2] = mce->addr;
2812                 banks[3] = mce->misc;
2813                 banks[1] = mce->status;
2814         } else
2815                 banks[1] |= MCI_STATUS_OVER;
2816         return 0;
2817 }
2818
2819 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2820                                                struct kvm_vcpu_events *events)
2821 {
2822         events->exception.injected =
2823                 vcpu->arch.exception.pending &&
2824                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2825         events->exception.nr = vcpu->arch.exception.nr;
2826         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2827         events->exception.pad = 0;
2828         events->exception.error_code = vcpu->arch.exception.error_code;
2829
2830         events->interrupt.injected =
2831                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2832         events->interrupt.nr = vcpu->arch.interrupt.nr;
2833         events->interrupt.soft = 0;
2834         events->interrupt.shadow =
2835                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2836                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2837
2838         events->nmi.injected = vcpu->arch.nmi_injected;
2839         events->nmi.pending = vcpu->arch.nmi_pending;
2840         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2841         events->nmi.pad = 0;
2842
2843         events->sipi_vector = vcpu->arch.sipi_vector;
2844
2845         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2846                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2847                          | KVM_VCPUEVENT_VALID_SHADOW);
2848         memset(&events->reserved, 0, sizeof(events->reserved));
2849 }
2850
2851 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2852                                               struct kvm_vcpu_events *events)
2853 {
2854         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2855                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2856                               | KVM_VCPUEVENT_VALID_SHADOW))
2857                 return -EINVAL;
2858
2859         vcpu->arch.exception.pending = events->exception.injected;
2860         vcpu->arch.exception.nr = events->exception.nr;
2861         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2862         vcpu->arch.exception.error_code = events->exception.error_code;
2863
2864         vcpu->arch.interrupt.pending = events->interrupt.injected;
2865         vcpu->arch.interrupt.nr = events->interrupt.nr;
2866         vcpu->arch.interrupt.soft = events->interrupt.soft;
2867         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2868                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2869                                                   events->interrupt.shadow);
2870
2871         vcpu->arch.nmi_injected = events->nmi.injected;
2872         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2873                 vcpu->arch.nmi_pending = events->nmi.pending;
2874         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2875
2876         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2877                 vcpu->arch.sipi_vector = events->sipi_vector;
2878
2879         kvm_make_request(KVM_REQ_EVENT, vcpu);
2880
2881         return 0;
2882 }
2883
2884 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2885                                              struct kvm_debugregs *dbgregs)
2886 {
2887         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2888         dbgregs->dr6 = vcpu->arch.dr6;
2889         dbgregs->dr7 = vcpu->arch.dr7;
2890         dbgregs->flags = 0;
2891         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2892 }
2893
2894 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2895                                             struct kvm_debugregs *dbgregs)
2896 {
2897         if (dbgregs->flags)
2898                 return -EINVAL;
2899
2900         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2901         vcpu->arch.dr6 = dbgregs->dr6;
2902         vcpu->arch.dr7 = dbgregs->dr7;
2903
2904         return 0;
2905 }
2906
2907 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2908                                          struct kvm_xsave *guest_xsave)
2909 {
2910         if (cpu_has_xsave)
2911                 memcpy(guest_xsave->region,
2912                         &vcpu->arch.guest_fpu.state->xsave,
2913                         xstate_size);
2914         else {
2915                 memcpy(guest_xsave->region,
2916                         &vcpu->arch.guest_fpu.state->fxsave,
2917                         sizeof(struct i387_fxsave_struct));
2918                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2919                         XSTATE_FPSSE;
2920         }
2921 }
2922
2923 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2924                                         struct kvm_xsave *guest_xsave)
2925 {
2926         u64 xstate_bv =
2927                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2928
2929         if (cpu_has_xsave)
2930                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2931                         guest_xsave->region, xstate_size);
2932         else {
2933                 if (xstate_bv & ~XSTATE_FPSSE)
2934                         return -EINVAL;
2935                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2936                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2937         }
2938         return 0;
2939 }
2940
2941 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2942                                         struct kvm_xcrs *guest_xcrs)
2943 {
2944         if (!cpu_has_xsave) {
2945                 guest_xcrs->nr_xcrs = 0;
2946                 return;
2947         }
2948
2949         guest_xcrs->nr_xcrs = 1;
2950         guest_xcrs->flags = 0;
2951         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2952         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2953 }
2954
2955 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2956                                        struct kvm_xcrs *guest_xcrs)
2957 {
2958         int i, r = 0;
2959
2960         if (!cpu_has_xsave)
2961                 return -EINVAL;
2962
2963         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2964                 return -EINVAL;
2965
2966         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2967                 /* Only support XCR0 currently */
2968                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2969                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2970                                 guest_xcrs->xcrs[0].value);
2971                         break;
2972                 }
2973         if (r)
2974                 r = -EINVAL;
2975         return r;
2976 }
2977
2978 long kvm_arch_vcpu_ioctl(struct file *filp,
2979                          unsigned int ioctl, unsigned long arg)
2980 {
2981         struct kvm_vcpu *vcpu = filp->private_data;
2982         void __user *argp = (void __user *)arg;
2983         int r;
2984         union {
2985                 struct kvm_lapic_state *lapic;
2986                 struct kvm_xsave *xsave;
2987                 struct kvm_xcrs *xcrs;
2988                 void *buffer;
2989         } u;
2990
2991         u.buffer = NULL;
2992         switch (ioctl) {
2993         case KVM_GET_LAPIC: {
2994                 r = -EINVAL;
2995                 if (!vcpu->arch.apic)
2996                         goto out;
2997                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2998
2999                 r = -ENOMEM;
3000                 if (!u.lapic)
3001                         goto out;
3002                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3003                 if (r)
3004                         goto out;
3005                 r = -EFAULT;
3006                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3007                         goto out;
3008                 r = 0;
3009                 break;
3010         }
3011         case KVM_SET_LAPIC: {
3012                 r = -EINVAL;
3013                 if (!vcpu->arch.apic)
3014                         goto out;
3015                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3016                 r = -ENOMEM;
3017                 if (!u.lapic)
3018                         goto out;
3019                 r = -EFAULT;
3020                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3021                         goto out;
3022                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3023                 if (r)
3024                         goto out;
3025                 r = 0;
3026                 break;
3027         }
3028         case KVM_INTERRUPT: {
3029                 struct kvm_interrupt irq;
3030
3031                 r = -EFAULT;
3032                 if (copy_from_user(&irq, argp, sizeof irq))
3033                         goto out;
3034                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3035                 if (r)
3036                         goto out;
3037                 r = 0;
3038                 break;
3039         }
3040         case KVM_NMI: {
3041                 r = kvm_vcpu_ioctl_nmi(vcpu);
3042                 if (r)
3043                         goto out;
3044                 r = 0;
3045                 break;
3046         }
3047         case KVM_SET_CPUID: {
3048                 struct kvm_cpuid __user *cpuid_arg = argp;
3049                 struct kvm_cpuid cpuid;
3050
3051                 r = -EFAULT;
3052                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3053                         goto out;
3054                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3055                 if (r)
3056                         goto out;
3057                 break;
3058         }
3059         case KVM_SET_CPUID2: {
3060                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3061                 struct kvm_cpuid2 cpuid;
3062
3063                 r = -EFAULT;
3064                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3065                         goto out;
3066                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3067                                               cpuid_arg->entries);
3068                 if (r)
3069                         goto out;
3070                 break;
3071         }
3072         case KVM_GET_CPUID2: {
3073                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3074                 struct kvm_cpuid2 cpuid;
3075
3076                 r = -EFAULT;
3077                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3078                         goto out;
3079                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3080                                               cpuid_arg->entries);
3081                 if (r)
3082                         goto out;
3083                 r = -EFAULT;
3084                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3085                         goto out;
3086                 r = 0;
3087                 break;
3088         }
3089         case KVM_GET_MSRS:
3090                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3091                 break;
3092         case KVM_SET_MSRS:
3093                 r = msr_io(vcpu, argp, do_set_msr, 0);
3094                 break;
3095         case KVM_TPR_ACCESS_REPORTING: {
3096                 struct kvm_tpr_access_ctl tac;
3097
3098                 r = -EFAULT;
3099                 if (copy_from_user(&tac, argp, sizeof tac))
3100                         goto out;
3101                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3102                 if (r)
3103                         goto out;
3104                 r = -EFAULT;
3105                 if (copy_to_user(argp, &tac, sizeof tac))
3106                         goto out;
3107                 r = 0;
3108                 break;
3109         };
3110         case KVM_SET_VAPIC_ADDR: {
3111                 struct kvm_vapic_addr va;
3112
3113                 r = -EINVAL;
3114                 if (!irqchip_in_kernel(vcpu->kvm))
3115                         goto out;
3116                 r = -EFAULT;
3117                 if (copy_from_user(&va, argp, sizeof va))
3118                         goto out;
3119                 r = 0;
3120                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3121                 break;
3122         }
3123         case KVM_X86_SETUP_MCE: {
3124                 u64 mcg_cap;
3125
3126                 r = -EFAULT;
3127                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3128                         goto out;
3129                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3130                 break;
3131         }
3132         case KVM_X86_SET_MCE: {
3133                 struct kvm_x86_mce mce;
3134
3135                 r = -EFAULT;
3136                 if (copy_from_user(&mce, argp, sizeof mce))
3137                         goto out;
3138                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3139                 break;
3140         }
3141         case KVM_GET_VCPU_EVENTS: {
3142                 struct kvm_vcpu_events events;
3143
3144                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3145
3146                 r = -EFAULT;
3147                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3148                         break;
3149                 r = 0;
3150                 break;
3151         }
3152         case KVM_SET_VCPU_EVENTS: {
3153                 struct kvm_vcpu_events events;
3154
3155                 r = -EFAULT;
3156                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3157                         break;
3158
3159                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3160                 break;
3161         }
3162         case KVM_GET_DEBUGREGS: {
3163                 struct kvm_debugregs dbgregs;
3164
3165                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3166
3167                 r = -EFAULT;
3168                 if (copy_to_user(argp, &dbgregs,
3169                                  sizeof(struct kvm_debugregs)))
3170                         break;
3171                 r = 0;
3172                 break;
3173         }
3174         case KVM_SET_DEBUGREGS: {
3175                 struct kvm_debugregs dbgregs;
3176
3177                 r = -EFAULT;
3178                 if (copy_from_user(&dbgregs, argp,
3179                                    sizeof(struct kvm_debugregs)))
3180                         break;
3181
3182                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3183                 break;
3184         }
3185         case KVM_GET_XSAVE: {
3186                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3187                 r = -ENOMEM;
3188                 if (!u.xsave)
3189                         break;
3190
3191                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3192
3193                 r = -EFAULT;
3194                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3195                         break;
3196                 r = 0;
3197                 break;
3198         }
3199         case KVM_SET_XSAVE: {
3200                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3201                 r = -ENOMEM;
3202                 if (!u.xsave)
3203                         break;
3204
3205                 r = -EFAULT;
3206                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3207                         break;
3208
3209                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3210                 break;
3211         }
3212         case KVM_GET_XCRS: {
3213                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3214                 r = -ENOMEM;
3215                 if (!u.xcrs)
3216                         break;
3217
3218                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3219
3220                 r = -EFAULT;
3221                 if (copy_to_user(argp, u.xcrs,
3222                                  sizeof(struct kvm_xcrs)))
3223                         break;
3224                 r = 0;
3225                 break;
3226         }
3227         case KVM_SET_XCRS: {
3228                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3229                 r = -ENOMEM;
3230                 if (!u.xcrs)
3231                         break;
3232
3233                 r = -EFAULT;
3234                 if (copy_from_user(u.xcrs, argp,
3235                                    sizeof(struct kvm_xcrs)))
3236                         break;
3237
3238                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3239                 break;
3240         }
3241         case KVM_SET_TSC_KHZ: {
3242                 u32 user_tsc_khz;
3243
3244                 r = -EINVAL;
3245                 if (!kvm_has_tsc_control)
3246                         break;
3247
3248                 user_tsc_khz = (u32)arg;
3249
3250                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3251                         goto out;
3252
3253                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3254
3255                 r = 0;
3256                 goto out;
3257         }
3258         case KVM_GET_TSC_KHZ: {
3259                 r = -EIO;
3260                 if (check_tsc_unstable())
3261                         goto out;
3262
3263                 r = vcpu_tsc_khz(vcpu);
3264
3265                 goto out;
3266         }
3267         default:
3268                 r = -EINVAL;
3269         }
3270 out:
3271         kfree(u.buffer);
3272         return r;
3273 }
3274
3275 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3276 {
3277         int ret;
3278
3279         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3280                 return -1;
3281         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3282         return ret;
3283 }
3284
3285 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3286                                               u64 ident_addr)
3287 {
3288         kvm->arch.ept_identity_map_addr = ident_addr;
3289         return 0;
3290 }
3291
3292 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3293                                           u32 kvm_nr_mmu_pages)
3294 {
3295         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3296                 return -EINVAL;
3297
3298         mutex_lock(&kvm->slots_lock);
3299         spin_lock(&kvm->mmu_lock);
3300
3301         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3302         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3303
3304         spin_unlock(&kvm->mmu_lock);
3305         mutex_unlock(&kvm->slots_lock);
3306         return 0;
3307 }
3308
3309 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3310 {
3311         return kvm->arch.n_max_mmu_pages;
3312 }
3313
3314 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3315 {
3316         int r;
3317
3318         r = 0;
3319         switch (chip->chip_id) {
3320         case KVM_IRQCHIP_PIC_MASTER:
3321                 memcpy(&chip->chip.pic,
3322                         &pic_irqchip(kvm)->pics[0],
3323                         sizeof(struct kvm_pic_state));
3324                 break;
3325         case KVM_IRQCHIP_PIC_SLAVE:
3326                 memcpy(&chip->chip.pic,
3327                         &pic_irqchip(kvm)->pics[1],
3328                         sizeof(struct kvm_pic_state));
3329                 break;
3330         case KVM_IRQCHIP_IOAPIC:
3331                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3332                 break;
3333         default:
3334                 r = -EINVAL;
3335                 break;
3336         }
3337         return r;
3338 }
3339
3340 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3341 {
3342         int r;
3343
3344         r = 0;
3345         switch (chip->chip_id) {
3346         case KVM_IRQCHIP_PIC_MASTER:
3347                 spin_lock(&pic_irqchip(kvm)->lock);
3348                 memcpy(&pic_irqchip(kvm)->pics[0],
3349                         &chip->chip.pic,
3350                         sizeof(struct kvm_pic_state));
3351                 spin_unlock(&pic_irqchip(kvm)->lock);
3352                 break;
3353         case KVM_IRQCHIP_PIC_SLAVE:
3354                 spin_lock(&pic_irqchip(kvm)->lock);
3355                 memcpy(&pic_irqchip(kvm)->pics[1],
3356                         &chip->chip.pic,
3357                         sizeof(struct kvm_pic_state));
3358                 spin_unlock(&pic_irqchip(kvm)->lock);
3359                 break;
3360         case KVM_IRQCHIP_IOAPIC:
3361                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3362                 break;
3363         default:
3364                 r = -EINVAL;
3365                 break;
3366         }
3367         kvm_pic_update_irq(pic_irqchip(kvm));
3368         return r;
3369 }
3370
3371 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3372 {
3373         int r = 0;
3374
3375         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3376         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3377         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3378         return r;
3379 }
3380
3381 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3382 {
3383         int r = 0;
3384
3385         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3386         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3387         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3388         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3389         return r;
3390 }
3391
3392 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3393 {
3394         int r = 0;
3395
3396         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3397         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3398                 sizeof(ps->channels));
3399         ps->flags = kvm->arch.vpit->pit_state.flags;
3400         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3401         memset(&ps->reserved, 0, sizeof(ps->reserved));
3402         return r;
3403 }
3404
3405 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3406 {
3407         int r = 0, start = 0;
3408         u32 prev_legacy, cur_legacy;
3409         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3410         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3411         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3412         if (!prev_legacy && cur_legacy)
3413                 start = 1;
3414         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3415                sizeof(kvm->arch.vpit->pit_state.channels));
3416         kvm->arch.vpit->pit_state.flags = ps->flags;
3417         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3418         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3419         return r;
3420 }
3421
3422 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3423                                  struct kvm_reinject_control *control)
3424 {
3425         if (!kvm->arch.vpit)
3426                 return -ENXIO;
3427         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3428         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3429         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3430         return 0;
3431 }
3432
3433 /*
3434  * Get (and clear) the dirty memory log for a memory slot.
3435  */
3436 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3437                                       struct kvm_dirty_log *log)
3438 {
3439         int r, i;
3440         struct kvm_memory_slot *memslot;
3441         unsigned long n;
3442         unsigned long is_dirty = 0;
3443
3444         mutex_lock(&kvm->slots_lock);
3445
3446         r = -EINVAL;
3447         if (log->slot >= KVM_MEMORY_SLOTS)
3448                 goto out;
3449
3450         memslot = &kvm->memslots->memslots[log->slot];
3451         r = -ENOENT;
3452         if (!memslot->dirty_bitmap)
3453                 goto out;
3454
3455         n = kvm_dirty_bitmap_bytes(memslot);
3456
3457         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3458                 is_dirty = memslot->dirty_bitmap[i];
3459
3460         /* If nothing is dirty, don't bother messing with page tables. */
3461         if (is_dirty) {
3462                 struct kvm_memslots *slots, *old_slots;
3463                 unsigned long *dirty_bitmap;
3464
3465                 dirty_bitmap = memslot->dirty_bitmap_head;
3466                 if (memslot->dirty_bitmap == dirty_bitmap)
3467                         dirty_bitmap += n / sizeof(long);
3468                 memset(dirty_bitmap, 0, n);
3469
3470                 r = -ENOMEM;
3471                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3472                 if (!slots)
3473                         goto out;
3474                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3475                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3476                 slots->generation++;
3477
3478                 old_slots = kvm->memslots;
3479                 rcu_assign_pointer(kvm->memslots, slots);
3480                 synchronize_srcu_expedited(&kvm->srcu);
3481                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3482                 kfree(old_slots);
3483
3484                 spin_lock(&kvm->mmu_lock);
3485                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3486                 spin_unlock(&kvm->mmu_lock);
3487
3488                 r = -EFAULT;
3489                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3490                         goto out;
3491         } else {
3492                 r = -EFAULT;
3493                 if (clear_user(log->dirty_bitmap, n))
3494                         goto out;
3495         }
3496
3497         r = 0;
3498 out:
3499         mutex_unlock(&kvm->slots_lock);
3500         return r;
3501 }
3502
3503 long kvm_arch_vm_ioctl(struct file *filp,
3504                        unsigned int ioctl, unsigned long arg)
3505 {
3506         struct kvm *kvm = filp->private_data;
3507         void __user *argp = (void __user *)arg;
3508         int r = -ENOTTY;
3509         /*
3510          * This union makes it completely explicit to gcc-3.x
3511          * that these two variables' stack usage should be
3512          * combined, not added together.
3513          */
3514         union {
3515                 struct kvm_pit_state ps;
3516                 struct kvm_pit_state2 ps2;
3517                 struct kvm_pit_config pit_config;
3518         } u;
3519
3520         switch (ioctl) {
3521         case KVM_SET_TSS_ADDR:
3522                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3523                 if (r < 0)
3524                         goto out;
3525                 break;
3526         case KVM_SET_IDENTITY_MAP_ADDR: {
3527                 u64 ident_addr;
3528
3529                 r = -EFAULT;
3530                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3531                         goto out;
3532                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3533                 if (r < 0)
3534                         goto out;
3535                 break;
3536         }
3537         case KVM_SET_NR_MMU_PAGES:
3538                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3539                 if (r)
3540                         goto out;
3541                 break;
3542         case KVM_GET_NR_MMU_PAGES:
3543                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3544                 break;
3545         case KVM_CREATE_IRQCHIP: {
3546                 struct kvm_pic *vpic;
3547
3548                 mutex_lock(&kvm->lock);
3549                 r = -EEXIST;
3550                 if (kvm->arch.vpic)
3551                         goto create_irqchip_unlock;
3552                 r = -ENOMEM;
3553                 vpic = kvm_create_pic(kvm);
3554                 if (vpic) {
3555                         r = kvm_ioapic_init(kvm);
3556                         if (r) {
3557                                 mutex_lock(&kvm->slots_lock);
3558                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3559                                                           &vpic->dev);
3560                                 mutex_unlock(&kvm->slots_lock);
3561                                 kfree(vpic);
3562                                 goto create_irqchip_unlock;
3563                         }
3564                 } else
3565                         goto create_irqchip_unlock;
3566                 smp_wmb();
3567                 kvm->arch.vpic = vpic;
3568                 smp_wmb();
3569                 r = kvm_setup_default_irq_routing(kvm);
3570                 if (r) {
3571                         mutex_lock(&kvm->slots_lock);
3572                         mutex_lock(&kvm->irq_lock);
3573                         kvm_ioapic_destroy(kvm);
3574                         kvm_destroy_pic(kvm);
3575                         mutex_unlock(&kvm->irq_lock);
3576                         mutex_unlock(&kvm->slots_lock);
3577                 }
3578         create_irqchip_unlock:
3579                 mutex_unlock(&kvm->lock);
3580                 break;
3581         }
3582         case KVM_CREATE_PIT:
3583                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3584                 goto create_pit;
3585         case KVM_CREATE_PIT2:
3586                 r = -EFAULT;
3587                 if (copy_from_user(&u.pit_config, argp,
3588                                    sizeof(struct kvm_pit_config)))
3589                         goto out;
3590         create_pit:
3591                 mutex_lock(&kvm->slots_lock);
3592                 r = -EEXIST;
3593                 if (kvm->arch.vpit)
3594                         goto create_pit_unlock;
3595                 r = -ENOMEM;
3596                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3597                 if (kvm->arch.vpit)
3598                         r = 0;
3599         create_pit_unlock:
3600                 mutex_unlock(&kvm->slots_lock);
3601                 break;
3602         case KVM_IRQ_LINE_STATUS:
3603         case KVM_IRQ_LINE: {
3604                 struct kvm_irq_level irq_event;
3605
3606                 r = -EFAULT;
3607                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3608                         goto out;
3609                 r = -ENXIO;
3610                 if (irqchip_in_kernel(kvm)) {
3611                         __s32 status;
3612                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3613                                         irq_event.irq, irq_event.level);
3614                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3615                                 r = -EFAULT;
3616                                 irq_event.status = status;
3617                                 if (copy_to_user(argp, &irq_event,
3618                                                         sizeof irq_event))
3619                                         goto out;
3620                         }
3621                         r = 0;
3622                 }
3623                 break;
3624         }
3625         case KVM_GET_IRQCHIP: {
3626                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3627                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3628
3629                 r = -ENOMEM;
3630                 if (!chip)
3631                         goto out;
3632                 r = -EFAULT;
3633                 if (copy_from_user(chip, argp, sizeof *chip))
3634                         goto get_irqchip_out;
3635                 r = -ENXIO;
3636                 if (!irqchip_in_kernel(kvm))
3637                         goto get_irqchip_out;
3638                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3639                 if (r)
3640                         goto get_irqchip_out;
3641                 r = -EFAULT;
3642                 if (copy_to_user(argp, chip, sizeof *chip))
3643                         goto get_irqchip_out;
3644                 r = 0;
3645         get_irqchip_out:
3646                 kfree(chip);
3647                 if (r)
3648                         goto out;
3649                 break;
3650         }
3651         case KVM_SET_IRQCHIP: {
3652                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3653                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3654
3655                 r = -ENOMEM;
3656                 if (!chip)
3657                         goto out;
3658                 r = -EFAULT;
3659                 if (copy_from_user(chip, argp, sizeof *chip))
3660                         goto set_irqchip_out;
3661                 r = -ENXIO;
3662                 if (!irqchip_in_kernel(kvm))
3663                         goto set_irqchip_out;
3664                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3665                 if (r)
3666                         goto set_irqchip_out;
3667                 r = 0;
3668         set_irqchip_out:
3669                 kfree(chip);
3670                 if (r)
3671                         goto out;
3672                 break;
3673         }
3674         case KVM_GET_PIT: {
3675                 r = -EFAULT;
3676                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3677                         goto out;
3678                 r = -ENXIO;
3679                 if (!kvm->arch.vpit)
3680                         goto out;
3681                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3682                 if (r)
3683                         goto out;
3684                 r = -EFAULT;
3685                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3686                         goto out;
3687                 r = 0;
3688                 break;
3689         }
3690         case KVM_SET_PIT: {
3691                 r = -EFAULT;
3692                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3693                         goto out;
3694                 r = -ENXIO;
3695                 if (!kvm->arch.vpit)
3696                         goto out;
3697                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3698                 if (r)
3699                         goto out;
3700                 r = 0;
3701                 break;
3702         }
3703         case KVM_GET_PIT2: {
3704                 r = -ENXIO;
3705                 if (!kvm->arch.vpit)
3706                         goto out;
3707                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3708                 if (r)
3709                         goto out;
3710                 r = -EFAULT;
3711                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3712                         goto out;
3713                 r = 0;
3714                 break;
3715         }
3716         case KVM_SET_PIT2: {
3717                 r = -EFAULT;
3718                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3719                         goto out;
3720                 r = -ENXIO;
3721                 if (!kvm->arch.vpit)
3722                         goto out;
3723                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3724                 if (r)
3725                         goto out;
3726                 r = 0;
3727                 break;
3728         }
3729         case KVM_REINJECT_CONTROL: {
3730                 struct kvm_reinject_control control;
3731                 r =  -EFAULT;
3732                 if (copy_from_user(&control, argp, sizeof(control)))
3733                         goto out;
3734                 r = kvm_vm_ioctl_reinject(kvm, &control);
3735                 if (r)
3736                         goto out;
3737                 r = 0;
3738                 break;
3739         }
3740         case KVM_XEN_HVM_CONFIG: {
3741                 r = -EFAULT;
3742                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3743                                    sizeof(struct kvm_xen_hvm_config)))
3744                         goto out;
3745                 r = -EINVAL;
3746                 if (kvm->arch.xen_hvm_config.flags)
3747                         goto out;
3748                 r = 0;
3749                 break;
3750         }
3751         case KVM_SET_CLOCK: {
3752                 struct kvm_clock_data user_ns;
3753                 u64 now_ns;
3754                 s64 delta;
3755
3756                 r = -EFAULT;
3757                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3758                         goto out;
3759
3760                 r = -EINVAL;
3761                 if (user_ns.flags)
3762                         goto out;
3763
3764                 r = 0;
3765                 local_irq_disable();
3766                 now_ns = get_kernel_ns();
3767                 delta = user_ns.clock - now_ns;
3768                 local_irq_enable();
3769                 kvm->arch.kvmclock_offset = delta;
3770                 break;
3771         }
3772         case KVM_GET_CLOCK: {
3773                 struct kvm_clock_data user_ns;
3774                 u64 now_ns;
3775
3776                 local_irq_disable();
3777                 now_ns = get_kernel_ns();
3778                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3779                 local_irq_enable();
3780                 user_ns.flags = 0;
3781                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3782
3783                 r = -EFAULT;
3784                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3785                         goto out;
3786                 r = 0;
3787                 break;
3788         }
3789
3790         default:
3791                 ;
3792         }
3793 out:
3794         return r;
3795 }
3796
3797 static void kvm_init_msr_list(void)
3798 {
3799         u32 dummy[2];
3800         unsigned i, j;
3801
3802         /* skip the first msrs in the list. KVM-specific */
3803         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3804                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3805                         continue;
3806                 if (j < i)
3807                         msrs_to_save[j] = msrs_to_save[i];
3808                 j++;
3809         }
3810         num_msrs_to_save = j;
3811 }
3812
3813 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3814                            const void *v)
3815 {
3816         int handled = 0;
3817         int n;
3818
3819         do {
3820                 n = min(len, 8);
3821                 if (!(vcpu->arch.apic &&
3822                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3823                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3824                         break;
3825                 handled += n;
3826                 addr += n;
3827                 len -= n;
3828                 v += n;
3829         } while (len);
3830
3831         return handled;
3832 }
3833
3834 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3835 {
3836         int handled = 0;
3837         int n;
3838
3839         do {
3840                 n = min(len, 8);
3841                 if (!(vcpu->arch.apic &&
3842                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3843                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3844                         break;
3845                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3846                 handled += n;
3847                 addr += n;
3848                 len -= n;
3849                 v += n;
3850         } while (len);
3851
3852         return handled;
3853 }
3854
3855 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3856                         struct kvm_segment *var, int seg)
3857 {
3858         kvm_x86_ops->set_segment(vcpu, var, seg);
3859 }
3860
3861 void kvm_get_segment(struct kvm_vcpu *vcpu,
3862                      struct kvm_segment *var, int seg)
3863 {
3864         kvm_x86_ops->get_segment(vcpu, var, seg);
3865 }
3866
3867 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3868 {
3869         return gpa;
3870 }
3871
3872 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3873 {
3874         gpa_t t_gpa;
3875         struct x86_exception exception;
3876
3877         BUG_ON(!mmu_is_nested(vcpu));
3878
3879         /* NPT walks are always user-walks */
3880         access |= PFERR_USER_MASK;
3881         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3882
3883         return t_gpa;
3884 }
3885
3886 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3887                               struct x86_exception *exception)
3888 {
3889         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3890         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3891 }
3892
3893  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3894                                 struct x86_exception *exception)
3895 {
3896         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3897         access |= PFERR_FETCH_MASK;
3898         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3899 }
3900
3901 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3902                                struct x86_exception *exception)
3903 {
3904         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3905         access |= PFERR_WRITE_MASK;
3906         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3907 }
3908
3909 /* uses this to access any guest's mapped memory without checking CPL */
3910 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3911                                 struct x86_exception *exception)
3912 {
3913         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3914 }
3915
3916 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3917                                       struct kvm_vcpu *vcpu, u32 access,
3918                                       struct x86_exception *exception)
3919 {
3920         void *data = val;
3921         int r = X86EMUL_CONTINUE;
3922
3923         while (bytes) {
3924                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3925                                                             exception);
3926                 unsigned offset = addr & (PAGE_SIZE-1);
3927                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3928                 int ret;
3929
3930                 if (gpa == UNMAPPED_GVA)
3931                         return X86EMUL_PROPAGATE_FAULT;
3932                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3933                 if (ret < 0) {
3934                         r = X86EMUL_IO_NEEDED;
3935                         goto out;
3936                 }
3937
3938                 bytes -= toread;
3939                 data += toread;
3940                 addr += toread;
3941         }
3942 out:
3943         return r;
3944 }
3945
3946 /* used for instruction fetching */
3947 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3948                                 gva_t addr, void *val, unsigned int bytes,
3949                                 struct x86_exception *exception)
3950 {
3951         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3952         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3953
3954         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3955                                           access | PFERR_FETCH_MASK,
3956                                           exception);
3957 }
3958
3959 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3960                                gva_t addr, void *val, unsigned int bytes,
3961                                struct x86_exception *exception)
3962 {
3963         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3964         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3965
3966         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3967                                           exception);
3968 }
3969 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3970
3971 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3972                                       gva_t addr, void *val, unsigned int bytes,
3973                                       struct x86_exception *exception)
3974 {
3975         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3976         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3977 }
3978
3979 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3980                                        gva_t addr, void *val,
3981                                        unsigned int bytes,
3982                                        struct x86_exception *exception)
3983 {
3984         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3985         void *data = val;
3986         int r = X86EMUL_CONTINUE;
3987
3988         while (bytes) {
3989                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3990                                                              PFERR_WRITE_MASK,
3991                                                              exception);
3992                 unsigned offset = addr & (PAGE_SIZE-1);
3993                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3994                 int ret;
3995
3996                 if (gpa == UNMAPPED_GVA)
3997                         return X86EMUL_PROPAGATE_FAULT;
3998                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3999                 if (ret < 0) {
4000                         r = X86EMUL_IO_NEEDED;
4001                         goto out;
4002                 }
4003
4004                 bytes -= towrite;
4005                 data += towrite;
4006                 addr += towrite;
4007         }
4008 out:
4009         return r;
4010 }
4011 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4012
4013 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4014                                 gpa_t *gpa, struct x86_exception *exception,
4015                                 bool write)
4016 {
4017         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4018
4019         if (vcpu_match_mmio_gva(vcpu, gva) &&
4020                   check_write_user_access(vcpu, write, access,
4021                   vcpu->arch.access)) {
4022                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4023                                         (gva & (PAGE_SIZE - 1));
4024                 return 1;
4025         }
4026
4027         if (write)
4028                 access |= PFERR_WRITE_MASK;
4029
4030         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4031
4032         if (*gpa == UNMAPPED_GVA)
4033                 return -1;
4034
4035         /* For APIC access vmexit */
4036         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4037                 return 1;
4038
4039         if (vcpu_match_mmio_gpa(vcpu, *gpa))
4040                 return 1;
4041
4042         return 0;
4043 }
4044
4045 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4046                                   unsigned long addr,
4047                                   void *val,
4048                                   unsigned int bytes,
4049                                   struct x86_exception *exception)
4050 {
4051         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4052         gpa_t gpa;
4053         int handled, ret;
4054
4055         if (vcpu->mmio_read_completed) {
4056                 memcpy(val, vcpu->mmio_data, bytes);
4057                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4058                                vcpu->mmio_phys_addr, *(u64 *)val);
4059                 vcpu->mmio_read_completed = 0;
4060                 return X86EMUL_CONTINUE;
4061         }
4062
4063         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, false);
4064
4065         if (ret < 0)
4066                 return X86EMUL_PROPAGATE_FAULT;
4067
4068         if (ret)
4069                 goto mmio;
4070
4071         if (kvm_read_guest_virt(ctxt, addr, val, bytes, exception)
4072             == X86EMUL_CONTINUE)
4073                 return X86EMUL_CONTINUE;
4074
4075 mmio:
4076         /*
4077          * Is this MMIO handled locally?
4078          */
4079         handled = vcpu_mmio_read(vcpu, gpa, bytes, val);
4080
4081         if (handled == bytes)
4082                 return X86EMUL_CONTINUE;
4083
4084         gpa += handled;
4085         bytes -= handled;
4086         val += handled;
4087
4088         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4089
4090         vcpu->mmio_needed = 1;
4091         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4092         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4093         vcpu->mmio_size = bytes;
4094         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4095         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
4096         vcpu->mmio_index = 0;
4097
4098         return X86EMUL_IO_NEEDED;
4099 }
4100
4101 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4102                         const void *val, int bytes)
4103 {
4104         int ret;
4105
4106         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4107         if (ret < 0)
4108                 return 0;
4109         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4110         return 1;
4111 }
4112
4113 static int emulator_write_emulated_onepage(unsigned long addr,
4114                                            const void *val,
4115                                            unsigned int bytes,
4116                                            struct x86_exception *exception,
4117                                            struct kvm_vcpu *vcpu)
4118 {
4119         gpa_t gpa;
4120         int handled, ret;
4121
4122         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, true);
4123
4124         if (ret < 0)
4125                 return X86EMUL_PROPAGATE_FAULT;
4126
4127         /* For APIC access vmexit */
4128         if (ret)
4129                 goto mmio;
4130
4131         if (emulator_write_phys(vcpu, gpa, val, bytes))
4132                 return X86EMUL_CONTINUE;
4133
4134 mmio:
4135         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4136         /*
4137          * Is this MMIO handled locally?
4138          */
4139         handled = vcpu_mmio_write(vcpu, gpa, bytes, val);
4140         if (handled == bytes)
4141                 return X86EMUL_CONTINUE;
4142
4143         gpa += handled;
4144         bytes -= handled;
4145         val += handled;
4146
4147         vcpu->mmio_needed = 1;
4148         memcpy(vcpu->mmio_data, val, bytes);
4149         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4150         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4151         vcpu->mmio_size = bytes;
4152         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4153         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
4154         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4155         vcpu->mmio_index = 0;
4156
4157         return X86EMUL_CONTINUE;
4158 }
4159
4160 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4161                             unsigned long addr,
4162                             const void *val,
4163                             unsigned int bytes,
4164                             struct x86_exception *exception)
4165 {
4166         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4167
4168         /* Crossing a page boundary? */
4169         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4170                 int rc, now;
4171
4172                 now = -addr & ~PAGE_MASK;
4173                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
4174                                                      vcpu);
4175                 if (rc != X86EMUL_CONTINUE)
4176                         return rc;
4177                 addr += now;
4178                 val += now;
4179                 bytes -= now;
4180         }
4181         return emulator_write_emulated_onepage(addr, val, bytes, exception,
4182                                                vcpu);
4183 }
4184
4185 #define CMPXCHG_TYPE(t, ptr, old, new) \
4186         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4187
4188 #ifdef CONFIG_X86_64
4189 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4190 #else
4191 #  define CMPXCHG64(ptr, old, new) \
4192         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4193 #endif
4194
4195 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4196                                      unsigned long addr,
4197                                      const void *old,
4198                                      const void *new,
4199                                      unsigned int bytes,
4200                                      struct x86_exception *exception)
4201 {
4202         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4203         gpa_t gpa;
4204         struct page *page;
4205         char *kaddr;
4206         bool exchanged;
4207
4208         /* guests cmpxchg8b have to be emulated atomically */
4209         if (bytes > 8 || (bytes & (bytes - 1)))
4210                 goto emul_write;
4211
4212         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4213
4214         if (gpa == UNMAPPED_GVA ||
4215             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4216                 goto emul_write;
4217
4218         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4219                 goto emul_write;
4220
4221         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4222         if (is_error_page(page)) {
4223                 kvm_release_page_clean(page);
4224                 goto emul_write;
4225         }
4226
4227         kaddr = kmap_atomic(page, KM_USER0);
4228         kaddr += offset_in_page(gpa);
4229         switch (bytes) {
4230         case 1:
4231                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4232                 break;
4233         case 2:
4234                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4235                 break;
4236         case 4:
4237                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4238                 break;
4239         case 8:
4240                 exchanged = CMPXCHG64(kaddr, old, new);
4241                 break;
4242         default:
4243                 BUG();
4244         }
4245         kunmap_atomic(kaddr, KM_USER0);
4246         kvm_release_page_dirty(page);
4247
4248         if (!exchanged)
4249                 return X86EMUL_CMPXCHG_FAILED;
4250
4251         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4252
4253         return X86EMUL_CONTINUE;
4254
4255 emul_write:
4256         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4257
4258         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4259 }
4260
4261 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4262 {
4263         /* TODO: String I/O for in kernel device */
4264         int r;
4265
4266         if (vcpu->arch.pio.in)
4267                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4268                                     vcpu->arch.pio.size, pd);
4269         else
4270                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4271                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4272                                      pd);
4273         return r;
4274 }
4275
4276
4277 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4278                                     int size, unsigned short port, void *val,
4279                                     unsigned int count)
4280 {
4281         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4282
4283         if (vcpu->arch.pio.count)
4284                 goto data_avail;
4285
4286         trace_kvm_pio(0, port, size, count);
4287
4288         vcpu->arch.pio.port = port;
4289         vcpu->arch.pio.in = 1;
4290         vcpu->arch.pio.count  = count;
4291         vcpu->arch.pio.size = size;
4292
4293         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4294         data_avail:
4295                 memcpy(val, vcpu->arch.pio_data, size * count);
4296                 vcpu->arch.pio.count = 0;
4297                 return 1;
4298         }
4299
4300         vcpu->run->exit_reason = KVM_EXIT_IO;
4301         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4302         vcpu->run->io.size = size;
4303         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4304         vcpu->run->io.count = count;
4305         vcpu->run->io.port = port;
4306
4307         return 0;
4308 }
4309
4310 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4311                                      int size, unsigned short port,
4312                                      const void *val, unsigned int count)
4313 {
4314         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4315
4316         trace_kvm_pio(1, port, size, count);
4317
4318         vcpu->arch.pio.port = port;
4319         vcpu->arch.pio.in = 0;
4320         vcpu->arch.pio.count = count;
4321         vcpu->arch.pio.size = size;
4322
4323         memcpy(vcpu->arch.pio_data, val, size * count);
4324
4325         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4326                 vcpu->arch.pio.count = 0;
4327                 return 1;
4328         }
4329
4330         vcpu->run->exit_reason = KVM_EXIT_IO;
4331         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4332         vcpu->run->io.size = size;
4333         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4334         vcpu->run->io.count = count;
4335         vcpu->run->io.port = port;
4336
4337         return 0;
4338 }
4339
4340 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4341 {
4342         return kvm_x86_ops->get_segment_base(vcpu, seg);
4343 }
4344
4345 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4346 {
4347         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4348 }
4349
4350 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4351 {
4352         if (!need_emulate_wbinvd(vcpu))
4353                 return X86EMUL_CONTINUE;
4354
4355         if (kvm_x86_ops->has_wbinvd_exit()) {
4356                 int cpu = get_cpu();
4357
4358                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4359                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4360                                 wbinvd_ipi, NULL, 1);
4361                 put_cpu();
4362                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4363         } else
4364                 wbinvd();
4365         return X86EMUL_CONTINUE;
4366 }
4367 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4368
4369 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4370 {
4371         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4372 }
4373
4374 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4375 {
4376         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4377 }
4378
4379 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4380 {
4381
4382         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4383 }
4384
4385 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4386 {
4387         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4388 }
4389
4390 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4391 {
4392         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4393         unsigned long value;
4394
4395         switch (cr) {
4396         case 0:
4397                 value = kvm_read_cr0(vcpu);
4398                 break;
4399         case 2:
4400                 value = vcpu->arch.cr2;
4401                 break;
4402         case 3:
4403                 value = kvm_read_cr3(vcpu);
4404                 break;
4405         case 4:
4406                 value = kvm_read_cr4(vcpu);
4407                 break;
4408         case 8:
4409                 value = kvm_get_cr8(vcpu);
4410                 break;
4411         default:
4412                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4413                 return 0;
4414         }
4415
4416         return value;
4417 }
4418
4419 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4420 {
4421         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4422         int res = 0;
4423
4424         switch (cr) {
4425         case 0:
4426                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4427                 break;
4428         case 2:
4429                 vcpu->arch.cr2 = val;
4430                 break;
4431         case 3:
4432                 res = kvm_set_cr3(vcpu, val);
4433                 break;
4434         case 4:
4435                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4436                 break;
4437         case 8:
4438                 res = kvm_set_cr8(vcpu, val);
4439                 break;
4440         default:
4441                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4442                 res = -1;
4443         }
4444
4445         return res;
4446 }
4447
4448 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4449 {
4450         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4451 }
4452
4453 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4454 {
4455         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4456 }
4457
4458 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4459 {
4460         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4461 }
4462
4463 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4464 {
4465         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4466 }
4467
4468 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4469 {
4470         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4471 }
4472
4473 static unsigned long emulator_get_cached_segment_base(
4474         struct x86_emulate_ctxt *ctxt, int seg)
4475 {
4476         return get_segment_base(emul_to_vcpu(ctxt), seg);
4477 }
4478
4479 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4480                                  struct desc_struct *desc, u32 *base3,
4481                                  int seg)
4482 {
4483         struct kvm_segment var;
4484
4485         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4486         *selector = var.selector;
4487
4488         if (var.unusable)
4489                 return false;
4490
4491         if (var.g)
4492                 var.limit >>= 12;
4493         set_desc_limit(desc, var.limit);
4494         set_desc_base(desc, (unsigned long)var.base);
4495 #ifdef CONFIG_X86_64
4496         if (base3)
4497                 *base3 = var.base >> 32;
4498 #endif
4499         desc->type = var.type;
4500         desc->s = var.s;
4501         desc->dpl = var.dpl;
4502         desc->p = var.present;
4503         desc->avl = var.avl;
4504         desc->l = var.l;
4505         desc->d = var.db;
4506         desc->g = var.g;
4507
4508         return true;
4509 }
4510
4511 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4512                                  struct desc_struct *desc, u32 base3,
4513                                  int seg)
4514 {
4515         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4516         struct kvm_segment var;
4517
4518         var.selector = selector;
4519         var.base = get_desc_base(desc);
4520 #ifdef CONFIG_X86_64
4521         var.base |= ((u64)base3) << 32;
4522 #endif
4523         var.limit = get_desc_limit(desc);
4524         if (desc->g)
4525                 var.limit = (var.limit << 12) | 0xfff;
4526         var.type = desc->type;
4527         var.present = desc->p;
4528         var.dpl = desc->dpl;
4529         var.db = desc->d;
4530         var.s = desc->s;
4531         var.l = desc->l;
4532         var.g = desc->g;
4533         var.avl = desc->avl;
4534         var.present = desc->p;
4535         var.unusable = !var.present;
4536         var.padding = 0;
4537
4538         kvm_set_segment(vcpu, &var, seg);
4539         return;
4540 }
4541
4542 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4543                             u32 msr_index, u64 *pdata)
4544 {
4545         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4546 }
4547
4548 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4549                             u32 msr_index, u64 data)
4550 {
4551         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4552 }
4553
4554 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4555 {
4556         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4557 }
4558
4559 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4560 {
4561         preempt_disable();
4562         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4563         /*
4564          * CR0.TS may reference the host fpu state, not the guest fpu state,
4565          * so it may be clear at this point.
4566          */
4567         clts();
4568 }
4569
4570 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4571 {
4572         preempt_enable();
4573 }
4574
4575 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4576                               struct x86_instruction_info *info,
4577                               enum x86_intercept_stage stage)
4578 {
4579         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4580 }
4581
4582 static struct x86_emulate_ops emulate_ops = {
4583         .read_std            = kvm_read_guest_virt_system,
4584         .write_std           = kvm_write_guest_virt_system,
4585         .fetch               = kvm_fetch_guest_virt,
4586         .read_emulated       = emulator_read_emulated,
4587         .write_emulated      = emulator_write_emulated,
4588         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4589         .invlpg              = emulator_invlpg,
4590         .pio_in_emulated     = emulator_pio_in_emulated,
4591         .pio_out_emulated    = emulator_pio_out_emulated,
4592         .get_segment         = emulator_get_segment,
4593         .set_segment         = emulator_set_segment,
4594         .get_cached_segment_base = emulator_get_cached_segment_base,
4595         .get_gdt             = emulator_get_gdt,
4596         .get_idt             = emulator_get_idt,
4597         .set_gdt             = emulator_set_gdt,
4598         .set_idt             = emulator_set_idt,
4599         .get_cr              = emulator_get_cr,
4600         .set_cr              = emulator_set_cr,
4601         .cpl                 = emulator_get_cpl,
4602         .get_dr              = emulator_get_dr,
4603         .set_dr              = emulator_set_dr,
4604         .set_msr             = emulator_set_msr,
4605         .get_msr             = emulator_get_msr,
4606         .halt                = emulator_halt,
4607         .wbinvd              = emulator_wbinvd,
4608         .fix_hypercall       = emulator_fix_hypercall,
4609         .get_fpu             = emulator_get_fpu,
4610         .put_fpu             = emulator_put_fpu,
4611         .intercept           = emulator_intercept,
4612 };
4613
4614 static void cache_all_regs(struct kvm_vcpu *vcpu)
4615 {
4616         kvm_register_read(vcpu, VCPU_REGS_RAX);
4617         kvm_register_read(vcpu, VCPU_REGS_RSP);
4618         kvm_register_read(vcpu, VCPU_REGS_RIP);
4619         vcpu->arch.regs_dirty = ~0;
4620 }
4621
4622 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4623 {
4624         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4625         /*
4626          * an sti; sti; sequence only disable interrupts for the first
4627          * instruction. So, if the last instruction, be it emulated or
4628          * not, left the system with the INT_STI flag enabled, it
4629          * means that the last instruction is an sti. We should not
4630          * leave the flag on in this case. The same goes for mov ss
4631          */
4632         if (!(int_shadow & mask))
4633                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4634 }
4635
4636 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4637 {
4638         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4639         if (ctxt->exception.vector == PF_VECTOR)
4640                 kvm_propagate_fault(vcpu, &ctxt->exception);
4641         else if (ctxt->exception.error_code_valid)
4642                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4643                                       ctxt->exception.error_code);
4644         else
4645                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4646 }
4647
4648 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4649                               const unsigned long *regs)
4650 {
4651         memset(&ctxt->twobyte, 0,
4652                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4653         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4654
4655         ctxt->fetch.start = 0;
4656         ctxt->fetch.end = 0;
4657         ctxt->io_read.pos = 0;
4658         ctxt->io_read.end = 0;
4659         ctxt->mem_read.pos = 0;
4660         ctxt->mem_read.end = 0;
4661 }
4662
4663 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4664 {
4665         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4666         int cs_db, cs_l;
4667
4668         /*
4669          * TODO: fix emulate.c to use guest_read/write_register
4670          * instead of direct ->regs accesses, can save hundred cycles
4671          * on Intel for instructions that don't read/change RSP, for
4672          * for example.
4673          */
4674         cache_all_regs(vcpu);
4675
4676         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4677
4678         ctxt->eflags = kvm_get_rflags(vcpu);
4679         ctxt->eip = kvm_rip_read(vcpu);
4680         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4681                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4682                      cs_l                               ? X86EMUL_MODE_PROT64 :
4683                      cs_db                              ? X86EMUL_MODE_PROT32 :
4684                                                           X86EMUL_MODE_PROT16;
4685         ctxt->guest_mode = is_guest_mode(vcpu);
4686
4687         init_decode_cache(ctxt, vcpu->arch.regs);
4688         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4689 }
4690
4691 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4692 {
4693         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4694         int ret;
4695
4696         init_emulate_ctxt(vcpu);
4697
4698         ctxt->op_bytes = 2;
4699         ctxt->ad_bytes = 2;
4700         ctxt->_eip = ctxt->eip + inc_eip;
4701         ret = emulate_int_real(ctxt, irq);
4702
4703         if (ret != X86EMUL_CONTINUE)
4704                 return EMULATE_FAIL;
4705
4706         ctxt->eip = ctxt->_eip;
4707         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4708         kvm_rip_write(vcpu, ctxt->eip);
4709         kvm_set_rflags(vcpu, ctxt->eflags);
4710
4711         if (irq == NMI_VECTOR)
4712                 vcpu->arch.nmi_pending = false;
4713         else
4714                 vcpu->arch.interrupt.pending = false;
4715
4716         return EMULATE_DONE;
4717 }
4718 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4719
4720 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4721 {
4722         int r = EMULATE_DONE;
4723
4724         ++vcpu->stat.insn_emulation_fail;
4725         trace_kvm_emulate_insn_failed(vcpu);
4726         if (!is_guest_mode(vcpu)) {
4727                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4728                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4729                 vcpu->run->internal.ndata = 0;
4730                 r = EMULATE_FAIL;
4731         }
4732         kvm_queue_exception(vcpu, UD_VECTOR);
4733
4734         return r;
4735 }
4736
4737 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4738 {
4739         gpa_t gpa;
4740
4741         if (tdp_enabled)
4742                 return false;
4743
4744         /*
4745          * if emulation was due to access to shadowed page table
4746          * and it failed try to unshadow page and re-entetr the
4747          * guest to let CPU execute the instruction.
4748          */
4749         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4750                 return true;
4751
4752         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4753
4754         if (gpa == UNMAPPED_GVA)
4755                 return true; /* let cpu generate fault */
4756
4757         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4758                 return true;
4759
4760         return false;
4761 }
4762
4763 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4764                             unsigned long cr2,
4765                             int emulation_type,
4766                             void *insn,
4767                             int insn_len)
4768 {
4769         int r;
4770         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4771         bool writeback = true;
4772
4773         kvm_clear_exception_queue(vcpu);
4774
4775         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4776                 init_emulate_ctxt(vcpu);
4777                 ctxt->interruptibility = 0;
4778                 ctxt->have_exception = false;
4779                 ctxt->perm_ok = false;
4780
4781                 ctxt->only_vendor_specific_insn
4782                         = emulation_type & EMULTYPE_TRAP_UD;
4783
4784                 r = x86_decode_insn(ctxt, insn, insn_len);
4785
4786                 trace_kvm_emulate_insn_start(vcpu);
4787                 ++vcpu->stat.insn_emulation;
4788                 if (r)  {
4789                         if (emulation_type & EMULTYPE_TRAP_UD)
4790                                 return EMULATE_FAIL;
4791                         if (reexecute_instruction(vcpu, cr2))
4792                                 return EMULATE_DONE;
4793                         if (emulation_type & EMULTYPE_SKIP)
4794                                 return EMULATE_FAIL;
4795                         return handle_emulation_failure(vcpu);
4796                 }
4797         }
4798
4799         if (emulation_type & EMULTYPE_SKIP) {
4800                 kvm_rip_write(vcpu, ctxt->_eip);
4801                 return EMULATE_DONE;
4802         }
4803
4804         /* this is needed for vmware backdoor interface to work since it
4805            changes registers values  during IO operation */
4806         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4807                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4808                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4809         }
4810
4811 restart:
4812         r = x86_emulate_insn(ctxt);
4813
4814         if (r == EMULATION_INTERCEPTED)
4815                 return EMULATE_DONE;
4816
4817         if (r == EMULATION_FAILED) {
4818                 if (reexecute_instruction(vcpu, cr2))
4819                         return EMULATE_DONE;
4820
4821                 return handle_emulation_failure(vcpu);
4822         }
4823
4824         if (ctxt->have_exception) {
4825                 inject_emulated_exception(vcpu);
4826                 r = EMULATE_DONE;
4827         } else if (vcpu->arch.pio.count) {
4828                 if (!vcpu->arch.pio.in)
4829                         vcpu->arch.pio.count = 0;
4830                 else
4831                         writeback = false;
4832                 r = EMULATE_DO_MMIO;
4833         } else if (vcpu->mmio_needed) {
4834                 if (!vcpu->mmio_is_write)
4835                         writeback = false;
4836                 r = EMULATE_DO_MMIO;
4837         } else if (r == EMULATION_RESTART)
4838                 goto restart;
4839         else
4840                 r = EMULATE_DONE;
4841
4842         if (writeback) {
4843                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4844                 kvm_set_rflags(vcpu, ctxt->eflags);
4845                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4846                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4847                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4848                 kvm_rip_write(vcpu, ctxt->eip);
4849         } else
4850                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4851
4852         return r;
4853 }
4854 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4855
4856 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4857 {
4858         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4859         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4860                                             size, port, &val, 1);
4861         /* do not return to emulator after return from userspace */
4862         vcpu->arch.pio.count = 0;
4863         return ret;
4864 }
4865 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4866
4867 static void tsc_bad(void *info)
4868 {
4869         __this_cpu_write(cpu_tsc_khz, 0);
4870 }
4871
4872 static void tsc_khz_changed(void *data)
4873 {
4874         struct cpufreq_freqs *freq = data;
4875         unsigned long khz = 0;
4876
4877         if (data)
4878                 khz = freq->new;
4879         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4880                 khz = cpufreq_quick_get(raw_smp_processor_id());
4881         if (!khz)
4882                 khz = tsc_khz;
4883         __this_cpu_write(cpu_tsc_khz, khz);
4884 }
4885
4886 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4887                                      void *data)
4888 {
4889         struct cpufreq_freqs *freq = data;
4890         struct kvm *kvm;
4891         struct kvm_vcpu *vcpu;
4892         int i, send_ipi = 0;
4893
4894         /*
4895          * We allow guests to temporarily run on slowing clocks,
4896          * provided we notify them after, or to run on accelerating
4897          * clocks, provided we notify them before.  Thus time never
4898          * goes backwards.
4899          *
4900          * However, we have a problem.  We can't atomically update
4901          * the frequency of a given CPU from this function; it is
4902          * merely a notifier, which can be called from any CPU.
4903          * Changing the TSC frequency at arbitrary points in time
4904          * requires a recomputation of local variables related to
4905          * the TSC for each VCPU.  We must flag these local variables
4906          * to be updated and be sure the update takes place with the
4907          * new frequency before any guests proceed.
4908          *
4909          * Unfortunately, the combination of hotplug CPU and frequency
4910          * change creates an intractable locking scenario; the order
4911          * of when these callouts happen is undefined with respect to
4912          * CPU hotplug, and they can race with each other.  As such,
4913          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4914          * undefined; you can actually have a CPU frequency change take
4915          * place in between the computation of X and the setting of the
4916          * variable.  To protect against this problem, all updates of
4917          * the per_cpu tsc_khz variable are done in an interrupt
4918          * protected IPI, and all callers wishing to update the value
4919          * must wait for a synchronous IPI to complete (which is trivial
4920          * if the caller is on the CPU already).  This establishes the
4921          * necessary total order on variable updates.
4922          *
4923          * Note that because a guest time update may take place
4924          * anytime after the setting of the VCPU's request bit, the
4925          * correct TSC value must be set before the request.  However,
4926          * to ensure the update actually makes it to any guest which
4927          * starts running in hardware virtualization between the set
4928          * and the acquisition of the spinlock, we must also ping the
4929          * CPU after setting the request bit.
4930          *
4931          */
4932
4933         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4934                 return 0;
4935         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4936                 return 0;
4937
4938         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4939
4940         raw_spin_lock(&kvm_lock);
4941         list_for_each_entry(kvm, &vm_list, vm_list) {
4942                 kvm_for_each_vcpu(i, vcpu, kvm) {
4943                         if (vcpu->cpu != freq->cpu)
4944                                 continue;
4945                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4946                         if (vcpu->cpu != smp_processor_id())
4947                                 send_ipi = 1;
4948                 }
4949         }
4950         raw_spin_unlock(&kvm_lock);
4951
4952         if (freq->old < freq->new && send_ipi) {
4953                 /*
4954                  * We upscale the frequency.  Must make the guest
4955                  * doesn't see old kvmclock values while running with
4956                  * the new frequency, otherwise we risk the guest sees
4957                  * time go backwards.
4958                  *
4959                  * In case we update the frequency for another cpu
4960                  * (which might be in guest context) send an interrupt
4961                  * to kick the cpu out of guest context.  Next time
4962                  * guest context is entered kvmclock will be updated,
4963                  * so the guest will not see stale values.
4964                  */
4965                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4966         }
4967         return 0;
4968 }
4969
4970 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4971         .notifier_call  = kvmclock_cpufreq_notifier
4972 };
4973
4974 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4975                                         unsigned long action, void *hcpu)
4976 {
4977         unsigned int cpu = (unsigned long)hcpu;
4978
4979         switch (action) {
4980                 case CPU_ONLINE:
4981                 case CPU_DOWN_FAILED:
4982                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4983                         break;
4984                 case CPU_DOWN_PREPARE:
4985                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4986                         break;
4987         }
4988         return NOTIFY_OK;
4989 }
4990
4991 static struct notifier_block kvmclock_cpu_notifier_block = {
4992         .notifier_call  = kvmclock_cpu_notifier,
4993         .priority = -INT_MAX
4994 };
4995
4996 static void kvm_timer_init(void)
4997 {
4998         int cpu;
4999
5000         max_tsc_khz = tsc_khz;
5001         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5002         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5003 #ifdef CONFIG_CPU_FREQ
5004                 struct cpufreq_policy policy;
5005                 memset(&policy, 0, sizeof(policy));
5006                 cpu = get_cpu();
5007                 cpufreq_get_policy(&policy, cpu);
5008                 if (policy.cpuinfo.max_freq)
5009                         max_tsc_khz = policy.cpuinfo.max_freq;
5010                 put_cpu();
5011 #endif
5012                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5013                                           CPUFREQ_TRANSITION_NOTIFIER);
5014         }
5015         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5016         for_each_online_cpu(cpu)
5017                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5018 }
5019
5020 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5021
5022 static int kvm_is_in_guest(void)
5023 {
5024         return percpu_read(current_vcpu) != NULL;
5025 }
5026
5027 static int kvm_is_user_mode(void)
5028 {
5029         int user_mode = 3;
5030
5031         if (percpu_read(current_vcpu))
5032                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5033
5034         return user_mode != 0;
5035 }
5036
5037 static unsigned long kvm_get_guest_ip(void)
5038 {
5039         unsigned long ip = 0;
5040
5041         if (percpu_read(current_vcpu))
5042                 ip = kvm_rip_read(percpu_read(current_vcpu));
5043
5044         return ip;
5045 }
5046
5047 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5048         .is_in_guest            = kvm_is_in_guest,
5049         .is_user_mode           = kvm_is_user_mode,
5050         .get_guest_ip           = kvm_get_guest_ip,
5051 };
5052
5053 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5054 {
5055         percpu_write(current_vcpu, vcpu);
5056 }
5057 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5058
5059 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5060 {
5061         percpu_write(current_vcpu, NULL);
5062 }
5063 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5064
5065 int kvm_arch_init(void *opaque)
5066 {
5067         int r;
5068         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5069
5070         if (kvm_x86_ops) {
5071                 printk(KERN_ERR "kvm: already loaded the other module\n");
5072                 r = -EEXIST;
5073                 goto out;
5074         }
5075
5076         if (!ops->cpu_has_kvm_support()) {
5077                 printk(KERN_ERR "kvm: no hardware support\n");
5078                 r = -EOPNOTSUPP;
5079                 goto out;
5080         }
5081         if (ops->disabled_by_bios()) {
5082                 printk(KERN_ERR "kvm: disabled by bios\n");
5083                 r = -EOPNOTSUPP;
5084                 goto out;
5085         }
5086
5087         r = kvm_mmu_module_init();
5088         if (r)
5089                 goto out;
5090
5091         kvm_init_msr_list();
5092
5093         kvm_x86_ops = ops;
5094         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
5095         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5096                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5097
5098         kvm_timer_init();
5099
5100         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5101
5102         if (cpu_has_xsave)
5103                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5104
5105         return 0;
5106
5107 out:
5108         return r;
5109 }
5110
5111 void kvm_arch_exit(void)
5112 {
5113         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5114
5115         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5116                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5117                                             CPUFREQ_TRANSITION_NOTIFIER);
5118         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5119         kvm_x86_ops = NULL;
5120         kvm_mmu_module_exit();
5121 }
5122
5123 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5124 {
5125         ++vcpu->stat.halt_exits;
5126         if (irqchip_in_kernel(vcpu->kvm)) {
5127                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5128                 return 1;
5129         } else {
5130                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5131                 return 0;
5132         }
5133 }
5134 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5135
5136 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5137                            unsigned long a1)
5138 {
5139         if (is_long_mode(vcpu))
5140                 return a0;
5141         else
5142                 return a0 | ((gpa_t)a1 << 32);
5143 }
5144
5145 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5146 {
5147         u64 param, ingpa, outgpa, ret;
5148         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5149         bool fast, longmode;
5150         int cs_db, cs_l;
5151
5152         /*
5153          * hypercall generates UD from non zero cpl and real mode
5154          * per HYPER-V spec
5155          */
5156         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5157                 kvm_queue_exception(vcpu, UD_VECTOR);
5158                 return 0;
5159         }
5160
5161         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5162         longmode = is_long_mode(vcpu) && cs_l == 1;
5163
5164         if (!longmode) {
5165                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5166                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5167                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5168                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5169                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5170                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5171         }
5172 #ifdef CONFIG_X86_64
5173         else {
5174                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5175                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5176                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5177         }
5178 #endif
5179
5180         code = param & 0xffff;
5181         fast = (param >> 16) & 0x1;
5182         rep_cnt = (param >> 32) & 0xfff;
5183         rep_idx = (param >> 48) & 0xfff;
5184
5185         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5186
5187         switch (code) {
5188         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5189                 kvm_vcpu_on_spin(vcpu);
5190                 break;
5191         default:
5192                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5193                 break;
5194         }
5195
5196         ret = res | (((u64)rep_done & 0xfff) << 32);
5197         if (longmode) {
5198                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5199         } else {
5200                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5201                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5202         }
5203
5204         return 1;
5205 }
5206
5207 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5208 {
5209         unsigned long nr, a0, a1, a2, a3, ret;
5210         int r = 1;
5211
5212         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5213                 return kvm_hv_hypercall(vcpu);
5214
5215         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5216         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5217         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5218         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5219         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5220
5221         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5222
5223         if (!is_long_mode(vcpu)) {
5224                 nr &= 0xFFFFFFFF;
5225                 a0 &= 0xFFFFFFFF;
5226                 a1 &= 0xFFFFFFFF;
5227                 a2 &= 0xFFFFFFFF;
5228                 a3 &= 0xFFFFFFFF;
5229         }
5230
5231         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5232                 ret = -KVM_EPERM;
5233                 goto out;
5234         }
5235
5236         switch (nr) {
5237         case KVM_HC_VAPIC_POLL_IRQ:
5238                 ret = 0;
5239                 break;
5240         case KVM_HC_MMU_OP:
5241                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5242                 break;
5243         default:
5244                 ret = -KVM_ENOSYS;
5245                 break;
5246         }
5247 out:
5248         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5249         ++vcpu->stat.hypercalls;
5250         return r;
5251 }
5252 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5253
5254 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5255 {
5256         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5257         char instruction[3];
5258         unsigned long rip = kvm_rip_read(vcpu);
5259
5260         /*
5261          * Blow out the MMU to ensure that no other VCPU has an active mapping
5262          * to ensure that the updated hypercall appears atomically across all
5263          * VCPUs.
5264          */
5265         kvm_mmu_zap_all(vcpu->kvm);
5266
5267         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5268
5269         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5270 }
5271
5272 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5273 {
5274         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5275         int j, nent = vcpu->arch.cpuid_nent;
5276
5277         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5278         /* when no next entry is found, the current entry[i] is reselected */
5279         for (j = i + 1; ; j = (j + 1) % nent) {
5280                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5281                 if (ej->function == e->function) {
5282                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5283                         return j;
5284                 }
5285         }
5286         return 0; /* silence gcc, even though control never reaches here */
5287 }
5288
5289 /* find an entry with matching function, matching index (if needed), and that
5290  * should be read next (if it's stateful) */
5291 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5292         u32 function, u32 index)
5293 {
5294         if (e->function != function)
5295                 return 0;
5296         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5297                 return 0;
5298         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5299             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5300                 return 0;
5301         return 1;
5302 }
5303
5304 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5305                                               u32 function, u32 index)
5306 {
5307         int i;
5308         struct kvm_cpuid_entry2 *best = NULL;
5309
5310         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5311                 struct kvm_cpuid_entry2 *e;
5312
5313                 e = &vcpu->arch.cpuid_entries[i];
5314                 if (is_matching_cpuid_entry(e, function, index)) {
5315                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5316                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5317                         best = e;
5318                         break;
5319                 }
5320         }
5321         return best;
5322 }
5323 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5324
5325 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5326 {
5327         struct kvm_cpuid_entry2 *best;
5328
5329         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5330         if (!best || best->eax < 0x80000008)
5331                 goto not_found;
5332         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5333         if (best)
5334                 return best->eax & 0xff;
5335 not_found:
5336         return 36;
5337 }
5338
5339 /*
5340  * If no match is found, check whether we exceed the vCPU's limit
5341  * and return the content of the highest valid _standard_ leaf instead.
5342  * This is to satisfy the CPUID specification.
5343  */
5344 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5345                                                   u32 function, u32 index)
5346 {
5347         struct kvm_cpuid_entry2 *maxlevel;
5348
5349         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5350         if (!maxlevel || maxlevel->eax >= function)
5351                 return NULL;
5352         if (function & 0x80000000) {
5353                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5354                 if (!maxlevel)
5355                         return NULL;
5356         }
5357         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5358 }
5359
5360 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5361 {
5362         u32 function, index;
5363         struct kvm_cpuid_entry2 *best;
5364
5365         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5366         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5367         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5368         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5369         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5370         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5371         best = kvm_find_cpuid_entry(vcpu, function, index);
5372
5373         if (!best)
5374                 best = check_cpuid_limit(vcpu, function, index);
5375
5376         if (best) {
5377                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5378                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5379                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5380                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5381         }
5382         kvm_x86_ops->skip_emulated_instruction(vcpu);
5383         trace_kvm_cpuid(function,
5384                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5385                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5386                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5387                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5388 }
5389 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5390
5391 /*
5392  * Check if userspace requested an interrupt window, and that the
5393  * interrupt window is open.
5394  *
5395  * No need to exit to userspace if we already have an interrupt queued.
5396  */
5397 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5398 {
5399         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5400                 vcpu->run->request_interrupt_window &&
5401                 kvm_arch_interrupt_allowed(vcpu));
5402 }
5403
5404 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5405 {
5406         struct kvm_run *kvm_run = vcpu->run;
5407
5408         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5409         kvm_run->cr8 = kvm_get_cr8(vcpu);
5410         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5411         if (irqchip_in_kernel(vcpu->kvm))
5412                 kvm_run->ready_for_interrupt_injection = 1;
5413         else
5414                 kvm_run->ready_for_interrupt_injection =
5415                         kvm_arch_interrupt_allowed(vcpu) &&
5416                         !kvm_cpu_has_interrupt(vcpu) &&
5417                         !kvm_event_needs_reinjection(vcpu);
5418 }
5419
5420 static void vapic_enter(struct kvm_vcpu *vcpu)
5421 {
5422         struct kvm_lapic *apic = vcpu->arch.apic;
5423         struct page *page;
5424
5425         if (!apic || !apic->vapic_addr)
5426                 return;
5427
5428         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5429
5430         vcpu->arch.apic->vapic_page = page;
5431 }
5432
5433 static void vapic_exit(struct kvm_vcpu *vcpu)
5434 {
5435         struct kvm_lapic *apic = vcpu->arch.apic;
5436         int idx;
5437
5438         if (!apic || !apic->vapic_addr)
5439                 return;
5440
5441         idx = srcu_read_lock(&vcpu->kvm->srcu);
5442         kvm_release_page_dirty(apic->vapic_page);
5443         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5444         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5445 }
5446
5447 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5448 {
5449         int max_irr, tpr;
5450
5451         if (!kvm_x86_ops->update_cr8_intercept)
5452                 return;
5453
5454         if (!vcpu->arch.apic)
5455                 return;
5456
5457         if (!vcpu->arch.apic->vapic_addr)
5458                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5459         else
5460                 max_irr = -1;
5461
5462         if (max_irr != -1)
5463                 max_irr >>= 4;
5464
5465         tpr = kvm_lapic_get_cr8(vcpu);
5466
5467         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5468 }
5469
5470 static void inject_pending_event(struct kvm_vcpu *vcpu)
5471 {
5472         /* try to reinject previous events if any */
5473         if (vcpu->arch.exception.pending) {
5474                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5475                                         vcpu->arch.exception.has_error_code,
5476                                         vcpu->arch.exception.error_code);
5477                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5478                                           vcpu->arch.exception.has_error_code,
5479                                           vcpu->arch.exception.error_code,
5480                                           vcpu->arch.exception.reinject);
5481                 return;
5482         }
5483
5484         if (vcpu->arch.nmi_injected) {
5485                 kvm_x86_ops->set_nmi(vcpu);
5486                 return;
5487         }
5488
5489         if (vcpu->arch.interrupt.pending) {
5490                 kvm_x86_ops->set_irq(vcpu);
5491                 return;
5492         }
5493
5494         /* try to inject new event if pending */
5495         if (vcpu->arch.nmi_pending) {
5496                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5497                         vcpu->arch.nmi_pending = false;
5498                         vcpu->arch.nmi_injected = true;
5499                         kvm_x86_ops->set_nmi(vcpu);
5500                 }
5501         } else if (kvm_cpu_has_interrupt(vcpu)) {
5502                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5503                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5504                                             false);
5505                         kvm_x86_ops->set_irq(vcpu);
5506                 }
5507         }
5508 }
5509
5510 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5511 {
5512         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5513                         !vcpu->guest_xcr0_loaded) {
5514                 /* kvm_set_xcr() also depends on this */
5515                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5516                 vcpu->guest_xcr0_loaded = 1;
5517         }
5518 }
5519
5520 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5521 {
5522         if (vcpu->guest_xcr0_loaded) {
5523                 if (vcpu->arch.xcr0 != host_xcr0)
5524                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5525                 vcpu->guest_xcr0_loaded = 0;
5526         }
5527 }
5528
5529 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5530 {
5531         int r;
5532         bool nmi_pending;
5533         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5534                 vcpu->run->request_interrupt_window;
5535
5536         if (vcpu->requests) {
5537                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5538                         kvm_mmu_unload(vcpu);
5539                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5540                         __kvm_migrate_timers(vcpu);
5541                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5542                         r = kvm_guest_time_update(vcpu);
5543                         if (unlikely(r))
5544                                 goto out;
5545                 }
5546                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5547                         kvm_mmu_sync_roots(vcpu);
5548                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5549                         kvm_x86_ops->tlb_flush(vcpu);
5550                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5551                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5552                         r = 0;
5553                         goto out;
5554                 }
5555                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5556                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5557                         r = 0;
5558                         goto out;
5559                 }
5560                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5561                         vcpu->fpu_active = 0;
5562                         kvm_x86_ops->fpu_deactivate(vcpu);
5563                 }
5564                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5565                         /* Page is swapped out. Do synthetic halt */
5566                         vcpu->arch.apf.halted = true;
5567                         r = 1;
5568                         goto out;
5569                 }
5570                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5571                         record_steal_time(vcpu);
5572
5573         }
5574
5575         r = kvm_mmu_reload(vcpu);
5576         if (unlikely(r))
5577                 goto out;
5578
5579         /*
5580          * An NMI can be injected between local nmi_pending read and
5581          * vcpu->arch.nmi_pending read inside inject_pending_event().
5582          * But in that case, KVM_REQ_EVENT will be set, which makes
5583          * the race described above benign.
5584          */
5585         nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5586
5587         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5588                 inject_pending_event(vcpu);
5589
5590                 /* enable NMI/IRQ window open exits if needed */
5591                 if (nmi_pending)
5592                         kvm_x86_ops->enable_nmi_window(vcpu);
5593                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5594                         kvm_x86_ops->enable_irq_window(vcpu);
5595
5596                 if (kvm_lapic_enabled(vcpu)) {
5597                         update_cr8_intercept(vcpu);
5598                         kvm_lapic_sync_to_vapic(vcpu);
5599                 }
5600         }
5601
5602         preempt_disable();
5603
5604         kvm_x86_ops->prepare_guest_switch(vcpu);
5605         if (vcpu->fpu_active)
5606                 kvm_load_guest_fpu(vcpu);
5607         kvm_load_guest_xcr0(vcpu);
5608
5609         vcpu->mode = IN_GUEST_MODE;
5610
5611         /* We should set ->mode before check ->requests,
5612          * see the comment in make_all_cpus_request.
5613          */
5614         smp_mb();
5615
5616         local_irq_disable();
5617
5618         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5619             || need_resched() || signal_pending(current)) {
5620                 vcpu->mode = OUTSIDE_GUEST_MODE;
5621                 smp_wmb();
5622                 local_irq_enable();
5623                 preempt_enable();
5624                 kvm_x86_ops->cancel_injection(vcpu);
5625                 r = 1;
5626                 goto out;
5627         }
5628
5629         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5630
5631         kvm_guest_enter();
5632
5633         if (unlikely(vcpu->arch.switch_db_regs)) {
5634                 set_debugreg(0, 7);
5635                 set_debugreg(vcpu->arch.eff_db[0], 0);
5636                 set_debugreg(vcpu->arch.eff_db[1], 1);
5637                 set_debugreg(vcpu->arch.eff_db[2], 2);
5638                 set_debugreg(vcpu->arch.eff_db[3], 3);
5639         }
5640
5641         trace_kvm_entry(vcpu->vcpu_id);
5642         kvm_x86_ops->run(vcpu);
5643
5644         /*
5645          * If the guest has used debug registers, at least dr7
5646          * will be disabled while returning to the host.
5647          * If we don't have active breakpoints in the host, we don't
5648          * care about the messed up debug address registers. But if
5649          * we have some of them active, restore the old state.
5650          */
5651         if (hw_breakpoint_active())
5652                 hw_breakpoint_restore();
5653
5654         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5655
5656         vcpu->mode = OUTSIDE_GUEST_MODE;
5657         smp_wmb();
5658         local_irq_enable();
5659
5660         ++vcpu->stat.exits;
5661
5662         /*
5663          * We must have an instruction between local_irq_enable() and
5664          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5665          * the interrupt shadow.  The stat.exits increment will do nicely.
5666          * But we need to prevent reordering, hence this barrier():
5667          */
5668         barrier();
5669
5670         kvm_guest_exit();
5671
5672         preempt_enable();
5673
5674         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5675
5676         /*
5677          * Profile KVM exit RIPs:
5678          */
5679         if (unlikely(prof_on == KVM_PROFILING)) {
5680                 unsigned long rip = kvm_rip_read(vcpu);
5681                 profile_hit(KVM_PROFILING, (void *)rip);
5682         }
5683
5684
5685         kvm_lapic_sync_from_vapic(vcpu);
5686
5687         r = kvm_x86_ops->handle_exit(vcpu);
5688 out:
5689         return r;
5690 }
5691
5692
5693 static int __vcpu_run(struct kvm_vcpu *vcpu)
5694 {
5695         int r;
5696         struct kvm *kvm = vcpu->kvm;
5697
5698         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5699                 pr_debug("vcpu %d received sipi with vector # %x\n",
5700                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5701                 kvm_lapic_reset(vcpu);
5702                 r = kvm_arch_vcpu_reset(vcpu);
5703                 if (r)
5704                         return r;
5705                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5706         }
5707
5708         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5709         vapic_enter(vcpu);
5710
5711         r = 1;
5712         while (r > 0) {
5713                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5714                     !vcpu->arch.apf.halted)
5715                         r = vcpu_enter_guest(vcpu);
5716                 else {
5717                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5718                         kvm_vcpu_block(vcpu);
5719                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5720                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5721                         {
5722                                 switch(vcpu->arch.mp_state) {
5723                                 case KVM_MP_STATE_HALTED:
5724                                         vcpu->arch.mp_state =
5725                                                 KVM_MP_STATE_RUNNABLE;
5726                                 case KVM_MP_STATE_RUNNABLE:
5727                                         vcpu->arch.apf.halted = false;
5728                                         break;
5729                                 case KVM_MP_STATE_SIPI_RECEIVED:
5730                                 default:
5731                                         r = -EINTR;
5732                                         break;
5733                                 }
5734                         }
5735                 }
5736
5737                 if (r <= 0)
5738                         break;
5739
5740                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5741                 if (kvm_cpu_has_pending_timer(vcpu))
5742                         kvm_inject_pending_timer_irqs(vcpu);
5743
5744                 if (dm_request_for_irq_injection(vcpu)) {
5745                         r = -EINTR;
5746                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5747                         ++vcpu->stat.request_irq_exits;
5748                 }
5749
5750                 kvm_check_async_pf_completion(vcpu);
5751
5752                 if (signal_pending(current)) {
5753                         r = -EINTR;
5754                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5755                         ++vcpu->stat.signal_exits;
5756                 }
5757                 if (need_resched()) {
5758                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5759                         kvm_resched(vcpu);
5760                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5761                 }
5762         }
5763
5764         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5765
5766         vapic_exit(vcpu);
5767
5768         return r;
5769 }
5770
5771 static int complete_mmio(struct kvm_vcpu *vcpu)
5772 {
5773         struct kvm_run *run = vcpu->run;
5774         int r;
5775
5776         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5777                 return 1;
5778
5779         if (vcpu->mmio_needed) {
5780                 vcpu->mmio_needed = 0;
5781                 if (!vcpu->mmio_is_write)
5782                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5783                                run->mmio.data, 8);
5784                 vcpu->mmio_index += 8;
5785                 if (vcpu->mmio_index < vcpu->mmio_size) {
5786                         run->exit_reason = KVM_EXIT_MMIO;
5787                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5788                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5789                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5790                         run->mmio.is_write = vcpu->mmio_is_write;
5791                         vcpu->mmio_needed = 1;
5792                         return 0;
5793                 }
5794                 if (vcpu->mmio_is_write)
5795                         return 1;
5796                 vcpu->mmio_read_completed = 1;
5797         }
5798         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5799         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5800         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5801         if (r != EMULATE_DONE)
5802                 return 0;
5803         return 1;
5804 }
5805
5806 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5807 {
5808         int r;
5809         sigset_t sigsaved;
5810
5811         if (!tsk_used_math(current) && init_fpu(current))
5812                 return -ENOMEM;
5813
5814         if (vcpu->sigset_active)
5815                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5816
5817         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5818                 kvm_vcpu_block(vcpu);
5819                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5820                 r = -EAGAIN;
5821                 goto out;
5822         }
5823
5824         /* re-sync apic's tpr */
5825         if (!irqchip_in_kernel(vcpu->kvm)) {
5826                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5827                         r = -EINVAL;
5828                         goto out;
5829                 }
5830         }
5831
5832         r = complete_mmio(vcpu);
5833         if (r <= 0)
5834                 goto out;
5835
5836         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5837                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5838                                      kvm_run->hypercall.ret);
5839
5840         r = __vcpu_run(vcpu);
5841
5842 out:
5843         post_kvm_run_save(vcpu);
5844         if (vcpu->sigset_active)
5845                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5846
5847         return r;
5848 }
5849
5850 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5851 {
5852         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5853                 /*
5854                  * We are here if userspace calls get_regs() in the middle of
5855                  * instruction emulation. Registers state needs to be copied
5856                  * back from emulation context to vcpu. Usrapace shouldn't do
5857                  * that usually, but some bad designed PV devices (vmware
5858                  * backdoor interface) need this to work
5859                  */
5860                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5861                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5862                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5863         }
5864         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5865         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5866         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5867         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5868         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5869         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5870         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5871         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5872 #ifdef CONFIG_X86_64
5873         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5874         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5875         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5876         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5877         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5878         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5879         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5880         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5881 #endif
5882
5883         regs->rip = kvm_rip_read(vcpu);
5884         regs->rflags = kvm_get_rflags(vcpu);
5885
5886         return 0;
5887 }
5888
5889 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5890 {
5891         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5892         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5893
5894         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5895         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5896         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5897         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5898         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5899         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5900         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5901         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5902 #ifdef CONFIG_X86_64
5903         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5904         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5905         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5906         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5907         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5908         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5909         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5910         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5911 #endif
5912
5913         kvm_rip_write(vcpu, regs->rip);
5914         kvm_set_rflags(vcpu, regs->rflags);
5915
5916         vcpu->arch.exception.pending = false;
5917
5918         kvm_make_request(KVM_REQ_EVENT, vcpu);
5919
5920         return 0;
5921 }
5922
5923 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5924 {
5925         struct kvm_segment cs;
5926
5927         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5928         *db = cs.db;
5929         *l = cs.l;
5930 }
5931 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5932
5933 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5934                                   struct kvm_sregs *sregs)
5935 {
5936         struct desc_ptr dt;
5937
5938         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5939         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5940         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5941         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5942         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5943         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5944
5945         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5946         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5947
5948         kvm_x86_ops->get_idt(vcpu, &dt);
5949         sregs->idt.limit = dt.size;
5950         sregs->idt.base = dt.address;
5951         kvm_x86_ops->get_gdt(vcpu, &dt);
5952         sregs->gdt.limit = dt.size;
5953         sregs->gdt.base = dt.address;
5954
5955         sregs->cr0 = kvm_read_cr0(vcpu);
5956         sregs->cr2 = vcpu->arch.cr2;
5957         sregs->cr3 = kvm_read_cr3(vcpu);
5958         sregs->cr4 = kvm_read_cr4(vcpu);
5959         sregs->cr8 = kvm_get_cr8(vcpu);
5960         sregs->efer = vcpu->arch.efer;
5961         sregs->apic_base = kvm_get_apic_base(vcpu);
5962
5963         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5964
5965         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5966                 set_bit(vcpu->arch.interrupt.nr,
5967                         (unsigned long *)sregs->interrupt_bitmap);
5968
5969         return 0;
5970 }
5971
5972 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5973                                     struct kvm_mp_state *mp_state)
5974 {
5975         mp_state->mp_state = vcpu->arch.mp_state;
5976         return 0;
5977 }
5978
5979 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5980                                     struct kvm_mp_state *mp_state)
5981 {
5982         vcpu->arch.mp_state = mp_state->mp_state;
5983         kvm_make_request(KVM_REQ_EVENT, vcpu);
5984         return 0;
5985 }
5986
5987 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5988                     bool has_error_code, u32 error_code)
5989 {
5990         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5991         int ret;
5992
5993         init_emulate_ctxt(vcpu);
5994
5995         ret = emulator_task_switch(ctxt, tss_selector, reason,
5996                                    has_error_code, error_code);
5997
5998         if (ret)
5999                 return EMULATE_FAIL;
6000
6001         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6002         kvm_rip_write(vcpu, ctxt->eip);
6003         kvm_set_rflags(vcpu, ctxt->eflags);
6004         kvm_make_request(KVM_REQ_EVENT, vcpu);
6005         return EMULATE_DONE;
6006 }
6007 EXPORT_SYMBOL_GPL(kvm_task_switch);
6008
6009 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6010                                   struct kvm_sregs *sregs)
6011 {
6012         int mmu_reset_needed = 0;
6013         int pending_vec, max_bits, idx;
6014         struct desc_ptr dt;
6015
6016         dt.size = sregs->idt.limit;
6017         dt.address = sregs->idt.base;
6018         kvm_x86_ops->set_idt(vcpu, &dt);
6019         dt.size = sregs->gdt.limit;
6020         dt.address = sregs->gdt.base;
6021         kvm_x86_ops->set_gdt(vcpu, &dt);
6022
6023         vcpu->arch.cr2 = sregs->cr2;
6024         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6025         vcpu->arch.cr3 = sregs->cr3;
6026         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6027
6028         kvm_set_cr8(vcpu, sregs->cr8);
6029
6030         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6031         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6032         kvm_set_apic_base(vcpu, sregs->apic_base);
6033
6034         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6035         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6036         vcpu->arch.cr0 = sregs->cr0;
6037
6038         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6039         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6040         if (sregs->cr4 & X86_CR4_OSXSAVE)
6041                 update_cpuid(vcpu);
6042
6043         idx = srcu_read_lock(&vcpu->kvm->srcu);
6044         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6045                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6046                 mmu_reset_needed = 1;
6047         }
6048         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6049
6050         if (mmu_reset_needed)
6051                 kvm_mmu_reset_context(vcpu);
6052
6053         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6054         pending_vec = find_first_bit(
6055                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6056         if (pending_vec < max_bits) {
6057                 kvm_queue_interrupt(vcpu, pending_vec, false);
6058                 pr_debug("Set back pending irq %d\n", pending_vec);
6059         }
6060
6061         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6062         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6063         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6064         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6065         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6066         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6067
6068         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6069         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6070
6071         update_cr8_intercept(vcpu);
6072
6073         /* Older userspace won't unhalt the vcpu on reset. */
6074         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6075             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6076             !is_protmode(vcpu))
6077                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6078
6079         kvm_make_request(KVM_REQ_EVENT, vcpu);
6080
6081         return 0;
6082 }
6083
6084 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6085                                         struct kvm_guest_debug *dbg)
6086 {
6087         unsigned long rflags;
6088         int i, r;
6089
6090         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6091                 r = -EBUSY;
6092                 if (vcpu->arch.exception.pending)
6093                         goto out;
6094                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6095                         kvm_queue_exception(vcpu, DB_VECTOR);
6096                 else
6097                         kvm_queue_exception(vcpu, BP_VECTOR);
6098         }
6099
6100         /*
6101          * Read rflags as long as potentially injected trace flags are still
6102          * filtered out.
6103          */
6104         rflags = kvm_get_rflags(vcpu);
6105
6106         vcpu->guest_debug = dbg->control;
6107         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6108                 vcpu->guest_debug = 0;
6109
6110         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6111                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6112                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6113                 vcpu->arch.switch_db_regs =
6114                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6115         } else {
6116                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6117                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6118                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6119         }
6120
6121         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6122                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6123                         get_segment_base(vcpu, VCPU_SREG_CS);
6124
6125         /*
6126          * Trigger an rflags update that will inject or remove the trace
6127          * flags.
6128          */
6129         kvm_set_rflags(vcpu, rflags);
6130
6131         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6132
6133         r = 0;
6134
6135 out:
6136
6137         return r;
6138 }
6139
6140 /*
6141  * Translate a guest virtual address to a guest physical address.
6142  */
6143 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6144                                     struct kvm_translation *tr)
6145 {
6146         unsigned long vaddr = tr->linear_address;
6147         gpa_t gpa;
6148         int idx;
6149
6150         idx = srcu_read_lock(&vcpu->kvm->srcu);
6151         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6152         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6153         tr->physical_address = gpa;
6154         tr->valid = gpa != UNMAPPED_GVA;
6155         tr->writeable = 1;
6156         tr->usermode = 0;
6157
6158         return 0;
6159 }
6160
6161 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6162 {
6163         struct i387_fxsave_struct *fxsave =
6164                         &vcpu->arch.guest_fpu.state->fxsave;
6165
6166         memcpy(fpu->fpr, fxsave->st_space, 128);
6167         fpu->fcw = fxsave->cwd;
6168         fpu->fsw = fxsave->swd;
6169         fpu->ftwx = fxsave->twd;
6170         fpu->last_opcode = fxsave->fop;
6171         fpu->last_ip = fxsave->rip;
6172         fpu->last_dp = fxsave->rdp;
6173         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6174
6175         return 0;
6176 }
6177
6178 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6179 {
6180         struct i387_fxsave_struct *fxsave =
6181                         &vcpu->arch.guest_fpu.state->fxsave;
6182
6183         memcpy(fxsave->st_space, fpu->fpr, 128);
6184         fxsave->cwd = fpu->fcw;
6185         fxsave->swd = fpu->fsw;
6186         fxsave->twd = fpu->ftwx;
6187         fxsave->fop = fpu->last_opcode;
6188         fxsave->rip = fpu->last_ip;
6189         fxsave->rdp = fpu->last_dp;
6190         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6191
6192         return 0;
6193 }
6194
6195 int fx_init(struct kvm_vcpu *vcpu)
6196 {
6197         int err;
6198
6199         err = fpu_alloc(&vcpu->arch.guest_fpu);
6200         if (err)
6201                 return err;
6202
6203         fpu_finit(&vcpu->arch.guest_fpu);
6204
6205         /*