fbb04aee8301efab741f80f7c590a45d7e3b298f
[linux-2.6.git] / arch / x86 / kvm / mmu.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
11  *
12  * Authors:
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Avi Kivity   <avi@qumranet.com>
15  *
16  * This work is licensed under the terms of the GNU GPL, version 2.  See
17  * the COPYING file in the top-level directory.
18  *
19  */
20
21 #include "mmu.h"
22 #include "x86.h"
23 #include "kvm_cache_regs.h"
24
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
28 #include <linux/mm.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
37
38 #include <asm/page.h>
39 #include <asm/cmpxchg.h>
40 #include <asm/io.h>
41 #include <asm/vmx.h>
42
43 /*
44  * When setting this variable to true it enables Two-Dimensional-Paging
45  * where the hardware walks 2 page tables:
46  * 1. the guest-virtual to guest-physical
47  * 2. while doing 1. it walks guest-physical to host-physical
48  * If the hardware supports that we don't need to do shadow paging.
49  */
50 bool tdp_enabled = false;
51
52 enum {
53         AUDIT_PRE_PAGE_FAULT,
54         AUDIT_POST_PAGE_FAULT,
55         AUDIT_PRE_PTE_WRITE,
56         AUDIT_POST_PTE_WRITE,
57         AUDIT_PRE_SYNC,
58         AUDIT_POST_SYNC
59 };
60
61 char *audit_point_name[] = {
62         "pre page fault",
63         "post page fault",
64         "pre pte write",
65         "post pte write",
66         "pre sync",
67         "post sync"
68 };
69
70 #undef MMU_DEBUG
71
72 #ifdef MMU_DEBUG
73
74 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
75 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
76
77 #else
78
79 #define pgprintk(x...) do { } while (0)
80 #define rmap_printk(x...) do { } while (0)
81
82 #endif
83
84 #ifdef MMU_DEBUG
85 static int dbg = 0;
86 module_param(dbg, bool, 0644);
87 #endif
88
89 static int oos_shadow = 1;
90 module_param(oos_shadow, bool, 0644);
91
92 #ifndef MMU_DEBUG
93 #define ASSERT(x) do { } while (0)
94 #else
95 #define ASSERT(x)                                                       \
96         if (!(x)) {                                                     \
97                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
98                        __FILE__, __LINE__, #x);                         \
99         }
100 #endif
101
102 #define PTE_PREFETCH_NUM                8
103
104 #define PT_FIRST_AVAIL_BITS_SHIFT 9
105 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
106
107 #define PT64_LEVEL_BITS 9
108
109 #define PT64_LEVEL_SHIFT(level) \
110                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
111
112 #define PT64_LEVEL_MASK(level) \
113                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
114
115 #define PT64_INDEX(address, level)\
116         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
117
118
119 #define PT32_LEVEL_BITS 10
120
121 #define PT32_LEVEL_SHIFT(level) \
122                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
123
124 #define PT32_LEVEL_MASK(level) \
125                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
126 #define PT32_LVL_OFFSET_MASK(level) \
127         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
128                                                 * PT32_LEVEL_BITS))) - 1))
129
130 #define PT32_INDEX(address, level)\
131         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
132
133
134 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
135 #define PT64_DIR_BASE_ADDR_MASK \
136         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
137 #define PT64_LVL_ADDR_MASK(level) \
138         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
139                                                 * PT64_LEVEL_BITS))) - 1))
140 #define PT64_LVL_OFFSET_MASK(level) \
141         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
142                                                 * PT64_LEVEL_BITS))) - 1))
143
144 #define PT32_BASE_ADDR_MASK PAGE_MASK
145 #define PT32_DIR_BASE_ADDR_MASK \
146         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
147 #define PT32_LVL_ADDR_MASK(level) \
148         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
149                                             * PT32_LEVEL_BITS))) - 1))
150
151 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
152                         | PT64_NX_MASK)
153
154 #define RMAP_EXT 4
155
156 #define ACC_EXEC_MASK    1
157 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
158 #define ACC_USER_MASK    PT_USER_MASK
159 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
160
161 #include <trace/events/kvm.h>
162
163 #define CREATE_TRACE_POINTS
164 #include "mmutrace.h"
165
166 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
167
168 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
169
170 struct kvm_rmap_desc {
171         u64 *sptes[RMAP_EXT];
172         struct kvm_rmap_desc *more;
173 };
174
175 struct kvm_shadow_walk_iterator {
176         u64 addr;
177         hpa_t shadow_addr;
178         int level;
179         u64 *sptep;
180         unsigned index;
181 };
182
183 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
184         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
185              shadow_walk_okay(&(_walker));                      \
186              shadow_walk_next(&(_walker)))
187
188 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
189
190 static struct kmem_cache *pte_chain_cache;
191 static struct kmem_cache *rmap_desc_cache;
192 static struct kmem_cache *mmu_page_header_cache;
193 static struct percpu_counter kvm_total_used_mmu_pages;
194
195 static u64 __read_mostly shadow_trap_nonpresent_pte;
196 static u64 __read_mostly shadow_notrap_nonpresent_pte;
197 static u64 __read_mostly shadow_base_present_pte;
198 static u64 __read_mostly shadow_nx_mask;
199 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
200 static u64 __read_mostly shadow_user_mask;
201 static u64 __read_mostly shadow_accessed_mask;
202 static u64 __read_mostly shadow_dirty_mask;
203
204 static inline u64 rsvd_bits(int s, int e)
205 {
206         return ((1ULL << (e - s + 1)) - 1) << s;
207 }
208
209 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
210 {
211         shadow_trap_nonpresent_pte = trap_pte;
212         shadow_notrap_nonpresent_pte = notrap_pte;
213 }
214 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
215
216 void kvm_mmu_set_base_ptes(u64 base_pte)
217 {
218         shadow_base_present_pte = base_pte;
219 }
220 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
221
222 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
223                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
224 {
225         shadow_user_mask = user_mask;
226         shadow_accessed_mask = accessed_mask;
227         shadow_dirty_mask = dirty_mask;
228         shadow_nx_mask = nx_mask;
229         shadow_x_mask = x_mask;
230 }
231 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
232
233 static bool is_write_protection(struct kvm_vcpu *vcpu)
234 {
235         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
236 }
237
238 static int is_cpuid_PSE36(void)
239 {
240         return 1;
241 }
242
243 static int is_nx(struct kvm_vcpu *vcpu)
244 {
245         return vcpu->arch.efer & EFER_NX;
246 }
247
248 static int is_shadow_present_pte(u64 pte)
249 {
250         return pte != shadow_trap_nonpresent_pte
251                 && pte != shadow_notrap_nonpresent_pte;
252 }
253
254 static int is_large_pte(u64 pte)
255 {
256         return pte & PT_PAGE_SIZE_MASK;
257 }
258
259 static int is_writable_pte(unsigned long pte)
260 {
261         return pte & PT_WRITABLE_MASK;
262 }
263
264 static int is_dirty_gpte(unsigned long pte)
265 {
266         return pte & PT_DIRTY_MASK;
267 }
268
269 static int is_rmap_spte(u64 pte)
270 {
271         return is_shadow_present_pte(pte);
272 }
273
274 static int is_last_spte(u64 pte, int level)
275 {
276         if (level == PT_PAGE_TABLE_LEVEL)
277                 return 1;
278         if (is_large_pte(pte))
279                 return 1;
280         return 0;
281 }
282
283 static pfn_t spte_to_pfn(u64 pte)
284 {
285         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
286 }
287
288 static gfn_t pse36_gfn_delta(u32 gpte)
289 {
290         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
291
292         return (gpte & PT32_DIR_PSE36_MASK) << shift;
293 }
294
295 static void __set_spte(u64 *sptep, u64 spte)
296 {
297         set_64bit(sptep, spte);
298 }
299
300 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
301 {
302 #ifdef CONFIG_X86_64
303         return xchg(sptep, new_spte);
304 #else
305         u64 old_spte;
306
307         do {
308                 old_spte = *sptep;
309         } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
310
311         return old_spte;
312 #endif
313 }
314
315 static bool spte_has_volatile_bits(u64 spte)
316 {
317         if (!shadow_accessed_mask)
318                 return false;
319
320         if (!is_shadow_present_pte(spte))
321                 return false;
322
323         if ((spte & shadow_accessed_mask) &&
324               (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
325                 return false;
326
327         return true;
328 }
329
330 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
331 {
332         return (old_spte & bit_mask) && !(new_spte & bit_mask);
333 }
334
335 static void update_spte(u64 *sptep, u64 new_spte)
336 {
337         u64 mask, old_spte = *sptep;
338
339         WARN_ON(!is_rmap_spte(new_spte));
340
341         new_spte |= old_spte & shadow_dirty_mask;
342
343         mask = shadow_accessed_mask;
344         if (is_writable_pte(old_spte))
345                 mask |= shadow_dirty_mask;
346
347         if (!spte_has_volatile_bits(old_spte) || (new_spte & mask) == mask)
348                 __set_spte(sptep, new_spte);
349         else
350                 old_spte = __xchg_spte(sptep, new_spte);
351
352         if (!shadow_accessed_mask)
353                 return;
354
355         if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
356                 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
357         if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
358                 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
359 }
360
361 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
362                                   struct kmem_cache *base_cache, int min)
363 {
364         void *obj;
365
366         if (cache->nobjs >= min)
367                 return 0;
368         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
369                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
370                 if (!obj)
371                         return -ENOMEM;
372                 cache->objects[cache->nobjs++] = obj;
373         }
374         return 0;
375 }
376
377 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
378                                   struct kmem_cache *cache)
379 {
380         while (mc->nobjs)
381                 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
382 }
383
384 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
385                                        int min)
386 {
387         struct page *page;
388
389         if (cache->nobjs >= min)
390                 return 0;
391         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
392                 page = alloc_page(GFP_KERNEL);
393                 if (!page)
394                         return -ENOMEM;
395                 cache->objects[cache->nobjs++] = page_address(page);
396         }
397         return 0;
398 }
399
400 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
401 {
402         while (mc->nobjs)
403                 free_page((unsigned long)mc->objects[--mc->nobjs]);
404 }
405
406 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
407 {
408         int r;
409
410         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
411                                    pte_chain_cache, 4);
412         if (r)
413                 goto out;
414         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
415                                    rmap_desc_cache, 4 + PTE_PREFETCH_NUM);
416         if (r)
417                 goto out;
418         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
419         if (r)
420                 goto out;
421         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
422                                    mmu_page_header_cache, 4);
423 out:
424         return r;
425 }
426
427 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
428 {
429         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
430         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
431         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
432         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
433                                 mmu_page_header_cache);
434 }
435
436 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
437                                     size_t size)
438 {
439         void *p;
440
441         BUG_ON(!mc->nobjs);
442         p = mc->objects[--mc->nobjs];
443         return p;
444 }
445
446 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
447 {
448         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
449                                       sizeof(struct kvm_pte_chain));
450 }
451
452 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
453 {
454         kmem_cache_free(pte_chain_cache, pc);
455 }
456
457 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
458 {
459         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
460                                       sizeof(struct kvm_rmap_desc));
461 }
462
463 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
464 {
465         kmem_cache_free(rmap_desc_cache, rd);
466 }
467
468 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
469 {
470         if (!sp->role.direct)
471                 return sp->gfns[index];
472
473         return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
474 }
475
476 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
477 {
478         if (sp->role.direct)
479                 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
480         else
481                 sp->gfns[index] = gfn;
482 }
483
484 /*
485  * Return the pointer to the largepage write count for a given
486  * gfn, handling slots that are not large page aligned.
487  */
488 static int *slot_largepage_idx(gfn_t gfn,
489                                struct kvm_memory_slot *slot,
490                                int level)
491 {
492         unsigned long idx;
493
494         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
495               (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
496         return &slot->lpage_info[level - 2][idx].write_count;
497 }
498
499 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
500 {
501         struct kvm_memory_slot *slot;
502         int *write_count;
503         int i;
504
505         slot = gfn_to_memslot(kvm, gfn);
506         for (i = PT_DIRECTORY_LEVEL;
507              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
508                 write_count   = slot_largepage_idx(gfn, slot, i);
509                 *write_count += 1;
510         }
511 }
512
513 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
514 {
515         struct kvm_memory_slot *slot;
516         int *write_count;
517         int i;
518
519         slot = gfn_to_memslot(kvm, gfn);
520         for (i = PT_DIRECTORY_LEVEL;
521              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
522                 write_count   = slot_largepage_idx(gfn, slot, i);
523                 *write_count -= 1;
524                 WARN_ON(*write_count < 0);
525         }
526 }
527
528 static int has_wrprotected_page(struct kvm *kvm,
529                                 gfn_t gfn,
530                                 int level)
531 {
532         struct kvm_memory_slot *slot;
533         int *largepage_idx;
534
535         slot = gfn_to_memslot(kvm, gfn);
536         if (slot) {
537                 largepage_idx = slot_largepage_idx(gfn, slot, level);
538                 return *largepage_idx;
539         }
540
541         return 1;
542 }
543
544 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
545 {
546         unsigned long page_size;
547         int i, ret = 0;
548
549         page_size = kvm_host_page_size(kvm, gfn);
550
551         for (i = PT_PAGE_TABLE_LEVEL;
552              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
553                 if (page_size >= KVM_HPAGE_SIZE(i))
554                         ret = i;
555                 else
556                         break;
557         }
558
559         return ret;
560 }
561
562 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
563 {
564         struct kvm_memory_slot *slot;
565         int host_level, level, max_level;
566
567         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
568         if (slot && slot->dirty_bitmap)
569                 return PT_PAGE_TABLE_LEVEL;
570
571         host_level = host_mapping_level(vcpu->kvm, large_gfn);
572
573         if (host_level == PT_PAGE_TABLE_LEVEL)
574                 return host_level;
575
576         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
577                 kvm_x86_ops->get_lpage_level() : host_level;
578
579         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
580                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
581                         break;
582
583         return level - 1;
584 }
585
586 /*
587  * Take gfn and return the reverse mapping to it.
588  */
589
590 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
591 {
592         struct kvm_memory_slot *slot;
593         unsigned long idx;
594
595         slot = gfn_to_memslot(kvm, gfn);
596         if (likely(level == PT_PAGE_TABLE_LEVEL))
597                 return &slot->rmap[gfn - slot->base_gfn];
598
599         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
600                 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
601
602         return &slot->lpage_info[level - 2][idx].rmap_pde;
603 }
604
605 /*
606  * Reverse mapping data structures:
607  *
608  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
609  * that points to page_address(page).
610  *
611  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
612  * containing more mappings.
613  *
614  * Returns the number of rmap entries before the spte was added or zero if
615  * the spte was not added.
616  *
617  */
618 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
619 {
620         struct kvm_mmu_page *sp;
621         struct kvm_rmap_desc *desc;
622         unsigned long *rmapp;
623         int i, count = 0;
624
625         if (!is_rmap_spte(*spte))
626                 return count;
627         sp = page_header(__pa(spte));
628         kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
629         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
630         if (!*rmapp) {
631                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
632                 *rmapp = (unsigned long)spte;
633         } else if (!(*rmapp & 1)) {
634                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
635                 desc = mmu_alloc_rmap_desc(vcpu);
636                 desc->sptes[0] = (u64 *)*rmapp;
637                 desc->sptes[1] = spte;
638                 *rmapp = (unsigned long)desc | 1;
639                 ++count;
640         } else {
641                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
642                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
643                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
644                         desc = desc->more;
645                         count += RMAP_EXT;
646                 }
647                 if (desc->sptes[RMAP_EXT-1]) {
648                         desc->more = mmu_alloc_rmap_desc(vcpu);
649                         desc = desc->more;
650                 }
651                 for (i = 0; desc->sptes[i]; ++i)
652                         ++count;
653                 desc->sptes[i] = spte;
654         }
655         return count;
656 }
657
658 static void rmap_desc_remove_entry(unsigned long *rmapp,
659                                    struct kvm_rmap_desc *desc,
660                                    int i,
661                                    struct kvm_rmap_desc *prev_desc)
662 {
663         int j;
664
665         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
666                 ;
667         desc->sptes[i] = desc->sptes[j];
668         desc->sptes[j] = NULL;
669         if (j != 0)
670                 return;
671         if (!prev_desc && !desc->more)
672                 *rmapp = (unsigned long)desc->sptes[0];
673         else
674                 if (prev_desc)
675                         prev_desc->more = desc->more;
676                 else
677                         *rmapp = (unsigned long)desc->more | 1;
678         mmu_free_rmap_desc(desc);
679 }
680
681 static void rmap_remove(struct kvm *kvm, u64 *spte)
682 {
683         struct kvm_rmap_desc *desc;
684         struct kvm_rmap_desc *prev_desc;
685         struct kvm_mmu_page *sp;
686         gfn_t gfn;
687         unsigned long *rmapp;
688         int i;
689
690         sp = page_header(__pa(spte));
691         gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
692         rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
693         if (!*rmapp) {
694                 printk(KERN_ERR "rmap_remove: %p 0->BUG\n", spte);
695                 BUG();
696         } else if (!(*rmapp & 1)) {
697                 rmap_printk("rmap_remove:  %p 1->0\n", spte);
698                 if ((u64 *)*rmapp != spte) {
699                         printk(KERN_ERR "rmap_remove:  %p 1->BUG\n", spte);
700                         BUG();
701                 }
702                 *rmapp = 0;
703         } else {
704                 rmap_printk("rmap_remove:  %p many->many\n", spte);
705                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
706                 prev_desc = NULL;
707                 while (desc) {
708                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
709                                 if (desc->sptes[i] == spte) {
710                                         rmap_desc_remove_entry(rmapp,
711                                                                desc, i,
712                                                                prev_desc);
713                                         return;
714                                 }
715                         prev_desc = desc;
716                         desc = desc->more;
717                 }
718                 pr_err("rmap_remove: %p many->many\n", spte);
719                 BUG();
720         }
721 }
722
723 static int set_spte_track_bits(u64 *sptep, u64 new_spte)
724 {
725         pfn_t pfn;
726         u64 old_spte = *sptep;
727
728         if (!spte_has_volatile_bits(old_spte))
729                 __set_spte(sptep, new_spte);
730         else
731                 old_spte = __xchg_spte(sptep, new_spte);
732
733         if (!is_rmap_spte(old_spte))
734                 return 0;
735
736         pfn = spte_to_pfn(old_spte);
737         if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
738                 kvm_set_pfn_accessed(pfn);
739         if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
740                 kvm_set_pfn_dirty(pfn);
741         return 1;
742 }
743
744 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
745 {
746         if (set_spte_track_bits(sptep, new_spte))
747                 rmap_remove(kvm, sptep);
748 }
749
750 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
751 {
752         struct kvm_rmap_desc *desc;
753         u64 *prev_spte;
754         int i;
755
756         if (!*rmapp)
757                 return NULL;
758         else if (!(*rmapp & 1)) {
759                 if (!spte)
760                         return (u64 *)*rmapp;
761                 return NULL;
762         }
763         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
764         prev_spte = NULL;
765         while (desc) {
766                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
767                         if (prev_spte == spte)
768                                 return desc->sptes[i];
769                         prev_spte = desc->sptes[i];
770                 }
771                 desc = desc->more;
772         }
773         return NULL;
774 }
775
776 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
777 {
778         unsigned long *rmapp;
779         u64 *spte;
780         int i, write_protected = 0;
781
782         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
783
784         spte = rmap_next(kvm, rmapp, NULL);
785         while (spte) {
786                 BUG_ON(!spte);
787                 BUG_ON(!(*spte & PT_PRESENT_MASK));
788                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
789                 if (is_writable_pte(*spte)) {
790                         update_spte(spte, *spte & ~PT_WRITABLE_MASK);
791                         write_protected = 1;
792                 }
793                 spte = rmap_next(kvm, rmapp, spte);
794         }
795
796         /* check for huge page mappings */
797         for (i = PT_DIRECTORY_LEVEL;
798              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
799                 rmapp = gfn_to_rmap(kvm, gfn, i);
800                 spte = rmap_next(kvm, rmapp, NULL);
801                 while (spte) {
802                         BUG_ON(!spte);
803                         BUG_ON(!(*spte & PT_PRESENT_MASK));
804                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
805                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
806                         if (is_writable_pte(*spte)) {
807                                 drop_spte(kvm, spte,
808                                           shadow_trap_nonpresent_pte);
809                                 --kvm->stat.lpages;
810                                 spte = NULL;
811                                 write_protected = 1;
812                         }
813                         spte = rmap_next(kvm, rmapp, spte);
814                 }
815         }
816
817         return write_protected;
818 }
819
820 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
821                            unsigned long data)
822 {
823         u64 *spte;
824         int need_tlb_flush = 0;
825
826         while ((spte = rmap_next(kvm, rmapp, NULL))) {
827                 BUG_ON(!(*spte & PT_PRESENT_MASK));
828                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
829                 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
830                 need_tlb_flush = 1;
831         }
832         return need_tlb_flush;
833 }
834
835 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
836                              unsigned long data)
837 {
838         int need_flush = 0;
839         u64 *spte, new_spte;
840         pte_t *ptep = (pte_t *)data;
841         pfn_t new_pfn;
842
843         WARN_ON(pte_huge(*ptep));
844         new_pfn = pte_pfn(*ptep);
845         spte = rmap_next(kvm, rmapp, NULL);
846         while (spte) {
847                 BUG_ON(!is_shadow_present_pte(*spte));
848                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
849                 need_flush = 1;
850                 if (pte_write(*ptep)) {
851                         drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
852                         spte = rmap_next(kvm, rmapp, NULL);
853                 } else {
854                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
855                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
856
857                         new_spte &= ~PT_WRITABLE_MASK;
858                         new_spte &= ~SPTE_HOST_WRITEABLE;
859                         new_spte &= ~shadow_accessed_mask;
860                         set_spte_track_bits(spte, new_spte);
861                         spte = rmap_next(kvm, rmapp, spte);
862                 }
863         }
864         if (need_flush)
865                 kvm_flush_remote_tlbs(kvm);
866
867         return 0;
868 }
869
870 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
871                           unsigned long data,
872                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
873                                          unsigned long data))
874 {
875         int i, j;
876         int ret;
877         int retval = 0;
878         struct kvm_memslots *slots;
879
880         slots = kvm_memslots(kvm);
881
882         for (i = 0; i < slots->nmemslots; i++) {
883                 struct kvm_memory_slot *memslot = &slots->memslots[i];
884                 unsigned long start = memslot->userspace_addr;
885                 unsigned long end;
886
887                 end = start + (memslot->npages << PAGE_SHIFT);
888                 if (hva >= start && hva < end) {
889                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
890
891                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
892
893                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
894                                 unsigned long idx;
895                                 int sh;
896
897                                 sh = KVM_HPAGE_GFN_SHIFT(PT_DIRECTORY_LEVEL+j);
898                                 idx = ((memslot->base_gfn+gfn_offset) >> sh) -
899                                         (memslot->base_gfn >> sh);
900                                 ret |= handler(kvm,
901                                         &memslot->lpage_info[j][idx].rmap_pde,
902                                         data);
903                         }
904                         trace_kvm_age_page(hva, memslot, ret);
905                         retval |= ret;
906                 }
907         }
908
909         return retval;
910 }
911
912 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
913 {
914         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
915 }
916
917 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
918 {
919         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
920 }
921
922 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
923                          unsigned long data)
924 {
925         u64 *spte;
926         int young = 0;
927
928         /*
929          * Emulate the accessed bit for EPT, by checking if this page has
930          * an EPT mapping, and clearing it if it does. On the next access,
931          * a new EPT mapping will be established.
932          * This has some overhead, but not as much as the cost of swapping
933          * out actively used pages or breaking up actively used hugepages.
934          */
935         if (!shadow_accessed_mask)
936                 return kvm_unmap_rmapp(kvm, rmapp, data);
937
938         spte = rmap_next(kvm, rmapp, NULL);
939         while (spte) {
940                 int _young;
941                 u64 _spte = *spte;
942                 BUG_ON(!(_spte & PT_PRESENT_MASK));
943                 _young = _spte & PT_ACCESSED_MASK;
944                 if (_young) {
945                         young = 1;
946                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
947                 }
948                 spte = rmap_next(kvm, rmapp, spte);
949         }
950         return young;
951 }
952
953 #define RMAP_RECYCLE_THRESHOLD 1000
954
955 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
956 {
957         unsigned long *rmapp;
958         struct kvm_mmu_page *sp;
959
960         sp = page_header(__pa(spte));
961
962         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
963
964         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
965         kvm_flush_remote_tlbs(vcpu->kvm);
966 }
967
968 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
969 {
970         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
971 }
972
973 #ifdef MMU_DEBUG
974 static int is_empty_shadow_page(u64 *spt)
975 {
976         u64 *pos;
977         u64 *end;
978
979         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
980                 if (is_shadow_present_pte(*pos)) {
981                         printk(KERN_ERR "%s: %p %llx\n", __func__,
982                                pos, *pos);
983                         return 0;
984                 }
985         return 1;
986 }
987 #endif
988
989 /*
990  * This value is the sum of all of the kvm instances's
991  * kvm->arch.n_used_mmu_pages values.  We need a global,
992  * aggregate version in order to make the slab shrinker
993  * faster
994  */
995 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
996 {
997         kvm->arch.n_used_mmu_pages += nr;
998         percpu_counter_add(&kvm_total_used_mmu_pages, nr);
999 }
1000
1001 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1002 {
1003         ASSERT(is_empty_shadow_page(sp->spt));
1004         hlist_del(&sp->hash_link);
1005         list_del(&sp->link);
1006         __free_page(virt_to_page(sp->spt));
1007         if (!sp->role.direct)
1008                 __free_page(virt_to_page(sp->gfns));
1009         kmem_cache_free(mmu_page_header_cache, sp);
1010         kvm_mod_used_mmu_pages(kvm, -1);
1011 }
1012
1013 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1014 {
1015         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1016 }
1017
1018 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
1019                                                u64 *parent_pte, int direct)
1020 {
1021         struct kvm_mmu_page *sp;
1022
1023         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
1024         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
1025         if (!direct)
1026                 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
1027                                                   PAGE_SIZE);
1028         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1029         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1030         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
1031         sp->multimapped = 0;
1032         sp->parent_pte = parent_pte;
1033         kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1034         return sp;
1035 }
1036
1037 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1038                                     struct kvm_mmu_page *sp, u64 *parent_pte)
1039 {
1040         struct kvm_pte_chain *pte_chain;
1041         struct hlist_node *node;
1042         int i;
1043
1044         if (!parent_pte)
1045                 return;
1046         if (!sp->multimapped) {
1047                 u64 *old = sp->parent_pte;
1048
1049                 if (!old) {
1050                         sp->parent_pte = parent_pte;
1051                         return;
1052                 }
1053                 sp->multimapped = 1;
1054                 pte_chain = mmu_alloc_pte_chain(vcpu);
1055                 INIT_HLIST_HEAD(&sp->parent_ptes);
1056                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1057                 pte_chain->parent_ptes[0] = old;
1058         }
1059         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1060                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1061                         continue;
1062                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1063                         if (!pte_chain->parent_ptes[i]) {
1064                                 pte_chain->parent_ptes[i] = parent_pte;
1065                                 return;
1066                         }
1067         }
1068         pte_chain = mmu_alloc_pte_chain(vcpu);
1069         BUG_ON(!pte_chain);
1070         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1071         pte_chain->parent_ptes[0] = parent_pte;
1072 }
1073
1074 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1075                                        u64 *parent_pte)
1076 {
1077         struct kvm_pte_chain *pte_chain;
1078         struct hlist_node *node;
1079         int i;
1080
1081         if (!sp->multimapped) {
1082                 BUG_ON(sp->parent_pte != parent_pte);
1083                 sp->parent_pte = NULL;
1084                 return;
1085         }
1086         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1087                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1088                         if (!pte_chain->parent_ptes[i])
1089                                 break;
1090                         if (pte_chain->parent_ptes[i] != parent_pte)
1091                                 continue;
1092                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
1093                                 && pte_chain->parent_ptes[i + 1]) {
1094                                 pte_chain->parent_ptes[i]
1095                                         = pte_chain->parent_ptes[i + 1];
1096                                 ++i;
1097                         }
1098                         pte_chain->parent_ptes[i] = NULL;
1099                         if (i == 0) {
1100                                 hlist_del(&pte_chain->link);
1101                                 mmu_free_pte_chain(pte_chain);
1102                                 if (hlist_empty(&sp->parent_ptes)) {
1103                                         sp->multimapped = 0;
1104                                         sp->parent_pte = NULL;
1105                                 }
1106                         }
1107                         return;
1108                 }
1109         BUG();
1110 }
1111
1112 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1113 {
1114         struct kvm_pte_chain *pte_chain;
1115         struct hlist_node *node;
1116         struct kvm_mmu_page *parent_sp;
1117         int i;
1118
1119         if (!sp->multimapped && sp->parent_pte) {
1120                 parent_sp = page_header(__pa(sp->parent_pte));
1121                 fn(parent_sp, sp->parent_pte);
1122                 return;
1123         }
1124
1125         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1126                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1127                         u64 *spte = pte_chain->parent_ptes[i];
1128
1129                         if (!spte)
1130                                 break;
1131                         parent_sp = page_header(__pa(spte));
1132                         fn(parent_sp, spte);
1133                 }
1134 }
1135
1136 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1137 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1138 {
1139         mmu_parent_walk(sp, mark_unsync);
1140 }
1141
1142 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1143 {
1144         unsigned int index;
1145
1146         index = spte - sp->spt;
1147         if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1148                 return;
1149         if (sp->unsync_children++)
1150                 return;
1151         kvm_mmu_mark_parents_unsync(sp);
1152 }
1153
1154 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1155                                     struct kvm_mmu_page *sp)
1156 {
1157         int i;
1158
1159         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1160                 sp->spt[i] = shadow_trap_nonpresent_pte;
1161 }
1162
1163 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1164                                struct kvm_mmu_page *sp, bool clear_unsync)
1165 {
1166         return 1;
1167 }
1168
1169 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1170 {
1171 }
1172
1173 #define KVM_PAGE_ARRAY_NR 16
1174
1175 struct kvm_mmu_pages {
1176         struct mmu_page_and_offset {
1177                 struct kvm_mmu_page *sp;
1178                 unsigned int idx;
1179         } page[KVM_PAGE_ARRAY_NR];
1180         unsigned int nr;
1181 };
1182
1183 #define for_each_unsync_children(bitmap, idx)           \
1184         for (idx = find_first_bit(bitmap, 512);         \
1185              idx < 512;                                 \
1186              idx = find_next_bit(bitmap, 512, idx+1))
1187
1188 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1189                          int idx)
1190 {
1191         int i;
1192
1193         if (sp->unsync)
1194                 for (i=0; i < pvec->nr; i++)
1195                         if (pvec->page[i].sp == sp)
1196                                 return 0;
1197
1198         pvec->page[pvec->nr].sp = sp;
1199         pvec->page[pvec->nr].idx = idx;
1200         pvec->nr++;
1201         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1202 }
1203
1204 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1205                            struct kvm_mmu_pages *pvec)
1206 {
1207         int i, ret, nr_unsync_leaf = 0;
1208
1209         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1210                 struct kvm_mmu_page *child;
1211                 u64 ent = sp->spt[i];
1212
1213                 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1214                         goto clear_child_bitmap;
1215
1216                 child = page_header(ent & PT64_BASE_ADDR_MASK);
1217
1218                 if (child->unsync_children) {
1219                         if (mmu_pages_add(pvec, child, i))
1220                                 return -ENOSPC;
1221
1222                         ret = __mmu_unsync_walk(child, pvec);
1223                         if (!ret)
1224                                 goto clear_child_bitmap;
1225                         else if (ret > 0)
1226                                 nr_unsync_leaf += ret;
1227                         else
1228                                 return ret;
1229                 } else if (child->unsync) {
1230                         nr_unsync_leaf++;
1231                         if (mmu_pages_add(pvec, child, i))
1232                                 return -ENOSPC;
1233                 } else
1234                          goto clear_child_bitmap;
1235
1236                 continue;
1237
1238 clear_child_bitmap:
1239                 __clear_bit(i, sp->unsync_child_bitmap);
1240                 sp->unsync_children--;
1241                 WARN_ON((int)sp->unsync_children < 0);
1242         }
1243
1244
1245         return nr_unsync_leaf;
1246 }
1247
1248 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1249                            struct kvm_mmu_pages *pvec)
1250 {
1251         if (!sp->unsync_children)
1252                 return 0;
1253
1254         mmu_pages_add(pvec, sp, 0);
1255         return __mmu_unsync_walk(sp, pvec);
1256 }
1257
1258 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1259 {
1260         WARN_ON(!sp->unsync);
1261         trace_kvm_mmu_sync_page(sp);
1262         sp->unsync = 0;
1263         --kvm->stat.mmu_unsync;
1264 }
1265
1266 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1267                                     struct list_head *invalid_list);
1268 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1269                                     struct list_head *invalid_list);
1270
1271 #define for_each_gfn_sp(kvm, sp, gfn, pos)                              \
1272   hlist_for_each_entry(sp, pos,                                         \
1273    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1274         if ((sp)->gfn != (gfn)) {} else
1275
1276 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos)               \
1277   hlist_for_each_entry(sp, pos,                                         \
1278    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1279                 if ((sp)->gfn != (gfn) || (sp)->role.direct ||          \
1280                         (sp)->role.invalid) {} else
1281
1282 /* @sp->gfn should be write-protected at the call site */
1283 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1284                            struct list_head *invalid_list, bool clear_unsync)
1285 {
1286         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1287                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1288                 return 1;
1289         }
1290
1291         if (clear_unsync)
1292                 kvm_unlink_unsync_page(vcpu->kvm, sp);
1293
1294         if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1295                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1296                 return 1;
1297         }
1298
1299         kvm_mmu_flush_tlb(vcpu);
1300         return 0;
1301 }
1302
1303 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1304                                    struct kvm_mmu_page *sp)
1305 {
1306         LIST_HEAD(invalid_list);
1307         int ret;
1308
1309         ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1310         if (ret)
1311                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1312
1313         return ret;
1314 }
1315
1316 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1317                          struct list_head *invalid_list)
1318 {
1319         return __kvm_sync_page(vcpu, sp, invalid_list, true);
1320 }
1321
1322 /* @gfn should be write-protected at the call site */
1323 static void kvm_sync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1324 {
1325         struct kvm_mmu_page *s;
1326         struct hlist_node *node;
1327         LIST_HEAD(invalid_list);
1328         bool flush = false;
1329
1330         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1331                 if (!s->unsync)
1332                         continue;
1333
1334                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1335                 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1336                         (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1337                         kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1338                         continue;
1339                 }
1340                 kvm_unlink_unsync_page(vcpu->kvm, s);
1341                 flush = true;
1342         }
1343
1344         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1345         if (flush)
1346                 kvm_mmu_flush_tlb(vcpu);
1347 }
1348
1349 struct mmu_page_path {
1350         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1351         unsigned int idx[PT64_ROOT_LEVEL-1];
1352 };
1353
1354 #define for_each_sp(pvec, sp, parents, i)                       \
1355                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1356                         sp = pvec.page[i].sp;                   \
1357                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1358                         i = mmu_pages_next(&pvec, &parents, i))
1359
1360 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1361                           struct mmu_page_path *parents,
1362                           int i)
1363 {
1364         int n;
1365
1366         for (n = i+1; n < pvec->nr; n++) {
1367                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1368
1369                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1370                         parents->idx[0] = pvec->page[n].idx;
1371                         return n;
1372                 }
1373
1374                 parents->parent[sp->role.level-2] = sp;
1375                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1376         }
1377
1378         return n;
1379 }
1380
1381 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1382 {
1383         struct kvm_mmu_page *sp;
1384         unsigned int level = 0;
1385
1386         do {
1387                 unsigned int idx = parents->idx[level];
1388
1389                 sp = parents->parent[level];
1390                 if (!sp)
1391                         return;
1392
1393                 --sp->unsync_children;
1394                 WARN_ON((int)sp->unsync_children < 0);
1395                 __clear_bit(idx, sp->unsync_child_bitmap);
1396                 level++;
1397         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1398 }
1399
1400 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1401                                struct mmu_page_path *parents,
1402                                struct kvm_mmu_pages *pvec)
1403 {
1404         parents->parent[parent->role.level-1] = NULL;
1405         pvec->nr = 0;
1406 }
1407
1408 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1409                               struct kvm_mmu_page *parent)
1410 {
1411         int i;
1412         struct kvm_mmu_page *sp;
1413         struct mmu_page_path parents;
1414         struct kvm_mmu_pages pages;
1415         LIST_HEAD(invalid_list);
1416
1417         kvm_mmu_pages_init(parent, &parents, &pages);
1418         while (mmu_unsync_walk(parent, &pages)) {
1419                 int protected = 0;
1420
1421                 for_each_sp(pages, sp, parents, i)
1422                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1423
1424                 if (protected)
1425                         kvm_flush_remote_tlbs(vcpu->kvm);
1426
1427                 for_each_sp(pages, sp, parents, i) {
1428                         kvm_sync_page(vcpu, sp, &invalid_list);
1429                         mmu_pages_clear_parents(&parents);
1430                 }
1431                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1432                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1433                 kvm_mmu_pages_init(parent, &parents, &pages);
1434         }
1435 }
1436
1437 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1438                                              gfn_t gfn,
1439                                              gva_t gaddr,
1440                                              unsigned level,
1441                                              int direct,
1442                                              unsigned access,
1443                                              u64 *parent_pte)
1444 {
1445         union kvm_mmu_page_role role;
1446         unsigned quadrant;
1447         struct kvm_mmu_page *sp;
1448         struct hlist_node *node;
1449         bool need_sync = false;
1450
1451         role = vcpu->arch.mmu.base_role;
1452         role.level = level;
1453         role.direct = direct;
1454         if (role.direct)
1455                 role.cr4_pae = 0;
1456         role.access = access;
1457         if (!vcpu->arch.mmu.direct_map
1458             && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1459                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1460                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1461                 role.quadrant = quadrant;
1462         }
1463         for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1464                 if (!need_sync && sp->unsync)
1465                         need_sync = true;
1466
1467                 if (sp->role.word != role.word)
1468                         continue;
1469
1470                 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1471                         break;
1472
1473                 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1474                 if (sp->unsync_children) {
1475                         kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1476                         kvm_mmu_mark_parents_unsync(sp);
1477                 } else if (sp->unsync)
1478                         kvm_mmu_mark_parents_unsync(sp);
1479
1480                 trace_kvm_mmu_get_page(sp, false);
1481                 return sp;
1482         }
1483         ++vcpu->kvm->stat.mmu_cache_miss;
1484         sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1485         if (!sp)
1486                 return sp;
1487         sp->gfn = gfn;
1488         sp->role = role;
1489         hlist_add_head(&sp->hash_link,
1490                 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1491         if (!direct) {
1492                 if (rmap_write_protect(vcpu->kvm, gfn))
1493                         kvm_flush_remote_tlbs(vcpu->kvm);
1494                 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1495                         kvm_sync_pages(vcpu, gfn);
1496
1497                 account_shadowed(vcpu->kvm, gfn);
1498         }
1499         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1500                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1501         else
1502                 nonpaging_prefetch_page(vcpu, sp);
1503         trace_kvm_mmu_get_page(sp, true);
1504         return sp;
1505 }
1506
1507 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1508                              struct kvm_vcpu *vcpu, u64 addr)
1509 {
1510         iterator->addr = addr;
1511         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1512         iterator->level = vcpu->arch.mmu.shadow_root_level;
1513
1514         if (iterator->level == PT64_ROOT_LEVEL &&
1515             vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL &&
1516             !vcpu->arch.mmu.direct_map)
1517                 --iterator->level;
1518
1519         if (iterator->level == PT32E_ROOT_LEVEL) {
1520                 iterator->shadow_addr
1521                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1522                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1523                 --iterator->level;
1524                 if (!iterator->shadow_addr)
1525                         iterator->level = 0;
1526         }
1527 }
1528
1529 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1530 {
1531         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1532                 return false;
1533
1534         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1535                 if (is_large_pte(*iterator->sptep))
1536                         return false;
1537
1538         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1539         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1540         return true;
1541 }
1542
1543 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1544 {
1545         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1546         --iterator->level;
1547 }
1548
1549 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1550 {
1551         u64 spte;
1552
1553         spte = __pa(sp->spt)
1554                 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1555                 | PT_WRITABLE_MASK | PT_USER_MASK;
1556         __set_spte(sptep, spte);
1557 }
1558
1559 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1560 {
1561         if (is_large_pte(*sptep)) {
1562                 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1563                 kvm_flush_remote_tlbs(vcpu->kvm);
1564         }
1565 }
1566
1567 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1568                                    unsigned direct_access)
1569 {
1570         if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1571                 struct kvm_mmu_page *child;
1572
1573                 /*
1574                  * For the direct sp, if the guest pte's dirty bit
1575                  * changed form clean to dirty, it will corrupt the
1576                  * sp's access: allow writable in the read-only sp,
1577                  * so we should update the spte at this point to get
1578                  * a new sp with the correct access.
1579                  */
1580                 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1581                 if (child->role.access == direct_access)
1582                         return;
1583
1584                 mmu_page_remove_parent_pte(child, sptep);
1585                 __set_spte(sptep, shadow_trap_nonpresent_pte);
1586                 kvm_flush_remote_tlbs(vcpu->kvm);
1587         }
1588 }
1589
1590 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1591                                          struct kvm_mmu_page *sp)
1592 {
1593         unsigned i;
1594         u64 *pt;
1595         u64 ent;
1596
1597         pt = sp->spt;
1598
1599         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1600                 ent = pt[i];
1601
1602                 if (is_shadow_present_pte(ent)) {
1603                         if (!is_last_spte(ent, sp->role.level)) {
1604                                 ent &= PT64_BASE_ADDR_MASK;
1605                                 mmu_page_remove_parent_pte(page_header(ent),
1606                                                            &pt[i]);
1607                         } else {
1608                                 if (is_large_pte(ent))
1609                                         --kvm->stat.lpages;
1610                                 drop_spte(kvm, &pt[i],
1611                                           shadow_trap_nonpresent_pte);
1612                         }
1613                 }
1614                 pt[i] = shadow_trap_nonpresent_pte;
1615         }
1616 }
1617
1618 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1619 {
1620         mmu_page_remove_parent_pte(sp, parent_pte);
1621 }
1622
1623 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1624 {
1625         int i;
1626         struct kvm_vcpu *vcpu;
1627
1628         kvm_for_each_vcpu(i, vcpu, kvm)
1629                 vcpu->arch.last_pte_updated = NULL;
1630 }
1631
1632 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1633 {
1634         u64 *parent_pte;
1635
1636         while (sp->multimapped || sp->parent_pte) {
1637                 if (!sp->multimapped)
1638                         parent_pte = sp->parent_pte;
1639                 else {
1640                         struct kvm_pte_chain *chain;
1641
1642                         chain = container_of(sp->parent_ptes.first,
1643                                              struct kvm_pte_chain, link);
1644                         parent_pte = chain->parent_ptes[0];
1645                 }
1646                 BUG_ON(!parent_pte);
1647                 kvm_mmu_put_page(sp, parent_pte);
1648                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1649         }
1650 }
1651
1652 static int mmu_zap_unsync_children(struct kvm *kvm,
1653                                    struct kvm_mmu_page *parent,
1654                                    struct list_head *invalid_list)
1655 {
1656         int i, zapped = 0;
1657         struct mmu_page_path parents;
1658         struct kvm_mmu_pages pages;
1659
1660         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1661                 return 0;
1662
1663         kvm_mmu_pages_init(parent, &parents, &pages);
1664         while (mmu_unsync_walk(parent, &pages)) {
1665                 struct kvm_mmu_page *sp;
1666
1667                 for_each_sp(pages, sp, parents, i) {
1668                         kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1669                         mmu_pages_clear_parents(&parents);
1670                         zapped++;
1671                 }
1672                 kvm_mmu_pages_init(parent, &parents, &pages);
1673         }
1674
1675         return zapped;
1676 }
1677
1678 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1679                                     struct list_head *invalid_list)
1680 {
1681         int ret;
1682
1683         trace_kvm_mmu_prepare_zap_page(sp);
1684         ++kvm->stat.mmu_shadow_zapped;
1685         ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1686         kvm_mmu_page_unlink_children(kvm, sp);
1687         kvm_mmu_unlink_parents(kvm, sp);
1688         if (!sp->role.invalid && !sp->role.direct)
1689                 unaccount_shadowed(kvm, sp->gfn);
1690         if (sp->unsync)
1691                 kvm_unlink_unsync_page(kvm, sp);
1692         if (!sp->root_count) {
1693                 /* Count self */
1694                 ret++;
1695                 list_move(&sp->link, invalid_list);
1696         } else {
1697                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1698                 kvm_reload_remote_mmus(kvm);
1699         }
1700
1701         sp->role.invalid = 1;
1702         kvm_mmu_reset_last_pte_updated(kvm);
1703         return ret;
1704 }
1705
1706 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1707                                     struct list_head *invalid_list)
1708 {
1709         struct kvm_mmu_page *sp;
1710
1711         if (list_empty(invalid_list))
1712                 return;
1713
1714         kvm_flush_remote_tlbs(kvm);
1715
1716         do {
1717                 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1718                 WARN_ON(!sp->role.invalid || sp->root_count);
1719                 kvm_mmu_free_page(kvm, sp);
1720         } while (!list_empty(invalid_list));
1721
1722 }
1723
1724 /*
1725  * Changing the number of mmu pages allocated to the vm
1726  * Note: if goal_nr_mmu_pages is too small, you will get dead lock
1727  */
1728 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
1729 {
1730         LIST_HEAD(invalid_list);
1731         /*
1732          * If we set the number of mmu pages to be smaller be than the
1733          * number of actived pages , we must to free some mmu pages before we
1734          * change the value
1735          */
1736
1737         if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
1738                 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages &&
1739                         !list_empty(&kvm->arch.active_mmu_pages)) {
1740                         struct kvm_mmu_page *page;
1741
1742                         page = container_of(kvm->arch.active_mmu_pages.prev,
1743                                             struct kvm_mmu_page, link);
1744                         kvm_mmu_prepare_zap_page(kvm, page, &invalid_list);
1745                         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1746                 }
1747                 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
1748         }
1749
1750         kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
1751 }
1752
1753 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1754 {
1755         struct kvm_mmu_page *sp;
1756         struct hlist_node *node;
1757         LIST_HEAD(invalid_list);
1758         int r;
1759
1760         pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
1761         r = 0;
1762
1763         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1764                 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
1765                          sp->role.word);
1766                 r = 1;
1767                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1768         }
1769         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1770         return r;
1771 }
1772
1773 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1774 {
1775         struct kvm_mmu_page *sp;
1776         struct hlist_node *node;
1777         LIST_HEAD(invalid_list);
1778
1779         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1780                 pgprintk("%s: zap %llx %x\n",
1781                          __func__, gfn, sp->role.word);
1782                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1783         }
1784         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1785 }
1786
1787 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1788 {
1789         int slot = memslot_id(kvm, gfn);
1790         struct kvm_mmu_page *sp = page_header(__pa(pte));
1791
1792         __set_bit(slot, sp->slot_bitmap);
1793 }
1794
1795 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1796 {
1797         int i;
1798         u64 *pt = sp->spt;
1799
1800         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1801                 return;
1802
1803         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1804                 if (pt[i] == shadow_notrap_nonpresent_pte)
1805                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1806         }
1807 }
1808
1809 /*
1810  * The function is based on mtrr_type_lookup() in
1811  * arch/x86/kernel/cpu/mtrr/generic.c
1812  */
1813 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1814                          u64 start, u64 end)
1815 {
1816         int i;
1817         u64 base, mask;
1818         u8 prev_match, curr_match;
1819         int num_var_ranges = KVM_NR_VAR_MTRR;
1820
1821         if (!mtrr_state->enabled)
1822                 return 0xFF;
1823
1824         /* Make end inclusive end, instead of exclusive */
1825         end--;
1826
1827         /* Look in fixed ranges. Just return the type as per start */
1828         if (mtrr_state->have_fixed && (start < 0x100000)) {
1829                 int idx;
1830
1831                 if (start < 0x80000) {
1832                         idx = 0;
1833                         idx += (start >> 16);
1834                         return mtrr_state->fixed_ranges[idx];
1835                 } else if (start < 0xC0000) {
1836                         idx = 1 * 8;
1837                         idx += ((start - 0x80000) >> 14);
1838                         return mtrr_state->fixed_ranges[idx];
1839                 } else if (start < 0x1000000) {
1840                         idx = 3 * 8;
1841                         idx += ((start - 0xC0000) >> 12);
1842                         return mtrr_state->fixed_ranges[idx];
1843                 }
1844         }
1845
1846         /*
1847          * Look in variable ranges
1848          * Look of multiple ranges matching this address and pick type
1849          * as per MTRR precedence
1850          */
1851         if (!(mtrr_state->enabled & 2))
1852                 return mtrr_state->def_type;
1853
1854         prev_match = 0xFF;
1855         for (i = 0; i < num_var_ranges; ++i) {
1856                 unsigned short start_state, end_state;
1857
1858                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1859                         continue;
1860
1861                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1862                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1863                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1864                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1865
1866                 start_state = ((start & mask) == (base & mask));
1867                 end_state = ((end & mask) == (base & mask));
1868                 if (start_state != end_state)
1869                         return 0xFE;
1870
1871                 if ((start & mask) != (base & mask))
1872                         continue;
1873
1874                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1875                 if (prev_match == 0xFF) {
1876                         prev_match = curr_match;
1877                         continue;
1878                 }
1879
1880                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1881                     curr_match == MTRR_TYPE_UNCACHABLE)
1882                         return MTRR_TYPE_UNCACHABLE;
1883
1884                 if ((prev_match == MTRR_TYPE_WRBACK &&
1885                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1886                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1887                      curr_match == MTRR_TYPE_WRBACK)) {
1888                         prev_match = MTRR_TYPE_WRTHROUGH;
1889                         curr_match = MTRR_TYPE_WRTHROUGH;
1890                 }
1891
1892                 if (prev_match != curr_match)
1893                         return MTRR_TYPE_UNCACHABLE;
1894         }
1895
1896         if (prev_match != 0xFF)
1897                 return prev_match;
1898
1899         return mtrr_state->def_type;
1900 }
1901
1902 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1903 {
1904         u8 mtrr;
1905
1906         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1907                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1908         if (mtrr == 0xfe || mtrr == 0xff)
1909                 mtrr = MTRR_TYPE_WRBACK;
1910         return mtrr;
1911 }
1912 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1913
1914 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1915 {
1916         trace_kvm_mmu_unsync_page(sp);
1917         ++vcpu->kvm->stat.mmu_unsync;
1918         sp->unsync = 1;
1919
1920         kvm_mmu_mark_parents_unsync(sp);
1921         mmu_convert_notrap(sp);
1922 }
1923
1924 static void kvm_unsync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1925 {
1926         struct kvm_mmu_page *s;
1927         struct hlist_node *node;
1928
1929         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1930                 if (s->unsync)
1931                         continue;
1932                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1933                 __kvm_unsync_page(vcpu, s);
1934         }
1935 }
1936
1937 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1938                                   bool can_unsync)
1939 {
1940         struct kvm_mmu_page *s;
1941         struct hlist_node *node;
1942         bool need_unsync = false;
1943
1944         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1945                 if (!can_unsync)
1946                         return 1;
1947
1948                 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1949                         return 1;
1950
1951                 if (!need_unsync && !s->unsync) {
1952                         if (!oos_shadow)
1953                                 return 1;
1954                         need_unsync = true;
1955                 }
1956         }
1957         if (need_unsync)
1958                 kvm_unsync_pages(vcpu, gfn);
1959         return 0;
1960 }
1961
1962 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1963                     unsigned pte_access, int user_fault,
1964                     int write_fault, int dirty, int level,
1965                     gfn_t gfn, pfn_t pfn, bool speculative,
1966                     bool can_unsync, bool reset_host_protection)
1967 {
1968         u64 spte;
1969         int ret = 0;
1970
1971         /*
1972          * We don't set the accessed bit, since we sometimes want to see
1973          * whether the guest actually used the pte (in order to detect
1974          * demand paging).
1975          */
1976         spte = shadow_base_present_pte;
1977         if (!speculative)
1978                 spte |= shadow_accessed_mask;
1979         if (!dirty)
1980                 pte_access &= ~ACC_WRITE_MASK;
1981         if (pte_access & ACC_EXEC_MASK)
1982                 spte |= shadow_x_mask;
1983         else
1984                 spte |= shadow_nx_mask;
1985         if (pte_access & ACC_USER_MASK)
1986                 spte |= shadow_user_mask;
1987         if (level > PT_PAGE_TABLE_LEVEL)
1988                 spte |= PT_PAGE_SIZE_MASK;
1989         if (tdp_enabled)
1990                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1991                         kvm_is_mmio_pfn(pfn));
1992
1993         if (reset_host_protection)
1994                 spte |= SPTE_HOST_WRITEABLE;
1995
1996         spte |= (u64)pfn << PAGE_SHIFT;
1997
1998         if ((pte_access & ACC_WRITE_MASK)
1999             || (!vcpu->arch.mmu.direct_map && write_fault
2000                 && !is_write_protection(vcpu) && !user_fault)) {
2001
2002                 if (level > PT_PAGE_TABLE_LEVEL &&
2003                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
2004                         ret = 1;
2005                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2006                         goto done;
2007                 }
2008
2009                 spte |= PT_WRITABLE_MASK;
2010
2011                 if (!vcpu->arch.mmu.direct_map
2012                     && !(pte_access & ACC_WRITE_MASK))
2013                         spte &= ~PT_USER_MASK;
2014
2015                 /*
2016                  * Optimization: for pte sync, if spte was writable the hash
2017                  * lookup is unnecessary (and expensive). Write protection
2018                  * is responsibility of mmu_get_page / kvm_sync_page.
2019                  * Same reasoning can be applied to dirty page accounting.
2020                  */
2021                 if (!can_unsync && is_writable_pte(*sptep))
2022                         goto set_pte;
2023
2024                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2025                         pgprintk("%s: found shadow page for %llx, marking ro\n",
2026                                  __func__, gfn);
2027                         ret = 1;
2028                         pte_access &= ~ACC_WRITE_MASK;
2029                         if (is_writable_pte(spte))
2030                                 spte &= ~PT_WRITABLE_MASK;
2031                 }
2032         }
2033
2034         if (pte_access & ACC_WRITE_MASK)
2035                 mark_page_dirty(vcpu->kvm, gfn);
2036
2037 set_pte:
2038         update_spte(sptep, spte);
2039 done:
2040         return ret;
2041 }
2042
2043 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2044                          unsigned pt_access, unsigned pte_access,
2045                          int user_fault, int write_fault, int dirty,
2046                          int *ptwrite, int level, gfn_t gfn,
2047                          pfn_t pfn, bool speculative,
2048                          bool reset_host_protection)
2049 {
2050         int was_rmapped = 0;
2051         int rmap_count;
2052
2053         pgprintk("%s: spte %llx access %x write_fault %d"
2054                  " user_fault %d gfn %llx\n",
2055                  __func__, *sptep, pt_access,
2056                  write_fault, user_fault, gfn);
2057
2058         if (is_rmap_spte(*sptep)) {
2059                 /*
2060                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2061                  * the parent of the now unreachable PTE.
2062                  */
2063                 if (level > PT_PAGE_TABLE_LEVEL &&
2064                     !is_large_pte(*sptep)) {
2065                         struct kvm_mmu_page *child;
2066                         u64 pte = *sptep;
2067
2068                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2069                         mmu_page_remove_parent_pte(child, sptep);
2070                         __set_spte(sptep, shadow_trap_nonpresent_pte);
2071                         kvm_flush_remote_tlbs(vcpu->kvm);
2072                 } else if (pfn != spte_to_pfn(*sptep)) {
2073                         pgprintk("hfn old %llx new %llx\n",
2074                                  spte_to_pfn(*sptep), pfn);
2075                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2076                         kvm_flush_remote_tlbs(vcpu->kvm);
2077                 } else
2078                         was_rmapped = 1;
2079         }
2080
2081         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2082                       dirty, level, gfn, pfn, speculative, true,
2083                       reset_host_protection)) {
2084                 if (write_fault)
2085                         *ptwrite = 1;
2086                 kvm_mmu_flush_tlb(vcpu);
2087         }
2088
2089         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2090         pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2091                  is_large_pte(*sptep)? "2MB" : "4kB",
2092                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2093                  *sptep, sptep);
2094         if (!was_rmapped && is_large_pte(*sptep))
2095                 ++vcpu->kvm->stat.lpages;
2096
2097         page_header_update_slot(vcpu->kvm, sptep, gfn);
2098         if (!was_rmapped) {
2099                 rmap_count = rmap_add(vcpu, sptep, gfn);
2100                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2101                         rmap_recycle(vcpu, sptep, gfn);
2102         }
2103         kvm_release_pfn_clean(pfn);
2104         if (speculative) {
2105                 vcpu->arch.last_pte_updated = sptep;
2106                 vcpu->arch.last_pte_gfn = gfn;
2107         }
2108 }
2109
2110 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2111 {
2112 }
2113
2114 static struct kvm_memory_slot *
2115 pte_prefetch_gfn_to_memslot(struct kvm_vcpu *vcpu, gfn_t gfn, bool no_dirty_log)
2116 {
2117         struct kvm_memory_slot *slot;
2118
2119         slot = gfn_to_memslot(vcpu->kvm, gfn);
2120         if (!slot || slot->flags & KVM_MEMSLOT_INVALID ||
2121               (no_dirty_log && slot->dirty_bitmap))
2122                 slot = NULL;
2123
2124         return slot;
2125 }
2126
2127 static pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2128                                      bool no_dirty_log)
2129 {
2130         struct kvm_memory_slot *slot;
2131         unsigned long hva;
2132
2133         slot = pte_prefetch_gfn_to_memslot(vcpu, gfn, no_dirty_log);
2134         if (!slot) {
2135                 get_page(bad_page);
2136                 return page_to_pfn(bad_page);
2137         }
2138
2139         hva = gfn_to_hva_memslot(slot, gfn);
2140
2141         return hva_to_pfn_atomic(vcpu->kvm, hva);
2142 }
2143
2144 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2145                                     struct kvm_mmu_page *sp,
2146                                     u64 *start, u64 *end)
2147 {
2148         struct page *pages[PTE_PREFETCH_NUM];
2149         unsigned access = sp->role.access;
2150         int i, ret;
2151         gfn_t gfn;
2152
2153         gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2154         if (!pte_prefetch_gfn_to_memslot(vcpu, gfn, access & ACC_WRITE_MASK))
2155                 return -1;
2156
2157         ret = gfn_to_page_many_atomic(vcpu->kvm, gfn, pages, end - start);
2158         if (ret <= 0)
2159                 return -1;
2160
2161         for (i = 0; i < ret; i++, gfn++, start++)
2162                 mmu_set_spte(vcpu, start, ACC_ALL,
2163                              access, 0, 0, 1, NULL,
2164                              sp->role.level, gfn,
2165                              page_to_pfn(pages[i]), true, true);
2166
2167         return 0;
2168 }
2169
2170 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2171                                   struct kvm_mmu_page *sp, u64 *sptep)
2172 {
2173         u64 *spte, *start = NULL;
2174         int i;
2175
2176         WARN_ON(!sp->role.direct);
2177
2178         i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2179         spte = sp->spt + i;
2180
2181         for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2182                 if (*spte != shadow_trap_nonpresent_pte || spte == sptep) {
2183                         if (!start)
2184                                 continue;
2185                         if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2186                                 break;
2187                         start = NULL;
2188                 } else if (!start)
2189                         start = spte;
2190         }
2191 }
2192
2193 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2194 {
2195         struct kvm_mmu_page *sp;
2196
2197         /*
2198          * Since it's no accessed bit on EPT, it's no way to
2199          * distinguish between actually accessed translations
2200          * and prefetched, so disable pte prefetch if EPT is
2201          * enabled.
2202          */
2203         if (!shadow_accessed_mask)
2204                 return;
2205
2206         sp = page_header(__pa(sptep));
2207         if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2208                 return;
2209
2210         __direct_pte_prefetch(vcpu, sp, sptep);
2211 }
2212
2213 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2214                         int level, gfn_t gfn, pfn_t pfn)
2215 {
2216         struct kvm_shadow_walk_iterator iterator;
2217         struct kvm_mmu_page *sp;
2218         int pt_write = 0;
2219         gfn_t pseudo_gfn;
2220
2221         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2222                 if (iterator.level == level) {
2223                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2224                                      0, write, 1, &pt_write,
2225                                      level, gfn, pfn, false, true);
2226                         direct_pte_prefetch(vcpu, iterator.sptep);
2227                         ++vcpu->stat.pf_fixed;
2228                         break;
2229                 }
2230
2231                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2232                         u64 base_addr = iterator.addr;
2233
2234                         base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2235                         pseudo_gfn = base_addr >> PAGE_SHIFT;
2236                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2237                                               iterator.level - 1,
2238                                               1, ACC_ALL, iterator.sptep);
2239                         if (!sp) {
2240                                 pgprintk("nonpaging_map: ENOMEM\n");
2241                                 kvm_release_pfn_clean(pfn);
2242                                 return -ENOMEM;
2243                         }
2244
2245                         __set_spte(iterator.sptep,
2246                                    __pa(sp->spt)
2247                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
2248                                    | shadow_user_mask | shadow_x_mask
2249                                    | shadow_accessed_mask);
2250                 }
2251         }
2252         return pt_write;
2253 }
2254
2255 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
2256 {
2257         siginfo_t info;
2258
2259         info.si_signo   = SIGBUS;
2260         info.si_errno   = 0;
2261         info.si_code    = BUS_MCEERR_AR;
2262         info.si_addr    = (void __user *)address;
2263         info.si_addr_lsb = PAGE_SHIFT;
2264
2265         send_sig_info(SIGBUS, &info, tsk);
2266 }
2267
2268 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2269 {
2270         kvm_release_pfn_clean(pfn);
2271         if (is_hwpoison_pfn(pfn)) {
2272                 kvm_send_hwpoison_signal(gfn_to_hva(kvm, gfn), current);
2273                 return 0;
2274         } else if (is_fault_pfn(pfn))
2275                 return -EFAULT;
2276
2277         return 1;
2278 }
2279
2280 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2281 {
2282         int r;
2283         int level;
2284         pfn_t pfn;
2285         unsigned long mmu_seq;
2286
2287         level = mapping_level(vcpu, gfn);
2288
2289         /*
2290          * This path builds a PAE pagetable - so we can map 2mb pages at
2291          * maximum. Therefore check if the level is larger than that.
2292          */
2293         if (level > PT_DIRECTORY_LEVEL)
2294                 level = PT_DIRECTORY_LEVEL;
2295
2296         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2297
2298         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2299         smp_rmb();
2300         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2301
2302         /* mmio */
2303         if (is_error_pfn(pfn))
2304                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2305
2306         spin_lock(&vcpu->kvm->mmu_lock);
2307         if (mmu_notifier_retry(vcpu, mmu_seq))
2308                 goto out_unlock;
2309         kvm_mmu_free_some_pages(vcpu);
2310         r = __direct_map(vcpu, v, write, level, gfn, pfn);
2311         spin_unlock(&vcpu->kvm->mmu_lock);
2312
2313
2314         return r;
2315
2316 out_unlock:
2317         spin_unlock(&vcpu->kvm->mmu_lock);
2318         kvm_release_pfn_clean(pfn);
2319         return 0;
2320 }
2321
2322
2323 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2324 {
2325         int i;
2326         struct kvm_mmu_page *sp;
2327         LIST_HEAD(invalid_list);
2328
2329         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2330                 return;
2331         spin_lock(&vcpu->kvm->mmu_lock);
2332         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL &&
2333             (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL ||
2334              vcpu->arch.mmu.direct_map)) {
2335                 hpa_t root = vcpu->arch.mmu.root_hpa;
2336
2337                 sp = page_header(root);
2338                 --sp->root_count;
2339                 if (!sp->root_count && sp->role.invalid) {
2340                         kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2341                         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2342                 }
2343                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2344                 spin_unlock(&vcpu->kvm->mmu_lock);
2345                 return;
2346         }
2347         for (i = 0; i < 4; ++i) {
2348                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2349
2350                 if (root) {
2351                         root &= PT64_BASE_ADDR_MASK;
2352                         sp = page_header(root);
2353                         --sp->root_count;
2354                         if (!sp->root_count && sp->role.invalid)
2355                                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2356                                                          &invalid_list);
2357                 }
2358                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2359         }
2360         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2361         spin_unlock(&vcpu->kvm->mmu_lock);
2362         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2363 }
2364
2365 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2366 {
2367         int ret = 0;
2368
2369         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2370                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2371                 ret = 1;
2372         }
2373
2374         return ret;
2375 }
2376
2377 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
2378 {
2379         struct kvm_mmu_page *sp;
2380         unsigned i;
2381
2382         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2383                 spin_lock(&vcpu->kvm->mmu_lock);
2384                 kvm_mmu_free_some_pages(vcpu);
2385                 sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL,
2386                                       1, ACC_ALL, NULL);
2387                 ++sp->root_count;
2388                 spin_unlock(&vcpu->kvm->mmu_lock);
2389                 vcpu->arch.mmu.root_hpa = __pa(sp->spt);
2390         } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) {
2391                 for (i = 0; i < 4; ++i) {
2392                         hpa_t root = vcpu->arch.mmu.pae_root[i];
2393
2394                         ASSERT(!VALID_PAGE(root));
2395                         spin_lock(&vcpu->kvm->mmu_lock);
2396                         kvm_mmu_free_some_pages(vcpu);
2397                         sp = kvm_mmu_get_page(vcpu, i << (30 - PAGE_SHIFT),
2398                                               i << 30,
2399                                               PT32_ROOT_LEVEL, 1, ACC_ALL,
2400                                               NULL);
2401                         root = __pa(sp->spt);
2402                         ++sp->root_count;
2403                         spin_unlock(&vcpu->kvm->mmu_lock);
2404                         vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2405                 }
2406                 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2407         } else
2408                 BUG();
2409
2410         return 0;
2411 }
2412
2413 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
2414 {
2415         struct kvm_mmu_page *sp;
2416         u64 pdptr, pm_mask;
2417         gfn_t root_gfn;
2418         int i;
2419
2420         root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT;
2421
2422         if (mmu_check_root(vcpu, root_gfn))
2423                 return 1;
2424
2425         /*
2426          * Do we shadow a long mode page table? If so we need to
2427          * write-protect the guests page table root.
2428          */
2429         if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2430                 hpa_t root = vcpu->arch.mmu.root_hpa;
2431
2432                 ASSERT(!VALID_PAGE(root));
2433
2434                 spin_lock(&vcpu->kvm->mmu_lock);
2435                 kvm_mmu_free_some_pages(vcpu);
2436                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL,
2437                                       0, ACC_ALL, NULL);
2438                 root = __pa(sp->spt);
2439                 ++sp->root_count;
2440                 spin_unlock(&vcpu->kvm->mmu_lock);
2441                 vcpu->arch.mmu.root_hpa = root;
2442                 return 0;
2443         }
2444
2445         /*
2446          * We shadow a 32 bit page table. This may be a legacy 2-level
2447          * or a PAE 3-level page table. In either case we need to be aware that
2448          * the shadow page table may be a PAE or a long mode page table.
2449          */
2450         pm_mask = PT_PRESENT_MASK;
2451         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL)
2452                 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
2453
2454         for (i = 0; i < 4; ++i) {
2455                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2456
2457                 ASSERT(!VALID_PAGE(root));
2458                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2459                         pdptr = kvm_pdptr_read_mmu(vcpu, &vcpu->arch.mmu, i);
2460                         if (!is_present_gpte(pdptr)) {
2461                                 vcpu->arch.mmu.pae_root[i] = 0;
2462                                 continue;
2463                         }
2464                         root_gfn = pdptr >> PAGE_SHIFT;
2465                         if (mmu_check_root(vcpu, root_gfn))
2466                                 return 1;
2467                 }
2468                 spin_lock(&vcpu->kvm->mmu_lock);
2469                 kvm_mmu_free_some_pages(vcpu);
2470                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2471                                       PT32_ROOT_LEVEL, 0,
2472                                       ACC_ALL, NULL);
2473                 root = __pa(sp->spt);
2474                 ++sp->root_count;
2475                 spin_unlock(&vcpu->kvm->mmu_lock);
2476
2477                 vcpu->arch.mmu.pae_root[i] = root | pm_mask;
2478         }
2479         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2480
2481         /*
2482          * If we shadow a 32 bit page table with a long mode page
2483          * table we enter this path.
2484          */
2485         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2486                 if (vcpu->arch.mmu.lm_root == NULL) {
2487                         /*
2488                          * The additional page necessary for this is only
2489                          * allocated on demand.
2490                          */
2491
2492                         u64 *lm_root;
2493
2494                         lm_root = (void*)get_zeroed_page(GFP_KERNEL);
2495                         if (lm_root == NULL)
2496                                 return 1;
2497
2498                         lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask;
2499
2500                         vcpu->arch.mmu.lm_root = lm_root;
2501                 }
2502
2503                 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root);
2504         }
2505
2506         return 0;
2507 }
2508
2509 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2510 {
2511         if (vcpu->arch.mmu.direct_map)
2512                 return mmu_alloc_direct_roots(vcpu);
2513         else
2514                 return mmu_alloc_shadow_roots(vcpu);
2515 }
2516
2517 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2518 {
2519         int i;
2520         struct kvm_mmu_page *sp;
2521
2522         if (vcpu->arch.mmu.direct_map)
2523                 return;
2524
2525         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2526                 return;
2527
2528         trace_kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC);
2529         if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2530                 hpa_t root = vcpu->arch.mmu.root_hpa;
2531                 sp = page_header(root);
2532                 mmu_sync_children(vcpu, sp);
2533                 return;
2534         }
2535         for (i = 0; i < 4; ++i) {
2536                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2537
2538                 if (root && VALID_PAGE(root)) {
2539                         root &= PT64_BASE_ADDR_MASK;
2540                         sp = page_header(root);
2541                         mmu_sync_children(vcpu, sp);
2542                 }
2543         }
2544         trace_kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
2545 }
2546
2547 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2548 {
2549         spin_lock(&vcpu->kvm->mmu_lock);
2550         mmu_sync_roots(vcpu);
2551         spin_unlock(&vcpu->kvm->mmu_lock);
2552 }
2553
2554 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2555                                   u32 access, u32 *error)
2556 {
2557         if (error)
2558                 *error = 0;
2559         return vaddr;
2560 }
2561
2562 static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
2563                                          u32 access, u32 *error)
2564 {
2565         if (error)
2566                 *error = 0;
2567         return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access);
2568 }
2569
2570 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2571                                 u32 error_code)
2572 {
2573         gfn_t gfn;
2574         int r;
2575
2576         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2577         r = mmu_topup_memory_caches(vcpu);
2578         if (r)
2579                 return r;
2580
2581         ASSERT(vcpu);
2582         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2583
2584         gfn = gva >> PAGE_SHIFT;
2585
2586         return nonpaging_map(vcpu, gva & PAGE_MASK,
2587                              error_code & PFERR_WRITE_MASK, gfn);
2588 }
2589
2590 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2591                                 u32 error_code)
2592 {
2593         pfn_t pfn;
2594         int r;
2595         int level;
2596         gfn_t gfn = gpa >> PAGE_SHIFT;
2597         unsigned long mmu_seq;
2598
2599         ASSERT(vcpu);
2600         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2601
2602         r = mmu_topup_memory_caches(vcpu);
2603         if (r)
2604                 return r;
2605
2606         level = mapping_level(vcpu, gfn);
2607
2608         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2609
2610         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2611         smp_rmb();
2612         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2613         if (is_error_pfn(pfn))
2614                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2615         spin_lock(&vcpu->kvm->mmu_lock);
2616         if (mmu_notifier_retry(vcpu, mmu_seq))
2617                 goto out_unlock;
2618         kvm_mmu_free_some_pages(vcpu);
2619         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2620                          level, gfn, pfn);
2621         spin_unlock(&vcpu->kvm->mmu_lock);
2622
2623         return r;
2624
2625 out_unlock:
2626         spin_unlock(&vcpu->kvm->mmu_lock);
2627         kvm_release_pfn_clean(pfn);
2628         return 0;
2629 }
2630
2631 static void nonpaging_free(struct kvm_vcpu *vcpu)
2632 {
2633         mmu_free_roots(vcpu);
2634 }
2635
2636 static int nonpaging_init_context(struct kvm_vcpu *vcpu,
2637                                   struct kvm_mmu *context)
2638 {
2639         context->new_cr3 = nonpaging_new_cr3;
2640         context->page_fault = nonpaging_page_fault;
2641         context->gva_to_gpa = nonpaging_gva_to_gpa;
2642         context->free = nonpaging_free;
2643         context->prefetch_page = nonpaging_prefetch_page;
2644         context->sync_page = nonpaging_sync_page;
2645         context->invlpg = nonpaging_invlpg;
2646         context->root_level = 0;
2647         context->shadow_root_level = PT32E_ROOT_LEVEL;
2648         context->root_hpa = INVALID_PAGE;
2649         context->direct_map = true;
2650         context->nx = false;
2651         return 0;
2652 }
2653
2654 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2655 {
2656         ++vcpu->stat.tlb_flush;
2657         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2658 }
2659
2660 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2661 {
2662         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2663         mmu_free_roots(vcpu);
2664 }
2665
2666 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
2667 {
2668         return vcpu->arch.cr3;
2669 }
2670
2671 static void inject_page_fault(struct kvm_vcpu *vcpu)
2672 {
2673         vcpu->arch.mmu.inject_page_fault(vcpu);
2674 }
2675
2676 static void paging_free(struct kvm_vcpu *vcpu)
2677 {
2678         nonpaging_free(vcpu);
2679 }
2680
2681 static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level)
2682 {
2683         int bit7;
2684
2685         bit7 = (gpte >> 7) & 1;
2686         return (gpte & mmu->rsvd_bits_mask[bit7][level-1]) != 0;
2687 }
2688
2689 #define PTTYPE 64
2690 #include "paging_tmpl.h"
2691 #undef PTTYPE
2692
2693 #define PTTYPE 32
2694 #include "paging_tmpl.h"
2695 #undef PTTYPE
2696
2697 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
2698                                   struct kvm_mmu *context,
2699                                   int level)
2700 {
2701         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2702         u64 exb_bit_rsvd = 0;
2703
2704         if (!context->nx)
2705                 exb_bit_rsvd = rsvd_bits(63, 63);
2706         switch (level) {
2707         case PT32_ROOT_LEVEL:
2708                 /* no rsvd bits for 2 level 4K page table entries */
2709                 context->rsvd_bits_mask[0][1] = 0;
2710                 context->rsvd_bits_mask[0][0] = 0;
2711                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2712
2713                 if (!is_pse(vcpu)) {
2714                         context->rsvd_bits_mask[1][1] = 0;
2715                         break;
2716                 }
2717
2718                 if (is_cpuid_PSE36())
2719                         /* 36bits PSE 4MB page */
2720                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2721                 else
2722                         /* 32 bits PSE 4MB page */
2723                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2724                 break;
2725         case PT32E_ROOT_LEVEL:
2726                 context->rsvd_bits_mask[0][2] =
2727                         rsvd_bits(maxphyaddr, 63) |
2728                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2729                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2730                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2731                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2732                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2733                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2734                         rsvd_bits(maxphyaddr, 62) |
2735                         rsvd_bits(13, 20);              /* large page */
2736                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2737                 break;
2738         case PT64_ROOT_LEVEL:
2739                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2740                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2741                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2742                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2743                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2744                         rsvd_bits(maxphyaddr, 51);
2745                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2746                         rsvd_bits(maxphyaddr, 51);
2747                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2748                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2749                         rsvd_bits(maxphyaddr, 51) |
2750                         rsvd_bits(13, 29);
2751                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2752                         rsvd_bits(maxphyaddr, 51) |
2753                         rsvd_bits(13, 20);              /* large page */
2754                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2755                 break;
2756         }
2757 }
2758
2759 static int paging64_init_context_common(struct kvm_vcpu *vcpu,
2760                                         struct kvm_mmu *context,
2761                                         int level)
2762 {
2763         context->nx = is_nx(vcpu);
2764
2765         reset_rsvds_bits_mask(vcpu, context, level);
2766
2767         ASSERT(is_pae(vcpu));
2768         context->new_cr3 = paging_new_cr3;
2769         context->page_fault = paging64_page_fault;
2770         context->gva_to_gpa = paging64_gva_to_gpa;
2771         context->prefetch_page = paging64_prefetch_page;
2772         context->sync_page = paging64_sync_page;
2773         context->invlpg = paging64_invlpg;
2774         context->free = paging_free;
2775         context->root_level = level;
2776         context->shadow_root_level = level;
2777         context->root_hpa = INVALID_PAGE;
2778         context->direct_map = false;
2779         return 0;
2780 }
2781
2782 static int paging64_init_context(struct kvm_vcpu *vcpu,
2783                                  struct kvm_mmu *context)
2784 {
2785         return paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
2786 }
2787
2788 static int paging32_init_context(struct kvm_vcpu *vcpu,
2789                                  struct kvm_mmu *context)
2790 {
2791         context->nx = false;
2792
2793         reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2794
2795         context->new_cr3 = paging_new_cr3;
2796         context->page_fault = paging32_page_fault;
2797         context->gva_to_gpa = paging32_gva_to_gpa;
2798         context->free = paging_free;
2799         context->prefetch_page = paging32_prefetch_page;
2800         context->sync_page = paging32_sync_page;
2801         context->invlpg = paging32_invlpg;
2802         context->root_level = PT32_ROOT_LEVEL;
2803         context->shadow_root_level = PT32E_ROOT_LEVEL;
2804         context->root_hpa = INVALID_PAGE;
2805         context->direct_map = false;
2806         return 0;
2807 }
2808
2809 static int paging32E_init_context(struct kvm_vcpu *vcpu,
2810                                   struct kvm_mmu *context)
2811 {
2812         return paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
2813 }
2814
2815 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2816 {
2817         struct kvm_mmu *context = vcpu->arch.walk_mmu;
2818
2819         context->new_cr3 = nonpaging_new_cr3;
2820         context->page_fault = tdp_page_fault;
2821         context->free = nonpaging_free;
2822         context->prefetch_page = nonpaging_prefetch_page;
2823         context->sync_page = nonpaging_sync_page;
2824         context->invlpg = nonpaging_invlpg;
2825         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2826         context->root_hpa = INVALID_PAGE;
2827         context->direct_map = true;
2828         context->set_cr3 = kvm_x86_ops->set_tdp_cr3;
2829         context->get_cr3 = get_cr3;
2830         context->inject_page_fault = kvm_inject_page_fault;
2831         context->nx = is_nx(vcpu);
2832
2833         if (!is_paging(vcpu)) {
2834                 context->nx = false;
2835                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2836                 context->root_level = 0;
2837         } else if (is_long_mode(vcpu)) {
2838                 context->nx = is_nx(vcpu);
2839                 reset_rsvds_bits_mask(vcpu, context, PT64_ROOT_LEVEL);
2840                 context->gva_to_gpa = paging64_gva_to_gpa;
2841                 context->root_level = PT64_ROOT_LEVEL;
2842         } else if (is_pae(vcpu)) {
2843                 context->nx = is_nx(vcpu);
2844                 reset_rsvds_bits_mask(vcpu, context, PT32E_ROOT_LEVEL);
2845                 context->gva_to_gpa = paging64_gva_to_gpa;
2846                 context->root_level = PT32E_ROOT_LEVEL;
2847         } else {
2848                 context->nx = false;
2849                 reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2850                 context->gva_to_gpa = paging32_gva_to_gpa;
2851                 context->root_level = PT32_ROOT_LEVEL;
2852         }
2853
2854         return 0;
2855 }
2856
2857 int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
2858 {
2859         int r;
2860         ASSERT(vcpu);
2861         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2862
2863         if (!is_paging(vcpu))
2864                 r = nonpaging_init_context(vcpu, context);
2865         else if (is_long_mode(vcpu))
2866                 r = paging64_init_context(vcpu, context);
2867         else if (is_pae(vcpu))
2868                 r = paging32E_init_context(vcpu, context);
2869         else
2870                 r = paging32_init_context(vcpu, context);
2871
2872         vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2873         vcpu->arch.mmu.base_role.cr0_wp  = is_write_protection(vcpu);
2874
2875         return r;
2876 }
2877 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
2878
2879 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2880 {
2881         int r = kvm_init_shadow_mmu(vcpu, vcpu->arch.walk_mmu);
2882
2883         vcpu->arch.walk_mmu->set_cr3           = kvm_x86_ops->set_cr3;
2884         vcpu->arch.walk_mmu->get_cr3           = get_cr3;
2885         vcpu->arch.walk_mmu->inject_page_fault = kvm_inject_page_fault;
2886
2887         return r;
2888 }
2889
2890 static int init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
2891 {
2892         struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
2893
2894         g_context->get_cr3           = get_cr3;
2895         g_context->inject_page_fault = kvm_inject_page_fault;
2896
2897         /*
2898          * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
2899          * translation of l2_gpa to l1_gpa addresses is done using the
2900          * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
2901          * functions between mmu and nested_mmu are swapped.
2902          */
2903         if (!is_paging(vcpu)) {
2904                 g_context->nx = false;
2905                 g_context->root_level = 0;
2906                 g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
2907         } else if (is_long_mode(vcpu)) {
2908                 g_context->nx = is_nx(vcpu);
2909                 reset_rsvds_bits_mask(vcpu, g_context, PT64_ROOT_LEVEL);
2910                 g_context->root_level = PT64_ROOT_LEVEL;
2911                 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
2912         } else if (is_pae(vcpu)) {
2913                 g_context->nx = is_nx(vcpu);
2914                 reset_rsvds_bits_mask(vcpu, g_context, PT32E_ROOT_LEVEL);
2915                 g_context->root_level = PT32E_ROOT_LEVEL;
2916                 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
2917         } else {
2918                 g_context->nx = false;
2919                 reset_rsvds_bits_mask(vcpu, g_context, PT32_ROOT_LEVEL);
2920                 g_context->root_level = PT32_ROOT_LEVEL;
2921                 g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
2922         }
2923
2924         return 0;
2925 }
2926
2927 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2928 {
2929         vcpu->arch.update_pte.pfn = bad_pfn;
2930
2931         if (mmu_is_nested(vcpu))
2932                 return init_kvm_nested_mmu(vcpu);
2933         else if (tdp_enabled)
2934                 return init_kvm_tdp_mmu(vcpu);
2935         else
2936                 return init_kvm_softmmu(vcpu);
2937 }
2938
2939 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2940 {
2941         ASSERT(vcpu);
2942         if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2943                 /* mmu.free() should set root_hpa = INVALID_PAGE */
2944                 vcpu->arch.mmu.free(vcpu);
2945 }
2946
2947 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2948 {
2949         destroy_kvm_mmu(vcpu);
2950         return init_kvm_mmu(vcpu);
2951 }
2952 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2953
2954 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2955 {
2956         int r;
2957
2958         r = mmu_topup_memory_caches(vcpu);
2959         if (r)
2960                 goto out;
2961         r = mmu_alloc_roots(vcpu);
2962         spin_lock(&vcpu->kvm->mmu_lock);
2963         mmu_sync_roots(vcpu);
2964         spin_unlock(&vcpu->kvm->mmu_lock);
2965         if (r)
2966                 goto out;
2967         /* set_cr3() should ensure TLB has been flushed */
2968         vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2969 out:
2970         return r;
2971 }
2972 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2973
2974 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2975 {
2976         mmu_free_roots(vcpu);
2977 }
2978 EXPORT_SYMBOL_GPL(kvm_mmu_unload);
2979
2980 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2981                                   struct kvm_mmu_page *sp,
2982                                   u64 *spte)
2983 {
2984         u64 pte;
2985         struct kvm_mmu_page *child;
2986
2987         pte = *spte;
2988         if (is_shadow_present_pte(pte)) {
2989                 if (is_last_spte(pte, sp->role.level))
2990                         drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2991                 else {
2992                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2993                         mmu_page_remove_parent_pte(child, spte);
2994                 }
2995         }
2996         __set_spte(spte, shadow_trap_nonpresent_pte);
2997         if (is_large_pte(pte))
2998                 --vcpu->kvm->stat.lpages;
2999 }
3000
3001 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
3002                                   struct kvm_mmu_page *sp,
3003                                   u64 *spte,
3004                                   const void *new)
3005 {
3006         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
3007                 ++vcpu->kvm->stat.mmu_pde_zapped;
3008                 return;
3009         }
3010
3011         if (is_rsvd_bits_set(&vcpu->arch.mmu, *(u64 *)new, PT_PAGE_TABLE_LEVEL))
3012                 return;
3013
3014         ++vcpu->kvm->stat.mmu_pte_updated;
3015         if (!sp->role.cr4_pae)
3016                 paging32_update_pte(vcpu, sp, spte, new);
3017         else
3018                 paging64_update_pte(vcpu, sp, spte, new);
3019 }
3020
3021 static bool need_remote_flush(u64 old, u64 new)
3022 {
3023         if (!is_shadow_present_pte(old))
3024                 return false;
3025         if (!is_shadow_present_pte(new))
3026                 return true;
3027         if ((old ^ new) & PT64_BASE_ADDR_MASK)
3028                 return true;
3029         old ^= PT64_NX_MASK;
3030         new ^= PT64_NX_MASK;
3031         return (old & ~new & PT64_PERM_MASK) != 0;
3032 }
3033
3034 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
3035                                     bool remote_flush, bool local_flush)
3036 {
3037         if (zap_page)
3038                 return;
3039
3040         if (remote_flush)
3041                 kvm_flush_remote_tlbs(vcpu->kvm);
3042         else if (local_flush)
3043                 kvm_mmu_flush_tlb(vcpu);
3044 }
3045
3046 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
3047 {
3048         u64 *spte = vcpu->arch.last_pte_updated;
3049
3050         return !!(spte && (*spte & shadow_accessed_mask));
3051 }
3052
3053 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3054                                           u64 gpte)
3055 {
3056         gfn_t gfn;
3057         pfn_t pfn;
3058
3059         if (!is_present_gpte(gpte))
3060                 return;
3061         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
3062
3063         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
3064         smp_rmb();
3065         pfn = gfn_to_pfn(vcpu->kvm, gfn);
3066
3067         if (is_error_pfn(pfn)) {
3068                 kvm_release_pfn_clean(pfn);
3069                 return;
3070         }
3071         vcpu->arch.update_pte.gfn = gfn;
3072         vcpu->arch.update_pte.pfn = pfn;
3073 }
3074
3075 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
3076 {
3077         u64 *spte = vcpu->arch.last_pte_updated;
3078
3079         if (spte
3080             && vcpu->arch.last_pte_gfn == gfn
3081             && shadow_accessed_mask
3082             && !(*spte & shadow_accessed_mask)
3083             && is_shadow_present_pte(*spte))
3084                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
3085 }
3086
3087 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3088                        const u8 *new, int bytes,
3089                        bool guest_initiated)
3090 {
3091         gfn_t gfn = gpa >> PAGE_SHIFT;
3092         union kvm_mmu_page_role mask = { .word = 0 };
3093         struct kvm_mmu_page *sp;
3094         struct hlist_node *node;
3095         LIST_HEAD(invalid_list);
3096         u64 entry, gentry;
3097         u64 *spte;
3098         unsigned offset = offset_in_page(gpa);
3099         unsigned pte_size;
3100         unsigned page_offset;
3101         unsigned misaligned;
3102         unsigned quadrant;
3103         int level;
3104         int flooded = 0;
3105         int npte;
3106         int r;
3107         int invlpg_counter;
3108         bool remote_flush, local_flush, zap_page;
3109
3110         zap_page = remote_flush = local_flush = false;
3111
3112         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
3113
3114         invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
3115
3116         /*
3117          * Assume that the pte write on a page table of the same type
3118          * as the current vcpu paging mode.  This is nearly always true
3119          * (might be false while changing modes).  Note it is verified later
3120          * by update_pte().
3121          */
3122         if ((is_pae(vcpu) && bytes == 4) || !new) {
3123                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3124                 if (is_pae(vcpu)) {
3125                         gpa &= ~(gpa_t)7;
3126                         bytes = 8;
3127                 }
3128                 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
3129                 if (r)
3130                         gentry = 0;
3131                 new = (const u8 *)&gentry;
3132         }
3133
3134         switch (bytes) {
3135         case 4:
3136                 gentry = *(const u32 *)new;
3137                 break;
3138         case 8:
3139                 gentry = *(const u64 *)new;
3140                 break;
3141         default:
3142                 gentry = 0;
3143                 break;
3144         }
3145
3146         mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
3147         spin_lock(&vcpu->kvm->mmu_lock);
3148         if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
3149                 gentry = 0;
3150         kvm_mmu_access_page(vcpu, gfn);
3151         kvm_mmu_free_some_pages(vcpu);
3152         ++vcpu->kvm->stat.mmu_pte_write;
3153         trace_kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
3154         if (guest_initiated) {
3155                 if (gfn == vcpu->arch.last_pt_write_gfn
3156                     && !last_updated_pte_accessed(vcpu)) {
3157                         ++vcpu->arch.last_pt_write_count;
3158                         if (vcpu->arch.last_pt_write_count >= 3)
3159                                 flooded = 1;
3160                 } else {
3161                         vcpu->arch.last_pt_write_gfn = gfn;
3162                         vcpu->arch.last_pt_write_count = 1;
3163                         vcpu->arch.last_pte_updated = NULL;
3164                 }
3165         }
3166
3167         mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
3168         for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
3169                 pte_size = sp->role.cr4_pae ? 8 : 4;
3170                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
3171                 misaligned |= bytes < 4;
3172                 if (misaligned || flooded) {
3173                         /*
3174                          * Misaligned accesses are too much trouble to fix
3175                          * up; also, they usually indicate a page is not used
3176                          * as a page table.
3177                          *
3178                          * If we're seeing too many writes to a page,
3179                          * it may no longer be a page table, or we may be
3180                          * forking, in which case it is better to unmap the
3181                          * page.
3182                          */
3183                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3184                                  gpa, bytes, sp->role.word);
3185                         zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
3186                                                      &invalid_list);
3187                         ++vcpu->kvm->stat.mmu_flooded;
3188                         continue;
3189                 }
3190                 page_offset = offset;
3191                 level = sp->role.level;
3192                 npte = 1;
3193                 if (!sp->role.cr4_pae) {
3194                         page_offset <<= 1;      /* 32->64 */
3195                         /*
3196                          * A 32-bit pde maps 4MB while the shadow pdes map
3197                          * only 2MB.  So we need to double the offset again
3198                          * and zap two pdes instead of one.
3199                          */
3200                         if (level == PT32_ROOT_LEVEL) {
3201                                 page_offset &= ~7; /* kill rounding error */
3202                                 page_offset <<= 1;
3203                                 npte = 2;
3204                         }
3205                         quadrant = page_offset >> PAGE_SHIFT;
3206                         page_offset &= ~PAGE_MASK;
3207                         if (quadrant != sp->role.quadrant)
3208                                 continue;
3209                 }
3210                 local_flush = true;
3211                 spte = &sp->spt[page_offset / sizeof(*spte)];
3212                 while (npte--) {
3213                         entry = *spte;
3214                         mmu_pte_write_zap_pte(vcpu, sp, spte);
3215                         if (gentry &&
3216                               !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
3217                               & mask.word))
3218                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
3219                         if (!remote_flush && need_remote_flush(entry, *spte))
3220                                 remote_flush = true;
3221                         ++spte;
3222                 }
3223         }
3224         mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
3225         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3226         trace_kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE);
3227         spin_unlock(&vcpu->kvm->mmu_lock);
3228         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
3229                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
3230                 vcpu->arch.update_pte.pfn = bad_pfn;
3231         }
3232 }
3233
3234 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
3235 {
3236         gpa_t gpa;
3237         int r;
3238
3239         if (vcpu->arch.mmu.direct_map)
3240                 return 0;
3241
3242         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
3243
3244         spin_lock(&vcpu->kvm->mmu_lock);
3245         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3246         spin_unlock(&vcpu->kvm->mmu_lock);
3247         return r;
3248 }
3249 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
3250
3251 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
3252 {
3253         LIST_HEAD(invalid_list);
3254
3255         while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES &&
3256                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
3257                 struct kvm_mmu_page *sp;
3258
3259                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
3260                                   struct kvm_mmu_page, link);
3261                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
3262                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3263                 ++vcpu->kvm->stat.mmu_recycled;
3264         }
3265 }
3266
3267 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
3268 {
3269         int r;
3270         enum emulation_result er;
3271
3272         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3273         if (r < 0)
3274                 goto out;
3275
3276         if (!r) {
3277                 r = 1;
3278                 goto out;
3279         }
3280
3281         r = mmu_topup_memory_caches(vcpu);
3282         if (r)
3283                 goto out;
3284
3285         er = emulate_instruction(vcpu, cr2, error_code, 0);
3286
3287         switch (er) {
3288         case EMULATE_DONE:
3289                 return 1;
3290         case EMULATE_DO_MMIO:
3291                 ++vcpu->stat.mmio_exits;
3292                 /* fall through */
3293         case EMULATE_FAIL:
3294                 return 0;
3295         default:
3296                 BUG();
3297         }
3298 out:
3299         return r;
3300 }
3301 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
3302
3303 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
3304 {
3305         vcpu->arch.mmu.invlpg(vcpu, gva);
3306         kvm_mmu_flush_tlb(vcpu);
3307         ++vcpu->stat.invlpg;
3308 }
3309 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
3310
3311 void kvm_enable_tdp(void)
3312 {
3313         tdp_enabled = true;
3314 }
3315 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3316
3317 void kvm_disable_tdp(void)
3318 {
3319         tdp_enabled = false;
3320 }
3321 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3322
3323 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3324 {
3325         free_page((unsigned long)vcpu->arch.mmu.pae_root);
3326         if (vcpu->arch.mmu.lm_root != NULL)
3327                 free_page((unsigned long)vcpu->arch.mmu.lm_root);
3328 }
3329
3330 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3331 {
3332         struct page *page;
3333         int i;
3334
3335         ASSERT(vcpu);
3336
3337         /*
3338          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3339          * Therefore we need to allocate shadow page tables in the first
3340          * 4GB of memory, which happens to fit the DMA32 zone.
3341          */
3342         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3343         if (!page)
3344                 return -ENOMEM;
3345
3346         vcpu->arch.mmu.pae_root = page_address(page);
3347         for (i = 0; i < 4; ++i)
3348                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3349
3350         return 0;
3351 }
3352
3353 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3354 {
3355         ASSERT(vcpu);
3356         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3357
3358         return alloc_mmu_pages(vcpu);
3359 }
3360
3361 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3362 {
3363         ASSERT(vcpu);
3364         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3365
3366         return init_kvm_mmu(vcpu);
3367 }
3368
3369 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3370 {
3371         struct kvm_mmu_page *sp;
3372
3373         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3374                 int i;
3375                 u64 *pt;
3376
3377                 if (!test_bit(slot, sp->slot_bitmap))
3378                         continue;
3379
3380                 pt = sp->spt;
3381                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3382                         /* avoid RMW */
3383                         if (is_writable_pte(pt[i]))
3384                                 pt[i] &= ~PT_WRITABLE_MASK;
3385         }
3386         kvm_flush_remote_tlbs(kvm);
3387 }
3388
3389 void kvm_mmu_zap_all(struct kvm *kvm)
3390 {
3391         struct kvm_mmu_page *sp, *node;
3392         LIST_HEAD(invalid_list);
3393
3394         spin_lock(&kvm->mmu_lock);
3395 restart:
3396         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3397                 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3398                         goto restart;
3399
3400         kvm_mmu_commit_zap_page(kvm, &invalid_list);
3401         spin_unlock(&kvm->mmu_lock);
3402 }
3403
3404 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3405                                                struct list_head *invalid_list)
3406 {
3407         struct kvm_mmu_page *page;
3408
3409         page = container_of(kvm->arch.active_mmu_pages.prev,
3410                             struct kvm_mmu_page, link);
3411         return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3412 }
3413
3414 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3415 {
3416         struct kvm *kvm;
3417         struct kvm *kvm_freed = NULL;
3418
3419         if (nr_to_scan == 0)
3420                 goto out;
3421
3422         spin_lock(&kvm_lock);
3423
3424         list_for_each_entry(kvm, &vm_list, vm_list) {
3425                 int idx, freed_pages;
3426                 LIST_HEAD(invalid_list);
3427
3428                 idx = srcu_read_lock(&kvm->srcu);
3429                 spin_lock(&kvm->mmu_lock);
3430                 if (!kvm_freed && nr_to_scan > 0 &&
3431                     kvm->arch.n_used_mmu_pages > 0) {
3432                         freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3433                                                           &invalid_list);
3434                         kvm_freed = kvm;
3435                 }
3436                 nr_to_scan--;
3437
3438                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3439                 spin_unlock(&kvm->mmu_lock);
3440                 srcu_read_unlock(&kvm->srcu, idx);
3441         }
3442         if (kvm_freed)
3443                 list_move_tail(&kvm_freed->vm_list, &vm_list);
3444
3445         spin_unlock(&kvm_lock);
3446
3447 out:
3448         return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
3449 }
3450
3451 static struct shrinker mmu_shrinker = {
3452         .shrink = mmu_shrink,
3453         .seeks = DEFAULT_SEEKS * 10,
3454 };
3455
3456 static void mmu_destroy_caches(void)
3457 {
3458         if (pte_chain_cache)
3459                 kmem_cache_destroy(pte_chain_cache);
3460         if (rmap_desc_cache)
3461                 kmem_cache_destroy(rmap_desc_cache);
3462         if (mmu_page_header_cache)
3463                 kmem_cache_destroy(mmu_page_header_cache);
3464 }
3465
3466 void kvm_mmu_module_exit(void)
3467 {
3468         mmu_destroy_caches();
3469         percpu_counter_destroy(&kvm_total_used_mmu_pages);
3470         unregister_shrinker(&mmu_shrinker);
3471 }
3472
3473 int kvm_mmu_module_init(void)
3474 {
3475         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3476                                             sizeof(struct kvm_pte_chain),
3477                                             0, 0, NULL);
3478         if (!pte_chain_cache)
3479                 goto nomem;
3480         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3481                                             sizeof(struct kvm_rmap_desc),
3482                                             0, 0, NULL);
3483         if (!rmap_desc_cache)
3484                 goto nomem;
3485
3486         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3487                                                   sizeof(struct kvm_mmu_page),
3488                                                   0, 0, NULL);
3489         if (!mmu_page_header_cache)
3490                 goto nomem;
3491
3492         if (percpu_counter_init(&kvm_total_used_mmu_pages, 0))
3493                 goto nomem;
3494
3495         register_shrinker(&mmu_shrinker);
3496
3497         return 0;
3498
3499 nomem:
3500         mmu_destroy_caches();
3501         return -ENOMEM;
3502 }
3503
3504 /*
3505  * Caculate mmu pages needed for kvm.
3506  */
3507 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3508 {
3509         int i;
3510         unsigned int nr_mmu_pages;
3511         unsigned int  nr_pages = 0;
3512         struct kvm_memslots *slots;
3513
3514         slots = kvm_memslots(kvm);
3515
3516         for (i = 0; i < slots->nmemslots; i++)
3517                 nr_pages += slots->memslots[i].npages;
3518
3519         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3520         nr_mmu_pages = max(nr_mmu_pages,
3521                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3522
3523         return nr_mmu_pages;
3524 }
3525
3526 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3527                                 unsigned len)
3528 {
3529         if (len > buffer->len)
3530                 return NULL;
3531         return buffer->ptr;
3532 }
3533
3534 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3535                                 unsigned len)
3536 {
3537         void *ret;
3538
3539         ret = pv_mmu_peek_buffer(buffer, len);
3540         if (!ret)
3541                 return ret;
3542         buffer->ptr += len;
3543         buffer->len -= len;
3544         buffer->processed += len;
3545         return ret;
3546 }
3547
3548 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3549                              gpa_t addr, gpa_t value)
3550 {
3551         int bytes = 8;
3552         int r;
3553
3554         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3555                 bytes = 4;
3556
3557         r = mmu_topup_memory_caches(vcpu);
3558         if (r)
3559                 return r;
3560
3561         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3562                 return -EFAULT;
3563
3564         return 1;
3565 }
3566
3567 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3568 {
3569         (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3570         return 1;
3571 }
3572
3573 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3574 {
3575         spin_lock(&vcpu->kvm->mmu_lock);
3576         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3577         spin_unlock(&vcpu->kvm->mmu_lock);
3578         return 1;
3579 }
3580
3581 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3582                              struct kvm_pv_mmu_op_buffer *buffer)
3583 {
3584         struct kvm_mmu_op_header *header;
3585
3586         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3587         if (!header)
3588                 return 0;
3589         switch (header->op) {
3590         case KVM_MMU_OP_WRITE_PTE: {
3591                 struct kvm_mmu_op_write_pte *wpte;
3592
3593                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3594                 if (!wpte)
3595                         return 0;
3596                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3597                                         wpte->pte_val);
3598         }
3599         case KVM_MMU_OP_FLUSH_TLB: {
3600                 struct kvm_mmu_op_flush_tlb *ftlb;
3601
3602                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3603                 if (!ftlb)
3604                         return 0;
3605                 return kvm_pv_mmu_flush_tlb(vcpu);
3606         }
3607         case KVM_MMU_OP_RELEASE_PT: {
3608                 struct kvm_mmu_op_release_pt *rpt;
3609
3610                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3611                 if (!rpt)
3612                         return 0;
3613                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3614         }
3615         default: return 0;
3616         }
3617 }
3618
3619 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3620                   gpa_t addr, unsigned long *ret)
3621 {
3622         int r;
3623         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3624
3625         buffer->ptr = buffer->buf;
3626         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3627         buffer->processed = 0;
3628
3629         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3630         if (r)
3631                 goto out;
3632
3633         while (buffer->len) {
3634                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3635                 if (r < 0)
3636                         goto out;
3637                 if (r == 0)
3638                         break;
3639         }
3640
3641         r = 1;
3642 out:
3643         *ret = buffer->processed;
3644         return r;
3645 }
3646
3647 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3648 {
3649         struct kvm_shadow_walk_iterator iterator;
3650         int nr_sptes = 0;
3651
3652         spin_lock(&vcpu->kvm->mmu_lock);
3653         for_each_shadow_entry(vcpu, addr, iterator) {
3654                 sptes[iterator.level-1] = *iterator.sptep;
3655                 nr_sptes++;
3656                 if (!is_shadow_present_pte(*iterator.sptep))
3657                         break;
3658         }
3659         spin_unlock(&vcpu->kvm->mmu_lock);
3660
3661         return nr_sptes;
3662 }
3663 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3664
3665 #ifdef CONFIG_KVM_MMU_AUDIT
3666 #include "mmu_audit.c"
3667 #else
3668 static void mmu_audit_disable(void) { }
3669 #endif
3670
3671 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3672 {
3673         ASSERT(vcpu);
3674
3675         destroy_kvm_mmu(vcpu);
3676         free_mmu_pages(vcpu);
3677         mmu_free_memory_caches(vcpu);
3678         mmu_audit_disable();
3679 }