2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
22 #include "kvm_cache_regs.h"
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
34 #include <linux/slab.h>
35 #include <linux/uaccess.h>
38 #include <asm/cmpxchg.h>
43 * When setting this variable to true it enables Two-Dimensional-Paging
44 * where the hardware walks 2 page tables:
45 * 1. the guest-virtual to guest-physical
46 * 2. while doing 1. it walks guest-physical to host-physical
47 * If the hardware supports that we don't need to do shadow paging.
49 bool tdp_enabled = false;
56 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
58 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
63 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
64 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
68 #define pgprintk(x...) do { } while (0)
69 #define rmap_printk(x...) do { } while (0)
73 #if defined(MMU_DEBUG) || defined(AUDIT)
75 module_param(dbg, bool, 0644);
78 static int oos_shadow = 1;
79 module_param(oos_shadow, bool, 0644);
82 #define ASSERT(x) do { } while (0)
86 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
87 __FILE__, __LINE__, #x); \
91 #define PT_FIRST_AVAIL_BITS_SHIFT 9
92 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
94 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
96 #define PT64_LEVEL_BITS 9
98 #define PT64_LEVEL_SHIFT(level) \
99 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
101 #define PT64_LEVEL_MASK(level) \
102 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
104 #define PT64_INDEX(address, level)\
105 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
108 #define PT32_LEVEL_BITS 10
110 #define PT32_LEVEL_SHIFT(level) \
111 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
113 #define PT32_LEVEL_MASK(level) \
114 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
115 #define PT32_LVL_OFFSET_MASK(level) \
116 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
117 * PT32_LEVEL_BITS))) - 1))
119 #define PT32_INDEX(address, level)\
120 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
123 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
124 #define PT64_DIR_BASE_ADDR_MASK \
125 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
126 #define PT64_LVL_ADDR_MASK(level) \
127 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
128 * PT64_LEVEL_BITS))) - 1))
129 #define PT64_LVL_OFFSET_MASK(level) \
130 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
131 * PT64_LEVEL_BITS))) - 1))
133 #define PT32_BASE_ADDR_MASK PAGE_MASK
134 #define PT32_DIR_BASE_ADDR_MASK \
135 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
136 #define PT32_LVL_ADDR_MASK(level) \
137 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
138 * PT32_LEVEL_BITS))) - 1))
140 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
145 #define ACC_EXEC_MASK 1
146 #define ACC_WRITE_MASK PT_WRITABLE_MASK
147 #define ACC_USER_MASK PT_USER_MASK
148 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
150 #include <trace/events/kvm.h>
152 #define CREATE_TRACE_POINTS
153 #include "mmutrace.h"
155 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
157 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
159 struct kvm_rmap_desc {
160 u64 *sptes[RMAP_EXT];
161 struct kvm_rmap_desc *more;
164 struct kvm_shadow_walk_iterator {
172 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
173 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
174 shadow_walk_okay(&(_walker)); \
175 shadow_walk_next(&(_walker)))
177 typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp);
179 static struct kmem_cache *pte_chain_cache;
180 static struct kmem_cache *rmap_desc_cache;
181 static struct kmem_cache *mmu_page_header_cache;
183 static u64 __read_mostly shadow_trap_nonpresent_pte;
184 static u64 __read_mostly shadow_notrap_nonpresent_pte;
185 static u64 __read_mostly shadow_base_present_pte;
186 static u64 __read_mostly shadow_nx_mask;
187 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
188 static u64 __read_mostly shadow_user_mask;
189 static u64 __read_mostly shadow_accessed_mask;
190 static u64 __read_mostly shadow_dirty_mask;
192 static inline u64 rsvd_bits(int s, int e)
194 return ((1ULL << (e - s + 1)) - 1) << s;
197 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
199 shadow_trap_nonpresent_pte = trap_pte;
200 shadow_notrap_nonpresent_pte = notrap_pte;
202 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
204 void kvm_mmu_set_base_ptes(u64 base_pte)
206 shadow_base_present_pte = base_pte;
208 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
210 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
211 u64 dirty_mask, u64 nx_mask, u64 x_mask)
213 shadow_user_mask = user_mask;
214 shadow_accessed_mask = accessed_mask;
215 shadow_dirty_mask = dirty_mask;
216 shadow_nx_mask = nx_mask;
217 shadow_x_mask = x_mask;
219 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
221 static bool is_write_protection(struct kvm_vcpu *vcpu)
223 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
226 static int is_cpuid_PSE36(void)
231 static int is_nx(struct kvm_vcpu *vcpu)
233 return vcpu->arch.efer & EFER_NX;
236 static int is_shadow_present_pte(u64 pte)
238 return pte != shadow_trap_nonpresent_pte
239 && pte != shadow_notrap_nonpresent_pte;
242 static int is_large_pte(u64 pte)
244 return pte & PT_PAGE_SIZE_MASK;
247 static int is_writable_pte(unsigned long pte)
249 return pte & PT_WRITABLE_MASK;
252 static int is_dirty_gpte(unsigned long pte)
254 return pte & PT_DIRTY_MASK;
257 static int is_rmap_spte(u64 pte)
259 return is_shadow_present_pte(pte);
262 static int is_last_spte(u64 pte, int level)
264 if (level == PT_PAGE_TABLE_LEVEL)
266 if (is_large_pte(pte))
271 static pfn_t spte_to_pfn(u64 pte)
273 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
276 static gfn_t pse36_gfn_delta(u32 gpte)
278 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
280 return (gpte & PT32_DIR_PSE36_MASK) << shift;
283 static void __set_spte(u64 *sptep, u64 spte)
286 set_64bit((unsigned long *)sptep, spte);
288 set_64bit((unsigned long long *)sptep, spte);
292 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
293 struct kmem_cache *base_cache, int min)
297 if (cache->nobjs >= min)
299 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
300 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
303 cache->objects[cache->nobjs++] = obj;
308 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
309 struct kmem_cache *cache)
312 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
315 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
320 if (cache->nobjs >= min)
322 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
323 page = alloc_page(GFP_KERNEL);
326 cache->objects[cache->nobjs++] = page_address(page);
331 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
334 free_page((unsigned long)mc->objects[--mc->nobjs]);
337 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
341 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
345 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
349 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
352 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
353 mmu_page_header_cache, 4);
358 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
360 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
361 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
362 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
363 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
364 mmu_page_header_cache);
367 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
373 p = mc->objects[--mc->nobjs];
377 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
379 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
380 sizeof(struct kvm_pte_chain));
383 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
385 kmem_cache_free(pte_chain_cache, pc);
388 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
390 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
391 sizeof(struct kvm_rmap_desc));
394 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
396 kmem_cache_free(rmap_desc_cache, rd);
400 * Return the pointer to the largepage write count for a given
401 * gfn, handling slots that are not large page aligned.
403 static int *slot_largepage_idx(gfn_t gfn,
404 struct kvm_memory_slot *slot,
409 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
410 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
411 return &slot->lpage_info[level - 2][idx].write_count;
414 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
416 struct kvm_memory_slot *slot;
420 gfn = unalias_gfn(kvm, gfn);
422 slot = gfn_to_memslot_unaliased(kvm, gfn);
423 for (i = PT_DIRECTORY_LEVEL;
424 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
425 write_count = slot_largepage_idx(gfn, slot, i);
430 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
432 struct kvm_memory_slot *slot;
436 gfn = unalias_gfn(kvm, gfn);
437 slot = gfn_to_memslot_unaliased(kvm, gfn);
438 for (i = PT_DIRECTORY_LEVEL;
439 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
440 write_count = slot_largepage_idx(gfn, slot, i);
442 WARN_ON(*write_count < 0);
446 static int has_wrprotected_page(struct kvm *kvm,
450 struct kvm_memory_slot *slot;
453 gfn = unalias_gfn(kvm, gfn);
454 slot = gfn_to_memslot_unaliased(kvm, gfn);
456 largepage_idx = slot_largepage_idx(gfn, slot, level);
457 return *largepage_idx;
463 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
465 unsigned long page_size;
468 page_size = kvm_host_page_size(kvm, gfn);
470 for (i = PT_PAGE_TABLE_LEVEL;
471 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
472 if (page_size >= KVM_HPAGE_SIZE(i))
481 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
483 struct kvm_memory_slot *slot;
484 int host_level, level, max_level;
486 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
487 if (slot && slot->dirty_bitmap)
488 return PT_PAGE_TABLE_LEVEL;
490 host_level = host_mapping_level(vcpu->kvm, large_gfn);
492 if (host_level == PT_PAGE_TABLE_LEVEL)
495 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
496 kvm_x86_ops->get_lpage_level() : host_level;
498 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
499 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
506 * Take gfn and return the reverse mapping to it.
507 * Note: gfn must be unaliased before this function get called
510 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
512 struct kvm_memory_slot *slot;
515 slot = gfn_to_memslot(kvm, gfn);
516 if (likely(level == PT_PAGE_TABLE_LEVEL))
517 return &slot->rmap[gfn - slot->base_gfn];
519 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
520 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
522 return &slot->lpage_info[level - 2][idx].rmap_pde;
526 * Reverse mapping data structures:
528 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
529 * that points to page_address(page).
531 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
532 * containing more mappings.
534 * Returns the number of rmap entries before the spte was added or zero if
535 * the spte was not added.
538 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
540 struct kvm_mmu_page *sp;
541 struct kvm_rmap_desc *desc;
542 unsigned long *rmapp;
545 if (!is_rmap_spte(*spte))
547 gfn = unalias_gfn(vcpu->kvm, gfn);
548 sp = page_header(__pa(spte));
549 sp->gfns[spte - sp->spt] = gfn;
550 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
552 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
553 *rmapp = (unsigned long)spte;
554 } else if (!(*rmapp & 1)) {
555 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
556 desc = mmu_alloc_rmap_desc(vcpu);
557 desc->sptes[0] = (u64 *)*rmapp;
558 desc->sptes[1] = spte;
559 *rmapp = (unsigned long)desc | 1;
561 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
562 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
563 while (desc->sptes[RMAP_EXT-1] && desc->more) {
567 if (desc->sptes[RMAP_EXT-1]) {
568 desc->more = mmu_alloc_rmap_desc(vcpu);
571 for (i = 0; desc->sptes[i]; ++i)
573 desc->sptes[i] = spte;
578 static void rmap_desc_remove_entry(unsigned long *rmapp,
579 struct kvm_rmap_desc *desc,
581 struct kvm_rmap_desc *prev_desc)
585 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
587 desc->sptes[i] = desc->sptes[j];
588 desc->sptes[j] = NULL;
591 if (!prev_desc && !desc->more)
592 *rmapp = (unsigned long)desc->sptes[0];
595 prev_desc->more = desc->more;
597 *rmapp = (unsigned long)desc->more | 1;
598 mmu_free_rmap_desc(desc);
601 static void rmap_remove(struct kvm *kvm, u64 *spte)
603 struct kvm_rmap_desc *desc;
604 struct kvm_rmap_desc *prev_desc;
605 struct kvm_mmu_page *sp;
607 unsigned long *rmapp;
610 if (!is_rmap_spte(*spte))
612 sp = page_header(__pa(spte));
613 pfn = spte_to_pfn(*spte);
614 if (*spte & shadow_accessed_mask)
615 kvm_set_pfn_accessed(pfn);
616 if (is_writable_pte(*spte))
617 kvm_set_pfn_dirty(pfn);
618 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
620 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
622 } else if (!(*rmapp & 1)) {
623 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
624 if ((u64 *)*rmapp != spte) {
625 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
631 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
632 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
635 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
636 if (desc->sptes[i] == spte) {
637 rmap_desc_remove_entry(rmapp,
645 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
650 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
652 struct kvm_rmap_desc *desc;
658 else if (!(*rmapp & 1)) {
660 return (u64 *)*rmapp;
663 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
666 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
667 if (prev_spte == spte)
668 return desc->sptes[i];
669 prev_spte = desc->sptes[i];
676 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
678 unsigned long *rmapp;
680 int i, write_protected = 0;
682 gfn = unalias_gfn(kvm, gfn);
683 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
685 spte = rmap_next(kvm, rmapp, NULL);
688 BUG_ON(!(*spte & PT_PRESENT_MASK));
689 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
690 if (is_writable_pte(*spte)) {
691 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
694 spte = rmap_next(kvm, rmapp, spte);
696 if (write_protected) {
699 spte = rmap_next(kvm, rmapp, NULL);
700 pfn = spte_to_pfn(*spte);
701 kvm_set_pfn_dirty(pfn);
704 /* check for huge page mappings */
705 for (i = PT_DIRECTORY_LEVEL;
706 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
707 rmapp = gfn_to_rmap(kvm, gfn, i);
708 spte = rmap_next(kvm, rmapp, NULL);
711 BUG_ON(!(*spte & PT_PRESENT_MASK));
712 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
713 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
714 if (is_writable_pte(*spte)) {
715 rmap_remove(kvm, spte);
717 __set_spte(spte, shadow_trap_nonpresent_pte);
721 spte = rmap_next(kvm, rmapp, spte);
725 return write_protected;
728 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
732 int need_tlb_flush = 0;
734 while ((spte = rmap_next(kvm, rmapp, NULL))) {
735 BUG_ON(!(*spte & PT_PRESENT_MASK));
736 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
737 rmap_remove(kvm, spte);
738 __set_spte(spte, shadow_trap_nonpresent_pte);
741 return need_tlb_flush;
744 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
749 pte_t *ptep = (pte_t *)data;
752 WARN_ON(pte_huge(*ptep));
753 new_pfn = pte_pfn(*ptep);
754 spte = rmap_next(kvm, rmapp, NULL);
756 BUG_ON(!is_shadow_present_pte(*spte));
757 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
759 if (pte_write(*ptep)) {
760 rmap_remove(kvm, spte);
761 __set_spte(spte, shadow_trap_nonpresent_pte);
762 spte = rmap_next(kvm, rmapp, NULL);
764 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
765 new_spte |= (u64)new_pfn << PAGE_SHIFT;
767 new_spte &= ~PT_WRITABLE_MASK;
768 new_spte &= ~SPTE_HOST_WRITEABLE;
769 if (is_writable_pte(*spte))
770 kvm_set_pfn_dirty(spte_to_pfn(*spte));
771 __set_spte(spte, new_spte);
772 spte = rmap_next(kvm, rmapp, spte);
776 kvm_flush_remote_tlbs(kvm);
781 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
783 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
789 struct kvm_memslots *slots;
791 slots = kvm_memslots(kvm);
793 for (i = 0; i < slots->nmemslots; i++) {
794 struct kvm_memory_slot *memslot = &slots->memslots[i];
795 unsigned long start = memslot->userspace_addr;
798 end = start + (memslot->npages << PAGE_SHIFT);
799 if (hva >= start && hva < end) {
800 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
802 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
804 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
805 int idx = gfn_offset;
806 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
808 &memslot->lpage_info[j][idx].rmap_pde,
811 trace_kvm_age_page(hva, memslot, ret);
819 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
821 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
824 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
826 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
829 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
836 * Emulate the accessed bit for EPT, by checking if this page has
837 * an EPT mapping, and clearing it if it does. On the next access,
838 * a new EPT mapping will be established.
839 * This has some overhead, but not as much as the cost of swapping
840 * out actively used pages or breaking up actively used hugepages.
842 if (!shadow_accessed_mask)
843 return kvm_unmap_rmapp(kvm, rmapp, data);
845 spte = rmap_next(kvm, rmapp, NULL);
849 BUG_ON(!(_spte & PT_PRESENT_MASK));
850 _young = _spte & PT_ACCESSED_MASK;
853 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
855 spte = rmap_next(kvm, rmapp, spte);
860 #define RMAP_RECYCLE_THRESHOLD 1000
862 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
864 unsigned long *rmapp;
865 struct kvm_mmu_page *sp;
867 sp = page_header(__pa(spte));
869 gfn = unalias_gfn(vcpu->kvm, gfn);
870 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
872 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
873 kvm_flush_remote_tlbs(vcpu->kvm);
876 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
878 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
882 static int is_empty_shadow_page(u64 *spt)
887 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
888 if (is_shadow_present_pte(*pos)) {
889 printk(KERN_ERR "%s: %p %llx\n", __func__,
897 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
899 ASSERT(is_empty_shadow_page(sp->spt));
901 __free_page(virt_to_page(sp->spt));
902 __free_page(virt_to_page(sp->gfns));
903 kmem_cache_free(mmu_page_header_cache, sp);
904 ++kvm->arch.n_free_mmu_pages;
907 static unsigned kvm_page_table_hashfn(gfn_t gfn)
909 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
912 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
915 struct kvm_mmu_page *sp;
917 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
918 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
919 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
920 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
921 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
922 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
924 sp->parent_pte = parent_pte;
925 --vcpu->kvm->arch.n_free_mmu_pages;
929 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
930 struct kvm_mmu_page *sp, u64 *parent_pte)
932 struct kvm_pte_chain *pte_chain;
933 struct hlist_node *node;
938 if (!sp->multimapped) {
939 u64 *old = sp->parent_pte;
942 sp->parent_pte = parent_pte;
946 pte_chain = mmu_alloc_pte_chain(vcpu);
947 INIT_HLIST_HEAD(&sp->parent_ptes);
948 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
949 pte_chain->parent_ptes[0] = old;
951 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
952 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
954 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
955 if (!pte_chain->parent_ptes[i]) {
956 pte_chain->parent_ptes[i] = parent_pte;
960 pte_chain = mmu_alloc_pte_chain(vcpu);
962 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
963 pte_chain->parent_ptes[0] = parent_pte;
966 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
969 struct kvm_pte_chain *pte_chain;
970 struct hlist_node *node;
973 if (!sp->multimapped) {
974 BUG_ON(sp->parent_pte != parent_pte);
975 sp->parent_pte = NULL;
978 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
979 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
980 if (!pte_chain->parent_ptes[i])
982 if (pte_chain->parent_ptes[i] != parent_pte)
984 while (i + 1 < NR_PTE_CHAIN_ENTRIES
985 && pte_chain->parent_ptes[i + 1]) {
986 pte_chain->parent_ptes[i]
987 = pte_chain->parent_ptes[i + 1];
990 pte_chain->parent_ptes[i] = NULL;
992 hlist_del(&pte_chain->link);
993 mmu_free_pte_chain(pte_chain);
994 if (hlist_empty(&sp->parent_ptes)) {
996 sp->parent_pte = NULL;
1005 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1007 struct kvm_pte_chain *pte_chain;
1008 struct hlist_node *node;
1009 struct kvm_mmu_page *parent_sp;
1012 if (!sp->multimapped && sp->parent_pte) {
1013 parent_sp = page_header(__pa(sp->parent_pte));
1015 mmu_parent_walk(parent_sp, fn);
1018 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1019 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1020 if (!pte_chain->parent_ptes[i])
1022 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1024 mmu_parent_walk(parent_sp, fn);
1028 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1031 struct kvm_mmu_page *sp = page_header(__pa(spte));
1033 index = spte - sp->spt;
1034 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1035 sp->unsync_children++;
1036 WARN_ON(!sp->unsync_children);
1039 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1041 struct kvm_pte_chain *pte_chain;
1042 struct hlist_node *node;
1045 if (!sp->parent_pte)
1048 if (!sp->multimapped) {
1049 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1053 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1054 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1055 if (!pte_chain->parent_ptes[i])
1057 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1061 static int unsync_walk_fn(struct kvm_mmu_page *sp)
1063 kvm_mmu_update_parents_unsync(sp);
1067 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1069 mmu_parent_walk(sp, unsync_walk_fn);
1070 kvm_mmu_update_parents_unsync(sp);
1073 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1074 struct kvm_mmu_page *sp)
1078 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1079 sp->spt[i] = shadow_trap_nonpresent_pte;
1082 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1083 struct kvm_mmu_page *sp)
1088 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1092 #define KVM_PAGE_ARRAY_NR 16
1094 struct kvm_mmu_pages {
1095 struct mmu_page_and_offset {
1096 struct kvm_mmu_page *sp;
1098 } page[KVM_PAGE_ARRAY_NR];
1102 #define for_each_unsync_children(bitmap, idx) \
1103 for (idx = find_first_bit(bitmap, 512); \
1105 idx = find_next_bit(bitmap, 512, idx+1))
1107 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1113 for (i=0; i < pvec->nr; i++)
1114 if (pvec->page[i].sp == sp)
1117 pvec->page[pvec->nr].sp = sp;
1118 pvec->page[pvec->nr].idx = idx;
1120 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1123 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1124 struct kvm_mmu_pages *pvec)
1126 int i, ret, nr_unsync_leaf = 0;
1128 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1129 u64 ent = sp->spt[i];
1131 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1132 struct kvm_mmu_page *child;
1133 child = page_header(ent & PT64_BASE_ADDR_MASK);
1135 if (child->unsync_children) {
1136 if (mmu_pages_add(pvec, child, i))
1139 ret = __mmu_unsync_walk(child, pvec);
1141 __clear_bit(i, sp->unsync_child_bitmap);
1143 nr_unsync_leaf += ret;
1148 if (child->unsync) {
1150 if (mmu_pages_add(pvec, child, i))
1156 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1157 sp->unsync_children = 0;
1159 return nr_unsync_leaf;
1162 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1163 struct kvm_mmu_pages *pvec)
1165 if (!sp->unsync_children)
1168 mmu_pages_add(pvec, sp, 0);
1169 return __mmu_unsync_walk(sp, pvec);
1172 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1175 struct hlist_head *bucket;
1176 struct kvm_mmu_page *sp;
1177 struct hlist_node *node;
1179 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1180 index = kvm_page_table_hashfn(gfn);
1181 bucket = &kvm->arch.mmu_page_hash[index];
1182 hlist_for_each_entry(sp, node, bucket, hash_link)
1183 if (sp->gfn == gfn && !sp->role.direct
1184 && !sp->role.invalid) {
1185 pgprintk("%s: found role %x\n",
1186 __func__, sp->role.word);
1192 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1194 WARN_ON(!sp->unsync);
1195 trace_kvm_mmu_sync_page(sp);
1197 --kvm->stat.mmu_unsync;
1200 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1202 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1205 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1206 kvm_mmu_zap_page(vcpu->kvm, sp);
1211 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1212 kvm_flush_remote_tlbs(vcpu->kvm);
1213 kvm_unlink_unsync_page(vcpu->kvm, sp);
1216 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1217 kvm_mmu_zap_page(vcpu->kvm, sp);
1221 kvm_mmu_flush_tlb(vcpu);
1225 static void mmu_convert_notrap(struct kvm_mmu_page *sp);
1226 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1227 struct kvm_mmu_page *sp)
1231 ret = __kvm_sync_page(vcpu, sp, false);
1233 mmu_convert_notrap(sp);
1237 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1239 return __kvm_sync_page(vcpu, sp, true);
1242 struct mmu_page_path {
1243 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1244 unsigned int idx[PT64_ROOT_LEVEL-1];
1247 #define for_each_sp(pvec, sp, parents, i) \
1248 for (i = mmu_pages_next(&pvec, &parents, -1), \
1249 sp = pvec.page[i].sp; \
1250 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1251 i = mmu_pages_next(&pvec, &parents, i))
1253 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1254 struct mmu_page_path *parents,
1259 for (n = i+1; n < pvec->nr; n++) {
1260 struct kvm_mmu_page *sp = pvec->page[n].sp;
1262 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1263 parents->idx[0] = pvec->page[n].idx;
1267 parents->parent[sp->role.level-2] = sp;
1268 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1274 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1276 struct kvm_mmu_page *sp;
1277 unsigned int level = 0;
1280 unsigned int idx = parents->idx[level];
1282 sp = parents->parent[level];
1286 --sp->unsync_children;
1287 WARN_ON((int)sp->unsync_children < 0);
1288 __clear_bit(idx, sp->unsync_child_bitmap);
1290 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1293 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1294 struct mmu_page_path *parents,
1295 struct kvm_mmu_pages *pvec)
1297 parents->parent[parent->role.level-1] = NULL;
1301 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1302 struct kvm_mmu_page *parent)
1305 struct kvm_mmu_page *sp;
1306 struct mmu_page_path parents;
1307 struct kvm_mmu_pages pages;
1309 kvm_mmu_pages_init(parent, &parents, &pages);
1310 while (mmu_unsync_walk(parent, &pages)) {
1313 for_each_sp(pages, sp, parents, i)
1314 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1317 kvm_flush_remote_tlbs(vcpu->kvm);
1319 for_each_sp(pages, sp, parents, i) {
1320 kvm_sync_page(vcpu, sp);
1321 mmu_pages_clear_parents(&parents);
1323 cond_resched_lock(&vcpu->kvm->mmu_lock);
1324 kvm_mmu_pages_init(parent, &parents, &pages);
1328 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1336 union kvm_mmu_page_role role;
1339 struct hlist_head *bucket;
1340 struct kvm_mmu_page *sp, *unsync_sp = NULL;
1341 struct hlist_node *node, *tmp;
1343 role = vcpu->arch.mmu.base_role;
1345 role.direct = direct;
1348 role.access = access;
1349 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1350 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1351 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1352 role.quadrant = quadrant;
1354 index = kvm_page_table_hashfn(gfn);
1355 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1356 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1357 if (sp->gfn == gfn) {
1361 if (sp->role.word != role.word)
1364 if (!direct && unsync_sp &&
1365 kvm_sync_page_transient(vcpu, unsync_sp)) {
1370 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1371 if (sp->unsync_children) {
1372 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1373 kvm_mmu_mark_parents_unsync(sp);
1374 } else if (sp->unsync)
1375 kvm_mmu_mark_parents_unsync(sp);
1377 trace_kvm_mmu_get_page(sp, false);
1380 if (!direct && unsync_sp)
1381 kvm_sync_page(vcpu, unsync_sp);
1383 ++vcpu->kvm->stat.mmu_cache_miss;
1384 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1389 hlist_add_head(&sp->hash_link, bucket);
1391 if (rmap_write_protect(vcpu->kvm, gfn))
1392 kvm_flush_remote_tlbs(vcpu->kvm);
1393 account_shadowed(vcpu->kvm, gfn);
1395 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1396 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1398 nonpaging_prefetch_page(vcpu, sp);
1399 trace_kvm_mmu_get_page(sp, true);
1403 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1404 struct kvm_vcpu *vcpu, u64 addr)
1406 iterator->addr = addr;
1407 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1408 iterator->level = vcpu->arch.mmu.shadow_root_level;
1409 if (iterator->level == PT32E_ROOT_LEVEL) {
1410 iterator->shadow_addr
1411 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1412 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1414 if (!iterator->shadow_addr)
1415 iterator->level = 0;
1419 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1421 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1424 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1425 if (is_large_pte(*iterator->sptep))
1428 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1429 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1433 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1435 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1439 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1440 struct kvm_mmu_page *sp)
1448 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1451 if (is_shadow_present_pte(ent)) {
1452 if (!is_last_spte(ent, sp->role.level)) {
1453 ent &= PT64_BASE_ADDR_MASK;
1454 mmu_page_remove_parent_pte(page_header(ent),
1457 if (is_large_pte(ent))
1459 rmap_remove(kvm, &pt[i]);
1462 pt[i] = shadow_trap_nonpresent_pte;
1466 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1468 mmu_page_remove_parent_pte(sp, parent_pte);
1471 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1474 struct kvm_vcpu *vcpu;
1476 kvm_for_each_vcpu(i, vcpu, kvm)
1477 vcpu->arch.last_pte_updated = NULL;
1480 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1484 while (sp->multimapped || sp->parent_pte) {
1485 if (!sp->multimapped)
1486 parent_pte = sp->parent_pte;
1488 struct kvm_pte_chain *chain;
1490 chain = container_of(sp->parent_ptes.first,
1491 struct kvm_pte_chain, link);
1492 parent_pte = chain->parent_ptes[0];
1494 BUG_ON(!parent_pte);
1495 kvm_mmu_put_page(sp, parent_pte);
1496 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1500 static int mmu_zap_unsync_children(struct kvm *kvm,
1501 struct kvm_mmu_page *parent)
1504 struct mmu_page_path parents;
1505 struct kvm_mmu_pages pages;
1507 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1510 kvm_mmu_pages_init(parent, &parents, &pages);
1511 while (mmu_unsync_walk(parent, &pages)) {
1512 struct kvm_mmu_page *sp;
1514 for_each_sp(pages, sp, parents, i) {
1515 kvm_mmu_zap_page(kvm, sp);
1516 mmu_pages_clear_parents(&parents);
1519 kvm_mmu_pages_init(parent, &parents, &pages);
1525 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1529 trace_kvm_mmu_zap_page(sp);
1530 ++kvm->stat.mmu_shadow_zapped;
1531 ret = mmu_zap_unsync_children(kvm, sp);
1532 kvm_mmu_page_unlink_children(kvm, sp);
1533 kvm_mmu_unlink_parents(kvm, sp);
1534 kvm_flush_remote_tlbs(kvm);
1535 if (!sp->role.invalid && !sp->role.direct)
1536 unaccount_shadowed(kvm, sp->gfn);
1538 kvm_unlink_unsync_page(kvm, sp);
1539 if (!sp->root_count) {
1542 hlist_del(&sp->hash_link);
1543 kvm_mmu_free_page(kvm, sp);
1545 sp->role.invalid = 1;
1546 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1547 kvm_reload_remote_mmus(kvm);
1549 kvm_mmu_reset_last_pte_updated(kvm);
1554 * Changing the number of mmu pages allocated to the vm
1555 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1557 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1561 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1562 used_pages = max(0, used_pages);
1565 * If we set the number of mmu pages to be smaller be than the
1566 * number of actived pages , we must to free some mmu pages before we
1570 if (used_pages > kvm_nr_mmu_pages) {
1571 while (used_pages > kvm_nr_mmu_pages &&
1572 !list_empty(&kvm->arch.active_mmu_pages)) {
1573 struct kvm_mmu_page *page;
1575 page = container_of(kvm->arch.active_mmu_pages.prev,
1576 struct kvm_mmu_page, link);
1577 used_pages -= kvm_mmu_zap_page(kvm, page);
1579 kvm_nr_mmu_pages = used_pages;
1580 kvm->arch.n_free_mmu_pages = 0;
1583 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1584 - kvm->arch.n_alloc_mmu_pages;
1586 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1589 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1592 struct hlist_head *bucket;
1593 struct kvm_mmu_page *sp;
1594 struct hlist_node *node, *n;
1597 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1599 index = kvm_page_table_hashfn(gfn);
1600 bucket = &kvm->arch.mmu_page_hash[index];
1602 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1603 if (sp->gfn == gfn && !sp->role.direct) {
1604 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1607 if (kvm_mmu_zap_page(kvm, sp))
1613 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1616 struct hlist_head *bucket;
1617 struct kvm_mmu_page *sp;
1618 struct hlist_node *node, *nn;
1620 index = kvm_page_table_hashfn(gfn);
1621 bucket = &kvm->arch.mmu_page_hash[index];
1623 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1624 if (sp->gfn == gfn && !sp->role.direct
1625 && !sp->role.invalid) {
1626 pgprintk("%s: zap %lx %x\n",
1627 __func__, gfn, sp->role.word);
1628 if (kvm_mmu_zap_page(kvm, sp))
1634 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1636 int slot = memslot_id(kvm, gfn);
1637 struct kvm_mmu_page *sp = page_header(__pa(pte));
1639 __set_bit(slot, sp->slot_bitmap);
1642 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1647 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1650 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1651 if (pt[i] == shadow_notrap_nonpresent_pte)
1652 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1657 * The function is based on mtrr_type_lookup() in
1658 * arch/x86/kernel/cpu/mtrr/generic.c
1660 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1665 u8 prev_match, curr_match;
1666 int num_var_ranges = KVM_NR_VAR_MTRR;
1668 if (!mtrr_state->enabled)
1671 /* Make end inclusive end, instead of exclusive */
1674 /* Look in fixed ranges. Just return the type as per start */
1675 if (mtrr_state->have_fixed && (start < 0x100000)) {
1678 if (start < 0x80000) {
1680 idx += (start >> 16);
1681 return mtrr_state->fixed_ranges[idx];
1682 } else if (start < 0xC0000) {
1684 idx += ((start - 0x80000) >> 14);
1685 return mtrr_state->fixed_ranges[idx];
1686 } else if (start < 0x1000000) {
1688 idx += ((start - 0xC0000) >> 12);
1689 return mtrr_state->fixed_ranges[idx];
1694 * Look in variable ranges
1695 * Look of multiple ranges matching this address and pick type
1696 * as per MTRR precedence
1698 if (!(mtrr_state->enabled & 2))
1699 return mtrr_state->def_type;
1702 for (i = 0; i < num_var_ranges; ++i) {
1703 unsigned short start_state, end_state;
1705 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1708 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1709 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1710 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1711 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1713 start_state = ((start & mask) == (base & mask));
1714 end_state = ((end & mask) == (base & mask));
1715 if (start_state != end_state)
1718 if ((start & mask) != (base & mask))
1721 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1722 if (prev_match == 0xFF) {
1723 prev_match = curr_match;
1727 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1728 curr_match == MTRR_TYPE_UNCACHABLE)
1729 return MTRR_TYPE_UNCACHABLE;
1731 if ((prev_match == MTRR_TYPE_WRBACK &&
1732 curr_match == MTRR_TYPE_WRTHROUGH) ||
1733 (prev_match == MTRR_TYPE_WRTHROUGH &&
1734 curr_match == MTRR_TYPE_WRBACK)) {
1735 prev_match = MTRR_TYPE_WRTHROUGH;
1736 curr_match = MTRR_TYPE_WRTHROUGH;
1739 if (prev_match != curr_match)
1740 return MTRR_TYPE_UNCACHABLE;
1743 if (prev_match != 0xFF)
1746 return mtrr_state->def_type;
1749 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1753 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1754 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1755 if (mtrr == 0xfe || mtrr == 0xff)
1756 mtrr = MTRR_TYPE_WRBACK;
1759 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1761 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1764 struct hlist_head *bucket;
1765 struct kvm_mmu_page *s;
1766 struct hlist_node *node, *n;
1768 index = kvm_page_table_hashfn(sp->gfn);
1769 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1770 /* don't unsync if pagetable is shadowed with multiple roles */
1771 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1772 if (s->gfn != sp->gfn || s->role.direct)
1774 if (s->role.word != sp->role.word)
1777 trace_kvm_mmu_unsync_page(sp);
1778 ++vcpu->kvm->stat.mmu_unsync;
1781 kvm_mmu_mark_parents_unsync(sp);
1783 mmu_convert_notrap(sp);
1787 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1790 struct kvm_mmu_page *shadow;
1792 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1794 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1798 if (can_unsync && oos_shadow)
1799 return kvm_unsync_page(vcpu, shadow);
1805 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1806 unsigned pte_access, int user_fault,
1807 int write_fault, int dirty, int level,
1808 gfn_t gfn, pfn_t pfn, bool speculative,
1809 bool can_unsync, bool reset_host_protection)
1815 * We don't set the accessed bit, since we sometimes want to see
1816 * whether the guest actually used the pte (in order to detect
1819 spte = shadow_base_present_pte | shadow_dirty_mask;
1821 spte |= shadow_accessed_mask;
1823 pte_access &= ~ACC_WRITE_MASK;
1824 if (pte_access & ACC_EXEC_MASK)
1825 spte |= shadow_x_mask;
1827 spte |= shadow_nx_mask;
1828 if (pte_access & ACC_USER_MASK)
1829 spte |= shadow_user_mask;
1830 if (level > PT_PAGE_TABLE_LEVEL)
1831 spte |= PT_PAGE_SIZE_MASK;
1833 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1834 kvm_is_mmio_pfn(pfn));
1836 if (reset_host_protection)
1837 spte |= SPTE_HOST_WRITEABLE;
1839 spte |= (u64)pfn << PAGE_SHIFT;
1841 if ((pte_access & ACC_WRITE_MASK)
1842 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1844 if (level > PT_PAGE_TABLE_LEVEL &&
1845 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1847 rmap_remove(vcpu->kvm, sptep);
1848 spte = shadow_trap_nonpresent_pte;
1852 spte |= PT_WRITABLE_MASK;
1854 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1855 spte &= ~PT_USER_MASK;
1858 * Optimization: for pte sync, if spte was writable the hash
1859 * lookup is unnecessary (and expensive). Write protection
1860 * is responsibility of mmu_get_page / kvm_sync_page.
1861 * Same reasoning can be applied to dirty page accounting.
1863 if (!can_unsync && is_writable_pte(*sptep))
1866 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1867 pgprintk("%s: found shadow page for %lx, marking ro\n",
1870 pte_access &= ~ACC_WRITE_MASK;
1871 if (is_writable_pte(spte))
1872 spte &= ~PT_WRITABLE_MASK;
1876 if (pte_access & ACC_WRITE_MASK)
1877 mark_page_dirty(vcpu->kvm, gfn);
1880 __set_spte(sptep, spte);
1884 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1885 unsigned pt_access, unsigned pte_access,
1886 int user_fault, int write_fault, int dirty,
1887 int *ptwrite, int level, gfn_t gfn,
1888 pfn_t pfn, bool speculative,
1889 bool reset_host_protection)
1891 int was_rmapped = 0;
1892 int was_writable = is_writable_pte(*sptep);
1895 pgprintk("%s: spte %llx access %x write_fault %d"
1896 " user_fault %d gfn %lx\n",
1897 __func__, *sptep, pt_access,
1898 write_fault, user_fault, gfn);
1900 if (is_rmap_spte(*sptep)) {
1902 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1903 * the parent of the now unreachable PTE.
1905 if (level > PT_PAGE_TABLE_LEVEL &&
1906 !is_large_pte(*sptep)) {
1907 struct kvm_mmu_page *child;
1910 child = page_header(pte & PT64_BASE_ADDR_MASK);
1911 mmu_page_remove_parent_pte(child, sptep);
1912 __set_spte(sptep, shadow_trap_nonpresent_pte);
1913 kvm_flush_remote_tlbs(vcpu->kvm);
1914 } else if (pfn != spte_to_pfn(*sptep)) {
1915 pgprintk("hfn old %lx new %lx\n",
1916 spte_to_pfn(*sptep), pfn);
1917 rmap_remove(vcpu->kvm, sptep);
1918 __set_spte(sptep, shadow_trap_nonpresent_pte);
1919 kvm_flush_remote_tlbs(vcpu->kvm);
1924 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1925 dirty, level, gfn, pfn, speculative, true,
1926 reset_host_protection)) {
1929 kvm_x86_ops->tlb_flush(vcpu);
1932 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1933 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1934 is_large_pte(*sptep)? "2MB" : "4kB",
1935 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1937 if (!was_rmapped && is_large_pte(*sptep))
1938 ++vcpu->kvm->stat.lpages;
1940 page_header_update_slot(vcpu->kvm, sptep, gfn);
1942 rmap_count = rmap_add(vcpu, sptep, gfn);
1943 kvm_release_pfn_clean(pfn);
1944 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1945 rmap_recycle(vcpu, sptep, gfn);
1948 kvm_release_pfn_dirty(pfn);
1950 kvm_release_pfn_clean(pfn);
1953 vcpu->arch.last_pte_updated = sptep;
1954 vcpu->arch.last_pte_gfn = gfn;
1958 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1962 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1963 int level, gfn_t gfn, pfn_t pfn)
1965 struct kvm_shadow_walk_iterator iterator;
1966 struct kvm_mmu_page *sp;
1970 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1971 if (iterator.level == level) {
1972 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1973 0, write, 1, &pt_write,
1974 level, gfn, pfn, false, true);
1975 ++vcpu->stat.pf_fixed;
1979 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1980 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1981 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1983 1, ACC_ALL, iterator.sptep);
1985 pgprintk("nonpaging_map: ENOMEM\n");
1986 kvm_release_pfn_clean(pfn);
1990 __set_spte(iterator.sptep,
1992 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1993 | shadow_user_mask | shadow_x_mask);
1999 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2005 /* Touch the page, so send SIGBUS */
2006 hva = (void __user *)gfn_to_hva(kvm, gfn);
2007 r = copy_from_user(buf, hva, 1);
2010 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2012 kvm_release_pfn_clean(pfn);
2013 if (is_hwpoison_pfn(pfn)) {
2014 kvm_send_hwpoison_signal(kvm, gfn);
2020 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2025 unsigned long mmu_seq;
2027 level = mapping_level(vcpu, gfn);
2030 * This path builds a PAE pagetable - so we can map 2mb pages at
2031 * maximum. Therefore check if the level is larger than that.
2033 if (level > PT_DIRECTORY_LEVEL)
2034 level = PT_DIRECTORY_LEVEL;
2036 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2038 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2040 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2043 if (is_error_pfn(pfn))
2044 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2046 spin_lock(&vcpu->kvm->mmu_lock);
2047 if (mmu_notifier_retry(vcpu, mmu_seq))
2049 kvm_mmu_free_some_pages(vcpu);
2050 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2051 spin_unlock(&vcpu->kvm->mmu_lock);
2057 spin_unlock(&vcpu->kvm->mmu_lock);
2058 kvm_release_pfn_clean(pfn);
2063 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2066 struct kvm_mmu_page *sp;
2068 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2070 spin_lock(&vcpu->kvm->mmu_lock);
2071 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2072 hpa_t root = vcpu->arch.mmu.root_hpa;
2074 sp = page_header(root);
2076 if (!sp->root_count && sp->role.invalid)
2077 kvm_mmu_zap_page(vcpu->kvm, sp);
2078 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2079 spin_unlock(&vcpu->kvm->mmu_lock);
2082 for (i = 0; i < 4; ++i) {
2083 hpa_t root = vcpu->arch.mmu.pae_root[i];
2086 root &= PT64_BASE_ADDR_MASK;
2087 sp = page_header(root);
2089 if (!sp->root_count && sp->role.invalid)
2090 kvm_mmu_zap_page(vcpu->kvm, sp);
2092 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2094 spin_unlock(&vcpu->kvm->mmu_lock);
2095 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2098 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2102 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2103 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2110 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2114 struct kvm_mmu_page *sp;
2118 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2120 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2121 hpa_t root = vcpu->arch.mmu.root_hpa;
2123 ASSERT(!VALID_PAGE(root));
2124 if (mmu_check_root(vcpu, root_gfn))
2130 spin_lock(&vcpu->kvm->mmu_lock);
2131 kvm_mmu_free_some_pages(vcpu);
2132 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2133 PT64_ROOT_LEVEL, direct,
2135 root = __pa(sp->spt);
2137 spin_unlock(&vcpu->kvm->mmu_lock);
2138 vcpu->arch.mmu.root_hpa = root;
2141 direct = !is_paging(vcpu);
2142 for (i = 0; i < 4; ++i) {
2143 hpa_t root = vcpu->arch.mmu.pae_root[i];
2145 ASSERT(!VALID_PAGE(root));
2146 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2147 pdptr = kvm_pdptr_read(vcpu, i);
2148 if (!is_present_gpte(pdptr)) {
2149 vcpu->arch.mmu.pae_root[i] = 0;
2152 root_gfn = pdptr >> PAGE_SHIFT;
2153 } else if (vcpu->arch.mmu.root_level == 0)
2155 if (mmu_check_root(vcpu, root_gfn))
2161 spin_lock(&vcpu->kvm->mmu_lock);
2162 kvm_mmu_free_some_pages(vcpu);
2163 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2164 PT32_ROOT_LEVEL, direct,
2166 root = __pa(sp->spt);
2168 spin_unlock(&vcpu->kvm->mmu_lock);
2170 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2172 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2176 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2179 struct kvm_mmu_page *sp;
2181 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2183 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2184 hpa_t root = vcpu->arch.mmu.root_hpa;
2185 sp = page_header(root);
2186 mmu_sync_children(vcpu, sp);
2189 for (i = 0; i < 4; ++i) {
2190 hpa_t root = vcpu->arch.mmu.pae_root[i];
2192 if (root && VALID_PAGE(root)) {
2193 root &= PT64_BASE_ADDR_MASK;
2194 sp = page_header(root);
2195 mmu_sync_children(vcpu, sp);
2200 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2202 spin_lock(&vcpu->kvm->mmu_lock);
2203 mmu_sync_roots(vcpu);
2204 spin_unlock(&vcpu->kvm->mmu_lock);
2207 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2208 u32 access, u32 *error)
2215 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2221 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2222 r = mmu_topup_memory_caches(vcpu);
2227 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2229 gfn = gva >> PAGE_SHIFT;
2231 return nonpaging_map(vcpu, gva & PAGE_MASK,
2232 error_code & PFERR_WRITE_MASK, gfn);
2235 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2241 gfn_t gfn = gpa >> PAGE_SHIFT;
2242 unsigned long mmu_seq;
2245 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2247 r = mmu_topup_memory_caches(vcpu);
2251 level = mapping_level(vcpu, gfn);
2253 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2255 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2257 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2258 if (is_error_pfn(pfn))
2259 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2260 spin_lock(&vcpu->kvm->mmu_lock);
2261 if (mmu_notifier_retry(vcpu, mmu_seq))
2263 kvm_mmu_free_some_pages(vcpu);
2264 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2266 spin_unlock(&vcpu->kvm->mmu_lock);
2271 spin_unlock(&vcpu->kvm->mmu_lock);
2272 kvm_release_pfn_clean(pfn);
2276 static void nonpaging_free(struct kvm_vcpu *vcpu)
2278 mmu_free_roots(vcpu);
2281 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2283 struct kvm_mmu *context = &vcpu->arch.mmu;
2285 context->new_cr3 = nonpaging_new_cr3;
2286 context->page_fault = nonpaging_page_fault;
2287 context->gva_to_gpa = nonpaging_gva_to_gpa;
2288 context->free = nonpaging_free;
2289 context->prefetch_page = nonpaging_prefetch_page;
2290 context->sync_page = nonpaging_sync_page;
2291 context->invlpg = nonpaging_invlpg;
2292 context->root_level = 0;
2293 context->shadow_root_level = PT32E_ROOT_LEVEL;
2294 context->root_hpa = INVALID_PAGE;
2298 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2300 ++vcpu->stat.tlb_flush;
2301 kvm_x86_ops->tlb_flush(vcpu);
2304 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2306 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2307 mmu_free_roots(vcpu);
2310 static void inject_page_fault(struct kvm_vcpu *vcpu,
2314 kvm_inject_page_fault(vcpu, addr, err_code);
2317 static void paging_free(struct kvm_vcpu *vcpu)
2319 nonpaging_free(vcpu);
2322 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2326 bit7 = (gpte >> 7) & 1;
2327 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2331 #include "paging_tmpl.h"
2335 #include "paging_tmpl.h"
2338 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2340 struct kvm_mmu *context = &vcpu->arch.mmu;
2341 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2342 u64 exb_bit_rsvd = 0;
2345 exb_bit_rsvd = rsvd_bits(63, 63);
2347 case PT32_ROOT_LEVEL:
2348 /* no rsvd bits for 2 level 4K page table entries */
2349 context->rsvd_bits_mask[0][1] = 0;
2350 context->rsvd_bits_mask[0][0] = 0;
2351 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2353 if (!is_pse(vcpu)) {
2354 context->rsvd_bits_mask[1][1] = 0;
2358 if (is_cpuid_PSE36())
2359 /* 36bits PSE 4MB page */
2360 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2362 /* 32 bits PSE 4MB page */
2363 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2365 case PT32E_ROOT_LEVEL:
2366 context->rsvd_bits_mask[0][2] =
2367 rsvd_bits(maxphyaddr, 63) |
2368 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2369 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2370 rsvd_bits(maxphyaddr, 62); /* PDE */
2371 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2372 rsvd_bits(maxphyaddr, 62); /* PTE */
2373 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2374 rsvd_bits(maxphyaddr, 62) |
2375 rsvd_bits(13, 20); /* large page */
2376 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2378 case PT64_ROOT_LEVEL:
2379 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2380 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2381 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2382 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2383 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2384 rsvd_bits(maxphyaddr, 51);
2385 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2386 rsvd_bits(maxphyaddr, 51);
2387 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2388 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2389 rsvd_bits(maxphyaddr, 51) |
2391 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2392 rsvd_bits(maxphyaddr, 51) |
2393 rsvd_bits(13, 20); /* large page */
2394 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2399 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2401 struct kvm_mmu *context = &vcpu->arch.mmu;
2403 ASSERT(is_pae(vcpu));
2404 context->new_cr3 = paging_new_cr3;
2405 context->page_fault = paging64_page_fault;
2406 context->gva_to_gpa = paging64_gva_to_gpa;
2407 context->prefetch_page = paging64_prefetch_page;
2408 context->sync_page = paging64_sync_page;
2409 context->invlpg = paging64_invlpg;
2410 context->free = paging_free;
2411 context->root_level = level;
2412 context->shadow_root_level = level;
2413 context->root_hpa = INVALID_PAGE;
2417 static int paging64_init_context(struct kvm_vcpu *vcpu)
2419 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2420 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2423 static int paging32_init_context(struct kvm_vcpu *vcpu)
2425 struct kvm_mmu *context = &vcpu->arch.mmu;
2427 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2428 context->new_cr3 = paging_new_cr3;
2429 context->page_fault = paging32_page_fault;
2430 context->gva_to_gpa = paging32_gva_to_gpa;
2431 context->free = paging_free;
2432 context->prefetch_page = paging32_prefetch_page;
2433 context->sync_page = paging32_sync_page;
2434 context->invlpg = paging32_invlpg;
2435 context->root_level = PT32_ROOT_LEVEL;
2436 context->shadow_root_level = PT32E_ROOT_LEVEL;
2437 context->root_hpa = INVALID_PAGE;
2441 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2443 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2444 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2447 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2449 struct kvm_mmu *context = &vcpu->arch.mmu;
2451 context->new_cr3 = nonpaging_new_cr3;
2452 context->page_fault = tdp_page_fault;
2453 context->free = nonpaging_free;
2454 context->prefetch_page = nonpaging_prefetch_page;
2455 context->sync_page = nonpaging_sync_page;
2456 context->invlpg = nonpaging_invlpg;
2457 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2458 context->root_hpa = INVALID_PAGE;
2460 if (!is_paging(vcpu)) {
2461 context->gva_to_gpa = nonpaging_gva_to_gpa;
2462 context->root_level = 0;
2463 } else if (is_long_mode(vcpu)) {
2464 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2465 context->gva_to_gpa = paging64_gva_to_gpa;
2466 context->root_level = PT64_ROOT_LEVEL;
2467 } else if (is_pae(vcpu)) {
2468 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2469 context->gva_to_gpa = paging64_gva_to_gpa;
2470 context->root_level = PT32E_ROOT_LEVEL;
2472 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2473 context->gva_to_gpa = paging32_gva_to_gpa;
2474 context->root_level = PT32_ROOT_LEVEL;
2480 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2485 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2487 if (!is_paging(vcpu))
2488 r = nonpaging_init_context(vcpu);
2489 else if (is_long_mode(vcpu))
2490 r = paging64_init_context(vcpu);
2491 else if (is_pae(vcpu))
2492 r = paging32E_init_context(vcpu);
2494 r = paging32_init_context(vcpu);
2496 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2497 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2502 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2504 vcpu->arch.update_pte.pfn = bad_pfn;
2507 return init_kvm_tdp_mmu(vcpu);
2509 return init_kvm_softmmu(vcpu);
2512 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2515 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2516 /* mmu.free() should set root_hpa = INVALID_PAGE */
2517 vcpu->arch.mmu.free(vcpu);
2520 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2522 destroy_kvm_mmu(vcpu);
2523 return init_kvm_mmu(vcpu);
2525 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2527 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2531 r = mmu_topup_memory_caches(vcpu);
2534 r = mmu_alloc_roots(vcpu);
2535 spin_lock(&vcpu->kvm->mmu_lock);
2536 mmu_sync_roots(vcpu);
2537 spin_unlock(&vcpu->kvm->mmu_lock);
2540 /* set_cr3() should ensure TLB has been flushed */
2541 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2545 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2547 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2549 mmu_free_roots(vcpu);
2552 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2553 struct kvm_mmu_page *sp,
2557 struct kvm_mmu_page *child;
2560 if (is_shadow_present_pte(pte)) {
2561 if (is_last_spte(pte, sp->role.level))
2562 rmap_remove(vcpu->kvm, spte);
2564 child = page_header(pte & PT64_BASE_ADDR_MASK);
2565 mmu_page_remove_parent_pte(child, spte);
2568 __set_spte(spte, shadow_trap_nonpresent_pte);
2569 if (is_large_pte(pte))
2570 --vcpu->kvm->stat.lpages;
2573 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2574 struct kvm_mmu_page *sp,
2578 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2579 ++vcpu->kvm->stat.mmu_pde_zapped;
2583 ++vcpu->kvm->stat.mmu_pte_updated;
2584 if (!sp->role.cr4_pae)
2585 paging32_update_pte(vcpu, sp, spte, new);
2587 paging64_update_pte(vcpu, sp, spte, new);
2590 static bool need_remote_flush(u64 old, u64 new)
2592 if (!is_shadow_present_pte(old))
2594 if (!is_shadow_present_pte(new))
2596 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2598 old ^= PT64_NX_MASK;
2599 new ^= PT64_NX_MASK;
2600 return (old & ~new & PT64_PERM_MASK) != 0;
2603 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2605 if (need_remote_flush(old, new))
2606 kvm_flush_remote_tlbs(vcpu->kvm);
2608 kvm_mmu_flush_tlb(vcpu);
2611 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2613 u64 *spte = vcpu->arch.last_pte_updated;
2615 return !!(spte && (*spte & shadow_accessed_mask));
2618 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2624 if (!is_present_gpte(gpte))
2626 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2628 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2630 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2632 if (is_error_pfn(pfn)) {
2633 kvm_release_pfn_clean(pfn);
2636 vcpu->arch.update_pte.gfn = gfn;
2637 vcpu->arch.update_pte.pfn = pfn;
2640 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2642 u64 *spte = vcpu->arch.last_pte_updated;
2645 && vcpu->arch.last_pte_gfn == gfn
2646 && shadow_accessed_mask
2647 && !(*spte & shadow_accessed_mask)
2648 && is_shadow_present_pte(*spte))
2649 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2652 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2653 const u8 *new, int bytes,
2654 bool guest_initiated)
2656 gfn_t gfn = gpa >> PAGE_SHIFT;
2657 struct kvm_mmu_page *sp;
2658 struct hlist_node *node, *n;
2659 struct hlist_head *bucket;
2663 unsigned offset = offset_in_page(gpa);
2665 unsigned page_offset;
2666 unsigned misaligned;
2674 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2676 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2679 * Assume that the pte write on a page table of the same type
2680 * as the current vcpu paging mode. This is nearly always true
2681 * (might be false while changing modes). Note it is verified later
2684 if ((is_pae(vcpu) && bytes == 4) || !new) {
2685 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2690 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2693 new = (const u8 *)&gentry;
2698 gentry = *(const u32 *)new;
2701 gentry = *(const u64 *)new;
2708 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2709 spin_lock(&vcpu->kvm->mmu_lock);
2710 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2712 kvm_mmu_access_page(vcpu, gfn);
2713 kvm_mmu_free_some_pages(vcpu);
2714 ++vcpu->kvm->stat.mmu_pte_write;
2715 kvm_mmu_audit(vcpu, "pre pte write");
2716 if (guest_initiated) {
2717 if (gfn == vcpu->arch.last_pt_write_gfn
2718 && !last_updated_pte_accessed(vcpu)) {
2719 ++vcpu->arch.last_pt_write_count;
2720 if (vcpu->arch.last_pt_write_count >= 3)
2723 vcpu->arch.last_pt_write_gfn = gfn;
2724 vcpu->arch.last_pt_write_count = 1;
2725 vcpu->arch.last_pte_updated = NULL;
2728 index = kvm_page_table_hashfn(gfn);
2729 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2732 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2733 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2735 pte_size = sp->role.cr4_pae ? 8 : 4;
2736 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2737 misaligned |= bytes < 4;
2738 if (misaligned || flooded) {
2740 * Misaligned accesses are too much trouble to fix
2741 * up; also, they usually indicate a page is not used
2744 * If we're seeing too many writes to a page,
2745 * it may no longer be a page table, or we may be
2746 * forking, in which case it is better to unmap the
2749 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2750 gpa, bytes, sp->role.word);
2751 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2753 ++vcpu->kvm->stat.mmu_flooded;
2756 page_offset = offset;
2757 level = sp->role.level;
2759 if (!sp->role.cr4_pae) {
2760 page_offset <<= 1; /* 32->64 */
2762 * A 32-bit pde maps 4MB while the shadow pdes map
2763 * only 2MB. So we need to double the offset again
2764 * and zap two pdes instead of one.
2766 if (level == PT32_ROOT_LEVEL) {
2767 page_offset &= ~7; /* kill rounding error */
2771 quadrant = page_offset >> PAGE_SHIFT;
2772 page_offset &= ~PAGE_MASK;
2773 if (quadrant != sp->role.quadrant)
2776 spte = &sp->spt[page_offset / sizeof(*spte)];
2779 mmu_pte_write_zap_pte(vcpu, sp, spte);
2781 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2782 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2786 kvm_mmu_audit(vcpu, "post pte write");
2787 spin_unlock(&vcpu->kvm->mmu_lock);
2788 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2789 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2790 vcpu->arch.update_pte.pfn = bad_pfn;
2794 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2802 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2804 spin_lock(&vcpu->kvm->mmu_lock);
2805 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2806 spin_unlock(&vcpu->kvm->mmu_lock);
2809 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2811 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2813 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2814 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2815 struct kvm_mmu_page *sp;
2817 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2818 struct kvm_mmu_page, link);
2819 kvm_mmu_zap_page(vcpu->kvm, sp);
2820 ++vcpu->kvm->stat.mmu_recycled;
2824 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2827 enum emulation_result er;
2829 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2838 r = mmu_topup_memory_caches(vcpu);
2842 er = emulate_instruction(vcpu, cr2, error_code, 0);
2847 case EMULATE_DO_MMIO:
2848 ++vcpu->stat.mmio_exits;
2858 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2860 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2862 vcpu->arch.mmu.invlpg(vcpu, gva);
2863 kvm_mmu_flush_tlb(vcpu);
2864 ++vcpu->stat.invlpg;
2866 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2868 void kvm_enable_tdp(void)
2872 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2874 void kvm_disable_tdp(void)
2876 tdp_enabled = false;
2878 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2880 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2882 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2885 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2893 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2894 * Therefore we need to allocate shadow page tables in the first
2895 * 4GB of memory, which happens to fit the DMA32 zone.
2897 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2901 vcpu->arch.mmu.pae_root = page_address(page);
2902 for (i = 0; i < 4; ++i)
2903 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2908 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2911 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2913 return alloc_mmu_pages(vcpu);
2916 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2919 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2921 return init_kvm_mmu(vcpu);
2924 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2928 destroy_kvm_mmu(vcpu);
2929 free_mmu_pages(vcpu);
2930 mmu_free_memory_caches(vcpu);
2933 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2935 struct kvm_mmu_page *sp;
2937 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2941 if (!test_bit(slot, sp->slot_bitmap))
2945 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2947 if (pt[i] & PT_WRITABLE_MASK)
2948 pt[i] &= ~PT_WRITABLE_MASK;
2950 kvm_flush_remote_tlbs(kvm);
2953 void kvm_mmu_zap_all(struct kvm *kvm)
2955 struct kvm_mmu_page *sp, *node;
2957 spin_lock(&kvm->mmu_lock);
2959 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2960 if (kvm_mmu_zap_page(kvm, sp))
2963 spin_unlock(&kvm->mmu_lock);
2965 kvm_flush_remote_tlbs(kvm);
2968 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm)
2970 struct kvm_mmu_page *page;
2972 page = container_of(kvm->arch.active_mmu_pages.prev,
2973 struct kvm_mmu_page, link);
2974 return kvm_mmu_zap_page(kvm, page);
2977 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
2980 struct kvm *kvm_freed = NULL;
2981 int cache_count = 0;
2983 spin_lock(&kvm_lock);
2985 list_for_each_entry(kvm, &vm_list, vm_list) {
2986 int npages, idx, freed_pages;
2988 idx = srcu_read_lock(&kvm->srcu);
2989 spin_lock(&kvm->mmu_lock);
2990 npages = kvm->arch.n_alloc_mmu_pages -
2991 kvm->arch.n_free_mmu_pages;
2992 cache_count += npages;
2993 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2994 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm);
2995 cache_count -= freed_pages;
3000 spin_unlock(&kvm->mmu_lock);
3001 srcu_read_unlock(&kvm->srcu, idx);
3004 list_move_tail(&kvm_freed->vm_list, &vm_list);
3006 spin_unlock(&kvm_lock);
3011 static struct shrinker mmu_shrinker = {
3012 .shrink = mmu_shrink,
3013 .seeks = DEFAULT_SEEKS * 10,
3016 static void mmu_destroy_caches(void)
3018 if (pte_chain_cache)
3019 kmem_cache_destroy(pte_chain_cache);
3020 if (rmap_desc_cache)
3021 kmem_cache_destroy(rmap_desc_cache);
3022 if (mmu_page_header_cache)
3023 kmem_cache_destroy(mmu_page_header_cache);
3026 void kvm_mmu_module_exit(void)
3028 mmu_destroy_caches();
3029 unregister_shrinker(&mmu_shrinker);
3032 int kvm_mmu_module_init(void)
3034 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3035 sizeof(struct kvm_pte_chain),
3037 if (!pte_chain_cache)
3039 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3040 sizeof(struct kvm_rmap_desc),
3042 if (!rmap_desc_cache)
3045 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3046 sizeof(struct kvm_mmu_page),
3048 if (!mmu_page_header_cache)
3051 register_shrinker(&mmu_shrinker);
3056 mmu_destroy_caches();
3061 * Caculate mmu pages needed for kvm.
3063 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3066 unsigned int nr_mmu_pages;
3067 unsigned int nr_pages = 0;
3068 struct kvm_memslots *slots;
3070 slots = kvm_memslots(kvm);
3072 for (i = 0; i < slots->nmemslots; i++)
3073 nr_pages += slots->memslots[i].npages;
3075 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3076 nr_mmu_pages = max(nr_mmu_pages,
3077 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3079 return nr_mmu_pages;
3082 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3085 if (len > buffer->len)
3090 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3095 ret = pv_mmu_peek_buffer(buffer, len);
3100 buffer->processed += len;
3104 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3105 gpa_t addr, gpa_t value)
3110 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3113 r = mmu_topup_memory_caches(vcpu);
3117 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3123 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3125 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3129 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3131 spin_lock(&vcpu->kvm->mmu_lock);
3132 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3133 spin_unlock(&vcpu->kvm->mmu_lock);
3137 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3138 struct kvm_pv_mmu_op_buffer *buffer)
3140 struct kvm_mmu_op_header *header;
3142 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3145 switch (header->op) {
3146 case KVM_MMU_OP_WRITE_PTE: {
3147 struct kvm_mmu_op_write_pte *wpte;
3149 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3152 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3155 case KVM_MMU_OP_FLUSH_TLB: {
3156 struct kvm_mmu_op_flush_tlb *ftlb;
3158 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3161 return kvm_pv_mmu_flush_tlb(vcpu);
3163 case KVM_MMU_OP_RELEASE_PT: {
3164 struct kvm_mmu_op_release_pt *rpt;
3166 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3169 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3175 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3176 gpa_t addr, unsigned long *ret)
3179 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3181 buffer->ptr = buffer->buf;
3182 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3183 buffer->processed = 0;
3185 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3189 while (buffer->len) {
3190 r = kvm_pv_mmu_op_one(vcpu, buffer);
3199 *ret = buffer->processed;
3203 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3205 struct kvm_shadow_walk_iterator iterator;
3208 spin_lock(&vcpu->kvm->mmu_lock);
3209 for_each_shadow_entry(vcpu, addr, iterator) {
3210 sptes[iterator.level-1] = *iterator.sptep;
3212 if (!is_shadow_present_pte(*iterator.sptep))
3215 spin_unlock(&vcpu->kvm->mmu_lock);
3219 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3223 static const char *audit_msg;
3225 static gva_t canonicalize(gva_t gva)
3227 #ifdef CONFIG_X86_64
3228 gva = (long long)(gva << 16) >> 16;
3234 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3236 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3241 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3242 u64 ent = sp->spt[i];
3244 if (is_shadow_present_pte(ent)) {
3245 if (!is_last_spte(ent, sp->role.level)) {
3246 struct kvm_mmu_page *child;
3247 child = page_header(ent & PT64_BASE_ADDR_MASK);
3248 __mmu_spte_walk(kvm, child, fn);
3250 fn(kvm, &sp->spt[i]);
3255 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3258 struct kvm_mmu_page *sp;
3260 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3262 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3263 hpa_t root = vcpu->arch.mmu.root_hpa;
3264 sp = page_header(root);
3265 __mmu_spte_walk(vcpu->kvm, sp, fn);
3268 for (i = 0; i < 4; ++i) {
3269 hpa_t root = vcpu->arch.mmu.pae_root[i];
3271 if (root && VALID_PAGE(root)) {
3272 root &= PT64_BASE_ADDR_MASK;
3273 sp = page_header(root);
3274 __mmu_spte_walk(vcpu->kvm, sp, fn);
3280 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3281 gva_t va, int level)
3283 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3285 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3287 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3290 if (ent == shadow_trap_nonpresent_pte)
3293 va = canonicalize(va);
3294 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3295 audit_mappings_page(vcpu, ent, va, level - 1);
3297 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3298 gfn_t gfn = gpa >> PAGE_SHIFT;
3299 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3300 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3302 if (is_error_pfn(pfn)) {
3303 kvm_release_pfn_clean(pfn);
3307 if (is_shadow_present_pte(ent)
3308 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3309 printk(KERN_ERR "xx audit error: (%s) levels %d"
3310 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3311 audit_msg, vcpu->arch.mmu.root_level,
3313 is_shadow_present_pte(ent));
3314 else if (ent == shadow_notrap_nonpresent_pte
3315 && !is_error_hpa(hpa))
3316 printk(KERN_ERR "audit: (%s) notrap shadow,"
3317 " valid guest gva %lx\n", audit_msg, va);
3318 kvm_release_pfn_clean(pfn);
3324 static void audit_mappings(struct kvm_vcpu *vcpu)
3328 if (vcpu->arch.mmu.root_level == 4)
3329 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3331 for (i = 0; i < 4; ++i)
3332 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3333 audit_mappings_page(vcpu,
3334 vcpu->arch.mmu.pae_root[i],
3339 static int count_rmaps(struct kvm_vcpu *vcpu)
3341 struct kvm *kvm = vcpu->kvm;
3342 struct kvm_memslots *slots;
3346 idx = srcu_read_lock(&kvm->srcu);
3347 slots = kvm_memslots(kvm);
3348 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3349 struct kvm_memory_slot *m = &slots->memslots[i];
3350 struct kvm_rmap_desc *d;
3352 for (j = 0; j < m->npages; ++j) {
3353 unsigned long *rmapp = &m->rmap[j];
3357 if (!(*rmapp & 1)) {
3361 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3363 for (k = 0; k < RMAP_EXT; ++k)
3372 srcu_read_unlock(&kvm->srcu, idx);
3376 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3378 unsigned long *rmapp;
3379 struct kvm_mmu_page *rev_sp;
3382 if (*sptep & PT_WRITABLE_MASK) {
3383 rev_sp = page_header(__pa(sptep));
3384 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3386 if (!gfn_to_memslot(kvm, gfn)) {
3387 if (!printk_ratelimit())
3389 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3391 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3392 audit_msg, (long int)(sptep - rev_sp->spt),
3398 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3399 rev_sp->role.level);
3401 if (!printk_ratelimit())
3403 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3411 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3413 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3416 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3418 struct kvm_mmu_page *sp;
3421 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3424 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3427 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3430 if (!(ent & PT_PRESENT_MASK))
3432 if (!(ent & PT_WRITABLE_MASK))
3434 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3440 static void audit_rmap(struct kvm_vcpu *vcpu)
3442 check_writable_mappings_rmap(vcpu);
3446 static void audit_write_protection(struct kvm_vcpu *vcpu)
3448 struct kvm_mmu_page *sp;
3449 struct kvm_memory_slot *slot;
3450 unsigned long *rmapp;
3454 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3455 if (sp->role.direct)
3460 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3461 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3462 rmapp = &slot->rmap[gfn - slot->base_gfn];
3464 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3466 if (*spte & PT_WRITABLE_MASK)
3467 printk(KERN_ERR "%s: (%s) shadow page has "
3468 "writable mappings: gfn %lx role %x\n",
3469 __func__, audit_msg, sp->gfn,
3471 spte = rmap_next(vcpu->kvm, rmapp, spte);
3476 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3483 audit_write_protection(vcpu);
3484 if (strcmp("pre pte write", audit_msg) != 0)
3485 audit_mappings(vcpu);
3486 audit_writable_sptes_have_rmaps(vcpu);