Merge commit 'linus/master' into merge-linus
[linux-2.6.git] / arch / x86 / kvm / i8254.c
1 /*
2  * 8253/8254 interval timer emulation
3  *
4  * Copyright (c) 2003-2004 Fabrice Bellard
5  * Copyright (c) 2006 Intel Corporation
6  * Copyright (c) 2007 Keir Fraser, XenSource Inc
7  * Copyright (c) 2008 Intel Corporation
8  *
9  * Permission is hereby granted, free of charge, to any person obtaining a copy
10  * of this software and associated documentation files (the "Software"), to deal
11  * in the Software without restriction, including without limitation the rights
12  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13  * copies of the Software, and to permit persons to whom the Software is
14  * furnished to do so, subject to the following conditions:
15  *
16  * The above copyright notice and this permission notice shall be included in
17  * all copies or substantial portions of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25  * THE SOFTWARE.
26  *
27  * Authors:
28  *   Sheng Yang <sheng.yang@intel.com>
29  *   Based on QEMU and Xen.
30  */
31
32 #include <linux/kvm_host.h>
33
34 #include "irq.h"
35 #include "i8254.h"
36
37 #ifndef CONFIG_X86_64
38 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
39 #else
40 #define mod_64(x, y) ((x) % (y))
41 #endif
42
43 #define RW_STATE_LSB 1
44 #define RW_STATE_MSB 2
45 #define RW_STATE_WORD0 3
46 #define RW_STATE_WORD1 4
47
48 /* Compute with 96 bit intermediate result: (a*b)/c */
49 static u64 muldiv64(u64 a, u32 b, u32 c)
50 {
51         union {
52                 u64 ll;
53                 struct {
54                         u32 low, high;
55                 } l;
56         } u, res;
57         u64 rl, rh;
58
59         u.ll = a;
60         rl = (u64)u.l.low * (u64)b;
61         rh = (u64)u.l.high * (u64)b;
62         rh += (rl >> 32);
63         res.l.high = div64_u64(rh, c);
64         res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c);
65         return res.ll;
66 }
67
68 static void pit_set_gate(struct kvm *kvm, int channel, u32 val)
69 {
70         struct kvm_kpit_channel_state *c =
71                 &kvm->arch.vpit->pit_state.channels[channel];
72
73         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
74
75         switch (c->mode) {
76         default:
77         case 0:
78         case 4:
79                 /* XXX: just disable/enable counting */
80                 break;
81         case 1:
82         case 2:
83         case 3:
84         case 5:
85                 /* Restart counting on rising edge. */
86                 if (c->gate < val)
87                         c->count_load_time = ktime_get();
88                 break;
89         }
90
91         c->gate = val;
92 }
93
94 static int pit_get_gate(struct kvm *kvm, int channel)
95 {
96         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
97
98         return kvm->arch.vpit->pit_state.channels[channel].gate;
99 }
100
101 static int pit_get_count(struct kvm *kvm, int channel)
102 {
103         struct kvm_kpit_channel_state *c =
104                 &kvm->arch.vpit->pit_state.channels[channel];
105         s64 d, t;
106         int counter;
107
108         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
109
110         t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
111         d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
112
113         switch (c->mode) {
114         case 0:
115         case 1:
116         case 4:
117         case 5:
118                 counter = (c->count - d) & 0xffff;
119                 break;
120         case 3:
121                 /* XXX: may be incorrect for odd counts */
122                 counter = c->count - (mod_64((2 * d), c->count));
123                 break;
124         default:
125                 counter = c->count - mod_64(d, c->count);
126                 break;
127         }
128         return counter;
129 }
130
131 static int pit_get_out(struct kvm *kvm, int channel)
132 {
133         struct kvm_kpit_channel_state *c =
134                 &kvm->arch.vpit->pit_state.channels[channel];
135         s64 d, t;
136         int out;
137
138         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
139
140         t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
141         d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
142
143         switch (c->mode) {
144         default:
145         case 0:
146                 out = (d >= c->count);
147                 break;
148         case 1:
149                 out = (d < c->count);
150                 break;
151         case 2:
152                 out = ((mod_64(d, c->count) == 0) && (d != 0));
153                 break;
154         case 3:
155                 out = (mod_64(d, c->count) < ((c->count + 1) >> 1));
156                 break;
157         case 4:
158         case 5:
159                 out = (d == c->count);
160                 break;
161         }
162
163         return out;
164 }
165
166 static void pit_latch_count(struct kvm *kvm, int channel)
167 {
168         struct kvm_kpit_channel_state *c =
169                 &kvm->arch.vpit->pit_state.channels[channel];
170
171         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
172
173         if (!c->count_latched) {
174                 c->latched_count = pit_get_count(kvm, channel);
175                 c->count_latched = c->rw_mode;
176         }
177 }
178
179 static void pit_latch_status(struct kvm *kvm, int channel)
180 {
181         struct kvm_kpit_channel_state *c =
182                 &kvm->arch.vpit->pit_state.channels[channel];
183
184         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
185
186         if (!c->status_latched) {
187                 /* TODO: Return NULL COUNT (bit 6). */
188                 c->status = ((pit_get_out(kvm, channel) << 7) |
189                                 (c->rw_mode << 4) |
190                                 (c->mode << 1) |
191                                 c->bcd);
192                 c->status_latched = 1;
193         }
194 }
195
196 static int __pit_timer_fn(struct kvm_kpit_state *ps)
197 {
198         struct kvm_vcpu *vcpu0 = ps->pit->kvm->vcpus[0];
199         struct kvm_kpit_timer *pt = &ps->pit_timer;
200
201         if (!atomic_inc_and_test(&pt->pending))
202                 set_bit(KVM_REQ_PENDING_TIMER, &vcpu0->requests);
203
204         if (vcpu0 && waitqueue_active(&vcpu0->wq))
205                 wake_up_interruptible(&vcpu0->wq);
206
207         hrtimer_add_expires_ns(&pt->timer, pt->period);
208         pt->scheduled = hrtimer_get_expires_ns(&pt->timer);
209         if (pt->period)
210                 ps->channels[0].count_load_time = hrtimer_get_expires(&pt->timer);
211
212         return (pt->period == 0 ? 0 : 1);
213 }
214
215 int pit_has_pending_timer(struct kvm_vcpu *vcpu)
216 {
217         struct kvm_pit *pit = vcpu->kvm->arch.vpit;
218
219         if (pit && vcpu->vcpu_id == 0 && pit->pit_state.irq_ack)
220                 return atomic_read(&pit->pit_state.pit_timer.pending);
221         return 0;
222 }
223
224 static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
225 {
226         struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state,
227                                                  irq_ack_notifier);
228         spin_lock(&ps->inject_lock);
229         if (atomic_dec_return(&ps->pit_timer.pending) < 0)
230                 atomic_inc(&ps->pit_timer.pending);
231         ps->irq_ack = 1;
232         spin_unlock(&ps->inject_lock);
233 }
234
235 static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
236 {
237         struct kvm_kpit_state *ps;
238         int restart_timer = 0;
239
240         ps = container_of(data, struct kvm_kpit_state, pit_timer.timer);
241
242         restart_timer = __pit_timer_fn(ps);
243
244         if (restart_timer)
245                 return HRTIMER_RESTART;
246         else
247                 return HRTIMER_NORESTART;
248 }
249
250 void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
251 {
252         struct kvm_pit *pit = vcpu->kvm->arch.vpit;
253         struct hrtimer *timer;
254
255         if (vcpu->vcpu_id != 0 || !pit)
256                 return;
257
258         timer = &pit->pit_state.pit_timer.timer;
259         if (hrtimer_cancel(timer))
260                 hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
261 }
262
263 static void destroy_pit_timer(struct kvm_kpit_timer *pt)
264 {
265         pr_debug("pit: execute del timer!\n");
266         hrtimer_cancel(&pt->timer);
267 }
268
269 static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period)
270 {
271         struct kvm_kpit_timer *pt = &ps->pit_timer;
272         s64 interval;
273
274         interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
275
276         pr_debug("pit: create pit timer, interval is %llu nsec\n", interval);
277
278         /* TODO The new value only affected after the retriggered */
279         hrtimer_cancel(&pt->timer);
280         pt->period = (is_period == 0) ? 0 : interval;
281         pt->timer.function = pit_timer_fn;
282         atomic_set(&pt->pending, 0);
283         ps->irq_ack = 1;
284
285         hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval),
286                       HRTIMER_MODE_ABS);
287 }
288
289 static void pit_load_count(struct kvm *kvm, int channel, u32 val)
290 {
291         struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
292
293         WARN_ON(!mutex_is_locked(&ps->lock));
294
295         pr_debug("pit: load_count val is %d, channel is %d\n", val, channel);
296
297         /*
298          * Though spec said the state of 8254 is undefined after power-up,
299          * seems some tricky OS like Windows XP depends on IRQ0 interrupt
300          * when booting up.
301          * So here setting initialize rate for it, and not a specific number
302          */
303         if (val == 0)
304                 val = 0x10000;
305
306         ps->channels[channel].count_load_time = ktime_get();
307         ps->channels[channel].count = val;
308
309         if (channel != 0)
310                 return;
311
312         /* Two types of timer
313          * mode 1 is one shot, mode 2 is period, otherwise del timer */
314         switch (ps->channels[0].mode) {
315         case 1:
316         /* FIXME: enhance mode 4 precision */
317         case 4:
318                 create_pit_timer(ps, val, 0);
319                 break;
320         case 2:
321         case 3:
322                 create_pit_timer(ps, val, 1);
323                 break;
324         default:
325                 destroy_pit_timer(&ps->pit_timer);
326         }
327 }
328
329 void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val)
330 {
331         mutex_lock(&kvm->arch.vpit->pit_state.lock);
332         pit_load_count(kvm, channel, val);
333         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
334 }
335
336 static void pit_ioport_write(struct kvm_io_device *this,
337                              gpa_t addr, int len, const void *data)
338 {
339         struct kvm_pit *pit = (struct kvm_pit *)this->private;
340         struct kvm_kpit_state *pit_state = &pit->pit_state;
341         struct kvm *kvm = pit->kvm;
342         int channel, access;
343         struct kvm_kpit_channel_state *s;
344         u32 val = *(u32 *) data;
345
346         val  &= 0xff;
347         addr &= KVM_PIT_CHANNEL_MASK;
348
349         mutex_lock(&pit_state->lock);
350
351         if (val != 0)
352                 pr_debug("pit: write addr is 0x%x, len is %d, val is 0x%x\n",
353                           (unsigned int)addr, len, val);
354
355         if (addr == 3) {
356                 channel = val >> 6;
357                 if (channel == 3) {
358                         /* Read-Back Command. */
359                         for (channel = 0; channel < 3; channel++) {
360                                 s = &pit_state->channels[channel];
361                                 if (val & (2 << channel)) {
362                                         if (!(val & 0x20))
363                                                 pit_latch_count(kvm, channel);
364                                         if (!(val & 0x10))
365                                                 pit_latch_status(kvm, channel);
366                                 }
367                         }
368                 } else {
369                         /* Select Counter <channel>. */
370                         s = &pit_state->channels[channel];
371                         access = (val >> 4) & KVM_PIT_CHANNEL_MASK;
372                         if (access == 0) {
373                                 pit_latch_count(kvm, channel);
374                         } else {
375                                 s->rw_mode = access;
376                                 s->read_state = access;
377                                 s->write_state = access;
378                                 s->mode = (val >> 1) & 7;
379                                 if (s->mode > 5)
380                                         s->mode -= 4;
381                                 s->bcd = val & 1;
382                         }
383                 }
384         } else {
385                 /* Write Count. */
386                 s = &pit_state->channels[addr];
387                 switch (s->write_state) {
388                 default:
389                 case RW_STATE_LSB:
390                         pit_load_count(kvm, addr, val);
391                         break;
392                 case RW_STATE_MSB:
393                         pit_load_count(kvm, addr, val << 8);
394                         break;
395                 case RW_STATE_WORD0:
396                         s->write_latch = val;
397                         s->write_state = RW_STATE_WORD1;
398                         break;
399                 case RW_STATE_WORD1:
400                         pit_load_count(kvm, addr, s->write_latch | (val << 8));
401                         s->write_state = RW_STATE_WORD0;
402                         break;
403                 }
404         }
405
406         mutex_unlock(&pit_state->lock);
407 }
408
409 static void pit_ioport_read(struct kvm_io_device *this,
410                             gpa_t addr, int len, void *data)
411 {
412         struct kvm_pit *pit = (struct kvm_pit *)this->private;
413         struct kvm_kpit_state *pit_state = &pit->pit_state;
414         struct kvm *kvm = pit->kvm;
415         int ret, count;
416         struct kvm_kpit_channel_state *s;
417
418         addr &= KVM_PIT_CHANNEL_MASK;
419         s = &pit_state->channels[addr];
420
421         mutex_lock(&pit_state->lock);
422
423         if (s->status_latched) {
424                 s->status_latched = 0;
425                 ret = s->status;
426         } else if (s->count_latched) {
427                 switch (s->count_latched) {
428                 default:
429                 case RW_STATE_LSB:
430                         ret = s->latched_count & 0xff;
431                         s->count_latched = 0;
432                         break;
433                 case RW_STATE_MSB:
434                         ret = s->latched_count >> 8;
435                         s->count_latched = 0;
436                         break;
437                 case RW_STATE_WORD0:
438                         ret = s->latched_count & 0xff;
439                         s->count_latched = RW_STATE_MSB;
440                         break;
441                 }
442         } else {
443                 switch (s->read_state) {
444                 default:
445                 case RW_STATE_LSB:
446                         count = pit_get_count(kvm, addr);
447                         ret = count & 0xff;
448                         break;
449                 case RW_STATE_MSB:
450                         count = pit_get_count(kvm, addr);
451                         ret = (count >> 8) & 0xff;
452                         break;
453                 case RW_STATE_WORD0:
454                         count = pit_get_count(kvm, addr);
455                         ret = count & 0xff;
456                         s->read_state = RW_STATE_WORD1;
457                         break;
458                 case RW_STATE_WORD1:
459                         count = pit_get_count(kvm, addr);
460                         ret = (count >> 8) & 0xff;
461                         s->read_state = RW_STATE_WORD0;
462                         break;
463                 }
464         }
465
466         if (len > sizeof(ret))
467                 len = sizeof(ret);
468         memcpy(data, (char *)&ret, len);
469
470         mutex_unlock(&pit_state->lock);
471 }
472
473 static int pit_in_range(struct kvm_io_device *this, gpa_t addr,
474                         int len, int is_write)
475 {
476         return ((addr >= KVM_PIT_BASE_ADDRESS) &&
477                 (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH));
478 }
479
480 static void speaker_ioport_write(struct kvm_io_device *this,
481                                  gpa_t addr, int len, const void *data)
482 {
483         struct kvm_pit *pit = (struct kvm_pit *)this->private;
484         struct kvm_kpit_state *pit_state = &pit->pit_state;
485         struct kvm *kvm = pit->kvm;
486         u32 val = *(u32 *) data;
487
488         mutex_lock(&pit_state->lock);
489         pit_state->speaker_data_on = (val >> 1) & 1;
490         pit_set_gate(kvm, 2, val & 1);
491         mutex_unlock(&pit_state->lock);
492 }
493
494 static void speaker_ioport_read(struct kvm_io_device *this,
495                                 gpa_t addr, int len, void *data)
496 {
497         struct kvm_pit *pit = (struct kvm_pit *)this->private;
498         struct kvm_kpit_state *pit_state = &pit->pit_state;
499         struct kvm *kvm = pit->kvm;
500         unsigned int refresh_clock;
501         int ret;
502
503         /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */
504         refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1;
505
506         mutex_lock(&pit_state->lock);
507         ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) |
508                 (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4));
509         if (len > sizeof(ret))
510                 len = sizeof(ret);
511         memcpy(data, (char *)&ret, len);
512         mutex_unlock(&pit_state->lock);
513 }
514
515 static int speaker_in_range(struct kvm_io_device *this, gpa_t addr,
516                             int len, int is_write)
517 {
518         return (addr == KVM_SPEAKER_BASE_ADDRESS);
519 }
520
521 void kvm_pit_reset(struct kvm_pit *pit)
522 {
523         int i;
524         struct kvm_kpit_channel_state *c;
525
526         mutex_lock(&pit->pit_state.lock);
527         for (i = 0; i < 3; i++) {
528                 c = &pit->pit_state.channels[i];
529                 c->mode = 0xff;
530                 c->gate = (i != 2);
531                 pit_load_count(pit->kvm, i, 0);
532         }
533         mutex_unlock(&pit->pit_state.lock);
534
535         atomic_set(&pit->pit_state.pit_timer.pending, 0);
536         pit->pit_state.irq_ack = 1;
537 }
538
539 struct kvm_pit *kvm_create_pit(struct kvm *kvm)
540 {
541         struct kvm_pit *pit;
542         struct kvm_kpit_state *pit_state;
543
544         pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);
545         if (!pit)
546                 return NULL;
547
548         mutex_init(&pit->pit_state.lock);
549         mutex_lock(&pit->pit_state.lock);
550         spin_lock_init(&pit->pit_state.inject_lock);
551
552         /* Initialize PIO device */
553         pit->dev.read = pit_ioport_read;
554         pit->dev.write = pit_ioport_write;
555         pit->dev.in_range = pit_in_range;
556         pit->dev.private = pit;
557         kvm_io_bus_register_dev(&kvm->pio_bus, &pit->dev);
558
559         pit->speaker_dev.read = speaker_ioport_read;
560         pit->speaker_dev.write = speaker_ioport_write;
561         pit->speaker_dev.in_range = speaker_in_range;
562         pit->speaker_dev.private = pit;
563         kvm_io_bus_register_dev(&kvm->pio_bus, &pit->speaker_dev);
564
565         kvm->arch.vpit = pit;
566         pit->kvm = kvm;
567
568         pit_state = &pit->pit_state;
569         pit_state->pit = pit;
570         hrtimer_init(&pit_state->pit_timer.timer,
571                      CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
572         pit_state->irq_ack_notifier.gsi = 0;
573         pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq;
574         kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
575         mutex_unlock(&pit->pit_state.lock);
576
577         kvm_pit_reset(pit);
578
579         return pit;
580 }
581
582 void kvm_free_pit(struct kvm *kvm)
583 {
584         struct hrtimer *timer;
585
586         if (kvm->arch.vpit) {
587                 mutex_lock(&kvm->arch.vpit->pit_state.lock);
588                 timer = &kvm->arch.vpit->pit_state.pit_timer.timer;
589                 hrtimer_cancel(timer);
590                 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
591                 kfree(kvm->arch.vpit);
592         }
593 }
594
595 static void __inject_pit_timer_intr(struct kvm *kvm)
596 {
597         mutex_lock(&kvm->lock);
598         kvm_set_irq(kvm, 0, 1);
599         kvm_set_irq(kvm, 0, 0);
600         mutex_unlock(&kvm->lock);
601 }
602
603 void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu)
604 {
605         struct kvm_pit *pit = vcpu->kvm->arch.vpit;
606         struct kvm *kvm = vcpu->kvm;
607         struct kvm_kpit_state *ps;
608
609         if (vcpu && pit) {
610                 int inject = 0;
611                 ps = &pit->pit_state;
612
613                 /* Try to inject pending interrupts when
614                  * last one has been acked.
615                  */
616                 spin_lock(&ps->inject_lock);
617                 if (atomic_read(&ps->pit_timer.pending) && ps->irq_ack) {
618                         ps->irq_ack = 0;
619                         inject = 1;
620                 }
621                 spin_unlock(&ps->inject_lock);
622                 if (inject)
623                         __inject_pit_timer_intr(kvm);
624         }
625 }