Merge branch 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6.git] / arch / x86 / kernel / i387.c
1 /*
2  *  Copyright (C) 1994 Linus Torvalds
3  *
4  *  Pentium III FXSR, SSE support
5  *  General FPU state handling cleanups
6  *      Gareth Hughes <gareth@valinux.com>, May 2000
7  */
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
11 #include <linux/slab.h>
12
13 #include <asm/sigcontext.h>
14 #include <asm/processor.h>
15 #include <asm/math_emu.h>
16 #include <asm/uaccess.h>
17 #include <asm/ptrace.h>
18 #include <asm/i387.h>
19 #include <asm/user.h>
20
21 #ifdef CONFIG_X86_64
22 # include <asm/sigcontext32.h>
23 # include <asm/user32.h>
24 #else
25 # define save_i387_xstate_ia32          save_i387_xstate
26 # define restore_i387_xstate_ia32       restore_i387_xstate
27 # define _fpstate_ia32          _fpstate
28 # define _xstate_ia32           _xstate
29 # define sig_xstate_ia32_size   sig_xstate_size
30 # define fx_sw_reserved_ia32    fx_sw_reserved
31 # define user_i387_ia32_struct  user_i387_struct
32 # define user32_fxsr_struct     user_fxsr_struct
33 #endif
34
35 #ifdef CONFIG_MATH_EMULATION
36 # define HAVE_HWFP              (boot_cpu_data.hard_math)
37 #else
38 # define HAVE_HWFP              1
39 #endif
40
41 static unsigned int             mxcsr_feature_mask __read_mostly = 0xffffffffu;
42 unsigned int xstate_size;
43 EXPORT_SYMBOL_GPL(xstate_size);
44 unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
45 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
46
47 void __cpuinit mxcsr_feature_mask_init(void)
48 {
49         unsigned long mask = 0;
50
51         clts();
52         if (cpu_has_fxsr) {
53                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
54                 asm volatile("fxsave %0" : : "m" (fx_scratch));
55                 mask = fx_scratch.mxcsr_mask;
56                 if (mask == 0)
57                         mask = 0x0000ffbf;
58         }
59         mxcsr_feature_mask &= mask;
60         stts();
61 }
62
63 static void __cpuinit init_thread_xstate(void)
64 {
65         /*
66          * Note that xstate_size might be overwriten later during
67          * xsave_init().
68          */
69
70         if (!HAVE_HWFP) {
71                 /*
72                  * Disable xsave as we do not support it if i387
73                  * emulation is enabled.
74                  */
75                 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
76                 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
77                 xstate_size = sizeof(struct i387_soft_struct);
78                 return;
79         }
80
81         if (cpu_has_fxsr)
82                 xstate_size = sizeof(struct i387_fxsave_struct);
83         else
84                 xstate_size = sizeof(struct i387_fsave_struct);
85 }
86
87 /*
88  * Called at bootup to set up the initial FPU state that is later cloned
89  * into all processes.
90  */
91
92 void __cpuinit fpu_init(void)
93 {
94         unsigned long cr0;
95         unsigned long cr4_mask = 0;
96
97         if (cpu_has_fxsr)
98                 cr4_mask |= X86_CR4_OSFXSR;
99         if (cpu_has_xmm)
100                 cr4_mask |= X86_CR4_OSXMMEXCPT;
101         if (cr4_mask)
102                 set_in_cr4(cr4_mask);
103
104         cr0 = read_cr0();
105         cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
106         if (!HAVE_HWFP)
107                 cr0 |= X86_CR0_EM;
108         write_cr0(cr0);
109
110         if (!smp_processor_id())
111                 init_thread_xstate();
112
113         mxcsr_feature_mask_init();
114         /* clean state in init */
115         current_thread_info()->status = 0;
116         clear_used_math();
117 }
118
119 void fpu_finit(struct fpu *fpu)
120 {
121         if (!HAVE_HWFP) {
122                 finit_soft_fpu(&fpu->state->soft);
123                 return;
124         }
125
126         if (cpu_has_fxsr) {
127                 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
128
129                 memset(fx, 0, xstate_size);
130                 fx->cwd = 0x37f;
131                 if (cpu_has_xmm)
132                         fx->mxcsr = MXCSR_DEFAULT;
133         } else {
134                 struct i387_fsave_struct *fp = &fpu->state->fsave;
135                 memset(fp, 0, xstate_size);
136                 fp->cwd = 0xffff037fu;
137                 fp->swd = 0xffff0000u;
138                 fp->twd = 0xffffffffu;
139                 fp->fos = 0xffff0000u;
140         }
141 }
142 EXPORT_SYMBOL_GPL(fpu_finit);
143
144 /*
145  * The _current_ task is using the FPU for the first time
146  * so initialize it and set the mxcsr to its default
147  * value at reset if we support XMM instructions and then
148  * remeber the current task has used the FPU.
149  */
150 int init_fpu(struct task_struct *tsk)
151 {
152         int ret;
153
154         if (tsk_used_math(tsk)) {
155                 if (HAVE_HWFP && tsk == current)
156                         unlazy_fpu(tsk);
157                 return 0;
158         }
159
160         /*
161          * Memory allocation at the first usage of the FPU and other state.
162          */
163         ret = fpu_alloc(&tsk->thread.fpu);
164         if (ret)
165                 return ret;
166
167         fpu_finit(&tsk->thread.fpu);
168
169         set_stopped_child_used_math(tsk);
170         return 0;
171 }
172
173 /*
174  * The xstateregs_active() routine is the same as the fpregs_active() routine,
175  * as the "regset->n" for the xstate regset will be updated based on the feature
176  * capabilites supported by the xsave.
177  */
178 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
179 {
180         return tsk_used_math(target) ? regset->n : 0;
181 }
182
183 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
184 {
185         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
186 }
187
188 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
189                 unsigned int pos, unsigned int count,
190                 void *kbuf, void __user *ubuf)
191 {
192         int ret;
193
194         if (!cpu_has_fxsr)
195                 return -ENODEV;
196
197         ret = init_fpu(target);
198         if (ret)
199                 return ret;
200
201         sanitize_i387_state(target);
202
203         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
204                                    &target->thread.fpu.state->fxsave, 0, -1);
205 }
206
207 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
208                 unsigned int pos, unsigned int count,
209                 const void *kbuf, const void __user *ubuf)
210 {
211         int ret;
212
213         if (!cpu_has_fxsr)
214                 return -ENODEV;
215
216         ret = init_fpu(target);
217         if (ret)
218                 return ret;
219
220         sanitize_i387_state(target);
221
222         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
223                                  &target->thread.fpu.state->fxsave, 0, -1);
224
225         /*
226          * mxcsr reserved bits must be masked to zero for security reasons.
227          */
228         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
229
230         /*
231          * update the header bits in the xsave header, indicating the
232          * presence of FP and SSE state.
233          */
234         if (cpu_has_xsave)
235                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
236
237         return ret;
238 }
239
240 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
241                 unsigned int pos, unsigned int count,
242                 void *kbuf, void __user *ubuf)
243 {
244         int ret;
245
246         if (!cpu_has_xsave)
247                 return -ENODEV;
248
249         ret = init_fpu(target);
250         if (ret)
251                 return ret;
252
253         /*
254          * Copy the 48bytes defined by the software first into the xstate
255          * memory layout in the thread struct, so that we can copy the entire
256          * xstateregs to the user using one user_regset_copyout().
257          */
258         memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
259                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
260
261         /*
262          * Copy the xstate memory layout.
263          */
264         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
265                                   &target->thread.fpu.state->xsave, 0, -1);
266         return ret;
267 }
268
269 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
270                   unsigned int pos, unsigned int count,
271                   const void *kbuf, const void __user *ubuf)
272 {
273         int ret;
274         struct xsave_hdr_struct *xsave_hdr;
275
276         if (!cpu_has_xsave)
277                 return -ENODEV;
278
279         ret = init_fpu(target);
280         if (ret)
281                 return ret;
282
283         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
284                                  &target->thread.fpu.state->xsave, 0, -1);
285
286         /*
287          * mxcsr reserved bits must be masked to zero for security reasons.
288          */
289         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
290
291         xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
292
293         xsave_hdr->xstate_bv &= pcntxt_mask;
294         /*
295          * These bits must be zero.
296          */
297         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
298
299         return ret;
300 }
301
302 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
303
304 /*
305  * FPU tag word conversions.
306  */
307
308 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
309 {
310         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
311
312         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
313         tmp = ~twd;
314         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
315         /* and move the valid bits to the lower byte. */
316         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
317         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
318         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
319
320         return tmp;
321 }
322
323 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16);
324 #define FP_EXP_TAG_VALID        0
325 #define FP_EXP_TAG_ZERO         1
326 #define FP_EXP_TAG_SPECIAL      2
327 #define FP_EXP_TAG_EMPTY        3
328
329 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
330 {
331         struct _fpxreg *st;
332         u32 tos = (fxsave->swd >> 11) & 7;
333         u32 twd = (unsigned long) fxsave->twd;
334         u32 tag;
335         u32 ret = 0xffff0000u;
336         int i;
337
338         for (i = 0; i < 8; i++, twd >>= 1) {
339                 if (twd & 0x1) {
340                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
341
342                         switch (st->exponent & 0x7fff) {
343                         case 0x7fff:
344                                 tag = FP_EXP_TAG_SPECIAL;
345                                 break;
346                         case 0x0000:
347                                 if (!st->significand[0] &&
348                                     !st->significand[1] &&
349                                     !st->significand[2] &&
350                                     !st->significand[3])
351                                         tag = FP_EXP_TAG_ZERO;
352                                 else
353                                         tag = FP_EXP_TAG_SPECIAL;
354                                 break;
355                         default:
356                                 if (st->significand[3] & 0x8000)
357                                         tag = FP_EXP_TAG_VALID;
358                                 else
359                                         tag = FP_EXP_TAG_SPECIAL;
360                                 break;
361                         }
362                 } else {
363                         tag = FP_EXP_TAG_EMPTY;
364                 }
365                 ret |= tag << (2 * i);
366         }
367         return ret;
368 }
369
370 /*
371  * FXSR floating point environment conversions.
372  */
373
374 static void
375 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
376 {
377         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
378         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
379         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
380         int i;
381
382         env->cwd = fxsave->cwd | 0xffff0000u;
383         env->swd = fxsave->swd | 0xffff0000u;
384         env->twd = twd_fxsr_to_i387(fxsave);
385
386 #ifdef CONFIG_X86_64
387         env->fip = fxsave->rip;
388         env->foo = fxsave->rdp;
389         /*
390          * should be actually ds/cs at fpu exception time, but
391          * that information is not available in 64bit mode.
392          */
393         env->fcs = task_pt_regs(tsk)->cs;
394         if (tsk == current) {
395                 savesegment(ds, env->fos);
396         } else {
397                 env->fos = tsk->thread.ds;
398         }
399         env->fos |= 0xffff0000;
400 #else
401         env->fip = fxsave->fip;
402         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
403         env->foo = fxsave->foo;
404         env->fos = fxsave->fos;
405 #endif
406
407         for (i = 0; i < 8; ++i)
408                 memcpy(&to[i], &from[i], sizeof(to[0]));
409 }
410
411 static void convert_to_fxsr(struct task_struct *tsk,
412                             const struct user_i387_ia32_struct *env)
413
414 {
415         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
416         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
417         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
418         int i;
419
420         fxsave->cwd = env->cwd;
421         fxsave->swd = env->swd;
422         fxsave->twd = twd_i387_to_fxsr(env->twd);
423         fxsave->fop = (u16) ((u32) env->fcs >> 16);
424 #ifdef CONFIG_X86_64
425         fxsave->rip = env->fip;
426         fxsave->rdp = env->foo;
427         /* cs and ds ignored */
428 #else
429         fxsave->fip = env->fip;
430         fxsave->fcs = (env->fcs & 0xffff);
431         fxsave->foo = env->foo;
432         fxsave->fos = env->fos;
433 #endif
434
435         for (i = 0; i < 8; ++i)
436                 memcpy(&to[i], &from[i], sizeof(from[0]));
437 }
438
439 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
440                unsigned int pos, unsigned int count,
441                void *kbuf, void __user *ubuf)
442 {
443         struct user_i387_ia32_struct env;
444         int ret;
445
446         ret = init_fpu(target);
447         if (ret)
448                 return ret;
449
450         if (!HAVE_HWFP)
451                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
452
453         if (!cpu_has_fxsr) {
454                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
455                                            &target->thread.fpu.state->fsave, 0,
456                                            -1);
457         }
458
459         sanitize_i387_state(target);
460
461         if (kbuf && pos == 0 && count == sizeof(env)) {
462                 convert_from_fxsr(kbuf, target);
463                 return 0;
464         }
465
466         convert_from_fxsr(&env, target);
467
468         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
469 }
470
471 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
472                unsigned int pos, unsigned int count,
473                const void *kbuf, const void __user *ubuf)
474 {
475         struct user_i387_ia32_struct env;
476         int ret;
477
478         ret = init_fpu(target);
479         if (ret)
480                 return ret;
481
482         sanitize_i387_state(target);
483
484         if (!HAVE_HWFP)
485                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
486
487         if (!cpu_has_fxsr) {
488                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
489                                           &target->thread.fpu.state->fsave, 0, -1);
490         }
491
492         if (pos > 0 || count < sizeof(env))
493                 convert_from_fxsr(&env, target);
494
495         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
496         if (!ret)
497                 convert_to_fxsr(target, &env);
498
499         /*
500          * update the header bit in the xsave header, indicating the
501          * presence of FP.
502          */
503         if (cpu_has_xsave)
504                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
505         return ret;
506 }
507
508 /*
509  * Signal frame handlers.
510  */
511
512 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
513 {
514         struct task_struct *tsk = current;
515         struct i387_fsave_struct *fp = &tsk->thread.fpu.state->fsave;
516
517         fp->status = fp->swd;
518         if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
519                 return -1;
520         return 1;
521 }
522
523 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
524 {
525         struct task_struct *tsk = current;
526         struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave;
527         struct user_i387_ia32_struct env;
528         int err = 0;
529
530         convert_from_fxsr(&env, tsk);
531         if (__copy_to_user(buf, &env, sizeof(env)))
532                 return -1;
533
534         err |= __put_user(fx->swd, &buf->status);
535         err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
536         if (err)
537                 return -1;
538
539         if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
540                 return -1;
541         return 1;
542 }
543
544 static int save_i387_xsave(void __user *buf)
545 {
546         struct task_struct *tsk = current;
547         struct _fpstate_ia32 __user *fx = buf;
548         int err = 0;
549
550
551         sanitize_i387_state(tsk);
552
553         /*
554          * For legacy compatible, we always set FP/SSE bits in the bit
555          * vector while saving the state to the user context.
556          * This will enable us capturing any changes(during sigreturn) to
557          * the FP/SSE bits by the legacy applications which don't touch
558          * xstate_bv in the xsave header.
559          *
560          * xsave aware applications can change the xstate_bv in the xsave
561          * header as well as change any contents in the memory layout.
562          * xrestore as part of sigreturn will capture all the changes.
563          */
564         tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
565
566         if (save_i387_fxsave(fx) < 0)
567                 return -1;
568
569         err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
570                              sizeof(struct _fpx_sw_bytes));
571         err |= __put_user(FP_XSTATE_MAGIC2,
572                           (__u32 __user *) (buf + sig_xstate_ia32_size
573                                             - FP_XSTATE_MAGIC2_SIZE));
574         if (err)
575                 return -1;
576
577         return 1;
578 }
579
580 int save_i387_xstate_ia32(void __user *buf)
581 {
582         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
583         struct task_struct *tsk = current;
584
585         if (!used_math())
586                 return 0;
587
588         if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
589                 return -EACCES;
590         /*
591          * This will cause a "finit" to be triggered by the next
592          * attempted FPU operation by the 'current' process.
593          */
594         clear_used_math();
595
596         if (!HAVE_HWFP) {
597                 return fpregs_soft_get(current, NULL,
598                                        0, sizeof(struct user_i387_ia32_struct),
599                                        NULL, fp) ? -1 : 1;
600         }
601
602         unlazy_fpu(tsk);
603
604         if (cpu_has_xsave)
605                 return save_i387_xsave(fp);
606         if (cpu_has_fxsr)
607                 return save_i387_fxsave(fp);
608         else
609                 return save_i387_fsave(fp);
610 }
611
612 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
613 {
614         struct task_struct *tsk = current;
615
616         return __copy_from_user(&tsk->thread.fpu.state->fsave, buf,
617                                 sizeof(struct i387_fsave_struct));
618 }
619
620 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
621                                unsigned int size)
622 {
623         struct task_struct *tsk = current;
624         struct user_i387_ia32_struct env;
625         int err;
626
627         err = __copy_from_user(&tsk->thread.fpu.state->fxsave, &buf->_fxsr_env[0],
628                                size);
629         /* mxcsr reserved bits must be masked to zero for security reasons */
630         tsk->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
631         if (err || __copy_from_user(&env, buf, sizeof(env)))
632                 return 1;
633         convert_to_fxsr(tsk, &env);
634
635         return 0;
636 }
637
638 static int restore_i387_xsave(void __user *buf)
639 {
640         struct _fpx_sw_bytes fx_sw_user;
641         struct _fpstate_ia32 __user *fx_user =
642                         ((struct _fpstate_ia32 __user *) buf);
643         struct i387_fxsave_struct __user *fx =
644                 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
645         struct xsave_hdr_struct *xsave_hdr =
646                                 &current->thread.fpu.state->xsave.xsave_hdr;
647         u64 mask;
648         int err;
649
650         if (check_for_xstate(fx, buf, &fx_sw_user))
651                 goto fx_only;
652
653         mask = fx_sw_user.xstate_bv;
654
655         err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
656
657         xsave_hdr->xstate_bv &= pcntxt_mask;
658         /*
659          * These bits must be zero.
660          */
661         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
662
663         /*
664          * Init the state that is not present in the memory layout
665          * and enabled by the OS.
666          */
667         mask = ~(pcntxt_mask & ~mask);
668         xsave_hdr->xstate_bv &= mask;
669
670         return err;
671 fx_only:
672         /*
673          * Couldn't find the extended state information in the memory
674          * layout. Restore the FP/SSE and init the other extended state
675          * enabled by the OS.
676          */
677         xsave_hdr->xstate_bv = XSTATE_FPSSE;
678         return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
679 }
680
681 int restore_i387_xstate_ia32(void __user *buf)
682 {
683         int err;
684         struct task_struct *tsk = current;
685         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
686
687         if (HAVE_HWFP)
688                 clear_fpu(tsk);
689
690         if (!buf) {
691                 if (used_math()) {
692                         clear_fpu(tsk);
693                         clear_used_math();
694                 }
695
696                 return 0;
697         } else
698                 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
699                         return -EACCES;
700
701         if (!used_math()) {
702                 err = init_fpu(tsk);
703                 if (err)
704                         return err;
705         }
706
707         if (HAVE_HWFP) {
708                 if (cpu_has_xsave)
709                         err = restore_i387_xsave(buf);
710                 else if (cpu_has_fxsr)
711                         err = restore_i387_fxsave(fp, sizeof(struct
712                                                            i387_fxsave_struct));
713                 else
714                         err = restore_i387_fsave(fp);
715         } else {
716                 err = fpregs_soft_set(current, NULL,
717                                       0, sizeof(struct user_i387_ia32_struct),
718                                       NULL, fp) != 0;
719         }
720         set_used_math();
721
722         return err;
723 }
724
725 /*
726  * FPU state for core dumps.
727  * This is only used for a.out dumps now.
728  * It is declared generically using elf_fpregset_t (which is
729  * struct user_i387_struct) but is in fact only used for 32-bit
730  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
731  */
732 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
733 {
734         struct task_struct *tsk = current;
735         int fpvalid;
736
737         fpvalid = !!used_math();
738         if (fpvalid)
739                 fpvalid = !fpregs_get(tsk, NULL,
740                                       0, sizeof(struct user_i387_ia32_struct),
741                                       fpu, NULL);
742
743         return fpvalid;
744 }
745 EXPORT_SYMBOL(dump_fpu);
746
747 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */