648b3a2a3a440afe542bd8caf3fd46c6641ebc29
[linux-2.6.git] / arch / x86 / kernel / hpet.c
1 #include <linux/clocksource.h>
2 #include <linux/clockchips.h>
3 #include <linux/interrupt.h>
4 #include <linux/sysdev.h>
5 #include <linux/delay.h>
6 #include <linux/errno.h>
7 #include <linux/hpet.h>
8 #include <linux/init.h>
9 #include <linux/cpu.h>
10 #include <linux/pm.h>
11 #include <linux/io.h>
12
13 #include <asm/fixmap.h>
14 #include <asm/i8253.h>
15 #include <asm/hpet.h>
16
17 #define HPET_MASK                       CLOCKSOURCE_MASK(32)
18 #define HPET_SHIFT                      22
19
20 /* FSEC = 10^-15
21    NSEC = 10^-9 */
22 #define FSEC_PER_NSEC                   1000000L
23
24 #define HPET_DEV_USED_BIT               2
25 #define HPET_DEV_USED                   (1 << HPET_DEV_USED_BIT)
26 #define HPET_DEV_VALID                  0x8
27 #define HPET_DEV_FSB_CAP                0x1000
28 #define HPET_DEV_PERI_CAP               0x2000
29
30 #define EVT_TO_HPET_DEV(evt) container_of(evt, struct hpet_dev, evt)
31
32 /*
33  * HPET address is set in acpi/boot.c, when an ACPI entry exists
34  */
35 unsigned long                           hpet_address;
36 #ifdef CONFIG_PCI_MSI
37 static unsigned long                    hpet_num_timers;
38 #endif
39 static void __iomem                     *hpet_virt_address;
40
41 struct hpet_dev {
42         struct clock_event_device       evt;
43         unsigned int                    num;
44         int                             cpu;
45         unsigned int                    irq;
46         unsigned int                    flags;
47         char                            name[10];
48 };
49
50 unsigned long hpet_readl(unsigned long a)
51 {
52         return readl(hpet_virt_address + a);
53 }
54
55 static inline void hpet_writel(unsigned long d, unsigned long a)
56 {
57         writel(d, hpet_virt_address + a);
58 }
59
60 #ifdef CONFIG_X86_64
61 #include <asm/pgtable.h>
62 #endif
63
64 static inline void hpet_set_mapping(void)
65 {
66         hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
67 #ifdef CONFIG_X86_64
68         __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
69 #endif
70 }
71
72 static inline void hpet_clear_mapping(void)
73 {
74         iounmap(hpet_virt_address);
75         hpet_virt_address = NULL;
76 }
77
78 /*
79  * HPET command line enable / disable
80  */
81 static int boot_hpet_disable;
82 int hpet_force_user;
83 static int hpet_verbose;
84
85 static int __init hpet_setup(char *str)
86 {
87         if (str) {
88                 if (!strncmp("disable", str, 7))
89                         boot_hpet_disable = 1;
90                 if (!strncmp("force", str, 5))
91                         hpet_force_user = 1;
92                 if (!strncmp("verbose", str, 7))
93                         hpet_verbose = 1;
94         }
95         return 1;
96 }
97 __setup("hpet=", hpet_setup);
98
99 static int __init disable_hpet(char *str)
100 {
101         boot_hpet_disable = 1;
102         return 1;
103 }
104 __setup("nohpet", disable_hpet);
105
106 static inline int is_hpet_capable(void)
107 {
108         return !boot_hpet_disable && hpet_address;
109 }
110
111 /*
112  * HPET timer interrupt enable / disable
113  */
114 static int hpet_legacy_int_enabled;
115
116 /**
117  * is_hpet_enabled - check whether the hpet timer interrupt is enabled
118  */
119 int is_hpet_enabled(void)
120 {
121         return is_hpet_capable() && hpet_legacy_int_enabled;
122 }
123 EXPORT_SYMBOL_GPL(is_hpet_enabled);
124
125 static void _hpet_print_config(const char *function, int line)
126 {
127         u32 i, timers, l, h;
128         printk(KERN_INFO "hpet: %s(%d):\n", function, line);
129         l = hpet_readl(HPET_ID);
130         h = hpet_readl(HPET_PERIOD);
131         timers = ((l & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
132         printk(KERN_INFO "hpet: ID: 0x%x, PERIOD: 0x%x\n", l, h);
133         l = hpet_readl(HPET_CFG);
134         h = hpet_readl(HPET_STATUS);
135         printk(KERN_INFO "hpet: CFG: 0x%x, STATUS: 0x%x\n", l, h);
136         l = hpet_readl(HPET_COUNTER);
137         h = hpet_readl(HPET_COUNTER+4);
138         printk(KERN_INFO "hpet: COUNTER_l: 0x%x, COUNTER_h: 0x%x\n", l, h);
139
140         for (i = 0; i < timers; i++) {
141                 l = hpet_readl(HPET_Tn_CFG(i));
142                 h = hpet_readl(HPET_Tn_CFG(i)+4);
143                 printk(KERN_INFO "hpet: T%d: CFG_l: 0x%x, CFG_h: 0x%x\n",
144                        i, l, h);
145                 l = hpet_readl(HPET_Tn_CMP(i));
146                 h = hpet_readl(HPET_Tn_CMP(i)+4);
147                 printk(KERN_INFO "hpet: T%d: CMP_l: 0x%x, CMP_h: 0x%x\n",
148                        i, l, h);
149                 l = hpet_readl(HPET_Tn_ROUTE(i));
150                 h = hpet_readl(HPET_Tn_ROUTE(i)+4);
151                 printk(KERN_INFO "hpet: T%d ROUTE_l: 0x%x, ROUTE_h: 0x%x\n",
152                        i, l, h);
153         }
154 }
155
156 #define hpet_print_config()                                     \
157 do {                                                            \
158         if (hpet_verbose)                                       \
159                 _hpet_print_config(__FUNCTION__, __LINE__);     \
160 } while (0)
161
162 /*
163  * When the hpet driver (/dev/hpet) is enabled, we need to reserve
164  * timer 0 and timer 1 in case of RTC emulation.
165  */
166 #ifdef CONFIG_HPET
167
168 static void hpet_reserve_msi_timers(struct hpet_data *hd);
169
170 static void hpet_reserve_platform_timers(unsigned long id)
171 {
172         struct hpet __iomem *hpet = hpet_virt_address;
173         struct hpet_timer __iomem *timer = &hpet->hpet_timers[2];
174         unsigned int nrtimers, i;
175         struct hpet_data hd;
176
177         nrtimers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
178
179         memset(&hd, 0, sizeof(hd));
180         hd.hd_phys_address      = hpet_address;
181         hd.hd_address           = hpet;
182         hd.hd_nirqs             = nrtimers;
183         hpet_reserve_timer(&hd, 0);
184
185 #ifdef CONFIG_HPET_EMULATE_RTC
186         hpet_reserve_timer(&hd, 1);
187 #endif
188
189         /*
190          * NOTE that hd_irq[] reflects IOAPIC input pins (LEGACY_8254
191          * is wrong for i8259!) not the output IRQ.  Many BIOS writers
192          * don't bother configuring *any* comparator interrupts.
193          */
194         hd.hd_irq[0] = HPET_LEGACY_8254;
195         hd.hd_irq[1] = HPET_LEGACY_RTC;
196
197         for (i = 2; i < nrtimers; timer++, i++) {
198                 hd.hd_irq[i] = (readl(&timer->hpet_config) &
199                         Tn_INT_ROUTE_CNF_MASK) >> Tn_INT_ROUTE_CNF_SHIFT;
200         }
201
202         hpet_reserve_msi_timers(&hd);
203
204         hpet_alloc(&hd);
205
206 }
207 #else
208 static void hpet_reserve_platform_timers(unsigned long id) { }
209 #endif
210
211 /*
212  * Common hpet info
213  */
214 static unsigned long hpet_period;
215
216 static void hpet_legacy_set_mode(enum clock_event_mode mode,
217                           struct clock_event_device *evt);
218 static int hpet_legacy_next_event(unsigned long delta,
219                            struct clock_event_device *evt);
220
221 /*
222  * The hpet clock event device
223  */
224 static struct clock_event_device hpet_clockevent = {
225         .name           = "hpet",
226         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
227         .set_mode       = hpet_legacy_set_mode,
228         .set_next_event = hpet_legacy_next_event,
229         .shift          = 32,
230         .irq            = 0,
231         .rating         = 50,
232 };
233
234 static void hpet_stop_counter(void)
235 {
236         unsigned long cfg = hpet_readl(HPET_CFG);
237         cfg &= ~HPET_CFG_ENABLE;
238         hpet_writel(cfg, HPET_CFG);
239         hpet_writel(0, HPET_COUNTER);
240         hpet_writel(0, HPET_COUNTER + 4);
241 }
242
243 static void hpet_start_counter(void)
244 {
245         unsigned long cfg = hpet_readl(HPET_CFG);
246         cfg |= HPET_CFG_ENABLE;
247         hpet_writel(cfg, HPET_CFG);
248 }
249
250 static void hpet_restart_counter(void)
251 {
252         hpet_stop_counter();
253         hpet_start_counter();
254 }
255
256 static void hpet_resume_device(void)
257 {
258         force_hpet_resume();
259 }
260
261 static void hpet_resume_counter(void)
262 {
263         hpet_resume_device();
264         hpet_restart_counter();
265 }
266
267 static void hpet_enable_legacy_int(void)
268 {
269         unsigned long cfg = hpet_readl(HPET_CFG);
270
271         cfg |= HPET_CFG_LEGACY;
272         hpet_writel(cfg, HPET_CFG);
273         hpet_legacy_int_enabled = 1;
274 }
275
276 static void hpet_legacy_clockevent_register(void)
277 {
278         /* Start HPET legacy interrupts */
279         hpet_enable_legacy_int();
280
281         /*
282          * The mult factor is defined as (include/linux/clockchips.h)
283          *  mult/2^shift = cyc/ns (in contrast to ns/cyc in clocksource.h)
284          * hpet_period is in units of femtoseconds (per cycle), so
285          *  mult/2^shift = cyc/ns = 10^6/hpet_period
286          *  mult = (10^6 * 2^shift)/hpet_period
287          *  mult = (FSEC_PER_NSEC << hpet_clockevent.shift)/hpet_period
288          */
289         hpet_clockevent.mult = div_sc((unsigned long) FSEC_PER_NSEC,
290                                       hpet_period, hpet_clockevent.shift);
291         /* Calculate the min / max delta */
292         hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
293                                                            &hpet_clockevent);
294         /* 5 usec minimum reprogramming delta. */
295         hpet_clockevent.min_delta_ns = 5000;
296
297         /*
298          * Start hpet with the boot cpu mask and make it
299          * global after the IO_APIC has been initialized.
300          */
301         hpet_clockevent.cpumask = cpumask_of(smp_processor_id());
302         clockevents_register_device(&hpet_clockevent);
303         global_clock_event = &hpet_clockevent;
304         printk(KERN_DEBUG "hpet clockevent registered\n");
305 }
306
307 static int hpet_setup_msi_irq(unsigned int irq);
308
309 static void hpet_set_mode(enum clock_event_mode mode,
310                           struct clock_event_device *evt, int timer)
311 {
312         unsigned long cfg;
313         uint64_t delta;
314
315         switch (mode) {
316         case CLOCK_EVT_MODE_PERIODIC:
317                 hpet_stop_counter();
318                 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult;
319                 delta >>= evt->shift;
320                 cfg = hpet_readl(HPET_Tn_CFG(timer));
321                 /* Make sure we use edge triggered interrupts */
322                 cfg &= ~HPET_TN_LEVEL;
323                 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
324                        HPET_TN_SETVAL | HPET_TN_32BIT;
325                 hpet_writel(cfg, HPET_Tn_CFG(timer));
326                 hpet_writel((unsigned long) delta, HPET_Tn_CMP(timer));
327                 hpet_start_counter();
328                 hpet_print_config();
329                 break;
330
331         case CLOCK_EVT_MODE_ONESHOT:
332                 cfg = hpet_readl(HPET_Tn_CFG(timer));
333                 cfg &= ~HPET_TN_PERIODIC;
334                 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
335                 hpet_writel(cfg, HPET_Tn_CFG(timer));
336                 break;
337
338         case CLOCK_EVT_MODE_UNUSED:
339         case CLOCK_EVT_MODE_SHUTDOWN:
340                 cfg = hpet_readl(HPET_Tn_CFG(timer));
341                 cfg &= ~HPET_TN_ENABLE;
342                 hpet_writel(cfg, HPET_Tn_CFG(timer));
343                 break;
344
345         case CLOCK_EVT_MODE_RESUME:
346                 if (timer == 0) {
347                         hpet_enable_legacy_int();
348                 } else {
349                         struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
350                         hpet_setup_msi_irq(hdev->irq);
351                         disable_irq(hdev->irq);
352                         irq_set_affinity(hdev->irq, cpumask_of(hdev->cpu));
353                         enable_irq(hdev->irq);
354                 }
355                 hpet_print_config();
356                 break;
357         }
358 }
359
360 static int hpet_next_event(unsigned long delta,
361                            struct clock_event_device *evt, int timer)
362 {
363         u32 cnt;
364
365         cnt = hpet_readl(HPET_COUNTER);
366         cnt += (u32) delta;
367         hpet_writel(cnt, HPET_Tn_CMP(timer));
368
369         /*
370          * We need to read back the CMP register to make sure that
371          * what we wrote hit the chip before we compare it to the
372          * counter.
373          */
374         WARN_ON_ONCE((u32)hpet_readl(HPET_Tn_CMP(timer)) != cnt);
375
376         return (s32)((u32)hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0;
377 }
378
379 static void hpet_legacy_set_mode(enum clock_event_mode mode,
380                         struct clock_event_device *evt)
381 {
382         hpet_set_mode(mode, evt, 0);
383 }
384
385 static int hpet_legacy_next_event(unsigned long delta,
386                         struct clock_event_device *evt)
387 {
388         return hpet_next_event(delta, evt, 0);
389 }
390
391 /*
392  * HPET MSI Support
393  */
394 #ifdef CONFIG_PCI_MSI
395
396 static DEFINE_PER_CPU(struct hpet_dev *, cpu_hpet_dev);
397 static struct hpet_dev  *hpet_devs;
398
399 void hpet_msi_unmask(unsigned int irq)
400 {
401         struct hpet_dev *hdev = get_irq_data(irq);
402         unsigned long cfg;
403
404         /* unmask it */
405         cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
406         cfg |= HPET_TN_FSB;
407         hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
408 }
409
410 void hpet_msi_mask(unsigned int irq)
411 {
412         unsigned long cfg;
413         struct hpet_dev *hdev = get_irq_data(irq);
414
415         /* mask it */
416         cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
417         cfg &= ~HPET_TN_FSB;
418         hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
419 }
420
421 void hpet_msi_write(unsigned int irq, struct msi_msg *msg)
422 {
423         struct hpet_dev *hdev = get_irq_data(irq);
424
425         hpet_writel(msg->data, HPET_Tn_ROUTE(hdev->num));
426         hpet_writel(msg->address_lo, HPET_Tn_ROUTE(hdev->num) + 4);
427 }
428
429 void hpet_msi_read(unsigned int irq, struct msi_msg *msg)
430 {
431         struct hpet_dev *hdev = get_irq_data(irq);
432
433         msg->data = hpet_readl(HPET_Tn_ROUTE(hdev->num));
434         msg->address_lo = hpet_readl(HPET_Tn_ROUTE(hdev->num) + 4);
435         msg->address_hi = 0;
436 }
437
438 static void hpet_msi_set_mode(enum clock_event_mode mode,
439                                 struct clock_event_device *evt)
440 {
441         struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
442         hpet_set_mode(mode, evt, hdev->num);
443 }
444
445 static int hpet_msi_next_event(unsigned long delta,
446                                 struct clock_event_device *evt)
447 {
448         struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
449         return hpet_next_event(delta, evt, hdev->num);
450 }
451
452 static int hpet_setup_msi_irq(unsigned int irq)
453 {
454         if (arch_setup_hpet_msi(irq)) {
455                 destroy_irq(irq);
456                 return -EINVAL;
457         }
458         return 0;
459 }
460
461 static int hpet_assign_irq(struct hpet_dev *dev)
462 {
463         unsigned int irq;
464
465         irq = create_irq();
466         if (!irq)
467                 return -EINVAL;
468
469         set_irq_data(irq, dev);
470
471         if (hpet_setup_msi_irq(irq))
472                 return -EINVAL;
473
474         dev->irq = irq;
475         return 0;
476 }
477
478 static irqreturn_t hpet_interrupt_handler(int irq, void *data)
479 {
480         struct hpet_dev *dev = (struct hpet_dev *)data;
481         struct clock_event_device *hevt = &dev->evt;
482
483         if (!hevt->event_handler) {
484                 printk(KERN_INFO "Spurious HPET timer interrupt on HPET timer %d\n",
485                                 dev->num);
486                 return IRQ_HANDLED;
487         }
488
489         hevt->event_handler(hevt);
490         return IRQ_HANDLED;
491 }
492
493 static int hpet_setup_irq(struct hpet_dev *dev)
494 {
495
496         if (request_irq(dev->irq, hpet_interrupt_handler,
497                         IRQF_DISABLED|IRQF_NOBALANCING, dev->name, dev))
498                 return -1;
499
500         disable_irq(dev->irq);
501         irq_set_affinity(dev->irq, cpumask_of(dev->cpu));
502         enable_irq(dev->irq);
503
504         printk(KERN_DEBUG "hpet: %s irq %d for MSI\n",
505                          dev->name, dev->irq);
506
507         return 0;
508 }
509
510 /* This should be called in specific @cpu */
511 static void init_one_hpet_msi_clockevent(struct hpet_dev *hdev, int cpu)
512 {
513         struct clock_event_device *evt = &hdev->evt;
514         uint64_t hpet_freq;
515
516         WARN_ON(cpu != smp_processor_id());
517         if (!(hdev->flags & HPET_DEV_VALID))
518                 return;
519
520         if (hpet_setup_msi_irq(hdev->irq))
521                 return;
522
523         hdev->cpu = cpu;
524         per_cpu(cpu_hpet_dev, cpu) = hdev;
525         evt->name = hdev->name;
526         hpet_setup_irq(hdev);
527         evt->irq = hdev->irq;
528
529         evt->rating = 110;
530         evt->features = CLOCK_EVT_FEAT_ONESHOT;
531         if (hdev->flags & HPET_DEV_PERI_CAP)
532                 evt->features |= CLOCK_EVT_FEAT_PERIODIC;
533
534         evt->set_mode = hpet_msi_set_mode;
535         evt->set_next_event = hpet_msi_next_event;
536         evt->shift = 32;
537
538         /*
539          * The period is a femto seconds value. We need to calculate the
540          * scaled math multiplication factor for nanosecond to hpet tick
541          * conversion.
542          */
543         hpet_freq = 1000000000000000ULL;
544         do_div(hpet_freq, hpet_period);
545         evt->mult = div_sc((unsigned long) hpet_freq,
546                                       NSEC_PER_SEC, evt->shift);
547         /* Calculate the max delta */
548         evt->max_delta_ns = clockevent_delta2ns(0x7FFFFFFF, evt);
549         /* 5 usec minimum reprogramming delta. */
550         evt->min_delta_ns = 5000;
551
552         evt->cpumask = cpumask_of(hdev->cpu);
553         clockevents_register_device(evt);
554 }
555
556 #ifdef CONFIG_HPET
557 /* Reserve at least one timer for userspace (/dev/hpet) */
558 #define RESERVE_TIMERS 1
559 #else
560 #define RESERVE_TIMERS 0
561 #endif
562
563 static void hpet_msi_capability_lookup(unsigned int start_timer)
564 {
565         unsigned int id;
566         unsigned int num_timers;
567         unsigned int num_timers_used = 0;
568         int i;
569
570         id = hpet_readl(HPET_ID);
571
572         num_timers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT);
573         num_timers++; /* Value read out starts from 0 */
574         hpet_print_config();
575
576         hpet_devs = kzalloc(sizeof(struct hpet_dev) * num_timers, GFP_KERNEL);
577         if (!hpet_devs)
578                 return;
579
580         hpet_num_timers = num_timers;
581
582         for (i = start_timer; i < num_timers - RESERVE_TIMERS; i++) {
583                 struct hpet_dev *hdev = &hpet_devs[num_timers_used];
584                 unsigned long cfg = hpet_readl(HPET_Tn_CFG(i));
585
586                 /* Only consider HPET timer with MSI support */
587                 if (!(cfg & HPET_TN_FSB_CAP))
588                         continue;
589
590                 hdev->flags = 0;
591                 if (cfg & HPET_TN_PERIODIC_CAP)
592                         hdev->flags |= HPET_DEV_PERI_CAP;
593                 hdev->num = i;
594
595                 sprintf(hdev->name, "hpet%d", i);
596                 if (hpet_assign_irq(hdev))
597                         continue;
598
599                 hdev->flags |= HPET_DEV_FSB_CAP;
600                 hdev->flags |= HPET_DEV_VALID;
601                 num_timers_used++;
602                 if (num_timers_used == num_possible_cpus())
603                         break;
604         }
605
606         printk(KERN_INFO "HPET: %d timers in total, %d timers will be used for per-cpu timer\n",
607                 num_timers, num_timers_used);
608 }
609
610 #ifdef CONFIG_HPET
611 static void hpet_reserve_msi_timers(struct hpet_data *hd)
612 {
613         int i;
614
615         if (!hpet_devs)
616                 return;
617
618         for (i = 0; i < hpet_num_timers; i++) {
619                 struct hpet_dev *hdev = &hpet_devs[i];
620
621                 if (!(hdev->flags & HPET_DEV_VALID))
622                         continue;
623
624                 hd->hd_irq[hdev->num] = hdev->irq;
625                 hpet_reserve_timer(hd, hdev->num);
626         }
627 }
628 #endif
629
630 static struct hpet_dev *hpet_get_unused_timer(void)
631 {
632         int i;
633
634         if (!hpet_devs)
635                 return NULL;
636
637         for (i = 0; i < hpet_num_timers; i++) {
638                 struct hpet_dev *hdev = &hpet_devs[i];
639
640                 if (!(hdev->flags & HPET_DEV_VALID))
641                         continue;
642                 if (test_and_set_bit(HPET_DEV_USED_BIT,
643                         (unsigned long *)&hdev->flags))
644                         continue;
645                 return hdev;
646         }
647         return NULL;
648 }
649
650 struct hpet_work_struct {
651         struct delayed_work work;
652         struct completion complete;
653 };
654
655 static void hpet_work(struct work_struct *w)
656 {
657         struct hpet_dev *hdev;
658         int cpu = smp_processor_id();
659         struct hpet_work_struct *hpet_work;
660
661         hpet_work = container_of(w, struct hpet_work_struct, work.work);
662
663         hdev = hpet_get_unused_timer();
664         if (hdev)
665                 init_one_hpet_msi_clockevent(hdev, cpu);
666
667         complete(&hpet_work->complete);
668 }
669
670 static int hpet_cpuhp_notify(struct notifier_block *n,
671                 unsigned long action, void *hcpu)
672 {
673         unsigned long cpu = (unsigned long)hcpu;
674         struct hpet_work_struct work;
675         struct hpet_dev *hdev = per_cpu(cpu_hpet_dev, cpu);
676
677         switch (action & 0xf) {
678         case CPU_ONLINE:
679                 INIT_DELAYED_WORK_ON_STACK(&work.work, hpet_work);
680                 init_completion(&work.complete);
681                 /* FIXME: add schedule_work_on() */
682                 schedule_delayed_work_on(cpu, &work.work, 0);
683                 wait_for_completion(&work.complete);
684                 destroy_timer_on_stack(&work.work.timer);
685                 break;
686         case CPU_DEAD:
687                 if (hdev) {
688                         free_irq(hdev->irq, hdev);
689                         hdev->flags &= ~HPET_DEV_USED;
690                         per_cpu(cpu_hpet_dev, cpu) = NULL;
691                 }
692                 break;
693         }
694         return NOTIFY_OK;
695 }
696 #else
697
698 static int hpet_setup_msi_irq(unsigned int irq)
699 {
700         return 0;
701 }
702 static void hpet_msi_capability_lookup(unsigned int start_timer)
703 {
704         return;
705 }
706
707 #ifdef CONFIG_HPET
708 static void hpet_reserve_msi_timers(struct hpet_data *hd)
709 {
710         return;
711 }
712 #endif
713
714 static int hpet_cpuhp_notify(struct notifier_block *n,
715                 unsigned long action, void *hcpu)
716 {
717         return NOTIFY_OK;
718 }
719
720 #endif
721
722 /*
723  * Clock source related code
724  */
725 static cycle_t read_hpet(void)
726 {
727         return (cycle_t)hpet_readl(HPET_COUNTER);
728 }
729
730 #ifdef CONFIG_X86_64
731 static cycle_t __vsyscall_fn vread_hpet(void)
732 {
733         return readl((const void __iomem *)fix_to_virt(VSYSCALL_HPET) + 0xf0);
734 }
735 #endif
736
737 static struct clocksource clocksource_hpet = {
738         .name           = "hpet",
739         .rating         = 250,
740         .read           = read_hpet,
741         .mask           = HPET_MASK,
742         .shift          = HPET_SHIFT,
743         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
744         .resume         = hpet_resume_counter,
745 #ifdef CONFIG_X86_64
746         .vread          = vread_hpet,
747 #endif
748 };
749
750 static int hpet_clocksource_register(void)
751 {
752         u64 start, now;
753         cycle_t t1;
754
755         /* Start the counter */
756         hpet_restart_counter();
757
758         /* Verify whether hpet counter works */
759         t1 = read_hpet();
760         rdtscll(start);
761
762         /*
763          * We don't know the TSC frequency yet, but waiting for
764          * 200000 TSC cycles is safe:
765          * 4 GHz == 50us
766          * 1 GHz == 200us
767          */
768         do {
769                 rep_nop();
770                 rdtscll(now);
771         } while ((now - start) < 200000UL);
772
773         if (t1 == read_hpet()) {
774                 printk(KERN_WARNING
775                        "HPET counter not counting. HPET disabled\n");
776                 return -ENODEV;
777         }
778
779         /*
780          * The definition of mult is (include/linux/clocksource.h)
781          * mult/2^shift = ns/cyc and hpet_period is in units of fsec/cyc
782          * so we first need to convert hpet_period to ns/cyc units:
783          *  mult/2^shift = ns/cyc = hpet_period/10^6
784          *  mult = (hpet_period * 2^shift)/10^6
785          *  mult = (hpet_period << shift)/FSEC_PER_NSEC
786          */
787         clocksource_hpet.mult = div_sc(hpet_period, FSEC_PER_NSEC, HPET_SHIFT);
788
789         clocksource_register(&clocksource_hpet);
790
791         return 0;
792 }
793
794 /**
795  * hpet_enable - Try to setup the HPET timer. Returns 1 on success.
796  */
797 int __init hpet_enable(void)
798 {
799         unsigned long id;
800         int i;
801
802         if (!is_hpet_capable())
803                 return 0;
804
805         hpet_set_mapping();
806
807         /*
808          * Read the period and check for a sane value:
809          */
810         hpet_period = hpet_readl(HPET_PERIOD);
811
812         /*
813          * AMD SB700 based systems with spread spectrum enabled use a
814          * SMM based HPET emulation to provide proper frequency
815          * setting. The SMM code is initialized with the first HPET
816          * register access and takes some time to complete. During
817          * this time the config register reads 0xffffffff. We check
818          * for max. 1000 loops whether the config register reads a non
819          * 0xffffffff value to make sure that HPET is up and running
820          * before we go further. A counting loop is safe, as the HPET
821          * access takes thousands of CPU cycles. On non SB700 based
822          * machines this check is only done once and has no side
823          * effects.
824          */
825         for (i = 0; hpet_readl(HPET_CFG) == 0xFFFFFFFF; i++) {
826                 if (i == 1000) {
827                         printk(KERN_WARNING
828                                "HPET config register value = 0xFFFFFFFF. "
829                                "Disabling HPET\n");
830                         goto out_nohpet;
831                 }
832         }
833
834         if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
835                 goto out_nohpet;
836
837         /*
838          * Read the HPET ID register to retrieve the IRQ routing
839          * information and the number of channels
840          */
841         id = hpet_readl(HPET_ID);
842         hpet_print_config();
843
844 #ifdef CONFIG_HPET_EMULATE_RTC
845         /*
846          * The legacy routing mode needs at least two channels, tick timer
847          * and the rtc emulation channel.
848          */
849         if (!(id & HPET_ID_NUMBER))
850                 goto out_nohpet;
851 #endif
852
853         if (hpet_clocksource_register())
854                 goto out_nohpet;
855
856         if (id & HPET_ID_LEGSUP) {
857                 hpet_legacy_clockevent_register();
858                 hpet_msi_capability_lookup(2);
859                 return 1;
860         }
861         hpet_msi_capability_lookup(0);
862         return 0;
863
864 out_nohpet:
865         hpet_clear_mapping();
866         hpet_address = 0;
867         return 0;
868 }
869
870 /*
871  * Needs to be late, as the reserve_timer code calls kalloc !
872  *
873  * Not a problem on i386 as hpet_enable is called from late_time_init,
874  * but on x86_64 it is necessary !
875  */
876 static __init int hpet_late_init(void)
877 {
878         int cpu;
879
880         if (boot_hpet_disable)
881                 return -ENODEV;
882
883         if (!hpet_address) {
884                 if (!force_hpet_address)
885                         return -ENODEV;
886
887                 hpet_address = force_hpet_address;
888                 hpet_enable();
889         }
890
891         if (!hpet_virt_address)
892                 return -ENODEV;
893
894         hpet_reserve_platform_timers(hpet_readl(HPET_ID));
895         hpet_print_config();
896
897         for_each_online_cpu(cpu) {
898                 hpet_cpuhp_notify(NULL, CPU_ONLINE, (void *)(long)cpu);
899         }
900
901         /* This notifier should be called after workqueue is ready */
902         hotcpu_notifier(hpet_cpuhp_notify, -20);
903
904         return 0;
905 }
906 fs_initcall(hpet_late_init);
907
908 void hpet_disable(void)
909 {
910         if (is_hpet_capable()) {
911                 unsigned long cfg = hpet_readl(HPET_CFG);
912
913                 if (hpet_legacy_int_enabled) {
914                         cfg &= ~HPET_CFG_LEGACY;
915                         hpet_legacy_int_enabled = 0;
916                 }
917                 cfg &= ~HPET_CFG_ENABLE;
918                 hpet_writel(cfg, HPET_CFG);
919         }
920 }
921
922 #ifdef CONFIG_HPET_EMULATE_RTC
923
924 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
925  * is enabled, we support RTC interrupt functionality in software.
926  * RTC has 3 kinds of interrupts:
927  * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
928  *    is updated
929  * 2) Alarm Interrupt - generate an interrupt at a specific time of day
930  * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
931  *    2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
932  * (1) and (2) above are implemented using polling at a frequency of
933  * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
934  * overhead. (DEFAULT_RTC_INT_FREQ)
935  * For (3), we use interrupts at 64Hz or user specified periodic
936  * frequency, whichever is higher.
937  */
938 #include <linux/mc146818rtc.h>
939 #include <linux/rtc.h>
940 #include <asm/rtc.h>
941
942 #define DEFAULT_RTC_INT_FREQ    64
943 #define DEFAULT_RTC_SHIFT       6
944 #define RTC_NUM_INTS            1
945
946 static unsigned long hpet_rtc_flags;
947 static int hpet_prev_update_sec;
948 static struct rtc_time hpet_alarm_time;
949 static unsigned long hpet_pie_count;
950 static u32 hpet_t1_cmp;
951 static unsigned long hpet_default_delta;
952 static unsigned long hpet_pie_delta;
953 static unsigned long hpet_pie_limit;
954
955 static rtc_irq_handler irq_handler;
956
957 /*
958  * Check that the hpet counter c1 is ahead of the c2
959  */
960 static inline int hpet_cnt_ahead(u32 c1, u32 c2)
961 {
962         return (s32)(c2 - c1) < 0;
963 }
964
965 /*
966  * Registers a IRQ handler.
967  */
968 int hpet_register_irq_handler(rtc_irq_handler handler)
969 {
970         if (!is_hpet_enabled())
971                 return -ENODEV;
972         if (irq_handler)
973                 return -EBUSY;
974
975         irq_handler = handler;
976
977         return 0;
978 }
979 EXPORT_SYMBOL_GPL(hpet_register_irq_handler);
980
981 /*
982  * Deregisters the IRQ handler registered with hpet_register_irq_handler()
983  * and does cleanup.
984  */
985 void hpet_unregister_irq_handler(rtc_irq_handler handler)
986 {
987         if (!is_hpet_enabled())
988                 return;
989
990         irq_handler = NULL;
991         hpet_rtc_flags = 0;
992 }
993 EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler);
994
995 /*
996  * Timer 1 for RTC emulation. We use one shot mode, as periodic mode
997  * is not supported by all HPET implementations for timer 1.
998  *
999  * hpet_rtc_timer_init() is called when the rtc is initialized.
1000  */
1001 int hpet_rtc_timer_init(void)
1002 {
1003         unsigned long cfg, cnt, delta, flags;
1004
1005         if (!is_hpet_enabled())
1006                 return 0;
1007
1008         if (!hpet_default_delta) {
1009                 uint64_t clc;
1010
1011                 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
1012                 clc >>= hpet_clockevent.shift + DEFAULT_RTC_SHIFT;
1013                 hpet_default_delta = (unsigned long) clc;
1014         }
1015
1016         if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
1017                 delta = hpet_default_delta;
1018         else
1019                 delta = hpet_pie_delta;
1020
1021         local_irq_save(flags);
1022
1023         cnt = delta + hpet_readl(HPET_COUNTER);
1024         hpet_writel(cnt, HPET_T1_CMP);
1025         hpet_t1_cmp = cnt;
1026
1027         cfg = hpet_readl(HPET_T1_CFG);
1028         cfg &= ~HPET_TN_PERIODIC;
1029         cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1030         hpet_writel(cfg, HPET_T1_CFG);
1031
1032         local_irq_restore(flags);
1033
1034         return 1;
1035 }
1036 EXPORT_SYMBOL_GPL(hpet_rtc_timer_init);
1037
1038 /*
1039  * The functions below are called from rtc driver.
1040  * Return 0 if HPET is not being used.
1041  * Otherwise do the necessary changes and return 1.
1042  */
1043 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1044 {
1045         if (!is_hpet_enabled())
1046                 return 0;
1047
1048         hpet_rtc_flags &= ~bit_mask;
1049         return 1;
1050 }
1051 EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit);
1052
1053 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
1054 {
1055         unsigned long oldbits = hpet_rtc_flags;
1056
1057         if (!is_hpet_enabled())
1058                 return 0;
1059
1060         hpet_rtc_flags |= bit_mask;
1061
1062         if ((bit_mask & RTC_UIE) && !(oldbits & RTC_UIE))
1063                 hpet_prev_update_sec = -1;
1064
1065         if (!oldbits)
1066                 hpet_rtc_timer_init();
1067
1068         return 1;
1069 }
1070 EXPORT_SYMBOL_GPL(hpet_set_rtc_irq_bit);
1071
1072 int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
1073                         unsigned char sec)
1074 {
1075         if (!is_hpet_enabled())
1076                 return 0;
1077
1078         hpet_alarm_time.tm_hour = hrs;
1079         hpet_alarm_time.tm_min = min;
1080         hpet_alarm_time.tm_sec = sec;
1081
1082         return 1;
1083 }
1084 EXPORT_SYMBOL_GPL(hpet_set_alarm_time);
1085
1086 int hpet_set_periodic_freq(unsigned long freq)
1087 {
1088         uint64_t clc;
1089
1090         if (!is_hpet_enabled())
1091                 return 0;
1092
1093         if (freq <= DEFAULT_RTC_INT_FREQ)
1094                 hpet_pie_limit = DEFAULT_RTC_INT_FREQ / freq;
1095         else {
1096                 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
1097                 do_div(clc, freq);
1098                 clc >>= hpet_clockevent.shift;
1099                 hpet_pie_delta = (unsigned long) clc;
1100         }
1101         return 1;
1102 }
1103 EXPORT_SYMBOL_GPL(hpet_set_periodic_freq);
1104
1105 int hpet_rtc_dropped_irq(void)
1106 {
1107         return is_hpet_enabled();
1108 }
1109 EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq);
1110
1111 static void hpet_rtc_timer_reinit(void)
1112 {
1113         unsigned long cfg, delta;
1114         int lost_ints = -1;
1115
1116         if (unlikely(!hpet_rtc_flags)) {
1117                 cfg = hpet_readl(HPET_T1_CFG);
1118                 cfg &= ~HPET_TN_ENABLE;
1119                 hpet_writel(cfg, HPET_T1_CFG);
1120                 return;
1121         }
1122
1123         if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
1124                 delta = hpet_default_delta;
1125         else
1126                 delta = hpet_pie_delta;
1127
1128         /*
1129          * Increment the comparator value until we are ahead of the
1130          * current count.
1131          */
1132         do {
1133                 hpet_t1_cmp += delta;
1134                 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
1135                 lost_ints++;
1136         } while (!hpet_cnt_ahead(hpet_t1_cmp, hpet_readl(HPET_COUNTER)));
1137
1138         if (lost_ints) {
1139                 if (hpet_rtc_flags & RTC_PIE)
1140                         hpet_pie_count += lost_ints;
1141                 if (printk_ratelimit())
1142                         printk(KERN_WARNING "hpet1: lost %d rtc interrupts\n",
1143                                 lost_ints);
1144         }
1145 }
1146
1147 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
1148 {
1149         struct rtc_time curr_time;
1150         unsigned long rtc_int_flag = 0;
1151
1152         hpet_rtc_timer_reinit();
1153         memset(&curr_time, 0, sizeof(struct rtc_time));
1154
1155         if (hpet_rtc_flags & (RTC_UIE | RTC_AIE))
1156                 get_rtc_time(&curr_time);
1157
1158         if (hpet_rtc_flags & RTC_UIE &&
1159             curr_time.tm_sec != hpet_prev_update_sec) {
1160                 if (hpet_prev_update_sec >= 0)
1161                         rtc_int_flag = RTC_UF;
1162                 hpet_prev_update_sec = curr_time.tm_sec;
1163         }
1164
1165         if (hpet_rtc_flags & RTC_PIE &&
1166             ++hpet_pie_count >= hpet_pie_limit) {
1167                 rtc_int_flag |= RTC_PF;
1168                 hpet_pie_count = 0;
1169         }
1170
1171         if (hpet_rtc_flags & RTC_AIE &&
1172             (curr_time.tm_sec == hpet_alarm_time.tm_sec) &&
1173             (curr_time.tm_min == hpet_alarm_time.tm_min) &&
1174             (curr_time.tm_hour == hpet_alarm_time.tm_hour))
1175                         rtc_int_flag |= RTC_AF;
1176
1177         if (rtc_int_flag) {
1178                 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
1179                 if (irq_handler)
1180                         irq_handler(rtc_int_flag, dev_id);
1181         }
1182         return IRQ_HANDLED;
1183 }
1184 EXPORT_SYMBOL_GPL(hpet_rtc_interrupt);
1185 #endif