perf_events, x86: Remove spurious counter reset from x86_pmu_enable()
[linux-2.6.git] / arch / x86 / kernel / cpu / addon_cpuid_features.c
1 /*
2  *      Routines to indentify additional cpu features that are scattered in
3  *      cpuid space.
4  */
5 #include <linux/cpu.h>
6
7 #include <asm/pat.h>
8 #include <asm/processor.h>
9
10 #include <asm/apic.h>
11
12 struct cpuid_bit {
13         u16 feature;
14         u8 reg;
15         u8 bit;
16         u32 level;
17 };
18
19 enum cpuid_regs {
20         CR_EAX = 0,
21         CR_ECX,
22         CR_EDX,
23         CR_EBX
24 };
25
26 void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
27 {
28         u32 max_level;
29         u32 regs[4];
30         const struct cpuid_bit *cb;
31
32         static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
33                 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
34                 { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 },
35                 { 0, 0, 0, 0 }
36         };
37
38         for (cb = cpuid_bits; cb->feature; cb++) {
39
40                 /* Verify that the level is valid */
41                 max_level = cpuid_eax(cb->level & 0xffff0000);
42                 if (max_level < cb->level ||
43                     max_level > (cb->level | 0xffff))
44                         continue;
45
46                 cpuid(cb->level, &regs[CR_EAX], &regs[CR_EBX],
47                         &regs[CR_ECX], &regs[CR_EDX]);
48
49                 if (regs[cb->reg] & (1 << cb->bit))
50                         set_cpu_cap(c, cb->feature);
51         }
52 }
53
54 /* leaf 0xb SMT level */
55 #define SMT_LEVEL       0
56
57 /* leaf 0xb sub-leaf types */
58 #define INVALID_TYPE    0
59 #define SMT_TYPE        1
60 #define CORE_TYPE       2
61
62 #define LEAFB_SUBTYPE(ecx)              (((ecx) >> 8) & 0xff)
63 #define BITS_SHIFT_NEXT_LEVEL(eax)      ((eax) & 0x1f)
64 #define LEVEL_MAX_SIBLINGS(ebx)         ((ebx) & 0xffff)
65
66 /*
67  * Check for extended topology enumeration cpuid leaf 0xb and if it
68  * exists, use it for populating initial_apicid and cpu topology
69  * detection.
70  */
71 void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
72 {
73 #ifdef CONFIG_SMP
74         unsigned int eax, ebx, ecx, edx, sub_index;
75         unsigned int ht_mask_width, core_plus_mask_width;
76         unsigned int core_select_mask, core_level_siblings;
77         static bool printed;
78
79         if (c->cpuid_level < 0xb)
80                 return;
81
82         cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
83
84         /*
85          * check if the cpuid leaf 0xb is actually implemented.
86          */
87         if (ebx == 0 || (LEAFB_SUBTYPE(ecx) != SMT_TYPE))
88                 return;
89
90         set_cpu_cap(c, X86_FEATURE_XTOPOLOGY);
91
92         /*
93          * initial apic id, which also represents 32-bit extended x2apic id.
94          */
95         c->initial_apicid = edx;
96
97         /*
98          * Populate HT related information from sub-leaf level 0.
99          */
100         core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
101         core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
102
103         sub_index = 1;
104         do {
105                 cpuid_count(0xb, sub_index, &eax, &ebx, &ecx, &edx);
106
107                 /*
108                  * Check for the Core type in the implemented sub leaves.
109                  */
110                 if (LEAFB_SUBTYPE(ecx) == CORE_TYPE) {
111                         core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
112                         core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
113                         break;
114                 }
115
116                 sub_index++;
117         } while (LEAFB_SUBTYPE(ecx) != INVALID_TYPE);
118
119         core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
120
121         c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, ht_mask_width)
122                                                  & core_select_mask;
123         c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, core_plus_mask_width);
124         /*
125          * Reinit the apicid, now that we have extended initial_apicid.
126          */
127         c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
128
129         c->x86_max_cores = (core_level_siblings / smp_num_siblings);
130
131         if (!printed) {
132                 printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
133                        c->phys_proc_id);
134                 if (c->x86_max_cores > 1)
135                         printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
136                                c->cpu_core_id);
137                 printed = 1;
138         }
139         return;
140 #endif
141 }